-

..

ASM-51

-
2010

.. ASM-51.
: : , 2010. ____.

MCS-51.
, ,
: 210401
, 200600.62
, 20020104

06 2009.,
2.

2009 ,
12 ,

.


-
, 20092018 .
-
, , 2010
.. , 2010

30
.................................................. 5
......................................................................................................... 5
............................................................................. 9
......... 9
RG2. ....................................................................... 10
....................................................................... 11
I) ....................................... 11
II). ASM51.................... 14
III) ......................................................................... 15
IV) . ................................................................ 16

...................................................................... 20
V). . ...................................................... 20
VI) 2
. ................................................................................. 22
VII) . ............ 29
- 34
1. ............ 37
2. ...................... 38
3. ..................... 39
4.
2 ...................................................................................................... 39
5.
MCS-51 .................................................................................. 40
6. VS ............................................................ 41
................................................ 42
................................................. 43
31
.............................................................................................. 47
........................................................................... 47
........... 47
RG2. ....................................................................... 48
....................................................................... 49
I) ....................................... 49
II).
. ........................................................................................................ 52
III) ......................................................................... 57
IV) . ................................................................ 58

V).
. ........................................................................................................ 60
V-1) ...................................................................... 62
V-2) - ....................... 64
V-3)
main_prog. ................................................................................. 64
V-4) -
..................................................................................... 68
V-5)
ASCII . .................................................................................................. 74
VI) ....................... 75
VII) ....................................... 76
1. MCS51........................................................................................................................ 76
2. .. 78
8-
4 -> 1,
. .................................................................. 79
............................................................... 80
................................................. 81
............................................................... 85
............................................................... 85
................................................. 86
.................................................................................................. 89

30

.1 ()
ADuC812 MCS-51 (8051).
()
(),

() . , ,
,
/ ( IO). (
, .. ,
) /,
( UART), , ,
.
SDK1.1 ( ).
.
.1 ,
.
RG
/ (
),
, .1.
(),
, , ,
16-
).
MCS-51 :
(Flash, EPROM ROM - CODE),
- DATA,
/ ( - CODE, XDATA.
Flash- ADuC812 8 (0..1FFF).
. ,
64KB (0..FFFF).
64KB,
ADuC812 16MB ( 64 ).
.

.1

: / (~RD, ~WR).

~PSEN (Program Store Enable). .2
MCS-51.
,
,

. ,
: ~WE (Write Enable) ~WR ~OE (Output Enable)

~RD.
(~RD ~PSEN)
(. .1).
+ (.2).

.2
- DATA (256 )
. 128 (0..7F) 4- 8 REG ,
BDATA.
, ,
. 128 (80..FF)
,
SFR (Special Function Register). SFR
.
, , DATA
.

DATA, ,
XDATA (eXternal DATA).

(External Access Enable)
~EA. ~EA=1,
, (),

( ). ~EA = 0,
.

+ ~EA=1. -
,
()
.
-
/ . .1
, ..
() .
(DATA)
- (CODE) ADuC812
(
)
EEPROM,
SFR.
ADuC812
(256 64 = 16). .2
() ( + ). 255
()
.
.30.2-1 ADuC812.
P0..P3 ,
- RxD TxD, ADCi,
/ - ~RD ~WR, Ai,
/ ADi .
(. .30.1).

.30.2-1

, ,
.


.
.

, ,
,
. (),
,
. ,

()
.
/ (AD0..AD7) .
( ALE, #WR, #RD,
#RESET .). ,
#
~. .30.3 ,
EPM3064 .
: 1) C
. .

.30.3
: 1) 62- ,
.. Yx=Y62, 2) A22,A20,A17 A16 ,
( ).

10

RG2.
MOVX @DPTR, A
(AD7, AD6,,AD0)
RG1 ALE (A7, A6,,A0). ,
256- (y0..y255),
(OE, CS
..). .30.3 Yx OE (Output
Enable) RG2. ALE
#WR, RG2 (D7..D0),
. , #RESET .. = 1,
.. . (Q7..Q0),
Qi = 1 , .

RG2. 16
XRAM (64KB)
DPTR=(DPH DPL Data Pointer)
. (8 )
DPP (Data Pointer Page).

,

, A23,A22,A21,A20,A19,A18,A17,A16 = 01010011(BIN)
=53(HEX). Y62 ,

(6210=001111102=3E16). (. .30.3)
:

11

, ,
RG2 0101 0011 0000 0000
0011 1110=53003E(HEX) (DPP)=53h, (DPTR)=003E=3E.
- .
##############################################################
: (DPP)
(DPTR) .
##############################################################

I) .
(IDE) MCS-51 Keil
uVision

.
,
Project | Close Project.

. Project | New Project.

Create New Project.
C:\EMUL\Work\SDK_11\,

grXXXX ( gr8888PAN).

12

,
prMyTimer .
Select Device for Target .

ADuC812 OK.

, ..
C .
,

.
,
.30.4.

13

.30.4

*.a51. . File | New
Text1 . ,
, . File | Save As
,
prMyTimerASM.a51 ( a51).
. Files
Source Group 1
Add Files to Group prMyTimerASM.

Add Close. ,

prMyTimerASM.a51, .
. File |
Save All. , .
( ) , .
View Workbook Mode

IDE Keil uVision .Edit

| Configuration | Editor .

14

. . File | New
Text....
. File | Save As
aduc812.h_my .
- #include aduc812.h_my.
II). ASM51.
( )
.
,
.

( ).

( ):

15

##############################################################
: Tochka_Vhoda
,
.
##############################################################
III) .

,
.
/
(000000 FFFFFF = 16).
movx @DPTR, a
.

( ).
CSEG(Code Segment) (),
( ).
CSEG at XXXX
XXXX . jmp Tochka_Vhoda
, ,
0000h
- .
0000h.
ORG Tochka_Vhoda
. ,
- 4000h. main_p ( )
. mov Wr_byte,#0bdh
, R1.
Write 0bdh,3eh,53h
.
_8: jmp _8
END. ,

. , ,
. ,
,
. ,
,
( )
,
.
uVision2.

16

, (UNDEFINED)
, .

DPP.
##############################################################
aduc812.h_my
:
##############################################################
XX 16- ,
-1 .
DPP.
. ,
XX aduc812.h_my.
,
.

IV) .
( ) ,
ASCII
HEX.
Intel HEX .

:0F40000075847F90003F74BDF075840080FE32A0

:00000001FF
ASCII
, 16-(HEX) ,
. :.
. 2 , 0F(15)
, . 4
, 4000 ,
15 ()
. 00(
) 01(. ). 2 A0
256-

17

. .
15(0F): 75 84 7F 90 00 3F 74 BD F0 75 84 00 80 FE 32.
:00000001FF
. 02XXXX060000SS
XXXX - HEX-
, .. . 02
LJMP XXXX. XXXX 16-
(Tochka_Vhoda), . 060000
. SS
-
256-. XXXX=4000h.

( .
Project | Options for Target) Output
HEX-80.

Define 8051 SFR Names

, OK.
IV-I) , HEX- ,
Build Target

Rebuild All
. Project | Build Target.
<F7>.
, 0
Error(s).
. :
RESET
. HEX-
, ( . 10)

18

C:\EMUL\Work\SDK_11\W_hex202.exe.

*.hex, , 4000
HEX-....

... ...
.
, :

.
/ ,
DPP .
VB HEX Loader , ..
.
#### ####
: . Project/Options for
Target . Macros: All Expansions

19

(
*.lst). ,
.
, ,
.
( DPP DPPP).

, ,
, (
). ,
.

. .
File | Open.

. ERROR.

20

, ()
, RESET.

V). .

.

-, .
, ,

- ,
- .
,
-.
- FFFFh
0000h. -
,

.
,
-
.

, -.
0000h, 0003h, 000bh, , 0043h -
MCS-51
(. 3).
,
. .
, ,
- 8 ( 0000 - 3
). ()
, 3-
LJMP XXXX .

21

. ,
(SRAM),
.
, - ,

,
. -, -
,

.
: 0000h,
0003h 0043h -,
( MK MCS51), LJMP 20XX 2000h,
2003h, , 2043h, (XRAM =
eXternalRAM). .
.
2000h, 2003h2043h
,
.

.

,
(..
FFFFh 0000h). ( )
002bh. ,
202bh LJMP T2_int, T2_int

22

()
. T2_int - .

VI)
2 .

T2_int Init_Timer2
( ) 2.
#############################################################
:
!
#############################################################

,
Timer2 . 0, 1 2
2, .. 16-
autoreload . .30.5
.

.30.5

TL2TH2 , : (TL2-.
TH2-.). , .. FFFF 0000,
c TH2 TF2
(

23

).
(RELOAD)
,
RCAP2H RCAP2L
, 0000(HEX),
.. ,
RCAP2H RCAP2L, .
, TF2 ,
,
TF2.,
..
.
2-
( - SFR) T2CON.
:
T2CON ( )
D7
TF2

D6
EXF2

D5
RCLK

D4
D3
TCLK EXEN2

D2
TR2

D1
CNT2

D0
CAP2

TF2 1,
2, .
TR2 - / 2

T2CON (. 1).
T2CON
. TH2 TL2
2. RCAP2H RCAP2L

( . ).

24

1 . 2
, .
(CNT2=0)
(CORE CLOCK).
(CNT2=1)
, T2 .
, (
CNT2=0) (CAP2=0) .

/2. CoreClock =11.059.200 . 11.059.200
/ 12 / 65536 = 14,0625 (. 16-
2^16=65536). 12 (. .30.5 ).
1 / 14.0625 = 0.07 .
1 . ,
1, 921600 = 11059200 / 12 ,
4608(DEC) = 1200(HEX). 200
(Ttimer2=5=0,005). .. 1. 2 200
200 (. .30.5 ).
200
(.. 1)

/2

65536(DEC)=10000(HEX).
1200(hex)
10000(HEX) 1200(HEX) =
EE00(HEX).

#########################################################
: Ttimer2 T
, EE00,
( ) 200
.
1). - (timer2_OverFlow) t2OF=T/Ttimer2
= 1/0.005=200

25

2). (. ) =921600/(1/ Ttimer2)-

= 921600/200=4608
3). , 65536 - 4608 =
60928(DEC) =EE00(HEX)
#############################################################
-2 EE00h
RCAP2 (RCAP2H RCAP2L ). ,
EE00, Init_Timer2
EE00, .. TH2 TL2
.
: EE00 .
:

65536-X=(not X)+1 2- X ().

IE.
D7
EA

D6
EADC

D5
ET2

D4
ES

D3
ET1

D2
EX1

D1
ET0

D0
EX0

EA = 0 (1 )
EADC 1 0

ETx 1 0 _x
(x=0,1,2)
ES 1 0
UART
EXx 1 0
(x=0,1)
EA=0, ,
D6D0 .
ET2=1 EA=1. EA ,
, D6D0.
.
#############################################################
: 200 EE00

#############################################################

26

..

..

(
):
#include "aduc812.h_my" ;== .
.
Wr_byte EQU R1;== ,
R1
Tochka_Vhoda EQU 4000h;==
t2OF EQU R0;== t2OF ( ) R0
;== t2OF (timer2 OverFlow)
Reg1 EQU 1;== R1, 1-
.
;================================================
Write MACRO Wr_byte, reg_addr, page_num;== -
. -
mov DPP,#page_num;==
mov DPTR,#reg_addr;== .

mov a,Wr_byte;== R1

movx @DPTR,a;== / DPTR

mov DPP,#0;==
ENDM;==

27

;================================================
CSEG at 0;== (
0000h..FFFFh)
;== .. 0000..1FFF - Flash ,
2000h,
;== =64K (
.. >64K)
jmp Tochka_Vhoda;== (Debugger)
;==
;================================================
ORG 202bh;==

jmp T2_int;== " 2" - T2_int
;================================================
ORG Tochka_Vhoda;==
main_p: ;==
call Init_Timer2
mov Wr_byte,#0bdh;== R1
Write Wr_byte,3eh,53h;== c

_8: jmp _8;==

;================================================
Init_Timer2:
mov t2OF,#200d;== 200 0.005 = 1
mov RCAP2H,#0eeh;== EE00 - 0.005 .
mov RCAP2L,#0
mov TH2,#0eeh;==
mov TL2,#0;
setb ET2;== 2
setb TR2;== -2
setb EA;==
ret;==
;================================================
T2_int:
clr TF2;== TF2
djnz t2OF,vyhod;== 200 ( 0.005 = 1) ?
mov t2OF,#200d;==
200
xrl Reg1,#0ffh;== ,
Write Wr_byte,3eh,53h
vyhod:
reti;==
;================================================
END;==

28

<F7>
, UNDEFINED
SYMBOL ( , ).

,
. aduc812.h_my
. 1,
2.
:
DPP data 84h;== DPP ( )
TF2 bit 0xxh;== () TF2 (xx
)
..
##############################################################
:
Init_Timer2.

aduc812.h_my. :
DATA, BIT.
##############################################################
, UNDEFINED SYMBOLs -
:

RESET.
, .
,
.

:
, .
,
.
#### ####

29

VII) .
,
( ).
MCS-51 ~Int0 ~Int1
.
,
().
, .

.30.5.1
,
~Int0,1. , -,
EX0 EX1 IE
(. 2), -,
IT0 IT1 TCON Timer Control (. 2). ITx = 1,
.
#############################################################
: 4- -2
aduc812.h_my
#############################################################

Ext1_int (
) ~Int1 ( Ext1_int ).

30

.30.6
#############################################################
:

(.30.6)
.
, IE1 ORG
0013h +2000h = 2013h. jmp
(): Ext1_int.
IE0 (
Ext0_int).

-
.
: 1) ,
Wr_byte , #55h (
), 2)
TR2=1 ( setb TR2), ..
? -5,
.

31

4 : ) 2
( EX0=EX1=1) ) ( IT0=IT01=1)
~Int0,1. setb EX0
~Int0.
.

4- . ,
4- "aduc812.h_my"

<F7>.
##############################################################
. ,
, c
.

~Int0 ,

,
. INT0
(1 -> 0)
.
Ext0_int,
.
.
~Int1 .
.
#### ####

32

( ):
#include "aduc812.h_my" ;== .
.
Wr_byte EQU R1;== ,
R1
Tochka_Vhoda EQU 4000h;==
t2OF EQU R0;== t2OF ( ) R0
;== t2OF (timer2 OverFlow)
Reg1 EQU 1;== R1, 1- .

;================================================
Write MACRO Wr_byte, reg_addr, page_num;== -
. -
mov DPP,#page_num;==
mov DPTR,#reg_addr;== .

mov a,Wr_byte;== R1

movx @DPTR,a;== / DPTR

mov DPP,#0;==
ENDM;==
;================================================
CSEG at 0;== (
0000h..FFFFh)
;== .. 0000..1FFF - Flash ,
2000h,
;== =64K (
.. >64K)
jmp Tochka_Vhoda;== (Debugger)

;== (
)
;================================================
ORG 202bh;==

jmp T2_int;== " 2" - T2_int

..;== Ext0_int ( SDK
1.1)
..;== Ext0_int
......;== Ext1_int ( SDK
1.1)
..;== Ext1_int

33

;================================================
ORG Tochka_Vhoda;==
main_p: ;==
call Init_Timer2
mov Wr_byte,#0bdh;== R1
Write Wr_byte,3eh,53h;==

;==
_8: jmp _8;==
;================================================
Init_Timer2:
mov t2OF,#200d;== 200*0,005=1
mov RCAP2H,#0eeh;== EE00 - 0.005 .
mov RCAP2L,#0
mov TH2,#0eeh;==
mov TL2,#0;
setb ET2;== 2
setb TR2;== -2
..;== P3.2(Int0)
..;==
..;== P3.3(Int1)
..;==
setb EA;==
ret;==
;================================================
T2_int:
clr TF2;== . TF2
djnz t2OF,vyhod;== t2OF t2OF<>0
vyhod
mov t2OF,#200d;== -
200
xrl Reg1,#0ffh;== (
)
Write Wr_byte,3eh,53h ;==
vyhod:
reti;==
;================================================
Ext0_int: ; IE0(Ext0_int)
..;==
reti
;=====================================
Ext1_int: ; IE1(Ext1_int)
.;==
reti

34

;=====================================
END;==
.
"aduc812.h_my"
. Keil uVision (
IDE )
. , ADuC812 "aduc812.h,
#include <aduc812.h>.
, .
,
"aduc812.h_my".

,
,
, . Tochka_Vhoda
47h ( )
(
202bh, 2003h 2013h). .

.
-
, Simulator,
.ini. Simulator.ini :

35

MAP X:0x000000, X:0xFFFFFF READ WRITE

.
Debug

Initialization
File

:
<Cntr+F5> . Debugger |
Memory Map , -
.

<F9>
(breakpoint) ( 60
).

36

. sec Project
Window .

P3.2 P3.3 (. 5.1).
, Parallel Port 3 Timer/Counter
2 . Peripherals | I/O-Ports Peripherals | Timer | Timer2.

.. ).

. T2:
Timer/Counter 2 ( TR2=1). 3 3.
,
.

3 3
.
Timer/Counter 2
TR2. TR2 ,
/ .
:
Ext1_int
.
Ext0_int
.

37

1.
8- (
SFR)
ADuC812 ( MCS-51)

38

2.
()
ADuC812 ( MCS-51)

39

3.

4.
2
(Special Function
Registers SFR)
IE (Interrupt Enable Register)
D7
D6
D5
D4
D3
D2
D1
EA
EADC
ET2
ES
ET1
EX1
ET0

D0
EX0

EA = 0 (1 )
EADC 1 0

40

ETx 1 0 _x
(x=0,1,2)
ES 1 0
UART
EXx 1 0
(x=0,1)
-2 T2CON
D7
D6
D5
D4
D3
D2
D1
D0
TF2
EXF2 RCLK TCLK EXEN2
TR2
CNT2
CAP2
TF2 , 1,
2
TR2 - 2
/ 2 RCAP2L
D7
D6
D5
D4
D3
D2
D1

D0

// 2 RCAP2H
D7
D6
D5
D4
D3
D2
D1

D0

5.
MCS-51
DST,SRC , ()
operand ()
bit
xrl DST,SRC -
anl DST,SRC -
clr bit -
setb bit -
cjne a, operand, address -
,
.
djnz operand, 1 ,
<> 0
movx @dptr,a - /
, DPTR.
movx a,@dptr -
jmp address (
LJMP ..,
AJMP SJMP ).
call address address
.

41

ret ( )
reti (
)
push operand
pop operand
inc operand
mov DST,SRC
6. VS
1) (
):

2) - (
):

.
.
. (, , 8 , , . .)
.
, .

42

Yx=Y15
Tochka_Vhoda
3000h
Ttimer2=50msec
T=3

Yx=Y151
Tochka_Vhoda
5100h
Ttimer2=2.5msek
T=0.5

Yx=Y55
Tochka_Vhoda
2500h
Ttimer2=25msec
T=1

Yx=Y143
Tochka_Vhoda
7000h
Ttimer2=10msec
T=2

Yx=Y199
Tochka_Vhoda
3650h
Ttimer2=50msec
T=4

Yx=Y23
Tochka_Vhoda
2A00h
Ttimer2=20msec
T=5

Yx=Y71
Tochka_Vhoda
4E00h
Ttimer2=8msec
T=1

Yx=Y31
Tochka_Vhoda
5D00h
Ttimer2=4msec
T=1

Yx=Y47
Tochka_Vhoda
6AB0h
Ttimer2=25msec
T=0.5

Yx=Y135
Tochka_Vhoda
44E0h
Ttimer2=40msec
T=2

Yx=Y39
Tochka_Vhoda
5E30h
Ttimer2=50msec
T=0.5

Yx=79
Tochka_Vhoda
2A00h
Ttimer2=20msec
T=2

43

1) : ,
,, , RAM, (ALE, #WR, #RD #PSEN).
2) ADuC812.
3) , 24-
RG2. MOVX @DPTR,A MOVX A,@DPTR
( , ).
8.5.1 MK ccea c pe a
RG2.

4)
( .3).

44

45

5). IE: EA, ET2, EX1,

EX0 T2CON: TR2 TF2.
8) .

6) RCAP2L RCAP2H 2 (
).

46

:
.

47

31

,
ASCII
.

, ,
,
. (),
,
. ,

()
.
/ (AD0..AD7) .
( ALE, #WR, #RD,
#RESET .). ,
#
~. .30.3 ,
EPM3064. 2
, 3 1 0.
.
.
: 1) C
. .

48

.30.3
1) 62- , ..
Yx=Y62, 2) A22,A20,A17 A16 ,
( ).

RG2.
MOVX @DPTR, A
(AD7, AD6,,AD0)
RG1 ALE (A7, A6,,A0). ,
256- (y0..y255),
(OE, CS
..). .30.3 Yx OE (Output
Enable) RG2. ALE
#WR, RG2 . D3..D0 ( 0),
.

RG2. 16 XRAM
(64KB)
DPTR=(DPH DPL Data Pointer) .
(8 )
DPP (Data Pointer Page).

,

, A23,A22,A21,A20,A19,A18,A17,A16 = 01010011(BIN)
=53(HEX). Y62 ,

(6210=001111102=3E16). (. .30.3)
:

49

, ,
RG2 0101 0011 0000 0000
0011 1110=53003E(HEX) (DPP)=53h, (DPTR)=003E=3Eh.
- .
##############################################################
: 53h 3Eh
(DPP) (DPTR)
.
##############################################################

I) .
(IDE) MCS-51 Keil
uVision

.
,
Project | Close Project.

. Project | New Project.

Create New Project.
C:\EMUL\Work\SDK_11\,

grXXXX ( gr8888PAN).

50

,
prMyKey .
Select Device for Target .

ADuC812 OK.

, ..
C .
,

.
,
.30.4.

.30.4

51

*.a51. . File | New
Text1 . ,
, . File | Save As
,
prKey_LED.a51 ( a51).
. Files
Source Group 1
Add Files to Group prKey_LED.a51.
Add Close. ,
prKey_LED.a51,
.
.
File | Save All. , .
( ) , .
View Workbook Mode

IDE Keil uVision .Edit

| Configuration | Editor .

. (
), c Define 8051..
( .
Project | Options for Target).

prKey_LED.a51 :
#include <aduc812.h> END, ,
, aduc812 ,
.
aduc812.h
.

52

II).
.
,
16- , 1 ASCII
. 5
- ( ).
.

. 5
D0..D3 (
SHIFT LINES) 0 (.. ).
D4..D7 (
RETURN LINES).
, .. ,
D4..D7 +U, ..
1 (D7..D4=1111). ,
.1, .1
( D7..D4=1110). , D7..D4
1111,
.
, 1
D7D6D5D4D3D2D1D0 =
11111110 ( 4 ). .1
, 0 col0 row0
D7D6D5D4D3D2D1D0 = 00010000

53

( 4 ). ,
8-
4-,
8- .
. .
##############################################################
: 2
.
##############################################################

, 30.

, .

: . Project/Options for Target

. Macros: All Expansions

54

(
*.lst). ,
. ,
, .
( DPP DPPP).

, ,
, (
). ,
.

. .
File | Open.

55

. ERROR.

, ()
, RESET.
,
, 1.
_8: .. jmp _8.

ASCII ,
A=41h.

56

( ).

( ).
##############################################################
: 3 (53h, 3eh
4000h), ,
.
##############################################################
#include <aduc812.h>
Rd_ROW EQU R2;== R2
Wr_COL EQU R3;== R3
Mask
EQU R4;==
R4
DPP_page_num EQU 53h;==
DPTR_KEYreg_num EQU 3eh;== ()
DPTR_LEDreg_num
EQU 3fh;== ()
(. . 30)
Tochka_Vhoda EQU 4000h;==
;================================================
Write MACRO Wr_byte, reg_addr;== - . -
mov DPTR,#reg_addr;== .

mov a,Wr_byte;== Wr_byte
movx @DPTR,a;== / DPTR
ENDM;==
;================================================
Read MACRO Rd_byte, reg_addr;== - . -
mov DPTR,#reg_addr;== .

movx a,@DPTR;== / DPTR
mov Rd_byte,a;==
Rd_byte
ENDM;==
;================================================
CSEG at 0
jmp Tochka_Vhoda
;================================================
ORG Tochka_Vhoda;==
main_prog: ;==
mov DPP,#DPP_page_num
mov Mask,#00010000b;== = 0001 0000 - ROW0

57

_8: ;==
mov Wr_COL,#11111110b;== 1111 1110 - COL0=0 ( D0)
Write Wr_COL,DPTR_KEYreg_num;== '0'
Read Rd_ROW,DPTR_KEYreg_num;==
mov a,Rd_ROW;==
anl a,Mask;== ROW0 ( D4)
cjne a,#0,_8;== D4<>0, .'1'

Write #31h,DPTR_LEDreg_num;== , ASCII

'1' = 31h.
jmp _8;==
;================================================
END
III) .
,
R2..R4
.
/ / /
(0000FFFF)
(000000 FFFFFF = 16). movx
@DPTR, a movx a, @DPTR
(
) .
( ).
CSEG(Code Segment) (),
( ).
CSEG at XXXX
XXXX . jmp Tochka_Vhoda
, ,
0000h
- .
0000h.
ORG Tochka_Vhoda
. ,
- 4000h. main_p ( )
.
_8: ..jmp _8
END.
30, .
(mov Wr_COL,#11111110b

Write
Wr_COL,DPTR_KEYreg_num)
.0 col0 (.30.5).
(Read Rd_ROW,DPTR_KEYreg_num mov a,Rd_ROW)
.

58

:
,
Write Read
DPTR_KEYreg_num, .
anl a,Mask (ANd Logic) D4 ( row0)
, cjne a,#0,_8 -
-
_8, (jne), .. 1
. 1 D4=0,
,
Write #31h,DPTR_LEDreg_num,
ASCII 1. jmp _8
.
, ,

.
, ,
. ,
, .
,
( ),
.
,
.
uVision2.

IV) .
( ) ,
ASCII
( . Project |

Options for Target) Output
HEX-80.

, OK.

59

, HEX- ,

Rebuild All
Build Target
. Project | Build Target.
<F7>.
, 0
Error(s).
. :
RESET
. HEX-
, ( . 10)
.

C:\EMUL\Work\SDK_11\W_hex202.exe.
*.hex,
, 4000
HEX-....

... ....
, 1 ..
. .1
ASCII :

.
6 .
VB HEX Loader , .. .
#### ####

60

#############################################################
: 3
(#00010000b, #11111110b 31h), ,
, .
#############################################################
,
.
#### ####
V).
.
. (,
) (row) (column)
.
, ,
.
.

, ,
,
, .

.
( )
(
+U) 1. (
) 0.

.

61

,
1.
row0row3 = 1111.
0
() ,
.
, 8, col1
(D3D2D1D0=1101) row2 (D7D6D5D4=1011).
D7D6D5D4 D3D2D1D0=10111101 -
.

, ,
.
,
: 1) 2)
- .
. .
. , 53,
3e 4000 .

62

V-1)
,
.

. , , .
MCS-51
, x86(x64). ,
R6 (
6), ANL
, 6 (c_R).
CJNE , -
, (cur_ROW),
,
.
anl c_R,#11110000b;== 4 ( D7..D4)
cjne cur_ROW,#11110000b,LED_Display;//==

:
, ,
. , ANL A, R5 (
) 1 , ANL A, 5 ( ) 2
,
( 00101101),
(00100101 00000101).
,

63

# . , MOV A,5
5 (
), MOV A,#5 5
( ).
,

.

mov cur_COL,#fst_COL 0
cur_COL (fst_COL first column, ..
, cur_COL current column ).
( Write) (.
.30.3), 4-
col0 ( D0). Read
R6 (cur_ROW). (6 )
ifelse.
, 2 : 1) 4-
0, , 2) 4 , .. .
.
11110000 4 .
, 1111 ( ),
(Compare and Jump if Not Equal CJNE)
( Scan_2_ASCII) -
ASCII .

64

( ) : 21) 0 ( )

cjne
cur_COL,#end_COL,nxt_COL ( nxt_COL
),
2-2) (
cur_COL) (#end_COL) cjne
, clr key_pressed

ret.
,
, : Scan_2_ASCII
nxt_COL. .
V-2) - .
make_scan_code
. 4
4 (
scan_code). scan_code
Ri,
(),
.

.
V-3)
main_prog.
,
cur_COL
. pv (povtor)
. RL

65

(rotate left) , ..
.
scan_2_ASCII. ,
.

.

,
- .

Scan_Key_Once
, , , key_pressed
. Jump if Not Bit
1, wp.
key_pressed 1,
. ,
- make_scan_code.
,
. Scan_Key_Once
, .
key_pressed 0 Jump
if Bit . Write
- .

66

:
#include <aduc812.h>
DPP_page_num EQU 53h;==

DPTR_KEYreg_num EQU 3eh;== ()

DPTR_LEDreg_num
EQU 3fh;== ()
(. . 30)
Tochka_Vhoda EQU 4000h;==
cur_COL
EQU R5;== " 0" (
) R5
c_C
EQU 5;== (alias) 5
cur_ROW EQU R6;== R6
c_R
EQU 6;== (alias) 6
fst_COL
EQU 11111110b;== " " D0
end_COL EQU 11110111b;== " " D3
;===================================================
DSEG at 8;== (
R0..R7)
scan_code: DS 1;== - scan_code
key_num: DS 1;== key_num
ascii_code: DS 1;== ASCII ascii_code
dno_steka: DS 1;== dno_steka (
)
;===================================================
BSEG;==
key_pressed: DBIT 1;== -
;===================================================
Write MACRO Wr_byte, reg_addr;== - .
-
mov DPTR,#reg_addr;== .

mov a,Wr_byte;== Wr_byte

movx @DPTR,a;== / DPTR

ENDM;==
;===================================================
Read MACRO Rd_byte, reg_addr;== - .
-
mov DPTR,#reg_addr;== .

movx a,@DPTR;== / DPTR

67

mov Rd_byte,a;==
Rd_byte
ENDM;==
;===================================================
CSEG at 0
jmp Tochka_Vhoda;==

ORG Tochka_Vhoda;==

main_prog: ;==
mov DPP,#DPP_page_num;== ,
.
mov sp,#dno_steka;== sp
clr key_pressed;== " "
_8:
wp: call Scan_Key_Once
jnb key_pressed, wp;== (wp- wait for
pressed)
call make_scan_code
wu: call Scan_Key_Once
jb key_pressed, wu;== (wu- wait for
unpressed)
Write scan_code,DPTR_LEDreg_num;== -

jmp _8;==
;===================================================
Scan_Key_Once:
mov cur_COL,#fst_COL;==

pv: Write cur_COL,DPTR_KEYreg_num;== "0"

Read cur_ROW,DPTR_KEYreg_num;==
;== if cur_ROW<>1111b then ( )
setb key_pressed;== "-"
anl c_R,#11110000b;== 4 ( D7..D4)
cjne cur_ROW,#11110000b,scan_2_ASCII;//==

;== else ( )
;== if cur_COL<>end_COL then ( )
cjne cur_COL,#end_COL,nxt_COL;==
.
;== else ( - )
clr key_pressed;== "-"
;== end if

68

;== end if
ext:
ret;==
;===================================================
make_scan_code:
mov a,cur_COL;==
anl a,#0fh;== 00001111 .
mov scan_code,a;== -
mov a,cur_ROW;==
anl a,#0f0h;== 11110000 .
orl scan_code,a;== . . -
ret
;===================================================
nxt_COL:;== " "
mov a,cur_COL
rl a;== " 0" ( )
mov cur_COL,a
jmp pv;== "0"
;===================================================
scan_2_ASCII:
jmp ext
;===================================================
END


.
, , -
. , , 8
- D7D6D5D4D3D2D1D0=10111101. - 1 D7D6D5D4D3D2D1D0 = 11101110, ..
#### ####
V-4) -
.
,
-.
. -
: -
, ASCII
( - ).

69

-
. -, ,
. - ,
.

, ,
(key_num) : key_num=n*y+x, x
, y , n (
n=4). .
8 ,
. x=1,
y=2.
8 key_num=4*2+1 =9.

,
, 0
.
-
1, n= 4. 4 4 ,
4 swap.
,
:

70

IF ELSEIF..ENDIF
DSPL,
SCAN, KEYN ASCII.

, -,
, ASCII .

scan_code_2_key_num, ,
- : 1 0, 2 1,
.# 14 D 15.
: , asm-51
,

71

x86(x64). , ADD , #,
ADD A, #.
ADD key_num,
#4 (5 ):
push acc;== ( ,
..
;== -)
mov a, key_num
add a,#4
mov key_num,a
pop acc;==
4 inc .
:
#include <aduc812.h>
DPP_page_num EQU 53h;==
DPTR_KEYreg_num EQU 3eh;== ()
DPTR_LEDreg_num
EQU 3fh;== ()
(. . 30)
Tochka_Vhoda EQU 4000h;==
cur_COL
EQU R5;== " 0" ( )
R5
c_C
EQU 5;== (alias) 5
cur_ROW
EQU R6;== R6
c_R
EQU 6;== (alias) 6
fst_COL
EQU 11111110b;== " " D0
end_COL EQU 11110111b;== " " D3
SCAN
EQU 1;==
KEYN
EQU 2;==
ASCII
EQU 3;==
;======================================================
DSEG at 8;== (
R0..R7)
scan_code: DS 1;== - scan_code
key_num: DS 1;== key_num
ascii_code: DS 1;== ASCII ascii_code
dno_steka: DS 1;== dno_steka (
)
;======================================================
BSEG;==
key_pressed: DBIT 1;== -
;=====================================================
Write MACRO Wr_byte, reg_addr;== - . -

72

mov DPTR,#reg_addr;== .

mov a,Wr_byte;== Wr_byte
movx @DPTR,a;== / DPTR
ENDM;==
;=====================================================
Read MACRO Rd_byte, reg_addr;== - . -
mov DPTR,#reg_addr;== .

movx a,@DPTR;== / DPTR
mov Rd_byte,a;==
Rd_byte
ENDM;==
;=====================================================
CSEG at 0
jmp Tochka_Vhoda;==

ORG Tochka_Vhoda;==
main_prog: ;==
mov DPP,#DPP_page_num;== , .

mov sp,#dno_steka;== sp
clr key_pressed;== " "
_8:
wp: call Scan_Key_Once
jnb key_pressed, wp;== (wp- wait for pressed)
call make_scan_code
wu: call Scan_Key_Once
jb key_pressed, wu;== (wu- wait for
unpressed)
DSPL EQU KEYN;== DSPL = KEYN SCAN ASCII
IF (DSPL = SCAN);==
Write scan_code,DPTR_LEDreg_num;== -

ELSEIF (DSPL = KEYN)
Write key_num,DPTR_LEDreg_num;==

ELSEIF (DSPL = ASCII);== ASCII
ENDIF;==
jmp _8;==
;=====================================================
Scan_Key_Once:
mov cur_COL,#fst_COL;==

73

pv: Write cur_COL,DPTR_KEYreg_num;== "0"

Read cur_ROW,DPTR_KEYreg_num;==
;== if cur_ROW<>1111b then ( )
setb key_pressed;== "-"
anl c_R,#11110000b;== 4 ( D7..D4)
cjne cur_ROW,#11110000b,scan_2_ASCII;//==

;== else ( )
;== if cur_COL<>end_COl then ( )
cjne cur_COL,#end_COL,nxt_COL;== .

;== else ( - )
clr key_pressed;== "-"
;== end if
;== end if
ext:
ret;==
;=====================================================
make_scan_code:
mov a,cur_COL;==
anl a,#0fh;== 00001111 .
mov scan_code,a;== -
mov a,cur_ROW;==
anl a,#0f0h;== 11110000 .
orl scan_code,a;== . . -
ret
;=====================================================
nxt_COL:;== " "
mov a,cur_COL
rl a;== " 0" ( )
mov cur_COL,a
jmp pv;== "0"
;=====================================================
scan_2_ASCII:
call scan_code_2_key_num
jmp ext
;=====================================================
scan_code_2_key_num:
;== -

mov key_num,#0;== . = 0
mov a,scan_code;== . -

74

nc:

rrc a;==
jnc r;== , "0"

inc key_num;== 1
jmp nc;==
r:
mov a,scan_code;== . -
swap a;== (-
)
nr: rrc a;==
jnc ex;== , "0"

inc key_num;== 4
inc key_num
inc key_num
inc key_num
//REPT 4 ;==
//
inc key_num
//ENDM
jmp nr;==
ex: ret;==
;=====================================================
END


.
, , 0 15 (0000000000001111) .
V-5)
ASCII .

ASCII . ASCII
, .
, - ,
key_ASCII. , ,
ASCII 8,
8 ASCII
movc a, @a + DPTR. ,
.
.
, .

75

DSPL ASCII
( DSPL EQU ASCII) .
ASCII .
#### ####
VI)
,
16 , , 4,
. .
.

,
.

76

.
.
#### ####
VII)

(jnb key_pressed, wp;. jb key_pressed,
wu.). , ,
0 ,
-.
( int0 int1).
, 0 intx .

, , .
1.
MCS-51
DST,SRC ,
operand
bit
xrl DST,SRC -
anl DST,SRC -
orl DST,SRC -
clr bit -
setb bit -
cjne mem, #operand, address -
(mem) , .
movx @dptr,a - /
, DPTR.
movx a,@dptr -
jmp address (
LJMP ..,
AJMP SJMP ).
call address address
.
ret ( )

77

reti (
)
push operand
pop operand
inc operand
mov DST,SRC
jnc address , 0
(.. )
rr a (rl a) ()
()
rrc a (rlc a) ()

swap a
movc a, @a + DPTR
DPTR

78

2.

c ,
EPM3064 4 x 4

COLi RG2 ,
() 0111, 1011, 1101, 1110
0111 ..
.
, .

79

, ROWi
3.3 (.1). ,
0 3 COLi
ROWi, .
(4..7)
.
,
,
key_irq. - -
ROWi. key_irq
~INT0 .
()
3.3 .
COLj=1 COLi=0,
.
8-
4 -> 1,
.

80

Yx=Y88
Tochka_Vhoda
3e00
- 2

Yx=Y32
Tochka_Vhoda
5b00
- 3

Yx=Y40
Tochka_Vhoda
25c0
- A

Yx=Y56
Tochka_Vhoda
7a00
- 4

Yx=Y80
Tochka_Vhoda
3d50
- 7

Yx=Y120
Tochka_Vhoda
2a00
- *

Yx=Y72
Tochka_Vhoda
4ee0
- 5

Yx=Y136
Tochka_Vhoda
5d00
- 0

Yx=Y16
Tochka_Vhoda
6AB0
- 8

Yx=Y24
Tochka_Vhoda
44E0
- #

Yx=Y8
Tochka_Vhoda
5E30
- 9

Yx=144
Tochka_Vhoda
2A00
- B

81

1) : ,
,, , RAM, (ALE, #WR, #RD #PSEN).
2) ADuC812.
3) , 24-
RG2. MOVX @DPTR,A MOVX A,@DPTR
( , ).
8.5.1 MK ccea c pe a
RG2.

4)

1) .
.

82

2) :

83

:
.

84

85

Yx=Y88
Tochka_Vhoda
3e00
- 2

Yx=Y32
Tochka_Vhoda
5b00
- 3

Yx=Y40
Tochka_Vhoda
25c0
- A

Yx=Y56
Tochka_Vhoda
7a00
- 4

Yx=Y80
Tochka_Vhoda
3d50
- 7

Yx=Y120
Tochka_Vhoda
2a00
- *

Yx=Y72
Tochka_Vhoda
4ee0
- 5

Yx=Y136
Tochka_Vhoda
5d00
- 0

Yx=Y16
Tochka_Vhoda
6AB0
- 8

Yx=Y24
Tochka_Vhoda
44E0
- #

Yx=Y8
Tochka_Vhoda
5E30
- 9

Yx=144
Tochka_Vhoda
2A00
- B

86

1) : ,
,, , RAM, (ALE, #WR, #RD #PSEN).
2) ADuC812.
3) , 24-
RG2. MOVX @DPTR,A MOVX A,@DPTR
( , ).
8.5.1 MK ccea c pe a
RG2.

4)

3) .
.

87

4) :

88

:
.

89

1. .. : [ ], -
. ; .
; , [. ]. .:
, 2007 . 87 .: . ( .
).
2. ..
ATMEGA 128 68HC908: [ ], -
. ; . ;
, [. ] . .: , 2007 . 107 .:
. ( . )
3. Kae .B. "
",[ ], - .
; . ; ,
[. ]. .: , 2008 . 92 .: .
( . ).
4. http://faculty.ifmo.ru/electron/cons/raspisanie_current.htm

90

2009 ,
12 ,

.


-
, 20092018 .

: ..., . .. .
( )
1945 .
..
,
,
,
, 1938 .,
-
(1946.). .. c 1945 1978 .

50 , .
, 1978 . 1985 . ...,
.. , .. .
1985 . 2006 . ...,
.. ,
.
2006 . ..., ..
,

.

,
,
.

91

..
:
;

;

, ;

;
.

( .. ):

;
600 ;
18

:
;
;
;

.

92

ASM-51

- -
,
.
..
3 00408 05.11.99
_____________
________
____ .

93

-
-
,

197101, -, ., 49