1
PIC18F4520
//: (Catch/Compare/PWM CCP2)
(Enhanced CCP1 ECCP1). 16-
CCPRxH:CCPRxL,
, .
CCPRxH:CCPRxL 16 - Timer1 Timer3, CCPx
. :
4 ;
16 .
CCPRxH:CCPRxL
16- -
Timer1 Timer3. CCPx
:
1;
0;
, .. ( 1
0 0 1);
,
.
- ( PWM) CCPx
CCPx ,
.
- (PWM Pulse-Weight Modulation)
,
,
( ). -
kZ . 1.
U
TP
k Z = 0.25
TDC
kZ = 0.5
kZ = 0.75
kZ = 0.95
. 1
(,
, ). ,
. , ,
. ,
. -
( , ),
( ), .
2 2 PWM
2
[1].
PWM. PWM .
2.
CCPR2L
CCP2CON
<5:4>
10
CCPR2H (Slave)
int Latch
<2:1>
Trigger
R
Cmp 1
TMR2
<*>
CCP2
TRISC<1>
TRISB<3>
Cmp 2
8
*
PR2
10-
TMR2
. 2 2 PWM
:
.
8- PR2.
, . ,
. PR2 (1):
PR 2 =
TP
1
4 TOSC K TMR 2 PR
(1)
PR2
, TOSC = 1 / FOSC
- Timer2,
PWM.
(Duty Cycle). :
I 10- CCPR2L:CCP2CON<5:4>,
.
,
. ,
CCPR2L:CCP2CON<5:4>
.
,
;
II 10-
CCPR2H:intLatch<2:1> (intLatch 2 ), ,
.
.
TDC
CCPR2L:CCP2CON<5:4> (2):
CCPR 2 L : CCP 2 CON < 5 : 4 >=
TDC
TOSC K TMR 2 PR
(2)
, ,
CCP2 . ,
(2) TDC = TP. ,
,
. ( )
(3):
RES PWM =
log ( FOSC TP )
[ bits]
log ( 2 )
(3)
, PWM,
. ,
,
210 .
CCPR2L:CCP2CON<5:4> 10 .
Timer2 , .
3 CCP2 PWM
CCP2 PWM - Timer2.
TMR2 , F+1 = FOSC / KTMR2 PR.
PWM CCPR2L:CCP2CON<5:4>
CCPR2H:intLatch<2:1>. TMR2
Cmp1. ( )
.
, ,
(TRISx = 0) CCP2 . , 0.
, PR2 , TMR2.
Cmp2 (
), .
TMR2
.
CCP2. , 1. CCP2
. 3.
TP
T DC
TMR2 = PR2
TMR2 = PR2
TMR2 = CCPR2H:CCP2CON<5:4>
. 3 CCP2
4
CCP2 CCP2CON.
CCP2CON . 1.
1 CCP2CON: CCP2 CONTROL REGISTER
<7>
<6>
DC2B1
<5>
DC2B0
<4>
CCP2M3
<3>
CCP2M2
<2>
CCP2M1
<1>
CCP2M0
<0>
7-6 PIC18F4520, 0
5-4 DC2B1-DC2B0: <1> <0> PWM
:
:
PWM:
3-0 CCP2M3-CCP2M0: CCP2
0000 CCP2
0001
0010 , CCP2
0011
0100
0101
0110 4
0111 16
1000 , CCP2 0 1
1001 , CCP2 1 0
1010 ,
1011 ,
11 PWM
, CCP2
PORTC<RC1> PORTB<RB3>.
/ CCP2MX. ,
CCP2MX = 1, CCP2 PORTC<RC1>.
(TRISC<1> = 0 TRISB<3> = 0)
5 CCP2 PWM
CCP2 PWM,
:
1. PR2 PWM.
2. CCPR2L:CCP2CON<5:4> .
3. CCP2 TRISx.
4. - Timer2:
(T2CON<T2CKPS1:T2CKPS0>);
- T2CON<TMR2ON>.
5. PWM (CCP2CON).
6 CCP2 PWM.
// .
, ( MPASM)
(- MCC18).
. 4.
PG
PGD
1
MPLAB ICD 2
DD2
VPP/MCLR
VDD
+5B
MCLR
VSS
R1
4,7
DD1
+5B
V DD
VSS
PGD
40
PGC
39
R2 270
+5B
11
VDD
12
V SS
13
OSC1
OSC
FOSC
MCU
RC1
16
RA0
HL2
+5B
R3 10
. 4
:
DD1
DD2
HL1
R1
R2
R3