DEPART

K. L. E. Society B.V. Bhoomaraddi College of Engineering & Technology, Hubli 31 DEPARTNMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING Effective from 27/08/2012
9 -10 SVS PDC-SVB ALK AE-LAB(A1)-HMR+RBS+MBP PDC-LAB(A2)- RM + AK+APP DS-LAB(A3)- AB+VSE+RVG AEC-RSH T&S-SAH T-2 DSC++-SBPT6 CTT-SMP SBS-FCMOSECC201 AEC-NCI PDC-SVS EMW-HMR CTT-SMP CCN-HMK ECC201 CA-SSK 1010.15 10.15-11.15 11.15-12.15 12.151.30 1.30-2.30 2.30-3.30

FMEC0301

DAY

Sem /Time I BE III A III B VA VB VII A VII B PG-I DE PG-III - DE PG-I VDT PG-IIIVDT I III A

8-9

3.30-4.30 UBP SVB MAT MAT

MON

AE-LAB(B1)-AK+RSH+MBP PDC-LAB(B2)-SMP+VH+APP DS-LAB(B3)-AB+ VSE +RVG AuP-SBP FCMOS-SBS AuP-LAB(B1)-RM +SAH+SDK C&DSP-LAB(B2)-SSP+RK+AMS CIPE&EVS-T6 AuW-PK-T6 T&W-KMRCCN-HMK ECC105 ECC105 ACA-BLD MC-UKM VLSI Technology (RBS) IC Characterization (PVA)

AuP-LAB(A1)-RSH+HMR+SDK C&DSP-LAB(A2)-RM+SAH+APP FCMOS-SBS CCN-LAB(A1)-HMK+ AB+MVT M&A-LAB(A2)-SSP+ AK+AMS

AVLSI AVN (ECC201) RSJ (ES) T-2 AN ALK (ECC104) ADN-SBH SSM-PK CMOS VLSI Design (SSE) SOC Verification and Testing (SRH) UBP SBH VSE

CMOS VLSI DESIGN - RBS MINOR MINOR PROJECT PROJECT ASIC Course Project (SRH) ASIC Course Project (SRH) Minor Project ALK SVS SS COMPONENT REVIEW AE-LAB(B4)-RSH+RSJ+MBP PDC-LAB(B5)-SSP+VSE+APP DS-LAB(B1)- SBP+ AK+RVG DSP-RK EMW-HMR T&W-KMR CCN-HMK ECC201 ECC201 CCN-HMK CCN-LAB(B1)- AB+ VH +MVT ECC105 M&A-LAB(B2)-+RK+ KMR +AMS N&S LAB SBH +NCI Ad-uC- AVN MINOR PROJECT System Design Lab System Design Lab (PVA + SRH) (PVA + SRH) SOC Verification and Testing (SRH) ALK (SI) SVS UBP SBH CA-SSK

TUE

AE-LAB(A4)- AK+ HMR +MBP PDC-LAB(A5)- SBP + RM +APP DS-LAB(A1)-SAH+ SBH +RVG DS-UKM AEC-RSH

PDC-SVB CA-SSK AuP-LAB(A5)- VH +RM+SDK C&DSP-LAB(A1)-VSE+ AK+APP CTT-SMP AuP-RSH CCN-LAB(A3)-HMK+ AB+MVT M&A-LAB(A4)-SSP+SAH+AMS M&A-RSJ T&W-KMR T2 T2 LA-MARALI MC-UKM VLSI Technology (RBS ) IC Characterization (PVA)

III B VA VB VII A VII B PG-I DE PG-III - DE PG-I VDT PG-IIIVDT I AuP-LAB(A3)-SBS+ AB+SDK C&DSP-LAB(A4)-SMP+RK+AMS DSP-UBP OS-BLD ECC104 C&NS VH (T2) LA-MARALI SSM-PK CMOS VLSI Design (SSE) Design for Test (SRH) SSK (SI) VSE MAT III B MAT VA VB VII A VII B PG-I DE PG-III - DE PG-I VDT PG-IIIVDT I III A FCMOS-SBS PDC-SVS EMW-HMR DS-UKM T&S-SAH T-2 DSC++-SBPT6 CTT-SMP ECC104 EMW-HMR ECC201 SVB DS-RMB AE-LAB(A2)-RK+ AK+MBP PDC-LAB(A3)- AB+RM+APP DS-LAB(A4)-SBH+SBS+RVG

WED

III A

AEC-NCI

AE-LAB(B2)- SBS+HMR+MBP PDC-LAB(B3)-VSE+ RM+APP DS-LAB(B4)-AB+SAH+RVG DSP-RK AuP-SBP PROJ-REVIEW AuP-RSH CTT-SMP

AuP-LAB(B3)- AB+ RK +SDK C&DSP-LAB(B4)- VH +RM+MBP T&W-KMR CCN-HMK T-6 T-6 CCN-LAB(B3)-SMP+ AK+MVT M&A-LAB(B4)-RSJ+SSP+AMS ACA-BLD Ad-uC- AVN AMMC (SSE) SOC Verification and Testing (SRH) SBH SSK (SI) AE-LAB(A5)-SAH+AK+MBP PDC-LAB(A1)-ALK+HMK+APP DS-LAB(A2)-RM+SSP+RVG PDC-SVS

AVLSI AVN (ECC104) RSJ (ES) T-2 AN ALK (ECC201) C&NS - NCI SSM-PK ASIC Design (SRH) Minor Project SVS AEC-NCI AEC-RSH CA-SSK FCMOS-SBS ALK SVB

CCN-LAB(A5)-HMK+ VH +MVT M&A-LAB(A1)- KMR +SSP+AMS MWA-RSJ ECC105 LA-MARALI MINOR PROJECT Analog and Mixed Mode Lab Analog and Mixed Mode Lab (SSE +PVA) (SSE +PVA) IC Characterization (PVA) VSE DS-RMB AE-LAB(B5)- RSH+ RM +MBP PDC-LAB(B1)-ALK+ SSP +APP DS-LAB(B2)-SBP+ RK +RVG EMW-HMR CTT-SMP DSP-UBP MWA-PK ECC105 CCN-LAB(B4)- AB+VH+MVT M&A-LAB(B1)- RSJ+ KMR +AMS C&NS - NCI MINOR PROJECT APA (Self Study) Minor Project PROJ-REVIEW MAT MAT

THU

III B VA VB VII A VII B PG-I DE PG-III - DE PG-I VDT PG-IIIVDT AuP-LAB(A2)- AB+VSE+SDK C&DSP-LAB(A3)-+SMP+RK+AMS FCOMS-SBS EMW-HMR OS-BLD ECC104 C&NS VH (ECC105) CIPE & EVS ECC104 MWA-RSJ T-2 LA-MARALI MINOR PROJECT APA (PVA) Minor Project

DSP-RK

AuP-LAB(B2)-SBP+RM+SDK C&DSP-LAB(B1)-SSP+AK+MBP CCN-LAB(A2)-SMP+VH+MVT M&A-LAB(A3)-RSJ+ KMR+AMS CIPE & EVS CCN-HMK T-6 T-6 ADN-SBH MC-UKM AMMC (SSE) Design for Test (SRH)

DEPART

K. L. E. Society B.V. Bhoomaraddi College of Engineering & Technology, Hubli 31 DEPARTNMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING Effective from 27/08/2012

FMEC0301

FRI

I III A MAT III B VA VB VII A VII B PG-I DE PG-III - DE PG-I VDT PG-IIIVDT I

ALK CA-SSK AE-LAB(A3)-RK+HMR+MBP PDC-LAB(A4)-SBS+ KMR+APP DS-LAB(A5)-RM+VSE+RVG CA-SSK AEC-RSH T&S-SAH T-2 CTT-SMP DSC++-SBPECC201 T6 DSP-UBP AN ALK (ECC104) RSJ (ES) T-2 AVLSI AVN (ECC201) ACA-PK MINOR PROJECT APA (PVA) Design for Test (SRH)

SVB

SBH DS-RMB (ECC104) SS COMPONENT REVIEW DSP-RK

MAT DS-UKM AuP-LAB(A4)-VSE+VH+SDK C&DSP-LAB(A5)-UBP+SAH+APP CTT-SMP AuP-RSH T&W-KMR T-2 CCN-LAB(B2)-HMK+AB+RVG M&A-LAB(B3)- AK+RK+AMS CMOS VLSI DESIGN - RBS MINOR PROJECT ASIC Design (SRH) Minor Project UBP (BE) VSE ALK (SI) CA-SSK (ECC105) AE-LAB(B3)- SBS + AK+MBP PDC-LAB(B4)- VH+ KMR+APP DS-LAB(B5)-RM+ SBH+RVG AuP -LAB-B4-SBP+SAH+SDK C&DSP -LAB-B5-SSP+ RK+AMS OS-BLD ECC104 CIPE&EVS ECC104 MINOR PROJECT

AuP-SBP

AuP-LAB(B5)RSH+ AB+SDK C&DSP-LAB(B3)-AK+VSE +MBP CCN-LAB(A4)-HMK+ SSP +RVG C&NS M&A-LAB(A5)-SBP+RSJ+AMS VH (ECC201) T&W-KMR ECC201 CMOS VLSI LAB RBS+HMR Ad-uC- AVN CMOS VLSI Design (Self Study) AMMC (Self Study) Minor Project

SAT

III A III B VA VB VII A VII B PG-I DE PG-III - DE PG-I VDT PG-III VDT

CLASS ROOMS III A ECC104 III B ECC105 V A T-2 V B -- T-6 VII SEM AS MENTIONED

NOTE: BIG + VMG should provide components for all the Labs
V-SEM- MINI PROJECT WEDNSDAY (3:30PM-5:30PM) UKM +ALK+HMK+SMP+ RK +AMS RMB + SSK+VSE+SSP+ SAH+AMS RBS+SVS+KMR+UBP+ SBS+AMS PK+SVB+HMR+RSJ+ RM+AMS NCI+RSH+SBH+SBP+ VH+ASM VII-SEM- CAPSTONE PROJECT THURSDAY (3:30PM-5:30PM) RMB+RSH+SMP+SAH+VH+RVG NCI+SVB+UBP+SBP+RK+RVG PK+RBS+RJ+HMR+HMK+RVG UKM+ALK+SSK+SSP+SBS+RVG SVS+AVN+SBH+KMR+VSE+RVG IIIA TUESDAY (1:30-4:30)PM IIIB FRIDAY (1:30-4:30)PM SS-COMPONENT CA SSK + SBS + MBP PDC SVB + SMP + MBP SVS + SAH + MBP DS RMB + UKM + RM + MBP

C1 C2 C3 C4 C5

Prepared by: Verified by: Approved by:

.. Name

.. Signature

. .. . Date