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A

LONGBEACH 10/20
LA-2371 REV
1.0 Schematic

Portability Prescott/Northwood
3

RC300ML(RX300ML)+IXP150+ATI M11P(128MB VRAM)


2004-07-23

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size
Document Number
Custom

R ev
1.0

LA-2371

Date:

, 27, 2004

Sheet
E

of

56

Compal confidential

BLOCK DIAGRAM

Model Name : EFQ00 & EEQ00


File Name : LA-2371 Rev: 1.0
4

Northwood-MT
Prescott-MT
(uFCPGA-478)
page 24

PAGE 5

PAGE 16

CPU VID
PAGE 51

page 24

FSB

533MHz
266/333MHz
(2.5V)

TV-OUT Conn.&CRT CONN.


page 23,24
W/INT VGA

W/EXT VGA CHIP

533MHz(0.8V)

ATI-M11P/M10C

Clock Generator
ICS951402AGT

PAGE 4,5,6

LCD Conn 2

LCD Conn 1

Thermal Sensor
ADM1032

AGP 8X BUS

page 17,18,19,20

ATI-RC300ML
(ATI-RX300ML)

SO-DIMM x2(DDR)

Memory Bus

BANK 0,1,2,3

VGA M9 Embeded
868 pin u-BGA

VGA DDR x2 CHA

page 22

page 21

480MHz(5V)

A-Link

66MHz(3.3V)

Mini PCIx2

Primary
ATA-100 (5V)

RJ-45
PAGE 29

Port 1
PAGE 34

Slot 0

PAGE 29

RTC Battery

PAGE 25

DC/DC Interface

PAGE 43

LID/Kill Switch
Power Buttom&
LED & Hibernation

USB 2.0 Port *3


0, 1, 2
PAGE 39

PAGE 42

DCIN&DETECTOR

PAGE 45

BATT CONN/OTP

PAGE 46

CHARGER

PAGE 47

3V/5V/12V

PAGE 48

DDR_2.5V/1.25V

PAGE 49

1.8V/VGA_CORE

PAGE 50

IDE HDD
PAGE 39

PAGE 32,33

LAN
RTL8100CL

PAGE 24

PAGE 13,14,15

PAGE 7,8,9,10,11,12

VGA DDR x2 CHB

FAN Controller

Secondary
ATA-100 (5V)
PCI BUS
33MHz (3.3V)

ATI-IXP150

PAGE 39

BGA 457 pin

IEEE1394
VT6301S

AC-LINK
24.576MHz(3.3V)

PAGE 34

IDE ODD

PAGE 25,26,27,28

AC97 CODEC
ALC 250

HW EQ CKT

PAGE 35

PAGE 37

CARDBUS

PAGE 31

ENE CB714/ENE CB1410

MDC
Connector

LPC BUS 33MHz (3.3V)

PAGE 30

PAGE 44

Audio Amplifier
TPA6010A4

CPU_CORE

PAGE 36

5IN1 Conn

PAGE 51,52,53

PAGE 31

CB PWR SW
ENE CP2211

PAGE 31

Super I/O
LPC47N217
REV B

Embedded
Controller

Direct CD play BTN&TP CONN.

CIR Circuit
PAGE44

PAGE 41

ENE KB910

PAGE 39

PAGE 40

Serial port
PAGE 39

Scan KB
PAGE 40

BIOS(1M)
& I/O PORT
PAGE 41

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size
Document Number
Custom
LA-2371
Date:

R ev
1.0

, 27, 2004

Sheet
E

of

56

Voltage Rails

Power Plane

Description

S1

S3

S5

VIN

Adapter power supply (19V)

ON

ON

ON

B+

AC or battery power rail for power circuit.

ON

ON

ON

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

+CPUVID

1.2V switched power rail for CPU AGTL Bus

ON

OFF

OFF

+VGA_CORE

1.0V/1.2V switched power rail for VGA chip

ON

OFF

OFF

+1.25VS

1.25V switched power rail

ON

OFF

OFF

+1.5VS

AGP 4X/8X

ON

OFF

OFF

+1.8VS

1.8VS switched power rail

ON

OFF

OFF

+2.5VALW

2.5V always on power rail

ON

ON

ON*

+2.5V

2.5V power rail

ON

ON

OFF

+2.5VS

2.5V switched power rail

ON

OFF

OFF

+3VALW

3.3V always on power rail

ON

ON

ON*

+3V

3.3V power rail

ON

ON

OFF

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON*

+5VS

5V switched power rail

ON

OFF

OFF

+12VALW

12V always on power rail

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

SIGNAL

STATE

SLP_S3# SLP_S5#

+VALW

+V

+VS

Clock

HIGH

HIGH

ON

ON

ON

ON

HIGH

HIGH

ON

ON

ON

LOW

S3 (Suspend to RAM)

LOW

HIGH

ON

ON

OFF

OFF

S4 (Suspend to Disk)

LOW

HIGH

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

ON

OFF

OFF

OFF

Full ON
S1(Power On Suspend)

Board ID Table for AD channel


Vcc
Ra
Board ID

0
1
2
3
4
5
6
7

3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices


Device

IDSEL#

REQ#/GNT#

AD16

VGA

PIRQA

Car dBus

AD20

PIRQA

LAN

AD19

PIRQD

Mini-PCI1

AD18

1(for Wireless Lan)

PIRQC/PIRQD

1 394

AD16

PIRQA

5IN1

AD20

PIRQB

AD22

4(for TV turner)

PIRQC/PIRQD

Mini-PCI2

Board ID
0
1
2
3
4
5
6
7

Interrupts

PCB Revision
0.1

SKU ID Table for AD channel


EC SM Bus1 address
Device

Address

Device

Address

Smart Battery

0001 011X b

ADM1032

1001 110X b

EEPROM(24C16/02)
(24C04)

Vcc
Ra

EC SM Bus2 address

Board ID

0
1
2
3
4
5
6
7

1010 000X b
1011 000Xb

IXP150 SM Bus address


Device

Address

Clock Generator
(ICS951402AGT)

1101 001Xb

DDR DIMM0

1010 000Xb

DDR DIMM2

1010 001Xb

3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

BIOS_ID: H EFW00
L EEW00

Compal Electronics, Inc.


Title

Notes
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size
Document Number
Custom

R ev
1.0

LA-2371

Date:

, 27, 2004

Sheet
E

of

56

A10
A12
A14
A16
A18
A20
A8
AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19
B7
B9
C10
C12
C14
C16
C18
C20
C8
D11
D13
D15
D17
D19
D7
D9
E10

+CPU_CORE

H_REQ#[0..4]

H_ADS#

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADS#

J1
K5
J4
J3
H3
G1

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
ADS#

H_IERR#

AC1
V5
AA3
AC3

AP#0
AP#1
BINIT#
IERR#

H6
D2
G2
G4

BR0#
BPRI#
BNR#
LOCK#

AF22
AF23

BCLK0
BCLK1

+CPU_CORE

R559 1
1
+CPU_CORE
R120

2 51_0402_5%
2
51_0402_5%

7
7
7
7

H_BR0#
H_BPRI#
H_BNR#
H_LOCK#

16
16

CLK_BCLK
CLK_BCLK#

F3
E3
E2

POWER

HOST
ADDR

Northwood-MT
Prescott-MT

CLK

CON
TROL

GND

HIT#
HITM#
DEFER#

FOX_PZ47803-274A-42_Prescott

H1
H4
H23
H26
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8

HOST
ADDR

CONTROL

VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55

7
H_HIT#
7
H_HITM#
7 H_DEFER#

CLK_BCLK
CLK_BCLK#

H_D#[0..63] 7

POWER
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74

H_REQ#[0..4]

A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

BOOTSELECT

K2
K4
L6
K1
L3
M6
L2
M3
M4
N1
M1
N2
N4
N5
T1
R2
P3
P4
R3
T2
U1
P6
U3
T4
V2
R6
W1
T5
U4
V3
W2
Y1
AB1

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8
D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

B21
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

F13
F15
F17
F19
F9
F11
E8
E20
E18
E16
E14
E12

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

AD1

H_A#[3..31]

VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73

JCPU1A
7

+CPU_CORE
2

1
R542
0_0402_5%

R_C

H_BOOTSELECT 51

1
2
R533
@0_0402_5%
@

Pop: Northwood
Depop: Prescott

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Prescott Processor in uFCPGA478 (1/2)


Size
Document Number
Custom

R ev
1.0

LA-2371

Date:

, 28, 2004

Sheet
1

of

56

H_SKTOCC#

H_GHI#

2
2

H_RESET#
51_0402_5%

25
25
25
7

ITP_TMS
ITP_TRST#
ITP_TCK
ITP_TDI

8
7
6
5

H_TRDY#

H_TRDY#

H_A20M#
C6
H _FERR#
B6
H_IGNNE#
B2
H_SMI#
B5
H_PWRGOOD AB23
H_STPCLK#
Y4

25 H_A20M#
25 H_FERR#
25 H_IGNNE#
25 H_SMI#
25 H_PWRGOOD
25 H_STPCLK#

JTAG PULL DOWN

RP1

H_INTR
H_NMI
H_INIT#
H_RESET#

7
H_DBSY#
7
H_DRDY#
12,16
BSEL0
12,16
BSEL1

1K_8P4R_1206_5%

Close to the CPU

F1
G5
F4
AB2
J6

6 H_THERMTRIP#

R562
R537
R551
R540
R558
R548
C

1
1
1
1
1
1

H_D BSY#
H_D RDY#

H5
H2
AD6
AD5

DBSY#
DRDY#
BSEL0
BSEL1

B3
C4

Note: Please change to 10uH, DC current


of 100mA parts and close to cap
+CPU_CORE

A2

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

AC6
AB5
AC4
Y6
AA5
AB4

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

ITP_TCK
ITP_TDI

D4
C1
D5
F7
E6

TCK
TDI
TDO
TMS
TRST#

ITP_TMS
ITP_TRST#
L19
1

LQG21F4R7N00_0805
2

51
51
LQG21F4R7N00_0805
2

VCCSENSE
VSSSENSE
+CPU_VID

2 Trace >= 25mils

L18
1

AD20
AE23

H_VCCA

C272

H_VSSA

1
R601

THERMTRIP#

2 VCCVIDLB
0_0402_5%

A5
A4
AF3
AD22

VSSA

1
DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

F21
J23
P23
W23

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

ADSTB#0
ADSTB#1

L5
R5

H_ADSTB#0
H_ADSTB#1

MISC

ITP
CLK

GROUND

CLK_ITP

R565 1

2 @100K_0402_0.5%

CLK_ITP#

FOX_PZ47803-274A-42_Prescott

R543

2 56_0402_5%

H_TESTHI8
H_TESTHI9
H_TESTHI10
H_GHI#
H_DPSLPR#

R526
R531
R564
R70
R557

1
1
1
1
1

2
2
2
2
2

56_0402_5%
56_0402_5%
56_0402_5%
300_0402_5%
56_0402_5%

H_DSTBN#[0..3] 7

H_DSTBP#[0..3]

H_DSTBP#[0..3] 7

H_ADSTB#0 7
H_ADSTB#1 7

PROCHOT#
MCERR#
SLP#

C3
V6
AB26

H_PROCHOT#

NC1
NC2
NC3
NC4
NC5

A22
A7
AF25
AF24
AE21

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

7
7
7
7
R64
1

+CPU_CORE
H_PROCHOT# 26,50
H_SLP#

25

+CPU_VID
C629
0.1U_0402_10V6K

RE
Pop: Prescott
Depop: Northwood

R_E
+CPU_VID

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5

H_TESTHI2_7

130_0402_5%
2

51
51
51
51
51
51

2 56_0402_5%
2 56_0402_5%

AE25

Trace >= 25mils

2 @100K_0402_0.5%

1
1

DBR#

MISC

+CPU_CORE

R560
R550

E21
G25
P26
V21

R544 1

@ @0_0402_5%
2

H_TESTHI0
H_TESTHI1

DBI#0
DBI#1
DBI#2
DBI#3

MISC

COMP0
COMP1

61.9_0603_1%
R518

61.9_0603_1%
R508

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

ADDR

F8
G21
G24
G3
G6
J2
J22
J25
J5
K21
K24
K3
K6
L1
L23
L26
L4
M2
M22
M25
M5
N21
N24
N3
N6
P2
P22
P25
P5
R1
R23
R26
R4
T21
T24
T3
T6
U2
U22
U25
U5
V1
V23
V26
V4
W21
W24
W3
W6
Y2
Y22
Y25
Y5

2.H_VCCIOPLL,HVCCA,HVSSA trace wide


12 mils(min)

L24
P1

COMP0
COMP1

1.Place cap within 600 mils of


the VCCA and VSSA pins.

ITP_CLK0
ITP_CLK1

PLL Layout note :

E22
K22
R22
W22

DATA

VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181

Pop: Prescott
Depop: Northwood

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

DATA

VCCSENSE
VSSSENSE
VCCVIDLB

R_G

Pop: Northwood
Depop: Prescott

H_DSTBN#[0..3]

Northwood-MT
Prescott-MT

ITP

33U_D2_8M_R35
CLK_ITP AC26
CLK_ITP# AD26

AE26

MISC

VCCIOPLL
VCCA

R567
1

AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3
A6
AD25

ITP

C226

220P_0402_50V7K

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8
TESTHI9
TESTHI10
TESTHI11
TESTHI12

MISC
THER
MAL

CPU_GHI# 26

Place decoupling cap 220PF near CPU.


1

OPTIMIZED/COMPAT#

LEGACY

THERMDA
THERMDC

+CPU_GTLREF

AA21
AA6
F20
F6

GTLREF0
GTLREF1
GTLREF2
GTLREF3

REF

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#
LINT0
LINT1
INIT#
RESET#

H_THERMTRIP#

51_0402_5%
51_0402_5%
51_0402_5%
51_0402_5%
51_0402_5%
51_0402_5%

2
2
2
2
2
2

CON
TROL

D1
E5
W5
AB25

J26
K25
K26
L25

DP#0
DP#1
DP#2
DP#3

GROUND

H_INTR
H_NMI
H_INIT#
H_RESET#

H_THERMDA
H_THERMDC
+CPU_CORE

RS#0
RS#1
RS#2
RSP#
TRDY#

SKTOCC#

1
R523

H_RS#0
H_RS#1
H_RS#2

2
0_0402_5%

VCCVID

H_PWRGOOD
300_0402_5%

Place near CPU

1
2
3
4

R69
R570
@0_0402_5%

AF4

H_RS#[0..2]

VIDPWRGD

1
R536

AD2

H_THERMTRIP#
56_0402_5%

VID0
VID1
VID2
VID3
VID4
VID5

H_RS#[0..2]

AE5
AE4
AE3
AE2
AE1
AD3

1
R481

VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128

JCPU1B

AF26

AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B20
B23
B26
B4
B8
C11
C13
C15
C17
C19
C2
C22
C25
C5
C7
C9
D10
D12
D14
D16
D18
D20
D21
D24
D3
D6
D8
E1
E11
E13
E15
E17
E19
E23
E26
E4
E7
E9
F10
F12
F14
F16
F18
F2
F22
F25
F5

+CPU_CORE

R600
680_0603_5%
1
2
H_VID_PWRGD

GTL Reference Voltage

VID PWRGD Circuit

Layout note :
+3V

+3VS

1. Place R_A and R_B near CPU (Within 1.5").


2. +CPU_GTLREF Trace wide 12mils(min),Space 15mils

+3VS

VID PULL HIGH

+3VS

Thermal Sensor

R553
H_DPSLPR#

+CPU_CORE
4.7K_0402_5%
R517
10K_0402_5%

0.1U_0402_16V4Z

D-

35,40 EC_SMB_CK2

SCLK

35,40 EC_SMB_DA2

SDATA

ALERT#

THERM#

GND

U40B
H_VID_PWRGD 6

1
R513

2
0_0402_5%

ENLL

51

25,51 PM_STPCPU#

Q55
MMBT3904_SOT23

R535

4.7K_0402_5%

Q54
MMBT3904_SOT23

2
3

VDD1

R158
100_0402_1%

R_A

H_VID5
H_VID4

1
R561
1
R555

H_VID3
H_VID2
H_VID1
H_VID0

5
6
7
8

+CPU_GTLREF

R153

R_B

SN74LVC125APWLE_TSSOP14

ADM1032ARM_RM8

169_0402_1%

2
1K_0402_5%
2
1K_0402_5%

RP44

4
3
2
1

1K_8P4R_1206_5%

H_THERMDC

D+

VID_PWRGD 51

U36

OE#

2200P_0402_50V7K

C477
R479
@10K_0402_5%

1
C471

C470
0.1U_0402_16V4Z

H_THERMDA

C207
1U_0603_10V4Z

Compal Electronics, Inc.


Title

+3V POWER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Prescott Processor in uFCPGA478 (2/2)


Size
Document Number
Custom

R ev
1.0

LA-2371

Date:

, 28, 2004

Sheet
1

of

56

Place 11 North of Socket(Stuff 8)


+CPU_CORE

C146
22U_1206_10V4Z

C145
22U_1206_10V4Z

C154
22U_1206_10V4Z

C147
22U_1206_10V4Z

C148
22U_1206_10V4Z

C149
22U_1206_10V4Z

C188
22U_1206_10V4Z

C199
22U_1206_10V4Z

C209
22U_1206_10V4Z

C56
22U_1206_10V4Z

C221
22U_1206_10V4Z

22uF depop reference


Springdale Customer Schematic R1.2 page82
Place 8 Inside Socket For Prescott CPU(Stuff all)

+CPU_CORE

C478

C488

2
10U_0805_10V4Z

C500

2
10U_0805_10V4Z

C531

2
10U_0805_10V4Z

C499

2
10U_0805_10V4Z

C505

2
10U_0805_10V4Z

C533

2
10U_0805_10V4Z

C479

2
10U_0805_10V4Z

2
10U_0805_10V4Z

+CPU_CORE

C225
22U_1206_10V4Z

C227
22U_1206_10V4Z

C224
22U_1206_10V4Z

C223
22U_1206_10V4Z

C208
22U_1206_10V4Z

C198
22U_1206_10V4Z

Decoupling Reference Document:


Springdale Chipset Platform Design guide Rev1.11
(12474)page239

+CPU_CORE

Place 9 South of Socket(Unstuff all)


1

C187
22U_1206_10V4Z

C55
22U_1206_10V4Z

C52
22U_1206_10V4Z

C54
22U_1206_10V4Z

C53
22U_1206_10V4Z

C58
22U_1206_10V4Z

Decoupling Reference Requirement:


560uF Polymer, ESR:5m ohm(each) * 10
22uF X5R * 32

C57
22U_1206_10V4Z

+CPU_CORE

+
2

1
+
C463
220U_6SVPC220MV_6.3VM_R15

1
+
C468
220U_6SVPC220MV_6.3VM_R15

C465
220U_6SVPC220MV_6.3VM_R15

+CPU_CORE

+CPU_CORE

C636
220U_6SVPC220MV_6.3VM_R15

1
R475
470_0402_5%
2

1
+
C466
220U_6SVPC220MV_6.3VM_R15

Q50
MMBT3904_SOT23

1
+
C467
220U_6SVPC220MV_6.3VM_R15

0.1U_0402_16V4Z

1
+
C641
220U_6SVPC220MV_6.3VM_R15

1
+

45,46,48 MAINPWON

+CPU_CORE

1
+
2

1
+
C642
220U_6SVPC220MV_6.3VM_R15

1
+

C637
220U_6SVPC220MV_6.3VM_R15

1
+
C640
220U_6SVPC220MV_6.3VM_R15

1 C461

C464
220U_6SVPC220MV_6.3VM_R15

Q51
MMBT3904_SOT23

2 1

R482
330_0402_5%
2

H_THERMTRIP#

H_THERMTRIP# 5

*01

C638
220U_6SVPC220MV_6.3VM_R15

+CPU_CORE

1
+
2

C639
220U_6SVPC220MV_6.3VM_R15
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

CPU Decoupling
Size
Document Number
CustomLA-2371
Date:

R ev
1.0

, 28, 2004

Sheet
1

of

56

H_A#[3..31]

H_A#[3..31] 4

H_REQ#[0..4]

H_REQ#[0..4] 4

H_D# [0..63]

H_D#[0..63] 4

CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#
CPU_ADSTB0#

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_ADSTB#1

U30
T30
R28
R25
U25
T28
V29
T26
U29
U26
V26
T25
V25
U27
U28
T29

CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_ADSTB1#

H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DR DY#
H_DBSY#
H_BR0#
H_LOCK#

L27
K25
H26
J27
L26
G27
F25
K26

CPU_ADS#
CPU_BNR#
CPU_BPRI#
CPU_DEFER#
CPU_DRDY#
CPU_DBSY#
CPU_BR0#
CPU_LOCK#

H_RESET#
H_RS#2
H_RS#1
H_RS#0

A17
G25
G26
J25

CPU_CPURSET#
CPU_RS2#
CPU_RS1#
CPU_RS0#

H_TRDY#
H_HIT#
H_HITM#

F26
J26
H25

CPU_TRDY#
CPU_HIT#
CPU_HITM#

NB_SUS_STAT#_A
NB_RST#_A

A9
AH5
AG5
C7

CPU_RSET
SUS_STAT#
SYSRESET#
POWERGOOD

2 24.9_0402_1% COMP_N

V28

CPU_COMP_N

R193 1
2 49.9_0402_1% COMP_P
L44
CPVDD
1
2
C532
HB-1M2012-121JT03_0805
1
2CPVSS
@1U_0603_10V4Z
1
2
10U_0805_10V4Z
C543

W29

CPU_COMP_P

H23

CPVDD

J23

CPVSS

RB751V_SOD323

R788
1

17,25,40 NB_RST#

NB_RST#_A

270K_0402_5%

0.1U_0402_10V6K
C484
2
1
R503
1
330_0402_5%

H_ADSTB#1

4
4
4
4
5
5
4
4

H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
H_BR0#
H_LOCK#

5
5
5
5

H_RESET#
H_RS#2
H_RS#1
H_RS#0

5
4
4

H_TRDY#
H_HIT#
H_HITM#

9,24,28 NB_PWRGD

L
B

Note: PLACE CLOSE TO RC300M,


USE 10/10 WIDTH/SPACE
+CPU_CORE

+CPU_CORE

+1.8VS

R574

R188 1

**

100_0402_1%

DATA GROUP 1

ADDR. GROUP 0

CPU_VREF

Y29
Y28

THERMALDIODE_N
THERMALDIODE_P

B17

TESTMODE

NB_GTLREF

W28

DATA GROUP 2

D60

DATA GROUP 3

ADDR. GROUP 1

R787
330K_0402_5%

R576
169_0402_1%

C575
1U_0603_10V4Z

C576
220P_0402_50V7K

R115

1
1

CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#
CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#
CPU_DBI0#
CPU_DSTBN0#
CPU_DSTBP0#

L30
K29
J29
H28
K28
K30
H29
J28
F28
H30
E30
D29
G28
E29
D30
F29
E28
G30
G29

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DINV#0
H_DSTBN#0
H_DSTBP#0

CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#
CPU_DBI1#
CPU_DSTBN1#
CPU_DSTBP1#

B26
C30
A27
B29
C28
C29
B28
D28
D26
B27
C26
E25
E26
A26
B25
C25
A28
D27
E27

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DINV#1
H_DSTBN#1
H_DSTBP#1

CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#
CPU_DBI2#
CPU_DSTBN2#
CPU_DSTBP2#

F24
D24
E23
E24
F23
C24
B24
A24
F21
A23
B23
C22
B22
C21
E21
D22
D23
E22
F22

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DINV#2
H_DSTBN#2
H_DSTBP#2

CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#
CPU_DBI3#
CPU_DSTBN3#
CPU_DSTBP3#

B21
F20
A21
C20
E20
D20
A20
D19
C18
B20
E18
B19
D18
B18
C17
A18
F19
E19
F18

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DINV#3
H_DSTBN#3
H_DSTBP#3

PENTIUMAGTL+ I/F
IV

NB_SUS_STAT#_A

CONTROL

2
1

RB751V_SOD323

MISC.

H_ADSTB#0

R786
27K_0402_5%

R785
27K_0402_5%
D59
26 NB_SUS_STAT#

+1.8VS

+2.5V

PART 1 OF 6

M28
P25
M25
N29
N30
M26
N28
P29
P26
R29
P30
P28
N26
N27
M29
N25
R26
L28
L29
R27

DATA GROUP 0

U13A
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0

H_DINV#0 5
H_DSTBN#0 5
H_DSTBP#0 5

H_DINV#1 5
H_DSTBN#1 5
H_DSTBP#1 5

H_DINV#2 5
H_DSTBN#2 5
H_DSTBP#2 5

H_DINV#3 5
H_DSTBN#3 5
H_DSTBP#3 5

CHS-216IGP9050A21_BGA718
2

4.7K_0402_5%

Compal Electronics, Inc.


Title

ATI RC300M-AGTL+
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
1.0

LA-2371
Date:

, 28, 2004

Sheet
1

of

56

U13B
DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12
13,14 DDR_SBS0
13,14 DDR_SBS1

DDR_SMA13

13,14 DDR_SRAS#
13,14 DDR_SCAS#
13,14 DDR_SWE#

13 DDR_CLK0
13 DDR_CLK0#
13 DDR_CLK1
13 DDR_CLK1#

14 DDR_CLK3
14 DDR_CLK3#
14 DDR_CLK4
14 DDR_CLK4#

+1.8VS

13,14
13,14
14
14

DDR_SCKE0
DDR_SCKE1
DDR_SCKE2
DDR_SCKE3

13,14
13,14
14
14

DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15

PART 2 OF 6

AG6
AJ7
AJ9
AJ10
AJ6
AH6
AH8
AH9
AE7
AE8
AE12
AF12
AF7
AF8
AE11
AF11
AJ12
AH12
AH14
AH15
AH11
AJ13
AJ15
AJ16
AF18
AG20
AG21
AF22
AF19
AF20
AE22
AF23
AJ21
AJ22
AJ24
AK25
AH21
AH22
AH24
AJ25
AK26
AK27
AJ28
AH29
AH25
AJ26
AJ29
AH30
AF29
AE29
AB28
AA28
AE28
AD28
AC29
AB29
AC26
AB25
Y26
W26
AE26
AD26
AA26
Y27

MEM_CAP1

AF6

C652 1

0.47U_0603_10V7K

MEM_CAP2

AA29

C607 1

0.47U_0603_10V7K

AH7
AF10
AJ14
AF21
AH23
AK28
AD29
AB26

MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7

DDR_SRAS#
DDR_SCAS#

AF24
AF25

MEM_RAS#
MEM_CAS#

DDR_SWE#

AE24

MEM_WE#

DDR_DQS0
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQS4
DDR_DQS5
DDR_DQS6
DDR_DQS7

AJ8
AF9
AH13
AE21
AJ23
AJ27
AC28
AA25

MEM_DQS0
MEM_DQS1
MEM_DQS2
MEM_DQS3
MEM_DQS4
MEM_DQS5
MEM_DQS6
MEM_DQS7

DDR_CLK0
DDR_CLK0#

AK10
AH10

MEM_CK0
MEM_CK0#

DDR_CLK1
DDR_CLK1#

AH18
AJ19

MEM_CK1
MEM_CK1#

AG30
AG29

MEM_CK2
MEM_CK2#

DDR_CLK3
DDR_CLK3#

AK11
AJ11

MEM_CK3
MEM_CK3#

DDR_CLK4
DDR_CLK4#

AH17
AJ18

MEM_CK4
MEM_CK4#

AF28
AG28

MEM_CK5
MEM_CK5#

DDR_SCKE0
DDR_SCKE1
DDR_SCKE2
DDR_SCKE3

AF13
AE13
AG14
AF14

MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3

DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

AH26
AH27
AF26
AG27

MEM_CS#0
MEM_CS#1
MEM_CS#2
MEM_CS#3

MPVDD

AC18

MPVDD

MEM_COMP

AK19

2MPVSS

AD18

MPVSS

MEM_DDRVREF

AK20

L47 1
2
HB-1M2012-121JT03_0805

DDR_DQ0
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ5
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63

MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63

DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7

MEM I/F

AH19
AJ17
AK17
AH16
AK16
AF17
AE18
AF16
AE17
AE16
AJ20
AG15
AF15
AE23
AH20
AE25

DDR_DM[0..7]
DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_SMA[0..13]

DDR_DM[0..7] 13,14
DDR_DQ[0..63] 13,14
DDR_DQS[0..7] 13,14
DDR_SMA[0..13] 13,14

MEN_COMP R606 1

2 49.9_0402_1%

C586
1

2.2U_0805_16V4Z
CHS-216IGP9050A21_BGA718

+2.5V
1

+2.5V

C643

R609
1K_0402_1%

1
2

0.1U_0402_10V6K

DDR_VREF
C650

R610
1K_0402_1%

1
2

0.1U_0402_10V6K

DDR_VREF trace width of


20mils and space
20mils(min)

Compal Electronics, Inc.


Title

ATI RC300M-DDR I/F


Size

Document Number

R ev
1.0

LA-2371
Date:
5

, 28, 2004

Sheet
1

of

56

A_AD[0..31]

12,25 A_AD[0..31]
25

A_CBE#[0..3]

A_CBE#[0..3]

U13C

A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3

AG4
AE2
AC3
AA3

ALINK_CBE#0
ALINK_CBE#1
ALINK_CBE#2
ALINK_CBE#3

A_PAR
A_STROBE#
A_ACAT#
A_END#
2 0_0402_5%
A_DEVSEL#
A_OFF#

AD5
AC6
AC5
AD2
W4
AD3
AD6

PCI_PAR/ALINK_NC
PCI_FRAME#/ALINK_STROBE#
PCI_IRDY#/ALINK_ACAT#
PCI_TRDY#/ALINK_END#
INTA#
ALINK_DEVSEL#
PCI_STOP#/ALINK_OFF#

12,25
A_PAR
25
A_STROBE#
25
A_ACAT#
25
A_END#
17,25,30,34 PCI_PIRQA#
25
25

R5731
A_DEVSEL#
A_OFF#

25
25

A_SBREQ#
A_SBGNT#

A_SBREQ#
A_SBGNT#
+3VS

17
17

W5
W6

1
2 R192
8.2K_0402_5%

AGP_GNT#
AGP_REQ#

V5
V6

ALINK_SBREQ#
ALINK_SBGNT#
PCI_REQ#0/ALINK_NC
PCI_GNT#0/ALINK_NC

AGP_GNT#
AGP_REQ#

K5
K6

AGP2_GNT#/AGP3_GNT
AGP2_REQ#/AGP3_REQ

AGP8X_DET#

M5

AGP8X_DET#

AGPREF_8X

J6

AGP_VREF/TMDS_VREF

AGP_COMP

J5

AGP_COMP

PCI BUS 1 / AGP Bus (GPIO , TMDS , ZVPort)

PCI Bus 0 / A-Link I/F

+1.5VS
R532 1

AGP_AD0/TMD2_HSYNC
AGP_AD1/TMD2_VSYNC
AGP_AD2/TMD2_D1
AGP_AD3/TMD2_D0
AGP_AD4/TMD2_D3
AGP_AD5/TMD2_D2
AGP_AD6/TMD2_D5
AGP_AD7/TMD2_D4
AGP_AD8/TMD2_D6
AGP_AD9/TMD2_D9
AGP_AD10/TMD2_D8
AGP_AD11/TMD2_D11
AGP_AD12/TMD2_D10
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16/TMD1_VSYNC
AGP_AD17/TMD1_HSYNC
AGP_AD18/TMD1_DE
AGP_AD19/TMD1_D0
AGP_AD20/TMD1_D1
AGP_AD21/TMD1_D2
AGP_AD22/TMD1_D3
AGP_AD23/TMD1_D4
AGP_AD24/TMD1_D7
AGP_AD25/TMD1_D6
AGP_AD26/TMD1_D9
AGP_AD27/TMD1_D8
AGP_AD28/TMD1_D11
AGP_AD29/TMD1_D10
AGP_AD30/TMDS_HPD
AGP_AD31

Y2
W3
W2
V3
V2
V1
U1
U3
T2
R2
P3
P2
N3
N2
M3
M2
L1
L2
K3
K2
J3
J2
J1
H3
F3
G2
F2
F1
E2
E1
D2
D1

AGP2_SBSTB/AGP3_SBSTBF/NC/LVDS_BLON
AGP2_SBSTB#/AGP3_SBSTBS/NC/ENA_BL
AGP2_ADSTB0/AGP3_ADSTBF0/TMD2_CLK#
AGP2_ADSTB0#/AGP3_ADSTBS0/TMD2_CLK
AGP2_ADSTB1/AGP3_ADSTBF1/TMD1_CLK#
AGP2_ADSTB1#/AGP3_ADSTBS1/TMD1_CLK

E5
E6
T3
U2
G3
H2

PART 3 OF 6

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
AGP_SB_STBF
AGP_SB_STBS
AGP_AD_STBF0
AGP_AD_STBS0
AGP_AD_STBF1
AGP_AD_STBS1

AGP_AD[0..31]

AGP_PAR

AGP_AD[0..31] 17

AGP_SBA[0..7]

AGP_SBA[0..7] 17

AGP_C/BE#[0..3]

ALINK_AD0
ALINK_AD1
ALINK_AD2
ALINK_AD3
ALINK_AD4
ALINK_AD5
ALINK_AD6
ALINK_AD7
ALINK_AD8
ALINK_AD9
ALINK_AD10
ALINK_AD11
ALINK_AD12
ALINK_AD13
ALINK_AD14
ALINK_AD15
ALINK_AD16
ALINK_AD17
ALINK_AD18
ALINK_AD19
ALINK_AD20
ALINK_AD21
ALINK_AD22
ALINK_AD23
ALINK_AD24
ALINK_AD25
ALINK_AD26
ALINK_AD27
ALINK_AD28
ALINK_AD29
ALINK_AD30
ALINK_AD31

R566
@10K_0402_5%

AGP_C/BE#[0..3] 17

AGP_ST[0..2]

AGP_ST[0..2] 17
1

AK5
AJ5
AJ4
AH4
AJ3
AJ2
AH2
AH1
AG2
AG1
AG3
AF3
AF1
AF2
AF4
AE3
AE4
AE5
AE6
AC2
AC4
AB3
AB2
AB5
AB6
AA2
AA4
AA5
AA6
Y3
Y5
Y6

POP For EEQ00


DEPOP For EFQ00

AGP_SB_STBF 17
AGP_SB_STBS 17
AGP_AD_STBF0 17
AGP_AD_STBS0 17
AGP_AD_STBF1 17
AGP_AD_STBS1 17

AGP_SBA2

R515

2 @0_0402_5%

AGP_SBA3

R520

2 @0_0402_5%

ENVDD

AGP_STP# 17,26

AGP2_CBE#0/AGP3_CBE0/TMD2_D7
AGP2_CBE#1/AGP3_CBE1/TMD2_DE
AGP2_CBE#2/AGP3_CBE2
AGP2_CBE#3/AGP3_CBE3/TMD1_D5

R3
M1
L3
H1

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

AGP_SBA4

R521

2 @0_0402_5%

AGP_SBA5

R524

2 @0_0402_5%

AGP2_IRDY#/AGP3_IRDY/GPIO8/I2C_CLK
AGP2_TRDY#/AGP3_TRDY/TMDS_DVI_CLK
AGP2_STOP#/AGP3_STOP/GPIO10/DDC_DATA
AGP_PAR
AGP2_FRAME#/AGP3_FRAME/TMDS_DVI_DATA
AGP2_DEVSEL#/AGP3_DEVSEL/GPIO9/I2C_DATA
AGP2_PIPE#/AGP3_DBI_HI
AGP2_NC/AGP3_DBI_LO
AGP2_RBF#/AGP3_RBF
AGP2_WBF#/AGP3_WBF

P5
R6
T6
T5
P6
R5
C1
D3
N6
N5

AGP_IRDY#
AGP_TRDY#
AGP_STOP#
AGP_PAR
AGP_FRAME#
AGP_DEVSEL#
AGP_DBI_HI
AGP_DBI_LO
AGP_RBF#
AGP_WBF#

AGP_SBA1

R139

2 @0_0402_5%

AGP2_SBA0/AGP3_SBA#0/GPIO0/VDDC_CNTL0
AGP2_SBA1/AGP3_SBA#1/GPIO1/VDDC_CNTL1
AGP2_SBA2/AGP3_SBA#2/GPIO2/LVDS_BLON#
AGP2_SBA3/AGP3_SBA#3/GPIO3/LVDS_DIGON
AGP2_SBA4/AGP3_SBA#4/GPIO4/STP_AGP#
AGP2_SBA5/AGP3_SBA#5/GPIO5/AGP_BUSY#
AGP2_SBA6/AGP3_SBA#6/GPIO6/LVDS_SSOUT
AGP2_SBA7/AGP3_SBA#7/GPIO7/LVDS_SSIN

C3
C2
D4
E4
F6
F5
G6
G5

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

AGP_ST0
AGP_ST1
AGP_ST2

L6
M6
L5

AGP_ST0
AGP_ST1
AGP_ST2

169_0402_1%
B

AGP_IRDY# 17
AGP_TRDY# 17
AGP_STOP# 17
AGP_PAR 17
AGP_FRAME# 17
AGP_DEVSEL# 17
AGP_DBI_HI 17
AGP_DBI_LO 17
AGP_RBF# 17
AGP_WBF# 17

ENBKL#

AGP_BUSY# 17,26
NB_EDID_DAT
1
R138

AGP_SBA0

R511

17,24

NB_EDID_CLK

2 @0_0402_5%

1
R509

NB_EDID_DAT 24

2
@2.2K_0402_5%

+3VS

NB_EDID_CLK 24

2
@2.2K_0402_5%

+3VS

+3VS

A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31

R154
@10K_0402_5%

+3VS

CHS-216IGP9050A21_BGA718

POP For EFQ00


DEPOP For EEQ00

R157

R527
1

ENBKL

17,40

@0_0402_5%

@10K_0402_5%

2
G

Q53
1

R539

@1K_0402_1%

Q16
@2N7002_SOT23

ENBKL#
R554
0_0402_5%

AGPREF_8X

POP For EEQ00


DEPOP For EFQ00

R549
@1K_0402_1%

+AGP_VREF

7,24,28 NB_PWRGD

AGP8X_DET#

@2N7002_SOT23
2
G

+1.5VS

C526
0.1U_0402_10V6K

POP For EFQ00


DEPOP For EEQ00

POP For EEQ00


DEPOP For EFQ00

Compal Electronics, Inc.


Title

ATI RC300M-AGP, ALINK BUS


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
1.0

LA-2371
Date:

, 28, 2004

Sheet
1

of

56

FBM-11-160808-700T_0603
+3VS
L46
+3VS_VDDR3
1

+2.5VS
1

C608

0.1U_0402_10V6K

L36
KC FBM-L11-201209-221LMAT_0805

0.1U_0402_10V6K

B15

AVSSQ

PLLVDD_18

H11

PLLVDD_18

PLLVSS_18

G11

PLLVSS

0.1U_0402_10V6K

L42
1
2
KC FBM-L11-201209-221LMAT_0805 1
1
C528
C515

2
2
2
0.1U_0402_10V6K
23
NB_CRT_R
23
NB_CRT_G
23
NB_CRT_B
23 CRT_HSYNC
23 CRT_VSYNC
R108 1

C520

0.1U_0402_10V6K

CRT_HSYNC
CRT_VSYNC

2 715_0402_1%

16 REFCLK1_NB

CLK_AGP_66M

AVDDQ

C486

10U_0805_10V4Z

AVSSDI

A15

+1.8VS_AVDDQ

16 CLK_NB_BCLK
16 CLK_NB_BCLK#

R505

R112
56_0402_5%

@10_0402_5%

1
C481
@15P_0402_50V8J

CLK_MEM
1

16 CLK_AGP_66M
16 CLK_MEM

R506

+3VS

@10K_0402_5% R110
1
2
@10K_0402_5% R504
1
2
@10K_0402_5% R113
CLK_AGP_66M
CLK_MEM
@10K_0402_5% R492
1
2

R117

@10_0402_5%

RED
GREEN
BLUE
DACHSYNC
DACVSYNC

C14

RSET

A4
B4

XTALIN
XTALOUT

A5
B5

HCLKIN
HCLKIN#

B6
A6

SYS_FBCLKOUT
SYS_FBCLKOUT#

D8

ALINK_CLK

B2

AGPCLKOUT

B3

AGPCLKIN

A3

EXT_MEM_CLK

D7
B7

USBCLK
REF27

C5

OSC

10K_0402_5%

C480
@15P_0402_50V8J

TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXCLK_LN
TXCLK_LP

E10
D10
B9
C9
D11
E11
B10
C10

TXA0-_NB 24
TXA0+_NB 24
TXA1-_NB 24
TXA1+_NB 24
TXA2-_NB 24
TXA2+_NB 24
TXACLK-_NB 24
TXACLK+_NB 24

LPVDD_18

A12

LPVSS

A11

LVDDR_18
LVDDR_18

B12
C12

LVSSR
LVSSR

B11
C11

C492
+1.8VS_LVDDR

E15

TV_CRMA

Y_G

C15

TV_LUMA

COMP_B

D15

TV_COMPS

DACSCL

D6

3VDDCCL

DACSDA

C6

3VDDCDA

CPUSTOP#

D5

SYSCLK

A8
B8

2
10U_0805_10V4Z

KC FBM-L11-201209-221LMAT_0805
0.1U_0402_10V6K
1
2
L12
1
1
C501
C134

2
0.1U_0402_10V6K

+1.8VS

+1.8VS

2
10U_0805_10V4Z

TV_LUMA 24

R498

CLK. GEN.

CHS-216IGP9050A21_BGA718
R493

TV_CRMA 24

2
2
0.1U_0402_10V6K

C493

C_R

SYSCLK#

KC FBM-L11-201209-221LMAT_0805
0.1U_0402_10V6K
1
2
L38
1
1
C496
C483

+1.8VS_LPVDD

R102

CLK_NB_BCLK
CLK_NB_BCLK#
R101
@10K_0402_5%
1
2
1
2

F14
F15
E14
C8
D9

TXB0-_NB 24
TXB0+_NB 24
TXB1-_NB 24
TXB1+_NB 24
TXB2-_NB 24
TXB2+_NB 24
TXBCLK-_NB 24
TXBCLK+_NB 24

1
R501

2
75_0402_5%
3VDDCCL 23
3VDDCDA 23

2
1K_0402_5%

+3VS

L37
1
2
KC FBM-L11-201209-221LMAT_08051
C487

+1.8VS

AVDDDI_18

C13

D12
E12
F11
F12
D13
D14
E13
F13

R111
@10K_0402_5%

+1.8VS

AVSSN

B14

TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXCLK_UN
TXCLK_UP

0.1U_0402_10V6K

+1.8VS_AVDDDI

PART 4 OF 6

AVDD_25

LVDS

KC FBM-L11-201209-221LMAT_0805
L35
1
2
1
C489

VDDR3
VDDR3

CRT

+1.8VS

+2.5VS_AVDD A14
C485
0.1U_0402_10V6K
B13

SVID

U13D
G9
H9

@10K_0402_5%

@10K_0402_5%

Compal Electronics, Inc.


Title

ATI RC300M-AGP, ALINK BUS


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
1.0

LA-2371
Date:

, 28, 2004

Sheet
1

10

of

56

+1.5VS

+2.5V
U13F

+CPU_CORE

U13E
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE

+3VS

C16
D16
D17
E16
E17
F16
F17
G17
G21
G23
G24
H16
H17
H19
H21
H24
K23
K24
M23
P23
P24
T23
T24
U23
U24
W30

VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU

AA1
AA7
AA8
AC7
AC8
AD1
AD7
AD8
AK3
W8

VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK

POWER

MEM I/F PWR

CORE PWR

AA23
AA27
AB30
AC10
AC12
AC13
AC15
AC17
AC19
AC21
AC23
AC24
AC25
AC27
AD10
AD12
AD13
AD15
AD17
AD19
AD21
AD23
AD24
AD25
AD27
AE10
AE14
AE15
AE19
AE20
AE30
AE9
AF27
AG11
AG12
AG17
AG18
AG23
AG24
AG26
AG8
AG9
AJ30
AK14
AK23
AK8
V23
W23
W24
W25
Y25

VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM

AGP PWR

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

PART 6 OF 6

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

R23
R7
R8
T12
T13
T14
T15
T16
T17
T18
T19
T27
T4
U15
U16
U7
U8
V15
V16
V27
V4
V7
V8
W15
W16
W27
Y1
Y23
Y24
Y30
Y4
Y7
Y8
R19
R18
R17
R16
R15
R14
R13
R12
R1
P4
P27
P16
P15
N8
N24
N23
N16
N15
M4
M27
M16
M15
L8
L7
L25
L24
L23
K4
K27
J8

0.1U_0402_10V6K
C222
22U_1206_10V4Z

C529

C522

C551

2
2
0.1U_0402_10V6K

0.1U_0402_10V6K
1

C519

0.1U_0402_10V6K

C564

C509

2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K

C514

2
2
0.1U_0402_10V6K

C535
0.1U_0402_10V6K

+1.8VS
0.1U_0402_10V6K
C581
10U_0805_10V4Z

C590

C523

2
0.1U_0402_10V6K

C521

2
0.1U_0402_10V6K

C593
0.1U_0402_10V6K

+3VS
0.1U_0402_10V6K
C573
10U_0805_10V4Z

C603

C647

C592

0.1U_0402_10V6K
1

C580

2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K

0.1U_0402_10V6K

C571

C582

0.1U_0402_10V6K

C606

2
2
0.1U_0402_10V6K

C594

2
2
0.1U_0402_10V6K

CHS-216IGP9050A21_BGA718

R547for EFQ00
R547
1

0_0603_5%
2
+1.5VS

R563

AC22
AC9
H10
H22

VDD_18
VDD_18
VDD_18
VDD_18

A29
AB23
AB24
AB27
AB4
AB8
AC1
AC11
AC14
AC16
AC20
AC30
AD11
AD14
AD16
AD20
AD4
AE27
AF30
AF5
AG10
AG13
AG16
AG19
AG22
AG25
AG7
AH28
AH3
AJ1
AK13
AK2
AK22
AK29
AK4
AK7
B1
B16
B30
C19
C23
C27
C4
D21
D25
E3
E8
E9
F27
F4
F8
G14
G15
G18
G20
H14
H15
H18
H20
H27
H4
H8
J7

+1.5VS

A2
G4
H5
H6
H7
J4
K8
L4
M7
M8
N4
P1
P7
P8
R4
T8
U4
U5
U6
E7
F7
G8

VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP/VDDP33
VDDP_AGP/VDDP33
VDDP_AGP/VDDP33

CPU I/F PWR

ALINK PWR

PART 5 OF 6

+CPU_CORE

F10
F9
G12
H12
H13
M12
M13
M14
M17
M18
M19
N12
N13
N14
N17
N18
N19
P12
P13
P14
P17
P18
P19
U12
U13
U14
U17
U18
U19
V12
V13
V14
V17
V18
V19
W12
W13
W14
W17
W18
W19

+3VS

@0_0603_5%

+1.8VS

CHS-216IGP9050A21_BGA718

R563 For EEQ00


+2.5V
+1.5VS
0.1U_0402_10V6K
0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

C953

C539

C563

C577

C566

C552

C559

C534

C658

2
0.1U_0402_10V6K

2
0.1U_0402_10V6K

2
0.1U_0402_10V6K

C627

C626

C609

C623

0.1U_0402_10V6K

C648

C646

0.1U_0402_10V6K

C602

C645

0.1U_0402_10V6K

C625

C591

0.1U_0402_10V6K

C624

0.1U_0402_10V6K

0.1U_0402_10V6K

C631

0.1U_0402_10V6K
2
2
2
0.1U_0402_10V6K

C601C587

C611

C595

0.1U_0402_10V6K

C596

C574

C589

C540
150U_D2_6.3VM

220U_D2_4VM
2

0.1U_0402_10V6K

2
0.1U_0402_10V6K

2
0.1U_0402_10V6K

2
0.1U_0402_10V6K

2
0.1U_0402_10V6K

2
0.1U_0402_10V6K

2
0.1U_0402_10V6K

2
0.1U_0402_10V6K

2
0.1U_0402_10V6K

2
2
0.1U_0402_10V6K

+1.5VS
0.1U_0402_10V6K

C541

C508

C562

0.1U_0402_10V6K
1

C569

C548

0.1U_0402_10V6K
1

C570 C547

2
2
2
2
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K

0.1U_0402_10V6K

C524

C538

2
2
0.1U_0402_10V6K

C549

0.1U_0402_10V6K
1

C516

C517

0.1U_0402_10V6K
1

C550

2
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K

C557

0.1U_0402_10V6K
1

C565

2
2
0.1U_0402_10V6K

C561

0.1U_0402_10V6K
1

C555

2
2
0.1U_0402_10V6K

C556

0.1U_0402_10V6K
1

C536

2
2
0.1U_0402_10V6K

C579

0.01U_0402_25V4Z
1

C512

C560

2
2
2
0.1U_0402_10V6K
0.01U_0402_25V4Z

1
C568

1
C585

2
2
4.7U_0805_10V4Z 4.7U_0805_10V4Z

Compal Electronics, Inc.


Title

ATI RC300M-POWER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
1.0

LA-2371
Date:

, 27, 2004

Sheet
1

11

of

56

+3VS

R201
10K_0402_5%

R209

10K_0402_5%
1

R202
A_AD31

A_AD[31..30] : FSB CLK SPEED

D18

2
2
4.7K_0402_5%

BSEL1

5,16

CH751H-40_SC76
R208
D

A_AD30

A_AD[0..31]

A_AD[0..31]

9,25

D19
2
2
4.7K_0402_5%

BSEL0

5,16

R264 1

DEFAULT: 01

A_AD18
R261

00: 100 MHZ


01: 133 MHZ
10: 200MHZ
11:166 MHZ

2 @4.7K_0402_5%
2

A_AD18 : ENABLE PHASE CALIBRATION

+3VS

DEFAULT: 0

4.7K_0402_5%

0: DISABLE
1:ENABLE

CH751H-40_SC76
R197 1
A_AD29
R191

2 10K_0402_5%

A_AD29: STRAP CONFIGURATION

+3VS

A_AD17

DEFAULT:1

2
@4.7K_0402_5%

R2571

2 @4.7K_0402_5%

1
R252

A_AD25/A_AD17 : CPU VOLTAGE[1..0]

+3VS

DEFAULT: 0

4.7K_0402_5%

00: 1.05V
01: 1.35V
11: 1.75V
10: 1.45V

0: REDUCEDE SET
1: FULL SET
R198 1
A_AD28
R206

2 @10K_0402_5%
2

A_AD28: SPREAD SPECTRUM ENABLE

+3VS

DEFAULT:0

4.7K_0402_5%

0: DISABLE
1: ENABLE
R216 1
A_AD27
R212

2 10K_0402_5%

9,25

A_PAR

A_PAR

R258 1
R251
1

2
2

4.7K_0402_5%

PAR: EXTENDED DEBUG MODE

+3VS

DEFAULT : 1

@4.7K_0402_5%

0: DEBUG MODE
1: NORMAL

A_AD27: FrcShortReset#

+3VS

DEFAULT: 1

2
@4.7K_0402_5%

0: TEST MODE
1: NORMAL MODE
R230 1
A_AD26

R224

2 10K_0402_5%

A_AD26 : ENABLE IOQ

+3VS

DEFAULT: 1

2
@4.7K_0402_5%

0: IOQ=1
1: IOQ=12
R210 1
A_AD25
R203

2 10K_0402_5%

A_AD25/A_AD17 : CPU VOLTAGE[1..0]

+3VS

DEFAULT: 10

2
@4.7K_0402_5%

00: 1.05V
01: 1.35V
11: 1.75V
10: 1.45V
A_AD24

R244 1

2 10K_0402_5%

AD25=1 DESTOP CPU


AD25=0 MOBILE CPU
AD17--DON'T CARE

A_AD24 : MOBILE CPU SELECT

+3VS

DEFAULT: 1
0: BANIAS CPU
1: OTHER CPU
R231 1

2 10K_0402_5%

2
@4.7K_0402_5%

R223 1

2 10K_0402_5%

A_AD23
R238

A_AD23 : CLOCK BYPASS DISABLE

+3VS

DEFAULT: 1
0: TEST MODE
1: NORMAL

A_AD22
R215

+3VS

A_AD22 : OSC PAD OUTPUT PCICLK

2
@4.7K_0402_5%

DEFAULT : 1
0: PCICLK OUT
1: OSC CLK OUT
R226 1
A_AD21
R234

2 10K_0402_5%

A_AD21 : AUTO_CAL ENABLE

+3VS

DEFAULT : 1

2
@4.7K_0402_5%

0: DISABLE
1: ENABLE

A_AD20

R237 1

2 @4.7K_0402_5%

R243 1

2 4.7K_0402_5%

A_AD20 : INTERNAL CLK GEN ENABLE

+3VS

DEFAULT : 0
0: DISABLE
1: ENABLE

Compal Electronics, Inc.


Title

ATI RC300M-SYSTEM STRAP


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
1.0

LA-2371
Date:

, 28, 2004

Sheet
1

12

of

56

+2.5V

+2.5V

+2.5V
1

+2.5V
JP26

DDR_DQS0
DDR_DQ3
DDR_DQ2
DDR_DQ13
1

DDR_DQ15
DDR_DQS1
DDR_DQ14
DDR_DQ10
8
8

DDR_CLK0
DDR_CLK0#

DDR_DQ17
DDR_DQ21

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

DDR_DQS2
DDR_DQ23
DDR_DQ18
DDR_DQ29
DDR_DQ[0..63]

DDR_DQ25
DDR_DQS3

DDR_DQ[0..63] 8,14

DDR_DQS[0..7]

DDR_DQS[0..7] 8,14

DDR_DM[0..7]

DDR_DQ30
DDR_DQ31

DDR_DM[0..7] 8,14

DDR_SMA[0..13]

DDR_SMA[0..13] 8,14

10_0804_8P4R_5%
DDR_CKE1
8,14 DDR_SCKE1

DDR_SCKE1
DDR_SMA12
DDR_SMA9
DDR_SMA7

4
3
2
1

10_0804_8P4R_5%

5
6
7
8

8,14 DDR_SBS0
8,14 DDR_SWE#
8,14 DDR_SCS#0

DDR_SMAA7
DDR_SMAA5
DDR_SMAA3
DDR_SMAA1

RP14

DDR_SMA5 4
DDR_SMA3 3
DDR_SMA1 2
DDR_SMA10 1
10_0804_8P4R_5%

DDR_SMAA12
DDR_SMAA9

5
6
7
8

DDR_SMAA10
DDR_BS0
DDR_WE#
DDR_CS#0
DDR_SMAA13

RP13

DDR_SBS0 4
DDR_SWE# 3
DDR_SCS#0 2
DDR_SMA13 1

5
6
7
8

DDR_DQ33
DDR_DQ37
DDR_DQS4
DDR_DQ39

RP15

DDR_DQ35
DDR_DQ45
3

DDR_DQ41
DDR_DQS5
DDR_DQ43
DDR_DQ47

DDR_DQ49
DDR_DQ53
DDR_DQS6
DDR_DQ55
DDR_DQ51
DDR_DQ56
DDR_DQ63
DDR_DQS7
DDR_DQ62
DDR_DQ58
14,16,26 SMDATA
14,16,26 SMCLK
+3VS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_DQ0
DDR_DQ6

C371
0.1U_0402_10V6K

R343
1K_0402_1%

1
DDRA_VREF

DDR_DM0
DDR_DQ5
DDR_DQ7
DDR_DQ12

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS

DDR_DQ1
DDR_DQ4

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

2
C378
0.1U_0402_10V6K

R353
1K_0402_1%

1
2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

DDR_DQ8
DDR_DM1
DDR_DQ9
DDR_DQ11

DDRA_VREF trace width of


20mils and space 20mils(min)

DDR_DQ20
DDR_DQ16
DDR_DM2
DDR_DQ22
DDR_DQ19
DDR_DQ24
DDR_DQ28
DDR_DM3
DDR_DQ26
DDR_DQ27

5
6
7
8

DDR_CKE0
DDR_SMAA11
DDR_SMAA8

4
3
2
1

10_0804_8P4R_5%
DDR_SCKE0
DDR_SMA11
DDR_SMA8

4
3
2
1

10_0804_8P4R_5%
DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0

4
3
2
1

10_0804_8P4R_5%
DDR_SBS1
DDR_SRAS#
DDR_SCAS#
DDR_SCS#1

RP18

DDR_SMAA6
DDR_SMAA4
DDR_SMAA2
DDR_SMAA0

5
6
7
8

DDR_SCKE0 8,14

RP17

DDR_BS1
DDR_RAS#
DDR_CAS#
DDR_CS#1

5
6
7
8

DDR_DQ32
DDR_DQ36

DDR_SBS1 8,14
DDR_SRAS# 8,14
DDR_SCAS# 8,14
DDR_SCS#1 8,14

RP19

DDR_DM4
DDR_DQ38
DDR_DQ34
DDR_DQ44
3

DDR_DQ40
DDR_DM5
DDR_DQ42
DDR_DQ46
DDR_CLK1# 8
DDR_CLK1 8
DDR_DQ48
DDR_DQ52
DDR_DM6
DDR_DQ54
DDR_DQ50
DDR_DQ61
DDR_DQ60
DDR_DM7
DDR_DQ57
DDR_DQ59

DDR-SODIMM_200_STD_H4.0

Layout note
Layout note
Place Add/Command resisotrs
Close to Pin, max L = 300 mils

Compal Electronics, Inc.


Title

DDR-SODIMM SLOT0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Document Number

R ev
1.0

LA-2371
, 28, 2004

Date:
G

Sheet

13
H

of

56

DDR_DQ1
DDR_DQ4
DDR_DQS0
DDR_DQ3

8
7
6
5
56_0804_8P4R_5%

8
7
6
5

DDR_DQ0
DDR_DQ6
DDR_DM0
DDR_DQ5

1
2
3
4

DDR_DQ1
DDR_DQ4
DDR_DQS0
DDR_DQ3

56_0804_8P4R_5%

RP25
DDR_DQ2
DDR_DQ13
DDR_DQ15
DDR_DQS1

8
7
6
5
56_0804_8P4R_5%

8
7
6
5

8
7
6
5

DDR_DQ7
DDR_DQ12
DDR_DQ8
DDR_DM1

1
2
3
4

DDR_DQ14
DDR_DQ10
8
8

56_0804_8P4R_5%

RP26
DDR_DQ14
DDR_DQ10
DDR_DQ17
DDR_DQ21

DDR_DQ15
DDR_DQS1

RP61
1
2
3
4

DDR_CLK3
DDR_CLK3#

DDR_DQ17
DDR_DQ21

RP60
1
2
3
4

56_0804_8P4R_5%

8
7
6
5

DDR_DQ9
DDR_DQ11
DDR_DQ20
DDR_DQ16

1
2
3
4

DDR_DQS2
DDR_DQ23
DDR_DQ18
DDR_DQ29

56_0804_8P4R_5%
DDR_DQ25
DDR_DQS3

RP27
DDR_DQS2
DDR_DQ23
DDR_DQ18
DDR_DQ29
2

8
7
6
5

DDR_DQ30
DDR_DQ31

RP59
1
2
3
4

56_0804_8P4R_5%

8
7
6
5

DDR_DM2
DDR_DQ22
DDR_DQ19
DDR_DQ24

1
2
3
4

56_0804_8P4R_5%

*27
RP28
DDR_DQ25
DDR_DQS3
DDR_DQ30
DDR_DQ31

8
7
6
5

RP58
1
2
3
4

56_0804_8P4R_5%

8
7
6
5

DDR_SCKE3

DDR_SCKE31 R371
10_0402_5%

DDR_DQ28
DDR_DM3
DDR_DQ26
DDR_DQ27

1
2
3
4

8
7
6
5

DDR_SMA7
DDR_SMA5
DDR_SMA3
DDR_SMA1

56_0804_8P4R_5%

1
2
3
4

DDR_SCS#2

DDR_CKE3
DDR_SMA12
DDR_SMA9

RP31
DDR_SMA8
DDR_SMA5
DDR_SMA3
DDR_SMA1

DDR_SCS#2 1 R369
10_0402_5%

8,13 DDR_SBS0
8,13 DDR_SWE#
2

DDR_SMA10
DDR_SBS0
DDR_SWE#
DDR_CS#2
DDR_SMA13
DDR_DQ33
DDR_DQ37

33_0804_8P4R_5%

DDR_DQS4
DDR_DQ39
RP29
DDR_SCKE3
DDR_SCKE2

8,13 DDR_SCKE1

DDR_SMA12

8
7
6
5

33_0804_8P4R_5%

8
7
6
5

8,13 DDR_SCKE0

8
7
6
5

1
2
3
4

DDR_SMA10
DDR_SMA6
DDR_SMA4
DDR_SMA2

DDR_DQ41
DDR_DQS5
DDR_DQ43
DDR_DQ47

33_0804_8P4R_5%

RP30
DDR_SMA9
DDR_SMA7
DDR_SCKE0
DDR_SMA11

DDR_DQ35
DDR_DQ45

RP57
1
2
3
4

RP56
1
2
3
4

33_0804_8P4R_5%

8
7
6
5

1
2
3
4

DDR_SCS#0
DDR_SBS1
DDR_SRAS#
DDR_SCAS#

DDR_SCS#0 8,13

Layout note
Place these resistor
closely DIMM1,
all trace
length<=800mil

33_0804_8P4R_5%

DDR_DQ49
DDR_DQ53
DDR_DQS6
DDR_DQ55
DDR_DQ51
DDR_DQ56
DDR_DQ63
DDR_DQS7

RP32
DDR_SMA0
DDR_SBS0
DDR_SWE#
DDR_SMA13

8
7
6
5

33_0804_8P4R_5%

33_0804_8P4R_5%
1
2
3
4

5
6
7
8

+2.5V

+2.5V

4
3
2
1

DDR_DQ62
DDR_DQ58
DDR_SCS#3
DDR_SCS#2
DDR_SCS#1

DDR_SCS#1 8,13

13,16,26 SMDATA
13,16,26 SMCLK
+3VS

RP55

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS
DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID
KLINK_5746-2-111

JP24

DDR_DQ2
DDR_DQ13
1

+2.5V

+2.5V

+1.25VS
RP62
1
2
3
4

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

2
DDR_DQ0
DDR_DQ6

DDR_DM0
DDR_DQ5

DDR_SMA[0..13]
R333
C324
0.1U_0402_10V6K 1K_0402_1%
DDR_DQS[0..7]
DDRB_VREF
DDR_DQ[0..63]

DDR_DQ7
DDR_DQ12

DDR_DQS[0..7] 8,13
DDR_DQ[0..63] 8,13

DDR_DM[0..7]
R338
C340
0.1U_0402_10V6K 1K_0402_1%

DDR_DQ8
DDR_DM1

DDR_SMA[0..13] 8,13

DDR_DM[0..7] 8,13
1

RP24

DDR_DQ9
DDR_DQ11

DDRB_VREF trace width of


20mils and space
20mils(min)

DDR_DQ20
DDR_DQ16
DDR_DM2
DDR_DQ22

+1.25VS

DDR_DQ19
DDR_DQ24

RP33

DDR_DQ28
DDR_DM3

DDR_DQ33
DDR_DQ37
DDR_DQS4
DDR_DQ39

DDR_DQ26
DDR_DQ27

8
7
6
5

RP54
1
2
3
4

56_0804_8P4R_5%

8
7
6
5

56_0804_8P4R_5%

RP34
DDR_DQ35
DDR_DQ45
DDR_DQ41
DDR_DQS5

8
7
6
5

RP53
1
2
3
4

56_0804_8P4R_5%
DDR_CKE2
2 R367
10_0402_5%
DDR_SMA11
DDR_SMA8

DDR_SCKE2

8
7
6
5

DDR_DQ43
DDR_DQ47
DDR_DQ49
DDR_DQ53

DDR_SBS1
DDR_SRAS#
DDR_SCAS#
DDR_CS#3 2
10_0402_5%

DDR_SBS1 8,13
DDR_SRAS# 8,13
DDR_SCAS# 8,13
DDR_SCS#3
1
R370

8
7
6
5

56_0804_8P4R_5%

RP52
1
2
3
4

56_0804_8P4R_5%

8
7
6
5

56_0804_8P4R_5%

RP36
DDR_DQS6
DDR_DQ55
DDR_DQ51
DDR_DQ56

DDR_DQ34
DDR_DQ44

DDR_DQ42
DDR_DQ46
DDR_DQ48
DDR_DQ52

1
2
3
4

DDR_SCS#3 8

DDR_DQ32
DDR_DQ36
DDR_DM4
DDR_DQ38

DDR_DQ34
DDR_DQ44
DDR_DQ40
DDR_DM5

1
2
3
4

DDR_SCKE2 8

RP35
DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0

DDR_DQ32
DDR_DQ36
DDR_DM4
DDR_DQ38

1
2
3
4

8
7
6
5

RP51
1
2
3
4

56_0804_8P4R_5%

8
7
6
5

DDR_DM6
DDR_DQ54
DDR_DQ50
DDR_DQ61

1
2
3
4

56_0804_8P4R_5%

DDR_DQ40
DDR_DM5
DDR_DQ42
DDR_DQ46

RP37
DDR_CLK4# 8
DDR_CLK4 8

DDR_DQ48
DDR_DQ52

DDR_DQ63
DDR_DQS7
DDR_DQ62
DDR_DQ58

8
7
6
5

RP50
1
2
3
4

56_0804_8P4R_5%

8
7
6
5

DDR_DQ60
DDR_DM7
DDR_DQ57
DDR_DQ59

1
2
3
4

56_0804_8P4R_5%

DDR_DM6
DDR_DQ54
DDR_DQ50
DDR_DQ61
DDR_DQ60
DDR_DM7
DDR_DQ57
DDR_DQ59
+3VS

Layout note
Place these resistor
close by DIMM1,
all trace length
Max=0.8"

Compal Electronics, Inc.

DDR TOPOLOGY 1 FOR SMAA[0, 3, 6:12], SBA[1, 0], SRAS#, SCAS#, SWE#

Title

DDR-SODIMM SLOT1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Document Number

R ev
1.0

LA-2371
Date:

, 28, 2004

Sheet
E

14

of

56

Layout note :

Layout note :

Distribute as close as possible


to DDR-SODIMM0.

Distribute as close as possible


to DDR-SODIMM1.

+2.5V

+2.5V
0.1U_0402_10V6K
1

1
1

1
C388
220U_D2_4VM

1
C347
0.1U_0402_10V6K

1
C316
0.1U_0402_10V6K

1
C348
0.1U_0402_10V6K

1
C314
0.1U_0402_10V6K

1
C318
0.1U_0402_10V6K

1
C312
0.1U_0402_10V6K

1
C319
0.1U_0402_10V6K

+
C317
0.1U_0402_10V6K

1
C306
220U_D2_4VM

1
C385
0.1U_0402_10V6K

1
C386
0.1U_0402_10V6K

1
C357
0.1U_0402_10V6K

1
C366
0.1U_0402_10V6K

1
C392
0.1U_0402_10V6K

1
C363
0.1U_0402_10V6K

1
C360
0.1U_0402_10V6K

C346

0.1U_0402_10V6K

1
C323
0.1U_0402_10V6K

1
+

1
C350
0.1U_0402_10V6K

1
C349
0.1U_0402_10V6K

1
C315
0.1U_0402_10V6K

1
C343
0.1U_0402_10V6K

1
C351
0.1U_0402_10V6K

1
C321
0.1U_0402_10V6K

1
C313
0.1U_0402_10V6K

1
C344
0.1U_0402_10V6K

1
C320
0.1U_0402_10V6K

1
C389
0.1U_0402_10V6K

1
C391
0.1U_0402_10V6K

1
C358
0.1U_0402_10V6K

1
C362
0.1U_0402_10V6K

1
C361
0.1U_0402_10V6K

1
C345
0.1U_0402_10V6K

C369
2

Layout note :

1
C326
220U_D2_4VM

1
C311
0.1U_0402_10V6K

C325
220U_D2_4VM

for EMI solution

+2.5V
1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25VS

C359

+1.25VS

1000P_0402_50V7K

1
C811
0.1U_0402_10V6K

1
C788
0.1U_0402_10V6K

1
C799
0.1U_0402_10V6K

1
C789
0.1U_0402_10V6K

1
C800
0.1U_0402_10V6K

1
C790
0.1U_0402_10V6K

1
C414
0.1U_0402_10V6K

1
C405
0.1U_0402_10V6K

C341

C322

2
1000P_0402_50V7K

1
C787
0.1U_0402_10V6K

C387

2
1000P_0402_50V7K

C390

C384

C383

C364

C365

1000P_0402_50V7K

C399
0.1U_0402_10V6K

1000P_0402_50V7K

+1.25VS

1
C786
0.1U_0402_10V6K

1
C785
0.1U_0402_10V6K

1
C810
0.1U_0402_10V6K

1
C404
0.1U_0402_10V6K

1
C413
0.1U_0402_10V6K

1
C797
0.1U_0402_10V6K

1
C403
0.1U_0402_10V6K

1
C401
0.1U_0402_10V6K

1
C402
0.1U_0402_10V6K

C798
0.1U_0402_10V6K

+1.25VS

1
3

1
C419
0.1U_0402_10V6K

1
C418
0.1U_0402_10V6K

1
C416
0.1U_0402_10V6K

1
C415
0.1U_0402_10V6K

1
C406
0.1U_0402_10V6K

C791
0.1U_0402_10V6K

+1.25VS

1
C801
0.1U_0402_10V6K

1
C412
0.1U_0402_10V6K

1
C813
0.1U_0402_10V6K

1
C814
0.1U_0402_10V6K

1
C812
0.1U_0402_10V6K

1
C803
0.1U_0402_10V6K

1
C802
0.1U_0402_10V6K

1
C410
0.1U_0402_10V6K

1
C409
0.1U_0402_10V6K

C804
0.1U_0402_10V6K

+1.25VS

1
C794
0.1U_0402_10V6K

1
C806
0.1U_0402_10V6K

1
C407
0.1U_0402_10V6K

1
C408
0.1U_0402_10V6K

1
C815
0.1U_0402_10V6K

1
C796
0.1U_0402_10V6K

1
C805
0.1U_0402_10V6K

1
C793
0.1U_0402_10V6K

1
C808
0.1U_0402_10V6K

C400
0.1U_0402_10V6K

+1.25VS

1
C807
0.1U_0402_10V6K

1
C795
0.1U_0402_10V6K

1
C411
0.1U_0402_10V6K

1
C397
0.1U_0402_10V6K

1
C398
0.1U_0402_10V6K

C792
0.1U_0402_10V6K

Compal Electronics, Inc.


Title

DDR SODIMM Decoupling


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Document Number

R ev
1.0

LA-2371
Date:

, 27, 2004

Sheet
E

15

of

56

+3V_CLK
+3VS

Width=40 mils

L48
1

0.1U_0402_10V6K

HB-1M2012-121JT03_0805
C644

C290

2
10U_0805_10V4Z

0.1U_0402_10V6K

C630

C260

2
0.1U_0402_10V6K

100P_0402_25V8K
C670

C621

2
0.1U_0402_10V6K

C287

2
0.1U_0402_10V6K

100P_0402_25V8K
C659

C668

2
2200P_0402_25V7K

C270

2
2200P_0402_25V7K

42
48
30
29
19
13
1
9

+3VS_VDDA

C605

2.2P_0402_50V8C
XTALIN_CLK
2
1

Y4

VDDCPU
VDDSD
VDDAGP
VDD48M
VDDPCI
VDDPCI
VDDREF
VDDXTAL

U44

XIN

VDDA

36

+3VS_VDDA
C669

R273

35
34

VTT_PWRGD

26,28 VTT_PWRGD
2

R624 1

2 10K_0402_5%

R625 1
R636 1

26 CLK_USB48
30 CLK_EXT_SD48

10 REFCLK1_NB
38 CLK_14M_SIO
26 CLK_SB_14M

2 @10K_0402_5%
2 33_0402_5%

CLK_48M

R590 1
R579 1
R591 1

2 68_0402_5%
2 33_0402_5%
2 33_0402_5%

FS2
FS1
FS0

R578 1

2 33_0402_5%

CLK_IREF

27
28

4
3
2
38

37

CPUT0

40

SCLK
SDATA

2
VSSA 100P_0402_25V8K
R619 1

2
10U_0805_10V4Z

0.1U_0402_10V6K
1
1
C286
C288

2200P_0402_25V7K
1
C261

L49
1
2
CHB2012U121_0805

+3VS

2 49.9_0402_1%

R627 1

2 49.9_0402_1%

CLK_NB#

R618 1

2 33_0402_5%

CPUT1

44

CLK_CPU_CLK

R621 1

2 33_0402_5%

FS2/REF2
FS1/REF1
FS0/REF0

2
100P_0402_25V8K

CLK_BCLK 4

2 49.9_0402_1%

CPUC1
SDRAMOUT

47

MEM_133M

R631 1

2 33_0402_5%

CLK_MEM 10

AGPCLK0
AGPCLK1

32
31

AGP_EXT_66M R622 1
AGP_66M
R634 1

2 33_0402_5%
2 33_0402_5%

CLK_AGP_EXT_66M 17
CLK_AGP_66M 10

FS3/PCICLK_F0
FS4/PCICLK_F1

14
15

FS3
FS4

2 33_0402_5%

CLK_ALINK_SB 25

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5

16
17
20
21
22
23

IREF

R637

2 49.9_0402_1%
CLK_BCLK#

43

R595 1

CLK_NB_BCLK# 10
CLK_BCLK

R629 1
2 33_0402_5%

CLK_NB_BCLK 10

R628 1

39

CLK_CPU_CLK# R620 1

2
0.1U_0402_10V6K

2 33_0402_5%

R630 1

48MHz_1
48MHz_0

CLK_BCLK# 4

POP For EFQ00


DEPOP For EEQ00

8
5
18
24
25
33
46
41

GNDXTAL
GNDREF
GNDPCI
GNDPCI
GND48M
GNDAGP
GNDSD
GNDCPU

475_0402_1%

CLK_NB

CPUC0

VTTPWRGD/PD#
CPU_STP#
PCI_STOP#
24/48#SEL
PCI33/66#SEL

35 CLK_AUDIO_14M

PCI33/66#

10
45
12
26
11

VSSA
XOUT

10K_0402_5%
2

10K_0402_5%

R221

XTALOUT_CLK
2
14.31818MHZ_20P_6X1430004201
2.2P_0402_50V8C

13,14,26 SMCLK
13,14,26 SMDATA

+3VS

0.1U_0402_10V6K
1
1
C622
C289

R594
@1M_0402_5%

1
C604

0.1U_0402_10V6K
1
1
C667
C657

ICS951402AGT_TSSOP48

CLOCK FREQUENCY SELECT TABLE


A-LINK FREQ

With Spread Enabled

+3V_CLK

R575

R569
10K_0402_5%

Note: 0 = PULL LOW


1 = PULL HIGH

5,12

BSEL1

5,12

BSEL0

R587

1
D44
1
D45

R597

R586

10K_0402_5%

4.7K_0402_5%

10K_0402_5%
2

10K_0402_5%

FS1
FS0
FS2
FS3
FS4
PCI33/66#

+3VS

+3VS

R222

R596
20K_0402_5%

R577

100

R588

@10K_0402_5% @10K_0402_5%

R589

@10K_0402_5%

100

10K_0402_5%

R229

R585

R228

R584

10K_0402_5%

10K_0402_5%

10K_0402_5%

@10K_0402_5%
2

33MHZ

PCI33/66# = LOW

Spreaf OFF OR
Center spread +/-0.3%

133

200

133

200

66MHZ

**

PCI33/66# = HIGH

+3V_CLK

**

MEM

CPU

FS4 FS3 FS2 FS1 FS0

2
CH751H-40_SC76
2
CH751H-40_SC76

(EEQ00 R596 4.7K)

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Clock Generator
Size

Document Number

R ev
1.0

LA-2371
, 28, 2004

Date:
G

Sheet

16
H

of

56

CLK_AGP_EXT_66M AG30
AG28
AGP_REQ#
AF28
AGP_GNT#
AD26
AGP_PAR
M25
AGP_STOP#
N26
AGP_DEVSEL#
V29
AGP_TRDY#
V28
AGP_IRDY#
W29
AGP_FRAME#
W28
PCI_PIRQA#
AE26

1
2
R485
9
AGP_REQ#
10_0402_5%
9
AGP_GNT#
9
AGP_PAR
9
AGP_STOP#
9 AGP_DEVSEL#
9
AGP_TRDY#
9
AGP_IRDY#
9 AGP_FRAME#
9,25,30,34 PCI_PIRQA#

AGP_WBF#

AGP_WBF#

9,26 AGP_STP#
9,26 AGP_BUSY#
9
AGP_RBF#
9 AGP_AD_STBF0
9 AGP_AD_STBF1
9 AGP_AD_STBS0
9 AGP_AD_STBS1

Pull High for AGP 4X


R490
2
2
R489

@10K_0402_5%
AGP_DBI_HI
1
AGP_DBI_LO
1
@10K_0402_5%

R123
1 47_0402_5%
2 (15mil)

+1.5VS

9
9

STP_AGP#
AGP_BUSY#
RBF#
AD_STBF_0
AD_STBF_1
AD_STBS_0
AD_STBS_1

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

AD28
AD29
AC28
AC29
AA28
AA29
Y28
Y29

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

AGP_ST0
AGP_ST1
AGP_ST2

AF29
AD27
AE28

ST0
ST1
ST2

AGP_DBI_HI
AGP_DBI_LO

AB25
AB26

DBI_HI
DBI_LO

2
1
R488 10K_0402_5%

AC25

AGP8X_DET#

2
R487

1
@10K_0402_5%

AE11
AF11

DMINUS
DPLUS

2 715_0402_1%

AK21

R2SET

AJ23
AJ22
AK22
AJ24
AK24

C_R
Y_G
COMP_B
H2SYNC
V2SYNC

AG23
AG24

DDC3CLK
DDC3DATA

AGP_DBI_HI
AGP_DBI_LO

AGP8X_DET#
HIGH:
AGP2.0

+1.5VS

WBF#

AGP_SB_STBF
AB29 SB_STBF
AGP_SB_STBS
AB28 SB_STBS
C162 1
2 0.1U_0402_10V6K
M26 AGPREF
+AGP_VREF
M27 AGPTEST

9 AGP_SB_STBF
9 AGP_SB_STBS

PCICLK
RST#
REQ#
GNT#
PAR
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
INTA#

+3VS

R128
324_0402_1%
1

24
24

CRMA
LUMA

+AGP_VREF

R132

CRMA
LUMA
COMPS
R473
75_0402_5%

100_0402_1%

THRM

R467
(15mil)

1
2
R470
10K_0402_5%
1
2
R469
10K_0402_5%
USE SELF-VIA TO GND PLANE

SSIN

AK25

SSIN

SSOUT

AJ25

SSOUT

XTALIN

R76

AGP_SUS_STAT# R41

26 AGP_SUS_STAT#

2 1K_0402_5%
1
2
0_0402_5%

AH28

XTALIN

AJ29

XTALOUT

AH27
AG26

DVOMODE

AE10

TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP

AK16
AH16
AH17
AJ16
AH18
AJ17
AK19
AH19
AK18
AJ18
AG16
AF16
AG17
AF17
AF18
AE18
AH20
AG20
AF19
AG19

TXOUT0TXOUT0+
TXOUT1TXOUT1+
TXOUT2TXOUT2+

DIGON
BLON/(BLON#)

AE12
AG12

ENVDD
ENBKL

TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP

AJ13
AH14
AJ14
AH15
AJ15
AK15
AH13
AK13

DDC2CLK
DDC2DATA

AE13
AE14

HPD1

AF12

R
G
B
HSYNC
VSYNC

AK27
AJ27
AJ26
AG25
AH25

1 @10K_0402_5%

GPIO4

STRAP_D

R46

1 @10K_0402_5%

GPIO5

STRAP_E

R27

1 @10K_0402_5%

GPIO6

STRAP_F

R464

1 @10K_0402_5%

GPIO0

STRAP_G

R461
R462

2
2

1 10K_0402_5%
1 @10K_0402_5%

GPIO1

STRAP_H

R460
R459

2
2

1 10K_0402_5%
1 @10K_0402_5%

GPIO2

STRAP_J

R448
R449

2
2

1 @10K_0402_5%
1 @10K_0402_5%

GPIO3

STRAP_K

R463
R447

2
2

1 @10K_0402_5%
1 @10K_0402_5%

GPIO9

STRAP_O

R465

1 @10K_0402_5%

GPIO11

STRAP_L

R451

1 @10K_0402_5%

GPIO12

STRAP_M

R26

1 @10K_0402_5%

GPIO13

STRAP_N

R466

1 @10K_0402_5%

STRAP_R

R28
R29

2
2

1 @10K_0402_5%
1 10K_0402_5%

STRAP_S

R458
R457

2
2

1 @10K_0402_5%
1 10K_0402_5%

STRAP_T

R25
R30

2
2

1 @10K_0402_5%
1 10K_0402_5%

DRAM128M

R43
R42

2
2

1 @10K_0402_5%
1 10K_0402_5%

1
2

4Mx32 Samsung x4

4Mx32 Hynix x4

8Mx32 Samsung x4

1
AJ10
AK10
AJ11
AH11

ZV_LCDCNTL0
ZV_LCDCNTL1
ZV_LCDCNTL2
ZV_LCDCNTL3

+3VS

8Mx32 Hynix x4

4Mx32 Samsung x2 Ch. A

4Mx32 Hynix x2 Ch. A

R52

2.2K_0402_5%

2.2K_0402_5%

EDID_DATA 24
EDID_CLK 24

DVOMODE 1
R53

TXCLKTXCLK+
TZOUT0TZOUT0+
TZOUT1TZOUT1+
TZOUT2TZOUT2+

2
0_0402_5%

TXOUT0TXOUT0+
TXOUT1TXOUT1+
TXOUT2TXOUT2+

24
24
24
24
24
24

TXCLKTXCLK+
TZOUT0TZOUT0+
TZOUT1TZOUT1+
TZOUT2TZOUT2+

24
24
24
24
24
24
24
24

+3VS

R455
10K_0402_5%

TZCLKTZCLK+

TZCLKTZCLK+
ENVDD
ENBKL

24
24
2

9,24
9,40

3.3V OSC out for W180

X4
4

VDD

OUT

OE

GND

FREQOUT 1
R478

Ra

XTALIN

2
261_0402_1%
R476
150_0402_5%

27MHZ_15P
C456
0.1U_0402_10V6K

C469
B

Rb

For VGA DDR


R49

@15P_0402_50V8J

spread sprum

2 100K_0402_5%

+3VS_VGA_SS
U35

TESTEN
SUS_STAT#
SA002160E00(0301021300)

R50
1K_0402_1%

STRAP_R
STRAP_S
STRAP_T

R51

GPIO7

R45
1K_0402_1%

POWER_SEL 50

VREFG (25 mil)

AH6
AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7
AF7
AE8
AG8
AF8
AE9
AF9
AG10
AF10

1 @10K_0402_5%

+3VS

+3VS

SSC DAC2

+1.5VS

AC26

STP_AGP#
AH30
AGP_BUSY#
AH29
AGP_RBF#
AE29
AGP_AD_STBF0
M28
AGP_AD_STBF1
V25
AGP_AD_STBS0
M29
AGP_AD_STBS1
V26

C/BE#0
C/BE#1
C/BE#2
C/BE#3

AF5

R450

16 CLK_AGP_EXT_66M
7,25,40 NB_RST#

N29
U28
P26
U26

ROMCS#

R44

STRAP_B

VGA_Disable

POWER_SEL
XTALIN_SS

ZV_LCDDATA0
ZV_LCDDATA1
ZV_LCDDATA2
ZV_LCDDATA3
ZV_LCDDATA4
ZV_LCDDATA5
ZV_LCDDATA6
ZV_LCDDATA7
ZV_LCDDATA8
ZV_LCDDATA9
ZV_LCDDATA10
ZV_LCDDATA11
ZV_LCDDATA12
ZV_LCDDATA13
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21
ZV_LCDDATA22
ZV_LCDDATA23

STRAP_A

GPIO8

@10P_0402_50V8J @10_0402_5%

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

AG4

+3VS

ID_Disable

VREFG/(NC)

STRAP_G
STRAP_H
STRAP_J
STRAP_K
STRAP_D
STRAP_E
STRAP_F
STRAP_B
STRAP_A
STRAP_O
DRAM128M
STRAP_L
STRAP_M
STRAP_N

R480
1

AJ5
AH5
AJ4
AK4
AH4
AF4
AJ3
AK3
AH3
AJ2
AH2
AH1
AG3
AG1
AG2
AF3
AF2

C472
1
2

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16

TMDS

9 AGP_ST[0..2]

M10-P/(M9+X)
(1/6)

ZV PORT / EXT TMDS / GPIO / ROM

AGP_ST[0..2]

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI/AGP

AGP_C/BE#[0..3]

9 AGP_C/BE#[0..3]

H29
H28
J29
J28
K29
K28
L29
L28
N28
P29
P28
R29
R28
T29
T28
U29
N25
R26
P25
R27
R25
T25
T26
U25
V27
W26
W25
Y26
Y25
AA26
AA25
AA27

DAC1

9 AGP_SBA[0..7]

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP8X

AGP_SBA[0..7]

LVDS

AGP_AD[0..31]

AGP_AD[0..31]

CLK

AGP, DAC & LVDS INTERFACE

U38A

RSET

AH26

DDC1DATA
DDC1CLK

AF25
AF24

AUXWIN

AF26

TEST_MCLK/(NC)

B6

TEST_YCLK/(NC)

E8

PLLTEST/(NC)

AE25

RSTB_MSK/(NC)

AG29

R
G
B
DACA_HSYNC
DACA_VSYNC
AGP_RSET 1
R75
DDC_DATA
DDC_CLK
1
R486

R
23
G
23
B
23
DACA_HSYNC 23
DACA_VSYNC 23

L4

FCM2012C-800_0805
2.2U_0805_16V4Z

1
C33

FREQOUT

(15mil)
2
499_0402_1%

VDD

REF

XIN MODOUT

XOUT

NC

PD#

VSS

1
R14
2

R445

ASM3P1819N-SR_SO8

DDC_DATA 23
DDC_CLK 23

2
10K_0402_5%

SS%

XTALIN_SS
2
22_0402_5%
1
10K_0402_5%
2
1
+3VS
R427
@10K_0402_5%
A

+3VS

Compal Electronics, Inc.


Title
1
2
R484
1K_0402_5%

ATI M10-P & M9+X (AGP BUS)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Size

Document Number

R ev
1.0

LA-2371
Date:

, 28, 2004

Sheet
1

17

of

56

NMAA[0..13]

21

NMAA[0..13]

21

NDQMA[0..7]

21

NMDA[0..63]

21 NMDA[0..63]

MEMORY
INTERFACE A

NDQSA[0..7]

NDQMA[0..7]
NDQSA[0..7]

22

NMDB[0..63]

22

NMAB[0..13]

22

NDQMB[0..7]

22

NDQSB[0..7]

U38B

L25
L26
K25
K26
J26
H25
H26
G26
G30
D29
D28
E28
E29
G29
G28
F28
G25
F26
E26
F25
E24
F23
E23
D22
B29
C29
C25
C27
B28
B25
C26
B26
F17
E17
D16
F16
E15
F14
E14
F13
C17
B18
B17
B15
C13
B14
C14
C16
A13
A12
C12
B12
C10
C9
B9
B10
E13
E12
E10
F12
F11
E9
F9
F8

DQA0
DQA1
DQA2
DQA3
DQA4
DQA5
DQA6
DQA7
DQA8
DQA9
DQA10
DQA11
DQA12
DQA13
DQA14
DQA15
DQA16
DQA17
DQA18
DQA19
DQA20
DQA21
DQA22
DQA23
DQA24
DQA25
DQA26
DQA27
DQA28
DQA29
DQA30
DQA31
DQA32
DQA33
DQA34
DQA35
DQA36
DQA37
DQA38
DQA39
DQA40
DQA41
DQA42
DQA43
DQA44
DQA45
DQA46
DQA47
DQA48
DQA49
DQA50
DQA51
DQA52
DQA53
DQA54
DQA55
DQA56
DQA57
DQA58
DQA59
DQA60
DQA61
DQA62
DQA63

NMAB[0..13]
NDQMB[0..7]
NDQSB[0..7]

U38C

M10-P/(M9+X)
AA0
(2/6)
AA1

MEMORY INTERFACE
A

NMDA0
NMDA1
NMDA2
NMDA3
NMDA4
NMDA5
NMDA6
NMDA7
NMDA8
NMDA9
NMDA10
NMDA11
NMDA12
NMDA13
NMDA14
NMDA15
NMDA16
NMDA17
NMDA18
NMDA19
NMDA20
NMDA21
NMDA22
NMDA23
NMDA24
NMDA25
NMDA26
NMDA27
NMDA28
NMDA29
NMDA30
NMDA31
NMDA32
NMDA33
NMDA34
NMDA35
NMDA36
NMDA37
NMDA38
NMDA39
NMDA48
NMDA49
NMDA50
NMDA51
NMDA52
NMDA53
NMDA54
NMDA55
NMDA56
NMDA57
NMDA58
NMDA59
NMDA60
NMDA61
NMDA62
NMDA63
NMDA40
NMDA41
NMDA42
NMDA43
NMDA44
NMDA45
NMDA46
NMDA47

NMDB[0..63]

AA2
AA3
AA4
AA5
AA6
AA7
AA8
AA9
AA10
AA11
AA12/(AA13)
AA13/(AA12)
AA14/(NC)

E22
B22
B23
B24
C23
C22
F22
F21
C21
A24
C24
A25
E21
B20
C19

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMAA12
NMAA13

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

J25
F29
E25
A27
F15
C15
C11
E11

NDQMA0
NDQMA1
NDQMA2
NDQMA3
NDQMA4
NDQMA6
NDQMA7
NDQMA5

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

J27
F30
F24
B27
E16
B16
B11
F10

NDQSA0
NDQSA1
NDQSA2
NDQSA3
NDQSA4
NDQSA6
NDQSA7
NDQSA5

RASA#

A19

NMRASA#

CASA#

E18

NMCASA#

WEA#

E19

NMWEA#

CSA0#

E20

NMCSA0#

CSA1#

F20

NMCSA1#

CKEA

B19

NMCKEA

CLKA0
CLKA0#

B21
C20

NMCLKA0
NMCLKA0#

CLKA1
CLKA1#

C18
A18

NMCLKA1
NMCLKA1#

NMDB8
NMDB9
NMDB10
NMDB11
NMDB12
NMDB13
NMDB14
NMDB15
NMDB0
NMDB1
NMDB2
NMDB3
NMDB4
NMDB5
NMDB6
NMDB7
NMDB16
NMDB17
NMDB18
NMDB19
NMDB20
NMDB21
NMDB22
NMDB23
NMDB24
NMDB25
NMDB26
NMDB27
NMDB28
NMDB29
NMDB30
NMDB31
NMDB56
NMDB57
NMDB58
NMDB59
NMDB60
NMDB61
NMDB62
NMDB63
NMDB40
NMDB41
NMDB42
NMDB43
NMDB44
NMDB45
NMDB46
NMDB47
NMDB48
NMDB49
NMDB50
NMDB51
NMDB52
NMDB53
NMDB54
NMDB55
NMDB32
NMDB33
NMDB34
NMDB35
NMDB36
NMDB37
NMDB38
NMDB39

NMRASA# 21
NMCASA# 21
NMWEA# 21
NMCSA0# 21
NMCSA1# 21
NMCKEA 21
NMCLKA0 21
NMCLKA0# 21
NMCLKA1 21
NMCLKA1# 21

D30
B13

DIMA0
DIMA1
MVREFD

B7

MVREFD

MVREFS/(NC)

B8

MVREFS

D7
F7
E7
G6
G5
F5
E5
C4
B5
C5
A4
B4
C2
D3
D1
D2
G4
H6
H5
J6
K5
K4
L6
L5
G2
F3
H2
E2
F2
J3
F1
H3
U6
U5
U3
V6
W5
W4
Y6
Y5
U2
V2
V1
V3
W3
Y2
Y3
AA2
AA6
AA5
AB6
AB5
AD6
AD5
AE5
AE4
AB2
AB3
AC2
AC3
AD3
AE1
AE2
AE3

DQB0
DQB1
DQB2
DQB3
DQB4
DQB5
DQB6
DQB7
DQB8
DQB9
DQB10
DQB11
DQB12
DQB13
DQB14
DQB15
DQB16
DQB17
DQB18
DQB19
DQB20
DQB21
DQB22
DQB23
DQB24
DQB25
DQB26
DQB27
DQB28
DQB29
DQB30
DQB31
DQB32
DQB33
DQB34
DQB35
DQB36
DQB37
DQB38
DQB39
DQB40
DQB41
DQB42
DQB43
DQB44
DQB45
DQB46
DQB47
DQB48
DQB49
DQB50
DQB51
DQB52
DQB53
DQB54
DQB55
DQB56
DQB57
DQB58
DQB59
DQB60
DQB61
DQB62
DQB63

M10-P/(M9+X)
(3/6)

N5
M1
M3
L3
L2
M2
M5
P6
N3
K2
K3
J2
P5
P3
P2

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMAB12
NMAB13

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

E6
B2
J5
G3
W6
W2
AC6
AD2

NDQMB1
NDQMB0
NDQMB2
NDQMB3
NDQMB7
NDQMB5
NDQMB6
NDQMB4

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

F6
B3
K6
G1
V5
W1
AC5
AD1

NDQSB1
NDQSB0
NDQSB2
NDQSB3
NDQSB7
NDQSB5
NDQSB6
NDQSB4

RASB#

R2

NMRASB#

CASB#

T5

NMCASB#

WEB#

T6

NMWEB#

CSB0#

R5

NMCSB0#

CSB1#

R6

NMCSB1#

CKEB

R3

NMCKEB

CLKB0
CLKB0#

N1
N2

NMCLKB0
NMCLKB0#

CLKB1
CLKB1#

T2
T3

NMCLKB1
NMCLKB1#

MEMVMODE0
MEMVMODE1

C6
C7

AB0
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AB11
AB12/(AB13)
AB13/(AB12)
AB14/(NC)

MEMORY INTERFACE B

NMRASB# 22
NMCASB# 22
NMWEB# 22
NMCSB0# 22
NMCSB1# 22
NMCKEB

22

NMCLKB0 22
NMCLKB0# 22

NMCLKB1 22
NMCLKB1# 22
+1.8VS

DIMB0
DIMB1
MEMTEST

R152 1
R143 1

2 4.7K_0402_5%
2 4.7K_0402_5%

E3
AA3
C8

VSS_MEMTEST
(15mil)

R145
1
2
47_0402_5%

SA002160E00(0301021300)
SA002160E00(0301021300)

+2.5VS

+2.5VS

R155

R156
1K_0402_1%
MVREFS

(25 mil)

R159
1K_0402_1%

C211
0.1U_0402_16V4Z

R160
1K_0402_1%

0.1U_0402_10V6K

C212

(25 mil)

MVREFD
A

1K_0402_1%

Compal Electronics, Inc.


Title

ATI M10-P/M9+X DDR-A


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
1.0

LA-2371
Date:

, 28, 2004

Sheet
1

18

of

56

POWER INTERFACE

POWER Sequence
3.3VS --> 2.5VS --> 1.8VS --> +VGA_Core --> +1.5VS

U38D

+1.5VS

+VDD_PNLPLL1.8

+VDD_DAC1.8
+VDD_DAC2.5
+VDD_DAC1.8

VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1/(CLKAFB)
VDDR1/(CLKBFB)

AC11
AC20
H11
H20
L23
P8
Y23
Y8

VDDC15/(VDDC18)
VDDC15/(VDDC18)
VDDC15/(VDDC18)
VDDC15/(VDDC18)
VDDC15/(VDDC18)
VDDC15/(VDDC18)
VDDC15/(VDDC18)
VDDC15/(VDDC18)

AK12
AJ12

TPVDD
TPVSS

AH24
AG21
AH21
AF22

AVDD
A2VDD
A2VDD
A2VDDQ

+2.5VDDRH

The differ between +2.5VS and +1.8VS should not be greater than 1.2V

VDDRH0
VDDRH1

F18
N6

VSSRH0
VSSRH1

F19
M6

MPVDD
MPVSS

A7
A6

+VDD_MEMPLL1.8

PVDD
PVSS

AK28
AJ28

+VDD_PLL1.8

VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3

AC19
AC21
AC22
AC8
AD19
AD21
AD22
AD7

+3VS

0.1U_0402_10V6K

VDDR4
VDDR4
VDDR4
VDDR4
VDDR4

C150
22U_1206_10V4Z

LVDDR_25/(LVDDR_18_25)
LVDDR_25/(LVDDR_18_25)
LVDDR_18
LVDDR_18
LPVDD

AE20
AE17
AF21
AE15
AJ20

LVSSR
LVSSR
LVSSR
LVSSR
LPVSS

AF20
AF15
AE19
AE16
AJ19

VDD1DI
VDD2DI

AE24
AE22

VSS1DI
VSS2DI

AE23
AE21

AH23
AD24

AVSSN
AVSSQ

TXVDDR
TXVDDR

AF13
AF14

TXVSSR
TXVSSR
TXVSSR

AG13
AG14
AH12

C165

2
0.1U_0402_10V6K

0.01U_0402_25V4Z 0.1U_0402_10V6K

C79

C184

2
0.1U_0402_10V6K

C104

C128

0.1U_0402_10V6K

C183

C101

2
2
2
0.01U_0402_25V4Z
0.1U_0402_10V6K

C109

0.01U_0402_25V4Z0.1U_0402_10V6K
1

C124

C138

C176

2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K

0.1U_0402_10V6K

C91

C115

2
2
0.1U_0402_10V6K

+2.5VDDRH

1
C100
2.2U_0805_16V4Z

L8
1
2
CHB1608U301_0603
1

C72
0.1U_0402_10V6K

+1.5VS

L11
1
2
CHB1608U301_0603

(20 mil)

+2.5VS

C130

+2.5VS

C143

1
C121
4.7U_0805_10V4Z

0.1U_0402_10V6K
2

+VDD_PNLPLL1.8

+VDD_PLL1.8
L6
1
2
CHB1608U301_0603

(20 mil)

+1.5VS
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP

A2VSSN
A2VSSN
A2VSSQ

C139

(20 mil)

C61
10U_0805_10V4Z

C65

C69

C62

0.1U_0402_10V6K

L7
1
2
CHB1608U301_0603

(20 mil)

+1.8VS

10U_0805_10V4Z

+1.8VS

C64
0.1U_0402_10V6K

0.1U_0402_10V6K
+VDD_DAC1.8

+VDD_MEMPLL1.8
L10
1
2
CHB1608U301_0603

(20 mil)
C103
10U_0805_10V4Z

C82

C217

0.1U_0402_10V6K

0.1U_0402_10V6K

+VDD_PNLIO1.8
+VDD_PNLPLL1.8

10U_0805_10V4Z

0.1U_0402_10V6K
C75

C74

1
C78

0.1U_0402_10V6K

+1.8VS

CHB1608U301_0603

2
0.1U_0402_10V6K
+3VS

+VDD_PNLIO2.5
0.1U_0402_10V6K

(20 mil)

+VDD_DAC1.8
1

C46

C47

0.1U_0402_10V6K

L5
1
2
+2.5VS
CHB1608U301_0603
C48

+VDD_PNLIO1.8

2
0.1U_0402_10V6K

C80

C89

C90

0.01U_0402_25V4Z
1

C85

U3
22U_1206_10V4Z

10U_0805_10V4Z

+1.8VS

2.2U_0805_16V4Z
C218

L9

(20 mil)
C102

L15
1
2
CHB1608U301_0603

(20 mil)

+1.8VS

+VDD_PNLIO1.8
+VDD_PNLIO2.5

C35
AH22
AJ21
AF23

+VDD_DAC2.5

AC10
AC9
AD10
AD9
AG7

AA23
AA24
AB30
AC23
AC27
AE30
AF27
J30
M23
M24
N30
P23
P27
T23
T24
T30
U27
V23
V24
W30
Y27

+1.5VS

1U_0603_10V4Z

+2.5VS

M10-P/(M9+X)
(4/6)

I/O POWER

B1
B30
A15
A21
A28
A3
A9
AA1
AA4
AA7
AA8
AD4
D5
D8
D11
D13
D14
D17
D20
D23
D26
E27
F4
G7
G10
G13
G15
G19
G22
G27
H10
H13
H15
H17
H19
H22
J1
J23
J24
J4
J7
J8
L27
L8
M4
N4
N7
N8
R1
T4
T7
T8
V4
V7
V8
D19
R4

VOUT

GND

VIN

PG

EN

+3VS

0.1U_0402_10V6K

0.01U_0402_25V4Z

@MIC5205-2.8BM5_SOT23-5~D

C45
@470P_0402_50V7K

SA052050010(MIC5205-2.8BM5), max:150mA

SA002160E00(0301021300)

Compal Electronics, Inc.


Title

ATI M10-P/M9+X POWER-A


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
1.0

LA-2371
Date:

, 27, 2004

Sheet
1

19

of

56

U38E

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+VGA_CORE
H4
H8
H9
H12
H14
H18
H21
H23
H27
K1
K23
K24
K27
K30
K7
K8
L4
M30
M7
M8
N23
N24
N27
P4
R23
R24
R30
R7
R8
T1
T27
U23
U4
U8
V30
W23
W24
W27
W7
W8
Y4
G9
G12
G16
G18
G21
G24

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

CORE POWER

POWER
INTERFACE

SA002160E00(0301021300)

+VGA_CORE
22U_1206_10V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

0.01U_0402_25V4Z

0.01U_0402_25V4Z
1

1
C173

1
C172

1
C136

1
C125

1
C122

1
C140

C123

C92

C161

C137

+
C920

22U_1206_10V4Z
2

0.1U_0402_10V6K

0.1U_0402_10V6K

C230
220U_D2_4VM

+VGA_CORE

U38F

M12
M13
M14
M17
M18
M19
N12
N13
N14
N17
N18
N19
P12
P13
P14
P17
P18
P19
U12
U13
U14
U17
U18
U19
V12
V13
V14
V17
V18
V19
W12
W13
W14
W17
W18
W19

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

AB22
AB9
J10
J12
J14
J15
J16
J17
J19
J21
K22
K9
M22
M9
P22
P9
R22
R9
T22
T9
U22
U9
V22
V9
Y22
Y9

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

M10-P/(M9+X)
(6/6)
VDDC
VDDC

AD15
AD13
AC17
AC15
AC13

VDDCI
VDDCI
VDDCI
VDDCI

T12
M15
W16
R19

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

R12
R13
T13
R14
T14
N15
P15
R15
T15
U15
V15
W15
H16
M16
N16
P16
R16
T16
U16
V16
R17
T17
R18
T18
T19

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AA22
AA9
J11
J13
J18
J20
J22
J9
L22
L9
N22
N9
W22
W9

M10-P&M9+X VDDC
VDDC
COMMON
VDDC

CORE POWER

M10-P/(M9+X)
(5/6)

A10
A16
A2
A22
A29
AA30
AB1
AB23
AB24
AB27
AB4
AB7
AB8
AC12
AC14
AC16
AC18
AC4
AD12
AD16
AD18
AD25
AD30
AE27
AG11
AG15
AG18
AG22
AG27
AG5
AG9
AJ1
AJ30
AK2
AK29
C1
C28
C3
C30
D10
D12
D15
D18
D21
D24
D25
D27
D4
D6
D9
E4
F27

M10-P
ONLY

M9+X
ONLY

+VGA_CORE_CI

SA002160E00(0301021300)

0.01U_0402_25V4Z
0.01U_0402_25V4Z

220U_6SVPC220MV_6.3VM_R15

+2.5VS
0.1U_0402_10V6K
1
C119
22U_1206_10V4Z
2

1
C107
2

0.1U_0402_10V6K
1
C186
2

1
C166
2

0.1U_0402_10V6K

0.1U_0402_10V6K
1
C214
2

1
C81

0.01U_0402_25V4Z
C177

C105

0.1U_0402_10V6K

0.01U_0402_25V4Z

0.1U_0402_10V6K
1
C179
2

0.01U_0402_25V4Z

1
C192

1
C202

0.1U_0402_10V6K

C191

+VGA_CORE_CI
L14

0.1U_0402_10V6K

(20 mil)
C133
10U_0805_10V4Z

+VGA_CORE

CHB1608U301_0603

C160
C108
0.1U_0402_10V6K 0.1U_0402_10V6K
2

+2.5VS
0.1U_0402_10V6K

22U_1206_10V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

1
C220

1
C216

1
C204

1
C189

1
C178

1
C203

0.1U_0402_10V6K

0.01U_0402_25V4Z
C190

0.1U_0402_10V6K

0.01U_0402_25V4Z

C159

0.1U_0402_10V6K

0.01U_0402_25V4Z

1
C201

1
C200

1
C193

0.1U_0402_10V6K

C210

As close as ppossible to related pin


A

Compal Electronics, Inc.

0.1U_0402_10V6K
Title

As close as ppossible to related pin

ATI M10-P/M9+X POWER-B


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Size

Document Number

R ev
1.0

LA-2371
Date:

, 27, 2004

Sheet
1

20

of

56

VGA DDR FOR CHANNEL A


+2.5VS

+2.5VS
22U_1206_10V4Z

1
C572
22U_1206_10V4Z

0.1U_0402_10V6K

1
C558

1
C600

0.1U_0402_10V6K

1
C613

1
C588

1
C612

0.1U_0402_10V6K
1
C583
2

22U_1206_10V4Z

1
C584

1
C599

22U_1206_10V4Z

1
C246

1
C237

0.1U_0402_10V6K
1
C249

1
C259

0.1U_0402_10V6K
1
C248

1
C253

0.1U_0402_10V6K
1
C258

1
C255

1
C250
2

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

As close as ppossible to related pin

NMDA[0..63]

18 NMDA[0..63]

NDQSA[0..7]

U43

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

U17

DQS0
DQS1
DQS2
DQS3

VREF_1

N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

M2
L2
L3
N2

RAS#
CAS#
WE#
CS#

C634
0.1U_0402_10V6K

1K_0402_1%

18
18
18
18
18

18

NMCKEA

NMCKEA

NMCLKA0

NMCLKA0

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

R593

56.2_0402_1%
C610
10P_0402_50V8J
R598
1

18

56.2_0402_1%

NMCLKA0#

NMCLKA0#

R760
18

NMCSA1#

CKE
CK
CK#

C4
C11
H4
H11
L12
L13
M3
M4
N3

NC
NC
NC
NC
NC
NC
NC
NC
NC

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

0_0402_5%

NMCSA1_S#

N12
M11
M12

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

(25mil)

B3
H12
H3
B12

DM0
DM1
DM2
DM3

NDQSA6
NDQSA5
NDQSA4
NDQSA7

B2
H13
H2
B13

DQS0
DQS1
DQS2
DQS3

VREF_2

N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

M2
L2
L3
N2

RAS#
CAS#
WE#
CS#

R242
1K_0402_1%

C271
0.1U_0402_10V6K

+2.5VS

NMCKEA
18

NMCLKA1

NMCLKA1

N12

CKE

M11
M12

CK
CK#

C4
C11
H4
H11
L12
L13
M3
M4
N3

R241
56.2_0402_1%

NC
NC
NC
NC
NC
NC
NC
NC
NC

C274
10P_0402_50V8J

1
R240
56.2_0402_1%

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

18

NMCLKA1#

NMCLKA1#

NMCSA1_S#

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

(25mil)
1

R602

R249
1K_0402_1%

NDQMA6
NDQMA5
NDQMA4
NDQMA7

B2
H13
H2
B13

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

1K_0402_1%

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

NDQSA2
NDQSA1
NDQSA0
NDQSA3

R604

+2.5VS

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMAA12
NMAA13

DM0
DM1
DM2
DM3

NMDA19
NMDA18
NMDA17
NMDA20
NMDA22
NMDA23
NMDA21
NMDA16
NMDA13
NMDA14
NMDA15
NMDA8
NMDA12
NMDA11
NMDA9
NMDA10
NMDA7
NMDA6
NMDA5
NMDA3
NMDA2
NMDA4
NMDA1
NMDA0
NMDA25
NMDA24
NMDA28
NMDA27
NMDA30
NMDA29
NMDA31
NMDA26

B3
H12
H3
B12

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

NDQMA2
NDQMA1
NDQMA0
NDQMA3

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

+2.5VS

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMAA12
NMAA13

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

NDQSA[0..7]

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

18

NDQMA[0..7]

K4D263238A-GC_FBGA144

NMDA52
NMDA54
NMDA53
NMDA51
NMDA55
NMDA50
NMDA48
NMDA49
NMDA47
NMDA46
NMDA45
NMDA42
NMDA43
NMDA41
NMDA44
NMDA40
NMDA39
NMDA37
NMDA36
NMDA38
NMDA35
NMDA34
NMDA33
NMDA32
NMDA61
NMDA62
NMDA60
NMDA63
NMDA57
NMDA59
NMDA56
NMDA58

+2.5VS

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

NDQMA[0..7]

0.1U_0402_10V6K

NMAA[0..13]

NMAA[0..13]

18

0.1U_0402_10V6K

As close as ppossible to related pin

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

18

0.1U_0402_10V6K

K4D263238A-GC_FBGA144

Compal Electronics, Inc.


Title

VGA DDR FOR CHANNEL A


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
1.0

LA-2371
Date:

, 28, 2004

Sheet
1

21

of

56

+2.5VS
0.01U_0402_25V4Z

C511

0.1U_0402_10V6K

1
C530

1
C510

0.01U_0402_25V4Z

1
C497
2

0.1U_0402_10V6K

C495

1
22U_1206_10V4Z

1
C59

1
C87

0.01U_0402_25V4Z

0.01U_0402_25V4Z
1
C68
2

NDQMB0
NDQMB3
NDQMB2
NDQMB1

B3
H12
H3
B12

DM0
DM1
DM2
DM3

NDQSB0
NDQSB3
NDQSB2
NDQSB1

B2
H13
H2
B13

DQS0
DQS1
DQS2
DQS3

VREF_3

N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

M2
L2
L3
N2

RAS#
CAS#
WE#
CS#

C527
0.1U_0402_10V6K
18
18
18
18

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

18
NMCLKB0

NMCKEB

NMCLKB0

NMRASB#
NMCASB#
NMWEB#
NMCSB0#
NMCKEB

N12

CKE

M11
M12

CK
CK#

18

R522
56.2_0402_1%

10P_0402_50V8J
C506
2
18

NMCLKB0#

R528
56.2_0402_1%

NMCLKB0#

R761
18

NMCSB1#

0.1U_0402_10V6K

0.01U_0402_25V4Z

NMCSB1_S#

NC
NC
NC
NC
NC
NC
NC
NC
NC

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

0_0402_5%

C4
C11
H4
H11
L12
L13
M3
M4
N3

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

NMDB0
NMDB1
NMDB2
NMDB3
NMDB4
NMDB5
NMDB7
NMDB6
NMDB27
NMDB25
NMDB28
NMDB30
NMDB24
NMDB31
NMDB26
NMDB29
NMDB17
NMDB18
NMDB16
NMDB19
NMDB20
NMDB21
NMDB22
NMDB23
NMDB15
NMDB13
NMDB14
NMDB12
NMDB11
NMDB9
NMDB10
NMDB8

+2.5VS

R62
1K_0402_1%

(25mil)

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMAB12
NMAB13

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

NDQMB5
NDQMB6
NDQMB7
NDQMB4

B3
H12
H3
B12

DM0
DM1
DM2
DM3

NDQSB5
NDQSB6
NDQSB7
NDQSB4

B2
H13
H2
B13

DQS0
DQS1
DQS2
DQS3

VREF_4

N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

M2
L2
L3
N2

RAS#
CAS#
WE#
CS#

R59
1K_0402_1%
+2.5VS

C60
0.1U_0402_10V6K

NMRASB#
NMCASB#
NMWEB#
NMCSB0#
NMCKEB

18

NMCLKB1

NMCLKB1
R72
56.2_0402_1%

C71

10P_0402_50V8J

56.2_0402_1%
2

18

NMCLKB1#

NMCLKB1#

R74

NMCSB1_S#

N12

CKE

M11
M12

CK
CK#

C4
C11
H4
H11
L12
L13
M3
M4
N3

NC
NC
NC
NC
NC
NC
NC
NC
NC

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

(25mil)

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMAB12
NMAB13

2
1

R534
1K_0402_1%

U37

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

NDQSB[0..7]

+2.5VS

C67

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

NDQMB[0..7]

1
C77

NMDB[0..63]

U10

R541
1K_0402_1%

0.1U_0402_10V6K
1
C86

As close as ppossible to related pin

NDQSB[0..7]

18

1
C70

0.01U_0402_25V4Z

NDQMB[0..7]

22U_1206_10V4Z
1

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

18

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

NMDB[0..63]

C66

NMAB[0..13]

NMAB[0..13]

18

0.1U_0402_10V6K

As close as ppossible to related pin

18

C76

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

C502

0.1U_0402_10V6K

K4D263238A-GC_FBGA144

NMDB47
NMDB45
NMDB46
NMDB44
NMDB42
NMDB41
NMDB43
NMDB40
NMDB55
NMDB54
NMDB53
NMDB52
NMDB51
NMDB49
NMDB48
NMDB50
NMDB62
NMDB60
NMDB63
NMDB61
NMDB58
NMDB57
NMDB59
NMDB56
NMDB39
NMDB38
NMDB37
NMDB36
NMDB35
NMDB33
NMDB34
NMDB32

+2.5VS

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

1
C491

0.1U_0402_10V6K

1
C503

22U_1206_10V4Z

1
C476
22U_1206_10V4Z

VGA DDR FOR CHANNEL B

+2.5VS
0.1U_0402_10V6K

K4D263238A-GC_FBGA144

Compal Electronics, Inc.


Title

VGA DDR FOR CHANNEL B


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
1.0

LA-2371
Date:

, 28, 2004

Sheet
1

22

of

56

POP For EFW00


DEPOP For EEW00

CRT Conn.

CH491D_SC59
1
1A_6VDC_MINISMDC110 C6

1
C3

R441

C15

2 6P_0402_50V8K

+CRT_VCC

DAC A_HSYNC_1

R9

L31
1

CHB1608B121_0603
2

L1
1

CHB1608B121_0603
2
1

2
2

1
C9

R8
1K_0402_5%

+CRT_VCC

5
1

0.1U_0402_16V4Z
2 A

P
OE#

2
0_0402_5%

6P_0402_50V8K

C7

R1
2.2K_0402_5%

R2

R426

2.2K_0402_5%

Q49
2N7002_SOT23

2
DDC_DATA_1
DAC A_HSYNC_2
DACA_VSYNC_2
1
C5

C452
@68P_0402_50V8K

DDC_CLK_1

10 CRT_HSYNC

10 CRT_VSYNC

2
@0_0402_5%

2
@0_0402_5%

R11

R15

R437

4.7K_0402_5% 4.7K_0402_5%

POP For EFW00


DEPOP For EEW00

Q48
2N7002_SOT23

C8

C14

+3VS

R7

2.2K_0402_5%

1
R13

2
0_0402_5%

DDC_DATA 17

220P_0402_50V7K

1
R436

2
0_0402_5%

DDC_CLK 17

1
R12

2
@0_0402_5%

3VDDCDA 10

1
R435

2
@0_0402_5%

3VDDCCL 10

@68P_0402_50V8K
220P_0402_50V7K

DACA_VSYNC_1
Y U14
SN74AHCT1G125GW_SOT353-5

17 DACA_VSYNC

P
OE#

2
0_0402_5%

U2
SN74AHCT1G125GW_SOT353-5

+3VS

220P_0402_50V7K

1
R10

2
6P_0402_50V8K 6P_0402_50V8K

C4

2
0.1U_0402_16V4Z

17 DACA_HSYNC

6P_0402_50V8K

5
1

6P_0402_50V8K

1
C13

+3VS

2
G

75_0402_1%
75_0402_1%

C12

+CRT_VCC

75_0402_1%

+CRT_VCC

R442

CRT_B

2
0_0402_5%

1
R429
R439

CRT_G

17

CRT_R

1
2
FCM2012C-800_0805
L33
1
2
FCM2012C-800_0805
L32
1
2
FCM2012C-800_0805
1
1
C10
C11

2
0_0402_5%

2
0_0402_5%

1
R431

1
R432

17

17

2
G

6
11
1
7
12
2
8
13
3
CRT_VCC 9
14
4
10
15
5

JP12
SUYIN_7849S-15G2T-HC

0.1U_0402_16V4Z

L34

+CRT_VCC
F1

2
@0_0402_5%

1
R428

+R_CRT_VCC
D40

2
+3VS

R438
1

+5VS

R440
1

NB_CRT_B
75_0402_1%
2

2
@0_0402_5%

10

1
R430

D4
D2
D3
@DAN217_SOT23 @DAN217_SOT23 @DAN217_SOT23

NB_CRT_G
75_0402_1%
2

2
@0_0402_5%

10

1
R433

R443
1

75_0402_1%
2

NB_CRT_R

10

POP For EEW00


DEPOP For EFW00

POP For EFW00


DEPOP For EEW00

Compal Electronics, Inc.


Title

CRT Connector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number

Rev
1.0

LA-2371
, 28, 2004

Sheet
1

23

of

56

POP For EEQ00


DEPOP For EFQ00

2
@0_0402_5%

D6
@DAN217_SOT23

1
C30

CRMA

2
0_0402_5%

2
0_0402_5%

R20

R33

1
L2
1
L3

C34
@0.1U_0402_16V4Z
JP15
1
2
3
4

LUMA_1

R32
75_0402_1%

C28

CRMA_1

1
2
C27
22P_0402_50V8J

C29

C17

@DAN217_SOT23

2
CHB1608B121_0603

75_0402_1%
2

D5

2
CHB1608B121_0603

B1+

1
2
3
4

C16

1.
2.
3.
4.

Y
C
Y
C

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

DAC_BRIG
INVT_PWM

+3VS

5
6

17

1
R19

LUMA

17

22P_0402_50V8J
2

JP2

+3VS
40
40

GND
GND

R21

POP For EEQ00


DEPOP For EFQ00

75_0402_1% R34
2

Width: 40mils

TV_CRMA

2
@0_0402_5%

10

75_0402_1% R31
2
1

1
R18

TV_LUMA

TV-OUT Conn.

10

NB_EDID_CLK

NB_EDID_CLK

10 TXBCLK-_NB
10 TXBCLK+_NB
2

10
10
10
10
10
10

ground
ground
(luminance+sync)
(crominance)

SUYIN_030008FR004T100ZL

TXB1-_NB
TXB1+_NB
TXB2+_NB
TXB2-_NB
TXB0+_NB
TXB0-_NB

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

B1+
DISPOFF#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

KC FBM-L11-201209-221LMAT_0805
L55
B+
1
2

+LCDVDD
NB_EDID_DAT

NB_EDID_DAT 9
TXACLK+_NB 10
TXACLK-_NB 10
TXA2+_NB
TXA2-_NB
TXA1-_NB
TXA1+_NB
TXA0-_NB
TXA0+_NB

10
10
10
10
10
10

@ACES_88107-3000

270P_0402_50V7K
2

270P_0402_50V7K

330P_0402_50V7K

330P_0402_50V7K

POP For EFW00


DEPOP For EEW00

B1+

C862 1000P_0402_50V7K
1
2

B1+

C864
1

1000P_0402_50V7K
2

+3VS

B+

BKOFF#

DISPOFF#
1 C23

CH751H-40_SC76

R6

EDID_CLK

C37
1

EDID_DATA

C22
1

1
C21

@10U_1210_35V4Z

@100K_0402_5%

40

Use for B+ discharge


2

R5
10K_0402_5%
D1

47P_0402_50V8J
2
47P_0402_50V8J
2

NB_EDID_CLK

C41
1

NB_EDID_DAT

C32
1

47P_0402_50V8J
2
47P_0402_50V8J
2

2 220P_0402_50V7K

Width: 40mils

FAN CONN. 1
+12VALW

B1+
40
40

C291
0.1U_0402_16V4Z
1
2

+5VALW

OUT

EN_FAN1

LM358A_SO8

2
B

Q25
E

C281

C299
10U_0805_10V4Z

CH355_SC76
FA N1

0.1U_0402_16V4Z

EDID_CLK

POP For EFQ00


DEPOP For EEQ00

17
17

TZCLKTZCLK+

17
17
17
17
17
17

TZOUT1TZOUT1+
TZOUT2+
TZOUT2TZOUT0+
TZOUT0-

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

B1+
DISPOFF#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

+LCDVDD
EDID_DATA

EDID_DATA 17
TXCLK+ 17
TXCLK- 17
TXOUT2+
TXOUT2TXOUT1TXOUT1+
TXOUT0TXOUT0+

17
17
17
17
17
17

ACES_88107-3000

R272
10K_0402_5%

1
2
R267
100_0402_5%

-IN

FMMT619_SOT23D26

+IN

8
P
2

40 EN_DFAN1

E N_DFAN1

C36
0.1U_0402_16V4Z

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

DAC_BRIG
INVT_PWM

17 EDID_CLK

1
U54A

KC FBM-L11-201209-221LMAT_0805
L57
B+
1
2

JP1

+3VS

+IN
OUT

EN_FAN2

-IN

R756
10K_0402_5%

1
2
R757
100_0402_5%

LM358A_SO8

C856
0.1U_0402_16V4Z

FMMT619_SOT23D55
Q61

@TC7SH08FU_SSOP5

C852
10U_0805_10V4Z

ENVDD

ENV DD

1
R48

2
0_0402_5%

D54
1N4148_SOT23

1
C26

+LCDVDD

Q2

0.047U_0402_50V7K
200K_0402_5%

C31
0.1U_0402_16V4Z

C25
4.7U_0805_10V4Z

Q4
DTC124EK_SC59
3

2
8.2K_0402_5%

R58
1.2K_0402_5%

1
1
R754

1
2
R35
47K_0402_5%

DTC124EK_SC59
9,17

1
2

2
G
Q3
2N7002_SOT23

CH355_SC76
FA N2

4.7U_0805_10V4Z
2
Q1
AO3400_SOT23

2
G

R16

2
B

1
1

E N_DFAN2

40 EN_DFAN2

C24

ENV DD

7,9,28 NB_PWRGD

R40
10K_0402_5%

220_0402_5%

+5VALW

U54B

100K_0402_5%
R23

U4

1
@0.1U_0402_16V4Z
5

C857
0.1U_0402_16V4Z

+5VALW

1000P_0402_50V7K
2

40 FAN_SPEED1
+12VALW

+LCDVDD

+3VS

C39

R22

2
10K_0402_5%

+3VS

+12VALW

ACES_85205-0300

FAN CONN. 2

1
R617

1
2
3

+3VS

JP21

2
1000P_0402_50V7K
1
C674

1 2

2
8.2K_0402_5%

1
R269

D25
1N4148_SOT23
1
C676

JP30
C850

2 1000P_0402_50V7K

1
2
3
ACES_85205-0300

1
+3VS

1
R753

2
10K_0402_5%

40 FAN_SPEED2

C851
1000P_0402_50V7K

Compal Electronics, Inc.


Title

CRT,TV-OUT & LVDS Connector


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size
C

Document Number

Date:

, 28, 2004

Rev
1.0

LA-2371
Sheet
E

24

of

56

+3VS
9,12
9

PCI_SERR#
PCI_PERR#
PCI_TRDY#
PCI _IRDY#

Trace length of PCI_CLK_R + PCI_CLK_FB should


be less than 200 mils.

A_CBE#[0..3]

A_CBE#[0..3]

RP21

Layout note:

A_AD[0..31]

A_AD[0..31]

4
3
2
1

U30A

CLK_ALINK_SB
H_CPUFERR#

R300

@10_0402_5%
1

C296
@15P_0402_50V8J

+3VS
1 8.2K_0402_5%

+3VS

A_SERR#

+3VS

R642

R277

1K_0402_5%

4.7K_0402_5%

9
A_STROBE#
9
A_DEVSEL#
9
A_ACAT#
9
A_END#
9,12
A_PAR
9
A_OFF#

PM_STPCPU#

PCI_STP#

9
9

+CPU_CORE

A_SBREQ#
A_SBGNT#

5,51 PM_STPCPU#
H_INIT#
H_A20M#
H_SLP#
H_INTR
H_NMI
H_SMI#
H_STPCLK#
H_IGNNE#

2
2
2
2
2
2
2
2

200_0402_5%
200_0402_5%
200_0402_5%
200_0402_5%
200_0402_5%
200_0402_5%
200_0402_5%
200_0402_5%

9,17,30,34
30
32,33
29,32,33

CPU_STP#/DPSLP#
PCI_STP#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

C20
P20
B23
P21

A_INTA#
INTB#
INTC#
INTD#

RTCX1

AC12

X1

RTCX2

AC11

X2

1
@20M_0603_5%

4.7K_0402_5%
12P_0402_50V8J

1
IN

OUT

R334
2

N20
R23

R320

1
C352

NC

NC

1
C356

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

Y3

PM_STPCPU#
PCI_STP#

+3VS

RTCX1

12P_0402_50V8J

1
1
1
1
1
1
1
1

1 R347
20M_0603_5%
RTCX2

R162
R67
R529
R68
R71
R66
R163
R65

A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3
A_STROBE#
A_DEVSEL#
A_ACAT#
A_END#
A_PAR
A_OFF#
A_SERR#
A_SBREQ#
A_SBGNT#

2
R650
R303
R653
R310

51 PM_DPRSLPVR
32.768KHZ_12.5P_1TJS125DJ2A073

H_PWRGOOD
H_INTR
H_NMI
H_INIT#
H_SMI#
H_SLP#
H_IGNNE#
H_A20M#

H_STPCLK#

1
1
1
1

2
2
2
2

H_A20M#
H_CPUFERR#

GPIO0
0_0402_5%
10K_0402_5% SB_APIC_D0
10K_0402_5% SB_APIC_D1
1K_0402_1%

B18
E4
B17
B16
C17
C16
F19
D17
D18
E19
E16
E17
E18
C19
C18
B19

CPURSTIN#
CPU_PWRGD
INTR/LINT0
NMI/LINT1
INIT
SMI#
SLP#
IGNNE#
A20M#
FERR#
STPCLK#
SSMUXSEL/GPIO0
DPRSLPVR
APIC_D0
APIC_D1
APIC_CLK

SB_PCI_RST#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
PCI_FRAME#
PCI_DEVSEL#
PCI _IRDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PM_CLKRUN#

GPIO1/ROMCS#

100K_0402_5%
R649

5
5
5
5
5
5
5
5

CPURSTIN#
H_PW RGOOD

PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24/RTC_AD7
AD25/RTC_AD6
AD26/RTC_AD5
AD27/RTC_AD4
AD28/RTC_AD3
AD29/RTC_AD2
AD30/RTC_AD1
AD31/RTC_AD0
CBE#0/ROMA10
CBE#1/ROMA1
CBE#2/ROMWE#
CBE#3/RTC_RD#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR
STOP#
PERR#
SERR#
REQ#0
REQ#1
REQ#2
REQ#3/PDMAREQ0#
REQ#4/PLLBP33/PDMAREQ1#
GNT#0
GNT#1
GNT#2
GNT#3/PDMAGNT0#
GNT#4/PLLBP50/PDMAGNT1#
CLKRUN#

C15
B1
C1
A1
D2
B2
C2
A2
D3
C3
A3
D4
B4
C4
A4
D5
B5
C8
D8
B8
A8
C9
D9
B9
A9
C10
B10
D11
A10
C11
B11
D12
A11
B3
C5
A7
D10
B7
A6
C7
D7
A5
B6
C6
D6
B12
C12
D13
A12
C13
A13
B13
C14
D14
B14
A20
AB5

2
2
2
2
2
2
2

39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
@39_0402_5%
2 39_0402_5%
C3091

PCI_AD[0..31]

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#0
LDRQ#1
SERIRQ

AC13

SIRQ

USBOC5#/GPM1
RTC_ALE/USBOC4#/GPIO3
RTC_WR#/RTC_CLKOUT
RTC_CS#/USBOC3#/GPIO2
VBAT
RTC_GND

AA2
AB7
AB8
AC8
AC10
AB11

RP22
PCI_FRAME#
PCI_DEVSEL#
PCI_STOP#
PCI_PAR

2 22P_0402_50V8J

8.2K _8P4R_0804_5%
RP16

PCI_C/BE#[0..3]

Place J1 close
to DDR-SODIMM

LPC_AD0
LPC_AD1
LPC_AD3
LPC_AD2

SIRQ
LPC_DRQ0#
LPC_FRAME#
LPC_DRQ1#

SERIRQ

30,38,40

USB_OC5#

R385 1

2 10K_0402_5%

USB_OC4#

R361 2

1 10K_0402_5%

USB_OC3#

R356 2

1 10K_0402_5%

+3V

+SB_VBAT
H_PW RGOOD

No short
JOPEN1

14

OE#

PCIRST#

PCIRST#

2
+CHGRTC

C443

W=20mils

29,30,32,33,34,38

12

H_INIT#
H_INTR
O

11

NB_RST#

NB_RST# 7,17,40

H_NMI

2
C770
2
C698
2
C716
2
C714
2
C715
2
C705
2
C703
2
C331
2
C335

1
220P_0402_50V7K
1
220P_0402_50V7K
1
220P_0402_50V7K
1
220P_0402_50V7K
1
220P_0402_50V7K
1
220P_0402_50V7K
1
220P_0402_50V7K
1
220P_0402_50V7K
1
220P_0402_50V7K

SN74LVC125APWLE_TSSOP14

Place Caps Close to CPU Socket

220_0805_5%
2
1

3
R416
1

SB_PCI_RST#

39 SB_PCI_RST#

NBRST#

U11D

R516
10K_0402_5%

R280

2
@0_0402_5%

SN74LVC125APWLE_TSSOP14

0.1U_0402_16V4Z

Title

Compal Electronics, Inc.


SB200M(1/4)- PCI/CPU/LPC

1U_0603_10V4Z

220_0805_5%
2

**

H_A20M#
0.1U_0402_16V4Z

BAS40-04_SOT23

1 4.7K_0402_5%

+3VS

H_IGNNE#

+RTCVCC

5
6
7
8

8 10K_0804_8P4R_5%
7
6
5

1
2
3
4

PM_CLKRUN# R309 2

+3VALW

U40A

4
3
2
1

15K_0804_8P4R_5%

H_SMI#

C474

RP46

H_STPCLK#

+RTCBATT

R415
1

R339
1
2
8.2K_0402_5%
RP45

D39

C442

PCI_GNT#4

+RTCBATT

RTCBATT

+SB_VBAT

R345
1
2
8.2K_0402_5%

LPC_AD0 38,40
LPC_AD1 38,40
LPC_AD2 38,40
LPC_AD3 38,40
LPC_FRAME# 38,40
LPC_DRQ0# 40
LPC_DRQ1# 38

13

5
6
7
8

PCI_REQ#4

PCI_C/BE#[0..3] 29,30,32,33,34

PCI_FRAME# 29,30,32,33,34
PCI_DEVSEL# 29,30,32,33,34
PCI_IRDY# 29,30,32,33,34
PCI_TRDY# 29,30,32,33,34
PCI_PAR 29,30,32,33,34
PCI_STOP# 29,30,32,33,34
PCI_PERR# 29,30,32,33,34
PCI_SERR# 29,30,32,33
PCI_REQ#0 34
PCI_REQ#1 32
PCI_REQ#2 30
PCI_REQ#3 29
PCI_REQ#4 33
PCI_GNT#0 34
PCI_GNT#1 32
PCI_GNT#2 30
PCI_GNT#3 29
PCI_GNT#4 33
PM_CLKRUN# 29,32,33,38,40

OE#

BATT1

4
3
2
1

8.2K _8P4R_0804_5%

10K_0402_5%
2

1 R640 2
8.2K_0402_5%
PCI_PIRQB# 1 R645 2
8.2K_0402_5%
PCI_PIRQC# 1 R297 2
8.2K_0402_5%
PCI_PIRQD# 1 R646 2
8.2K_0402_5%
RP20
PCI_REQ#0
4
5
PCI_REQ#3
3
6
PCI_GNT#0
2
7
PCI_GNT#1
1
8

South bridge SB200


R809
GPIO0

5
6
7
8

8.2K _8P4R_0804_5%

H_SLP#

RTC Battery

4
3
2
1

PCI_PIRQA#

PCI_AD[0..31] 28,29,30,32,33,34

2 10K_0402_5%

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ0#
LPC_DRQ1#

8.2K _8P4R_0804_5%

CLK_PCI_MINI1 32
CLK_PCI_CB 30
CLK_PCI_LPC 40
CLK_PCI_1394 34
CLK_PCI_LAN 29
CLK_PCI_SIO 38
CLK_PCI_MINI2 33

PCI_GNT#2
PCI_GNT#3
PCI_REQ#2
PCI_REQ#1

R771 1

Y14
AA14
AB14
AA13
AB13
AC14
Y13

L PC

R279 2

H22
P23
L23
N23
N22
M23
M22
K22
M21
M20
L21
K21
L20
N21
K23
K20
F23
G21
F20
H21
F22
F21
G20
E21
E20
D23
D22
E22
D20
C23
D21
C22
L22
J23
G22
E23
H20
J21
G23
H23
J20
J22
P22
B21
B20

RTC

MMBT3904_SOT23
1

Q59

H_FERR#

A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3
A_STROBE#
A_DEVSEL#
A_ACAT#
A_END#
A_PAR
A_OFF#
A_SERR#
A_SBREQ#
A_SBGNT#

XTAL

2 2
1

PCICLK6 R661 1
PCICLK5 R658 1
PCICLK4 R662 1
PCICLK3 R665 1
PCICLK2 R651 1
PCICLK1 R654 1
PCICLK7 R668 1
PCI_CLK_R R315 1
PCI_CLK_FB

PCI CLKS

1
R643
130_0402_5%

470_0402_5%
R647
56_0402_5%

PULL DOWN FOR S3

B15
D16
A14
A15
A16
A17
D15
A18
A19

Part 1 of 3

PCICLKF
A_RST#

PCI INTERFACE

1
2

R638

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK_FB

SB200 SB
B22
R22

2 8.2K_0402_5% NBRST#

R278
1

A-LINK INTERFACE

+3VS

CLK_ALINK_SB

16 CLK_ALINK_SB

+CPU_CORE

CPU

+CPU_CORE

5
6
7
8

Size

Document Number

Rev
1.0

LA-2371
Date:
5

, 28, 2004

Sheet
1

25

of

56

2
2

@0_0402_5%
USB_RCOMP

11.5K_0603_0.5%R388
USB_OC0#

USB20P5+
USB20P5D

USB20P4+
USB20P4-

IAC_BITCLK

USB20P3+

@10_0402_5%

USB20P3-

R391

38

USBP2+

38
38

USBP1+

38

USBP1-

38

USBP0+

38

USBP0-

USB20P1+

R290

F1
F2
G1
G2

USB_HSDP0+
USB_FLDP0+
USB_HSDM0USB_FLDM0-

R5
W1
V4
V2

MCOL
MCRS
MDCK
MDIO

USB20P0+
USB20P0-

@15P_0402_50V8J

USB20P2+

1 R698
2
15K_0402_5%
1 R702
2
15K_0402_5%
1 R705
2
15K_0402_5%
1 R706
2
15K_0402_5%

USB20P2USB20P4-

8
7
6
5
15K_0804_8P4R_5%
R700
1
2
15K_0402_5%
1 R699
2
15K_0402_5%
1 R701
2
15K_0402_5%
1 R703
2
15K_0402_5%

USB20P3+
USB20P3-

USB20P1+
USB20P1-

R399 2

T4

TX_CLK
TXD3
TXD2
TXD1
TXD0

28

MII_TXEN

W2
W3
U5
Y7

TX_EN
PHY_PD
PHY_RST#
CLK_25M

P2
R3
R2
R4

EE_CS
EE_DI
EE_DO
EE_CK

R683 2

+3V

USB20P0R694 2
SB_EEDO
SB_EECLK

AGP_STP#

AGP_STP#

EC_RSMRST#

41
38
28
38
35

CLK_SB_14M

R379 2

1 10K_0402_5%
FLASH#
USB_OC2#

EC_FLASH#
USB_OC2#
SUSCLK
USB_OC1#
SPKR

USB_OC1#
SPKR

AB9

RSMRST#

A23

OSC_IN

W6

SIO_CLK

AB2
AA3
W11
AB1
Y4
AA1

BLINK/GPM0
FANOUT1/USBOC2#/GPM2
32KHZ_IN/GPM3
USBOC1#/GPM4
SPEAKER/GPM5
FANOUT0/GPM6

AC1
AC6
AC2
AC3
AC4
AC5

GPIO_X0/AGP_STP#
GPIO_X1/AGP_BUSY#
GPIO_X2/GHI#
GPIO_X3/VGATE
GPIO_X4
GPIO_X5

GPOC0#/SCL0
GPOC1#/SDA0
GPOC2#/SCL1
GPOC3#/SDA1
RTC_IRQ#/PWR_STRP

AA12
W12
Y12
AB12
AA8

SMB_CK_CLK2
SMB_CK_DAT2
SMB_CLK1
SMB_DAT1
PWR_STRP

PIDE_IORDY
PIDE_IRQ
PIDE_A0
PIDE_A1
PIDE_A2
PIDE_DACK#
PIDE_DRQ
PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#

AB17
AC16
AB15
AB16
AC15
Y16
AA17
AA16
AC17
Y15
AA15

IDE_PDIORDY
INT_IRQ14
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_PDDACK#
IDE_PDDREQ
IDE_PDIOR#
IDE_PDIOW#
IDE_PDCS1#
IDE_PDCS3#

PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15

AC18
AA18
AC19
AA19
AC20
AA20
AC21
AB21
AA21
Y20
AB20
Y19
AB19
Y18
AB18
Y17

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

SIDE_IORDY
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DACK#
SIDE_DRQ
SIDE_IOR#
SIDE_IOW#
SIDE_CS1#
SIDE_CS3#

AA23
AA22
AC23
Y21
AB23
Y22
W21
Y23
W20
AC22
AB22

IDE_SDIORDY
INT_IRQ15
IDE_SDA0
IDE_SDA1
IDE_SDA2
IDE_SDDACK#
IDE_SDDREQ
IDE_SDIOR#
IDE_SDIOW#
IDE_SDCS1#
IDE_SDCS3#

W23
V21
V23
U21
U23
T21
T23
R21
R20
T22
T20
U22
U20
V22
V20
W22

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

SIDE_D0
SIDE_D1
SIDE_D2
SIDE_D3
SIDE_D4
SIDE_D5
SIDE_D6
SIDE_D7
SIDE_D8
SIDE_D9
SIDE_D10
SIDE_D11
SIDE_D12
SIDE_D13
SIDE_D14
SIDE_D15
AC_BITCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
AC_SDIN2
AC_SYNC
AC_RST#
SPDIF_OUT

R376
48MHZ_4P_FN4800002
OUT 3

VDD

OE
C422
0.1U_0402_10V6K

GND

H_PROCHOT# 5,50

@0_0402_5%
SN74LVC125APWLE_TSSOP14

NB_SUS_STAT# 7

SMCLK
SMDATA

13,14,16
13,14,16

SB_EC_THERM# D35

1CH751H-40_SC76

EC_THRM#

EC_THRM# 40

SB_EC_SWI#

D46

1CH751H-40_SC76

EC_SWI#

EC_SWI# 40

SB_GA20

D49

1CH751H-40_SC76

GATEA20

GATEA20

40

SB_KBRST#

D48

1CH751H-40_SC76

KBRST#

KBRST#

40

SB_AC_IN

D38

1CH751H-40_SC76

AC IN

ACIN

40,41,45

SB_EC_SMI#

D33

1CH751H-40_SC76

EC_SMI#

EC_SMI#

40

SB_SCI#

D34

1CH751H-40_SC76

EC_SCI#

EC_SCI#

40

SB_LID_OUT#

D47

1CH751H-40_SC76

EC_LID_OUT#

EC_LID_OUT# 40

PWR_STRP 28
+3VALW

IDE_PDIORDY 39
INT_IRQ14 39
IDE_PDA0 39
IDE_PDA1 39
IDE_PDA2 39
IDE_PDDACK# 39
IDE_PDDREQ 39
IDE_PDIOR# 39
IDE_PDIOW# 39
IDE_PDCS1# 39
IDE_PDCS3# 39

PM_SLP_S3#
PBTN_OUT#
PM_SLP_S5#

1
2
3
4
RP48

8
7
6
5
10K_0804_8P4R_5%

SB_PM_BATLOW#
SB_EC_SMI#
SB_SCI#
SB_EC_SWI#

1
2
3
4
RP49

8
7
6
5 10K_0804_8P4R_5%

1
2
3
4
RP23
1
R362 1
R377 1
R648
4
3
2
1
RP63

8
7
6
5 10K_0804_8P4R_5%

+3V

RI#
SB_AC_IN
PCI_ACT_REQ#
SB_GA20
LPC_SMI#
GHI#
AGP_STP#_R

*
IDE_SDIORDY 39
INT_IRQ15 39
IDE_SDA0 39
IDE_SDA1 39
IDE_SDA2 39
IDE_SDDACK# 39
IDE_SDDREQ 39
IDE_SDIOR# 39
IDE_SDIOW# 39
IDE_SDCS1# 39
IDE_SDCS3# 39

SMB_CK_DAT2
SMB_CLK1
SMB_CK_CLK2
SMB_DAT1

2
2 10K_0402_5%
2 10K_0402_5%
10K_0402_5%
5
6
7
8
10K_0804_8P4R_5%
+3VS

1
2
3
4
RP47

8
7
6
5

2.2K_0804_8P4R_5%
+3V

IAC_RST#
R693

2 8.2K_0402_5%

IDE_SDD[0..15] 39

+3VS
AGP_STP# 8.2K_0402_5%1
AGP_BUSY# 8.2K_0402_5%1

2R366
2R363
B

SB_TEST1
SB_TEST0
IAC_BITCLK
IAC_SDATAI2
IAC_SDATAI1
IAC_SDATAI0

2
0_0402_5%

2
0_0402_5%

IAC_BITCLK
IAC_SDATAO
IAC_SDATAI0
IAC_SDATAI1
IAC_SDATAI2
IAC_SYNC
IAC_RST#
SPDIF_OUT

IAC_BITCLK
IAC_SDATAO
IAC_SDATAI0
IAC_SDATAI1

8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%

1
1
1
1
1
1

2
2
2
2
2
2

R696
R697
R394
R386
R384
R383

35,44
28,35,44
35
44

IAC_SYNC 28,35,44
IAC_RST# 35,44
SPDIF_OUT 28

+2.5V

+3VS
1

AGP_BUSY#_R

AGP_BUSY#

AGP_BUSY# 9,17

4.7K_0402_5%
R330

2
G

+3VS
@MMBT3904_SOT23

SUS_STAT#

Q45
CPU_GHI# 5

R368 1

4.7K_0402_5%
R322
2 1

2N7002_SOT23
S

Q42
D

1
2 2

+2.5V

**

POP For EFQ00


DEPOP For EEQ00

VTT_PWRGD 16,28

@470_0402_5%

R502
O

South bridge SB200

R404

GHI#

AGP_BUSY#_R
SB_LID_OUT#
SB_KBRST#
SB_EC_THERM#

1
R692

+3V

1000P_0402_50V7K

40
40
40
28

IDE_PDD[0..15] 39

1
R382

E1
E2
Y1
Y2
Y3
E3
V5
E5

PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD

U40C

33_0402_5%
OSCLIN

X3
4

PIDERST#
SIDERST#

39
39

AGP_STP#_R
AGP_BUSY#_R
GHI#

1
CH751H-40_SC76

R407
10K_0402_5%
2

L58

1 10K_0402_5%

D36
9,17

KC FBM-L11-201209-221LMAT_0805

1 10K_0402_5%

USB20P0+

1 10K_0402_5%

+3V

C866

RX_DV
RX_ERR

U4
V1
U3
V3

+3V

T2
U1

MII_TXD3
MII_TXD2
MII_TXD1
MII_TXD0

40,44 EC_RSMRST#
2 100K_0402_5%
16 CLK_SB_14M

RXD3
RXD2
RXD1
RXD0

28
28
28
28

28
28
R346 1

RX_CLK

T3
U2
T5
W4

USB20P4+

RP64 1
2
3
4

USB20P5+
USB20P5-

T1

SB_GA20
SB_KBRST#
SB_AC_IN
SB_EC_SWI#
LPC_SMI#
SB_EC_SMI#
SB_SCI#
SB_LID_OUT#

Y5
AA4
AB3
Y6
W5
Y8
AA7
AB6

GA20_IN/GEVNT0#
KB_RST#/GEVNT1#
SMB_ALERT#/GEVNT2#
LPC_PME#/GEVNT3#
LPC_SMI#/GEVNT4#
GEVENT5#/ETH_VALERT#
GEVENT6#/ETH_FALERT#
GEVENT7#/ETH_CALERT#

C303

USB_HSDP2+
USB_FLDP2+
USB_HSDM2USB_FLDM2-

SB_PM_BATLOW#
RI#
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
PCI_ACT_REQ#
SUS_STAT#
SB_TEST1
SB_TEST0

USB_HSDP3+
USB_FLDP3+
USB_HSDM3USB_FLDM3-

USB_HSDP1+
USB_FLDP1+
USB_HSDM1USB_FLDM1-

@10_0402_5%

K2
K1
L2
L1

G3
J3
H3
K3

USB20P1-

CLK_SB_14M

USB_HSDP4+
USB_FLDP4+
USB_HSDM4USB_FLDM4-

H2
H1
J2
J1

USB20P2-

USBP2-

L4
L3
M4
M3

AC9
AC7
AA11
AB10
AA10
Y11
C21
Y10
AA5
AA6

2 1K_0402_5%

Q33
3

10K_0402_5%
R319
2

@15P_0402_50V8J

USB20P2+

USB_HSDP5+
USB_FLDP5+
USB_HSDM5USB_FLDM5-

SB_EC_THERM#

PME#/EXT_EVNT0#
RI#/EXT_EVNT1#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
PCI_REQACT#
SUS_STAT#
TEST1
TEST0

EEPROM

C420

M2
M1
N2
N1

AB4

TALERT#/ETH_TALERT#

Part 2 of 3

CLK / RST

USBCLK/CLK48
USB_RCOMP
USB_VREFOUT
USB_ATEST1
USB_ATEST0
USBOC0#/GPM7

GPIO_XTRA GPIO
SECONDARY ATA 66/100
AC97

38

USB_OC0#

EC_THRM#

SB200 SB

P3
R1
P1
N4
N3
P4

10

OE#

R758 1
1

ACPI / WAKE UP EVENTS

CLK_USB48

!! ATI Platform Only !!

U30B

USB INTERFACE

OSCLIN
16

0_0402_5%

PRIMARY ATA 66/100

R389

ETHERNET MII

MMBT3904_SOT23
1

AGP_SUS_STAT# 17

Title

Compal Electronics, Inc.


SB200M(2/4) - IDE/USB/MII

1
D37

Size

R ev
1.0

LA-2371

CH751H-40_SC76
Date:
5

Document Number

, 28, 2004

Sheet
1

26

of

56

+3VS

+3VS

22U_1206_10V4Z 0.1U_0402_10V6K
C708
D

22U_1206_10V4Z

C710

1
C691

1
C700

0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

1
C690

1
C719

2
2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K

1
C752

1
C707

1
C693

1
C733

1
C759

1
C712

1
C694

1
C697

1
C692

1
C709

2
2
2
2
2
2
2
2
2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

+3VS

1
C728

1
C718

0.1U_0402_10V6K

1
C735

1
C729

1
C740

1
C743

ATI request

C738

C702

C706

C699

C751

C745

0.1U_0402_10V6K
2
2
2
2
2
2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

1
C746

0.01U_0402_25V4Z
22U_1206_10V4Z

C739

0.01U_0402_25V4Z
0.1U_0402_10V6K

C730

U30C

0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

+2.5VS

0.01U_0402_25V4Z

0.01U_0402_25V4Z

0.01U_0402_25V4Z

+2.5VS
+2.5VS

ATI request

+2.5V

0.01U_0402_25V4Z
0.1U_0402_10V6K

1
C767

1
C764

1
C725

2
2
2
0.1U_0402_10V6K

C766

C717

0.1U_0402_10V6K

0.01U_0402_25V4Z

C737

22U_1206_10V4Z

1
C750

1
C749

1
C760

+2.5V

2
2
0.1U_0402_10V6K

C736

C741

0.1U_0402_10V6K

0.1U_0402_10V6K

0.01U_0402_25V4Z

C723
0.01U_0402_25V4Z

C755

C761
0.1U_0402_10V6K

1
C762

C765
0.1U_0402_10V6K
+3V_AVDDC

C772

C775

0.1U_0402_10V6K

+3V

C776

2
1000P_0402_50V7K

10U_0805_10V4Z

+5VCD
1

1U_0603_10V4Z

1
2
FBM-10-201209-260-T_0805
C756

1
C768

1
C769

1
C773

1
C771

1
C777

2
2
2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K

@1K_0402_5%

C774

0.1U_0402_10V6K
47U_B_6.3VM

ATI request

+3VALW

C782

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

J10
J11
J13
J14
K15
K9
L15
L9
N15
N9
P15
P9
R10
R11
R13
R14

VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE

P6
R6
V13
W13
V12

STB_2.5V
STB_2.5V
STB_2.5V
STB_2.5V
STB_2.5V

L6
H6
J6

VDD_USB
VDD_USB
VDD_USB

P5

AVDDC

T6
U6
V9
V10
V11
W9
W10

STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V

F4
J4
K5
F3
K4
L5

AVDDTX0
AVDDTX1
AVDDTX2
AVDDRX0
AVDDRX1
AVDDRX2

D19

+2.5VS

+5VS_VREF

1
CH751H-40_SC76

C421
22U_1206_10V4Z

+3V_AVDDUSB

0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

R707

1K_0402_5%
D50

R676

+3VS

ATI request

+3V_AVDDUSB

+5VS

R813
+3V_AVDDUSB

+3V

+2.5V

+3V_AVDDC

C781
2

0.1U_0402_10V6K

FBM-10-201209-260-T_0805

ATI request

R674
1

C763
0.1U_0402_10V6K

+3V_AVDDC

+3V

ATI request
CLOSE TO
L6,H6,J6

+3V

0.1U_0402_10V6K 0.1U_0402_10V6K
C734

0.01U_0402_25V4Z

ATI request
+3V

C724

22U_1206_10V4Z

1U_0603_10V4Z

C754
C

0.1U_0402_10V6K

E11
E12
E15
E7
E8
F11
F12
F15
F16
F17
F7
F8
G18
G19
H18
H19
M18
M19
N18
N19
T18
T19
U18
U19
V17
V18
W17
W18

AVSSC

N5

S5_2.5V

M5
J5
G4
K6
H4
F5

S5_3.3V

AVSSCK

A22

D1

5V_VREF
AVDD_CK

+2.5VALW

Y9

+3VALW

AA9

C748
0.1U_0402_10V6K

E10
E13
E14
E6
E9
F10
F13
F14
F18
F6
F9
G6
J12
J15
J18
J19
J9
K10
K11
K12
K13
K14
K18
K19
L10
L11
L12
L13
L14
L18
L19
M10
M11
M12
M13
M14
M15
M6
M9
N10
N11
N12
N13
N14
N6
P10
P11
P12
P13
P14
P18
P19
R12
R15
R18
R19
R9
V14
V15
V16
V19
V6
V7
V8
W14
W15
W16
W19
W7
W8
H5
G5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_USB
VSS_USB

AVSSRX2
AVSSRX1
AVSSRX0
AVSSTX2
AVSSTX1
AVSSTX0

A21

Part 3 of 3

VREF_CPU

+2.5V_AVDDCK

SB200 SB

POWER

South bridge SB200


C747
0.1U_0402_10V6K

+2.5V_AVDDCK
+2.5V_AVDDCK
R641
1
2
FBM-10-201209-260-T_0805
1U_0603_10V4Z

+2.5VS

0.01U_0402_25V4Z
1
1

C295

C684

C683

C297
22U_1206_10V4Z

0.1U_0402_10V6K

C686

C753
4.7U_0805_10V4Z

2
1000P_0402_50V7K

Title

Compal Electronics, Inc.


SB200M(3/4) - PWR

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
1.0

LA-2371
Date:

, 27, 2004

Sheet
1

27

of

56

1
R341

+3VALW

+3V

1
R393

R712

R704

R673

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

R713

10K_0402_5%
2

R401

+3V

1
R372

R387

+3V

1
R709

R392

@10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5%


2

R390

10K_0402_5%

+3V

+3V

+3VS

+3VS

26
PWR_STRP
26
SB_EEDO
26
SB_EECLK
26,35,44 IAC_SYNC
26,35,44 IAC_SDATAO
26
SPDIF_OUT

10K_0402_5%

+3VS

R357

+3VS

+3V

+3V

+3VALW

1
R695

R671

R710

R397

@10K_0402_5%@10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5%


2

R398

10K_0402_5%

R373

10K_0402_5%

R381

10K_0402_5%

R714

2
R708

10K_0402_5%
2

R711

R396

@10K_0402_5% 10K_0402_5%

1
R351

@10K_0402_5%

1
R342

MII_TXEN
MII_TXD3
MII_TXD2
MII_TXD1
MII_TXD0
SUSCLK
1

26
26
26
26
26
26

25,29,30,32,33,34 PCI_AD26

PCI_AD26 H: ENE910

REQUIRED SYSTEM STRAPS

L: NS87591

PWR_STRP

STRAP
HIGH

MANUAL
PWR ON

IGN DEBUG
EEDO

EECK

IAC_SYNC

IAC_SDATAO

SPDIF_OUT

SPEEDSTEP
CPU_STP#

USE
DEBUG
STRAPS

ROM ON
PCI BUS

INIT ACTIVE
HIGH

33MHz NB
BUS

SIO 24MHz

ENABLE
SPEED
STEP

IGNORE
DEBUG
STRAPS

ROM ON
LPC
BUS

INIT ACTIVE
LOW (PIII)

HI SPEED
A-LINK

SIO 48MHz

DISABLE
SPEED
STEP

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

FREQLTCH
TX_EN

DEFAULT

STRAP
LOW

AUTO
PWR
ON

ETHERNET TXD[3:0]

32KHZ_S5

32KHZ
OUTPUT
FROM SB200
(INT RTC)

DISABLE
CPU FREQ
SETTING
DEFAULT

PROCESSOR FREQ MULTIPLIER

DEFAULT

ENABLE CPU
FREQSETTING

32KHZ INPUT
TO SB200
(EXT RTC)

+3VALW

+3VALW

+3VALW

14

14

+3VALW

0.1U_0402_10V6K

1
2
150K_0402_5%

U27B
C338

P
O

U27C

U27D
SN74LVC14APWLE_TSSOP14

10K_0402_5%
SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

SB_PWRGD 26
R736

2
SN74LVC14APWLE_TSSOP14

@1M_0402_5%

2 47_0402_5%
1

U27A

P
O

R734 1

SN74LVC08APW_TSSOP14

R324

1
1

0.47U_0603_10V7K 5

C332

1
2
150K_0402_5%

11

R332

I1

13

51 VGATE

I0

R323

12

U16D

10K_0402_5%

+3VALW

R327

C328
0.1U_0402_16V4Z

14

R329
1K_0402_5%

14

+3VS

+3VS

VTT_PWRGD 16,26

R325

R314 @0_0402_5%
2

1K_0402_5%

NB_PWRGD 7,9,24
D
Q30
2N7002_SOT23

R321
47K_0402_5%

S
2

2
G

Title

Compal Electronics, Inc.


SB200M(4/4) - STRAPS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
1.0

LA-2371
Date:

, 28, 2004

Sheet
1

28

of

56

U9

PME#

25,30,32,33,34,38 PCIRST#

27

25 CLK_PCI_LAN
25,32,33,38,40 PM_CLKRUN#

CLK_PCI_LAN 28
PM_CLKRUN# 65

4
17
128
21
38
51
66
81
91
101
119

Y1
LAN_X1

LAN_X2

25MHZ_20P_1BX25000CK1A
C206
27P_0402_50V8J

C197
27P_0402_50V8J

35
52
80
100

88
10
120

NC/HSDAC+
NC/HG
NC/LG2
NC/LV2

11
123
124
126

9
13

NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND

22
48
62
73
112
118

NS0013_16P

RJ45_TX+
RJ45_TX-

1
C93
0.01U_0402_25V7Z

R88
49.9_0402_1%

R37
75_0402_1%

11
10
9

1
+3VS

CT
TX+
TX-

R38
75_0402_1%

C94
C88
0.01U_0402_25V7Z
0.01U_0402_25V7Z
2
2

RJ45_GND

+LAN_DVDD

RTT3/CRTL18

125

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

26
41
56
71
84
94
107

CLK
CLKRUN#

GND/VSS
GND/VSS
GND/VSS

GND
GND
GND
GND

2 1K_0402_5%
2 15K_0402_5%
2 5.9K_0603_1%

CT
TD+
TD-

+3V

NC/VSS
NC/VSS

RST#

GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST

R119 1
R116 1
R131 1

R86
49.9_0402_1%
R87
49.9_0402_1%

6
7
8

RJ45_RX+
RJ45_RX-

2
NC/M66EN
NC/AVDDH
NC/HV

CTRL25

10mil
10mil

R85
49.9_0402_1%

16
15
14

Q10
2SB1197K_SOT23
C

40mil
+2.5V_LAN

1
C120
10U_0805_10V4Z

+3V

Q7
DTA114YKA_SOT23
1 1
2
R63
300_0402_5%

C116
0.1U_0402_16V4Z

2
B

10K

CTRL25

AVDD33/AVDDL
AVDD33/AVDDL
AVDD33/AVDDL
NC/AVDDL
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18

32
54
78
99

CTRL25

+LAN_AVDDL

40mil

RTL8100CL_LQFP128

PR4+

PR2-

PR3-

PR3+

RJ45_RX+

PR2+

RJ45_TX-

PR1-

RJ45_TX+

PR1+

+3V

1
C152

KC FBM-L11-201209-221LMAT_0805

1
1
0.1U_0402_16V4Z C155

0.1U_0402_16V4Z
2

C151
2

+3V

0.1U_0402_16V4Z
2
L71

+LAN_DVDD

24
45
64
110
116

2
0.1U_0402_16V4Z
+2.5V_LAN_VDD
20mil
1

C144
0.1U_0402_16V4Z

10

Green LED-

Green LED+

Q6
DTA114YKA_SOT23

15

SHLD2

14

SHLD1

13
B

TYCO_1566735-1

R4
R3
75_0402_1% 75_0402_1%

LINK10_100#

+2.5V_LAN

RJ45_GND

C241
C2150.1U_0402_16V4Z
2
2

20mil

LANGND

C18
1000P_1206_2KV7K

1
C2

2
1

10mil

2
R60
300_0402_5%

16

SHLD3

KC FBM-L11-201209-221LMAT_0805

1
1
0.1U_0402_16V4Z
C156

1 1

SHLD4
PR4-

+3V

40mil

12

Amber LED-

RJ45_RX-

C1
4.7U_0805_10V4Z

+3V

L72

AVDD25/HSDAC-

Amber LED+

11

ACTIVITY#

1
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18

12

L13

3
7
20
16

JP17

10mil

31

105
23
127
72
74

LAN_TD+
LAN_TD-

RX+
RXCT

32,40 LAN_PME#

LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA

LAN_X1
LAN_X2

RD+
RDCT

INTA#

X1
X2

121
122

1
2
3

25

14
15
18
19

25,32,33 PCI_PIRQD#

U6
LAN_RD+
LAN_RD-

10K

REQ#
GNT#

C243
0.1U_0402_16V4Z

30
29

PCI_REQ#3
PCI_GNT#3

PERR#
SERR#

AT93C46-10SI-2.7_SO8

70
75

25,30,32,33,34 PCI_PERR#
25,30,32,33 PCI_SERR#

VCC
NC
NC
GND

47K

PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

CS
SK
DI
DO

8
7
6
5

76
61
63
67
68
69

1
2
3
4

25,30,32,33,34 PCI_PAR
25,30,32,33,34 PCI_FRAME#
25,30,32,33,34 PCI_IRDY#
25,30,32,33,34 PCI_TRDY#
25,30,32,33,34 PCI_DEVSEL#
25,30,32,33,34 PCI_STOP#

25
25

LAN_TD+
LAN_TDLAN_RD+
LAN_RD-

LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO

+3V

47K

IDSEL

2 LAN_IDSEL
100_0402_5%

1
2
5
6

2
R161
5.6K_0402_5%

46

1
R146

ACTIVITY#
LINK10_100#

NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-

C/BE#0
C/BE#1
C/BE#2
C/BE#3

PCI_AD19
C

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

117
115
114
113

TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-

92
77
60
44

25,30,32,33,34
25,30,32,33,34
25,30,32,33,34
25,30,32,33,34

LED0
LED1
LED2
NC/LED3

LAN RTL8100C(L)

U12

LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS

C132
@18P_0402_50V8K

108
109
111
106

+3V

EEDO
AUX/EEDI
EESK
EECS

1
2

R121
@10_0402_5%

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

LAN I/F

CLK_PCI_LAN
D

104
103
102
98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33

Power

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI I/F

PCI_AD[0..31]

25,28,30,32,33,34 PCI_AD[0..31]

0.1U_0402_16V4Z

+2.5V_LAN

KC FBM-L11-201209-221LMAT_0805 1
C126
10U_0805_10V4Z

0.1U_0402_16V4Z
1
1
C157

2
2
0.1U_0402_16V4Z

C219

0.1U_0402_16V4Z
1
1
C194

2
2
0.1U_0402_16V4Z

C242

1
C239

2
2
0.1U_0402_16V4Z

C238
0.1U_0402_16V4Z

Termination plane should be closed


to chassis ground and also depends
on safety concern

Title

Compal Electronics, Inc.


LAN REALTEK RTL8100CL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
1.0

LA-2371
Date:

, 28, 2004

Sheet
1

29

of

56

C828
@18P_0402_50V8K

25,29,32,33,34
25,29,32,33,34
25,29,32,33,34
25,29,32,33,34

R769

trace > 10mil

@0_0402_5%

Close chip termenal

3VS_GND
2
0_0402_5%
SDCM_XDALE
2
43K_0402_5%
SDDA0_XDD7
2
43K_0402_5%
SDDA1_XDD0
2
43K_0402_5%
SDDA2_XDCL
2
43K_0402_5%
SDDA3_XDD4
2
43K_0402_5%

1
R719
1
R741
1
R774
1
R776

SDCD#
2
@43K_0402_5%
SDWP
2
@43K_0402_5%
MSINS#
2
@43K_0402_5%
SM_CD#
2
43K_0402_5%

PCIRST#

25,29,32,33,34,38 PCIRST#
25,29,32,33,34 PCI_FRAME#
25,29,32,33,34 PCI_IRDY#
25,29,32,33,34 PCI_TRDY#
25,29,32,33,34 PCI_DEVSEL#
25,29,32,33,34 PCI_STOP#
25,29,32,33,34 PCI_PERR#
25,29,32,33 PCI_SERR#
25,29,32,33,34 PCI_PAR
25
PCI_REQ#2
25
PCI_GNT#2
25 CLK_PCI_CB

+VCC_5IN1

1
R770
1
R728
1
R730
1
R739
1
R725
1
R726

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

23V_PCM_SUSP
10K_0402_5%
2 PCM_ID
100_0402_5%
PCI_PIRQA#
3VS_GND
PCI_PIRQB#

1
R737
PCI_AD20 1
R720

+3VS

IDSEL:
PCI_AD20

CLK_PCI_CB

9,17,25,34 PCI_PIRQA#
25 PCI_PIRQB#
25,38,40 SERIRQ
31 SM_CD#
42 5IN1_LED#
31

+3VS

SM_CD#
SDOC#

SDOC#

PCIRST#

+VCC_5IN1
31
31
31

SDCD#
SDWP
SDPWREN#

SDCD#
SDWP
SDPWREN#

16 CLK_EXT_SD48
1
R721
1
R826

31 SDCK

31
31
31
31
31

SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

CBE3#
CBE2#
CBE1#
CBE0#

G4
J4
K1
K3
L1
L2
L3
M1
M2
A1
B1
H1

PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK

L8
L11

RIOUT#_PME#
SUSPEND#

F4

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7

M10

GRST#

B4
C8
D12
H11
L9
L6
N4
K2
G1
F3
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1

A7
G13
VCCA2
VCCA1

S1_A[0..25] 31

2
C843
0.1U_0402_16V4Z

C846
0.1U_0402_16V4Z
D

S1_D[0..15] 31

CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#

B7
A11
E11
H13

S1_REG#
S1_A12
S1_A8
S1_CE1#

CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12
C5
D5

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
A16_CLK
1
R740
S1_BVD1
S1_WP

D11

S1_A19

CINT#/READY_IREQ#

D6

S1_RDY#

SPKROUT
CAUDIO/BVD2_SPKR#

M9
B5

PCM_SPK#
S1_BVD2

A4
L12
D9
C6
A2
E10
J13

S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

IDSEL

K8
N9
K9
N10
L10
N11
M11
J9

S1_D[0..15]

CSTSCHG/BVD1_STSCHG#
CCLKRUN#/WP_IOIS16#
CBLOCK#/A19

CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1
CRSV3/D2
CRSV2/A18
CRSV1/D14

VCC_SD

E8
F8
G7

SDCD#
SDWP/SMWPD#
SDPWREN33#

H5

SDCLKI

F6
E5
E6
F7
F5
G6

SDCLK/SMWE#
SDCMD/SMALE
SDDAT0/SMDATA7
SDDAT1/SMDATA0
SDDAT2/SMCLE
SDDAT3/SMDATA4

G5

GND_SD

1
C834
0.1U_0402_16V4Z

1
C832
0.1U_0402_16V4Z

1
C830
0.1U_0402_16V4Z

MSINS#
MSPWREN#/SMPWREN#
MSBS/SMDATA1
MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

H7
J8
H8
E9
G9
H9
G8
F9

SMBSY#
SMCD#
SMWP#
SMCE#

H6
J7
J6
J5

XD_MS_PWREN#
MSBS_XDD1
1
MSD0_XDD2
R733
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

S1_IOWR# 31
S1_IORD# 31
S1_OE#
S1_CE2#

C844
0.1U_0402_16V4Z

1
C845
0.1U_0402_16V4Z

1
C838
0.1U_0402_16V4Z

C835
0.1U_0402_16V4Z

31
31

S1_REG# 31
S1_CE1#

31

S1_RST

31

S1_CD1#

S1_CD2#

C842
10P_0402_50V8J

S1_WAIT# 31

C833
10P_0402_50V8J

Closed to Pin L12

Closed to Pin A4

S1_INPACK# 31
S1_WE# 31
S1_A16
2
33_0402_5%
S1_BVD1 31
S1_WP
31

Close chip termenal

S1_RDY# 31
PCM_SPK# 35
S1_BVD2 31
S1_CD2#
S1_CD1#
S1_VS2
S1_VS1

31
31
31
31

MSINS# 31
XD_MS_PWREN# 31
MSBS_XDD1 31
2
MSCLK_XDRE# 31
33_0402_5%
MSD0_XDD2 31
MSD1_XDD6 31
MSD2_XDD5 31
MSD3_XDD3 31

MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MSBS_XDD1
XDWP#

XDWP#

C837
0.1U_0402_16V4Z

+S1_VCC

MSD0_XDD2

SD/MMC/MS/SM

E7

D3
H2
L4
M8
K11
F12
C10
B6

31 XDWE1#

2
22_0402_5%
2
22_0402_5%

E1
J3
N1
N5

S1_A[0..25]

1
C829
0.1U_0402_16V4Z

+3VS

CARDBUS

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

1
C831
0.1U_0402_16V4Z

XDBSY# 31
XDCD# 31
XDWP# 31
XDCE# 31

1
R735
1
R732
1
R727
1
R731
1
R738
1
R768

2
@43K_0402_5%
2
@43K_0402_5%
2
@43K_0402_5%
2
@43K_0402_5%
2
@43K_0402_5%
2
2.2K_0402_5%

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

1
2

R722
@10_0402_5%

C2
C1
D4
D2
D1
E4
E3
E2
F2
F1
G2
G3
H3
H4
J1
J2
N2
M3
N3
K4
M4
K5
L5
M5
K6
M6
N6
M7
N7
L7
K7
N8

VPPD1
VPPD0

VCCD1#
VCCD0#

PCI_AD[0..31]

CLK_PCI_CB

M12
N12

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

+3VS

+S1_VCC
+3VS

U52

25,28,29,32,33,34 PCI_AD[0..31]

VPPD0
VPPD1
VCCD0#
VCCD1#

PCI Interface

31
31
31
31

M13
N13

CB714_LFBGA169
A

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

PCMCIA Controller ENE CB714


Size
Document Number
Custom
Date:

R ev
1.0

LA-2371

, 29, 2004

Sheet
1

30

of

56

PCMCIA Power Controller


CardBus Socket

30

S1_A[0..25]

30

S1_D[0..15]

S1_A[0..25]

Close to
CardBus Conn.
+S1_VCC

U49

VCC
VCC
VCC

12V

13
12
11

40mil

+S1_VPP
+5VS
5
6

VCCD0
VCCD1
VPPD0
VPPD1

C840
0.1U_0402_16V4Z
2

1
2
15
14

SHDN

VCCD0#
VCCD1#
VPPD0
VPPD1

OC

CP-2211_SSOP16

S1_CE1#

30

S1_OE#

30
30

S1_WE#
S1_RDY#
+S1_VCC
+S1_VPP

+S1_VPP

30
30
30
30

C836
4.7U_0805_10V4Z

1
C839
0.01U_0402_25V4Z

R825
R789
10K_0402_5% 10K_0402_5%
30

S1_WP

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP

R689
10K_0402_5%

GND

C809

3.3V
3.3V

16

3
4
2

4.7U_0805_10V4Z

C820

5V
5V

+3VS
0.1U_0402_16V4Z

30

C827

C841
10U_0805_10V4Z

+S1_VCC

S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#

C822

4.7U_0805_10V4Z

10

0.1U_0402_16V4Z

VPP

20mil

1
2
C821 0.1U_0402_16V4Z
C819 0.1U_0402_16V4Z
1
2
C783 10U_0805_10V4Z
1
2
C823 0.01U_0402_25V4Z
1
2
C826
1U_0603_10V4Z

JP9

S1_D[0..15]

SD CLK

SDCK

30 SDCK

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

GND
GND
D3 / CAD0
CD1# / CCD1#
D4 / CAD1
D11 / CAD2
D5 / CAD3
D12 / CAD4
D6 / CAD5
D13/ CAD6
D7 / CAD7
D14/ RFU
CE1# / CCBE0#
D15 / CAD8
A10 / CAD9
CE2# / CAD10
OE# / CAD11
VS1# / CVS1
A11 / CAD12
IORD# / CAD13
A9 / CAD14
IOWR# /CAD15
A8 / CCBE1#
A17 / CAD16
A13 / CPAR
A18 / RFU
A14 / CPERR#
A19 / CBLOCK#
WE# / CGNT#
A20 / CSTOP#
IREQ# / CINT#
A21 / CDEVSEL#
VCC
VCC
VPP1
VPP2
A16 / CCLK
A22 / CTRDY#
A15 / CIRDY#
A23 / CFRAME#
A12 / CCBE2#
A24 / CAD17
A7 / CAD18
A25 / CAD19
A6 / CAD20
VS2# / CVS2
A5 / CAD21
RESET / CRST#
A4 / CAD22
WAIT# / CSERR#
A3 / CAD23
INPACK# / CREQ#
A2 / CAD24
REG# / CCBE3#
A1 / CAD25
SPKR# / CAUDIO
A0 / CAD26
STSCHG# / CSTSCHG
D0 / CAD27
D8 / CAD28
D1 / CAD29
D9 / CAD30
D2 / RFU
D10 / CAD31
IOIS16# / CCLKRUN#
CD2# / CCD2#
GND
GND

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

69
71
73
75
77
79
81
83

GND
GND
GND
GND
GND
GND
GND
GND

70
72
74
76
78
80
82
84

GND
GND
GND
GND
GND
GND
GND
GND

S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21

S1_CD1# 30

S1_CE2# 30
S1_VS1
30
S1_IORD# 30
S1_IOWR# 30

+S1_VCC
+S1_VPP

S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#

S1_VS2
30
S1_RST
30
S1_WAIT# 30
S1_INPACK# 30
S1_REG# 30
S1_BVD2 30
S1_BVD1 30

S1_CD2# 30

FOX_WZ21131-G2-P4_RT

C847

@10P_0402_50V8K
2

+S1_VCC

Reserve for Debug.

MS CLK

S1_WP
2
43K_0402_5%
S1_OE#
2
47K_0402_5%
S1_RST
2
47K_0402_5%
S1_CE1#
2
47K_0402_5%
S1_CE2#
2
47K_0402_5%

MSCLK_XDRE#
1

30 MSCLK_XDRE#

R748
@0_0402_5%

1
R717
1
R745
1
R724
1
R750
1
R747

C849
@10P_0402_50V8K

xD PU and PD. Close to Socket

+3VS
JP32

30 XDWE1#

30

SM_CD#
+VCC_5IN1

SM_CD#
XDBSY#
MSCLK_XDRE#
XDCE#
XDCD#
SDDA2_XDCL

25
3
29
26
27
28
30
2
38

TAITN_R007-N3P-15-S

11
12
6
7
5
10
8
9
4
42
41
15
14
16
18
19
17
13
20

SDDA3_XDD4
SDDA2_XDCL
SDDA1_XDD0
SDDA0_XDD7
SDWP
SDCM_XDALE
SDCK

+VCC_5IN1
SDCD#
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MSCLK_XDRE#
MSINS#
MSBS_XDD1

SDCD#

30

+3VS

SD PWR Control

XDCD#

+VCC_5IN1
+3VS

R718
43K_0402_5%

MSD0_XDD2 30
30 SDPWREN#
MSD1_XDD6 30
MSD2_XDD5 30 30 XD_MS_PWREN#
MSD3_XDD3 30
MSCLK_XDRE# 30
MSINS# 30
MSBS_XDD1 30
+VCC_5IN1
+VCC_5IN1

XDCD# 30

+VCC_5IN1
+3VS

U51
GND
IN
IN
EN#

OUT
OUT
OUT
OC#

8
7
6
5

10K_0402_5%
1
R775

2
0_0402_5%

2 MSCLK_XDRE#
10K_0402_5%
2 XDWE1#
10K_0402_5%
2
2.2K_0402_5%
XDBSY#
1
10K_0402_5%

1
R746
1
R744
1
R751
2
R742

R759
1
2
3
4

SDOC# 30

XDCE# 30
XDBSY# 30

TPS2041ADR_SO8
+VCC_5IN1
1

40
39
1
44

XDCD#
1
@8.2K_0402_5%

2
R749

SDDA3_XDD4 30
SDDA2_XDCL 30
SDDA1_XDD0 30
SDDA0_XDD7 30
SDWP 30
SDCM_XDALE 30

35
43
36
37

SD-DAT3
SD-DAT2
SD-DAT1
5 IN 1 CONN SD-DAT0
SD-WP-SW
SD-CMD
SD_CLK
SD-VCC
NC
SM_WP-IN / XD_WP-IN
SD-CD-SW
SM-WP-SW
SD-CD-COM
#SM_-WE / XD_-WE
#SM-ALE / XD-ALE
MS-DATA0
MS-DATA1
SM-LVD
MS-DATA2
SM-CD-SW
MS-DATA3
SM_-VCC / XD_-VCC
MS-SCLK
#SM_R/-B / XD_R/-B
MS-INS
#SM_-RE / XD_-RE
MS-BS
#SM_-CE / XD_-CE
MS-VCC
#SM_-CD
SM-CD-COM
XD-VCC
SM-CLE / XD-CLE
XD-CD
GND
GND

XDWP#
SDWP
XDWE1#
SDCM_XDALE

SM-D0
SM-D1 / XD-D1
SM-D2 / XD-D2
SM-D3 / XD-D3
SM-D4 / XD-D4
SM-D5 / XD-D5
SM-D6 / XD-D6
SM-D7 / XD-D7

XDWP#

34
33
32
31
21
22
23
24

30

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

1
C904

1
C905

1
C906

C907
10U_0805_10V4Z
2
2
2
0.1U_0402_16V4Z 0.1U_0402_16V4Z
0.1U_0402_16V4Z
2

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCMCIA Socket
Size
Document Number
Custom

R ev
1.0

LA-2371

Date:

, 29, 2004

Sheet

31

of

56

+3V
C342

0.1U_0402_16V4Z
PCI_AD[0..31]

PCI_AD[0..31] 25,28,29,30,33,34

40

WL_OFF#

40,42

KILL_SW#

U29

MINI_PCI 1 SOCKET for Wireless Lan

TC7SH08FU_SSOP5
JP23
TIP

3
LAN RESERVED
5
7
9
D32
11
1
2
13
+3VS_MINIPCI
15
L24
CH751H-40_SC76 17
25,29,33 PCI_PIRQD#
W=40mils
2
19
+3VS 1
21
CHB1608B121_0603
23
CLK_PCI_MINI1
25
25 CLK_PCI_MINI1
27
29
25
PCI_REQ#1
31
PCI_AD31
33
PCI_AD29
35
37
PCI_AD27
39
PCI_AD25
41
43
45
25,29,30,33,34 PCI_C/BE#3
PCI_AD23
47
49
PCI_AD21
51
PCI_AD19
53
55
PCI_AD17
57
59
25,29,30,33,34 PCI_C/BE#2
61
25,29,30,33,34 PCI_IRDY#
63
65
25,29,33,38,40 PM_CLKRUN#
67
25,29,30,33 PCI_SERR#
69
71
25,29,30,33,34 PCI_PERR#
73
25,29,30,33,34 PCI_C/BE#1
PCI_AD14
75
77
PCI_AD12
79
PCI_AD10
81
83
PCI_AD8
85
CLK_PCI_MINI1
PCI_AD7
87
89
PCI_AD5
91
R358
93
@10_0402_5%
PCI_AD3
95
W=30mils
97
+5VS_MINIPCI
PCI_AD1
99
101
103
1
105
C373
107
@15P_0402_50V8J
109
2
111
113
115
117
119
L30
121
W=30mils
1
2
123
+5VS
CHB1608B121_0603
+5VS_MINIPCI

1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

RING

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

KEYLINK_5305-4-211

LAN RESERVED

W=30mils

+5VS_MINIPCI
PCI_PIRQC# 25,33
+3VS_MINIPCI

W=40mils
PCIRST#

+3V
PCIRST# 25,29,30,33,34,38

W=40mils

L23
2

+3VS

PCI_GNT#1 25
WLANPME# 29,40

CHB1608B121_0603

PCI_AD30
PCI_AD28
PCI_AD26
PCI_AD24
1
R380

2 PCI_AD18
100_0402_5%

IDSEL : PCI_AD18

PCI_AD22
PCI_AD20
PCI_AD18
PCI_AD16

PCI_PAR 25,29,30,33,34

PCI_FRAME# 25,29,30,33,34
PCI_TRDY# 25,29,30,33,34
PCI_STOP# 25,29,30,33,34
PCI_DEVSEL# 25,29,30,33,34
PCI_AD15
PCI_AD13
PCI_AD11

+5VS_MINIPCI
1

C368
1000P_0402_50V7K

C372
0.1U_0402_16V4Z

C439

0.1U_0402_16V4Z

C353
10U_0805_10V4Z

PCI_AD9
PCI_C/BE#0 25,29,30,33,34
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

+3VS_MINIPCI
2

W=20mils
2

C434
0.1U_0402_16V4Z

C430
0.1U_0402_16V4Z

C435
0.1U_0402_16V4Z

C395
0.1U_0402_16V4Z

C424
0.1U_0402_16V4Z

C382
10U_0805_10V4Z

+3V

C377
0.1U_0402_16V4Z

Compal Electronics, Inc.


Title

MINI_PCI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
Document Number
CustomLA-2371
Date:

, 28, 2004

R ev
1.0
Sheet

32

of

56

PCI_AD[0..31]

MINI_PCI 2

PCI_AD[0..31] 25,28,29,30,32,34

SOCKET for TV turner

JP27
TIP

LAN RESERVED

+3VS_MINIPCI
L25
+3VS

25,29,32 PCI_PIRQD#
W=40mils

@CHB1608B121_0603
CLK_PCI_MINI2

25 CLK_PCI_MINI2
25

PCI_REQ#4
PCI_AD31
PCI_AD29
PCI_AD27
PCI_AD25

25,29,30,32,34 PCI_C/BE#3

PCI_AD23
PCI_AD21
PCI_AD19
PCI_AD17

25,29,30,32,34 PCI_C/BE#2
25,29,30,32,34 PCI_IRDY#
25,29,32,38,40 PM_CLKRUN#
25,29,30,32 PCI_SERR#
25,29,30,32,34 PCI_PERR#
25,29,30,32,34 PCI_C/BE#1

PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7

CLK_PCI_MINI2

PCI_AD5
R359
@10_0402_5%

PCI_AD3

+5VS

W=30mils
PCI_AD1

C374
@15P_0402_50V8J

+5VS

1
2 W=30mils
L29
@CHB1608B121_0603

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

125

GND

GND

126

@AMP_1470484-1

RING

LAN RESERVED

W=30mils

+5VS
PCI_PIRQC# 25,32
+3VS_MINIPCI

W=40mils
PCIRST#

+3V
PCIRST# 25,29,30,32,34,38

L26
W=40mils

PCI_GNT#4 25

+3VS

@CHB1608B121_0603

PCI_AD30
PCI_AD28
PCI_AD26
PCI_AD24
1
R378

2 PCI_AD22
@100_0402_5%

IDSEL : PCI_AD22

PCI_AD22
PCI_AD20
PCI_AD18
PCI_AD16

PCI_PAR 25,29,30,32,34

PCI_FRAME# 25,29,30,32,34
PCI_TRDY# 25,29,30,32,34
PCI_STOP# 25,29,30,32,34
PCI_DEVSEL# 25,29,30,32,34
PCI_AD15
PCI_AD13
PCI_AD11

+5VS
1

C436
@1000P_0402_50V7K

C445
@0.1U_0402_16V4Z

C367

@0.1U_0402_16V4Z

C375
@10U_0805_10V4Z

PCI_AD9
PCI_C/BE#0 25,29,30,32,34
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

+3VS_MINIPCI
2
TV_RIGHT 35
TV_LEFT 35
1

W=20mils
2

C380
@0.1U_0402_16V4Z

C426
@0.1U_0402_16V4Z

C393
@0.1U_0402_16V4Z

C379
@0.1U_0402_16V4Z

C370

@0.1U_0402_16V4Z
2

C423
@10U_0805_10V4Z

+3V

C446
@0.1U_0402_16V4Z

Compal Electronics, Inc.


Title

MINI_PCI (TV TURNER)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
Document Number
CustomLA-2371
Date:

, 28, 2004

R ev
1.0
Sheet

33

of

56

+3VS
+3VS
C679

C744

0.1U_0402_16V4Z

C681

0.1U_0402_16V4Z

C687

0.1U_0402_16V4Z

C688

0.1U_0402_16V4Z

C678

0.1U_0402_16V4Z

C742

0.1U_0402_16V4Z

C680

0.1U_0402_16V4Z

U58
1
2
3
4

0.1U_0402_16V4Z

A0
A1
A2
GND

VCC
WC
SCL
SDA

8
7
6
5

EECK_LAN
EEDI_LAN

2
R796
560_0402_5%

AT24C02N-10SC-2.7_SO8
+3VS

C704

C689

C701

C682

C713

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

+3VS
+3VS
PCI_AD[0..31]

C890
0.33U_0603_16V4Z

2
2

C893
C894
0.1U_0402_16V4Z
1
1
0.1U_0402_16V4Z

JP22
4
3
2
1

R799

4
3
2
1
FOX_UV31413-T1

31
47
91
100
108
118
126
6
13
23
33
112
22
38

C892

R800
2

2
1

54.9_0402_1%

R801
4.99K_0603_1%

2
2

C895
270P_0402_25V8K

NC

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

R808

EEDI_LAN
EECK_LAN

+3VS

OSC

PME#

34

XCPS

60

XREXT

63

TPB0M
TPB0P
TPA0M
TPA0P
TPBIAS0

67
68
69
70
71

R802
@1K_0402_5%

XTPB0XTPB0+
XTPA0XTPA0+
XTPBIAS0

R804
2 6.34K_0402_1%
C896
47P_0402_50V8J

55

PHYRESET#

VT6301S-CD_LQFP128

XO
XI

R806
4.7K_0402_5%

R803
1K_0402_5%

C898
18P_0402_50V8K

Note:These components need to close to chip pins.

+3VS

@4.7K_0402_5%

PM & Test

C891

1
1
0.1U_0402_16V4Z

XO

IDSEL
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
PAR
REQ#
GNT#
INTA#
PCIRST#
PCICLK

41
42
45
48
49
50
37
51
52
53
54
40
39
35
74
75
76
77
78
64
81
82
83
84
85

R805
10_0402_5%

26
27
28
29

EECS

EEPROM EEDO
EEDI/SDA
I/F
EECK/SCL

1394
Differential Pairs
58

2 100_0402_5%105
120
121
123
124
125
127
128
93
92
88
89
CLK_PCI_1394 90

0.1U_0402_16V4Z
2
2

CBE0#
CBE1#
CBE2#
CBE3#

IEEE 1394
VT6301S

XI

PCI_AD16 1 R644
25,29,30,32,33 PCI_FRAME#
25,29,30,32,33 PCI_IRDY#
25,29,30,32,33 PCI_TRDY#
25,29,30,32,33 PCI_DEVSEL#
25,29,30,32,33 PCI_STOP#
25,29,30,32,33 PCI_PERR#
25,29,30,32,33 PCI_PAR
25
PCI_REQ#0
25
PCI_GNT#0
9,17,25,30 PCI_PIRQA#
25,29,30,32,33,38 PCIRST#
25 CLK_PCI_1394

12
1
119
104

GND
GND
GND
GND
GND
GND

61
65
66
79
80
56

54.9_0402_1%

Reserve for no EEPROM

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

59
62
72
73
86
87

R798

54.9_0402_1%
XTPBIAS0
XTPA0+
XTPA0XTPB0+
XTPB0-

+3V_1394

PVA
PVA
PVA
PVA
PVA
PVA

R797

54.9_0402_1%

57

25,29,30,32,33
25,29,30,32,33
25,29,30,32,33
25,29,30,32,33

L76
FCM2012C-800_0805

Power

I2CEN
CARDEN

IDSEL:PCI_AD16

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

43
44

25
24
20
19
18
16
15
14
11
10
9
8
7
4
3
2
117
116
115
114
113
109
107
106
103
102
101
98
97
96
95
94

PCI Bus

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PVD
PVD
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

U48

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

46
36
99
110
122
5
17
32
111
21
30

25,28,29,30,32,33 PCI_AD[0..31]

C897
0.1U_0402_16V4Z

+3VS
X5
XI 2

XO

24.576MHz_16P_3XG-24576-43E1
2

C899
10P_0402_50V8K

R807
1M_0402_5%

C900
10P_0402_50V8K

Compal Electronics, Inc.


Title

1394 Interface

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
Document Number
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
CustomLA-2371
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 28, 2004
Date:
C

R ev
1.0
Sheet
E

34

of

56

AC97 Codec

1
2
@CHB2012U170_0805

+5VCD

1
L52
1
L51

+AVDD_AC97

L17
1
2
CHB2012U121_0805

+VDDA

TV_LEFT

2
1
R822 0_0402_5%

TV_RIGHT

C620
0.1U_0402_16V4Z

JD2

MONO_OUT/VREFOUT3

37

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

XTL_IN

1
2
R633
22_0402_5%
2
22_0402_5%

1
R623
XTL_IN

IAC_BITCLK 26,44

XTL_OUT

1
R262

2
@0_0402_5%

R263
@10K_0402_5%

CLK_AUDIO_14M 16

+AVDD_AC97

1
28

1
R581

30

2
1000P_0402_50V7K
2
1000P_0402_50V7K
2
+AUD_VREF
0_0402_5%

R820
1M_0402_5%

SPDIFI/EAPD
SPDIFO

4
7

DVSS1
DVSS2

+AUD_VREF

27

VREF

SDA
XTLSEL

DCVOL

32

NC
VREFOUT2
VAUX
DISABLE#
SCK

31
33
34
43
44

NC
AVSS1
AVSS2

40
26
42

C268
1
R247
SMB_CLK

2
0_0402_5%

+AVDD_AC97
C266
R580
@0_0402_5%

AGND

C269

C265

C264

C597
0.1U_0402_16V4Z

ALC250-C_LQFP48

DGND

1
1

R291
1K_0402_5%

EC_IDERST 36,39,40

2
C779
2
1

MONO_IN_O

Q40
2N7002_SOT23
5,40 EC_SMB_CK2

1
R293

2
C
MONO_IN_I

2
B
E

Q60
R685
2SC2411K_SC59 2.4K_0402_5%

+5VALW

1U_0402_6.3V4Z
SN74LVC14APWLE_TSSOP14

560_0402_5%

C663
2

VIN

DELAY

ERROR

SD

VOUT

SENSE or ADJ

CNOISE

GND

+VDDA

R599
69.8K_0603_1%
1

SI9182DH-AD_MSOP8
40,42,43,49 SYSON

R687
10K_0402_5%

+VDDA

C662
0.1U_0402_16V4Z

C633
4.7U_0805_10V4Z
A

R592
24K_0402_1%

D51
RB751V_SOD323

12

1000P_0402_25V8K 2

C922

0.1U_0402_16V4Z
1

R690

14

U27F

P
13

SPKR

26

C632
4.7U_0805_10V4Z
C816
1
2

Adjustable Output
U45

+3VALW
+3V POWER

2
@0_0402_5%

560_0402_5%

1U_0402_6.3V4Z

SMB_CLK

Reserve for test

C778
1
2

PCM_SPK#

30

MONO_IN

1U_0402_6.3V4Z
R688

10K_0402_5%

1U_0402_6.3V4Z 560_0402_5%
SN74LVC14APWLE_TSSOP14
+3V POWER

C780
10U_0805_10V4Z

2
@0_0402_5%

Reserve for test

R684
10K_0402_5%

2 1
G

2
R691
1

C818
1
2

10

1
R350
R292

C817
0.22U_0402_10V4Z

11
1

SN74LVC125APWLE_TSSOP14

U27E

R497
1
2
8.2K_0402_5%

R348
1K_0402_5%

11

14

U40D

13
OE#

12

SMB_DATA

+3V
R686
10K_0402_5%

0.1U_0402_16V4Z

C784
1
2

R500
100K_0402_5%

R349

+3V

1
BEEP#

C598
4.7U_0805_10V4Z

10K_0402_5%

1
D

5,40 EC_SMB_DA2

+3VALW

1
40

2
2
0_0402_5%

+AVDD_AC97
+3V

+3V
1
R607

Q41
2N7002_SOT23

System Sound

+3V
2 L45
@HB-1M2012-121JT03_0805
2 L50
HB-1M2012-121JT03_0805
2 L40
AGND
@HB-1M2012-121JT03_0805
2 L20
@HB-1M2012-121JT03_0805

AFILT2
VREFOUT

1
C619
1
C618

SDATA_OUT

48

29

45
46

AFILT1

1U_0402_6.3V4Z

SYNC

C277
22P_0402_50V8J

R260
@10K_0402_5%

IAC_SDATAI0 26

R265
@1M_0402_5%
3

L_OUT_R 36

0.1U_0402_16V4Z

10

R611
@0_0402_5%

Ra

+3VS

2 1
G

RESET#

R613
@10K_0402_5%

0_0402_5%

SDATA_IN

XTL_OUT

11

47

R795

1
C665

XTL_OUT

24.576MHz_16P_3XG-24576-43E1

C276
22P_0402_50V8J

1U_0402_6.3V4Z

IAC_RST#

2
22_0402_5%
1
22_0402_5%
1
22_0402_5%
SMB_DATA

36

C671
BIT_CLK

CD_L

XTL_IN

LINE_IN_R

18

41

HP_OUT_R

L_OUT_L

24

47P_0402_25V8K

0.01U_0402_25V4Z

1
R626
2
R635
2
R632

36 EAPD_CODEC

@0.01U_0402_25V4Z

0.1U_0402_16V4Z

LINE_IN_L

X1

EQ_RIGHT 36,37

1U_0402_6.3V4Z

6.8K_0402_5%

23

EQ_LEFT 36,37

39

HP_OUT_L

2
0_0402_5%
2
0_0402_5%

MIC

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1 CD_LIN
1U_0402_6.3V4Z
1 CD_R IN
1U_0402_6.3V4Z
1 CD_GNA1
1U_0402_6.3V4Z
1 C_MIC
1U_0402_6.3V4Z
1
1U_0402_6.3V4Z
1
1U_0402_6.3V4Z

JD1

1
R583
1
R582

L_OUT_R

1
C635
1
C628
CD_L
2
C654
CD_R
2
C651
CD_GNA
2
C653
MIC
2
C649
2
C858
C_MD_SPK 2
C661
MONO_IN

36

17

L_OUT_L

2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z

2
1U_0402_6.3V4Z

1
C616
1
C615

2
@1000P_0402_25V8K
2
@1000P_0402_25V8K

1
C656

C_MD_SPK

0_0402_5%

C673
10U_0805_10V4Z

16

R245

C666

LINER

R615
1

DVDD2

LINEL

36

26,28,44 IAC_SYNC

MD_SPK

DVDD1

35

LINE_OUT_R

26,28,44 IAC_SDATAO

MD_SPK

38

LINE_OUT_L

AUX_R

26,44

44

25

AUX_L

15

2
1

14

2 0.1U_0402_16V4Z

CD_GNA

R250
20K_0402_5%
R256
@0_0402_5%

2 0.1U_0402_16V4Z

C860

CD_AGND

TV_RIGHT
C861
1
TV_RIGHT
NBA_PLUG
36,37 NBA_PLUG

R603
6.8K_0402_5%
2

R612
6.8K_0402_5%

39

TV_LEFT

33

CD_R

36,39 INT_CD_R

1
C617
1
C614

33

CD_L

1
20K_0402_5%
1
20K_0402_5%

TV_LEFT

AVDD1

bypass EQ when NBA_PLUG = High

2
R608
INT_CD_R 2
R605

1
C672
0.1U_0402_16V4Z

U46

INT_CD_L

C262
10U_0805_10V4Z

AVDD2

2
1
R821 0_0402_5%

2
+3V
CHB2012U121_0805
2
+3VS
@CHB2012U170_0805

+AC97_DVDD
1

36,39 INT_CD_L

L16

Title

Compal Electronics, Inc.


AC97 Codec ALC250

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
Document Number
CustomLA-2371
Date:

Rev
1.0

, 28, 2004

Sheet
1

35

of

56

+5VALW

POWER ON PATH
14

Direct CD
CTL

Audio AMP

U14A

R179

FBM-11-160808-121-T_0603
FBM-11-160808-121-T_0603
L60
INTSPK_L1
INTSPK_L2

1
1

U14B

11

JP10
2
2

L62

FBM-11-160808-121-T_0603
FBM-11-160808-121-T_0603
JP11
2
1
2
2

L61

ACES_85205-0200

10 EQ_RIGHT

G
7

L_OUT_R

INTSPK_R1
INTSPK_R2

1
2

L59
1
1

ACES_85205-0200

1 C49 VOL_AMP
0.1U_0402_16V4Z

@SN74HCT4066PW_TSSOP14

+5VCD
2

12

35

EQ_LEFT

R189
2
1
@10K_0402_5%

+2.5VOP_REF

@SN74HCT4066PW_TSSOP14

13

L_OUT_L

B
C

14

35

2
1
@10K_0402_5%

+2.5VOP_REF

R812
@470_0805_5%

W=40Mil

22U_1206_10V6M

0.1U_0402_16V4Z

+5VCD

C889

PATH_SEL
C51

R92

EQ_LEFT
EQ_RIGHT
EQ_RIGHT

43,49,50

VDD
PVDD
PVDD
BBENABLE
BYPASS
LHPIN
LLINEIN
PC-BEEP
RLINEIN
RHPIN
SHUTDOWN#
HP / LINE#
VOLUME
BUFFGAIN

@SN74HCT4066PW_TSSOP14
35,37 EQ_RIGHT
+5VCD

37

EAPD

37

2
R483

EAPD 2
G

2
28
14
16
26
18
5
11
20
21
17
27
1
15

INTSPK_L1
INTSPK_L2
INTSPK_R1
INTSPK_R2

R55

37
37
37
37

2 1.1K_0402_5%
BBIN
R36 1
1
2NBA_PLUG
R56
100K_0402_5%
1

HP_SE

TPA6010A4PWP_TSSOP28
R764
0_0402_5%

Q52

BBOUT
2 0_0402_5%
NBA_PLUG 35,37
1

C859
0.047U_0402_16V4Z

C97

S2N7002_SOT23
2

PATH_SEL_1

1
100K_0402_5%

@1U_0603_10V4Z

LOUTLOUT+
ROUTROUT+
LDOCKOUT
RDOCKOUT
LIN
RIN
BBOUT
BBIN
SE / BTL#
CLK
GND
GND

C113

C50
0.047U_0402_16V4Z

+5VALW

0.47U_0603_16V4Z

22
19
25
R89 1
3
2 10K_0402_5%
C98 1
4
2 1U_0603_10V4Z
C473 1
0.47U_0603_16V4Z
6
2
C99 1
0.47U_0603_16V4Z
7
2
C96
1
2 0.1U_0402_16V4Z 8
C95 1
0.47U_0603_16V4Z
9
2
0.47U_0603_16V4Z
10
1
2
C111
SHUTDOWN#
12
HP_SE
13
VOL_AMP
23
VOL_AMP
BUFFGAIN
24
1

U14D
B

SUSP

U7
@10K_0402_5%

35,37 EQ_LEFT

2 SUSP
G
Q67
@2N7002_SOT23

EQ_LEFT

@SN74HCT4066PW_TSSOP14

35,39 INT_CD_R

B
5

7
8

C247
1
2

R196
2
1
@10K_0402_5%

+2.5VOP_REF

U14C

14

@1U_0603_10V4Z

C462
4.7U_0805_10V4Z

0.47U_0603_16V4Z

C251
1
2

35,39 INT_CD_L

+5VCD

R184
2
1
@10K_0402_5%

+2.5VOP_REF

14

DIRECT PLAY PATH

R571
10K_0402_5%

@10K_0402_5%

14
40,41,43

10

35 EAPD_CODEC
EAPD_KBC

U22C

BBOUT
8

EAPD

BUFFGAIN
R468

BBIN

R54 1
C38

2 @10K_0402_5%
2 0.47U_0603_16V4Z

SN74LVC32APWLE_TSSOP14
@10K_0402_5%
1

40

SUSP#

EC_IDERST 35,39,40

@0_0402_5%

Q56
@2N7002_SOT23S

PATH_SEL

2
G

R474

1
D

+3VALW

+5VCD
R183
2
1
@0_0402_5%
R185
2
1

PATH_SEL_1

1
R220

Reserve for noise.

R186
100K_0402_5%

FOX_JA6033L-5S1-TR
2

5
NBA_PLUG

INTSPK_R2 1
C213
INTSPK_L2 1
C228

2
100U_D2_10VM
2
100U_D2_10VM

47_0402_5%
1
2
1

R811
47_0402_5%

L41 1
2
FBM-11-160808-700T_0603
L43 1
2
FBM-11-160808-700T_0603
1
C537
330P_0402_50V7K

Q20
2N7002_SOT23

3
6
2
1

NBA_PLUG 2
G

R239 4.3K

4.7K_0603_1%

FOX_JA6033L-5S1-TR
C518
330P_0402_50V7K

Title

Compal Electronics, Inc.


Audio AMP & JACK

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

HP
-4dB

R239
4.3K_0603_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

22dB

Q21
2N7002_SOT23

2
G

JP20

R810

R233 4.7K

SPK

Bias
(Gain)

100K_0402_5%
2

HEADPHONE
OUT JACK
1

+5VCD
1

R220 3.3K

R233
2

R47

+5VCD

C490
220P_0402_50V8K

MIC-1
1

VR - C-Type

5
VR1
1/20W_10KC_VX0107GPV2N-9508
6

2
FBM-11-160808-700T_0603

1
L39

3
6
2
1

MIC

VOL_AMP

MIC

+AUD_VREF_J
35

C254
@0.1U_0402_16V4Z

JP19

2
2.2K_0402_5%
2
@2.2K_0402_5%

+5VCD

1
R499
1
R507

MICROPHONE
IN JACK
+AUD_VREF

2
3.3K_0603_1%

Size
Document Number
CustomLA-2371
Date:

Rev
1.0

, 28, 2004

Sheet
E

36

of

56

+5VCD
+5VCD
1

+5VCD

4.7U_0805_10V4Z

C170

11

@LMV824MT_TSSOP14

1
5

@LMV824MT_TSSOP14

U39B
7

O
+

6
O

11

OUT
+

@LMV824MT_TSSOP14

R134
@100K_0603_1%
2

@0.1U_0402_16V4Z

U39C

11

10
C171

U39A

4
2

@100K_0603_1%
+5VCD

+2.5VOP_REF

R124

+5VCD

+5VCD

Audio Amplifier
1
C908

C909

C910
@10U_0805_10V4Z

+5VCD
1

W=40Mil

R814
@10U_0805_10V4Z@0.1U_0402_16V4Z
@100K_0402_5%

VOL_AMP

36

INTSPK_L2

36
35,36 EQ_LEFT
35,36 EQ_RIGHT

INTSPK_R2

EQ_LEFT
EQ_RIGHT

2
1
R815 @0_0402_5%
INTSPK_L2 2
1
R816 @0_0402_5%
INTSPK_R2 1
2
R818 @0_0402_5%

C923 1
C912 1
2AMP_L1
2
@0.47U_0603_16V4Z
@0.47U_0603_16V4Z
C924 1
2AMP_R1 C913 1
2
@0.47U_0603_16V4Z
@0.47U_0603_16V4Z

7
18
19
2
3
4
21
5
23
6
20
17

EQ_LEFT
C917 1
2
@0.47U_0603_16V7K

PVDD SHUTDOWN#
PVDD
SE/BTL#
VDD
PC-BEEP
BYPASS
HP/LINE#
LOUTVOLUME
ROUTLOUT+
LBYPASS
ROUT+
RBYPASS
LLINEIN
RLINEIN
GND
LHPIN
GND
RHPIN
GND
GND
CLK

22
15
14
11
9
16
10
8

D
Q68

1
1R817
R819

INTSPK_L1
2
INTSPK_R1
@0_0402_5%
2
@0_0402_5%
1

1
12
13
24

INTSPK_L1 36
INTSPK_R1 36

2
G

EAPD

36

@2N7002_SOT23

1
C914

C915
2

C916
2

@APA2121_TSSOP24

EQ_RIGHT
C918 1
2
@0.47U_0603_16V4Z

SHUTDOWN#
NBA_PLUG
C911
@0.1U_0402_16V4Z

36

U59

VOL_AMP

NBA_PLUG

35,36 NBA_PLUG

@0.47U_0603_16V7K
@0.47U_0603_16V7K

@0.47U_0603_16V4Z

C919
@0.047U_0402_16V4Z

2
R823
2
C925
2
R824

AMP_L1
1
@1.5K_0402_5%
VOL_AMP
1
@0.1U_0402_16V4Z
AMP_R1
1
@1.5K_0402_5%

Compal Electronics, Inc.


Title

APA2121 Audio Amplifier

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
Document Number
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
CustomLA-2371
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 28, 2004
Date:
A

R ev
1.0
Sheet
E

37

of

56

USB
CONNECTOR
U55
1
2
3
4

+5VALW

GND
IN
IN
EN#

OUT
OUT
OUT
OUT

8
7
6
5

+USB_BS

S YSON#

+3V

GND
IN
EN1#
EN2#

C63

OC1#
OUT1
OUT2
OC2#

8
7
6
5

1 R453
2
4.7K_0402_5%

USB_OC2#

1 R472
2
4.7K_0402_5%

USB_OC1#

KC FBM-L11-201209-221LMAT_0805
L64
JP16
1 VCC VCC
1
2
USBP12 D0- D1USBP1+
3 D0+ D1+
4 VSS VSS

USB_OC2# 26

+USB_BS
USBP1USBP1+

26
26

USB_OC1# 26

@TPS2042ADR_SO8
2

0.1U_0402_16V4Z

SYSON#

1
2

100K_0402_5%

R456

100K_0402_5%

S YSON#

C459
0.1U_0402_16V4Z

10
12

C460
0.1U_0402_16V4Z

G2
G4

G1
G3

KC FBM-L11-201209-221LMAT_0805
L65
1
2
+USB_BS
USBP2USBP2- 26
USBP2+
USBP2+ 26

5
6
7
8
9
11

TYCO_1470748-1

+USB_CS
+3V

U28

1
1

C720
0.1U_0402_16V4Z

GND
IN
IN
EN#

OUT
OUT
OUT
OC#

100K_0402_5%

8
7
6
5

R666
1

C43
0.1U_0402_16V4Z

C339

C40

C42

150U_D2_6.3VM

0.1U_0402_16V4Z

C711
0.1U_0402_16V4Z

2
150U_D2_6.3VM

USB_OC0# 26

4.7K_0402_5%1

@0_0402_5%

@TPS2041ADR_SO8

USB_OC0#

C44
150U_D2_6.3VM

R669

+USB_BS

R672

1
2
3
4

+USB_BS

+5VALW

+
C327
@150U_D2_6.3VM

+USB_CS

C732
0.1U_0402_16V4Z

USBP2+

USBP2-

USBP1+

USBP1-

USBP0+

C20

C19

C457

C458

C329

USBP0C334

@2.2P_0402_50V8C

@2.2P_0402_50V8C

@2.2P_0402_50V8C @2.2P_0402_50V8C

@2.2P_0402_50V8C

@2.2P_0402_50V8C

S YSON#

+5VS

+3VS

CAP.FOR EMI
JP33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

SUPER I/O SMsC FDC47N217

R133 2

1 @10K_0402_5%

16 CLK_14M_SIO

+3VS

R82

2
2
R81

1 @10K_0402_5%
1
@10K_0402_5%

LPC_FRAME#
LPC_DRQ#1

15
16

LFRAME#
LDRQ#

SIO_PD#

17
18

PCI_RESET#
LPCPD#

PM_CLKRUN#
CLK_PCI_SIO
SERIRQ
SIO_PME#

19
20
21
6

CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#

CLK_14M_SIO

SIO_SMI#
SIO_IRQ

CLK14

RXD1
TXD1
DSR1#
RTS1#
CTS1#
DTR1#
RI1#
DCD1#

62
63
64
1
2
3
4
5

IRRX2
IRTX2
IRMODE/IRRX3

37
38
39

INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
ERROR#
ALF#
STROBE#

41
42
44
46
47
48
49
50
51
53
55
56
57
58
59
60
61

VTR
VCC
VCC
VCC
VCC

7
11
26
45
54

FIR

CLOCK

23
24
25
27
28
29
30
31
32
33
34
35
36
40

GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23

8
22
43
52

VSS
VSS
VSS
VSS

POWER

LPC47N217_STQFP64

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI #1
DCD#1

1
R107

2
@1K_0402_5%

SERIRQ

C951

CLK_14M_SIO 16
+3VS

+5VS
@0.1U_0402_16V4Z
C952

1
R793

+5VS

2
@0_0402_5%

+1.5VS

CLK_PCI_SIO 25
@0.1U_0402_16V4Z

Reserve for debug

@ACES_85201-2005

+5VS
CLK_PCI_SIO
+3VS

R105
@10_0402_5%

RP9
DSR#1
CTS#1
RI #1
DCD#1

8
7
6
5

JP28

CLK_14M_SIO
2

+3VS

LAD0
LAD1
LAD2
LAD3

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#1
PCIRST#
PM_CLKRUN#

+3VS
@0.1U_0402_16V4Z

R792
2 @0_0402_5%

1
2
3
4

1 C127
@15P_0402_50V8J

@4.7K_8P4R_1206_5%

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI #1
DCD#1

R129
@10_0402_5%
1

25,30,40 SERIRQ

10
12
13
14

C950
+1.5VS

25,29,32,33,40 PM_CLKRUN#
25 CLK_PCI_SIO

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

25,40 LPC_FRAME#
25 LPC_DRQ1#
25,29,30,32,33,34 PCIRST#
1
2
+3VS
R109 @10K_0402_5%

U8

SERIAL I/F

PARALLEL I/F

LPC_AD[0..3]

LPC I/F

25,40 LPC_AD[0..3]

GPIO

43

R446

R454
1
2
@0_0402_5%
R471
1
2
@0_0402_5%

U5
1
2
3
4

TYCO_3-1470859-1

1
+USB_BS
+5VALW

+
C73
@150U_D2_6.3VM

KC FBM-L11-201209-221LMAT_0805
L63
JP25
1 VBUS S_GND
1
2
USBP02 DUSBP0+
3 D+
4 GND S_GND

+USB_CS
USBP0USBP0+

26
26

G528_SO8

Keep 20 mils minimum spacing between


USB signals and others signals

USB
CONNECTOR

1
C180
@15P_0402_50V8J

1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
9
10
@96212-1011S

+3VS

1
C106

2
@4.7U_0805_10V4Z

1
C167

2
@0.1U_0402_16V4Z

1
C168

1
C84

2
2
@0.1U_0402_16V4Z @0.1U_0402_16V4Z

1
C114

2
@2200P_0402_25V7K

1
C131

1
C117

2
2
@100P_0402_25V8K @2200P_0402_25V7K

C83
2
@100P_0402_25V8K

Compal Electronics, Inc.


Title

USB Conn.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
C

Document Number

Date:

, 28, 2004

Rev
1.0

LA-2371
Sheet

38

of

56

C245 +3VALW
0.1U_0402_16V4Z

2
470_0402_5%

PD_PDI ORDY
PCSEL
PD_PDDACK#

1
R420

PD_IRQ14
8
7
6
5

1
2
3
4
RP2

SD_SDCS1#
SD_SDA0
SD_SDCS3#
SD_SDA1

26
IDE_SDA2
26
INT_IRQ15
26 IDE_SDIOW#
26 IDE_SDDACK#

IDE_SDA2
INT_IRQ15
IDE_SDIOW#
IDE_SDDACK#
33_0804_8P4R_5%

8
7
6
5

1
2
3
4
RP4

SD_SDA2
SD_IRQ15
SD_SDIOW#
SD_SDDACK#

26 IDE_SDIOR#
26 IDE_SDDREQ

IDE_SDD14
8
IDE_SDIOR#
7
IDE_SDDREQ
6
IDE_SDD15
5
33_0804_8P4R_5%
IDE_SDD0
8
IDE_SDD12
7
IDE_SDD1
6
IDE_SDD2
5
33_0804_8P4R_5%
IDE_SDD13
8
SD_D3
7
SD_D4
6
SD_D11
5
33_0804_8P4R_5%
IDE_SDD7
1
R90
SD_D10
8
IDE_SDD6
7
IDE_SDD9
6
IDE_SDD5
5
33_0804_8P4R_5%

PD_PDA1

40 PHDD_LED#
+5VS

R103
1
2
8.2K_0402_5%

PD_PDA0
PD_PDA2
PD_PDCS1#
PD_PDCS3#
PHDD_LED#
2
100K_0402_5%

1
R425

+5VS

60mil

SD_D14
1
SD_SDIOR#
2
SD_SDDREQ
3
SD_D15
4
RP6
SD_D0
1
SD_D12
2
SD_D1
3
SD_D2
4
RP8
SD_D13
1
IDE_SDD3
2
IDE_SDD4
3
IDE_SDD11
4
RP5
SD_D7
2
33_0402_5%
IDE_SDD10
1
SD_D6
2
SD_D9
3
SD_D5
4
RP3

1
2
33_0402_5%

14
P
G
7

PCMRST# 40

26

1 R214
2
0_0402_5%

SIDERST#

I0

10

I1

4
8

R195
10K_0402_5%

35,36 INT_CD_L
35
CD_AGND

SD_D8

1
2 SHDD_LED#
R130 100K_0402_5%

+5VCD

+5VCD

SHDD_LED#

SD_SDIOW#
SD_SDI ORDY
SD_IRQ15
SD_SDA1
SD_SDA0
SW_IDE_SDCS1#
SHDD_LED#

+3VALW

INT_CD_L
CD_AGND
SIDE_RST#
ODD_SDD7
ODD_SDD6
ODD_SDD5
ODD_SDD4
ODD_SDD3
ODD_SDD2
ODD_SDD1
ODD_SDD0
GND
ODD_IOWB#
ODD_IORDYB
ODD_IIRQB
ODD_SA1
ODD_SA0
ODD_CSB#0
SHDD_LED#
+5VS
+5VS
GND
GND
SEC_CSEL
N/A

INT_CD_R
GND
ODD_SDD8
ODD_SDD9
ODD_SDD10
ODD_SDD11
ODD_SDD12
ODD_SDD13
ODD_SDD14
ODD_SDD15
ODD_REQB
ODD_IORB#
GND
ODD_ACKB#
N/A
CBLIDB
ODD_SA2
ODD_CSB#1
+5VS
+5VS
+5VS
GND
GND
GND
N/A

+5VCD

+5VALW
1
R125

2
240K_0402_5%

AOS 3401_SOT23

Q9
+5VCD
1

R126

INT_CD_R
INT_CD_R 35,36
R73
1
2
SD_D8
@0_0402_5%
SD_D9
SD_D10
SD_D11
SD_D12
SD_D13
SD_D14
SD_D15
SD_SDDREQ
SD_SDIOR#

C163
0.1U_0402_16V4Z

10U_0805_10V4Z

SD_SDDACK#
R118 100K_0402_5%
1
2
SD_SDA2
SW_IDE_SDCS3#

CD_ PLAY
Q13
DTC124EK_SC59

CD_PLAY 40

R104
@10K_0402_5%

+5VALW

+5VCD
2
+5VCD

1
2
C182 0.1U_0402_10V6K

+5VCD
+5VS

2
C129
10U_0805_10V4Z

C118
1U_0603_10V4Z

Placea caps. near HDD


CONN.

470_0402_5%

R150
10K_0402_5%

OCTEK_CDR-50JM2

R135

C451

** 1029:
Change U4D to U76D

SIDE_RST#

Net width should be 60mil wide

10K_0402_5%
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

Short when not support SWDJ

IDE_SDD[0..15]

26 IDE_SDD[0..15]

SN74LVC125APWLE_TSSOP14

SN74LVC08APW_TSSOP14

JP18
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

*27

U11B

DMARQ
GND
DIOW# / STOP
GND
DIOR# / HDMARDY# / HSTROBE
GND
IORDY / DDMARDY# / DSTROBE
CSEL
DMACK#
GND
INTRQ
Reserved
DA1
PDIAG#
DA0
DA2
CS0#
CS1#
DASP#
GND
+5VCC
+5VCC
GND
NC

U16C
9

OE#

R219
@0_0402_5%

C164

40

SB_PCI_RST#

@HB-1M2012-121JT03_0805

INT_CD_L
CD_ AGND
SIDE_RST#
SD_D7
SD_D6
SD_D5
SD_D4
SD_D3
SD_D2
SD_D1
SD_D0

** 1029:
Change U4D to U76D

C141
1
2

R100

1000P_0402_50V7K

1
C450
10U_0805_10V4Z

1
C449
10U_0805_10V4Z

C448
C447
1U_0603_10V4Z

0.1U_0402_16V4Z

G_PCI_RST#

2N7002_SOT23
Q15

2
G

+5VCD
0.1U_0402_16V4Z
W=80mils

C158
1000P_0402_50V7K
G_PCI_RST#
+5VCD

R151
10K_0402_5%

U11A
O

1
SD_SDCS3#

1
C903

2
0.1U_0402_16V4Z

26 IDE_SDIORDY

R84

SD_SDI ORDY

33_0402_5%

1
I

OE#

PD_PDDREQ
2
5.6K_0402_5%

G_PCI_RST#
10

2
10K_0402_5%

1
R417

2
4.7U_0805_10V4Z

C902

R91
4.7K_0402_5%

+5VCD
1
R411

C901

+3VS

SW_IDE_SDCS1#

SN74LVC125APWLE_TSSOP14

33_0402_5%

PD_D7

C181
1U_0603_10V4Z

C175

PD_PDI ORDY

OE#

P
2

1
1
R418

SD_SDCS1#

4.7U_0805_10V4Z

C142

1
14

R419
4.7K_0402_5%

0.1U_0402_16V4Z C240

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

C169

Place component's closely MODULE CONNECTOR.

+3VALW

+3VS

26 IDE_PDIORDY

R213

@0_0402_5%

1U_0603_10V4Z

R187
10K_0402_5%

SN74LVC08APW_TSSOP14
SN74LVC08APW_TSSOP14

2
0_0402_5%

2 L77

PIDE_RST#

0_0402_5%

Reserve for test

@10K_0402_5%

SB_PCI_RST#

1 R207

PIDERST#

+5VALW

R77
IDE_SDD8

26

ALLTOP_C17864-14401_REVERSE

CD_ AGND

R218
6 1

IDE_SDCS1#
IDE_SDA0
IDE_SDCS3#
IDE_SDA1
33_0804_8P4R_5%

I1

26 IDE_SDCS1#
26
IDE_SDA0
26 IDE_SDCS3#
26
IDE_SDA1

PD_PDIOR#

PD_PDIOW#

GND:Master
NC: Slave

1
2
R422 8.2K_0402_5%

I1

I0

PD_IRQ14
33_0402_5%

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44

PD_D7
PD_D8
PD_D6
PD_D9
PD_D5
PD_D10
PD_D4
PD_D11
PD_D3
PD_D12
PD_D2
PD_D13
PD_D1
PD_D14
PD_D0
PD_D15

R194
@0_0402_5%

RESET#
GND
DD7
DD8
DD6
DD9
DD5
DD10
DD4
DD11
DD3
DD12
DD2
DD13
DD1
DD14
DD0
DD15
GND

U16A

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

I0

JP29
PIDE_RST#

1
R421

U16B
SB_PCI_RST#

25 SB_PCI_RST#

INT_IRQ14

INT_IRQ14

IDE_PDD[0..15]

26 IDE_PDD[0..15]

PD_PDDREQ
26

35,36,40 EC_IDERST

IDE_PDCS1#

HDD CONNECTOR

R149
10K_0402_5%

U11C
O

SN74LVC125APWLE_TSSOP14

26

26 IDE_PDCS3#
26
IDE_PDA0
26
IDE_PDA1
26
IDE_PDA2

8
7
6
5

26 IDE_PDDACK#
26 IDE_PDIOR#
26 IDE_PDIOW#
26 IDE_PDDREQ

PD_D9
PD_D6
PD_D8
PD_D7
33_0804_8P4R_5%
PD_D11
8
PD_D4
7
PD_D10
6
PD_D5
5
33_0804_8P4R_5%
PD_D13
8
PD_D2
7
PD_D12
6
PD_D3
5
33_0804_8P4R_5%
PD_D15
8
PD_D0
7
PD_D14
6
PD_D1
5
33_0804_8P4R_5%
PD_PDDACK#
8
PD_PDIOR#
7
PD_PDIOW#
6
PD_PDDREQ
5
33_0804_8P4R_5%
PD_PDCS1#
2
33_0402_5%
PD_PDCS3#
8
PD_PDA0
7
PD_PDA1
6
PD_PDA2
5
33_0804_8P4R_5%

1
2
3
4
RP38
IDE_PDD11
1
IDE_PDD4
2
IDE_PDD10
3
IDE_PDD5
4
RP39
IDE_PDD13
1
IDE_PDD2
2
IDE_PDD12
3
IDE_PDD3
4
RP40
IDE_PDD15
1
IDE_PDD0
2
IDE_PDD14
3
IDE_PDD1
4
RP41
IDE_PDDACK#
1
IDE_PDIOR#
2
IDE_PDIOW#
3
IDE_PDDREQ
4
RP42
IDE_PDCS1#
1
R424
IDE_PDCS3#
1
IDE_PDA0
2
IDE_PDA1
3
IDE_PDA2
4
RP43

IDE_PDD9
IDE_PDD6
IDE_PDD8
IDE_PDD7

1
R83

2
10K_0402_5%

SD_D7

1
R99

2
5.6K_0402_5%

SD_SDDREQ

SW_IDE_SDCS3#

Compal Electronics, Inc.


Title

IDE/ FDD MODULE CONN.


Size
C

Document Number

Date:

, 28, 2004

Rev
1.0

LA-2371
Sheet

39

of

56

+3VALW

0.1U_0402_16V4Z
ECAGND 2
C300

25,30,38 SERIRQ
25 LPC_DRQ0#
25,38 LPC_FRAME#

D29
1

2
R168

EC_RST#

0.1U_0402_16V4Z

R180
@33_0402_5%

910_NUM_LED#

1
EC_RST#

1
47K_0402_5%

C229
@22P_0402_25V8K

C233
0.1U_0402_16V4Z

26
26

2
@0_0402_5%
2
@0_0402_5%
2
@0_0402_5%

GATEA20

GATEA20
KBRST#
41
41
41
41

For KB910

591_NUM_LED# 1
R164
591_EC_SCI#
1
R177
591_HDD_LED# 1
R285

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

EC_PLAYBTN#
EC_STOPBTN#
EC_REVBTN#
EC_FRDBTN#

NUM_LED#

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

EC_SCI# 26
HDD_LED# 42

910_NUM_LED#

1
R178
910_EC_SCI#
1
R169
910_HDD_LED#
1
R284

2
0_0402_5%
2
0_0402_5%
2
0_0402_5%

pin110 reserve for KSO16


pin111 reserve for KSO17

+3VALW

For KB910

+5VS

For KB910

2
R281

RP11
1
2
3
4

+5VALW
EC_SMC1
1
4.7K_0402_5%
EC_SMD1
1
4.7K_0402_5%

2
R217
2
R211

10K_0804_8P4R_5%
1
2 TP_CLK
R289
4.7K_0402_5%
1
2 TP_DATA
R298
4.7K_0402_5%

Reserve for test


EC_SMB_CK2
1
@4.7K_0402_5%
EC_SMB_DA2
1
@4.7K_0402_5%

2
R246
2
R259
2
R253

EC_TINT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

1
100K_0402_5%

PSCLK1
PSDAT1
PSCLK2
PSDAT2

8
7
6
5

41
41
42

+3V

2
R762
2
R763

7
8
9
15
14
13
10
18
19
22
23

591_EC_SCI# 31

Place D33
Close to EC Chip
+3VALW

PSCLK1
PSDAT1
PSCLK2
PSDAT2
TP_CLK
TP_DATA

TP_CLK
TP_DATA
LID_SW#

591_HDD_LED#

VR_ON
1
47K_0402_5%
SYSON
1
10K_0402_5%
SUSP#
1
10K_0402_5%

5
6
71
72
73
74
77
78
79
80
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#

161

U15

2
@0_0402_5%
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

25 CLK_PCI_LPC

C298

1
R171

LPC_AD[0..3]

25,38 LPC_AD[0..3]

@SSM14_SMA
1

1 BATT_TEMP
0.01U_0402_25V7Z

+EC_AVCC

1
C231
0.1U_0402_16V4Z

Host interface

AD Input

IOPD3/ECSCI#

DA0
DA1
DA2
DA3

GA20/IOPB5
KBRST/IOPB6

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

PWM
or PORTA

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

Key matrix scan


PORTB

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

105
106
107
108
109

TINT#
TCK
TDO
TDI
TMS

110
111
114
115
116
117
118
119

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

PORTE
JTAG debug port

32KX1/32KCLKIN

C RY2

160

32KX2

168
169
170
171
172
175
176
1

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24/RESET2

C RY11

41
2

FSEL#
C RY2

@20M_0603_5%

1
IN

Y2
32.768KHZ_12.5P_1TJS125DJ2A073

OUT

C257
12P_0402_50V8J
1K_0402_5%
1K_0402_5%

NC

C263
10P_0402_50V8J

KSO17

EC_SMC1
EC_SMD1
NB_RST#

41

EC_SMC1 41,46
EC_SMD1 41,46
R205
NB_RST# 7,17,25
1
2
47K_0402_5%
PBTN_OUT# 26

EC_SMB_CK2
EC_SMB_DA2

EC_SMB_CK2 5,35
EC_SMB_DA2 5,35
FAN_SPEED1 24

EC_PME#
EC_THRM#
FAN_SPEED2

EC_THRM# 26
FAN_SPEED2 24
CD_PLAY 39

ACIN

ACIN
26,41,45
KILL_SW# 32,42
PM_SLP_S3# 26

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

138
139
140
141
144
145
146
147

IOPJ0/RD
IOPJ1/WR0

150
151

FR D#

SELIO#

152

SELIO#

IOPD4
IOPD5
IOPD6
IOPD7

41
42
54
55

591_NUM_LED#
CAPS_LED#
PADS_LED#

IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13_BE0
IOPK6/A14_BE1
IOPK7/A15_CBRD

143
142
135
134
130
129
121
120

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1#

113
112
104
103
48

KBA16
KBA17
KBA18
KBA19

KSO10

C928
100P_0402_25V8K
1
2

KSO11

C929
100P_0402_25V8K
1
2

KSO8

C930
100P_0402_25V8K
1
2

KSO9

C931
100P_0402_25V8K
1
2

KSO13

C932
100P_0402_25V8K
1
2

KSI7

C933
100P_0402_25V8K
1
2

KSO3

C934
100P_0402_25V8K
1
2

KSO7

C935
100P_0402_25V8K
1
2

KSO12

C936
100P_0402_25V8K
1
2

KSI4

C937
100P_0402_25V8K
1
2

KSI6

C938
100P_0402_25V8K
1
2

KSI5

C939
100P_0402_25V8K
1
2

KSO6

C940
100P_0402_25V8K
1
2

KSO5

C941
100P_0402_25V8K
1
2

KSI3

C942
100P_0402_25V8K
1
2

KSI0

C943
100P_0402_25V8K
1
2

KSO0

C944
100P_0402_25V8K
1
2

KSO1

C945
100P_0402_25V8K
1
2

KSI1

C946
100P_0402_25V8K
1
2

KSI2

C947
100P_0402_25V8K
1
2

KSO2

C948
100P_0402_25V8K
1
2

KSO4

C949
100P_0402_25V8K
1
2

NUM_LED#
PADS_LED#
CAPS_LED# R412
1
2
KSO15
300_0402_5%
KSO14
KSO10
KSO11
KSO8
KSO9
KSO13
KSI7
KSO3
KSO7
KSO12
KSI4
KSI6
KSI5
KSO6
KSO5
KSI3
KSI0
KSO0
KSO1
KSI1
KSI2
KSO2
KSO4
R410
1
2

ECAGND
1
CHB1608B121_0603
1 R175 910_GND0
R174
910_GND1
1
910_EC_SCI#

2
L21
2
2

910_HDD_LED#

For 551.
551_GND

R794

EAPD_KBC

0_0402_5%
1

+3VS

+3VS

300_0402_5%
R409

FAN_SPEED2

PM_CLKRUN# 25,29,32,33,38

1
R172

C927
100P_0402_25V8K
1
2

JP8

1
2
300_0402_5%
ELCO_00-6278-034-001-800

ON/OFF 42
PM_SLP_S5# 26

LPCPD

C926
100P_0402_25V8K
1
2

KSO14

+3VS

1
2
C954 680P_0402_50V7K

2
@1K_0402_5%

I/O Address
BADDR1(KBA3) BADDR0(KBA2)

ADB[0..7]

ADB[0..7] 41

FRD#
FWR#

41
41

SELIO#

41

Index

Data

2E

2F

4E

4F

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1


B

Reserved

ENV0 (KBA0) ENV1 (KBA1) TRIS (KBA4)


0
IRE
0
0
* OBD
0
1
0
DEV
0
0
1
1
PROG
1
0
SHBM(KBA5)=1: Enable shared memory with host BIOS
TRIS(KBA4)=1: While in IRE and OBD, float all the
signals for clip-on ISE use

PHDD_LED# 39

+3VALW
KBA[0..19]

KBA[0..19] 41

KBA1

1
R286
1
R294
1
R287
1
R288
1
R295
1
R296
1
R283

KBA2
KBA3
KBA5

FSTCHG

47

BIOS_ID
ID
SKU_ID

BATT_LOW_LED# 41
WL_LED# 41,42
PWR_LED# 41,42
BATT_CHGI_LED# 41
ODD_LED# 41,42

1
2
C234 @1U_0402_6.3V4Z

Title

For KB910
36

KSO17

KSO15

KEYBOARD CONN.
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

EC_ON
42,44
EC_LID_OUT# 26
S4_LATCH 42

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

NC

Analog Board ID definition,


Please see page 3.

0.1U_0402_16V4Z

C354

Rb

SEL0#
SEL1#
CLK

PC87591L-VPCN01 A2_LQFP176

PORTL

R225
0_0402_5%

AD_BID0
R344
0_0402_5%

173
174
47

PORTM

ALI/MH# 46
S4_DATA 42
MUL_KEY# 41

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10

R227

FSEL#

PORTK

AGND

Remove 20M
Ohm R for
KB910

BKOFF#

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

INVT_PWM 24
BEEP#
35
PWR_SUSP_LED 41,42
ACOFF
47

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

0.22U_0603_10V7K

BATT_OVP 47

INVT_PWM

124
125
126
127
128
131
132
133

47,50

+3VALW

@E&T_96212-1011S

11
12
20
21
85
86
91
92
97
98

10K_0804_8P4R_5%

R352
100K_0402_5%

Ra

MUL_KEY#
FR D#
SELIO#
FSEL#

148
149
155
156
3
4
27
28

PORTJ-2

96

+3VALW

8
7
6
5

SYSON
SUSP#
VR_ON

35,42,43,49 SYSON
36,41,43 SUSP#
51
VR_ON
39
PCMRST#
26,44 EC_RSMRST#
39 SHDD_LED#
9,17
ENBKL
24
BKOFF#

RP10
1
2
3
4

PCIRRX

RCIRRX

PORTD-2

GND1
GND2
GND3
GND4
GND5
GND6
GND7

29,32 LAN_PME#

41,44

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

17
35
46
122
159
167
137

29,32 WLANPME#

1 GATEA20
47K_0402_5%
1 EC_PME#
47K_0402_5%

62
63
69
70
75
76

26
29
30

ADP_I

C888

EC_TINT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

BATT_TEMP 46

DAC_BRIG 24
EN_DFAN2 24
IREF
47
EN_DFAN1 24

LPCPD

IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7

PORTI

1
2
100K_0402_1%
1

EC_PME#

1
R791
2
R176
2
R200

EC_SMI#

26
EC_SMI#
35,36,39 EC_IDERST
32
WL_OFF#
26
EC_SWI#

For EC Tools
1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
9
10

R790
ADP_I1

2
44
24
25

IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46

+3VALW
2PCIRRX
10K_0402_5%

32
33
36
37
38
39
40
43

IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT

PORTH

158

+3VALW

0.1U_0402_16V4Z

99
100
101
102

153
154
162
163
164
165

PS2 interface

C RY1

Add for Battery

+RTCVCC

C256

BATT_TEMPB
BATT_TEMP
81
82 VBATTA ADP_I1
83
84 VBATTB AD_BID0
87
88
MUL_KEY#
89
SKU_ID
90
BIOS_ID
93
ID
94

IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL/RESET2

PORTC

PORTD-1

2
@0_0402_5%
2
0_0402_5%

DA output

PORTJ-1
EC_SMB_CK2
1
4.7K_0402_5%
EC_SMB_DA2
1
4.7K_0402_5%

AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9

+5VALW
2
R204
2
R199

1
R772
1
R773

VBAT

R549 for KB910


R550 for NS591L

C302

+EC_VDD

95

+3VS

2
CHB1608B121_0603

AVCC

JP5

34
45
123
136
157
166

L22

1
0.1U_0402_16V4Z
1
1000P_0402_50V7K
1
1000P_0402_50V7K
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
0_0402_5%
2
@0_0402_5%

+EC_VCC

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6

2
C301
2
C284
2
C267
2
C304
1
C232
1
C252

+EC_VCC

1
R166
1
R165

+3VALW

+EC_VCC

VDD

+EC_AVCC

1
2
R167 0_0805_5%

16

2
1K_0402_5%
2
@1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
@10K_0402_5%
2
@10K_0402_5%
2
@10K_0402_5%

SKU_ID: For SKU ID


ID: Reserve
BIOS_ID: H EFQ00
L EEQ00

1
R302
1
R301
1
R282
1

2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2

C882

0.1U_0402_16V4Z

Compal Electronics, Inc.


K/B-CTRL/PC87591

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Size
Document Number
CustomLA-2371
Date:

Rev
1.0

, 28, 2004

Sheet
1

40

of

56

+5VALW

14
Q27
2N7002_SOT23

40

SELIO#

SELIO#

11
1

CLK
OE

SN74LVC32APWLE_TSSOP14

40
C337
+5VALW

CIR_GATING# 44
BATT_LOW_LED# 40
PWR_LED# 40,42
WL_LED# 40,42
BATT_CHGI_LED# 40
ODD_LED# 40,42
EC_RCVEN 44
EC_RCRST# 44

BATT_LOW_LED#
PWR_LED#
WL_LED#
BATT_CHGI_LED#
ODD_LED#

@1U_0603_10V4Z

@1.2M_0402_5%

14
@LMV824MT_TSSOP14

P
O
7

12

11

40

KSO17

EC_REVBTN#

SN74LVC32APWLE_TSSOP14

SW4
TC010-PS11CET_5P

TP_CLK
TP_DATA
+5VS
+5VALW
+5VALW
26,40,45
ACIN

40
40

R326
100K_0402_5%

8
7
6
5

40,46 EC_SMC1
40,46 EC_SMD1

VCC
WP
SCL
SDA

A0
A1
A2
GND

PWR_LED#

U25
1
2
3
4

PWR_SUSP_LED
BATT_CHGI_LED#
BATT_LOW_LED#

AT24C16N-10SI-2.7_SO8
1

AC IN

2
C871
2
C872
2
C873
2
C874
2
C875

1
1000P_0402_50V7K
1
1000P_0402_50V7K
1
1000P_0402_50V7K
1
1000P_0402_50V7K
1
1000P_0402_50V7K

1
C876
1
C877
1
C878

2
33P_0402_50V8J
2
33P_0402_50V8J
2
33P_0402_50V8J

TP_DATA_E
RCIRRX_E

TP_CLK_E
TP_DATA_E

2
2

+5V_CIR
+3VALW
40,44 RCIRRX

RCIRRX_E
1
2
L68
@FBM-11-160808-121-T_0603

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

FRD BTN

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

PSOT24C_SOT23

EC_FRDBTN#

PLAY BTN

ACES_85201-1605

EC_PLAYBTN#

EC_PLAYBTN# 40

SW6
TC010-PS11CET_5P
D30

+5V_CIR
+5VALW

EC_FRDBTN# 40

SW5
TC010-PS11CET_5P

TP_CLK_E

1
1

AC IN
PWR_LED#
PWR_SUSP_LED
BATT_CHGI_LED#
BATT_LOW_LED#

40,42 PWR_SUSP_LED

R328
100K_0402_5%

L66
L67

3
JP6

+5VALW

D22
1

FBM-11-160808-121-T_0603
FBM-11-160808-121-T_0603

+5VALW
C310
2 0.1U_0402_16V4Z

EC_REVBTN# 40

Touch Pad Connector

42,45

MUL_KEY# 40

13

U22D

P
11

51ON#
MUL_KEY#

REV BTN

14

12

DAN202U_SC70
SW2
TC010-PS11CET_5P

U39D
OUT

2
1

+3VALW

@V-PORT-0603-220 M-V05_0603

D17
2

+5VCD

13

D16

@SN74HCT374PW_TSSOP20

R331

AA

2
5
6
9
12
15
16
19

FWR#

U22B

KBA2

1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q

EC_FLASH# 26

U22A
SN74LVC32APWLE_TSSOP14

1
D

1D
2D
3D
4D
5D
6D
7D
8D

2
1

3
4
7
8
13
14
17
18

VCC

36,40,43

ADB0
ADB1
ADB2
ADB3
ADB4
R311
ADB5
@100K_0402_5%ADB6
ADB7

10

SUSP#

+3VALW

2
G

1
14
P

FWE#

U26

+3VALW

R299
100K_0402_5%

GND

+3VALW

+3VALW

20

1
2
C305
@0.1U_0402_16V4Z

+5VS

2
1
3

1MB Flash ROM

1
C431
0.1U_0402_16V4Z

40
40

KBA[0..19]
ADB[0..7]

KBA[0..19]
ADB[0..7]

1000P_0402_50V7K
C880
C881
1000P_0402_50V7K

1000P_0402_50V7K

C432
0.1U_0402_16V4Z

C879

STOP BTN

40
40

FSEL#
FRD#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

FSEL#
FR D#
FWE#

22
24
9

CE#
OE#
WE#

VCC0
VCC1

31
30

D0
D1
D2
D3
D4
D5
D6
D7

25
26
27
28
32
33
34
35

RP#
NC
READY/BUSY#
NC0
NC1

10
11
12
29
38

GND0
GND1

23
39

3
5

U31
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37

4
+3VALW

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

PSOT24C_SOT23

EC_STOPBTN#

EC_STOPBTN# 40

SW7
TC010-PS11CET_5P

1MB BIOS Connector


C427
JP7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

1
2
R340
100K_0402_5%

0.1U_0402_16V4Z

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#

+3VALW
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

KBA17
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4
1
ADB3
ADB2
ADB1
ADB0
FR D#

+3VALW
C440
@0.1U_0402_16V4Z

FSEL#
KBA0

@SUYIN-80065A-040G2T
SST39VF080-70_TSOP40

Compal Electronics, Inc.


Title

BIOS & EXT. I/O PORT


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
Document Number
CustomLA-2371
Date:

, 28, 2004

R ev
1.0
Sheet

41

of

56

Power Button

LID Switch

ODD LED

HDD LED

+3VALW

+3VALW

+3VS

2
ON/OFFBTN# 44

HT-191UYG-DT_GRN_0603
D23

R170
100K_0402_5%

51ON#

4
ESE11MV9_4P

40

51ON#

41,45

CHN202U_SC70

40

1000P_0402_50V7K
C235

D21

*27

HDD_LED#

HDD_LED#

@V-PORT-0603-220 M-V05_0603
1

ON/OFF

D20

ODD_LED#

40,41 ODD_LED#

2
SW3
TC010-PS11CET_5P

1
3

3
DAN202U_SC70

HT-191UYG-DT_GRN_0603
D24

@V-PORT-0603-220 M-V05_0603

D7

S4_LID_SW#

D15

SW1
1

D8

LID_SW#

LID_SW#

40

2 1

+3VALW

R57
100K_0402_5%

R235
180_0402_5%

R236
180_0402_5%

D14

@V-PORT-0603-220 M-V05_0603

@V-PORT-0603-220 M-V05_0603

D13
RLZ20A_LL34

+3VALW

EC_ON

5IN1 LED

2 2
R452

33K_0402_5%

C825

R715
180_0402_5%

300_0402_5%

2
C

DTC124EK_SC59

0.01U_0402_25V4Z

Q17
C

Kill SWITCH

+3VS

2
D53
HT-110UYG-CT_YEL/GRN

+3V

R477
100K_0402_5%
1

5IN1_LED#
1

30

SW8

KILL_SW# 32,40

D52

D41

WL_LED#

@V-PORT-0603-220 M-V05_0603

HT-110UD_1204
D42

40,41 WL_LED#

DS-1208_3P
3 3

2
G

2N7002_SOT23
Q18

@V-PORT-0603-220 M-V05_0603

@V-PORT-0603-220 M-V05_0603
D43

EC_ON

+3VALW

R147
1

40,44

Wireless LED

R182
4.7K_0402_5%

D56
RTCVREF
RTCVREF

RTCVREF

C883 0.1U_0402_16V4Z
1
2

ON/OFFBTN# 44

POWER LED

2
G

2N7002_SOT23

R141

R142
300_0402_5%

2N7002_SOT23

C885 1

1 R137
@0_0402_5%

RTCVREF

+3VALW

@1U_0805_16V7K
1
R784

1
2
R782
1
C887
10K_0402_5%
2

14
13
12
11
10
09
08

VCC
CD2#
D2
CP2
SD2#
Q2
Q2#

C886
0.1U_0402_10V6K

2
G

Q14

Q66

2N7002_SOT23
3

RTCVREF
R783
10K_0402_5%

CD1#
D1
CP1
SD1#
Q1
Q1#
GND

2
G

40,41 PWR_SUSP_LED

U57
1
2
3
4
5
6
7

74LCX74MTC_TSSOP14

2
10K_0402_5%

D9

1U_0805_16V7K

S4_LATCH

PWR_LED#

D10

@V-PORT-0603-220 M-V05_0603

HT-191UD_AMBER_0603

2
10K_0402_5%

D11
HT-191NB_BLUE_0603

2N7002_SOT23
3

RTCVREF

40

180_0402_5%
D12

Q65

2
G

35,40,43,49 SYSON

1
R781

Q64

2
10K_0402_5%

2 2

2
G

1
R780

NC7SZ14M5X_SOT23-5

1
3

S4_LID_SW#

@V-PORT-0603-220 M-V05_0603

2
1U_0805_16V7K

C884 use X7R

+3VALW

Q63
1

U56

1
C884

+5VALW

1N4148_SOT23

R777
100K_0402_5%

R779
680K_0402_5%

R778
100K_0402_5%

2N7002_SOT23

RTCVREF

PWR_LED# 40,41
A

D58
40

S4_DATA

D_SET_S4

Compal Electronics, Inc.

RB751V_SOD323

Title

Switchs & Connectors


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
Document Number
CustomLA-2371
Date:

R ev
1.0

, 28, 2004

Sheet
1

42

of

56

1
2
3
4

1
D
2 SUSP
G
Q58
@2N7002_SOT23

2 SUSP
G
Q5
@2N7002_SOT23

1
3

D
2 SUSP
G
Q47
@2N7002_SOT23

1
2
3
4

R248
1

R755
1

6.8K_0402_5%
2
+12VALW

C854

36,40,41

Q38
2N7002_SOT23

2
G

1
D

Q24
2N7002_SOT23

2
G

SUSP#

S
R254

10K_0402_5%
10K_0402_5%
R355

SUSP
D

SYSON
2

SI4800DY_SO8

SUSP
2
G
Q62
2N7002_SOT23

0.1U_0402_16V4Z
S

SUSP
2
G
Q22
2N7002_SOT23

H27
H1
H2
H3
H_C276D118 H_C79D79N H_O98X78D98X78N H_C236D236N

H4
H_C276D118

H6
H_C276D118

1
CF1
SMD40M80

CF2
SMD40M80

CF3
SMD40M80

CF4
SMD40M80

CF5
SMD40M80

H7
H_C394D137X118

FD1
FD2
FD3
FD4
FD5
FD6
FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL

0.1U_0402_16V4Z

+2.5VALW TO +2.5V

+2.5V

SYSON#

SYSON#

C273

38

2
C279
10U_0805_10V4Z

C853
1U_0603_10V4Z

35,40,42,49 SYSON

C848
4.7U_0805_10V4Z

91K_0402_5%
2
+12VALW

C855
4.7U_0805_10V4Z

1
2
3
4

SI4800DY_SO8
1

2
1
C280
1U_0603_10V4Z

S
S
S
G

C278
10U_0805_10V4Z

D
D
D
D

S
S
S
G

8
7
6
5

U18

R255
10K_0402_5%

R354
10K_0402_5%

KC FBM-L18-453215-900LMA90T_1812
1
2
1

+3VALW

+5VALW

+5VS

+3VS

L70

+2.5VALW

+3VALW TO +3VS

D
2 SYSON#
G
Q31
@2N7002_SOT23

+5VALW TO +5VS

2 SYSON#
G
Q26
2N7002_SOT23

U53

36,49,50

0.1U_0402_16V4Z

+5VALW

D
D
D
D

R61
@470_0805_5%

+5VALW
D

C294

8
7
6
5

R639
@470_0805_5%

2
R271
95.3K_0603_1%
1
2
+12VALW

SUSP

10U_0805_10V4Z
C292

D
2 SUSP
G
Q23
@2N7002_SOT23

SI4800DY_SO8
1

C308
1U_0603_10V4Z

2 SUSP
G
Q8
@2N7002_SOT23

S
S
S
G

C307
10U_0805_10V4Z

D
2 SUSP
G
Q19
@2N7002_SOT23

D
D
D
D

R423
@470_0805_5%

1
1

1
U21

KC FBM-L18-453215-900LMA90T_1812
1
2

8
7
6
5

R313
@470_0805_5%

+1.8VS

+3V
L69

+3VALW

R232
@470_0805_5%

R93
@470_0805_5%

+2.5VS

+5VS

2
R181
@470_0805_5%

+3V

+3VS

**

+1.5VS

+VGA_CORE

+3VALW TO +3V

H8
H9
H10
H11
H12
H13
H_C197D157 H_C236D169 H_C236D169 H_C276D118 H_C276D118 H_C256D181

CF6
SMD40M80

SI4800DY_SO8
C444

C433
1U_0603_10V4Z

C438

1
2
3
4

S
S
S
G

D
D
D
D

8
7
6
5

U34

C441
CF7
SMD40M80

4.7U_0805_10V4Z

CF8
SMD40M80

CF9
SMD40M80

CF10
SMD40M80

CF11
SMD40M80

H14
H_C394D118

CF12
SMD40M80

H15
H16
H_C394D118 H_C394D137X118

H17
H26
H_C256D181 H_C256D181

+2.5V

+2.5VS

1
1

CF19
SMD40M80

CF20
SMD40M80

CF21
SMD40M80

CF22
SMD40M80

H37
H38
H39
H40
H41
H_S315D118 H_S315D118 H_S315D118 H_S315D118 H_S315D118

+2.5V TO +2.5VS

CF18
SMD40M80

CF17
SMD40M80

CF16
SMD40M80

SYSON#
2
G
Q46
2N7002_SOT23

CF15
SMD40M80

0.1U_0402_16V4Z

CF14
SMD40M80

C437

CF13
SMD40M80

+12VALW

R413
100K_0402_5%
1
2

4.7U_0805_10V4Z

2 4.7U_0805_10V4Z

H42
H43
H_S315D118 H_S315D118

U47

H44
H45
H46
H47
H_S315D118 H_S315D118 H_S315D118 H_S315D118

0.1U_0402_16V4Z
S

C660

H48
H49
H50
H51
H_S315D118 H_S315D118 H_C79D79N H_C79D79N

+12VALW

R616
100K_0402_5%
1
2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2 4.7U_0805_10V4Z

C664

C655

1U_0603_10V4Z

C675

SI4800DY_SO8
C677

S
S
S
G

D
D
D
D

1
2
3
4

8
7
6
5

SUSP
2
G
Q57
2N7002_SOT23

Compal Electronics, Inc.


Title

POWER CONTROL CKT


Size
Document Number
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
CustomLA-2371
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
PROPRIETARY NOTE
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
, 28, 2004
A

R ev
1.0
Sheet
E

43

of

56

Q43
@SI2301DS_SOT23

+5V_CIR

+5VALW

EC_ON

C376

8
7
6
5

@1U_0603_10V4Z

2
1
2
C381 @1U_0603_10V4Z
1
2
R365
@100K_0402_5%

@10K_1206_8P4R_5%
D

1
R360

C394
@1U_0603_10V4Z

40,42

1
1
2
3
4

CIR_RCVEN
CIR_RCRST#
CIR_URXD
CIR_USCLK

+5V_CIR

RP12

Q39
@DTC115EKA_SC59

2
@10K_0402_5%

3
D

U32

2
@100K_0402_5%

2
@10K_0402_5%

@10K_0402_5%

@10K_0402_5%

1
2
R374
@100K_0402_5%
2
26,40 EC_RSMRST#
G

Q37
@2N7002_SOT23

X2
3
@4MHZ_30PF_6W04000042

CIR_URXD

1
C275

2
@10P_0402_50V8K

CIR_USCLK

@RB751V_SOD323

@0.1U_0402_16V4Z

40,41

2
+5V_CIR
@10K_0402_5%

1
R306

2
@0_0402_5%

2
1
R308
@10K_0402_5%

CIR_RCVEN
CIR_UTXD

P00
P01
P02
P03

20
19
18
17

P10
P11
P12/CNTR
P13/INT

16
15
14
13

CIR_UTXD

D0
D1

12
11

CIR_URXD
CIR_USCLK

1
R270

XIN

@1M_0603_5%

1
R266

2
@0_0402_5%
CIR_RCRST#

C283

R268

2
@10K_0402_5%

2
D28

1
R307
U19

RCIRRX

RCIRRX

XOUT

RESET#

7
8

P21/AIN1
P20/AIN0

9
10

D3/K
D2/C

CNVSS

VDD

VSS

+5V_CIR

+5V_CIR

ON/OFFBTN# 42

C285

2
D27

2
@10P_0402_50V8K

RC_ON/OFFBTN

Q29
@2N7002_SOT23

2
G
3

EC_URXD

EC_USCLK

EC_USCLK

Q44
@2N7002_SOT23

1
C282

2
@10K_0402_5%

@RB751V_SOD323

1
R274

@1U_0805_25V4Z

@MIC2951_SO8

3
1 CIR_UTXD
Q28
@MMBT3904_SOT23

+3VALW

P2
C355

+5V_CIR

2
@0_0402_5%
C330

EC_URXD

IN
FB
TAP
ERR#

1
R275

OUT
SNS
SHDN
GND

8
7
6
5

+3VALW

EC_UTXD

EC_UTXD

2
G

P2

1
R316

2 2

+3VALW

R305

R304

1
R364

P2

+5V_CIR

+3VALW

1
2
3
4

@M34506M4-XXXFP_SOP20

@1U_0805_25V4Z

Q36
@DTC115EKA_SC59

@0.1U_0402_16V4Z

R335
@47K_0402_5%

MDC
CONN.
JP4

CIR_GATING#

26,28,35 IAC_SDATAO
26,35 IAC_RST#

2 +3V_MDC
0_0402_5%
2 +3VS_MDC
L27
CHB1608B121_0603
1 R395
2
22_0402_5%
1 R400
2
22_0402_5%
1

MD_SPK

+5VS

@10K_0402_5%

1
2
R408
1 R403
2
22_0402_5% 1
R405

1
10K_0402_5%

2
0_0402_5%

1
R406

+3VS

IAC_SYNC

1
R402

+3VS_MDC

35

L28
1
2
CHB1608B121_0603

+5VS_MDC

ACES_88018-3010

+3V_MDC

R337

2 2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

26,28,35

2
22_0402_5%

2
22_0402_5%

41

C429

EC_RCRST#

41 CIR_GATING#

CIR_RCRST#

Q35

2 220P_0402_50V7K

@MMBT3904_SOT23

CIR_GATING#

IAC_SDATAI1 26

+3VS

R375
1

MONO_OUT/PC_BEEP
AUDIO_PWRDN/DETECH
GND
MONO_PHONE
AUXA_RIGHT
RESERVED/BT_ON#
AUXA_LEFT
GND
CD_GND
+5Vmain
CD_RIGHT
RESERVED/USB+
CD_LEFT
RESERVED/USBGND
RESERVED/PRIMARY_DN
+3.3Vaux/BT_VCC
RESERVED/+5VD/WAKEUP
GND
RESERVED/GND
+3.3Vmain
AC97_SYNC
AC97_SDATA_OUT
AC97_SDATA_IN1
AC97_RESET#
AC97_SDATA_IN0
GND
GND
AC97_MSTRCLK
AC97_BITCLK

R336

IAC_BITCLK 26,35

C425

2 2

+3V

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

@15P_0402_50V8J
41

+5VS_MDC

EC_RCVEN

Q34

1
A

1
C396
1U_0603_10V4Z

@10K_0402_5%

CIR_RCVEN

@MMBT3904_SOT23

1
C417
1U_0603_10V4Z

C428
1U_0603_10V4Z

Compal Electronics, Inc.


Title
CIR & MDC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B

Document Number
LA-2371

Date:

, 28, 2004

Rev
1.0
Sheet
1

44

of

56

VS
VIN

PR1
1M_0402_1%
1
2

VIN
PL1
C8B BPH 853025_2P
1
2

1
+

47,48

PR7
10K_0402_5%

PD2
RLZ4.3B_LL34

2
2

1
PR8
10K_0402_5%

Vin Detector

RTCVREF

3.3V

High 19.193 18.504 17.835


Low 18.434 17.763 17.072

VIN

PACIN

G
4

LM393M_SO8

PC6
0.1U_0402_16V7K

PR6
20K_0402_1%

26,40,41
1

PACIN

1
1
PC5
1000P_0402_50V7K

SINGA_2DC-G313B200

ACIN

PU1A

PR5
22K_0402_1%
1
2

PC4
100P_0402_50V8J

PC3
1000P_0402_50V7K

1
PC2
100P_0402_50V8J

PR4
1K_0402_5%
1
2

2
PC1
1000P_0402_50V7K

PD1
SSM14_SMA

G
G
G
G

1
6
5
4
3

PR2
5.6K_0402_5%

VS

PR3
84.5K_0402_1%

PJP1

DC_IN_S2

PF1
12A_65VDC_451012
DC_IN_S1 1
2

PD3
1N4148_SOD80

1
PQ1
TP0610T_SOT23
3
1

PD5
1N4148_SOD80
2
1

VIN

PC8
0.1U_0603_25V7K

PR12
1K_1206_5%
1
2

N3

PC7
0.22U_1206_25V7K

PR14
22K_0402_5%

PR16
200_0603_5%

3.3V

N2

PR19
499K_0402_1%

LM393M_SO8
RB715F_SOT323
PC12
1000P_0402_50V7K

2
5

PC13
1000P_0402_50V7K

PR22
34K_0402_1%
2
1 VL

PR23
499K_0402_1%
PR24
66.5K_0402_1%

PC11
1000P_0402_50V7K
3

ACON

47

PU1B

PD7

6,46,48 MAINPWON

PD6
RLZ16B_LL34

PC9
1U_0805_25V4Z

GND

PC10
10U_0805_10V4Z

IN

OUT

PR21
200_0603_5%
1
2

PR18
2.2M_0402_5%
2
1

PR20
200_0603_5%
1
2

+CHGRTC

PR17
100K_0402_5%
1
2

VL

PU2
S-812C33AUA-C2N-T2_SOT89

RTCVREF

51ON#

41,42

B+

PR15
1K_1206_5%
1
2

PR13
100K_0402_5%

N1

PR11
200_0603_5%
1
2

CHGRTCP

PR10
1K_1206_5%
1
2

VS

PR9
33_1206_5%

BATT+

PD4
RB751V_SOD323
2
1

PJ1

+1.8VSP

JUMP_43X118

PR25
191K_0402_1%

PJ2

+3VALW

+1.8VS

+3VALWP

JUMP_43X79

(5A,200mils ,Via NO.= 10)

(1.5A,60mils ,Via NO.= 3)


1

+5VALW
PJ4

JUMP_43X118

(5A,200mils ,Via NO.= 10)

+CPU_VIDP

+CPU_VID

JUMP_43X39
PJ5
+12VALWP

(120mA,20mils ,Via NO.= 1)


1

PQ2
2N7002_SOT23

Precharge detector
15.97V/14.84V FOR
ADAPTOR

2
G

+12VALW

JUMP_43X39

(120mA,40mils ,Via NO.= 2)


2

+1.5VS

(3A,120mils ,Via NO.= 6)

JUMP_43X118
PJ8
2
1 1

JUMP_43X118

PJ9
+VGA_COREP

+VGA_CORE

JUMP_43X118
PJ10

(6A,240mils ,Via NO.= 12)


1

+1.25VS

JUMP_43X79

(2A,80mils ,Via NO.= 4)


A

PQ3
DTC115EUA_SC70

JUMP_43X118

+2.5VALW

(8A,320mils ,Via NO.= 16)

+1.25VSP

+5VALWP

PJ6
+1.5VSP

PJ7
+2.5VALWP

PACIN

PR26
47K_0402_5%
2
1

PJ3
+5VALWP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
C

Compal Electronics, Inc.


DCIN & DETECTOR
Document Number

Rev
1.0

LA-2371
, 28, 2004

Sheet
D

45

of

56

PH1 under CPU botten side :


CPU thermal protection at 84 degree C
Recovery at 45 degree C
VL

VS

VL

PD9
1SS355_SOD323
2
1
2

PU3A

MAINPWON 6,45,48

PQ4
DTC115EUA_SC70

LM393M_SO8

3
PR35
3.32K_0402_1%

PR37
100K_0402_1%
2
1

PC17
0.22U_0805_16V7K_V2

1
ALI/MH# 40

PD8
@ BAS40-04_SOT23

TM_REF1

PC18
1000P_0402_50V7K

+3VALWP

VL

PR36
6.49K_0402_1%
2
1

PR32
16.9K_0402_1%
1
2

PR30
47K_0402_1%
1
2

PC16
0.01U_0402_25V7Z

PR34
100_0402_5%

PR27
47K_0402_1%

1
2

PC15
1000P_0402_50V7K

PR33
100_0402_5%

PC14
0.1U_0603_25V7K

PH1
10KB_0603_1%_TH11-3H103FT

+3VALWP

1
PR31
1K_0402_5%

SUYIN_200275MR009G116ZL_RV

BATT+

BATT_S1
ALI/NIMH#
AB/I
TS_A
EC_SMDA
EC_SMCA

GND
GND

1
2
3
4
5
6
7
8
9

10
11

BATT+
BATT+
ID
B/I
TS
SMD
SMC
GNDGND-

PJP2

PL2
C8B BPH 853025_2P
1
2

PF2
12A_65VDC_451012
1
2
PR29
47K_0402_5%
1 PR28
2
1K_0402_5%
1
2

VMB

PR38
1K_0402_5%

PR39
100K_0402_1%

PD10
@ BAS40-04_SOT23

1
2

BATT_TEMP 40

EC_SMD1 40,41

PH2 near main Battery CONN :


BAT. thermal protection at 79 degree C
Recovery at 45 degree C

VL

VL

PD12
@ BAS40-04_SOT23

PD11
@ BAS40-04_SOT23

EC_SMC1 40,41

5
TM_REF2

PU3B

O
-

PD13
1SS355_SOD323
2
1

LM393M_SO8

PR43
3.48K_0402_1%

PR44
100K_0402_1%
2
1

VL

PR45
100K_0402_1%

PC20
1000P_0402_50V7K

PC19
0.22U_0805_16V7K_V2

PR42
14.7K_0402_1%
1
2

+5VALWP

PR40
47K_0402_1%
PR41
47K_0402_1%
1
2

PH2
10KB_0603_1%_TH11-3H103FT

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
A

Compal Electronics, Inc.


BATTERY CONN / OTP
Document Number

Rev
1.0

LA-2371
, 28, 2004

Sheet
D

46

of

56

P3

PC22
4.7U_1206_25V6K

PC23
4.7U_1206_25V6K

1
2
3

PC21
4.7U_1206_25V6K

8
7
6
5

4
PR47
200K_0402_1%

+INC2

24

OUTC2 GND

23

PQ10
AO4407_SO8

-INE2 VCC(o)

21

FB2

OUT

20

PC26
0.1U_0603_25V7K

VREF

VH

19

FB1

VCC

18

-INE1

RT

17

+INE1

-INE3

16

10

OUTC1

FB3

15

11

OUTD

CTL

14

12

-INC1

+INC1

13

PD15
1SS355_SOD323

PR62
10K_0402_5%
2
1

PR64
100K_0402_1%

ACON

5
6
7
8

LXCHRG

1
2
PC29
0.1U_0603_25V7K
1
2
PC32
0.1U_0603_25V7K
2

ACOFF

40

PD16
1SS355_SOD323

CC=0.5~2.7A
CV=16.8V(12 CELLS LI-ION)

1
PR58
68K_0402_5%

PL4
PR61
22UH_SPC-1204P-220_2.9A_20% 0.02_2512_1%
1
2
1
2

PR63
PC33
47K_0402_5% 1500P_0402_50V7K
1
2
1
2

BATT+

ACON
PD18
EC31QS04

IREF=1.31*Icharge
IREF=0.73~3.05V

PC35
4.7U_1206_25V6K

PC37
4.7U_1206_25V6K
PC36
4.7U_1206_25V6K

PC34
0.1U_0402_16V7K

IREF
PQ14
2N7002_SOT23

2
PQ12
DTC115EUA_SC70

40

PC31
1000P_0402_50V7K

PR59
205K_0402_1%
1
2

2
G
3

2
PR60
3K_0402_1%

PR57
1K_0402_5%
2 1
2

1
PACIN 1

ACON

22

PR51
10K_0402_5%

PD17
1SS355_SOD323

45

CS

ACOFF#

2
ACOFF#1

PC30
0.1U_0402_16V7K

PACIN

+INE2

2
2

PR53
PC28
33.2K_0402_1% 4700P_0402_25V7K
1
2 1
2
PR55
10K_0402_5%

45,48

CS

N18

PR56
150K_0402_1%

2
G
3

PR54
10K_0402_1%

PC27
0.1U_0402_16V7K

D
PQ13
2N7002_SOT23

PC25
0.022U_0402_16V7K
1
2

PD14
RLZ22B_LL34

1
PQ11
DTC115EUA_SC70

PR50
0_0402_5%

1
PR52
100K_0402_5%

VIN

PU4
1 -INC2

ADP_I

2 2

40,50

PC24
0.1U_0603_25V7K

47K

PR49
47K_0402_5%
1
2

3
2
1

47K

PQ9
DTA144EUA_SC70

PR48
47K_0402_5%

PQ8
AO4407_SO8

8
7
6
5
4

PL16
FBM-L18-453215-900LMA90T_1812
2
1

PR46
0.01_2512_1%(2W)
2
1

8
7
6
5

1
2
3

1
2
3

1
2
3

B+

PQ7
AO4407_SO8

PQ6
AO4407_SO8

8
7
6
5

PQ5
AO4407_SO8

B++

Iadp=0~5.8A

P2

VIN

MB3887_SSOP24

+3VALWP
PR65
95.3K_0603_0.1%
2
1

PR67
47K_0402_5%

CS

PR68
95.3K_0603_0.1%
2
1

PQ15
DTC115EUA_SC70

PR66
143K_0603_0.1%
2
1

4.2V

FSTCHG

VMB

PQ16
DTC115EUA_SC70

40

90W Iadp=0~4.2A

PR46=0.015_2512_1%

PR53=29.4K_0402_1%

Unpop PQ8

120W Iadp=0~5.8A

PR46=0.01_2512_1%

PR53=33.2K_0402_1%

Pop PQ5 and PQ8

PR69
340K_0402_1%

OVP voltage : LI
4S2P : 17.4V--> BATT_OVP= 1.935V

+12VALWP

PR70
499K_0402_1%

8
P

PU5A
LM358A_SO8
1 0

40 BATT_OVP

(BAT_OVP=0.1111 *VMB)

1
PR72
105K_0402_1%

PC39
0.01U_0402_25V7Z

PR71
2.2K_0402_5%

PC38
@ 0.1U_0402_25V4K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
B

Compal Electronics, Inc.


CHARGER
Document Number

Rev
1.0

LA-2371
, 28, 2004

Sheet
D

47

of

56

PC40
4.7U_1206_25V6K
1
2

N4

2
3

+5VALWP

PR84
1.82K_0402_1%

PR87
10.2K_0402_1%

PC59
100P_0402_50V8J

PD23
SKUL30-02AT_SMA

+
PC60
470U_6.3V_M

PC62
@ 0.047U_0402_16V4Z

PC57
4.7U_0805_6.3V6K

10K_0402_1%

PC54
0.47U_0603_16V7K

GND

MAX1902EAI_SSOP28

PR88

PC58
1000P_0402_50V7K

VS

PR86
47K_0402_5%
1
2

4
3
2
1
1
2.5VREF

RUN/ON3

CSH5

TIME/ON5

G
S
S
S

21

22

7
28

5
6
7
8
D
D
D
D

1
2
PR83
10K_0402_5%

PACIN

PC56
100P_0402_50V8J

CSH3
CSL3
FB3
SKIP#
SHDN#

45,47

1
2
3
10
23

PDL5
CSL5

PR82
1.24K_0402_1%
CSH3
CSL3
2
1

PR85
3.32K_0402_1%

PC52
47P_0402_50V8J

PR78
2M_0402_1%

PLX5
PR81
0_0402_5%
2
1

LX3
DL3

DH3

26
24

PQ20
SI4810DY_SO8

4
5
18
16
17
19
20
14
13
12
15
9
6
11

PR75
0_0402_5%

27

12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#

BST3

VL

25

V+

PR80
0_0402_5%

PD22
SKUL30-02AT_SMA

PU6
PC53
0.47U_0603_16V7K

1
2

1
1

PR77
3.74K_0402_1%
PR79
1M_0402_1%

1
PR76
1.87K_0402_1%

PC55
470U_6.3V_M

PDH5

+3VALWP

PR74
1.27K_0402_1%

PC50
4.7U_1206_25V6K

PQ18
SI4800DY-T1_SO8

PC47
4.7U_1206_25V6K

4
3
2
1

1
2

1
2

PC49
0.1U_0603_25V7K

PC46
4.7U_1206_25V6K

D
D
D
D

8
7
6
5
D
D
D
D
S
S
S
G
1
2
3
4

1
1

PC48
4.7U_0805_6.3V6K

PDL3

5
6
7
8

VL

PDH3

PL6
10UH_SPC-1205P-100_4.5A_20%

PT1
10uH_SDT-1205P-100-118_5A_20%

B+++

+12VALWP

PC51
47P_0402_50V8J

G
S
S
S

PD21
1SS355_SOD323

2 PC45

0.1U_0603_25V7K

1
2
3
4

S
S
S
G

PQ19
SI4810DY_SO8

1
PR73
22_1206_5%

PD20
DAP202U_SOT323

VS

PLX3

FLYBACK

8
7
6
5
D
D
D
D

PQ17
SI4800DY-T1_SO8

1
2

PC44
4.7U_1206_25V6K

PD19
EC11FS2_SOD106

SNB

PC43
4.7U_1206_25V6K

PC41
470P_0805_100V7K

JUMP_43X118

BST51

B+

BST31

PC42
0.1U_0603_25V7K
1
2

B+++
PJ12

PR89
10K_0402_1%

1
PR90
220K_0402_5%

VL

MAINPWON 6,45,46
PC63
0.47U_0603_16V7K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


Title
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
Size
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date:
INC.
5

Compal Electronics, Inc.


5V/3.3V/12V
Document Number

Rev
1.0

LA-2371
, 28, 2004

Sheet
1

48

of

56

PR91
10_0603_5%
1
2

PJ13

1
2

+5VALWP

JUMP_43X79
PC65
4.7U_0805_6.3V6K

5
6
7
8

D
D
D
D
1

UGATE

PHASE

PR93
@ 100K_0402_5%
2
1

PL7
4.7UH_SPC-1205P-4R7B_+40-20%
2
1

FB

1
PR158
@ 0_0402_5%
1
2

4
3
2
1

APW7057KC-TR_SOP8

+ PC68
470U_6.3V_M

PQ24
@ DTC115EUA_SC70

PR94
5.1K_0402_1%
1
2

PC123
@ 0.1U_0402_25V4K

LGATE

PQ23
SI4810DY_SO8

35,40,42,43 SYSON

GND

G
S
S
S

+2.5VALWP

1
D
D
D
D

VL

PQ22
@ DTC115EUA_SC70

5
6
7
8

4
3
2
1

OCSET

PQ21
SI4800DY-T1_SO8

BOOT

PC67
0.1U_0402_16V7K

G
S
S
S

VCC

PU7

PD24
1N4148_SOD80

PC66
470P_0603_50V7K

PR92
7.15K_0402_1%

PC64
1U_0603_6.3V6M

PR95
2.4K_0402_1%

PC69
0.1U_0402_16V7K

PR96
10_0603_5%
1
2

PJ14

2
5
6
7
8

D
D
D
D
UGATE

PHASE

LGATE

PC73
0.1U_0402_16V7K

G
S
S
S

FB

4
3
2
1

PQ26
2N7002_SOT23

2
G

BOOT

PL8
3UH_SPC-07040-3R0_5A_30%
2
1

D
D
D
D
GND

G
S
S
S

PQ27
SI4810DY_SO8

PC74
470U_6.3V_M

4
3
2
1

APW7057KC-TR_SOP8

+1.5VSP

5
6
7
8

OCSET

VCC
1

PC71
10U_1206_6.3V7K

PQ25
SI4800DY-T1_SO8

PC124
@ 0.1U_0402_25V4K

SUSP

36,43,50

PR159
0_0402_5%
1
2

+5VALWP

PU8

PC72
470P_0603_50V7K

PR97
2.8K_0402_1%

PD25
1N4148_SOD80

PC70
1U_0603_6.3V6M

JUMP_43X79

PR98
3K_0402_1%
1
2

1
PR99
3.4K_0402_1%

PC75
0.1U_0402_16V7K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
A

Compal Electronics, Inc.


2.5V/1.5V
Document Number

Rev
1.0

LA-2371
, 28, 2004

Sheet
D

49

of

56

85W THROTTLING
70W REVOVERY
PR101
@ 2M_0402_1%
1
2

1
2
O

PU10A
@ LM393M_SO8

PQ28
@ SN7002N_SOT23

PC82
@ 10P_0402_50V8J

PC81
@ 1000P_0402_50V7K

1
2

PR107
@ 100K_0402_1%

PR103
44.2_0402_1%

2
G

PC78
100P_0402_50V8J

VL

2
PR106
@ 196K_0402_1%

H_PROCHOT# 5,26

PC76
4.7U_0805_6.3V6K

PR102
@ 100K_0402_1%
PC79
@ 0.1U_0402_25V4K

PC77
4.7U_0805_6.3V6K

PR105
@ 124K_0402_1%
1
2

PR100
100_0402_1%

PC80
@ 0.01U_0402_25V7Z

ADP_I

JUMP_43X39

40,47

+1.8VSP

PU9
APL1085UC-TR_TO252
3 VIN VOUT 2
ADJUST

PJ15

+3VS

VL

VS

PR104
@ 10.2K_0402_1%
2
1

PU10B
@ LM393M_SO8

PR161
10_0603_5%
1
2

PJ16

NC

VREF

NC

VOUT

NC

TP

PHASE

LGATE

4
3
2
1
PL14
4.7UH_SPC-1205P-4R7B_+40-20%
2
1

GND

APW7057KC-TR_SOP8

+VGA_COREP

5
6
7
8

1
3

PC84
1U_0603_6.3V6M

+
PQ53
SI4810DY_SO8

PC131
470U_6.3V_M

PR164
4.53K_0402_1%
1
2

+5VALW

2
1

+1.25VSP

PR165
9.09K_0402_1%

PR166
10K_0402_5%

PC132
0.1U_0402_16V7K

2
PR167
9.09K_0402_1%

PQ54
2N7002_SOT23

PR168
10K_0402_5%

2
G
PQ55
2N7002_SOT23

2
G
3

17 POWER_SEL

PC86
10U_1206_6.3V7K

PR109
1K_0402_1%

2
5
6
7
8
D
D
D
D
2

G
S
S
S

UGATE

PC61
470U_6.3V_M

PQ51
SI4800DY-T1_SO8

D
D
D
D

GND

FB

PC129
0.1U_0402_16V7K

G
S
S
S

4
3
2
1

PC85
0.1U_0402_16V7K

VIN

2
PQ29
2N7002_SOT23

2
G

PC125
@ 0.1U_0402_16V7K

PR160
0_0402_5%
1
2

SUSP

PQ52
2N7002_SOT23

+3VALWP

VCNTL

APL5331KAC-TR_SO8

36,43,49

OCSET

2
G

PR108
1K_0402_1%

PC83
10U_1206_6.3V7K

PC127
4.7U_0805_6.3V6K

PC130
@ 0.1U_0402_25V4K

BOOT

PU11

+5VALW

VCC
2

PR163
0_0402_5%
1
2

SUSP

36,43,49

PJ17
JUMP_43X39

PU18

1
+2.5V

PD27
1N4148_SOD80

JUMP_43X79

PC128
470P_0603_50V7K

PR162
7.15K_0402_1%

PC126
1U_0603_6.3V6M

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


Title
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
Size
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date:
INC.
5

Compal Electronics, Inc.


1.8V/PROCHOT/1.25V/VGA
Document Number

Rev
1.0

LA-2371
, 28, 2004

Sheet
1

50

of

56

B+

+5VS

PR110
10_0603_5%

Battery Feed
Forward

+5VCPUVCC
PC87
1U_0603_6.3V6M
2
1

ENLL

1
2
3
4
5
6

VID4
VID3
VID2
VID1
VID0
VID5

PGOOD

34

ENLL

33

DRSEN
DSEN#

PWM3

20

ISEN3+
ISEN3-

21
22

PWM4

31

ISEN4+
ISEN4-

30
29

35

PR114
0_0402_5%

1
PR118
69.8K_0402_1%

11

52

ISEN1+ 52
ISEN1- 52

PWM2

26

PWM2

ISEN2+
ISEN2-

27
28

ISEN2+ 52
ISEN2- 52

SOFT

DSV

1
PR115
@ 0_0402_5%

FS

COMP

15

37

DRSV

LM358A_SO8

FB

13

38

NC

NC

14

VDIFF
VSEN
VRTN

16
17
18

1
PR116
@ 0_0402_5%

NC

12

GND

PR122
@ 0_0402_5%
2
1

PU13

PG

OUT

PR140
0_0402_5%

EN

GND

PQ33
2N7002_SOT23

PQ34
MMBT3904_SOT23

PR133
0_0402_5%
2
1

+CPU_CORE

2
1
PR135
PR134
0_0402_5% @ 0_0402_5%
2
1
2

1
PR136
@ 0_0402_5%

VCCSENSE 5

Place near +VCC_CORE


output capacitor

VSSSENSE 5

E
PR138
100K_0402_5%

+CPU_VIDP

PQ30
2N7002_SOT23

MIC5258_SOT23-5

PC96
4.7U_0805_6.3V6K

VR_ON

PR141
100K_0402_5%

40

PR128
16.2K_0402_1%
2
1

IN

VID_PWRGD

Remote
Sensing

4 H_BOOTSELECT

PC94
1U_0603_6.3V6M

PR131
5.1K_0402_1%

2
G
PR137
22K_0402_5%
2
1 2
B

3
1

2
1
1

PC95
4.7U_0805_6.3V6K

2
5

2
G
S

Place close to IC

PQ32
2N7002_SOT23
1.2VDD

PR125
2.26K_0402_1%
1
2
D

PR139
0_0603_5%
2
1

27K_0402_5%

PC93
0.1U_0402_16V7K
PR132

Unpop PR115
Pop PR116

681K_0402_1%

PQ31
TP0610T_SOT23
2
G

PC92
PR124
@ 1000P_0402_50V7K @ 0_0402_5%
2
1
2
1

PR127
1M_0402_1%
PR126
32.4K_0402_1%

17.4K_0402_1%

8
1

OFS

53

1 PC91
22P_0402_50V8J

+5VCPUVCC

+3VALWP

PWM4

PC89
PR120
2200P_0402_50V7K 20K_0402_1%
2
1
1
2

PR130

Unpop PR115
& PR116

Others

GND
ISL6248ACR-T_QFN40

300_0402_1%
PR129
45.3K_0402_1%

20K_0402_1%

PR119

+5VCPUVCC

ISEN4+ 53
ISEN4- 53

3 Phase

40

53

ISEN3+ 53
ISEN3- 53

PR121
118K_0402_1%

19

360_0402_1%

PR117

PWM3

36

52

+5VCPUVCC

Frequency Select

PR123
10K_0402_1%

4 Phase

PWM1

25
24
23

PR119
20K_0402_1%

PC90
100P_0402_50V8J

PWM1
ISEN1+
ISEN1-

PU5B
+ 5

28

VGATE

OCSET

PR117
360_0402_1%

39

10
PC88
0.047U_0603_16V7K
2
1

5,25 PM_STPCPU#

RAMPADJ

PR113
0_0402_5%
1
2

25 PM_DPRSLPVR

CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
CPU_VID5

VCC

5
5
5
5
5
5

PR112
10K_0402_5%
2
1

PU12

32

PR111
80.6K_0402_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:

Compal Electronics, Inc.


CPU_CORE (1)
Document Number

Rev
1.0

LA-2371
, 28, 2004

Sheet

51

of

56

PC99
4.7U_1206_25V6K

PC100
4.7U_1206_25V6K

PC101
220U_25V_M

PQ35
SI7840DP_SO8

B+

PC98
4.7U_1206_25V6K

PR142
0_0603_5%

PL15
FBM-L18-453215-900LMA90T_1812
1
2

2
5

2
+5VS

CPU_B+
PC97
0.22U_0805_16V7K_V2
2
1

PC102
220U_25V_M

4
PU14

DELAYPHASE

GND

Panasonic ETQ-P4LR56WFC

3
2
1

2
1

N5

PL10
0.56UH_ETQP4LR56WFC_21A_20%
1
2

PHASE1

5
6
7
8

LGATE

5
6
7
8

PR144
57.6K_0402_1%

ISL6209CB-T_SO8
PQ38
@ IRF7831TR_SO8
1

PQ36
IRL7833S_D2PAK
PD28
SSM14_SMA

PR145
34.8K_0402_1%
2
1

PC104
0.01U_0402_25V7Z
2
1

Local Transistor
Swtich Decoupling

3
2
1

3
2
1

PC133
3300P_0402_50V7K

PQ37
@ IRF7831TR_SO8
4

PC103
1U_0805_16V7K

BOOT

PWM UGATE

PR143
499K_0402_1%

VCC

PWM1

51

N6
51
51

PH3
820_0402_5%
2
1

ISEN1ISEN1+

PC108
4.7U_1206_25V6K

PC107
4.7U_1206_25V6K

PC106
4.7U_1206_25V6K

2
PR146
0_0603_5%

CPU_B+
PC105
0.22U_0805_16V7K_V2
1
2

PQ39
SI7840DP_SO8

4
PU15

BOOT

PWM UGATE

DELAYPHASE

GND

Panasonic ETQ-P4LR56WFC
PL11
0.56UH_ETQP4LR56WFC_21A_20%
1
2

3
2
1

VCC

N7
PHASE2

+CPU_CORE

5
6
7
8

5
6
7
8

PQ41
@ IRF7831TR_SO8
1

PQ42
IRL7833S_D2PAK

PQ40
@ IRF7831TR_SO8
4

PD29
SSM14_SMA

2
3

3
2
1

3
2
1

PC134
3300P_0402_50V7K

PR149
34.8K_0402_1%
2
1

PC110
0.01U_0402_25V7Z
2
1

PD26
EC31QS04

ISL6209CB-T_SO8

PR148
57.6K_0402_1%

LGATE

PC109
1U_0805_16V7K

PR147
499K_0402_1%

PWM2

51

Local Transistor
Swtich Decoupling

N8
51
51

ISEN2ISEN2+

PH4
820_0402_5%
2
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date:
INC.

Compal Electronics, Inc.


CPU_CORE (1)
Document Number

Rev
1.0

LA-2371
, 28, 2004

Sheet

52

of

56

CPU_B+

PC113
4.7U_1206_25V6K

PC114
4.7U_1206_25V6K
D

PC112
4.7U_1206_25V6K

PR150
0_0603_5%
PQ43
SI7840DP_SO8

+5VS

PC111
0.22U_0805_16V7K_V2
1
2

4
PU16

PWM3

2
1

DELAYPHASE

GND

Panasonic ETQ-P4LR56WFC

3
2
1

BOOT

PWM UGATE

N9

PL12
0.56UH_ETQP4LR56WFC_21A_20%
1
2

PHASE3

5
6
7
8

LGATE

5
6
7
8

PR152
57.6K_0402_1%

ISL6209CB-T_SO8
PQ46
@ IRF7831TR_SO8
1

PQ44
IRL7833S_D2PAK
PD30
SSM14_SMA

PR153
34.8K_0402_1%
2
1

PC116
0.01U_0402_25V7Z
2
1

Local Transistor
Swtich Decoupling

3
2
1

3
2
1

PC135
3300P_0402_50V7K

PQ45
@ IRF7831TR_SO8
4

PC115
1U_0805_16V7K

PR151
499K_0402_1%

VCC

3
7

51

N10
PH5
820_0402_5%
2
1

PC118
4.7U_1206_25V6K

PC119
4.7U_1206_25V6K

PC120
4.7U_1206_25V6K

2
PR154
0_0603_5%

CPU_B+

PC117
0.22U_0805_16V7K_V2
1
2

ISEN3ISEN3+

51
51

PQ47
SI7840DP_SO8

4
PU17

PWM4

PWM UGATE

DELAYPHASE

GND

VCC

Panasonic ETQ-P4LR56WFC
N11

PL13
0.56UH_ETQP4LR56WFC_21A_20%
1
2

PHASE4

+CPU_CORE

5
6
7
8

5
6
7
8

LGATE

ISL6209CB-T_SO8
PQ48
@ IRF7831TR_SO8
4

PQ49
@ IRF7831TR_SO8
1

PQ50
IRL7833S_D2PAK
PD31
SSM14_SMA

PC121
1U_0805_16V7K

PR156
57.6K_0402_1%

PR155
499K_0402_1%

51

BOOT

3
2
1

PC122
0.01U_0402_25V7Z
2
1

3
2
1

3
2
1

PC136
3300P_0402_50V7K

PR157
34.8K_0402_1%
2
1

Local Transistor
Swtich Decoupling

N12
51
51

PH6
820_0402_5%
2
1

ISEN4ISEN4+

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


Title
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
Size
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date:
INC.
5

Compal Electronics, Inc.


CPU_CORE (2)
Document Number

Rev
1.0

LA-2371
, 28, 2004

Sheet
1

53

of

56

POWER PIR LIST


DVT

page

Reason for change

Modify list

45,46,
49,51

Update BOM

Change PC7 form 0.022u to 0.22u(SE041224K03), PR36 from 25.5K to 6.49K(SD034649100)


Change PC17,PC19 form 0.022u to 0.22u(SE030224KT1), PC71 from 4.7u to 10u(SE114106K00)
Change PR130 from 340K to 681K(SD034681300)
Change PC133,PC134,PC135,PC136 from 3300p to 4700p(SE75472K00)

52

For EMI team request

Add PL15 (FBM-L18-453215-900LMA90T_1812: SM010020700)

52

Solve noise issue

Add PC102(220u; SF22004M200)

PVT

Add 2nd source

Add 2nd source

For common part with H/W

Change PQ13,PQ14,PQ2,PQ26,PQ29,PQ30,PQ32,PQ33,PQ52,PQ54,PQ55 from SB570020500 to SB7700200T5

45,47

For common part

Change PD1 from EC10QS04(SC10QS041T4) to SSM14(SCSSSM14000)

48

To decrease 3V/5V negative voltage

Change PD22,PD23 from SSM14(SCSSSM14000) to SKUL30-02AT(SCSKUL30000)

Change PD18 from RB051L(SC1B051L000) to EC31QS04(SC11QS04000)

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:

EFW00 PIR LIST


Document Number

Rev
1.0

LA-2371
, 27, 2004

Sheet

54

of

56

NO DATE
PAGE
MODIFICATION LIST
PURPOSE
------------------------------------------------------------------------------------------------------------5/17
P.24
Add C862,C864
for EMI issue
P.43
Add H54
for ME
P.44
Change R406 to 22ohm
for modem function
P.23
Change R7,R437 to 4.7kohm
for CRT function

NO DATE
PAGE
MODIFICATION LIST
PURPOSE
------------------------------------------------------------------------------------------------------------4/21
P.42
Move R57 to D8.2
Avoid leakage current
P.36
change footprint of U7
for SMT process
P.29
change footprint of U9
for SMT process
P.24
swap JP2 channel A and channel B pin
for LVDS Conn.issue
-------------------------------------------------------------------------------------------------------------

4/22

P.36
P.36
P.36
P.35

Swap C38 & R54 location


Pop R55& R36 Depop R54
mirror VR1
Del R611

For
For
For
For

audio
Audio
Audio
Audio

-------------------------------------------------------------------------------------------------------------

speak DC 2.5V level


noise
Volume smoothly
clock 14.318MHz

5/18

P.25
P.40
P.40

Add R771 pull high to +3VS


Add R772 & R773
Modify U15.90,U15.93,U15.94

P.31
P.31
P.31
P.30
P.30
P.31
P.36
P.36
P.36

5/20
5/20

Modify IXP 150 GPIO pin


To avoid RTCVCC loss in EC
To adjust SKU ID & BIOS ID

Swap Jp31.19 and Jp31.25


For
Change R746,R744,R751 power plane to +VCC_5IN1
Add R775 for Reserve
Add R774 for Reserve
Change R769 power plane to +VCC_5IN1
Add JP32 for Reserve
To change R220=3.3k,R233=4.7k,R239=4.3k
For
Add R764,Del R468
For
To modfiy U7 CIS LIB
For

P.24
P.38
P.26
P.36
P.29
P.25
P.40
P.41
P.43
P.35

Add L55,L57,C862,C864
for
Add L63-L65
for
Add L58,C866
for
Add L59-L62
for
Add L71,L72 / Del R97,R106 / Change L13
Change R661,R658,R662,R665,R651,R654,R668,R315
Pop CP1-CP6
for
Add C871-C881,L66-L68
for
Add L69,L70
for
Change U46 CIS to ALC250 ver. C
for

Speak and HP Gain


audio Gain adjust
Speaker can not mute when plug in HP
issue
issue
issue
issue
for EMI issue
for EMI issue

P.40
P.40

Re-define EC_URXD/EC_UTXD/KSO17 pin assignment


Add C882
for SKU ID

for Audio noise test


for Audio PO sound

For S/W DJ Function


For 5 in 1 card transfor noise
For BITCLK smooth
For Audio noise
For SWDJ
For Cost down
For
For
For
For
For

Cost
cost
RTC
cost
SWDJ

down
down
power saving
down
LED

For Del CIR function.

6/21 write by Timo Teng

EMI issue
EMI issue
EMI issue
direct CD play issue

P.20 Add C920


Change C230 value from 150uF to 220uF
For VGA_CORE stable.
P.42 Change value of R235, R142 and R452 from 300 to 180 ohms
For cost down

-------------------------------------------------------------------------------------------------------------

5/3

Add Q67,R810,R811,R812
Add U22C OR gate

P.27 Add R813


P.31 Add C904, C905, C906 C907
P.35 Add R820
Add R822, R823, @ in L40
del @ in L50
P.36 Add @10k in R179, R189, R184 and R196
Del R95, R98, C112, C110
P.37 Del Hardware EQ circuits
Add APA2121 Audio Amplifier circuits
P.40 Add GPIO at pin98, 97,92,85,86 of KB910
Del @ inR773 and Add @ in R772
P.41 Add @ in U26, C305, R311, C337 and R331
P.42 R235 pull up voltage from +5VS to +5VALW
P.43 H37 connects to GND
P.43 Add @ in all CIR circuits.

XD card issue

EMI
EMI
EMI
EMI

P.31
P.31

========================Rev0.3==========================
6/17 write by Timo Teng

-------------------------------------------------------------------------------------------------------------

4/30

for Audio noise test


for GPIO pin

-------------------------------------------------------------------------------------------------------------

-------------------------------------------------------------------------------------------------------------

4/27

Reserve L77 from CD_AGND to Digital GND


Add R809

-------------------------------------------------------------------------------------------------------------

-------------------------------------------------------------------------------------------------------------

4/26

P.39
P.23

for CIR function

6/22
P.23
P.31
P.35
P.36
P.37
P.41

write by Timo Teng


Del JP13, JP3, JP14, J1, L73, L74, L75
For take out TV turner
Add @ into R743 and C847
For some SD Card can't be detected
5/4
P.24
Depop R58,R48/Pop U4,C39
for S3 panel garbage
Add C922
For decrease Bo sound in Dos Mode
P.38
Add U55
for G528 reserve
Add R98, R95, C112, C110
For SWDJ if the SMBUS can't be programed
P.38
JP16 modify Layout LIB
for reverse type
Add R823, R824, C923, C924, C925
For SWDJ if the SMBUS can't be programed
P.38
Change Power from +USB_AS to USB_BS
for reverse type
Add @ in L68
For take out CIR function.
P.24
Move R58 to Q4.2
for reserve
Del C336, U33
For Del 512KB flash ROM
P.30
Add R776
for SM_CD# pull high
6/23 write by Timo Teng
P.31
Define 5IN1 CONN. SM_CD# signal
for SM card protect
------------------------------------------------------------------------------------------------------------P.40 Del CP1~CP6
5/5
P.17
Modify VRAM strap pin, Add R30
for 32MB/64MB/128MB
Add C926~C949
For EMI Cost down
------------------------------------------------------------------------------------------------------------6/27 write by Timo Teng
5/6
P.26
Change R388 to 12K
for USB eyediagram
P.24 Change Value of C26 from 1000P to 0.047U For SWDJ backlight getting off
P.31
Depop R749/ Change R746,R744,R742 to 10K,Change R751 to 2.2K
for ENE suggestion
P.30
Depop R749,R735,R732,R727,R731,R738,R768,R741,R719/Pop R770/Change R768 to 2.2K
for ENE suggestion
P.42
Add Hibernation circuit
for S4 function
NO DATE
PAGE
MODIFICATION LIST
PURPOSE
------------------------------------------------------------------------------------------------------------P.24
Change D25,D54 symbol
for 1N4148 Cache LIB
P.40
Re-define S4_DATA,S4_LATCH
for Hibernation function
7/1
P.30
Connect U52.M11 to U52.J9
for follow Fortworth definition
------------------------------------------------------------------------------------------------------------P.43
Del H52,H53
for layout modify
5/7
P.33
Change +5VS_miniPCI to +5VS
for Lifeview SPEC.
P.43
Reserve C950,C951,C952
for EMI test
P.7
Add R785-R788,D59,D60
For ATI suggestion
------------------------------------------------------------------------------------------------------------P.35
Add C860,C861
For Analog TV sound
7/12
P.11
Del C567,C545 and Add C953
for Cost down
P.31
Add R789
For 5in1 issue
------------------------------------------------------------------------------------------------------------========================Rev1.0==========================
5/8
P.40
Add R790,C888
for Battery.
7/23 write by Timo Teng
P.23
Add L73-L75
For EMI issue
P.31
Change R718 to 43K
For 5IN1 function
P.23 Change R443,R440,R438,R442,R441,R439 from 75_0402_5% to 75_0402_1%
------------------------------------------------------------------------------------------------------------P.25 Change R643 from 330 to 130 ohm
For TPDL issue
5/10 P.40
Change RCIRRX to 76 pin
For CIS function
Add @ in R668
For EMI request
P.40
Add R791
For RCIRRX pull high +3valw
P.26 Change R388 from 12K to 11.5K ohm
For USB2.0 quality
------------------------------------------------------------------------------------------------------------P.34 Add @ in R802
For VIA recommanation
5/11 P.38
Reserve JP33,R792,R793
for debug
P.36 Del R98, R95,C112, C110
For Harman request
P.36
Add C889
For Audio noise
P.37 Add @ in APA2121 circuits
P.26
Del Q32,R317,R312,R318
For ATI suggestion
------------------------------------------------------------------------------------------------------------P.38 Add @ in U5 and Super I/O circuits.
5/12 P.28
Change R323,R332 to 300K/pop R736 10K
for power on sequence
Del @ in U55
P.23
Add Jump from RF GND to Digital GND
for EMI&ESD
-------------------------------------------------------------------------------------------------------------

-------------------------------------------------------------------------------------------------------------

5/13

P.40
P.30
P.34

Reserve R794
Add R795
Change IEEE 1394 to VT6301S

for avoid "Po" noise when power on/off


for "Po" noise test
PROPRIETARY
for cost down

Compal Electronics, Inc.


Title
NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
C
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:

PIR LIST-2
Document Number

Rev
1.0

LA-2371
, 27, 2004

Sheet

55

of

56

P.40 Change R175 and R176 from 0 to 1K ohm


Add @ in R172
P.42 Modify S4 resume circuit

For solve KB910 into test mode


For LPDPC doesn't be used
For solve KB910 into test mode

7/27 Write by Timo Teng


P.24 R31,R34,R32,R33 from 75_0402_5% to 1%
P.31 Add R825
Change 789 from 43K to 10K
P.36 Change JP10 and JP11 from ACES 85204-0200 to ACES 85205-0200
P.40 Add C954 at pin176 of U15
7/28 Write by Timo Teng
P.30 Add R826
Change R721 from 33 to 22 ohm
P.30 Del R743

For solve power switch ripple


For ME request
For FAN2 test Fail

For SD Card Function

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
C
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:

PIR LIST-2
Document Number

Rev
1.0

LA-2371
, 28, 2004

Sheet

56

of

56

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