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I
Time: 3 hrs.)

NEW SCHEME

CS45

Reg. No. I

I I I I I I I I I I

Fourth Semester B.E. Degree Examination, January/February 2006

Computer Science and Information Science and fnglneerlng

Introduction
Note: 1.

to Microprocessors
(Mox.Morks: 100

Answer any FIVE luU que#lons. 2. AH que.Hom cony equal maries.

1. (a) Explain ltle architecture of 8085 CPU wiltlltle help of o block schemotiC.(lO Marlts) (b) Describe o scheme to demultiplex 1t1e mulltplexed AOO-AD7 bus of 8085 CPU.
(6
(c)

Marlts) Marks)

Differentiate between memory mopped 1/0 with 1/0 mopped 1/0

(4

2. (a) What do you mean by p lpellned architecture of CPU? Explain the specific function
of the following 8086 registers : I) AL li) BX
IIi) OX

lv) CL

(2+8 Marks)
(10 Marks)

(b) Describe the minimum modo configuration system or 8086 with o block schemolic.

3. (o) Describe 1t1e different Instruction formats of 8086.

(b)

(6 Marks)

Explain the different data related addressing modes of 8086 With on example for each. (10 Marta> i) How does 8086 ldenllfes between 8 btl and 16 bit operations?
II)

(c)

What is lock preflx? What Is Its use?

(4 Motkt)

4. (a) What ore the assembler dlreclves? Explain any six such d rec tlves used In MASM
assembler for 8086 programming.
(8 Marka) (b) Write on assembly language program In 8086 to count the number of posiltve

and negative numbers present In o series of ten signed 8 blt numbers stored from address ARRAY. Store the results ot locations PNOS and NNOS respectively. (8 Mortca)
(c)

Explon txiefty the 'nstruclfon used to handle look up tables In 8086.

(4 Morkt)

5.

<a>

Wnte an assembly language program in 8086 to arrange ltle ten 8 bit numbers stored in o memory starling with address ARRAY In oscendng order. (8 Marks)
(8

(b) Describe the Interrupt system of 8086 1n detail.

Markt)

<c>

Dltferentlote between o macro and o subroutine.

(4 Mori<s)

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