Вы находитесь на странице: 1из 48

5

PAGE

1-2
3
4
5
6
7-11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32-33
34
35
36
37
38
39
40
41
42
43
44
45
46
47

CONTENTS
COVER & COMPONENT SIZE
BLOCK DIAGRAM
RESET MAP
CLOCK DISTRIBUTION
PCI DEVICE TABLE / VID TABLE
SKT 940 K8 M2 CPU
CPU DECOUPLING
DDR2 ADD/CTL TERMINATION
DDR2 DIMM A1
DDR2 DIMM B1
DDR2 DIMM A2
DDR2 DIMM B2
DDR2 VTT TERM 0-63
DDR2 VTT TERM 64-123
DDR2 DECOUPLING
CK804 HT
CK804 PCI EXPRESS
CK804 PCI
CK804 SATA / IDE
CK804 G/MII / AC97 / USB
CK804 POWER & DECOUPLING
PCI EXPRESS X1 CONNECTOR'S
PCI EXPRESS X16 CONNECTOR
PCI CONNECTOR 1/2
PCI CONNECTOR 3/4
PCI TERMINATION
AUDIO ALC655 CODEC
SIO ITE8712
H/W MON,FAN CONTROL
IDE CONNECTORS
FLOPPY / PS2
SERIAL PORT & PARALLEL PORT
USB CONNECTORS
POWER SEQUENCING
10/100/1000M LAN PHY Marvell
PWR CON / FNT PNL/ VBAT
OVER VOLTAGE CKT
VCC_CORE DC-DC CONVER
PLL DELAY / PWRGD / MEM VREG
CK804 CORE / LAN / HT - VREGS
FRONT USB

NF4ST-A2B ( CK804 )
REV 1.2
DDR2 X 4 Dual channel , PCI-Ex16 X 1 , PCI-Ex1 X 2 , PCI X
4 , Marvell 10/100 Lan PHY , AMD K8-940
C

Title
<Title>
Size
Document Number
Custom
Date:
5

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

of

48

NF4ST-A2 V020 TO NF4ST-A2A V1.0 CHANGE LIST:


1.ADD R476 FOR RGMII
2.CHANGE R200 AND R201 FOR RGMII VREF(1.25V)
3.CHANGE R455 TO 4.99K FOR DDR2 VOLTAGE 1.94V
4.CHANGE R459 TO 8.87K FOR DDR2 OV 2.4V
D

7.ADD R479 AND C631 FOR 10/100 MARVELL LAN

22U/25DE

5*7 mm

100U/16DE

6.3*11 mm

220U/10DE

6.3*11 mm

470U/16DE

8*11 mm

1000U/10DE 8*14 mm
1500U/16DE 10*25 mm
3300U/25DE 10*25 mm

3
A

1 23

E BC

ECB

TO-263

TO-263

TO-252

SOT-23

SOT-23

SOT-23

T0-92

T0-92

T0-92

B55QS03

2SK3296

20N03
TM3055TL-S
45N03
FDD6030L

2N7002
SI2303S
SI2301S

2N3904
2N3906
MMBT2907A

BAT54C
BAT54S

LM431
78L05-D
LM432

2N2222A
2N2097A

HSD882-D

Title

Component Size

Size
Document Number
Custom
Date:

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
of

48

BLOCK DIAGRAM
D

128-BIT 533/667MHZ

POWER

DDR2 SDRAM CONN 0

VREG

SUPPLY

SOCKET M2

CONNECTOR

DDR2 SDRAM CONN 1

K8

128-BIT 533/667MHZ

DDR2 SDRAM CONN 2

DDR2 SDRAM CONN 3

HT 16X16 1GHZ

PCI EXPRESS

PCI 33MHZ

PEX X16
PCI EXPRESS

PCI SLOT 1

NFORCE
C

PEX X1 (2)

PCI SLOT 2

CRUSH K804
740BGA

ATA 133

AC97
AC97

PRIMARY IDE

PCI SLOT 3

X10 USB2

PCI SLOT 4

SECONDARY IDE
BACK PANEL CONN
RGMII
INTEGRATED SATA

USB2 PORTS 5-4


DOUBLE STACK

X4 - SATA CONN

USB2 PORTS 3-2


X2/GBIT LAN

FRONT PANEL HDR


USB2 PORTS 1-0
B

FLOPPY CONN
USB2 PORTS 7-6

PS2/KBRD CONN
SIO
PARALLEL CONN

LPC BUS 33MHZ

ITE 8712

USB2 PORTS 9-8

LPC HDR
SERIAL CONN
SERIAL HDR
2MB FLASH
MII/RGMII

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
3

of

48

RESET MAP

K8 SKT 939

CPU RST*

CPU PWRGD

CPU_RST*

CPU_PWRGD

PWR SWTCH

SIO

ITE8712

PANSWH# (75)

PWRBTN*
C

PSON# (76)

PWRONSB# (72)

LPCRST_SIO*

LPCRST_SIO*

PSIN (71)

SLP S3*

CPU PWRGD

PWR CONN

CPU RST*

PS ON
PWR GOOD

PCI RST0*

PSON#

CPU_PWRGD
CPU_RST*

PCIRST_SLOT0*

PWR BUTTON

POWER_GOOD

PCI RST1*

PCIRST_SLOT1*

PCI RST3*

PCIRST_SLOT3*

LPC_RST*

LPCRST_FLASH*

PWRGD

PE_RESET*

PWRGD_SB

PWRGD SB

PWRGD_SB
GPIO_AUX*

CIRCUIT

LAN_PHY

CK804

RESET*

PEX X16

FLASH

PEX X1(2)

PRI IDE

PCI SLOT 3

PCI SLOT 1

SEC IDE

PCI SLOT 4

PCI SLOT 2

PEX X1(1)

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
4

of

48

K8 940 M2 CPU

HT_TXCLK0
HT_TXCLK0*
HT_RXCLK0
HT_RXCLK0*

MEMORY_A1_CLK[2:0]

HT_TXCLK1
HT_TXCLK1*
HT_RXCLK1
HT_RXCLK1*

MEMORY_B1_CLK[2:0]

CPU_CLK_IN*
CPU_CLK_IN

MEMORY_A2_CLK[2:0]*

CHANNEL A1 0-63

DIMM 0

MEMORY_A1_CLK[2:0]*
CHANNEL B1 64-127

DIMM 1

MEMORY_B1_CLK[2:0]*
CHANNEL A2 0-63

MEMORY_A2_CLK[2:0]

DIMM 2
CHANNEL B2 64-127

MEMORY_B2_CLK[2:0]
MEMORY_B2_CLK[2:0]*

DIMM 3

CK804

CPU_CLK_IN
CPU_CLK_IN*

PE0_REFCLK
PE0_REFCLK*

HT_RXCLK1*
HT_RXCLK1
HT_TXCLK1*
HT_TXCLK1

PE1_REFCLK
PE1_REFCLK*

HT_RXCLK0*
HT_RXCLK0
HT_TXCLK0*
HT_TXCLK0

PE2_REFCLK
PE2_REFCLK*

XTAL_IN

PE3_REFCLK
PE3_REFCLK*

PEX X16
PEX X1
PEX X1
C

ZDB

32.0 KHZ
XTAL_OUT

14MHZ OR 24MHZ

BUF_SIO

XTAL_IN

SUSCLK

SIO

25 MHZ
LPC_CLK0
XTAL_OUT
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
PCI_CLK_FB

PCI SLOT 1

TP_N/A

PCI SLOT 2

PCI SLOT 3
LPC_CLK1
B

PCI SLOT 4
LPC
HEADER

FLASH
AC_97CLK
AC_BITCLK

24MHZ
AC '97 LINK
AC97
CODEC

BUF_25MHZ

LAN
PHY

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
5

of

48

CPU VID TABLE


D

VDD

VID [4..0]

VDD

0X00000

1.550V

0X10000

1.150V

0X00001

1.525V

0X10001

1.125V

0X00010

1.500V

0X10010

1.100V

0X00011

1.475V

0X10011

1.075V

VID [4..0]

0X00100

1.450V

0X10100

1.050V

0X00101

1.425V

0X10101

1.025V

0X00110

1.400V

0X10110

1.000V

0X00111

1.350V

0X10111

0.975V

BACK PANEL
SLOT

P_INTY*

P_INTZ*

P_INTW*

3/3

P_INTX*

P_INTY*

P_INTZ*

2/2

01

0X07

23

P_INTZ*

P_INTW*

P_INTX*

P_INTY*

1/1

01

0X06

22

P_INTY*

P_INTZ*

P_INTW*

P_INTX*

0/0

PCI DEVICE MAP

1.300V

0X11010

0.900V

DEVICE

1.275V

0X11011

0.875V

CK804

1.200V

0X11110

0.800V

1.175V

0X11111

SMBUS #

PCI BUS#
CK804 LOGICAL
PCI BUS 0

DEVICE#

0X01-0X0F

FUNCTION

DEVICE ID

--

--

0X56/57

MAC /MAC

XA

PCI-PCI BRIDGE

X9

0X005C

SATA1

X8

0X0055

SATA0

X8

0X0054

IDE

X6

0X0053

MODEM CODEC

X4

0X0058

SOT23

SOT23-5/SC70
SOT89-5

OFF

SMBUS ADDRESS MAP


DEVICE

CLOCK

P_INTW*

0X01011

0X01110

RESET

P_INTX*

0X01010

0.825V

REQ/GNT

24

0.925V

0.850V

PCI SLOT
INTD*

25

0.950V

0X11101

PCI SLOT
INTC*

0X09

0X11000

0X11100

PCI SLOT
INTB*

0X08

0X11001

1.250V

PCI SLOT
INTA*

01

1.375V

1.225V

IDSEL PIN

01

1.325V

0X01101

DEVICE#

0X01001

0X01100

PCI BUS#

0X01000

0X01111

PCI INTERRUPT/IDSEL MAP

ADDRESS

AUDIO CODEC

X4

0X0059

USB 2.0

X2

0X005B

USB 1.1

X2

0X005A

SHAPE TRIM

X1

0X005F

DIMM 0

1010 000 = 0X50

LDT

X0

0X005E

DIMM 1

1010 001 = 0X51

SMBUS2

X1

0X0052

DIMM 2

1010 010 = 0X52

LEGACY SLAVE

0X00D3

DIMM 3

1010 011 = 0X53

LPC

X1

0X0050/51

SIO

0101 101 = 0X2D

LOGICAL PCI BUS

PCI SLOT 1

ARP

PCI SLOT 1

PCI SLOT 2

ARP

PCI SLOT 2

PCI SLOT 3

ARP

PCI SLOT 3

PCI SLOT 4

ARP

PCI SLOT 4

DDC BUS

PCI SLOT 5

DDC BUS

SOT23-6

SOT223

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
6

of

48

CPU1A
21
21
21
21

HT_UPCLK1
HT_UPCLK1_
HT_UPCLK0
HT_UPCLK0_
+1.2V_HT

21
21

21

HT_UP[15..0]

21 HT_UP_[15..0]

HT_UPCLK1
HT_UPCLK1_
HT_UPCLK0
HT_UPCLK0_
R371 1
R372 1

HT_UPCNTL
HT_UPCNTL_

HT_UP[15..0]
HT_UP_[15..0]

2 51 1%
2 51 1%
HT_UPCNTL
HT_UPCNTL_

HYPERTRANSPORT

N6
P6
N3
N2

L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)

L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)

AD5
AD4
AD1
AC1

HT_DWNCLK1
HT_DWNCLK1_
HT_DWNCLK0
HT_DWNCLK0_

V4
V5
U1
V1

L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)

L0_CTLOUT_H(1)
L0_CTLOUT_L(1)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)

Y6
W6
W2
W3

HT_DWNCNTL
HT_DWNCNTL_
HT_DWN15
HT_DWN_15
HT_DWN14
HT_DWN_14
HT_DWN13
HT_DWN_13
HT_DWN12
HT_DWN_12
HT_DWN11
HT_DWN_11
HT_DWN10
HT_DWN_10
HT_DWN9
HT_DWN_9
HT_DWN8
HT_DWN_8
HT_DWN7
HT_DWN_7
HT_DWN6
HT_DWN_6
HT_DWN5
HT_DWN_5
HT_DWN4
HT_DWN_4
HT_DWN3
HT_DWN_3
HT_DWN2
HT_DWN_2
HT_DWN1
HT_DWN_1
HT_DWN0
HT_DWN_0

HT_UP15
HT_UP_15
HT_UP14
HT_UP_14
HT_UP13
HT_UP_13
HT_UP12
HT_UP_12
HT_UP11
HT_UP_11
HT_UP10
HT_UP_10
HT_UP9
HT_UP_9
HT_UP8
HT_UP_8

U6
V6
T4
T5
R6
T6
P4
P5
M4
M5
L6
M6
K4
K5
J6
K6

L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)

L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)

Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4

HT_UP7
HT_UP_7
HT_UP6
HT_UP_6
HT_UP5
HT_UP_5
HT_UP4
HT_UP_4
HT_UP3
HT_UP_3
HT_UP2
HT_UP_2
HT_UP1
HT_UP_1
HT_UP0
HT_UP_0

U3
U2
R1
T1
R3
R2
N1
P1
L1
M1
L3
L2
J1
K1
J3
J2

L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)

L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)

Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1

HT_DWNCLK1 21
HT_DWNCLK1_ 21
HT_DWNCLK0 21
HT_DWNCLK0_ 21

HT_DWNCNTL 21
HT_DWNCNTL_ 21

HT_DWN[15..0]
HT_DWN_[15..0]

HT_DWN[15..0]
HT_DWN_[15..0]

21
21

SOCKET_M2 940 SMD

Title
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
7

of

48

U16
+2.5V
+5V

C443
1UF 16V 0805 Y5V

ROUTE AS DIF 20/5/5/5/20

+1.8V_SUS

C9
D8
C7

R378 1

2 1K

AL3

CPU_PRESENT_L

R379 1
R380 1

2 300
2 300 /NI

AL6
AK6

SIC
SID

2
BR381
16.9 1%

ROUTE AS DIFF PAIR


10/5/5/5/10

11

BC448
1000P 50V X7R

CPU_CORE_FB
CPU_CORE_FB_

44 CPU_CORE_FB
44 CPU_CORE_FB_

TP_VDDIOSENSE

TP /NI

TDI
TRST_L
TCK
TMS

A5

DBREQ_L

G2
G1

VDD_FB_H
VDD_FB_L

E12

VTT_SENSE

BC447
0.1UF 25V Y5V
2

BR382
16.9 1%

PWROK
LDTSTOP_L
RESET_L

AL10
AJ10
AH10
AL9

CPU_M_VREFF

LESS THAN 1000mil


5/10 M_ZN,M_ZP

+1.8V_SUS

R384 1
R386 1
R387
R388
R389
R391

34 CPU_THERMDC
34 CPU_THERMDA

1
1
1
1

CPU_M_VREFF
2 39.2 1%
2 39.2 1%
2
2
2
2

510
510
300
300

+1.8V_SUS

F12
AH11
AJ11

M_VREF
M_ZN
M_ZP

A10
B10
F10
E9
AJ7
F6

TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9

D6
E7
F8
C5
AH9

TEST17
TEST16
TEST15
TEST14
TEST12

E5
AJ5
AG9
AG8
AH7
AJ6

TEST7
TEST6
THERMDC
THERMDA
TEST3
TEST2

+3.3V_DUAL
1

CPU_PWRGD
HT_STOP_
CPU_RST_

3900P 50V X7R


+1.8V_SUS

CLKIN_H
CLKIN_L

43
43
43
43
43

VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)

THERMTRIP_L
PROCHOT_L
TDO

DBRDY
VDDIO_FB_H
VDDIO_FB_L

TP /NI
TP_VID5

D2
D1
C1
E3
E2
E1

R411

CPU_CLK_

RN106
330 8P4R

A8
B8

21

VDDA1
VDDA2

1K

R377
1K

CPU_THERMTRIP

AK7
AL7

C10
D10
R376
169 1%

C446
CPU_CLK_

MISC

3900P 50V X7R

K8_VID4
K8_VID3
K8_VID2
K8_VID1
K8_VID0

CPU1D

CPU_THERMTRIP_

CPU_THERMTRIP_ 21

Q65

AK10

2N3904 SOT23

B6
AK11
AL11

TP /NI
TP_VDDIOFB
TP_VDDIOFB_
TP /NI

PSI_L

F1

HTREF1
HTREF0

V8
V7

R383 2
R385 2

TEST29_H
TEST29_L

C11
D11

FBCLKOUT
FBCLKOUT_

TEST24
TEST23
TEST22
TEST21
TEST20

AK8
AH8
AJ9
AL8
AJ8

TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8

J10
H9
AK9
AK5
G7
D4

+1.2V_HT
1 44.2 1%
1 44.2 1%

LAYOUT: PLACE WITHIN 1 INCH OF CPU


5/10

C445

R390
80.6 1%20/8/5/8/20

CPU_CLK

8
6
4
2

1
CPU_CLK

+1.8V_SUS

LAYOUT: PLACE 169 OHM WITHIN


600mils OF CPU
AND TRACE TO AC CAPS LESS
THAN 1250mil

7
5
3
1

R375
301 1%

21

C444
3900P 50V X7R

R374
301 1%

12

CPU_VDDA_ADJ

CT43
100UF 16V 5X11 2mm

1
2

AZ1117H-ADJ SOT-223

CPU_VDDA

2 INDUCTOR 68NH 300MA 0805


1

R373 1

VOUT
ADJ

VIN

I
C442
0.1UF 25V Y5V /NI

LAYOUT: PLACE WITHIN 1 INCH OF CPU


LAYOUT: ROUTE 80 OHM DIFF IMPEDENCE

R392 1

2 300

+1.8V_SUS

R393 1

2 300

8
6
4
2

+1.8V_SUS

RN107
7
5
3
1

330 8P4R

21 CPU_RST_
A

21 CPU_PWRGD
21 HT_STOP_

CPU_RST_
A

CPU_PWRGD
HT_STOP_

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2BSheet
Friday, September 01, 2006
1

Rev
1.2
8

of

48

CPU1B
MEMORY INTERFACE A

MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0

AG21
AG20
G19
H19
U27
U26

MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)

14,18 MEM_MA0_CS_L1
14,19 MEM_MA0_CS_L0

AC25
AA24

MA0_CS_L(1)
MA0_CS_L(0)

14,18 MEM_MA0_ODT0

13,14
13,14
13,14
13,14
13,14
13,14

AC28

MA0_ODT(0)

MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0

AE20
AE19
G20
G21
V27
W27

MA1_CLK_H(2)
MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)

16,18 MEM_MA1_CS_L1
16,19 MEM_MA1_CS_L0

AD27
AA25

MA1_CS_L(1)
MA1_CS_L(0)

16,18 MEM_MA1_ODT0

AC27

MA1_ODT(0)

14,16,19 MEM_MA_CAS_L
14,16,19 MEM_MA_WE_L
14,16,19 MEM_MA_RAS_L

AB25
AB27
AA26

MA_CAS_L
MA_WE_L
MA_RAS_L

14,16,19 MEM_MA_BANK2
14,16,18 MEM_MA_BANK1
14,16,19 MEM_MA_BANK0

N25
Y27
AA27

MA_BANK(2)
MA_BANK(1)
MA_BANK(0)

13,16
13,16
13,16
13,16
13,16
13,16

14,16,18,19 MEM_MA_ADD[15..0]

16,18 MEM_MA_CKE1
14,19 MEM_MA_CKE0
MEM_MA_ADD[15..0]

14,16 MEM_MA_DQS_H[8..0]
14,16 MEM_MA_DQS_L[8..0]

14,16 MEM_MA_DM[8..0]

MEM_MA_DQS_H[8..0]
MEM_MA_DQS_L[8..0]

MEM_MA_DM[8..0]

L27
M25

MA_CKE(1)
MA_CKE(0)

MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0

M27
N24
AC26
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
W24

MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)

MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0

AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
D29
C29
C25
D25
E19
F19
F15
G15

MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)

MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0

AF15
AF19
AJ25
AH29
B29
E24
E18
H15

MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)

MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)

AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14

MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0

MA_DQS_H(8)
MA_DQS_L(8)

J28
J27

MEM_MA_DQS_H8
MEM_MA_DQS_L8

MA_DM(8)

J25

MEM_MA_DM8

MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)

K25
J26
G28
G27
L24
K27
H29
H27

MEM_MA_CHECK7
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0

MEM_MA_DATA[0..63]

MEM_MA_DATA[0..63] 14,16

MEM_MA_CHECK[7..0]

MEM_MA_CHECK[7..0] 14,16

SOCKET_M2 940 SMD

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Friday, September 01, 2006
Sheet
1

Rev
1.2
9

of

48

CPU1C
D

AJ19
AK19
A18
A19
U31
U30

MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)

15,18 MEM_MB0_CS_L1
15,19 MEM_MB0_CS_L0

AE30
AC31

MB0_CS_L(1)
MB0_CS_L(0)

15,19 MEM_MB0_ODT0

AD29

MB0_ODT(0)

MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0

AL19
AL18
C19
D19
W29
W28

MB1_CLK_H(2)
MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)

17,19 MEM_MB1_CS_L1
17,19 MEM_MB1_CS_L0

AE29
AB31

MB1_CS_L(1)
MB1_CS_L(0)

17,18 MEM_MB1_ODT0

AD31

MB1_ODT(0)

15,17,18 MEM_MB_CAS_L
15,17,19 MEM_MB_WE_L
15,17,18 MEM_MB_RAS_L

AC29
AC30
AB29

MB_CAS_L
MB_WE_L
MB_RAS_L

15,17,19 MEM_MB_BANK2
15,17,18 MEM_MB_BANK1
15,17,18 MEM_MB_BANK0

N31
AA31
AA28

MB_BANK(2)
MB_BANK(1)
MB_BANK(0)

17,18 MEM_MB_CKE1
15,18 MEM_MB_CKE0
MEM_MB_ADD[15..0]

M31
M29

13,17
13,17
13,17
13,17
13,17
13,17

15,17,18,19 MEM_MB_ADD[15..0]

15,17 MEM_MB_DQS_H[8..0]
15,17 MEM_MB_DQS_L[8..0]

15,17 MEM_MB_DM[8..0]

MEMORY INTERFACE B

MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0

13,15
13,15
13,15
13,15
13,15
13,15

MEM_MB_DQS_H[8..0]
MEM_MB_DQS_L[8..0]

MEM_MB_DM[8..0]

MB_CKE(1)
MB_CKE(0)

MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0

N28
N29
AE31
N30
P29
AA29
P31
R29
R28
R31
R30
T31
T29
U29
U28
AA30

MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)

MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0

AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
D31
C31
C24
C23
D17
C17
C14
C13

MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)

MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0

AJ14
AH17
AJ23
AK29
C30
A23
B17
B13

MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)

MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)

AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13

MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0

MB_DQS_H(8)
MB_DQS_L(8)

J31
J30

MEM_MB_DQS_H8
MEM_MB_DQS_L8

MB_DM(8)

J29

MEM_MB_DM8

MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)

K29
K31
G30
G29
L29
L28
H31
G31

MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0

MEM_MB_DATA[0..63]

MEM_MB_DATA[0..63] 15,17

MEM_MB_CHECK[7..0]

MEM_MB_CHECK[7..0] 15,17

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Friday, September 01, 2006
Sheet
1

Rev
1.2
10

of

48

+1.2V_HT

C450
0.1UF 25V Y5V /NI

1
+V_CPU

CPU1F

+V_CPU

CPU1G

VDD1

A4
A6
AA8
AA10
AA12
AA14
AA16
AA18
AB7
AB9
AB11
AC4
AC5
AC8
AC10
AD2
AD3
AD7
AD9
AE10
AF7
AF9
AG4
AG5
AG7
AH2
AH3
B3
B5
B7
C2
C4
C6
C8
D3
D5
D7
D9
E4
E6
E8
E10
F5
F7
F9
F11
G6
G8
G10
G12
H7
H11
H23
J8
J12
J14
J16
J18
J20
J22
J24
K7
K9
K11
K13
K15
K17
K19
K21
K23
L4
L5
L8
L10
L12
Y17
Y19

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD150
VDD151

+V_CPU

CPU1H

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS240
VSS241

A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16

L14
L16
L18
M2
M3
M7
M9
M11
M13
M15
M17
M19
N8
N10
N12
N14
N16
N18
P7
P9
P11
P13
P15
P17
P19
R4
R5
R8
R10
R12
R14
R16
R18
R20
T2
T3
T7
T9
T11
T13
T15
T17
T19
T21
U8
U10
U12
U14
U16
U18
U20
V9
V11
V13
V15
V17
V19
V21
W4
W5
W8
W10
W12
W14
W16
W18
W20
Y2
Y3
Y7
Y9
Y11
Y13
Y15
Y21

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75

AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18

AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11
L20
L22
M21
M23
N20
N22
P21
P23
R22
T23
U22
V23
W22
Y23

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32

+1.2V_HT

CPU1I

+0.9V_SUS

VDD3

VDD2

C452
1UF 16V 0805 Y5V
1

C451
1UF 16V 0805 Y5V

+V_CPU

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22

VLDT_A1
VLDT_A2
VLDT_A3
VLDT_A4

D12
C12
B12
A12

VTT1
VTT2
VTT3
VTT4

AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
M24
M26
M28
M30
P24
P26
P28
P30
T24
T26
T28
T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29

+1.8V_SUS

C453

VDDIO

AJ4
AJ3
AJ2
AJ1

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO29
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28

VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4
VTT5
VTT6
VTT7
VTT8
VTT9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28

H6
H5
H2
H1

2
1UF 16V 0805 Y5V

AK12
AJ12
AH12
AG12
AL12

+0.9V_SUS

K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15

Title
<Title>
Size
Document Number
Custom
Date:
5

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

11

of

48

DECOUPLING BETWEEN PROCESSOR AND DIMMS


PLACE AS CLOSE TO PROCESSOR AS
POSSIBLE

C458

+0.9V_SUS

C459

C460

C461
1UF 16V 0805 Y5V
2

1UF 16V 0805 Y5V

1UF 16V 0805 Y5V

0.1UF 25V Y5V /NI

C465

1
C466

C467

0.1UF 25V Y5V

0.1UF 25V Y5V

+1.8V_SUS

PLACE BOTTOM SIDE DECOUPLING

+V_CPU

0.1UF 25V Y5V

BC468
BC472

1UF 16V 0805 Y5V

1UF 16V 0805 Y5V

1UF 16V 0805 Y5V

BTC1
100UF 6.3V D TAN

BC471

1UF 16V 0805 Y5V

1UF 16V 0805 Y5V

BC470

1UF 16V 0805 Y5V


2

1UF 16V 0805 Y5V

1
BC457

BC476

1UF 16V 0805 Y5V


2

10UF 10V 0805 Y5V /NI

BC475
2

BC474

BC473

+V_CPU

0.1UF 25V Y5V

C464

0.1UF 25V Y5V

C463

0.1UF 25V Y5V

C462

+0.9V_SUS

BC485

1
BC486

0.1UF 25V Y5V

BC487

1UF 16V 0805 Y5V

0.1UF 25V Y5V


2

1UF 16V 0805 Y5V


2

1
BC484

1UF 16V 0805 Y5V

BC483

1UF 16V 0805 Y5V

BC482

1UF 16V 0805 Y5V

1
BC481

1UF 16V 0805 Y5V


2

1
BC480

1UF 16V 0805 Y5V

BC479

1UF 16V 0805 Y5V

BC478

1UF 16V 0805 Y5V

BC477

+V_CPU

C493

0.1UF 25V Y5V


2

0.1UF 25V Y5V

1
C492

0.1UF 25V Y5V


2

0.1UF 25V Y5V

C491

0.1UF 25V Y5V


2

C490

1
C488

+1.8V_SUS

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Friday, September 01, 2006
Sheet
1

Rev
1.2
12

of

48

9,16 MEM_MA1_CLK_H2
1

9,14 MEM_MA0_CLK_H2
C494

C495

9,14 MEM_MA0_CLK_L2

1.5P 50V NPO 0402


9,16 MEM_MA1_CLK_L2

9,16 MEM_MA1_CLK_H1
1

9,14 MEM_MA0_CLK_H1

1.5P 50V NPO 0402

C496

C497

9,14 MEM_MA0_CLK_L1

1.5P 50V NPO 0402


9,16 MEM_MA1_CLK_L1

9,16 MEM_MA1_CLK_H0
1

9,14 MEM_MA0_CLK_H0

1.5P 50V NPO 0402

C498

C499

9,14 MEM_MA0_CLK_L0

1.5P 50V NPO 0402


9,16 MEM_MA1_CLK_L0

10,17 MEM_MB1_CLK_H2
1

10,15 MEM_MB0_CLK_H2

1.5P 50V NPO 0402

C500

C501

10,15 MEM_MB0_CLK_L2

1.5P 50V NPO 0402


10,17 MEM_MB1_CLK_L2

10,17 MEM_MB1_CLK_H1
1

10,15 MEM_MB0_CLK_H1

1.5P 50V NPO 0402

C502

C503

10,15 MEM_MB0_CLK_L1

1.5P 50V NPO 0402


10,17 MEM_MB1_CLK_L1

1.5P 50V NPO 0402


B

10,17 MEM_MB1_CLK_H0
1

10,15 MEM_MB0_CLK_H0
C504

C505

10,15 MEM_MB0_CLK_L0

1.5P 50V NPO 0402


10,17 MEM_MB1_CLK_L0

1.5P 50V NPO 0402

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Friday, September 01, 2006
Sheet
1

Rev
1.2
13

of

48

+1.8V_SUS

+3.3V

A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

MEM_MA_CHECK7
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0

168
167
162
161
49
48
43
42

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

185
186
137
138
220
221

CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L

MEM_MA_DM1
MEM_MA_DM0

MEM_MA_DQS_H[8..0]

9,16 MEM_MA_DQS_H[8..0]

MEM_MA_DQS_L[8..0]

9,16 MEM_MA_DQS_L[8..0]
C

15,16,17,25
15,16,17,25
9,16,19
9,16,18
9,16,19

SMB_MEM_SCL
SMB_MEM_SDA
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0

9,16,18,19 MEM_MA_ADD[15..0]

MEM_MA_CHECK[7..0]

9,16 MEM_MA_CHECK[7..0]

9,13
9,13
9,13
9,13
9,13
9,13

MEM_MA_DQS_H8
MEM_MA_DQS_L8
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0

MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2

18

MEM_MA_CKE0

9,16,19 MEM_MA_RAS_L
9,16,19 MEM_MA_CAS_L

52
171
192
74

9,19 MEM_MA0_CS_L0
9,18 MEM_MA0_CS_L1

193
76

9,19 MEM_MA_CKE0

170
175
181
191
194
51
56
62
72
75
78

238
WE_L

73

VREF

TEST

102

ODT0
ODT1

195
77

ERR_OUT_L
PAR_IN

55
68

NC1

19

+1.8V_SUS

R399
150 1%

R400
150 1%

C507
1UF 10V Y5V

PLACE NEAR DIMM SOCKETS

MEM_MA_WE_L 9,16,19
MEM_M_VREF

MEM_MA0_ODT0 9,18

RESET_L

CKE0
CKE1
RAS_L
CAS_L
S0_L
S1_L

Title
<Title>
Size
Document Number
Custom
Date:

C506
1UF 10V Y5V
MEM_M_VREF

DDR2-240 pin

MEM_MA_DATA[0..63] 9,16

173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188

MEM_MA_DM2

MEM_MA_DATA[0..63]

MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0

MEM_MA_DM4
MEM_MA_DM3

MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0

SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0

MEM_MA_DM5

236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3

101
240
239
120
119
54
190
71

MEM_MA_DM6

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L

21

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6

MEM_MA_DM8
MEM_MA_DM7

VDDSPD

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
MEM_MA_DM[8..0]

9,16 MEM_MA_DM[8..0]

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11

DIMMA1
D

172
178
184
187
189
197
53
59
64
67
69

DIMMA1

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

14

of

48

+1.8V_SUS

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6

DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L

101
240
239
120
119
54
190
71

SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0

MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0

173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188

A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0

168
167
162
161
49
48
43
42

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
10,17 MEM_MB_DQS_H[8..0]
10,17 MEM_MB_DQS_L[8..0]

MEM_MB_DQS_H[8..0]
MEM_MB_DQS_L[8..0]

14,16,17,25
14,16,17,25
10,17,19
10,17,18
10,17,18

10,17,18,19 MEM_MB_ADD[15..0]

+3.3V
SMB_MEM_SCL
SMB_MEM_SDA
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0

MEM_MB_ADD[15..0]

10,17 MEM_MB_CHECK[7..0]

MEM_MB_CHECK[7..0]

10,13
10,13
10,13
10,13
10,13
10,13

MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0

185
186
137
138
220
221

MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2

18

10,17,18 MEM_MB_RAS_L
10,17,18 MEM_MB_CAS_L

52
171
192
74

10,19 MEM_MB0_CS_L0
10,18 MEM_MB0_CS_L1

193
76

10,18 MEM_MB_CKE0

238

170
175
181
191
194
51
56
62
72
75
78

CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3

WE_L

73

VREF

TEST

102

ODT0
ODT1

195
77

ERR_OUT_L
PAR_IN

55
68

NC1

19

MEM_MB_DATA[0..63]

MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0

MEM_M_VREF

MEM_MB_WE_L 10,17,19

MEM_MB0_ODT0 10,19

PLACE NEAR DIMM SOCKETS

CKE0
CKE1
RAS_L
CAS_L
S0_L
S1_L

Title
<Title>
Size
Document Number
Custom
Date:

C508
0.1UF 25V Y5V

RESET_L

DDR2-240 pin

MEM_MB_DATA[0..63] 10,17

MEM_MB_DM8
MEM_MB_DM7

MEM_MB_DM[8..0]

DIMMB1

VDDSPD

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
10,17 MEM_MB_DM[8..0]

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11

DIMMB1
D

172
178
184
187
189
197
53
59
64
67
69

+3.3V

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

15

of

48

+1.8V_SUS

+3.3V

DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L

101
240
239
120
119
54
190
71

SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0

MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0

173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188

A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

MEM_MA_CHECK7
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0

168
167
162
161
49
48
43
42

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

185
186
137
138
220
221

CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L

MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MEM_MA_DQS_H8
MEM_MA_DQS_L8
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0

MEM_MA_DQS_H[8..0]

9,14 MEM_MA_DQS_H[8..0]

MEM_MA_DQS_L[8..0]

9,14 MEM_MA_DQS_L[8..0]
C

+3.3V
14,15,17,25
14,15,17,25
9,14,19
9,14,18
9,14,19

SMB_MEM_SCL
SMB_MEM_SDA
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0

9,14,18,19 MEM_MA_ADD[15..0]

MEM_MA_CHECK[7..0]

9,14 MEM_MA_CHECK[7..0]

9,13
9,13
9,13
9,13
9,13
9,13

MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2

18

MEM_MA_CKE1

9,14,19 MEM_MA_RAS_L
9,14,19 MEM_MA_CAS_L

52
171
192
74

9,19 MEM_MA1_CS_L0
9,18 MEM_MA1_CS_L1

193
76

9,18 MEM_MA_CKE1

170
175
181
191
194
51
56
62
72
75
78

238
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3

WE_L

73

VREF

TEST

102

ODT0
ODT1

195
77

ERR_OUT_L
PAR_IN

55
68

NC1

19

MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0

MEM_MA_DATA[0..63]

MEM_MA_WE_L 9,14,19
MEM_M_VREF

MEM_MA1_ODT0 9,18

C509
0.1UF 25V Y5V

PLACE NEAR DIMM SOCKETS

RESET_L

CKE0
CKE1
RAS_L
CAS_L
S0_L
S1_L

Title
<Title>

DDR2-240 pin-W

Size
Document Number
Custom
Date:

MEM_MA_DATA[0..63] 9,14

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6

MEM_MA_DM7

MEM_MA_DM8

VDDSPD

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
MEM_MA_DM[8..0]

9,14 MEM_MA_DM[8..0]

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11

DIMMA2
D

172
178
184
187
189
197
53
59
64
67
69

DIMMA2

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

16

of

48

+1.8V_SUS

164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6

DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L

101
240
239
120
119
54
190
71

SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0

MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0

173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188

A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0

168
167
162
161
49
48
43
42

CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0

MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
10,15 MEM_MB_DQS_H[8..0]
10,15 MEM_MB_DQS_L[8..0]

MEM_MB_DQS_H[8..0]
MEM_MB_DQS_L[8..0]

14,15,16,25
14,15,16,25
10,15,19
10,15,18
10,15,18

10,15,18,19 MEM_MB_ADD[15..0]

+3.3V
SMB_MEM_SCL
SMB_MEM_SDA
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0

MEM_MB_ADD[15..0]

10,15 MEM_MB_CHECK[7..0]

MEM_MB_CHECK[7..0]

10,13
10,13
10,13
10,13
10,13
10,13

MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0

185
186
137
138
220
221

MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2

18

10,15,18 MEM_MB_RAS_L
10,15,18 MEM_MB_CAS_L

52
171
192
74

10,19 MEM_MB1_CS_L0
10,19 MEM_MB1_CS_L1

193
76

10,18 MEM_MB_CKE1

238

170
175
181
191
194
51
56
62
72
75
78

CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3

WE_L

73

VREF

TEST

102

ODT0
ODT1

195
77

ERR_OUT_L
PAR_IN

55
68

NC1

19

MEM_MB_DATA[0..63]

MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0

MEM_M_VREF

MEM_MB_WE_L 10,15,19

MEM_MB1_ODT0 10,18

PLACE NEAR DIMM SOCKETS

CKE0
CKE1
RAS_L
CAS_L
S0_L
S1_L

Title
<Title>
Size
Document Number
Custom
Date:

C510
0.1UF 25V Y5V

RESET_L

DDR2-240 pin-W

MEM_MB_DATA[0..63] 10,15

MEM_MB_DM8
MEM_MB_DM7

MEM_MB_DM[8..0]

DIMMB2

VDDSPD

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
10,15 MEM_MB_DM[8..0]

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11

DIMMB2
D

172
178
184
187
189
197
53
59
64
67
69

+3.3V

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

17

of

48

+0.9V_SUS

9,16 MEM_MA1_ODT0
9,14 MEM_MA0_CS_L1
9,14 MEM_MA0_ODT0
10,15,17 MEM_MB_CAS_L

10,15,17
10,15,17
9,14,16
9,14,16

MEM_MB_RAS_L
MEM_MB_ADD0
MEM_MA_ADD10
MEM_MA_BANK1

10,15,17
9,14,16
10,15,17
9,14,16

MEM_MB_ADD8
MEM_MA_ADD5
MEM_MB_ADD1
MEM_MA_ADD3

10,15,17
10,15,17
10,15,17
9,14,16

MEM_MB_ADD3
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MA_ADD4

10,15,17
9,14,16
9,14,16
10,15,17

MEM_MB_ADD4
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MB_ADD2

9,14,16
10,15,17
10,15,17
10,15,17

MEM_MA_ADD0
MEM_MB_BANK1
MEM_MB_ADD10
MEM_MB_BANK0

MEM_MA1_ODT0
MEM_MA0_CS_L1
MEM_MA0_ODT0
MEM_MB_CAS_L

8
6
4
2

RN108 47 8P4R
7
5
3
1

MEM_MB_RAS_L
MEM_MB_ADD0
MEM_MA_ADD10
MEM_MA_BANK1

8
6
4
2

RN109 47 8P4R
7
5
3
1

MEM_MB_ADD8
MEM_MA_ADD5
MEM_MB_ADD1
MEM_MA_ADD3

8
6
4
2

RN110 47 8P4R
7
5
3
1

MEM_MB_ADD3
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MA_ADD4

8
6
4
2

RN111 47 8P4R
7
5
3
1

MEM_MB_ADD4
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MB_ADD2

8
6
4
2

RN112 47 8P4R
7
5
3
1

MEM_MA_ADD0
MEM_MB_BANK1
MEM_MB_ADD10
MEM_MB_BANK0

8
6
4
2

RN113 47 8P4R
7
5
3
1

MEM_MB_CKE0
MEM_MA_ADD14
MEM_MB_CKE1
MEM_MA_CKE1

8
6
4
2

RN114 47 8P4R
7
5
3
1

MEM_MB_ADD13
MEM_MA1_CS_L1
MEM_MB0_CS_L1
MEM_MB1_ODT0

8
6
4
2

RN122 47 8P4R
7
5
3
1

10,15 MEM_MB_CKE0
9,14,16 MEM_MA_ADD14
10,17 MEM_MB_CKE1
9,16 MEM_MA_CKE1
10,15,17 MEM_MB_ADD13
9,16 MEM_MA1_CS_L1
10,15 MEM_MB0_CS_L1
10,17 MEM_MB1_ODT0

+1.8V_SUS

MEM_MB_ADD8
MEM_MB_ADD6
MEM_MA_ADD14
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MA_ADD10
MEM_MB_ADD10
MEM_MB_ADD2
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_ADD13

C540
C542
BC512
C543
C544
C545
BC516
C538
C546
BC526
BC525
BC521
BC522
BC523
BC524
C547
C548
C535

22P 50V NPO 0402


22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

MEM_MB_CAS_L C549
MEM_MB_RAS_L C551

2
2

1 22P 50V NPO 0402


1 22P 50V NPO 0402

MEM_MB_BANK1 C553
MEM_MA_BANK1 BC531
MEM_MB_BANK0 C554

2
2
2

1 22P 50V NPO 0402


1 22P 50V NPO 0402
1 22P 50V NPO 0402

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
18

of

48

+0.9V_SUS

9,14,16
9,14,16
10,17
10,15

MEM_MA_BANK0
MEM_MA_RAS_L
MEM_MB1_CS_L0
MEM_MB0_CS_L0

9,14 MEM_MA0_CS_L0
9,14,16 MEM_MA_CAS_L
10,15 MEM_MB0_ODT0
10,17 MEM_MB1_CS_L1

10,15,17
10,15,17
10,15,17
10,15,17

MEM_MB_ADD14
MEM_MB_ADD9
MEM_MB_ADD11
MEM_MB_ADD7

9,14,16
10,15,17
9,14,16
10,15,17

MEM_MA_ADD9
MEM_MB_BANK2
MEM_MA_ADD12
MEM_MB_ADD12

10,15,17 MEM_MB_WE_L
9,14,16 MEM_MA_WE_L
9,16 MEM_MA1_CS_L0
9,14,16 MEM_MA_ADD13

9,14,16
9,14,16
9,14,16
9,14,16

MEM_MA_BANK2
MEM_MA_ADD6
MEM_MA_ADD8
MEM_MA_ADD7

9,14 MEM_MA_CKE0
9,14,16 MEM_MA_ADD15
10,15,17 MEM_MB_ADD15
9,14,16 MEM_MA_ADD11

8
6
4
2

RN115
7
5
3
1

47 8P4R

MEM_MA_BANK0
MEM_MA_RAS_L
MEM_MB1_CS_L0
MEM_MB0_CS_L0

8
6
4
2

RN116
7
5
3
1

47 8P4R

MEM_MA0_CS_L0
MEM_MA_CAS_L
MEM_MB0_ODT0
MEM_MB1_CS_L1

8
6
4
2

RN117
7
5
3
1

47 8P4R

MEM_MB_ADD14
MEM_MB_ADD9
MEM_MB_ADD11
MEM_MB_ADD7

8
6
4
2

RN118
7
5
3
1

47 8P4R

MEM_MA_ADD9
MEM_MB_BANK2
MEM_MA_ADD12
MEM_MB_ADD12

8
6
4
2

RN119
7
5
3
1

47 8P4R

MEM_MB_WE_L
MEM_MA_WE_L
MEM_MA1_CS_L0
MEM_MA_ADD13

8
6
4
2

RN120
7
5
3
1

47 8P4R

MEM_MA_BANK2
MEM_MA_ADD6
MEM_MA_ADD8
MEM_MA_ADD7

8
6
4
2

RN121
7
5
3
1

47 8P4R

MEM_MA_CKE0
MEM_MA_ADD15
MEM_MB_ADD15
MEM_MA_ADD11

+1.8V_SUS

MEM_MB_ADD15
MEM_MA_ADD15
MEM_MB_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MB_ADD11
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MB_ADD7
MEM_MB_ADD9
MEM_MB_ADD12

C533
BC511
C534
BC513
BC514
BC515
C537
BC517
BC518
BC519
BC520
C541
C539
C536

2
2
2
2
2
2
2
2
2
2
2
2
2
2

1
1
1
1
1
1
1
1
1
1
1
1
1
1

22P 50V NPO 0402


22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402

MEM_MB_WE_L
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L

C550
BC527
BC528
BC529

2
2
2
2

1
1
1
1

22P 50V NPO 0402


22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402

MEM_MA_BANK2 BC530
MEM_MB_BANK2 C552
MEM_MA_BANK0 BC532

2
2
2

1 22P 50V NPO 0402


1 22P 50V NPO 0402
1 22P 50V NPO 0402

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
19

of

48

LAYOUT: FRONT SIDE PLACE ALTERNATING GND AND 1.8V


ALONG 0.9V VTT FILL
+0.9V_SUS

+1.8V_SUS

+0.9V_SUS

C555 1

2 0.1UF 25V Y5V

C556 1

2 0.1UF 25V Y5V

C557 1

2 0.1UF 25V Y5V

C558 1

2 0.1UF 25V Y5V

C559 1

2 0.1UF 25V Y5V

C560 1

2 0.1UF 25V Y5V

C561 1

2 0.1UF 25V Y5V

C562 1

2 0.1UF 25V Y5V

C563 1

2 0.1UF 25V Y5V

C564 1

2 0.1UF 25V Y5V

C565 1

2 0.1UF 25V Y5V

C566 1

2 0.1UF 25V Y5V

C567 1

2 0.1UF 25V Y5V

C568 1

2 0.1UF 25V Y5V

C569 1

2 0.1UF 25V Y5V

C570 1

2 0.1UF 25V Y5V

C571 1

2 0.1UF 25V Y5V

C572 1

2 0.1UF 25V Y5V

C573 1

2 0.1UF 25V Y5V

C574 1

2 0.1UF 25V Y5V

C575 1

2 0.1UF 25V Y5V

C576 1

2 0.1UF 25V Y5V

C577 1

2 0.1UF 25V Y5V

C578 1

2 0.1UF 25V Y5V

C579 1

2 0.1UF 25V Y5V

C580 1

2 0.1UF 25V Y5V

C581 1

2 0.1UF 25V Y5V

C582 1

2 0.1UF 25V Y5V

C583 1

2 0.1UF 25V Y5V

C584 1

2 0.1UF 25V Y5V

C585 1

2 0.1UF 25V Y5V

C586 1

2 0.1UF 25V Y5V

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Friday, September 01, 2006
Sheet
1

Rev
1.2
20

of

48

+5V_STBY
U11A
HT_DWN[15..0]

7 HT_DWN[15..0]

HT_UP[15..0]
HT_DWN0
HT_DWN1
HT_DWN2
HT_DWN3
HT_DWN4
HT_DWN5
HT_DWN6
HT_DWN7
HT_DWN8
HT_DWN9
HT_DWN10
HT_DWN11
HT_DWN12
HT_DWN13
HT_DWN14
HT_DWN15

AG30
AF30
AE29
AD27
AC29
AB30
AA30
AA28
AE26
AD26
AC24
AC26
AB26
Y22
Y24
Y26

HT_RXD0
HT_RXD1
HT_RXD2
HT_RXD3
HT_RXD4
HT_RXD5
HT_RXD6
HT_RXD7
HT_RXD8
HT_RXD9
HT_RXD10
HT_RXD11
HT_RXD12
HT_RXD13
HT_RXD14
HT_RXD15

HT_DWN_0
HT_DWN_1
HT_DWN_2
HT_DWN_3
HT_DWN_4
HT_DWN_5
HT_DWN_6
HT_DWN_7
HT_DWN_8
HT_DWN_9
HT_DWN_10
HT_DWN_11
HT_DWN_12
HT_DWN_13
HT_DWN_14
HT_DWN_15

AG29
AF29
AE28
AD28
AB28
AB29
AA29
AA27
AF26
AD25
AD24
AC25
AB25
AA22
Y23
Y25

HT_RXD0*
HT_RXD1*
HT_RXD2*
HT_RXD3*
HT_RXD4*
HT_RXD5*
HT_RXD6*
HT_RXD7*
HT_RXD8*
HT_RXD9*
HT_RXD10*
HT_RXD11*
HT_RXD12*
HT_RXD13*
HT_RXD14*
HT_RXD15*

HT_DWNCLK0
HT_DWNCLK0_
HT_DWNCLK1
HT_DWNCLK1_

AC27
AC28
AB24
AB23

HT_RX_CLK0
HT_RX_CLK0*
HT_RX_CLK1
HT_RX_CLK1*

HT_DWNCNTL
HT_DWNCNTL_

Y28
W27

HT_RXCTL
HT_RXCTL*

HT_REQ_
HT_STOP

M22
N22

HT_REQ*/GPIO
HT_STOP*

AF27
AF28

HT_CAL_GND1
HT_CAL_GND2

1
2

U17A

14

3
4
5

RN123
8
6
4
2

HT_STOP_
CPU_PWRGD
CPU_RST_

7
5
3
1

HT_STOP

6
7

3
2

PWRGD_SB

25,40

SN74ACT08

10

8
8
8

11

100 8P4R

12
13

RN124

2
4
6
8

14
15

1
3
5
7

14

2
3

CPU_PWGD

4
5

SN74ACT08

9
10
11
12
13
14

14

15

U17C

7
7
7
7

CPU_RST
+3.3V

8
10

HT_DWNCLK0
HT_DWNCLK0_
HT_DWNCLK1
HT_DWNCLK1_

7 HT_DWNCNTL
BR8 7 HT_DWNCNTL_
10K

SN74ACT08
+3.3V

RN125
+1.8V_SUS

HT_STOP
7
5 CPU_PWGD
3 CPU_RST
1

8
6
4
2

BR193
BR194

40

40
HT_VLD
44 CPU_VREGPWRGD

MEM_VLD

46
44

+3.3V

R206

0 0805

49.9 1%
150 1%

HT_COMP1
HT_COMP2

R424
0 /NI

680 8P4R

N27
N29
P29
P28
T28
U28
U30
V29
P25
P26
P22
T25
U22
V26
V24
V22

HT_UP0
HT_UP1
HT_UP2
HT_UP3
HT_UP4
HT_UP5
HT_UP6
HT_UP7
HT_UP8
HT_UP9
HT_UP10
HT_UP11
HT_UP12
HT_UP13
HT_UP14
HT_UP15

HT_TXD0*
HT_TXD1*
HT_TXD2*
HT_TXD3*
HT_TXD4*
HT_TXD5*
HT_TXD6*
HT_TXD7*
HT_TXD8*
HT_TXD9*
HT_TXD10*
HT_TXD11*
HT_TXD12*
HT_TXD13*
HT_TXD14*
HT_TXD15*

N28
N30
P30
R29
U27
U29
V30
V28
P24
N26
P23
T26
T22
U26
V25
V23

HT_UP_0
HT_UP_1
HT_UP_2
HT_UP_3
HT_UP_4
HT_UP_5
HT_UP_6
HT_UP_7
HT_UP_8
HT_UP_9
HT_UP_10
HT_UP_11
HT_UP_12
HT_UP_13
HT_UP_14
HT_UP_15

HT_TX_CLK0
HT_TX_CLK0*
HT_TX_CLK1
HT_TX_CLK1*

R28
R27
T23
T24

HT_UPCLK0
HT_UPCLK0_
HT_UPCLK1
HT_UPCLK1_

HT_TXCTL
HT_TXCTL*

W29
W28

HT_UPCNTL
HT_UPCNTL_

CPU_CLK
CPU_CLK*

L28
L29

CPU_CLK
CPU_CLK_

L27
M26
M28
AF25
M25

CPU_PWGD
CPU_RST
CPU_THERMTRIP_

3.3V_PLL_HT

HTVDD_EN
VCORE_EN

HT_VLD
CPU_VREGPWRGD
HTVDD_EN
VCORE_EN

AK5
AJ4
AK4
AE3
AD3

HT_VLD
CPU_VLD
MEM_VLD
HTVDD_EN
CPUVDD_EN

AG28

+3.3V_PLL_HT

AG27

+3.3V_PLL_CPU

CPU_CLK_66
CPU_PWROK
CPU_RST*
THERMTRIP*/GPIO
CPU_COMP

HT_UP[15..0]

7
D

HT_UP_[15..0]
0
1

U17B

HT_TXD0
HT_TXD1
HT_TXD2
HT_TXD3
HT_TXD4
HT_TXD5
HT_TXD6
HT_TXD7
HT_TXD8
HT_TXD9
HT_TXD10
HT_TXD11
HT_TXD12
HT_TXD13
HT_TXD14
HT_TXD15

HT_DWN_[15..0]

7 HT_DWN_[15..0]
56 8P4R

SEC 1 OF 7

HT_UP_[15..0] 7

CPU_COMP
BR6

HT_UPCLK0
HT_UPCLK0_
HT_UPCLK1
HT_UPCLK1_

7
7
7
7

HT_UPCNTL
HT_UPCNTL_

7
7

CPU_CLK
CPU_CLK_

8
8

CPU_THERMTRIP_ 8

TCK
TDI
TDO
TMS
TRST*

AD5
AC6
AB6
AC3
AC5

CK8_TCK
CK8_TDI
CK8_TMS
CK8_TRST*

+3.3V

549 1%
R257

10K

R239

R274

10K

R276

10K

10K

C411
C313
1UF 16V 0805 Y5V

0.1UF 25V Y5V

C314
0.1UF 25V Y5V
CPU_CLK
CK804-A3
R412
261 1% /NI

+3.3V
R202
0 0805
C295
C302
0.1UF 25V Y5V 1UF 16V 0805 Y5V

3.3V_PLL_CPU

CPU_CLK_

C310
0.1UF 25V Y5V

Title

CK804 1 0F 7
Size
Document Number
Custom
Date:
5

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

21

of

48

U11B
28 PE0_IN[15..0]

PE0_IN[15..0]
PE0_IN0
PE0_IN1
PE0_IN2
PE0_IN3
PE0_IN4
PE0_IN5
PE0_IN6
PE0_IN7
PE0_IN8
PE0_IN9
PE0_IN10
PE0_IN11
PE0_IN12
PE0_IN13
PE0_IN14
PE0_IN15

28 PE0_IN*[15..0]

27 PE1_IN
27 PE1_IN*
27 PE1_PRSNT*
27 PE2_IN
27 PE2_IN*
27 PE2_PRSNT*

31 PE3_PRSNT*

H18
F18
J18
H16
E16
D14
J16
H14
E13
H12
E12
J11
D10
H10
F10
E8

PE0_RX0
PE0_RX1
PE0_RX2
PE0_RX3
PE0_RX4
PE0_RX5
PE0_RX6
PE0_RX7
PE0_RX8
PE0_RX9
PE0_RX10
PE0_RX11
PE0_RX12
PE0_RX13
PE0_RX14
PE0_RX15

PE0_TX0
PE0_TX1
PE0_TX2
PE0_TX3
PE0_TX4
PE0_TX5
PE0_TX6
PE0_TX7
PE0_TX8
PE0_TX9
PE0_TX10
PE0_TX11
PE0_TX12
PE0_TX13
PE0_TX14
PE0_TX15

A18
A17
C17
C16
C15
C14
A14
B13
D13
D11
B11
B10
B9
C9
C8
C7

PE_TX0 C284
PE_TX1
PE_TX2
PE_TX3 C290
PE_TX4
PE_TX5
PE_TX6 C278
PE_TX7
PE_TX8
PE_TX9 C273
PE_TX10
PE_TX11
PE_TX12 C267
PE_TX13
PE_TX14
PE_TX15 C261

0.1UF 25V Y5V


PE0_OUT0
0.1UF 25V Y5V
PE0_OUT1
C292
0.1UF 25V Y5VPE0_OUT2
0.1UF 25V Y5V
PE0_OUT3
C288
0.1UF 25V Y5V
PE0_OUT4
C280
0.1UF 25V Y5VPE0_OUT5
0.1UF 25V Y5V
PE0_OUT6
C276
0.1UF 25V Y5V
PE0_OUT7
C285
0.1UF 25V Y5VPE0_OUT8
0.1UF 25V Y5V
PE0_OUT9
C271
0.1UF 25V Y5V
PE0_OUT10
C269
0.1UF 25V Y5VPE0_OUT11
0.1UF 25V Y5V
PE0_OUT12
C265
0.1UF 25V Y5V
PE0_OUT13
C264
0.1UF 25V Y5VPE0_OUT14
0.1UF 25V Y5V
PE0_OUT15

PE0_RX0*
PE0_RX1*
PE0_RX2*
PE0_RX3*
PE0_RX4*
PE0_RX5*
PE0_RX6*
PE0_RX7*
PE0_RX8*
PE0_RX9*
PE0_RX10*
PE0_RX11*
PE0_RX12*
PE0_RX13*
PE0_RX14*
PE0_RX15*

PE0_TX0*
PE0_TX1*
PE0_TX2*
PE0_TX3*
PE0_TX4*
PE0_TX5*
PE0_TX6*
PE0_TX7*
PE0_TX8*
PE0_TX9*
PE0_TX10*
PE0_TX11*
PE0_TX12*
PE0_TX13*
PE0_TX14*
PE0_TX15*

B18
B17
D17
D15
B15
B14
A13
C13
C12
C11
C10
A10
A9
D9
D8
B7

PE_TX0* C283
PE_TX1*
PE_TX2*
PE_TX3* C289
PE_TX4*
PE_TX5*
PE_TX6* C277
PE_TX7*
PE_TX8*
PE_TX9* C274
PE_TX10*
PE_TX11*
PE_TX12*C268
PE_TX13*
PE_TX14*
PE_TX15*C262

PE0_OUT*0
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0_OUT*1
C291
0.1UF 25V Y5VPE0_OUT*2
0.1UF 25V Y5V
PE0_OUT*3
C287
0.1UF 25V Y5V
PE0_OUT*4
C279
0.1UF 25V Y5VPE0_OUT*5
0.1UF 25V Y5V
PE0_OUT*6
C275
0.1UF 25V Y5V
PE0_OUT*7
C286
0.1UF 25V Y5VPE0_OUT*8
PE0_OUT*9
0.1UF 25V Y5V
C272
0.1UF 25V Y5V
PE0_OUT*10
C270
0.1UF 25V Y5VPE0_OUT*11
0.1UF 25V Y5V
PE0_OUT*12
C266
0.1UF 25V Y5V
PE0_OUT*13
C263
0.1UF 25V Y5VPE0_OUT*14
0.1UF 25V Y5V
PE0_OUT*15

C282

2
3
4

5
6
7
8
9
10
11
12
13
14
15

PE0_OUT*[15..0]
PE0_IN*0 G18
PE0_IN*1 E17
PE0_IN*2 J17
PE0_IN*3 G16
PE0_IN*4 F16
PE0_IN*5 E14
PE0_IN*6 J15
PE0_IN*7 G14
PE0_IN*8 F14
PE0_IN*9 G12
PE0_IN*10 F12
PE0_IN*11 J10
PE0_IN*12 E10
PE0_IN*13 G10
PE0_IN*14 E9
PE0_IN*15 F8

PE0_PRSNT*

D22

PE0_PRSNT*

PE1_IN
PE1_IN*

D18
E18

PE1_RX
PE1_RX*

PE1_PRSNT*

G22

PE1_PRSNT*

PE2_IN
PE2_IN*

F20
E20

PE2_RX
PE2_RX*

PE2_PRSNT*

F22

PE2_PRSNT*

H20
G20

PE3_RX
PE3_RX*

E21

PE3_PRSNT*

K19
J19

PE4_RX
PE4_RX*

PE3_PRSNT*

PE0_REFCLK
PE0_REFCLK*
PE1_TX
PE1_TX*
PE1_REFCLK
PE1_REFCLK*
PE2_TX
PE2_TX*
PE2_REFCLK
PE2_REFCLK*
PE3_TX
PE3_TX*
PE3_REFCLK
PE3_REFCLK*

B19 PE0CLK_R
C18 PE0CLK_R*

C281

R221
R223

33
33

PE1_TX
PE1_TX*

D19
C19

D21 PE1CLK_R
C20 PE1CLK_R*

R215
R219

33
33

PE2_TX
PE2_TX*

B21
C21

C24 PE2CLK_R
D23 PE2CLK_R*

R210
R213

C22
B22

33
33

R220

40.2 1%

R222

40.2 1%

R214

40.2 1%

R218

40.2 1%

R209

40.2 1%

R212

40.2 1%

PE0_OUT[15..0] 28

PE0_IN*[15..0]

28 PE0_PRSNT*

PE0_OUT[15..0]

SEC 2 OF 7

PE0_OUT*[15..0] 28

1
2
3
4
5
6
7
8
9
10

PLACE 0 OHM RES AT CONNECTOR


SHARE PAD WITH CLOCK GEN 0 OHM

11
12
13

14
15

PE0_REFCLK
PE0_REFCLK*
C333
C332

0.1UF 25V Y5V


0.1UF 25V Y5V

PE1_OUT
PE1_OUT*

PE1_REFCLK
PE1_REFCLK*
C320
C321

0.1UF 25V Y5V


0.1UF 25V Y5V

PE2_OUT
PE2_OUT*

PE2_REFCLK
PE2_REFCLK*

PE0_REFCLK 28
PE0_REFCLK* 28
PE1_OUT
PE1_OUT*

27
27

PE1_REFCLK 27
PE1_REFCLK* 27
PE2_OUT
PE2_OUT*

27
27

PE2_REFCLK 27
PE2_REFCLK* 27

C23
B23

+3.3V_DUAL

R211
10K

27,28 PE_RESET*

PE_WAKE*

27,28 PE_WAKE*

PE_RESET*

E22
E23

PE_RST*
PE_WAKE*

PE4_TX
PE4_TX*

A22
A21

PE_REFCLKIN
PE_REFCLKIN*

A25
B25

PE_CLK_TEST
PE_CLK_TEST*

C25
D24

+1.5V
R208
R370

0 0805

PECLK_COMP_GND

1.5V_PLL_PE

E24 PE_COMP
499 1%

BC23
1UF 16V 0805 Y5V

C305
C306
C307
1UF 16V 0805 Y5V
0.1UF 25V Y5V /NI
0.1UF 25V Y5V

A27
A28

+1.5V_PLL_PE_AVDD
+1.5V_PLL_PE_DVDD

+3.3V

+3.3V_PLL_PE_CORE

+1.5V

B28

+3.3V_PLL_PE_CORE

B26

C316
0.1UF 25V Y5V

+1.5V_PLL_PE_CORE

R207

0 0805

C315
1UF 16V 0805 Y5V

C299
1UF 16V 0805 Y5V

C235
0.1UF 25V Y5V /NI

BC25
1UF 16V 0805 Y5V
A26

GND_PLL_PE

I145

Title

CK804-A3

CK804 2 OF 7
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Friday, September 01, 2006
Sheet
1

Rev
1.2
22

of

48

U11C
PCI_AD[31..0]

29,30 PCI_AD[31..0]

PCI_REQ*[4..0]

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

21
22
23
24
25
26
27
28
29
30
31

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

H7
K7
J2
L9
J3
J5
H8
H6
K8
J4
H3
G5
G6
G7
H4
G3
C2
C1
D2
C3
B2
D3
E3
E4
B4
A3
A4
B3
C4
C5
A5
D5

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE*0
PCI_C/BE*1
PCI_C/BE*2
PCI_C/BE*3

J1
G2
F3
D4

PCI_CBE0*
PCI_CBE1*
PCI_CBE2*
PCI_CBE3*

F4
D1
E2
F2
E1
G4
F5
F6
P6
N4

PCI_FRAME*
PCI_IRDY*
PCI_TRDY*
PCI_STOP*
PCI_DEVSEL*
PCI_PAR
PCI_PERR*
PCI_SERR*/GPIO
PCI_PME*/GPIO
PCI_CLKRUN*/GPIO

PCI_REQ0*/GPIO
PCI_REQ1*/GPIO
PCI_REQ2*/GPIO
PCI_REQ3*/GPIO
PCI_REQ4*/GPIO

PCI_REQ*0
PCI_REQ*1
PCI_REQ*2
PCI_REQ*3
PCI_REQ*4

N5
N9
M9
M8
P5

29,30,31

0
1

+3.3V

PEX REFCLKIN FREQ

2
3
4

0 = 100MHZ
1 = 200MHZ

R240
R249

PCI_GNT0*/GPIO
PCI_GNT1*/GPIO
PCI_GNT2*/GPIO
PCI_GNT3*/GPIO
PCI_GNT4*/GPIO

PCI_GNT*0
PCI_GNT*1
PCI_GNT*2
PCI_GNT*3
PCI_GNT*4

M7
M6
M5
K4
P7

PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*

B5
E6
E5
D6

PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
PCI_CLKFB

K3
L2
K2
K5
L3
L4
M3

8.2K

8.2K /NI

PCI_GNT*[4..0]

PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
R266

PCI_GNT*[4..0]

PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*

22
R267

22
R265

29,30

29,30,31
29,30,31
29,30,31
29,30,31

22
R264

PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3

22
R268

PCLK_5
PCI_CLKFB
C352

C353

C351
22P 50V NPO

PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3

29
29
30
30

LPC_FRAME*
LPC_DRQ0*

34,37
34

LPC_SERIRQ

34

22

C354
22P 50V NPO

22P 50V NPO


22P 50V NPO

PCI_C/BE*[3..0]

29,30 PCI_C/BE*[3..0]

0
1
2
3

29,30,31
29,30,31
29,30,31
29,30,31
29,30,31
29,30
29,30,31
29,30,31
29,30,31
31

PCI_REQ*[4..0]

SEC 3 OF 7
0

29 PCI_RST0*
30 PCI_RST1*

36 PCIRST_IDE*
37 LPCRST_FLASH*
34 LPCRST_SIO*

PCI_FRAME*
PCI_IRDY*
PCI_TRDY*
PCI_STOP*
PCI_DEVSEL*
PCI_PAR
PCI_PERR*
PCI_SERR*
PCI_PME*
PCI_CLKRUN*

PCI_FRAME*
PCI_IRDY*
PCI_TRDY*
PCI_STOP*
PCI_DEVSEL*
PCI_PAR
PCI_PERR*
PCI_SERR*
PCI_PME*
PCI_CLKRUN*

R243

33

PCIRESET0

N2

PCI_RESET0*

PCI_RST1*

R241

33

PCIRESET1

N1

PCI_RESET1*

N3

PCI_RESET2*

AF16

PCI_RESET3*

AE7

LPC_RESET*

BR1

33

LPCRST_FLASH*

R230

33

LPCRST_SIO*

R232

33

PCIRESET3
PCIRESET4

AF9 LPC_AD0
AE10 LPC_AD1
AD10 LPC_AD2
AC10 LPC_AD3

LPC_AD[3..0]
+3.3V

34,37
+3.3V

+3.3V

1
2
3

R229
8.2K /NI

R247
8.2K /NI

R227
8.2K

R238
8.2K
B

LPC_FRAME*
LPC_DRQ0*
LPC_CS*/DRQ1*
SERIRQ
LPC_PWRDWN*/GPIO

PCI_RST0*

PCIRST_IDE*

LPC_AD[3..0]
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

COMMON MODE LEVEL


PEX REFCLK
1 = COMMON MODE ABOVE VDD/2
0 = *COMMON MODE BELOW VDD/2

AC8
AF7
AH8
AD8

LPC_FRAME*
LPC_DRQ0*
LPCCS
LPC_SERIRQ

AE8

LPC_CLK0

AB10

LPC_CLK0

LPC_CLK1

AB11

LPC_CLK1

C348
10P 50V NPO /NI

R259

22

R245

PCI_CLKSIO
100 PCI_CLKLPC

PCI_CLKSIO

34

PCI_CLKLPC

37

C355
10P 50V NPO /NI

CK804-A3

FOR AMIC FLASH CAN'T REFLASH

+3.3V

ADD FOR EMI PLACE NEAR R210


C418
0.1UF 25V Y5V /NI

Title

CK804 3 OF 7
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Friday, September 01, 2006
Sheet
1

Rev
1.2
23

of

48

JSATA1

JSATA2
U11D
H1

H1

1
SP_TX0P
SP_TX0M

2
3

2
3

PLACE CAPS AT CONN

SP_TX1P
SP_TX1M

SP_RX0M
SP_RX0P

5
6

5
6

H2

H2

SATA CONNECTOR

SP_TX0P_C
SP_TX0M_C
0.01UF 50V X7R
0.01UF 50V X7R SP_RX0M_C
SP_RX0P_C
C407
0.01UF 50V X7R
0.01UF 50V X7R
C401

SP_RX0M C406
SP_RX0P

IDE_PDD[15..0]
AK9
AJ9

SP_TXP0
SP_TXN0

AJ10
AH10

SP_RXN0
SP_RXP0

SP_RX1M
SP_RX1P
PLACE CAPS AT CONN

SP_TX1P C397
SP_TX1M

0.01UF 50V X7R


C398

SP_TX1P_C
SP_TX1M_C
0.01UF 50V X7R
0.01UF 50V X7R SP_RX1M_C
SP_RX1P_C
C409
0.01UF 50V X7R

SP_RX1M C408
SP_RX1P

SATA CONNECTOR

AJ11
AH11

SP_TXP1
SP_TXN1

AG11
AH12

SP_RXN1
SP_RXP1

PLACE CAPS AT CONN

JSATA3

JSATA4

H1

H1

2
3

C405

0.01UF 50V X7R


C414

SP_RX2M
SP_RX2P

C415

0.01UF 50V X7R


C416

SP_TX3P
SP_TX3M

SP_RX2M
SP_RX2P

5
6

H2

H2

SATA CONNECTOR

+3.3V

I
O
A

+1.5V_SP_PLLPWR
1

R226
1K 1%

0.01UF 50V X7R


C396

SP_RX3M C402
SP_RX3P

0.01UF 50V X7R


C404

BR7

BR4
2.49K 1%

SP_TXP2
SP_TXN2

AK13
AJ13

SP_RXN2
SP_RXP2

SP_TX3P_C AJ14
SP_TX3M_C AH14
0.01UF 50V X7R
SP_RX3M_C AJ15
SP_RX3P_C AH15
0.01UF 50V X7R

SP_TXP3
SP_TXN3

SP_TERMP
SP_TERMN

1.5V_PLL_SP

0 0805

BC55
1UF 16V 0805 Y5V

C336

SP_TX3P C395
SP_TX3M

BC42
0.1UF 25V Y5V /NI

BC47
1UF 16V 0805 Y5V

UNNAMED_24_RES_I126_A

AA14

SP_LED*/GPIO

AD14
AE14
AF14
AG14

SP_REFCLKN
SP_REFCLKP
SP_TSTCLKN
SP_TSTCLKP

AF13

SP_ATEST

AC14
AB14

SP_TERMP
SP_TERMN

AG12
AF12

BC44
0.1UF 25V Y5V

100UF 16V 5X11 2mm

R228
226 1%

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

+1.5V_PLL_SP_DVDD
+1.5V_PLL_SP_AVDD

BC45
0.1UF 25V Y5V /NI

AE12

+1.5V_PLL_SP_CORE

AD13

+3.3V_PLL_SP_CORE

AF11

GND_PLL_SP

36

IDE_DATA_P0
IDE_DATA_P1
IDE_DATA_P2
IDE_DATA_P3
IDE_DATA_P4
IDE_DATA_P5
IDE_DATA_P6
IDE_DATA_P7
IDE_DATA_P8
IDE_DATA_P9
IDE_DATA_P10
IDE_DATA_P11
IDE_DATA_P12
IDE_DATA_P13
IDE_DATA_P14
IDE_DATA_P15

AE20
AA17
AB18
AD18
AE18
AJ17
AG17
AD17
AB17
AH17
AK17
AF18
AC18
AG18
AF20
AD20

IDE_ADDR_P0
IDE_ADDR_P1
IDE_ADDR_P2

AH20
AH19
AG21

IDE_ADDR_P0
IDE_ADDR_P1
IDE_ADDR_P2

IDE_CS1_P*
IDE_CS3_P*
IDE_DACK_P*
IDE_IOW_P*
IDE_INTR_P
IDE_DREQ_P
IDE_IOR_P*
IDE_RDY_P
CBL_DET_P

AH21
AJ21
AH18
AB20
AJ19
AC20
AA19
AJ18
AG19

IDE_CS1_P*
IDE_CS3_P*
IDE_DACK_P*
IDE_IOW_P*
IDE_INTR_P
IDE_DREQ_P
IDE_IOR_P*
IDE_IORDY_P
CBLE_DET_P

IDE_DATA_S0
IDE_DATA_S1
IDE_DATA_S2
IDE_DATA_S3
IDE_DATA_S4
IDE_DATA_S5
IDE_DATA_S6
IDE_DATA_S7
IDE_DATA_S8
IDE_DATA_S9
IDE_DATA_S10
IDE_DATA_S11
IDE_DATA_S12
IDE_DATA_S13
IDE_DATA_S14
IDE_DATA_S15

AG24
AG23
AJ23
AJ22
AF22
AB21
AF21
AK21
AG22
AD22
AE22
AC22
AH22
AH23
AH24
AF24

IDE_ADDR_S0
IDE_ADDR_S1
IDE_ADDR_S2

AJ28
AJ27
AH26

IDE_ADDR_S0
IDE_ADDR_S1
IDE_ADDR_S2

IDE_CS1_S*
IDE_CS3_S*
IDE_DACK_S*
IDE_IOW_S*
IDE_INTR_S
IDE_DREQ_S
IDE_IOR_S*
IDE_RDY_S
CBL_DET_S

AG26
AH27
AK26
AE24
AJ26
AF23
AH25
AJ25
AK28

IDE_CS1_S*
IDE_CS3_S*
IDE_DACK_S*
IDE_IOW_S*
IDE_INTR_S
IDE_DREQ_S
IDE_IOR_S*
IDE_IORDY_S
CBLE_DET_S

1
2
3
4
5

6
7
8
9
10
11
12
13
14
15

IDE_ADDR_P0 36
IDE_ADDR_P1 36
IDE_ADDR_P2 36
IDE_CS1_P*
IDE_CS3_P*
IDE_DACK_P*
IDE_IOW_P*
IDE_INTR_P
IDE_DREQ_P
IDE_IOR_P*
IDE_IORDY_P
CBLE_DET_P

IDE_SDD[15..0]

SP_RXN3
SP_RXP3

AG13
AH13

SATA_HDLED*

42 SATA_HDLED*

PLACE VREG CLOSE


TO CK804 PLL BALLS

U12
AZ1117H-ADJ SOT-223

C324
1UF 16V 0805 Y5V

SP_RX3M
SP_RX3P

SATA CONNECTOR

SP_TX2P_C
SP_TX2M_C
0.01UF 50V X7R
SP_RX2M_C
SP_RX2P_C
0.01UF 50V X7R

PLACE CAPS AT CONN

5
6

SP_TX2P
SP_TX2M

1
SP_TX2P
SP_TX2M

2
3

IDE_PDD[15..0]

SEC 4 OF 7
SP_TX0P C400
SP_TX0M

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

IDE_SDD[15..0]

36
36
36
36
36
36
36
36
36
C

36

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

IDE_ADDR_S0 36
IDE_ADDR_S1 36
IDE_ADDR_S2 36
IDE_CS1_S*
IDE_CS3_S*
IDE_DACK_S*
IDE_IOW_S*
IDE_INTR_S
IDE_DREQ_S
IDE_IOR_S*
IDE_IORDY_S
CBLE_DET_S

36
36
36
36
36
36
36
36
36

+3.3V

BR3
120

C337
0.1UF 25V Y5V

C325
1UF 16V 0805 Y5V /NI

IDE_COMP_3P3V
IDE_COMP_GND

AD16
AE16

IDE_COMP_3P3V
IDE_COMP_GND

+3.3V

BR5
120

25MHZ 20PF 30PPM


R225

0 0805

C323
0.1UF 25V Y5V /NI

3.3V_PLL_SP_CORE
C327

XTALIN
XTALOUT

AJ29
AH29

XTALIN
XTALOUT
2

BC54
RTC_XTALIN

C328
0.1UF 25V Y5V
1UF 16V 0805 Y5V

0.1UF 25V Y5V /NI

AF5
AG4

X2 1

C297
22P 50V NPO

XTALIN_RTC
XTALOUT_RTC

C296
22P 50V NPO

CK804-A3
RTC_XTALOUT
A

C344

X3 1

C346
22P 50V NPO

22P 50V NPO 32.768KHZ 12.5PF 20PPM

Title

CK804 4 0F 7
Size
Document Number
Custom
Date:
5

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

24

of

48

+3.3V_DUAL

U11E

C298
41 RGMII_TXCLK
41 RGMII_TXCTL

0.1UF 25V Y5V


R201
1.54K 1%

41
41
41
41

RGMII_VERF = 1.25V
MII_VERF = 1.65V

22
22

7
5
3
1

SEC 5 OF 7
RGMII_TX0
RGMII_TX1
RGMII_TX2
RGMII_TX3
RGMII_TXCLK_R
RGMII_TXCTL_R

RGMII_RXD0
RGMII_RXD1
RGMII_RXD2
RGMII_RXD3
RGMII_RXCLK
RGMII_RXCTL
RGMII_MDC

RGMII_RXD[3..0]
RGMII_RXCLK
RGMII_RXCTL
RGMII_MDC

+3.3V_DUAL
+3.3V

RGMII_VREF
MII_RXER
MII_COL
RGMII_MDIO
MII_CRS

41 RGMII_MDIO

MIIPWRDWN

TP14
43
BR10
10K /NI

32

TP /NI

GPIO_11

RGMII_25MHZBR2

41 RGMII_25MHZ

R476
10K
R275
10K

AC97CLK BR11
AC_BITCLK

32 AC97CLK
32 AC_BITCLK

AC_SDOUT
AC_SDOUT

32

BUF_25_R
22 /NI
22

AC_SDIN_0

AC_SDIN_0

TP_AC_SDIN_1
10K

R269
32
32

AC97CLK_R

AC_RST*
AC_SYNC

AC_RST*
AC_SYNC

BR279
10K

H28
J27
J28
J29
H26
J26

G/MII_TXD0
G/MII_TXD1
G/MII_TXD2
G/MII_TXD3
G/MII_TXCLK
G_TXCTL/MII_TXEN

G29
E30
F29
F28
H27
G28
K24

G/MII_RXD0
G/MII_RXD1
G/MII_RXD2
G/MII_RXD3
G/MII_RXCLK
G_RXCTL/MII_RXDV
G/MII_MDC

VBAT

VBAT

41 RGMII_RESET*
40 FLASH_RECOVERY*
+3.3V_DUAL R236

10K

R231

LID*
10K

LLB*

RTC_RST*

USB_5
USB_5*

USB_6
USB_6*

T5
T6

USB_6
USB_6*

USB_7
USB_7*

T7
T8

USB_7
USB_7*

USB_8
USB_8*

U5
V6

USB_8
USB_8*

Y6
AA5

AC97_CLK
AC_BITCLK

USB_9
USB_9*

V7
V8

USB_9
USB_9*

Y8
Y7
AB8

AC_SDATA_OUT/GPIO
AC_SDATA_IN0/GPIO
AC_SDATA_IN1/GPIO

Y5
AA9

AC_RESET*
AC_SYNC/GPIO

V4
V5
V3
V2
AA4
V9

USB_OC0*
USB_OC1*/GPIO
USB_OC2*/GPIO
USB_OC3*/GPIO
USB_OC4*/GPIO
USB_RBIAS

AB7
AC7

USB_BKPNL_3_2_OC*
USB_BKPNL_3_2_OC* 39
USB_BKPNL_5_4_OC*
USB_BKPNL_5_4_OC* 39
USB_FNTPNL_7_6_OC*
USB_FNTPNL_7_6_OC* 47
USB_FNTPNL_1_0_OC*
USB_FNTPNL_1_0_OC* 47
USB_FNTPNL_8_9_OC*
USB_FNTPNL_8_9_OC* 47
USBRBIAS
BR9
732 1%
+3.3V_DUAL

3.3V_PLL_USB
C356

C350

BL7
0 0805

3.3V_PLL_DUAL
BC27

500MA

USB_1
USB_1*

47
47 D

USB_2
USB_2*

39
39

USB_3
USB_3*

39
39

USB_4
USB_4*

39
39

USB_5
USB_5*

39
39

USB_6
USB_6*

47
47

USB_7
USB_7*

47
47

USB_8
USB_8*

47
47

USB_9
USB_9*

47
47

RN86
15K 8P4R
RN90 RN87
RN57
RN77
15K 8P4R 15K 8P4R 15K 8P4R 15K 8P4R

FB

BC28
1UF 16V 0805 Y5V

C303
0.1UF 25V Y5V /NI

+3.3V_STBY

+3.3V_DUAL

A20GATE/GPIO
INTRUDER*
EXT_SMI*/GPIO
RI*/GPIO
SPKR/GPIO
PWRBTN*
SIO_PME*/GPIO
KBRDRSTIN*/GPIO
SMB_CLK0/GPIO
SMB_DATA0/GPIO
SMB_CLK1/GPIO
SMB_DATA1/GPIO
+3.3V_VBAT
BUF_SIO_CLK
SUSCLK/GPIO
THERM*/GPIO
RSTBTN*

AG8
AB2
AB3
AC2
AB1

GPIO_1
GPIO_2/CPU_SLP*
GPIO_3/CPU_CLKRUN*
GPIO_4/SUS_STAT*
GPIO_5/SYS_ERR*

AE6
AF6
AD6
AH6
AE2

LID*/GPIO
SLP_DEEP*
V3P3_DEEP
LLB*
RTC_RST*

AH1

+3.3V_PLL_USB

SLP_S5*
SLP_S3*
PWRGD_SB
PWRGD
FANRPM/GPIO
FANCTL0/GPIO
FANCTL1/GPIO
TEST

L11
BC50
0.1UF 25V Y5V

A29

47
47

SPDIF0/GPIO
SPDIF1/GPIO

PULL BATT TO CLR TIME

U1
U2

USB_0
USB_0*

+3.3V_DUAL

BR12
4.7K

0.01UF 50V X7R /NI0.1UF 25V Y5V

BEAD 60 0805 1A
2-3

USB_5
USB_5*

BUF_25MHZ

+3.3V

CLEAR CMOS

USB_4
USB_4*

M24

I218

HEADER 1X3

U3
U4

R277
10K

43
GPIO_1
43
GPIO_2
43
GPIO_3
RGMII_RESET*
FLASH_RECOVERY*

JCMOS1
1RTC_R
2
3

1-2

USB_4
USB_4*

BC26

34,42,43

JCI1

NORMAL

USB_3
USB_3*

MII_VREF
MII_RXER/GPIO
MII_COL
G/MII_MDIO
MII_CRS
MII_PWRDWN/GPIO
MII_INTR/GPIO

CLEAR CMOS CONTROL

T3
R4

E29
K29
K26
J30
K27
K25
K28

1 = EXTERNAL
0 = *INTERNAL

HEADER 1X2 /NI

R2
R3

USB_3
USB_3*

+3.3V_PLL_DUAL

SPDIF 1
(PEX PLL REF CLK)

R329
51K

USB_2
USB_2*

USB_2
USB_2*

R270
10K
SPDIF0
SPDIF1

INTRUDER*

P8
P9

USB_1
USB_1*

+3.3V

1 = 24MHZ
0 = *14.318MHZ

1M /NI

USB_0
USB_0*

USB_1
USB_1*

SPDIF 0
SIO CLK

R237

P2
P3

USB_0
USB_0*

2
4
6
8
8
6
4
2
2
4
6
8
2
4
6
8
8
6
4
2

RGMII_TXD0
RGMII_TXD1
RGMII_TXD2
RGMII_TXD3
RGMII_TXCLK
R186
RGMII_TXCTL
R185

RN81
22 8P4R
8
6
4
2

1
3
5
7
7
5
3
1
1
3
5
7
1
3
5
7
7
5
3
1

R200
41 RGMII_TXD[3..0]
2.49K 1%

C359
0.1UF 25V Y5V /NI

AG7
AK3
AH5
AJ3
AF3
AJ2
AJ5
AF2
Y3
W4
W2
W3
AH4
AF1
AG5
AD4
AJ6

A20GATE
INTRUDER*
SLEEPBTNJ
SER_RI*
SPEAKER
PWBTOUTIO_PME*
SIO_KBRST*
SMB_MEM_SCL
SMB_MEM_SDA
SMB_SCL
SMB_SDA
VBAT
BUF_SIO_CLK_R

AJ7
AH7
AG3
AC4
AA3
AA2
AB4
AE5

SLP_S5*
SLP_S3*
PWRGD_SB
CK8_PWRGD

A20GATE

34

SLEEPBTNJ
SER_RI*
SPEAKER
PWBTOUTIO_PME*
SIO_KBRST*

42
38
42
34
34
34

R338
2.7K

R285
2.7K

BC53
0.1UF 25V Y5V /NI

R280
2.7K

SMB_MEM_SCL 14,15,16,17
SMB_MEM_SDA 14,15,16,17
SMB_SCL
27,28,29,30,43
SMB_SDA
27,28,29,30,43
VBAT
34,42,43
BUF_SIO_CLK 34

BUF_SIO_CLK
R258

CHIP_THERM_
FP_RESET*

SLEEPBTNJ
R339
2.7K

22

CHIP_THERM_ 34
FP_RESET*
42,43
SLP_S5*
SLP_S3*
PWRGD_SB
CK8_PWRGD

CK8_TEST 2

R260

45
34,45
21,40
40

C347
10P 50V NPO /NI

C342
0.1UF 25V Y5V

1K
CK804-A3

+3.3V

+3.3V_DUAL

R244

CHIP_THERM_

10K

1UF 16V 0805 Y5V


Q44

0.1UF 25V Y5V

C594
1UF 10V 0805 Y5V /NI

SMB_MEM_SCL

BAV99 SOT23
Q45
Title

SMB_MEM_SDA

CK804 5 OF 7
Size
Document Number
Custom

BAV99 SOT23

Date:
5

NF4ST-A2B
Friday, September 01, 2006
Sheet
1

Rev
1.2
25

of

48

+5V

+5V

R195
100

U11G

+1.5V

CK804 DECOUPLING

R235
100

+1.5V

SEC 7 OF 7
D

+1.5V
BL2
1.5V_PEX_A
BEAD 60 0805 1A
BC31

BC29

BC30

BL1
BEAD 60 0805 1A
0.1UF 25V Y5V

1UF 16V 0805 Y5V

K20
F25
D27
E26
B30
G24
D28
C29
J21

+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V

D30
K21
C30
H24
E27
J22
F26
E28
J24
K23
D29
L22
G25
K22
G26
F27
L21

+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D
+1.5V_PE_D

BC34
BC35
BC33
0.1UF 25V Y5V /NI

0.1UF 25V Y5V /NI

0.1UF 25V Y5V

+1.5V
BL3

BEAD 60 0805 1A

SP_1.5V_A

+1.5V_DUAL
BC36

BC32

BC46

H22
C28
B29
D26
F24
G23
E25
B27
C26
C27

+1.5V_PE_A
+1.5V_PE_A
+1.5V_PE_A
+1.5V_PE_A
+1.5V_PE_A
+1.5V_PE_A
+1.5V_PE_A
+1.5V_PE_A
+1.5V_PE_A
+1.5V_PE_A

AD15
AA15
AB15
AF15

+1.5V_SP_A
+1.5V_SP_A
+1.5V_SP_A
+1.5V_SP_A

AA20
AA18
U10
R10
J9
L10
Y10
W10
AA11

+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT

N21
P21
T21
V21
W21

+3.3V_DUAL
+3.3V_DUAL
+3.3V_DUAL
+3.3V_DUAL

AB9
Y9
P4
M21

+1.5V_SP_D
+1.5V_SP_D

AG2
AG1

+1.5V_DUAL
+1.5V_DUAL

UNNAMED_26_CK804_I21_
UNNAMED_26_CK804_I21__1

C259

C341

BC22
BC48
BC24
0.1UF 25V Y5V
0.1UF 25V Y5V10UF
/NI 10V 0805 Y5V /NI

0.1UF 25V Y5V


+3.3V
0.1UF 25V Y5V

+1.5V

+1.5V_DUAL

+1.2V_HT

+1.2V_HT
BC40
1UF 16V 0805 Y5V

C294
1UF 16V 0805 Y5V

C345
C349
BC37
0.1UF 25V0.1UF
Y5V 25V Y5V0.1UF
/NI 25V Y5V

+3.3V
+3.3V_DUAL

AF4
T9

BC41

BC51

BC52

C304

C308

BC49
C338
BC39
0.1UF 25V Y5V0.1UF 25V Y5V0.1UF 25V Y5V

C326

0.1UF 25V Y5V


100UF 16V 5X11 2mm /NI
10UF 10V 0805 Y5V /NI
0.1UF 25V Y5V0.1UF 25V Y5V
0.1UF 25V Y5V

+1.5V_PLL_HT

AA12
AB12

SP_AGND
SP_AGND
SP_AGND
SP_AGND
SP_AGND
SP_AGND

AG15
AH16
AK14
AB13
AG16
AA13

SP_DGND
SP_DGND

AD12
AC12

BC43

0.1UF 25V Y5V /NI

+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V

+3.3V_USB_DUAL
+3.3V_USB_DUAL

Y21

C234
1UF 16V 0805 Y5V /NI

AH30
A6

BC38
0.1UF 25V Y5V /NI

0.1UF 25V Y5V

+5V
+5V

CK804-A3

E11
G11
G9
G8
B6
D7
E7
K18
K17
K16
K15
K14
K13
K12
K11
K10
CK804-A3

PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_DGND
PE_DGND
PE_DGND
PE_DGND
PE_DGND
PE_DGND
PE_DGND
PE_DGND
PE_DGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND
PE_AGND

D25
G21
D20
E19
G19
J20
G17
D16
E15
G15
G13
J14
J13
J12
D12

SEC 6 OF 7
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

AK10
AK27
AD7
AB5
A2
B1
K30
AA1
AH9
AA16
AK6
W24
U24
AF10
AC16
AB19
AB27
P27
AH2
AD19
AD21
R22
AE1
AE27
AE30
AE4
AB16
AF19
AG10
AG20
AG25
AH28
AH3
AJ1
AJ30
G27
AK18
AK2
AK22
AK25
AK29
AF17
AA7
C6
M12
W15
H25
V27
K1
W7
W12
W22
F1
AE25
F30
AG6
M13
W13
W17
M23
W26
AD23
W5
K9
AD9
AG9
W14
W18
AA21
W9
Y4
AF8
AA10
W16
W19
AA26
Y27
AD11
AB22
L24
L26
L5

U11F

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

M27
M4
N12
F7
N14
N15
N16
N17
N18
N19
AA24
N24
N7
N10
P1
P10
P12
P13
P14
P15
P16
P17
P18
P19
R24
R21
R12
R13
R14
R15
R16
R17
R18
R19
U21
R26
R5
R7
R9
T10
T12
T13
T14
T15
T16
T17
T18
T19
J7
T27
T4
U12
U13
U14
U15
U16
U17
U18
U19
U7
U9
V1
V10
V12
V13
V14
V15
V16
V17
V18
V19
M10
K6
H5
M14
M15
M16
M17
M18
M19
N13
L7

0.1UF 25V Y5V 0.1UF 25V Y5V1UF 16V 0805 Y5V

Title

CK804 7 OF 7
Size
Document Number
Custom
Date:
5

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

26

of

48

+12V

+3.3V_DUAL

+3.3V

+12V

SMB_SCL
SMB_SDA

25,28,29,30,43 SMB_SCL
25,28,29,30,43 SMB_SDA

PE_WAKE*

22,28 PE_WAKE*

PE2_OUT
PE2_OUT*

22 PE2_OUT
22 PE2_OUT*
22 PE2_PRSNT*

PE2_PRSNT*

+3.3V

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11

+12V
+12V
+12V
GND
SMCLK
SMDAT
GND
+3.3V
TRST*
+3.3V_AUX
WAKE*

PRSNT1*
+12V
+12V
GND
TCK
TDI
TDO
TMS
+3.3V
+3.3V
PERST*

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

B12
B13
B14
B15
B16
B17
B18

RSVD
GND
PETP0
PETN0
GND
PRSNT2*
GND

GND
REFCLK+
REFCLKGND
PERP0
PERN0
GND

A12
A13
A14
A15
A16
A17
A18

R216
R217

10K

+3.3V_DUAL +3.3V

PEX1_1

X1 CONNECTOR

RN83
10K 8P4R
1
2
3
4
5
6
7
8

+3.3V

PE_RESET*

PE_RESET*

PE2_REFCLK
PE2_REFCLK*

22,28

PE2_REFCLK 22
PE2_REFCLK* 22

PE2_IN
PE2_IN*

PE2_IN
PE2_IN*

22
22

3GPIOX1

10K

PEX1_2

+12V

+12V

SMB_SCL
SMB_SDA

25,28,29,30,43 SMB_SCL
25,28,29,30,43 SMB_SDA

PE_WAKE*

22,28 PE_WAKE*
B

22 PE1_OUT
22 PE1_OUT*
22 PE1_PRSNT*

PE1_OUT
PE1_OUT*
PE1_PRSNT*
+3.3V
R234
R233

+3.3V

10K

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11

+12V
+12V
+12V
GND
SMCLK
SMDAT
GND
+3.3V
TRST*
+3.3V_AUX
WAKE*

PRSNT1*
+12V
+12V
GND
TCK
TDI
TDO
TMS
+3.3V
+3.3V
PERST*

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

B12
B13
B14
B15
B16
B17
B18

RSVD
GND
PETP0
PETN0
GND
PRSNT2*
GND

GND
REFCLK+
REFCLKGND
PERP0
PERN0
GND

A12
A13
A14
A15
A16
A17
A18

X1 CONNECTOR

1
3
5
7

RN84
10K 8P4R
2
4
6
8

+3.3V

PE_RESET*

PE_RESET*

PE1_REFCLK
PE1_REFCLK*

22,28

PE1_REFCLK 22
PE1_REFCLK* 22

PE1_IN
PE1_IN*

PE1_IN
PE1_IN*

22
22

3GPIOX1

10K

+3.3V_DUAL
D17
A K
SS12/5817 SMA

Title

PE X1 SLOT 1/2
Size
Document Number
Custom
Date:
5

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

27

of

48

PEX16
+12V

3GPIOX16
+12V

25,27,29,30,43 SMB_SCL
25,27,29,30,43 SMB_SDA

+3.3V
D

SMB_SCL
SMB_SDA

+3.3V_DUAL
PE_TRST*
PE_WAKE*

22,27 PE_WAKE*

PE0_OUT[15..0]
PE0_OUT*[15..0]

22 PE0_OUT[15..0]
22 PE0_OUT*[15..0]
22

R199
10K
PE0_OUT15
PE0_OUT*15

PE0_PRSNT*

PE0_PRSNT*

+3.3V

R203
10K

PE0_OUT14
PE0_OUT*14
PE0_OUT13
PE0_OUT*13
PE0_OUT12
PE0_OUT*12

PE0_OUT11
PE0_OUT*11
PE0_OUT10
PE0_OUT*10
PE0_OUT9
PE0_OUT*9
PE0_OUT8
PE0_OUT*8

PE0_OUT7
PE0_OUT*7
PE0_OUT6
PE0_OUT*6
PE0_OUT5
PE0_OUT*5

PE0_OUT4
PE0_OUT*4
PE0_OUT3
PE0_OUT*3
PE0_OUT2
PE0_OUT*2
PE0_OUT1
PE0_OUT*1
PE0_OUT0
PE0_OUT*0

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11

+12V
+12V
+12V
GND
SMCLK
SMDAT
GND
+3.3V
TRST*
+3.3V_AUX
WAKE*

PRSNT1*
+12V
+12V
GND
TCK
TDI
TDO
TMS
+3.3V
+3.3V
PERST*

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

B12
B13
B14
B15
B16
B17
B18

RSVD
GND
PETP0
PETN0
GND
PRSNT2*
GND

GND
REFCLK+
REFCLKGND
PERP0
PERN0
GND

A12
A13
A14
A15
A16
A17
A18

B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32

PETP1
PETN1
GND
GND
PETP2
PETN2
GND
GND
PETP3
PETN3
GND
RSVD
PRSNT2*
GND

RSVD
GND
PERP1
PERN1
GND
GND
PERP2
PERN2
GND
GND
PERP3
PERN3
GND
RSVD

A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32

B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49

PETP4
PETN4
GND
GND
PETP5
PETN5
GND
GND
PETP6
PETN6
GND
GND
PETP7
PETN7
GND
PRSNT2*
GND

RSVD
GND
PERP4
PERN4
GND
GND
PERP5
PERN5
GND
GND
PERP6
PERN6
GND
GND
PERP7
PERN7
GND

A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82

PETP8
PETN8
GND
GND
PETP9
PETN9
GND
GND
PETP10
PETN10
GND
GND
PETP11
PETN11
GND
GND
PETP12
PETN12
GND
GND
PETP13
PETN13
GND
GND
PETP14
PETN14
GND
GND
PETP15
PETN15
GND
PRSNT2*
RSVD

RSVD
GND
PERP8
PERN8
GND
GND
PERP9
PERN9
GND
GND
PERP10
PERN10
GND
GND
PERP11
PERN11
GND
GND
PERP12
PERN12
GND
GND
PERP13
PERN13
GND
GND
PERP14
PERN14
GND
GND
PERP15
PERN15
GND

A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82

X1 CONNECTOR

X4 CONNECTOR

+3.3V
PE_TCK
PE_TDI

R196
R197

10K
10K

R198

10K

PE_TMS
PE_RESET*

PE_RESET*

PE0_REFCLK
PE0_REFCLK*
PE0_IN15
PE0_IN*15

PE0_IN[15..0]
PE0_IN*[15..0]

22,27
PE0_REFCLK
PE0_REFCLK*
PE0_IN[15..0]
PE0_IN*[15..0]

22
22
22
22

PE0_IN14
PE0_IN*14
PE0_IN13
PE0_IN*13
PE0_IN12
PE0_IN*12

PLACE CAPS NEAR PEX CONNECTORS


+12V
C

X8 CONNECTOR

X16 CONNECTOR

C330
C317
C311
C335
0.1UF 25V Y5V
0.1UF 25V Y5V
0.1UF
/NI25V Y5V
0.1UF
/NI25V Y5V /NI

PE0_IN11
PE0_IN*11
PE0_IN10
PE0_IN*10
PE0_IN9
PE0_IN*9

+3.3V

PE0_IN8
PE0_IN*8

C293

C318
C309
C340
0.1UF 25V Y5V /NI
0.1UF 25V Y5V

C331
0.1UF 25V Y5V /NI

0.1UF 25V Y5V /NI

1000P 50V X7R /NI


PE0_IN7
PE0_IN*7
PE0_IN6
PE0_IN*6

+12V
+3.3V_DUAL
CT32
C322
100UF 16V 5X11 2mm /NI
C319
0.1UF 25V Y5V /NI

PE0_IN5
PE0_IN*5

100UF 16V 5X11 2mm

PE0_IN4
PE0_IN*4
PE0_IN3
PE0_IN*3
PE0_IN2
PE0_IN*2
PE0_IN1
PE0_IN*1
PE0_IN0
PE0_IN*0

I1

3GPIOX16

Title
<Title>
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
28

of

48

SLOT 1 (CLOSEST TO CPU)


SLOT 1

SLOT 2
PCI2

23,30 PCI_AD[31..0]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_AD23

A58
B58
A57
B56
A55
B55
A54
B53
B52
A49
B48
A47
B47
A46
B45
A44
A32
B32
A31
B30
A29
B29
A28
B27
A25
B24
A23
B23
A22
B21
A20
B20
A26

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
IDSEL

PCI_C/BE*0
PCI_C/BE*1
PCI_C/BE*2
PCI_C/BE*3

A52
B44
B33
B26

CBE0*
CBE1*
CBE2*
CBE3*

A6
B7
A7
B8

INTA*
INTB*
INTC*
INTD*

B18
A17

REQ*
GNT*

PCI_PME*
PCI_FRAME*
PCI_TRDY*
PCI_STOP*
PCI_IRDY*
PCI_DEVSEL*
PCI_LOCK*
PCI_PERR*
PCI_SERR*
PCI_PAR
SMB_SDA
PCI_RST0*
SMB_SCL

A19
A34
A36
A38
B35
B37
B39
B40
B42
A43
A41
A15
A40

PME*
FRAME*
TRDY*
STOP*
IRDY*
DEVSEL*
LOCK*
PERR*
SERR*
PAR
SBO*
RESET*
SDONE

PCI_REQ64C*
PCI_ACK64*
PCI_CLK1

A60
B60
B16

REQ64*
ACK64*
CLOCK

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
23

23,30,31 PCI_INTZ*
23,30,31 PCI_INTW*
23,30,31 PCI_INTX*
23,30,31 PCI_INTY*
23,30,31 PCI_REQ*[4..0]
23,30 PCI_GNT*[4..0]

23,30,31 PCI_PME*
23,30,31 PCI_FRAME*
23,30,31 PCI_TRDY*
23,30,31 PCI_STOP*
23,30,31 PCI_IRDY*
23,30,31 PCI_DEVSEL*
30,31 PCI_LOCK*
23,30,31 PCI_PERR*
30,31 PCI_SERR*
23,30
PCI_PAR
25,27,28,30,43 SMB_SDA
23
PCI_RST0*
25,27,28,30,43 SMB_SCL
31 PCI_REQ64C*
30,31 PCI_ACK64*
23
PCI_CLK1

PCI_C/BE*[3..0]
0
1
2
3

PCI_INTZ*
PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_REQ*[4..0]
PCI_GNT*[4..0]

PCI_REQ*1
PCI_GNT*1

V2.2
5V 32BIT

23,30 PCI_AD[31..0]
3.3VAUX
TDO
PRSNT1*
PRSNT2*
RSVD1
RSVD2
RSVD3
RSVD5
TCK
TRST*
TMS
TDI

+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V

KEY<A50>
KEY<A51>
KEY<B50>
KEY<B51>

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

PCI_AD[31..0]
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_AD22

A58
B58
A57
B56
A55
B55
A54
B53
B52
A49
B48
A47
B47
A46
B45
A44
A32
B32
A31
B30
A29
B29
A28
B27
A25
B24
A23
B23
A22
B21
A20
B20
A26

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
IDSEL

PCI_C/BE*0
PCI_C/BE*1
PCI_C/BE*2
PCI_C/BE*3

A52
B44
B33
B26

CBE0*
CBE1*
CBE2*
CBE3*

A6
B7
A7
B8

INTA*
INTB*
INTC*
INTD*

B18
A17

REQ*
GNT*

PCI_PME*
PCI_FRAME*
PCI_TRDY*
PCI_STOP*
PCI_IRDY*
PCI_DEVSEL*
PCI_LOCK*
PCI_PERR*
PCI_SERR*
PCI_PAR
SMB_SDA
PCI_RST0*
SMB_SCL

A19
A34
A36
A38
B35
B37
B39
B40
B42
A43
A41
A15
A40

PME*
FRAME*
TRDY*
STOP*
IRDY*
DEVSEL*
LOCK*
PERR*
SERR*
PAR
SBO*
RESET*
SDONE

PCI_REQ64D*
PCI_ACK64*
PCI_CLK0

A60
B60
B16

REQ64*
ACK64*
CLOCK

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
23

A14
B4
B9
B11
A9
B10
A11
B14
B2
A1
A3
A4

+12V
+12V
-12V

-12V

A2
B1
B5
B6
A5
A8
A10
B61
A16
B62
A59
B59
A61
B19
A62
A21
A27
A33
A39
A45
B43
B41
B36
B31
B25
B54
A53

+3.3V_DUAL

I135

PCI_AD[31..0]

23,30 PCI_C/BE*[3..0]

PCI1

+3.3V_DUAL

I135

+5V

23,30 PCI_C/BE*[3..0]

23,30,31 PCI_INTY*
23,30,31 PCI_INTZ*
23,30,31 PCI_INTW*
23,30,31 PCI_INTX*
23,30,31 PCI_REQ*[4..0]
23,30 PCI_GNT*[4..0]

+3.3V

23,30,31 PCI_PME*
23,30,31 PCI_FRAME*
23,30,31 PCI_TRDY*
23,30,31 PCI_STOP*
23,30,31 PCI_IRDY*
23,30,31 PCI_DEVSEL*
30,31 PCI_LOCK*
23,30,31 PCI_PERR*
30,31 PCI_SERR*
23,30
PCI_PAR
25,27,28,30,43 SMB_SDA
23
PCI_RST0*
25,27,28,30,43 SMB_SCL

A12
A13
A18
A24
A30
A35
A37
A42
A48
A56
B3
B12
B13
B15
B17
B22
B28
B34
B38
B46
B49
B57

31 PCI_REQ64D*
30,31 PCI_ACK64*
23
PCI_CLK0

PCI_C/BE*[3..0]
0
1
2
3

PCI_INTY*
PCI_INTZ*
PCI_INTW*
PCI_INTX*
PCI_REQ*[4..0]
PCI_GNT*[4..0]

PCI_REQ*0
PCI_GNT*0

V2.2
5V 32BIT

3.3VAUX
TDO
PRSNT1*
PRSNT2*
RSVD1
RSVD2
RSVD3
RSVD5
TCK
TRST*
TMS
TDI

+12V
+12V
-12V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

KEY<A50>
KEY<A51>
KEY<B50>
KEY<B51>

PCI SLOT 120PIN U

A14
B4
B9
B11
A9
B10
A11
B14
B2
A1
A3
A4

-12V

A2
B1
B5
B6
A5
A8
A10
B61
A16
B62
A59
B59
A61
B19
A62

+5V

A21
A27
A33
A39
A45
B43
B41
B36
B31
B25
B54
A53

+3.3V

A12
A13
A18
A24
A30
A35
A37
A42
A48
A56
B3
B12
B13
B15
B17
B22
B28
B34
B38
B46
B49
B57

PCI SLOT 120PIN U

Title

PCI SLOT 1/2


Size
Document Number
Custom
Date:
5

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

29

of

48

SLOT4 (FURTHEST FROM CPU)

SLOT 3
+3.3V_DUAL

PCI4

PCI3

I135
23,29 PCI_AD[31..0]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_AD25

A58
B58
A57
B56
A55
B55
A54
B53
B52
A49
B48
A47
B47
A46
B45
A44
A32
B32
A31
B30
A29
B29
A28
B27
A25
B24
A23
B23
A22
B21
A20
B20
A26

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
IDSEL

PCI_C/BE*0
PCI_C/BE*1
PCI_C/BE*2
PCI_C/BE*3

A52
B44
B33
B26

CBE0*
CBE1*
CBE2*
CBE3*

A6
B7
A7
B8

INTA*
INTB*
INTC*
INTD*

B18
A17

REQ*
GNT*

PCI_PME*
PCI_FRAME*
PCI_TRDY*
PCI_STOP*
PCI_IRDY*
PCI_DEVSEL*
PCI_LOCK*
PCI_PERR*
PCI_SERR*
PCI_PAR
SMB_SDA
PCI_RST1*
SMB_SCL

A19
A34
A36
A38
B35
B37
B39
B40
B42
A43
A41
A15
A40

PME*
FRAME*
TRDY*
STOP*
IRDY*
DEVSEL*
LOCK*
PERR*
SERR*
PAR
SBO*
RESET*
SDONE

PCI_REQ64A*
PCI_ACK64*
PCI_CLK3

A60
B60
B16

REQ64*
ACK64*
CLOCK

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
25

PCI_C/BE*[3..0]

23,29 PCI_C/BE*[3..0]

0
1
2
3

23,29,31 PCI_INTX*
23,29,31 PCI_INTY*
23,29,31 PCI_INTZ*
23,29,31 PCI_INTW*
23,29,31 PCI_REQ*[4..0]
23,29 PCI_GNT*[4..0]

I135

PCI_AD[31..0]

23,29,31 PCI_PME*
23,29,31 PCI_FRAME*
23,29,31 PCI_TRDY*
23,29,31 PCI_STOP*
23,29,31 PCI_IRDY*
23,29,31 PCI_DEVSEL*
29,31 PCI_LOCK*
23,29,31 PCI_PERR*
29,31 PCI_SERR*
23,29
PCI_PAR
25,27,28,29,43 SMB_SDA
23 PCI_RST1*
25,27,28,29,43 SMB_SCL
31 PCI_REQ64A*
29,31 PCI_ACK64*
23
PCI_CLK3

PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_INTW*
PCI_REQ*[4..0]
PCI_GNT*[4..0]

PCI_REQ*3
PCI_GNT*3

V2.2
5V 32BIT

KEY<A50>
KEY<A51>
KEY<B50>
KEY<B51>

3.3VAUX
TDO
PRSNT1*
PRSNT2*
RSVD1
RSVD2
RSVD3
RSVD5
TCK
TRST*
TMS
TDI

23,29 PCI_AD[31..0]

A14
B4
B9
B11
A9
B10
A11
B14
B2
A1
A3
A4

+12V
+12V
-12V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

+3.3V_DUAL

PCI_AD[31..0]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
24

-12V

A2
B1
B5
B6
A5
A8
A10
B61
A16
B62
A59
B59
A61
B19
A62
A21
A27
A33
A39
A45
B43
B41
B36
B31
B25
B54
A53

+5V

23,29 PCI_C/BE*[3..0]

23,29,31
23,29,31
23,29,31
23,29,31

+3.3V

A58
B58
A57
B56
A55
B55
A54
B53
B52
A49
B48
A47
B47
A46
B45
A44
A32
B32
A31
B30
A29
B29
A28
B27
A25
B24
A23
B23
A22
B21
A20
B20
A26

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
IDSEL

PCI_C/BE*0
PCI_C/BE*1
PCI_C/BE*2
PCI_C/BE*3

A52
B44
B33
B26

CBE0*
CBE1*
CBE2*
CBE3*

A6
B7
A7
B8

INTA*
INTB*
INTC*
INTD*

PCI_REQ*2 B18
PCI_GNT*2 A17

REQ*
GNT*

PCI_C/BE*[3..0]
0
1
2
3

PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*

23,29,31 PCI_REQ*[4..0]
23,29 PCI_GNT*[4..0]

A12
A13
A18
A24
A30
A35
A37
A42
A48
A56
B3
B12
B13
B15
B17
B22
B28
B34
B38
B46
B49
B57

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_AD24

23,29,31 PCI_PME*
23,29,31 PCI_FRAME*
23,29,31 PCI_TRDY*
23,29,31 PCI_STOP*
23,29,31 PCI_IRDY*
23,29,31 PCI_DEVSEL*
29,31 PCI_LOCK*
23,29,31 PCI_PERR*
29,31 PCI_SERR*
23,29
PCI_PAR
25,27,28,29,43 SMB_SDA
23 PCI_RST1*
25,27,28,29,43 SMB_SCL
31 PCI_REQ64B*
29,31 PCI_ACK64*
23
PCI_CLK2

PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_REQ*[4..0]
PCI_GNT*[4..0]
PCI_PME*
PCI_FRAME*
PCI_TRDY*
PCI_STOP*
PCI_IRDY*
PCI_DEVSEL*
PCI_LOCK*
PCI_PERR*
PCI_SERR*
PCI_PAR
SMB_SDA
PCI_RST1*
SMB_SCL

A19
A34
A36
A38
B35
B37
B39
B40
B42
A43
A41
A15
A40

PME*
FRAME*
TRDY*
STOP*
IRDY*
DEVSEL*
LOCK*
PERR*
SERR*
PAR
SBO*
RESET*
SDONE

PCI_REQ64B*
PCI_ACK64*
PCI_CLK2

A60
B60
B16

REQ64*
ACK64*
CLOCK

V2.2
5V 32BIT

KEY<A50>
KEY<A51>
KEY<B50>
KEY<B51>

PCI SLOT 120PIN U

A14
B4
B9
B11
A9
B10
A11
B14
B2
A1
A3
A4

3.3VAUX
TDO
PRSNT1*
PRSNT2*
RSVD1
RSVD2
RSVD3
RSVD5
TCK
TRST*
TMS
TDI

+12V

-12V

A2
B1

+12V
-12V

B5
B6
A5
A8
A10
B61
A16
B62
A59
B59
A61
B19
A62

+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V

A21
A27
A33
A39
A45
B43
B41
B36
B31
B25
B54
A53

+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V

+5V

+3.3V

A12
A13
A18
A24
A30
A35
A37
A42
A48
A56
B3
B12
B13
B15
B17
B22
B28
B34
B38
B46
B49
B57

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

PCI SLOT 120PIN U

Title

PCI SLOT 3/4


Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
30

of

48

+3.3V

23,29,30 PCI_REQ*[4..0]

PCI_REQ*[4..0]
RN97
PCI_REQ*0
PCI_REQ*3
PCI_REQ*1
PCI_REQ*2

1
3
5
7

2
4
6
8

PCI SLOT DECOUPLING

8.2K 8P4R
R256

PCI_REQ*4

ADD FOR EMI PLACE NEAR CT41


C360
0.1UF 25V Y5V /NI

+3.3V

+5V

8.2K
1000UF 6.3V 8X12 /NI
CT39
2
1

RN85
29,30 PCI_SERR*
23,29,30 PCI_PERR*
29,30 PCI_LOCK*
23,29,30 PCI_DEVSEL*

PCI_SERR*
PCI_PERR*
PCI_LOCK*
PCI_DEVSEL*

1
3
5
7

2
4
6
8

C437

23,29,30 PCI_FRAME*
23,29,30 PCI_IRDY*
23,29,30 PCI_TRDY*
23,29,30 PCI_STOP*

PCI_FRAME*
PCI_IRDY*
PCI_TRDY*
PCI_STOP*

7
5
3
1

29,30 PCI_ACK64*
30 PCI_REQ64A*
29 PCI_REQ64C*
30 PCI_REQ64B*

FOR 091

29 PCI_REQ64D*

23,29,30
23,29,30
23,29,30
23,29,30

PCI_INTW*
PCI_INTY*
PCI_INTX*
PCI_INTZ*

PCI_ACK64*
PCI_REQ64A*
PCI_REQ64C*
PCI_REQ64B*
PCI_REQ64D*

1
3
5
7

RN101
8
6
4
2

0.1UF 25V Y5V


C436

0.1UF 25V Y5V /NI

8.2K 8P4R
8.2K

R363

+12V

PCI_INTW*
PCI_INTY*
PCI_INTX*
PCI_INTZ*

7
5
3
1

+3.3V

RN102
8
6
4
2

C343

100UF 16V 5X11 2mm


2
1

CT3
2

C300

1
2

100UF 16V 5X11 2mm /NI


C413

470UF 16V 8X11.5

R242

PCI_CLKRUN*

0.1UF 25V Y5V /NI

C589

FOR EMI

23,29,30 PCI_PME*

0.1UF 25V Y5V /NI


C399

RN100
2
4
6
8

8.2K

+3.3V

C438

0.1UF 25V Y5V /NI

8.2K 8P4R
23 PCI_CLKRUN*

1000UF 6.3V 8X12


CT38
2
1

C389

8.2K 8P4R
C

+5V

0.1UF 25V Y5V

8.2K 8P4R

C387

0.1UF 25V Y5V


+3.3V_DUAL

0.1UF 25V Y5V /NI


C412

R326

PCI_PME*

0.1UF 25V Y5V /NI

8.2K

C373
0.1UF 25V Y5V /NI

+3.3V
22

PE3_PRSNT*

C435

PE3_PRSNT*
R205

8.2K

0.1UF 25V Y5V /NI


C390
0.1UF 25V Y5V /NI

Title

PCI TERM/DECOUPLING
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
31

of

48

JCDIN1
CD_L
CD_G

L
GND
GND
R

1
2
3
4

CD_R

WAFER 1X4 BLACK

FRONT OUT

1UF 10V Y5V

AC25

1UF 10V Y5V

AC24

PORT_D_R

33

PORT_D_L

33

STR_MIC_L

33

STR_MIC_R

33

AR13
47K

CD in connector

AUD_GND

33,37

AR5

100UF 16V 5X11 2mm

1UF 10V Y5V


1UF 16V 0805 Y5V

0.1UF 25V Y5V


1UF 16V 0805 Y5V

AC20
AC17

AC26
AC30

100UF 16V 5X11 2mm

AC14

A
AR6
4.7K

VOBR
AC22 1UF 10V Y5V
AUD_GND

33

4.7K
AR15

STR_MIC_R

33

1N4148 SMD

AUD_GND

33,37

STR_MIC_L

1N4148 SMD

VOCR

33,37

Verfout bias for backpanel microphone.


AC19
1000P 50V X7R

+
AC15

33,37

4.7K

AD3
AR16
4.7K

AD4

VCC5_AUD

AUD_GND

Verfout bias for stereo microphone.


A

VCC5_AUD

STR MIC--->FRONT PANEL


AC23 1UF 10V Y5V

AR14 AR12
47K
47K

VCC5_AUD

AR24

1M /NI

AC21
1000P 50V X7R

33

PORT_B_L

33

PORT_B_R

4.7K

AR3

4.7K

AR4

K
AD1
K
AD2

A
1N4148 SMD
A
1N4148 SMD

VOBR

VCC5_AUD

25

LINE IN
LINE1-R

24

LINE1-L

23

MIC1-R

22

MIC1-L

21

CD-R

20

MIC-IN

CD-GND

19

CD_R
AC11 1UF 10V Y5V
CD_G
AC12 1UF 10V Y5V
CD_L
AC13 1UF 10V Y5V

17

45

SurrBack-L/GPIO0

46

SurrBack-R/XTLSEL

47

SPDIFI/EAPD

48

SPDIFO

15

LINE2-L/AUX-L

14

Sense A/Phone

13

PCBEEP

16

1UF 10V Y5V

AC9

1UF 10V Y5V

C334
0.1UF 25V Y5V

33

PORT_B_R

33

PORT_B_L

33

AUD_GND

22

AC_RST_
AC_SYNC
AC_SDIN_0
AC_BITCLK

AR20

22

AC_RST*
AC_SYNC
AC_SDIN_0

25
25
25

AC_BITCLK

25

10P 50V NPO

AC_SDOUT

NEAR AC28 FOR EMI


Title

ALC655 AC97
Size
Document Number
Custom

25

Date:
4

+3.3V

AC28

AC_SDOUT

33,37

+5V

AR18
25 AC97CLK

PORT_C_L

AR19
5.6K

1UF 10V Y5V

FOR EMI

33

FOR EMI

1UF 10V Y5V

33,37 AUD_GND

PORT_C_R

Reserve to fine tune accuracy of


Jack Sensing

C593
0.1UF 25V Y5V

AC27

AC8

AC10 1UF 10V Y5V

10
AC18

1UF 10V Y5V

CODEC ALC655

AL7
AR22

AC7

12

RESET#

MIC2-L/JD2
LINE2-R/AUX-R

11

10

DVDD2
9

+3.3V

SYNC

MIC2-R/JD1

SDATA-IN

LFE

DVSS2

CD-L

44

BIT-CLK

CEN

18

SDATA-OUT

43

0 /NI

VOBR

AVDD1

27

28

29

30

31

32

26
AVSS1

VREF

MIC1-VREFO-L

LINE1-VREFO-L/AFILT1

MIC2-VREFO/AFILT2

LINE2-VREFO/JD4

33
DCVOL/VREFO2

MIC1-VREFO-R/FMIC2

AVSS2

34

35

42

DVSS1

AR21

SURR-R

SPDIFO

JDREF/NC/JD3

41

DVDD1

33

40

SURR-L

GPIO1/XTLO

AUD_GND

AVDD2

39

33,37

38

GPIO0/XTLI

AUD_GND

LINE1-VREFO-R

33,37

37

Sense B/FMIC1

AC16
0.1UF 25V Y5V

FRONT-L

FRONT-R

36

ALC 658 ONLY


AU1

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
32

of

48

CHANGE AL1~6 0 TO BEAD FOR EMI

32
33
34
35
1
AUDIO JACK 3L

LINE_IN_L

LINE_INL

AL6

BEAD 60 0805 1A

LINE_IN_R

LINE_INR

AL5

BEAD 60 0805 1A
AR9
22K

CONN_GND

AUD_GND

LINE_OUT_L

LINE_OUTL

AL4

BEAD 60 0805 1A

LINE_OUT_R

LINE_OUTR

AL1

BEAD 60 0805 1A

AC4

AR7
22K
AC1
100P 50V NPO

32

32,37

PORT_D_L

32

PORT_D_R

32
H1

AR17
22K

G1

G3

G4
AUD_GND

32,37

PORT_B_L

32

PORT_B_R

32

AUD_GND

32,37

G5

AUDIO JACK 3L

MIC-IN
JAUDIO2B

2
3
4
5
1
AUDIO JACK 3L

CONN_GND

JAUDIO2A

G2

G4

100P 50V NPO

PORT_C_R

LINE-OUT
22
23
24
25
1
AUDIO JACK 3L
CONN_GND

32

AR8
22K

AC6 AC5
100P 50V NPO 100P 50V NPO

JAUDIO2C

PORT_C_L

G1

JAUDIO2D

AL3

BEAD 60 0805 1A

PORT_B_L

AL2

BEAD 60 0805 1A

PORT_B_R

AR11
22K

AC3 AC2
100P 50V NPO 100P 50V NPO

CONN_GND

G3

LINE-IN

G2

IO_GND

AR10
22K

IO_GND

2
AR1

VCC5_AUD

FOR EMI

1
0

AUD_GND

32,37

FROM 0 TO 0.1U FOR EMI


IO_GND

32
32

STR_MIC_L
STR_MIC_R
LINE_OUTR

STR_MIC_L
STR_MIC_R

LINE_OUTL
LINE_INR
LINE_INL

AUDIO ANALOG POWER

1
3
5
7
9
11
13

JAUDIO1
2
4
6
10
12
14

FOR EMI
AUD_GND

32,37

LINE_OUT_R

2
AR2

1
AUD_GND
1UF 16V 0805 Y5V

LINE_OUT_L
LINE_IN_R
LINE_IN_L

2
AR23

1
0.1UF 25V Y5V

32,37

FROM 0 TO 0.1U FOR EMI

HEADER 2X7 N8
AU2
78L05 TO-92
+12V
I
G
O

VCC5_AUD

AC31
1

ACT1
100UF 16V 5X11 2mm /NI

AC29
0.1UF 25V Y5V

FOR EMI

1
2

0.1UF 25V Y5V

AUD_GND

32,37

+5V
BEAD 60 0805 1A
2
1
AL8

AC32
1UF 16V 0805 Y5V

JSPDIF_OUT1
1
2
3

SPDIFO

32
A

WAFER 1X3 BLACK

Title

AUDIO PORT
Size
Document Number
Custom
Date:
5

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

33

of

48

8716 ->R6 680

KBC'S ROM:1/BUILT IN,0/EXT.


+5V

38
38
R246
38
4.7K
38
38
38
38
38

R251
4.7K /NI

38

DTRJ0

ADD TO V1.1

GP35: To generate an
event for the function
THERMAL SHUTDOWN

DCDJ1
RIJ1
CTSJ1

BAV99 SOT23

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38

DTRJ1
RTSJ1
DSRJ1
+5V
TXD1
RXDJ1
FAN1
FAN_CTL1
FAN2
FAN_CTL2
FAN3

38
38
35
35
35
35
35

25 CHIP_THERM_

To CK8-04

43 OV_CHIPCORE1
43 OV_CHIPCORE0
43
OV_LDTV1
OV_LDTV0
+3.3V 43
42
LED_1
42
LED_0
R301
51K

+5V

LPC_PD#
LPCRST_SIO*
LPC_DRQ0*

23 LPCRST_SIO*
23
LPC_DRQ0*

680

FAN2

38
38
38

51K P/U is
necessaried
on IX version
LPC I/O

R437

128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103

FAN1

PDR7
PDR6
PDR5
PDR4
PDR3
PDR2
PDR1
PDR0

DCDJ0
RIJ0
CTSJ0
DTRJ0
RTSJ0
DSRJ0
TXD0
RXDJ0

38
38
38

BAV99 SOT23

FAN3

PROTECTION

Q74
KA

Q73
KA

KA

Q75
BAV99 SOT23

OV

+5V
A

+5V
A

+5V

R6

DTR2#
RTS2#
DSR2#
VCC
SOUT2
SIN2
FAN_TAC1
FAN_CTL1
FAN_TAC2/GP52
FAN_CTL2/GP51
FAN_TAC3/GP37
FAN_CTL3/GP36
WTI#/GP35
VID4/GP34
GNDD
VID3/GP33
VID2/GP32
VID1/GP31
VID0/GP30
JSBB2/GP27
JSBB1/GP26
JSBCY/GP25
JSBCX/GP24
JSAB2/GP23
JSAB1/GP22
JSACY/GP21
JSACX/GP20
MIDI_OUT/GP17
MIDI_IN/GP16
CIRTX/GP15 [PU51K]
SCRRST/GP14
SCRFET#/GP13
SCRIO/GP12
SCRCLK/GP11
VCC
LPCPD#
LRESET#
LDRQ#

R322

23 LPC_SERIRQ
23,37 LPC_FRAME*
23,37
23,37
23,37
23,37
25
25
23

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SIO_KBRST*
A20GATE
PCI_CLKSIO

25 BUF_SIO_CLK

LPC_SERIRQ

R10

IRRX

HEADER 2X3 N_P4 /NI

VREF

R7
R293

8716 -->R7
8712 -->R7

35

30K/NI
30K

From CPU

30K 1% /NI

CPU_THERMDA 8
CPU_THERMDC 8

Routed by differential
L12
BEAD 60 0805 1A

GP55: To provide BIOS


Write Protection
Function (Boot Block
Lock).

2200P
3900P

FWH_TBL*

37

To POWER LED
circuit
ACPI_LED

42

GP54: To generate an
event for the function
SLEEP BUTTON, POWER
ON BY
KB/MOUSE,RING-IN

R2

8712:-->R2
8716:-->R2

C394
0.1UF 25V Y5V

IO_PME*

0
10

25

To Power Supplier
PS_ON*

FDSKCHGFWP37
FINDEX37
FTRAK037
FRDATA37
FWEN37
FHEAD37
FSTEP37
FDIR37
FWD37
FDSB37
FDSA37
FMOB37
FMOA37
FRWC37

10K 1%

R325

37

42

R303

33

R302

33

PWRBTN*

42

To SB
PWBTOUT-

25

From SB
SLP_S3*

25,45

+5V_STBY

56K /NI

8716 R9-->10K R10-->0 R11-->56K/NI


8712 R9-->10K/NI R10-->10K R11-->56K

R11

Title
SMB_ALLERT_

R299

super I / O

4.7K

4.7K 8P4R

Size
Document Number
Custom
Date:

5
6

From Power Button

R439 0
LPC_CLKRUN#

FOR 3.3V OUTPUT

+3.3V
+5V_STBY

IRTX

R438 0

+3.3V

R324
56K /NI

1
2
3

8712: R1-->0 0805 C1--> 1UF/NI


8716: R1-->BEAD 60 0805 1A C1-->1UF

+5V_STBY
10

R440

LPC_PD#
LPC_DRQ0*
LPC_CLKRUN#
ACPI_LED

JIR1
C361
0.1UF 25V Y5V

JCI2
HEADER 1X2 /NI

R9

2
4
6
8

10K 1% /NI

R3
R4

8.2K

BUF_SIO_CLK

RN92

R436

IT8716FCX

CT45
100UF 16V 5X11 2mm

+5V
VIN7

35

+5V_STBY

10K 1% /NI

102
C1
BEAD 60 0805 1A
101
L13
100
C2
R1
99
+5V
C384
VIN0
98
VIN0
35
R297
VIN1
97
VIN1
35
VIN2
96
VIN2
35
0
VIN3
95
VIN3
35
VIN4
94
VIN4
35
3900P 50V X7R
VIN5
93
VIN5
35
VIN6
92
VIN6
35
VIN7
91
VIN7
35
VREF
90
89
8716 -->C2
88
8712 -->C2
87
86
85
+5V_STBY
SMB_ALLERT_
84
+3.3V_STBY
83
MCLK
37
82
MDAT
37
81
KCLK
37
80
KDAT
37
R304
R305
R300
79
4.7K
4.7K
10K
78
77
76
IO_PWIN
75
74
IO_PME*
73
IO_POUT
72
71
IRRX
70
+5V_STBY
R306
4.7K /NI
69
68 R308
1M
67
IRTX
66
VBAT
25,42,43
65

R433

R435

C366
1UF 10V Y5V

LPC_FRAME*
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SIO_KBRST*
A20GATE
PCI_CLKSIO

VIN3

C392
0.1UF 25V Y5V

24 MHz

1
3
5
7

38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38

1UF 10V Y5V


C592

39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

+3.3V

GNDA
GNDA

PDR7
PDR6
PDR5
PDR4
PDR3
PDR2
PDR1
PDR0
STROBEJ
ALFJ
ERRORJ
PARINITJ
SLCTINJ
ACKJ
BUSY
PE
SLCTJ

U13

BUSY
PE
SLCT
VCC
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
VREF
TMPIN1
TMPIN2
TMPIN3
GNDA
[5VSB PWR WELL] CIRRX/GP55
[5VSB PWR WELL] SCRPRES#/GP10
[5VSB PWR WELL] MCLK
[5VSB PWR WELL] MDAT
[5VSB PWR WELL] KCLK
[5VSB PWR WELL] KDAT
[5VSB PWR WELL] SCLK/GP40
[5VSB PWR WELL] SDAT/GP41
[5VSB PWR WELL] RING#/GP53
[5VSB PWR WELL] PSON#/GP42
[5VSB PWR WELL] PANSWH#/GP43
GNDD
[5VSB PWR WELL] PME#/GP54
[5VSB PWR WELL] PWRON#GP44
[5VSB PWR WELL] PSIN/GP45
[5VSB PWR WELL] IRRX/GP46
VBAT
[VBAT/5VSB PWR WELL] ] COPEN#
VCCH
IRTX/GP47
DSKCHG#

NO USE FUNCTION ADD R4R5-->10K

CTS2#
RI2#
DCD2#
SIN1
SOUT1
DSR1#
RTS1#
DTR1#
CTS1#
RI1#
DCD1#
GNDD
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
STB#
AFD#
ERR#
INIT#
SLIN#
ACK#

RTSJ0

R8 -> 4.7K

SERIRQ
LFRAME
LAD0
LAD1
LAD2
LAD3
KRST#
GA20
PCICLK
CLKRUN#/GP50
CLKIN
GNDD
DENSEL#
MTRA#
MTRB#
DRVA#
DRVB#
WDATA#
DIR#
STEP#
HDSEL#
WGATE#
RDATA#
TRK0#
INDEX#
WPT#

38

R8 -> 4.7K /NI

8712 ->R6 680/NI

+5V

R8

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

34

of

48

R434

100

+12V

+5V

+5V

R35
1K /NI

Q67
BCP69 SOT-223 /NI

11
+

FAN_CTL2

R278

10K 1%

10K 1%
34
34
34
34
34
34
34
34

VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7

R273

R282

R292

10K 1% 6.8K

30K 1%

100 1%

R272

Q53
B

2
1

Q60

FAN2

C440

34

22UF 25V 5X11 2mm /NI

U1B

56K /NI

10K 1%
R294
56K /NI
A

FOR 091
C

JSFAN2

SS12/5817 SMA /NI

C357

2
1

C362

C363

C358

C364

0.1UF 25V Y5V

C369
D-

0.1UF 25V Y5V

0.1UF 25V Y5V


0.1UF 25V Y5V
0.1UF 25V Y5V
0.1UF 25V Y5V

R355
22K /NI

D10

R291
R289

VREF

WAFER 1X3 /NI

7
CT33
22UF 25V 5X11 2mm /NI

A K

CT40

R281

+12V

6.8K

470P 50V X7R


2N2907 SOT23 /NI

R254

R271
10K /NI

34

WAFER 1X3

2N2907 SOT23 /NI

15K /NI

R364
0 0805

1K

10K 1%

R360

22K
R356

R26
22K /NI

36K 1% /NI

R295
R286
10K 1%

10K 1%

4
34

+1.8V_SUS +1.2V_HT+5V_STBY

+12V

R354
R359
1K /NI

470 /NI
R283

+3.3V +5V

R253

34

+12V

JSFAN1

R290
4.7K /NI

FAN3

CT31
22UF 25V 5X11 2mm /NI
+5V

+12V

+5V
R27

+1.5V

470P 50V X7R

100UF 16V 5X11 2mm

1
3

CT2
22UF 25V 5X11 2mm /NI

+V_CPU

+5V

C237

D8
SS12/5817 SMA /NI WAFER 1X3

LM324 SO14

34

CT1
U1A

FAN1
22K

470P 50V X7R


R365
1K

Q1
2SB1202 TO252 /NI
A K

15K /NI

R366

JNFAN1
CC

R38

FAN_CTL1

1K

C15

BB

Voltage Sensing

JCFAN1
R22
WAFER 1X4 2.54MM
22K
R21
3

2
R37
470 /NI

34

R43
4.7K

R367
0 0805

A
LM324 SO14

linear FAN

R353

36K 1% /NI

hardware monitor

Temperature Sensing

J2
NC3

1
2

J1
NC4

CP1
CP2

+5V

HEADER 1X2 D 150 /NI

1
2

CP1
CP2

HEADER 1X2 D 150 /NI

TESTCOUPON1
7 mils comp
5 mils comp

7 mils solder
5 mils solder

GNDA
GNDA

CP1
CP2
CP3
CP4
CP5
CP6
CP7
CP8
CP9

GNDA

34

CP10

A
ATXCUT /NI
A

+5V

Title

COM PORT
Size
Document Number
Custom
Date:
5

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

35

of

48

24 IDE_SDD[15..0]
24 IDE_PDD[15..0]

IDE_SDD[15..0]
IDE_PDD[15..0]
IDE1

R309
+3.3V

+3.3V

IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0

IDE_PDD7

10K

EMPTY
R315

R310
8.2K /NI
23 PCIRST_IDE*
24
24
24
24
24
24
24
24
24
42

IDE_DREQ_P
IDE_IOW_P*
IDE_IOR_P*
IDE_IORDY_P
IDE_DACK_P*
IDE_INTR_P
IDE_ADDR_P1
IDE_ADDR_P0
IDE_CS1_P*
P_HDLED*

24

IDE_CS3_P*

24 IDE_ADDR_P2

4.7K

PCIRST_IDE*
IDE_DREQ_P
IDE_IOW_P*
IDE_IOR_P*
IDE_IORDY_P
IDE_DACK_P*
IDE_INTR_P
IDE_ADDR_P1
IDE_ADDR_P0
IDE_CS1_P*
P_HDLED*

R313

R314

5.6K

10K

3
5
7
9
11
13
15
17
1

DD7
DD6
DD5
DD4
DD3
DD2
DD1
DD0
RESET*

21
23
25
27
29
31
33
35
37
39

DMARQ
DIOW*
DIOR*
IORDY
DMACK*
INTRQ
DA1
DA0
CS0*
DASP*

32

NC

DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

4
6
8
10
12
14
16
18

CSEL

28

PDIAG*
DA2
CS1*

34
36
38

GND
GND
GND
GND
GND
GND
GND

2
19
22
24
26
30
40

IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

CBLE_DET_P

CBLE_DET_P

24

R311
15K

BOX 2X20 N20 B


C

IDE_CS3_P*
IDE_ADDR_P2

IDE2
R316

PCIRST_IDE*

DD7
DD6
DD5
DD4
DD3
DD2
DD1
DD0
RESET*

IDE_DREQ_S
IDE_IOW_S*
IDE_IOR_S*
IDE_IORDY_S
IDE_DACK_S*
IDE_INTR_S
IDE_ADDR_S1
IDE_ADDR_S0
IDE_CS1_S*
S_HDLED*

21
23
25
27
29
31
33
35
37
39

DMARQ
DIOW*
DIOR*
IORDY
DMACK*
INTRQ
DA1
DA0
CS0*
DASP*

+3.3V
R312

24
24
24
24
24
24
24
24
24
42

24

IDE_DREQ_S
IDE_IOW_S*
IDE_IOR_S*
IDE_IORDY_S
IDE_DACK_S*
IDE_INTR_S
IDE_ADDR_S1
IDE_ADDR_S0
IDE_CS1_S*
S_HDLED*

IDE_CS3_S*

24 IDE_ADDR_S2

10K

EMPTY
R319
8.2K /NI

4.7K
23 PCIRST_IDE*

IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0

IDE_SDD7

3
5
7
9
11
13
15
17
1

+3.3V

R317

R320

5.6K

10K

32

NC

DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

4
6
8
10
12
14
16
18

CSEL

28

PDIAG*
DA2
CS1*

34
36
38

GND
GND
GND
GND
GND
GND
GND

IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

CBLE_DET_S

CBLE_DET_S

24

R318

2
19
22
24
26
30
40

15K

BOX 2X20 N20 Y

IDE_CS3_S*
IDE_ADDR_S2

Title

IDE ATA 133


Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
36

of

48

+5V

3
2

+5V
FS1

FDD

PS2 KB & MS

JKBMSV1
HEADER 1X3
R7
2

0 0805 /NI
1
POLY FUSE 1.1A
C6
0.1UF 25V Y5V

7
5
3
1

150 8P4R

150

FRWC-

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34

KDAT

FINDEXFMOAFDSBFDSAFMOBFDIRFSTEPFWDFWENFTRAK0FWPFRDATAFHEADFDSKCHG-

FRWC-

34

FINDEXFMOAFDSBFDSAFMOBFDIRFSTEPFWDFWENFTRAK0FWPFRDATAFHEADFDSKCHG-

34
34
34
34
34
34
34
34
34
34
34
34
34
34

L_KDAT

BEAD 60 0805 1A

IO_GND

8
6
4
2

BOX 2X17 N5 W
FDD1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33

34

JKBMS1

RN1
2.2K 8P4R
R14

RN93
7
5
3
1

R323

+5V_STBY

8
6
4
2

PS/2 Kybd

3
4
R15
34

L_KCLK

KCLK

BEAD 60 0805 1A

R23
34

L_MDAT

MDAT

BEAD 60 0805 1A

8
9

G1
PS/2 Mse
G2

10

G3

11

G4

12

G5

R28
34

L_MCLK

MCLK

BEAD 60 0805 1A
C21

C16

C5

C13

MINI DIN CONN PC99


C22
0.1UF 25V Y5V

47P 50V NPO

100P --> 47P

for EMI V1.1


47P 50V NPO
IO_GND

REF1
PAD200-8 /NI
1
2
3
4

REF7
PAD200-8 /NI
1
2
3
4

8
7
6
5

REF5
PAD200-8 /NI
1
2
3
4

+3.3V
ROM1
LPC_AD[3..0]

23,34 LPC_AD[3..0]

8
7
6
5

23,34 LPC_FRAME*
23 PCI_CLKLPC

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

13
14
15
17

LAD0
LAD1
LAD2
LAD3

LPC_FRAME*

23

FRAME*

PCI_CLKLPC

31

LCLK

LPCRST_FLASH*

RESET*

NC
NC
NC
NC
INIT*

REF6
PAD200-8 /NI
1
2
3
4

8
7
6
5

+3.3V
34

R330

4.7K
FWH_WP*

WP*

R298

FWH_TBL*
4.7K

TBL*

29
28
16

FWH_TBL*

MODE
GND
GND

8
7
6
5

8
7
6
5

1
22
26
27

R327
4.7K
5%

24

UNNAMED_38_FLASH4MBIT_I115_INIT

RES
RES
RES
RES

18
19
20
21

VDD
VDD

25
32

GPI0
GPI1
GPI2
GPI3
GPI4

6
5
4
3
30

ID0
ID1
ID2
ID3

12
11
10
9

+3.3V

C417
0.1UF 25V Y5V /NI

PLCC SOCKET 32PIN


+3.3V
A

RN98
9

REF3
PAD200-8 /NI
1
2
3
4

4MB FLASH
0
1
2
3

23 LPCRST_FLASH*
REF2
PAD200-8 /NI
1
2
3
4

0.1UF 25V Y5V

FLASH BIOS
8
7
6
5

8
7
6
5

REF4
PAD200-8 /NI
1
2
3
4

R1

47P 50V NPO


47P 50V NPO

AUD_GND

32,33
LPC_AD[3..0]

23,34 LPC_AD[3..0]

LPC_AD1
LPC_AD2
LPC_AD3
LPC_AD0

1
3
5
7

2
4
6
8
Title

8.2K 8P4R

FDD , KB & MS , BIOS


Size
Document Number
Custom

Rev
1.2

NF4ST-A2B

Date:
5

Friday, September 01, 2006

Sheet
1

37

of

48

+5V

-12V

+5V

+12V

ADD FOR EMI PLACE NEAR C450


C410
0.1UF 25V Y5V /NI
CN2

U4
20

34

DCDJ0

34

RIJ0

34

CTSJ0

34

DTRJ0

34

RTSJ0

34

DSRJ0

34

TXD0

34

RXDJ0

VCC12

VCC

0.01UF 50V X7R /NI

DCDJ0

19

RY0

RA0

DCDJ0_C

RIJ0

18

RY1

RA1

RIJ0_C

CTSJ0

17

RY2

RA2

CTSJ0_C

DTRJ0

16

DA0

DY0

DTRJ0_C

RTSJ0

15

DA1

DY1

RTSJ0_C

DSRJ0

14

RY3

RA3

DSRJ0_C

TXD0

13

DY2

TXDJ0_C

RXDJ0

12

RY4

RA4

RXDJ0_C

11

GND

VCC-12

DA2

C339

RTSJ0_C
DSRJ0_C
TXDJ0_C
RXDJ0_C

JCOM1
G1
DCDJ0_C
DSRJ0_C
RXDJ0_C
RTSJ0_C
TXDJ0_C
CTSJ0_C
DTRJ0_C
RIJ0_C

2
4
6
8

CN4
TXDJ1_C
CTSJ1_C
DTRJ1_C
RIJ1_C

1
3
5
7

2
4
6
8

100P 8P4C /NI

1
6
2
7
3
8
4
9
5

100P 8P4C /NI

CN1
DCDJ0_C
RIJ0_C
CTSJ0_C
DTRJ0_C

2
4
6
8

1
3
5
7

CN3
RTSJ1_C
RXDJ1_C
DSRJ1_C
DCDJ1_C

1
3
5
7

8
6
4
2

100P 8P4C /NI

G2

7
5
3
1

100P 8P4C /NI


IO_GND

IO_GND

D CONN 9PIN PC99

10

IO_GND

ST75185CTR TSSOP
+3.3V_STBY
+12V
R108
10K

U7

34

RXDJ1

34

RTSJ1

34

TXD1

34

CTSJ1

34

DTRJ1

34

RIJ1

19

RY0

RA0

DSRJ1

18

RY1

RA1

DSRJ1_C

RXDJ1

17

RY2

RA2

RXDJ1_C

RTSJ1

16

DA0

DY0

RTSJ1_C

TXD1

15

DY1

TXDJ1_C

DA1

CTSJ1

14

RY3

RA3

CTSJ1_C

DTRJ1

13

DA2

DY2

DTRJ1_C

RIJ1

12

RY4

RA4

RIJ1_C

11

GND

VCC-12

C40

SER_RI*
C

DSRJ1

DCDJ1_C
JCOM2
G1

Q14

DCDJ1_C
DSRJ1_C
RXDJ1_C
RTSJ1_C
TXDJ1_C
CTSJ1_C
DTRJ1_C
RIJ1_C

1
6
2
7
3
8
4
9
5

RN43

SER_RI*

25

B
Q12
2N3904 SOT23

DCDJ1

0.1UF 25V Y5V /NI

2
4
6
8

34
34

VCC12

VCC

10K 8P4R
RIJ0_C

1
3
5
7

20
DCDJ1

-12V

+5V

2N3904 SOT23
RIJ1_C

G2
10

D CONN 9PIN PC99 /NI


IO_GND

ST75185CTR TSSOP /NI

34
34
34
34

SLCTINJ
PDR4
PDR5
PDR6

SLCTINJ
PDR4
PDR5
PDR6

1
3
5
7

2
4
6
8

C72
C83
C85
C94
C100
C102
C110
C117
C125
C121
C127
C136
C137
C133
C139
C146
C145

-SLIN
P_PRD4
P_PRD5
P_PRD6

100P 50V NPO


100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO

34

ERRORJ

RN29
2.2K 8P4R

2
4
6
8

RN23
2.2K 8P4R

2
4
6
8

C80
0.1UF 25V Y5V
FOR EMI

-INIT
P_PRD7
P_PRD2
P_PRD3

RN24
22 8P4R
SLCTJ
PE
BUSY
ACKJ
P_PRD7
P_PRD6
P_PRD5
P_PRD4
P_PRD3
-SLIN
P_PRD2
-INIT
P_PRD1
ERRORJ
P_PRD0
AFD
-STB

RN16
2.2K 8P4R

8
6
4
2

1
3
5
7

RN30
22 8P4R
2
4
6
8

D2
1N4148 SMD

2
4
6
8

RN38
22 8P4R
AFD
2
-STB
4
P_PRD0
6
8 P_PRD1

R62
2.2K

RN37
2.2K 8P4R

-STB
AFD
P_PRD0
ERRORJ
P_PRD1
-INIT
P_PRD2
-SLIN
P_PRD3

P_PRD6

BUSY

34

PE

34

SLCTJ

0 0805

1
3
5
7
9
11
13
15
17
19
21
23
25

2
4
6
8
10
12
14
16
18
20
22
24

IO_GND
R176
0.1UF 25V Y5V

AFD
ERRORJ
-INIT
-SLIN

IO_GND
R109

0.1UF 25V Y5V


IO_GND

HEADER 2X13 N26

P_PRD7

34

R56
JPRNT1
-STB
P_PRD0
P_PRD1
P_PRD2
P_PRD3
P_PRD4
P_PRD5
P_PRD6
P_PRD7
ACKJ
BUSY
PE
SLCTJ

P_PRD5

ACKJ

0 0805 /NI FOR EMI


IO_GND

P_PRD4

34

R30

1
3
5
7

PARINITJ
PDR7
PDR2
PDR3

1
3
5
7

1
3
5
7

PARINITJ
PDR7
PDR2
PDR3

ALFJ
STROBEJ
PDR0
PDR1

7
5
3
1

34
34
34
34

ALFJ
STROBEJ
PDR0
PDR1

1
3
5
7

34
34
34
34

K A

+5V

ACKJ
A

BUSY
PE
SLCTJ

FOR EMI
Title
IO_GND

COM CONNECTOR
Size
Document Number
Custom
Date:

NF4ST-A2B
Friday, September 01, 2006
Sheet
1

Rev
1.2
38

of

48

PLACE NEAR CONN


EMI CAPS

R126

USB5V_1394_LAN

USB_BKPNL_5_4_OC*

5.1K

USB_BKPNL_5_4_OC* 25

R127
10K

PWR SHOULD BE 75MIL MIN

BACK PANEL USB


PLACE NEAR CONN

JUSBLAN1A

RN76
25
25
25
25

USB_4*
USB_4
USB_5*
USB_5

USB_4*
USB_4
USB_5*
USB_5

7
5
3
1

USB_4_FB*
USB_4_FB
USB_5_FB*
USB_5_FB

8
6
4
2

VCC0

B2

DATA0-

B3

DATA0+

B4

GND0

A1

10 8P4R

B1

A2
C215
10P 50V NPO /NI

C207
10P 50V NPO /NI

C213
10P 50V NPO /NI
C206
10P 50V NPO /NI

GND2

G3

GND3

G4

GND4

G5

GND5

G6

VCC1
DATA1-

A3

DATA1+

A4

GND1

IO_GND

RJ45USBA CONN

+5V

+5V_STBY
1

3
2

FOR 091

R133
B

PLACE NEAR CONN

0 0805 /NI

JUSBV1
HEADER 1X3

FS2
POLY FUSE 1.1A

BACK PANEL USB


R128

USB5V_1394_LAN
C179

5.1K
C176
100UF 16V 5X11 2mm

C183

USB_BKPNL_3_2_OC*

USB_BKPNL_3_2_OC* 25

R132
10K

0.1UF 25V Y5V


FOR EMI

25
25
25
25

USB_2
USB_2*
USB_3*
USB_3

USB_2
USB_2*
USB_3*
USB_3

7
5
3
1

RN54
10 8P4R
8
6
4
2

USB_D2++
USB_D2-USB_D3-USB_D3++

IO_GND
IO_GND
470P 50V X7R /NI
JUSB1
G3
1
USB_D3-2
USB_D3++
3
4
G4

G1
5
6
7
8
G2

USB_D2-USB_D2++

USB CONN
C166
10P 50V NPO /NI
A

C159
10P 50V NPO /NI

IO_GND

C163
10P 50V NPO /NI
C157
10P 50V NPO /NI

Title

REAL PANEL USB CONN


Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
39

of

48

RECOVERY HEADER

+3.3V

JUMPER 1-2

NORMAL

JUMPER REMOVED

25 FLASH_RECOVERY*

R252
1K /NI

RECOVERY

FLASH_RECOVERY*

R248
10K
R341

PWRGD_PS

42,45 PWRGD_PS

CK8_PWRGD

5.1K
R340
10K

CK8_PWRGD 25

EMPTY
C427
0.1UF 25V Y5V /NI

+5V_STBY

+3.3V_DUAL
+5V_STBY

R425
10K

R426
10K
0

MEM_VLD

C587
0.1UF 25V Y5V /NI

+5V_STBY

PWRGD_Q1

PWRGD_SB

21,25

EMPTY
C429
0.1UF 25V Y5V /NI

Q43
2N3904 SOT23

30K
C588
0.1UF 25V Y5V

C428

2N3904 SOT23
B

15K

Q42

R344
B

2N3904 SOT23
R428

PWRGD_SB
C

Q69

R345
1K

R343
22K

21

Q68
2N3904 SOT23

R427

+1.8V_SUS

+3.3V_STBY

POWER SEQUENCING

UNNAMED_38_MOSFETNSOT23_I146_G

10UF 10V 0805 Y5V


B

+5V_STBY

+3.3V_DUAL

R342
10K

R331
10K

Q39
2N3904 SOT23

+1.2V_HT

HT_VLD

HT_VLD

21

EMPTY
C422
0.1UF 25V Y5V /NI

Q40

HT_BASE

R332

2N3904 SOT23

C424
6.34K 1%C423
0.1UF 25V Y5V0.1UF 25V Y5V
0.1UF 25V Y5V
C425
A

Title

POWER SEQUENCING
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
40

of

48

FOR EMI

C619 22P 50V NPO


1
3
5
7
1
3
5
7

RN126
22 8P4R
RN127
22 8P4R

2
4
6
8
2
4
6
8

RGMII_RXD3 25
RGMII_RXD2 25
RGMII_RXCLK 25
RGMII_RXD1 25
RGMII_RXD0 25
RGMII_RXCTL 25
VDD_LAN_2.5V_A

VDD_LAN_2.5V_A

R464
1K
0 /NI
1

R478
2

Pin
CONFIG[0]
CONFIG[1]
CONFIG[2]
CONFIG[3]
CONFIG[4]

116_DVDD-A

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

R477
2

Hardware Configuration: See config _0:4


1. PHY address:00001
2. ENA_XC:Enable Auto-Crossover
3. RGMII_TX:Transmit clock not internally delayed
4. RGMII_RX:Receive clock transition when data transitions
5. Advertise all capabilities

VER:1.0
25 RGMII_TXD0
25 RGMII_TXD1
25 RGMII_TXCLK
25 RGMII_TXD2
25 RGMII_TXD3
25 RGMII_TXCTL

U9

R465
1K
1

CONFIG_0
TX_CTRL
TXD_3
TXD_2
TX_CLK
TXD_1
TXD_0
VREF
VDDOR
RXD_3
RXD_2
RX_CLK
VDDOR
RXD_1
RXD_0
RX_CTRL

Bit1
PHY Add[1]
PHY Add[3]
ENA_XC
RGMII_TX
ANEG[1]

Bit0
PHY Add[0]
PHY Add[2]
PHY Add[4]
RGMII_RX
ANEG[0]

Setting
Default:
Default:
Default:
Default:
Default:

00
00
10
00
11

+1.8V_1116_A

SET VREF=1/2 VDDOR


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

LED-100-A

LED-1000-A
LED-100-A
LED-LINK-A
25 RGMII_RESET*

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

RGMII_MDC

25

RGMII_MDIO

25

R441

RGMII_MDIO

VER:1.0
C596
C595
C597
0.1UF 25V Y5V
0.1UF 25V Y5V
0.1UF 25V Y5V

1.5K

+3.3V_STBY

R466

CLKOUT
CLKIN

RGMII_25MHZ 25

0 /NI
VDD_LAN_2.5V_A

O/P 1.2V

PHY_RSET1

116_DVDD-A
R443
2K 1%

R1

R1=2K ohm for E3016(10/100)


R1=4.99K ohm for E1116(1000)

MV3016QFN

C599
C601
C598
C600
0.1UF 25V Y5V
0.1UF 25V Y5V
0.1UF 25V Y5V
0.1UF 25V Y5V

C603
C605
C607
C602
C604
C606
C608
0.1UF 25V Y5V
0.1UF 25V Y5V 0.1UF 25V Y5V
0.1UF 25V Y5V
0.1UF 25V Y5V
0.1UF 25V Y5V
0.1UF 25V Y5V

65

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

R442
4.7K

EPAD

CTRL18
NC
MDI_N_3
MDI_P_3
AVDD
AVDD
MDI_N_2
MDI_P_2
MDI_N_1
MDI_P_1
AVDD
AVDD
AVDD
MDI_N_0
MDI_P_0
TSTPT

88E1116-64 QFN
88E3016-64 QFN

MDC
DVDD
VDDO
MDIO
TDO
TDI
TCK
TMS
DVDD
XTAL_2
XTAL_1
AVDDC
HSDAC_P
HSDAC_N
AVDDC
RSET

CONFIG_1
CONFIG_2
CONFIG_3
COMAn
DVDD
LED_0
VDDO
LED_1
LED_2
RESETn
TRSTn
DIS_REG12
DVDD
AVDDR
AVDDR
AVDDX

+1.8V_1116_A
1116_CTRL_18-A
GBIT_MDI0A+
GBIT_MDI0AGBIT_MDI1A+
GBIT_MDI1AGBIT_MDI2A+
GBIT_MDI2AGBIT_MDI3A+
GBIT_MDI3A1

+3.3V_STBY
1

PHY_NC1
2
4.7K

1
R444

Pin 18 pull down with


4.7K for E3016

JUSBLAN1B
R475
49.9 1%

GBIT_MDI0A+

C620
C622
C624
C626
0.01UF 50V X7R
0.01UF 50V X7R
0.01UF 50V X7R
0.01UF 50V X7R
C621
C623
C625
C627
1000P 50V X7R
1000P 50V X7R
1000P 50V X7R
1000P 50V X7R

X4
25MHZ 20PF 30PPM
CLKIN

+1.8V_1116_A

CLKOUT

TX-/0-

RX+/1+

GBIT_MDI1A-

NC/2+

GBIT_MDI2A+

NC/2-

GBIT_MDI2A-

RX-/1-

GBIT_MDI3A+

GBIT_MDI3ABEAD 60 0805 1A
L14
1
2

VDD_LAN_2.5V_A VDD_LAN_2.5V_A

+1.8V_1116_A

C610
22P 50V NPO

C628
C629
1000P 50V X7R 1000P 50V X7R

C630
1000P 50V X7R
VDD_LAN_2.5V_A

+1.8V_1116_A

FB1
FB1

FOR EMI

+3.3V_STBY

Q2

D15
1N4148 SMD /NI
A K R4730 0805
1
2

CO-LAY

CT49
100UF 16V 5X11 2mm

CT46
100UF 16V 5X11 2mm

C632
0.1UF 25V Y5V

LED-LINK-A

YLED+

14

LED-100-A

YLED-

13

GND
GND
GND
GND

G1
G2
G7
G8

NC/3-

2 LED-1000-A

100
R472

IO_GND

RJ45USBA CONN
C631

0.1UF 25V Y5V

C1

0.1UF 25V Y5V

IO_GND

C612
0.1UF 25V Y5V

Q1

ADD R302
VER:1.0

Q77
BCP69 SOT-223

11

FOR 3016
1116

E1116 use external 2.5V single


power supply.
1.8V create by PNP and 1.2V use
internal reg.

R1 --> 0 C1-->0.1UF
R1--> 0 /NI
C1-->0

1116_CTRL_18-A

R447 4.7K
1
2

VDD_LAN_2.5V_A

GLED-

V_DAC
GNDP

R479 0
C611

Put FB1 for E3016


application

12

NC/3+

1
10

R446
330

GLED+

BEAD 60 0805 1A

FIX G-LAN FAIL

Q76
2SB1202 TO252 /NI

R1

R445
330

TX+/0+

GBIT_MDI1A+

CRYSTAL
C609
22P 50V NPO

GBIT_MDI0A2

R474
49.9 1%
2

R125
49.9 1%
2

R471
49.9 1%
2

R470
49.9 1%
2

R467
R468
R469
49.9 1%
49.9 1%
49.9 1%

CT47
100UF 16V 5X11 2mm

NEW ADD 100UF 2006/08/01

Q1, Q2 Co-Layout
Title

NEW ADD 0.1UF 2006/08/01

Marvell GIGA LAN PHY


Size
Document Number
Custom
Date:

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

41

of

48

+3.3V

+5V_STBY
+5V-5V-12V +3.3V

JATXPWR1

R24
10K

34

+3.3V +5V

PS_ON*
C25

1000P 50V X7R

13

3.3V

14
15
16

PSON

17

GND

18
19
20
21

+3.3V_STBY

+5V_STBY +12V
Q41

3.3V

-12V

3.3V

GND

GND

CT34
1000UF 6.3V 8X12

C421
1UF 10V Y5V

1K
BAT54C SOT23
BAT1
BATTERY HOLDER-1

5V

4
5

GND

5V

GND

GND

NC

POK

5V

5VSB

22

5V

12V

10

23

5V

12V

11

GND

DET

12

VBAT
C419
0.1UF 25V Y5V /NI
C420
1UF 10V Y5V

R183

+5V_STBY

GND

24

PWRGD_PS

PWRGD_PS

PWRSW1
3

L1

L2

PWRBTN*

+5V

SPEAKER

C393

C23
C370

1000P 50V X7R

0.1UF 25V Y5V


0.1UF 25V Y5V

SPKR

R250

SPEAKER

C187

R414

330 /NI

R415

300 /NI

C365
0.1UF 25V Y5V /NI

0.1UF 25V Y5V

RSTSW2

+5V

25

C371
C590

TP6151L /NI

+3.3V

R255
0 /NI

40,45

C27
470P 50V X7R /NI

+3.3V

O = USER
1 = SAFE (DEFAULT)

25,34,43

R25
22K

POWER CONN ATX 24P

SPEAKER STRAPS
ROM TABLE SELECT

VBAT

1K

0.1UF 25V Y5V


0.1UF 25V Y5V

FOR EMI

R263
0

SPK_DAT

L1
SLEEPBTNJ

L2

25
TP6151L /NI

Q58
2N3904 SOT23

C439

C441

EMI
SPK1

FP_RESET*

POWER CONN DECOUPING

R358

EMI

470P 50V X7R /NI

470P 50V X7R /NI


+5V_STBY

10K

C433

HEADER 2X8 N_P11 /NI

R361

EMI

0 /NI

1N4148 SMD

470P 50V X7R /NI

Stuff
FPR4 for
MiniPC
design

PWRBTN*
+5V

25,43 FP_RESET*

C430
0.1UF 25V Y5V

Q61
2N3904 SOT23

33

R416
300 /NI

C426

R417
300 /NI

R418
4.7K /NI

R419
4.7K /NI

R420
300 /NI

EMI
470P 50V X7R /NI

Q46
2N3904 SOT23

Q59
2N3904 SOT23

+5V_STBY

+1.8V_SUS

R421
300 /NI

Q66

D11

D12
RED CHIP LED 0805 /NI

D13
RED CHIP LED 0805 /NI

LED_D2

R422
10K /NI

2N3904 SOT23 /NI

RED CHIP LED 0805 /NI

10K

10K
R335

SEL_LED_PWR
C

R337

R328

34

+5V_STBY
+3.3V

34

+1.8V_SUS

R333
56

EMI

ACPI_LED

2.2K 8P4R

470P 50V X7R /NI


470P 50V X7R /NI

C432

Add FPQ7 to shift


voltage level if the
pin "SATA_LED" is
non-5V tolerant.

C434

EMI

K A

1N4148 SMD

2
4
6
8 BASE_PNP_TR

D7

24 SATA_HDLED*

K A

+5V_STBY
Q51
2N3906 SOT23
E
C
B

D6

RN99
1
3
5
7

D5

FP_8_10
FP_12

S_HDLED*

12
13
14
15
16

36

K A 1N4148 SMD

2N3904 SOT23

P_HDLED*

R357
330 /NI

270 8P4R

Q52

FP_12

2.2K

8
6
4
2
B

JPANEL1
9
10

R348

Changed at
ver:0.02

1
2
3
SPK_VCC
4
CRNT_LMT_HDDLED1 5
HDD_LED6
7
8

100 8P4R

RN105

FP_8_10

7
5
3
1

+5V

Stuffed, if w/
STR

10K 8P4R

36

1
3
5
7

+5V

2
4
6
8

Stuffed, if w/o
STR

RN104
1
3
5
7

+3.3V

RN103
2
4
6
8

D14
RED CHIP LED 0805 /NI
Title

ATX CONN / FRONT PANEL

LED_D1
LED_0

34

LED_1

34

Size
Document Number
Custom

LED_5SB

LED_DIMM

Date:
2

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

42

of

48

OV_CHIP1

+3.3V_STBY

46

R45

K8_VID4

VID_OUT4

44

VID_OUT3
VID_OUT2
VID_OUT1
VID_OUT0

44
44
44
44

RN5
8
8
8
8

R31

2
4
6
8

K8_VID3
K8_VID2
K8_VID1
K8_VID0

1K /NI

1
3
5
7
0 8P4R

U3

R167

46
8
8
8
8
8

OV_CHIP1

1
2
3
4
5
6
7
8
9
10
11
12
13
14

OV_DIMM1

K8_VID0
K8_VID1
K8_VID2
K8_VID3
K8_VID4
44
44

OV_VCORE0
OV_VCORE1

OV_DIMM0

25,27,28,29,30 SMB_SDA
25,27,28,29,30 SMB_SCL

28
27
26
25
24
23
22
21
20
19
18
17
16
15

TEST/ASEL
GPIO5
GPIO6
GPIO7
VID_OUT0
VID_OUT1
VID_OUT2
VID_OUT3
VID_OUT4
VID_OUT5
VBAT
SLOTOCC#
GND
RSTOUT#

3V_SB
GPIO4
GPIO3
VID_IN0
VID_IN1
VID_IN2
VID_IN3
VID_IN4
VID_IN5
GPIO0
GPIO1
GPIO2
SDA
SCL

VLDT0
VLDT1
OV_CHIP0

R168

46
46
46
VID_OUT0
VID_OUT1
VID_OUT2
VID_OUT3
VID_OUT4
VBAT

44
44
44
44
44

FP_RESET*

+5V

25,42

R32
0 /NI

R99
+5V_STBY

DIMM0
-INT_G

+1.8VDIMM_FB

20K 1%
R105

1K
E

Q15
2N3904 SOT23

Q11
BT2222A SOT23
B

C2

0.1UF 25V Y5V

0.1UF 25V Y5V

FOR EMI

C14

Default
1.94V

2.04V

2.14V

2.24V

1000P 50V X7R


C

C24

DUAL +5.0V

Q10
2N3904 SOT23

+5V_STBY

R47
+3.3V_STBY

OVL

3K 1%

44

R52
+5V_STBY

+5V_STBY

R44
1K /NI

25
25

GPIO_3
GPIO_11

1.39V

1.43V

1.48V

DUAL +3.3V
PLACE ALONG 75MIL TRACE

Q2
2N3904 SOT23 /NI

B
8
6
4
2

Q5
BT2222A SOT23 /NI
+3.3V_STBY

Default
1.35V

CT28
100UF 16V 5X11 2mm /NI

PLACE AT BACK PANEL

Q3
BT2222A SOT23 /NI

RN2
7
5
3
1

VCORE1
GPIO_11

1K /NI

VCORE0
GPIO_3

VCORE_OVL
1.5K 1% /NI

R40

FOR EMI

1000P 50V X7R

Q13
BT2222A SOT23

GPIO_2
GPIO_1

0.1UF 25V Y5V /NI

C4

DIMM1
-INT_H

1K

25
25

C372

1000P 50V X7R


+1.8VDIMM_FB 45

39.2K 1%

8
6
4
2

+3.3V

C3

+5V_STBY

RN48
10K 8P4R
7
5
3
1

+1.8VDIMM_FB 45

POWER CONN DECOUPING

25,34,42

R101

R106

20K 1% /NI

OV_DIMM1

ATXP6 SSOP28 /NI

39.2K 1% /NI

OV_DIMM0

IT8266

+3.3V
Q4
2N3904 SOT23 /NI

10K 8P4R /NI


46

VLDT1

46

OV_CHIP0
OV_CHIP1
+5V_STBY

R349

R350

R352

C388
0.1UF 25V Y5V /NI

+5V_STBY

+5V_STBY
R351

46
46

+5V_STBY

VLDT0

1K

34
34

OV_LDTV1
OV_LDTV0

Q48
2N3904 SOT23

Q56
2N3904 SOT23

34 OV_CHIPCORE1
34 OV_CHIPCORE0

7
5
3
1

Q50
2N3904 SOT23

B
E

RN95
10K 8P4R
8
6
4
2

B
8
6
4
2

Q55
BT2222A SOT23

Q57
BT2222A SOT23
RN96
10K 8P4R
7
5
3
1

Q47
BT2222A SOT23
B

Q49
BT2222A SOT23

C
A

1K
1K

1K

Title

Q54
2N3904 SOT23

<Title>
Size
Document Number
Custom

+3.3V_STBY
+3.3V_STBY

Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
43

of

48

R46
4.7 0805

RN8
1K 8P4R

C41

8 CPU_CORE_FB
C19

100 OVL

R408

0 0805 G

R94

0 0805

VDIFF

VSEN

11

RGND

R51

150K /NI

R48

22K /NI

OFST

PVCC2

24

BOOT2

26

UGATE2

27

R54

249K 1%

2.7 0805
C58
0.1UF 25V Y5V
R122
2.7 0805
R115
100K

+
CT11
C119
1000P 50V X7R

4.7K

FDD8880 TO252

3300UF 6.3V 10X25X5 LR O

Q16
C153
1UF 16V 0805 Y5V
L4

PHASE2

28

ISEN2

25

LGATE2

23

R39

REF
PVCC3

18

BOOT3

21

0 0805 G

R123

0 0805

VRM10

13

OCSET

CT16
+

CT12
+

Q17
FDD8880 TO252

VIN

C171
1000P 50V X7R
3300UF 6.3V 10X25X5 LR O
3300UF 6.3V 10X25X5 LR O
3300UF 6.3V 10X25X5 LR O

FDD8880 TO252

1UF 16V 0805 Y5V

2.7 0805

Q6
C57
1UF 16V 0805 Y5V

R65
R68

20

UGATE3

CT14

Q63

C20
R8

2
1
INDUCTOR 0.6UH 35A-KQ

R124
2.7 0805
R409

C1
0.1UF 25V Y5V

PAHSE2

1.8K

R9
4.7 0805

C62
0.01UF 50V X7R

R17

0.8V~1.55V/80A
CT9
+ 3300UF 6.3V 10X25X5 LR O

FDD8880 TO252

FS

+V_CPU

1UF 16V 0805 Y5V

+12V

36

2
1
INDUCTOR 0.6UH 35A-KQ

FDD8880 TO252

VIN
C29

OFFSET
+10mV

R58

1500UF 16V 10X20X5 LR O


1500UF 16V 10X20X5 LR O
1500UF 16V 10X20X5 LR O

Q62

R16
4.7 0805

FB

12

CT7
+
C118
1UF 16V 0805 Y5V /NI

R93
2.7 0805

+12V

1000P 50V X7R /NI

+5V
C12
1000P 50V X7R /NI

D
S

COMP

10

CPU_CORE_FB_
R18
51

PAHSE1

1.8K

OVL

R13

8 CPU_CORE_FB_

R60

Q9

1K

VIN

CT17
+

C52
0.1UF 25V Y5V

L3

43

34

CT10
+

C60
1UF 16V 0805 Y5V

470P 50V X7R

R20

R19
51

LGATE1

+12V_P

Q8

9
+V_CPU

ISEN1

32

4
3
6

FDD8880 TO252

PR2
8.2K

4700P 50V X7R

C32

29

C78
0.1UF 25V Y5V
R97
2.7 0805
R98
100K

C28

PHASE1

2.7 0805

4
3
H2

POWER CONN ATX12V 2X2

1UF 16V 0805 Y5V

5.6K

UGATE1

31

R53

1
2
H1

VIN
C66

R34

0.1UF 25V Y5V

33
30

Enable
Disable

0.1UF 25V Y5V

C77

PVCC1
BOOT1

high
low

C67

VID4
VID3
VID2
VID1
VID0
DACSEL/VID5
PGOOD
ENLL

VCORE_EN

R61
4.7 0805

PR1

38
39
40
1
2
3
35
37

JATXPWR2
1
2
5

43
VID_OUT4
43
VID_OUT3
43
VID_OUT2
43
VID_OUT1
43
VID_OUT0
43 OV_VCORE0
21 CPU_VREGPWRGD
21
VCORE_EN

L1
INDUCTOR 1.0UH
2

+12V_P

+12V

1UF 16V 0805 Y5V

U2
ISL6566CR

VCC

8
6
4
2

D1
SS12/5817 SMA /NI

7
5
3
1

R59
1K

ISL6566CR FOR K8 939 POWER CKT

+5V
+3.3V

R57
10K

2.7 0805
100K

L2

PHASE3

22

ISEN3

19

LGATE3

17

R410

0 0805G

BOTTOM PAD CONNECT TO


GND THROUGH 10vias

R49

0 0805

PAHSE3

ICOMP

high

don't care

VRM9.0

low

high

AMD HAMMER

low

low

ISUM

16

IREF

C17
0.01UF 50V X7R

R6

1.8K
G

Q64

C18

10K 1%

R3
R10
R2
0.1UF 25V Y5V

Q7

FDD8880 TO252
R11

C59
1000P 50V X7R

FDD8880 TO252

39K
39K
39K

OVL
+3.3V_STBY

VID4 VID3
1

VID2

VID1

VID0

Vout

VID4 VID3

VID2

VID1

0.800

VID0
0

1.200

0.825

1.225

0.850

1.250

0.875

1.275

0.900

1.300

0.925

1.325

0.950

1.350

0.975

1.375

1.000

1.400

1.025

1.425

1.050

1.450

1.075

1.475

1.200

1.500

1.125

1.525

1.150

1.550

1.175

OFF

+5V
PR3
402 1%

Vout

2
1
INDUCTOR 0.6UH 35A-KQ

R50
2.7 0805

VRM10.0

15

VID12.5 pin

GND

VRM10 pin

41

DAC version

14

FDD8880 TO252

PR4
8.2K

PR5
47K
PR6

PQ1
2N7002 SOT23

3K

C
43

OV_VCORE1

PQ2
2N3904 SOT23

PC1
1UF 10V Y5V

Title

VCC_CORE DC-DC CONVER


Size
Document Number
Custom
Date:
3

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

44

of

48

MEMORY VDDQ (NFORCE AND DIMMS)


10 AMPS @1.85V

K A

L15
RH TYPE BEAD

0
R454
2.7 0805

D
CT29

CT6

R455
5.1K 1%

+5V_STBY

+5V_DUAL
Q86
2N7002 SOT23
GND

Q85

VIA

Q83
SI2301BDS SOT23

Q84
SI2301BDS SOT23 /NI

2N3904 SOT23

R459
R460
3.48K 1%

10K
G

R457

JDDRII_OV_2_4V
HEADER 1X3

40,42 PWRGD_PS

1000P 50V X7R

R458
15K

25,34

SLP_S3*

R461

10K

8.87K 1%

R462
4.7K
SLP_S5_GATE

2-3 PIN SHORT = 2.4V

D1

Q82
2N3904 SOT23

+1.8VDIMM_FB 43

C618

R456
Q81
2.7 0805
FDD8880 TO252

Q80
2N7002 SOT23
G

LGATE

RT9214 SOP8

Q78
FDD8880 TO252

R451
1K

INDUCTOR 1UH D
L16

1000UF 6.3V 8X12


1000UF 6.3V 8X12

R453

+5V_STBY
+1.8V_SUS

C615
0.1UF 25V Y5V

1
2
8

FB

R450
2.7 0805

+5V

5
VCC

BOOT
UGATE
PHASE

R448
1K

CT48

C614
1UF 10V Y5V

U18

GND

6
C617
4700P 50V X7R /NI

COMP

+5V_DUAL

1000UF 6.3V 8X12

Q79
FDD8880 TO252

R452
20K /NI

+12V

DDR2 OV > 2.4 V

C616
15P 50V NPO /NI 7

default

2-3

R449
20K /NI

1-2

SS12/5817 SMA

VIN_5V
C613
1UF 16V 0805 Y5V

function

pin

D16

+5V_DUAL

Q87
2N7002 SOT23
SLP_S5*

SLP_S5*

25

WEAK P/D SITE ADDED IN CASE OF SEQUENCING PROBS

R463
22K /NI

+5V_STBY

RN82
2.2K 8P4R

VOUT

1
2

1
2

1
2

1
2

1
2

+1.8V_SUS

1
3
5
7

Q33

+0.9V_SUS

Ref

VTT_MEM

2
4
6
8

Vin

C26
1UF 16V 0805 Y5V

GND

VCTL
VCTL

3
6

+1.8V_SUS

CT42
100UF 16V 5X11 2mm
CT41
100UF 16V 5X11 2mm /NI

CT8

CT18

1000UF 6.3V 8X12


2

100UF 16V 5X11 2mm


CT4
100UF 16V 5X11 2mm

CT27
1000UF 6.3V 8X12

RT9173BCL5
C329
0.1UF 25V Y5V

CT5

1000UF 6.3V 8X12

+0.9V_SUS

C242
0.1UF 25V Y5V /NI

C71
0.1UF 25V Y5V /NI

C69
0.1UF 25V Y5V /NI

C65
0.1UF 25V Y5V /NI

C61
0.1UF 25V Y5V /NI

TC1
100UF 6.3V D TAN /NI

C38
0.1UF 25V Y5V /NI

C168
0.1UF 25V Y5V /NI

C79
0.1UF 25V Y5V /NI

C238
0.1UF 25V Y5V /NI

C233
0.1UF 25V Y5V /NI

C240
0.1UF 25V Y5V /NI

+0.9V_SUS
A

C247
0.1UF 25V Y5V /NI

C33
0.1UF 25V Y5V /NI

C255
0.1UF 25V Y5V /NI
+1.8V_SUS

+0.9V_SUS
C227

Title

PLL DELAY / PWRGD

+1.8V_SUS

100UF 16V 5X11 2mm /NI

Size
Document Number
Custom
Date:

NF4ST-A2B
Sheet

Friday, September 01, 2006

Rev
1.2
45

of

48

+5V

CK804 CORE
+5V

8AMP @1.5V

CT22

1000UF 6.3V 8X12

L6
RH TYPE BEAD
K A

C260
1UF 16V 0805 Y5V /NI

D3
SS12/5817 SMA

VIN_5V

U10

VCC

R170
20K /NI
COMP

GND

FOR 9202

1000UF 6.3V 8X12

Q26
FDD8880 TO252

FB

BOOT
UGATE
PHASE

R187
0 0805

1
2
8

CT23

+
C231
1UF 10V Y5V

+1.2V_HT
+1.5V

C201
0.1UF 25V Y5V

PHASE

INDUCTOR 1UH D
+1.2V_HT

L5
LGATE

R180
2.7 0805 CT26

4
R179
0 0805
Q29
FDD8880 TO252

RT9214 SOP8

CT24

R160
301 1%

C221
0.1UF 25V Y5V /NI

R1
C190
0.1UF 25V Y5V

C219
1000UF 6.3V 8X12
1000UF 6.3V 8X12

R163

3.48K 1%

R165

1.5K 1%

OV_CHIP0

43

OV_CHIP1

43

+3.3V
C

R156

22K

PHASE

1000P 50V X7R

GND
VIA

R169
330 1%

R2

Vout=0.8(1+R1/R2)----for RT9202
R1 , R2 K ohm

C431

CT20

1000UF 6.3V 8X12

0.1UF 25V Y5V


+3.3V_DUAL

+3.3V

+3.3V_STBY +3.3V_DUAL

HT

+5V_STBY
ADJ_3V3_STBY

R347

Q88

U15

R129

R130

5.1K

5.1K

R346
AZ1117H-ADJ SOT-223
330

CT37
1000UF 6.3V 8X12

FDD8880 TO252 /NI

+3.3V_STBY
D

Q18
2N7002 SOT23

+5V

+12V

174 1%

+2.5V

I
O
AADJ_3V3_STBY

Q31E
2N3904 SOT23

Q30E
2N3904 SOT23

1.2V @ 850MA AMPS MAX

R189
B C_ENBL1
1UF 10V Y5V /NI
1UF 10V Y5V /NI
1K
C253
C252
C251
0.1UF 25V Y5V /NI

+5V_STBY

C
BC_ENBL2

ADD AN ENABLE CKT - LOW IS OFF


3.3V MUST BE PWR ON BEFOR 5.0V
OR SOFT START WILL NOT WORK.

R190
10K

CT37

C
REF_2.5V

R121

CO-LAY 2006/08/03

4.7K

Q19E
2N3904 SOT23

C
R135

B
Q21E
2N3904 SOT23

CK804 CORE AUX

C403
100UF 16V 5X11 2mm

C403

10
43

VLDT1

R143

43

VLDT0

R142

130 1%
412 1%

Q25
FDD8880 TO252

R362

1
2

R334
AZ1117H-ADJ SOT-223
200 1%

R146
649 1%

1K 1%

R336

U1C
LM324 SO14
10

+3.3V_DUAL

21

10K

+3.3V

+1.5V_DUAL

I
O
A

C175
1UF 16V 0805 Y5V

R145
680

1.5V @ 275MA MAX

U14

HTVDD_EN
C180
R136
1UF 10V Y5V /NI
10K /NI

+1.2V_HT
A

CT21
1000UF 6.3V 8X12

CT13
1000UF 6.3V 8X12 /NI
Title

CK804 CORE / CORE AUX


Size
Document Number
Custom
Date:

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
46

of

48

+5V_STBY
JUSBV2
HEADER 1X3
1
3

FRONT PANEL USB


R287

USBPWR_FNTPNL1_2

FP_USB_5V

USB_FNTPNL_1_0_OC*

+5V

FS4
THERM

R321
0 0805 /NI

CT35

R284

FRONT PANEL USB

POLY FUSE 1.1A

10K

USB_FNTPNL_1_0_OC* 25

5.1K
C391

R262
USB_FNTPNL_8_9_OC*

USBPWR_FNTPNL1_2

470P 50V X7R /NI

USB_FNTPNL_8_9_OC* 25

100UF 16V 5X11 2mm /NI

5.1K
C386

JUSB2
CT36

R261
25 USB_0*
25 USB_0

10K

USB_0* 10 8P4R /NI


USB_0 10 8P4R /NI

C367
470P 50V X7R /NI

1
3
5
7

RN88C
RN88D

2
4
6
8
10

C382

10 8P4R /NI
10 8P4R /NI

RN88B
RN88A

USB_1*
USB_1

USB_1*
USB_1

25
25

C374 C375

100UF 16V 5X11 2mm


10P 50V NPO
10P 50V NPO

HEADER 2X5 N9 W
JUSB4
USB_9* RN91A
USB_9 RN91B

25 USB_9*
25 USB_9

1
3
5
7

10 8P4R /NI
10 8P4R /NI
C380

C381

2
4
6
8
10

RN91C
RN91D

10 8P4R /NI
10 8P4R /NI

USB_8*
USB_8

USB_8*
USB_8

25
25

10P 50V NPO

10P 50V NPO

C368 C383

10P 50V NPO


HEADER 2X5 N9 W

10P 50V NPO

10P 50V NPO

10P 50V NPO

FP_USB_5V
R307
0 0805 /NI

FS3

FRONT PANEL USB

THERM

POLY FUSE 1.1A /NI


R296

USBPWR_FNTPNL1_2

USB_FNTPNL_7_6_OC*

USB_FNTPNL_7_6_OC* 25

5.1K
C385
R288
10K

470P 50V X7R /NI


B

JUSB3
25 USB_7*
25 USB_7

USB_7*
USB_7

10 8P4R /NI
10 8P4R /NI

1
3
5
7

RN89D
RN89C
C377

2
4
6
8
10

C376

10 8P4R /NI
10 8P4R /NI

RN89B
RN89A

USB_6*
USB_6

USB_6*
USB_6

25
25

C379 C378

10P 50V NPO


10P 50V NPO

HEADER 2X5 N9 W

10P 50V NPO

10P 50V NPO

Title

PCI CONNECTOR
Size
Document Number
Custom
Date:
5

NF4ST-A2B
Sheet
Friday, September 01, 2006
1

Rev
1.2
47

of

48

JDDRII_2_4V(1-2)
JUMPER 2P R

JKBMSV1(1_2)
JUMPER 2P R
(BAT1)
JUSBV1(1_2)
JUMPER 2P R
JUSBV2(1_2)
JUMPER 2P R
JAUDIO1(5_6)
JUMPER 2P B

3V BATTERY SONY
(ROM1)
FLASH ROM

JAUDIO1(9_10)
JUMPER 2P B
PLCC 4M LPC
JAUDIO1(11_12)
JUMPER 2P B

(CPU1)

JAUDIO1(13_14)
JUMPER 2P B

JCMOS1(1_2)
JUMPER 2P B
PCB
AM2RM-B
PCB

NF4ST-A2B 1.1

(U11)

(PCB)
NBLF-SLIM-3P

POLON 305x220
B

New JPANEL1
JPANEL1 2*8
JPANEL1(9_10)
JPANEL1(15_16)
HEADER 1X2
HEADER 1X2
JPANEL1(11_14)
PLED

JPANEL1(1_4) JPANEL1(5_6)JPANEL1(7_8)
SPK
HLED
RST

Title

BOM
Size
Document Number
Custom
Date:
5

Rev
1.2

NF4ST-A2B

Friday, September 01, 2006

Sheet
1

48

of

48