MP Chapter 8

Microprocessors
Chapter 8 Memory Interface

prepared by Dr. Mohamed A. Shohla
Chapter Overview
Memory Devices Address Decoding 8088 and 80188 (8-Bit) Memory Interface 8086, 80186, 80286, and 80386SX (16-Bit) Memory Interface Cache Memory
Faculty of Electronic Engineering Dept. of Computer Science & Eng. Microprocessors Course
8-2
Memory Devices
Address Connections Data Connections Selection Connections
8-3
Semiconductor Memory Types
8-4
Semiconductor Memory
RAM
Misnamed as all semiconductor memory is random access Read/Write Volatile Temporary storage Static or dynamic
8-5
Memory Cell Operation
8-6
Dynamic RAM
Bits stored as charge in capacitors Charges leak Need refreshing even when powered Simpler construction Smaller per bit Less expensive Need refresh circuits Slower Main memory Essentially analogue
Level of charge determines value
8-7
Static RAM
Bits stored as on/off switches No charges to leak No refreshing needed when powered More complex construction Larger per bit More expensive Does not need refresh circuits Faster Cache Digital
Uses flip-flops
8-8
SRAM v DRAM
Both volatile
Power needed to preserve data
Dynamic cell
Simpler to build, smaller More dense Less expensive Needs refresh Larger memory units
Static
Faster Cache
8-9
Read Only Memory (ROM)

Permanent storage
Nonvolatile
Microprogramming (see later) Library subroutines Systems programs (BIOS) Function tables
8 - 10
Types of ROM
Written during manufacture
Very expensive for small runs
Programmable (once)
PROM Needs special equipment to program
Read mostly
Erasable Programmable (EPROM)
Erased by UV
Electrically Erasable (EEPROM)

Takes much longer to write than read
Flash memory
Erase whole memory electrically
8 - 11
Address Decoding
Simple NAND Gate Decoder
A decoder used to select a 2K x 8 EPROM for memory locations FF800HFFFFFH.
2K-8
8 - 12
Sample Decoder Circuit

The 74LS138, 3-to-8 line decoder
8 - 13
Example: Design a 64K-8 EPROM interface for the 8088 microprocessor using EPROM chips (8K x 8). The ROM memory starts at address F0000H-FFFFFH.
8 - 14
Basic 8088 Memory Interface

Interfacing EPROM to the 8088
A 32K-8 EPROM interface for the 8088 using EPROM chips (4K x 8). The ROM memory starts at address F8000H-FFFFFH.
8 - 15
Interfacing RAM to the 8088

WR RD A15 A16 A17 A B C
Data D0 - D7
Address A0 - A14 32 K x 8 SRAM 32 K x 8 WR SRAM 32 K x 8 OE SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM CS CS CS
Y0 Y1
A 512K-8 RAM interface for the 8088 using RAM chips (32K x 8). The ROM memory starts at address 00000H.
Y2 74138 Y3 3x8 Decoder Y4 G1 Y5 G2A Y6 G2B Y7
A18 A19
A B C
Y0 Y1
Vcc
A15 A16 A17
A B C
Y0 Y1
IO/M
32 K x 8 SRAM 32 K x 8 WR SRAM 32 K x 8 OE SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM CS CS CS
8 - 16

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Microprocessors

Chapter 8 Memory Interface

Semiconductor Memory Types

Memory Cell Operation

Read Only Memory (ROM)

Electrically Erasable (EEPROM)

A decoder used to select a 2K x 8 EPROM for memory locations FF800HFFFFFH.

Sample Decoder Circuit

Basic 8088 Memory Interface

Interfacing RAM to the 8088

Y2 74138 Y3 3x8 Decoder Y4 G1 Y5 G2A Y6 G2B Y7

Y2 74138 Y3 3x8 Decoder Y4 G1 Y5 G2A Y6 G2B Y7

A15 A16 A17

Y2 74138 Y3 3x8 Decoder Y4 G1 Y5 G2A Y6 G2B Y7

32 K x 8 SRAM 32 K x 8 WR SRAM 32 K x 8 OE SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM 32 K x 8 CS SRAM CS CS CS

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