Quanta BU5

1
PCB STACK UP
01
BU5 Block Diagram
LAYER 1 : TOP
LAYER 2 : GND
LAYER 3 : IN1
LAYER 4 : SVCC
LAYER 5 : IN2
A
USB-11
INT_LVDS
LAYER 6 : IN3
LCD/CCD Con.
P17
Port-A
DDRIII-SODIMM1
DDRIII-SODIMM2
Sandy Bridge(UMA+VGA)
P13,14
Dual Channel DDR III

800/1066/1333 MHZ
SATA - HDD
DDR SYSTEM MEMORY
LAYER 8 : BOT
P21
CRT Con.
INT_CRT
P17
PCI-E
rPGA 989
P3,4, 5, 6,
FDI
DMI
FDI
DMI
Graphics Interfaces
LAYER 7 : GND
INT_HDMI
HDMI Con.
HDMI-passive level shift
P16
P16
Port-B
DMI(x4)
SATA - ODD
P21
SATA 0
SATA 4
SATA
PCI-E
PCI-Express
PCIE-3
3G
USB-3
Daughter board
USB Con.
P18
USB-8,USB-9
USB-5
SIM CARD.
USB 2.0 (Port0~13)
PCIE-6
USB
P18
Cardreader Con.
P20
3 IN 1
POWER SYSTEM
ISL88731C
PM6686
UP6163
RT8240
TPS51461
ISL95835HRTZ
G966A
CougarPoint
PCH
WLAN
USB-13
P18
P7,8, 9, 10, 11,12
USB-4
PCIE-1
RTC
Giga/10/100 Lan
P28
P29
P30
P31
P32
P33
P34
P23
BATTERY
+VCC_CORE
PCIE-1
P8
Azalia
IHDA
LPC
USB 3.0
USB-1
P19
+1.5V
+1.5VSUS
NVRAM
USB 3.0 Conn.
+VTT
+1.05V
P19
LPC
+1.8V
Audio Codec
EC
+1.5V_S5
P27
+3VPCU
+3V_S5
+3V
+5VPCU
+5V_S5
+5V
+SMDDR_VTERM
+SMDDR_VREF
Port-A
Port-B
P22
FAN
MIC JACK
P22
HP
K/B Con.
HALL Sensor
SPI Flash
Touch Pad /B
Con.
SPK Con.
P22
P22
P3
P25
P17
P27
P25
Power /B
Con.
P25
+VCCSA
Quanta Computer Inc.

PROJECT : BU5
Size
Document Number
Date:
Wednesday, November 17, 2010
Rev
2A
Block Diagram
1
Sheet
8
of
35
02
Power States
Table of Contents
A
PAGE
DESCRIPTION
Schematic Block Diagram
BOI-FUNCTIONS
Front Page
3-6
Processor
CPU
7-12
PCH
CLG
RTC
RTC
DDRIII SO-DIMM
DDR
17
VGA Connector
VGA
16
LCD Panel
LDS
CRT & CRT BUS SWITCH
CRT
CCD
CCD
HALL SENSOR&BACK LIGHT SWITCH
HSR
13-14
19
Display Port
DPP
20
HDMI comm part
HDM
HDMI for GM
21
22
23
24
25
ODD
Main SATA HDD & 2nd SATA HDD
HDD
G-Sensor
H3D
5 IN 1 Card reader
MMC
IEEE1394
FIW
MINI Card (Wi-Fi & WIMAX)
WLN
MINI Card 2nd
MNC
MINI Card 3nd
MNC
TMA Connector
TMA
INT KeyBoard & K/B LED Power
KBC
LED Board
LED
TP&FP board
TPD,FPD
Bluetooth Connector
BTM
Felica Connector
FEC
MMB Connector
MMB
Power SW
PSW
B-CAS Connector
BCS
New Card (Express Card)
EXC
E-SATA comb USB
ESA
USB Connector
USB
Audio & USB Board
USB,ADO
Light Sensor
LSN
Satellite LED
LED
RF LED / WIMAX LED / Kill SW
KSW
EC WP8763LDG/WPC8769L(O)
KBC
CIR
CIR
27
Codec (CX20583)
ADO
28
FM Tunner
FMM
Modem Connector
MDM
26
HOLE
29
Atheros LAN
LAN
30
NVRAM Connecyor
NVR
31
Charger (ISL6251A)
PWM
32
System 5V/3V (ISL6237)
PWM
33
CPU CORE (ISL62882)
PWM
VOLTAGE
VIN
10V~+19V
+VCCRTC
HMG
SATA ODD
POWER PLANE
CONTROL
SIGNAL
ACTIVE IN
+3.0V~+3.3V
+3V
+3.3V
S0~S5
S0~S5
MAIN_ON
S0
+3V_S5
+3.3V
S5_ON
S0~S5
+3V_HDP
+3.3V
MAIN_ON
S0
+3VPCU
+3.3V
AC/DC Insert enable
S0
+5V
+5V
MAIN_ON
S0
+5V_S5
+5V
S5_ON
S0~S5
+5VPCU
+5V
AC/DC Insert enable
S0~S5
+5V_TMA
+5V
MAIN_ON
S0
WIMAX_P
+3.3V
WMAX_P for EC
+1.8V
+1.8V
MAIN_ON
S0
+1.5V
+1.5V
MAIN_ON
S0
+1.5V_S5
+1.5V
S5_ON
S0~S5
+1.5V_SUS
+1.5V
SUSON
S0~S3
+VCC_CORE
+1.05V~+1.1V
+VTT
+1.05V
+1.05V
+VAXG
GND PLANE
PAGE
GND_SIGNAL
32
CARD_GND
21
AGND_DC/DC
31
GND
ALL
VRON
S0
MAIN_ON
S0
MAIN_ON
S0
GFXVR_EN
S0
ITEM
Value Code
FUNCTIONS
EV@
DISCRETE
IV@
UMA
USB 3.0
U3@
U2@
HM@
HDMI
IHM@
Internal HDMI
EHM@
External HDMI
3G@
3G
C@
Cost issue
10
MDC@
Modem
11
S3@
S3 Power Reduction
12
NS3@
No S3 Power Reduction
USB 2.0 (colay W USB 3.0)

C
13
E@
EMI
PWM
14
51@
1G LAN
35
VAXG (ISL62881)
+VTT (UP6111A)
PWM
15
52@
10/100 LAN
36
+1.05V (UP6111AQDD)
PWM
16
GS@
G-SENSOR
37
DDR 1.5V (TPS51116)
PWM
17
NGS@
No G-SENSOR
38
Discharge (1.5V_S5/1.8V)
PWM
PAGE DESCRIPTION
34
39
Power Tree Table
40
PCH Power Plane
41
Power Management
42
Change List
BOI-FUNCTIONS

PROJECT : BU5
Size
Document Number
Date:
Rev
2A
POWER STAGE AND BOI-FUNCTION

1
Sheet
of
2
8
35
03
Sandy Bridge Processor (CLK,MISC,JTAG)
<CPU>
Sandy Bridge Processor (DMI,PEG,FDI)
U22B
U22A
A22
G19
E20
G18
B20
C19
D19
F17
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
J18
J17
[7] FDI_FSYNC0
[7] FDI_FSYNC1
FDI0_FSYNC
FDI1_FSYNC
H20
[7] FDI_INT
FDI_INT
J19
H17
[7] FDI_LSYNC0
[7] FDI_LSYNC1
FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
eDP_COMP
INT_eDP_HPD_Q
TP13
FDI0_LSYNC
FDI1_LSYNC
A18
A17
B16
eDP_COMPIO
eDP_ICOMPO
eDP_HPD
C15
D15
eDP_AUX
eDP_AUX#
C17
F16
C16
G15
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
C18
E16
D16
F15
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
56_4
H_PROCHOT#_R
AL32
PM_THRMTRIP#
AN32
BCLK
BCLK#
R328
[7] PM_SYNC
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
0_4
R322
R320
C393
PROCHOT#
PM_DRAM_PWRGD_R
[15] PM_DRAM_PWRGD_R
+VTT
R324
R323
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
CPU_PLTRST#_R AR33
*43_4
CLK_CPU_BCLKP [9]
CLK_CPU_BCLKN [9]
1K_4
1K_4
+VTT
RESET#
CPU_DRAMRST# [15]
AK1
A5
A4
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
SM_RCOMP_0 R34
SM_RCOMP_1 R368
SM_RCOMP_2 R367
140/F_4
25.5/F_4
200/F_4
REV-A1A Change from 26.1/F_4 to 25.5/F_4

TP7
TP5
AP29 XDP_PRDY#_R
AP27 XDP_PREQ#
PRDY#
PREQ#
*75/F_4
CPU_PLTRST#
R362
R361
R8
SM_DRAMRST#
THERMTRIP#
AM34
PM_SYNC_R
0_4
H_PWRGOOD_R
10K_4
*0.1U/10V_4X
CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R
4 0X2
2
PECI
REV-A1A add 0.01uF capacitor

parallel 10K resistor can pass turbo boot
[10] H_PWRGOOD
A16
A15
DPLL_REF_CLK
DPLL_REF_CLK#
DDR3
MISC
R330
[27,33] H_PROCHOT#
R357 3
1
A28 CLK_CPU_BCLKP_R
A27 CLK_CPU_BCLKN_R
CATERR#
AN33
[27] EC_PECI
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
SKTOCC#
AL33
TP_CATERR#
TP63
PROC_SELECT#
AN34
SKTOCC#
TP8
CLOCKS
C26
[8] H_SNB_IVB#
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
MISC
PEG_COMP
AR26 XDP_TCLK
AR27 XDP_TMS
AP30 XDP_TRST#
TCK
TMS
TRST#
JTAG & BPM
A21
H19
E19
F18
B21
C20
D18
E17
Intel(R) FDI
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
J22
J21
H22
THERMAL
G22
D22
F20
C21
[7] DMI_RXP0
[7] DMI_RXP1
[7] DMI_RXP2
[7] DMI_RXP3
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI
G21
E22
F21
D21
[7] DMI_RXN0
[7] DMI_RXN1
[7] DMI_RXN2
[7] DMI_RXN3
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
PCI EXPRESS* - GRAPHICS
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
B28
B26
A24
B23
[7] DMI_TXP0
[7] DMI_TXP1
[7] DMI_TXP2
[7] DMI_TXP3
eDP
[7] DMI_TXN0
[7] DMI_TXN1
[7] DMI_TXN2
[7] DMI_TXN3
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PWR MANAGEMENT
B27
B25
A25
B24
AR28 XDP_TDI_R
AP26 XDP_TDO_R
TDI
TDO
AL35
DBR#
XDP_DBR#_R
TP1
R332
0_4
AT28 XDP_BPM0_R
AR29 XDP_BPM1_R
AR30 XDP_BPM2_R
AT30 XDP_BPM3_R
AP32 XDP_BPM4_R
AR31 XDP_BPM5_R
AT31 XDP_BPM6_R
AR32 XDP_BPM7_R
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
XDP_DBRST# [7]
TP2
TP3
TP58
TP57
TP4
TP61
TP59
TP60
C
CPU-989P-rPGA
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
CPU-989P-rPGA
Processor pull-up <CPU>
Level Shift <CPU>
+VTT
Thermal Trip <CPU>
+3V_S5
DP & PEG Compensation

<CPU>
+VTT
+VTT
C339
*0.1U/10V_4X
U21
24.9/F_4
eDP_COMP
W=12mil; S=15mil; L<500mil

+VTT
R74
24.9/F_4
H_PROCHOT# R331
62_4
XDP_TMS
XDP_TDI_R
XDP_TDO_R
XDP_TCLK
XDP_TRST#
51_4
51_4
*51_4
51_4
51_4
R315
R312
R11
R314
R321
[9,18,19,23,27]
PLTRST#
NC VCC
[7,33] DELAY_VR_PWRGOOD
Q6
2N7002_200MA
B
R78
B
IN
GNDOUT
R40
100K_4
CPU_PLTRST#
R41
1K_4
*74LVC1G07GW
PEG_COMP
R325
CPU_PLTRST#_R
1.5K/F_4
W=12mil; S=15mil; L<500mil
FDI Disabling (Discrete Only)

<CPU>
R319
750/F_4
PM_THRMTRIP#
Q5
3 MMBT3904-7-F_200MA
SYS_SHDN#
[29]
PM_THRMTRIP# [10]
CPU Thermal sensor / MB Local TEMP <THC>
FAN Control-->For one FAN solution <THC>
+3VPCU
+3V
+3VPCU
+3V
R308
[10,27] TEMP_ALERT#
1
TEMP_ALERT#
Q25
40mils
*10K_4
40mils
U20
2.2U/6.3V_6X
3
CPUFAN#_ON_R_1
*2N7002_200MA
[27] VFAN1
REV-A1A Reserve Q8003
VIN
VO
GND
/FON GND
GND
VSET GND
G991P11U
3
5
6
7
8
[27] FANSIG1
VL
CN13
FANSIG1
TH_FAN_POWER1
R496
150_4
R14
*150_4
C376
C361
C362
10U/6.3V_8X
0.01U/25V_4X
*0.01U/25V_4X
R31
R24
U3
+3VPCU
+3VPCU_HW_SD
VCC
C18
1
2
3
0.1U/10V_4X
R497
VL
85205-0300L
R498
SET
GND
0_4
*0_4
HYST
OT#
R13
24.9K/F_4
*10K_4
*330_4
2
+5V
C378
THER_SHD#
Q3
1
3
*MMBT3904-7-F_200MA
SYS_SHDN#
[29]
G708T1U
R499
0_4
Rset(Kohm)=0.0012T*T-0.9308T+96.147,Shut down on 86dgree

Hysteresis is 30C
REV-C3A Change VCC PIN5 of U3 from +3VPCU to VL

Add R496,R497,R499
Reverse R14,R498,R31,R24,Q3

PROJECT : BU5
Size
Document Number
Rev
2A
Sandy Bridge 1/4

Date:
5
Monday, December 20, 2010

1
Sheet
of
35
04
<CPU>
Sandy Bridge Processor (DDR3)

U22C
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
V6
[13] M_A_BS#0
[13] M_A_BS#1
[13] M_A_BS#2
AE8
AD9
AF9
[13] M_A_CAS#
[13] M_A_RAS#
[13] M_A_WE#
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]
RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]
SA_CS#[0]
SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]
SA_ODT[0]
SA_ODT[1]
RSVD_TP[9]
RSVD_TP[10]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AB6
AA6
V9
M_A_CLKP0 [13]
M_A_CLKN0 [13]
M_A_CKE0 [13]
AA5
AB5
V10
[14] M_B_DQ[63:0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_A_CLKP1 [13]
M_A_CLKN1 [13]
M_A_CKE1 [13]
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
M_A_CS#0 [13]
M_A_CS#1 [13]
AH3
AG3
AG2
AH2
M_A_ODT0 [13]
M_A_ODT1 [13]
C4
G6
J3
M6
AL6
AM8
AR12
AM15
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
D4
F6
K3
N6
AL5
AM9
AR11
AM14
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQSN[7:0]
[13]
M_A_DQSP[7:0] [13]
M_A_A[15:0] [13]
[14] M_B_BS#0
[14] M_B_BS#1
[14] M_B_BS#2
[14] M_B_CAS#
[14] M_B_RAS#
[14] M_B_WE#
CPU-989P-rPGA
C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
R6
AA10
AB8
AB9
SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]
RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]
SB_CS#[0]
SB_CS#[1]
RSVD_TP[17]
RSVD_TP[18]
DDR SYSTEM MEMORY B
[13] M_A_DQ[63:0]
DDR SYSTEM MEMORY A
U22D
SB_ODT[0]
SB_ODT[1]
RSVD_TP[19]
RSVD_TP[20]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
AE2
AD2
R9
M_B_CLKP0 [14]
M_B_CLKN0 [14]
M_B_CKE0 [14]
AE1
AD1
R10
M_B_CLKP1 [14]
M_B_CLKN1 [14]
M_B_CKE1 [14]
AB2
AA2
T9
AA1
AB1
T10
AD3
AE3
AD6
AE6
M_B_CS#0 [14]
M_B_CS#1 [14]
AE4
AD4
AD5
AE5
M_B_ODT0 [14]
M_B_ODT1 [14]
C
D7
F3
K6
N3
AN5
AP9
AK12
AP15
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
C7
G3
J6
M3
AN6
AP8
AK11
AP14
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQSN[7:0] [14]
M_B_DQSP[7:0] [14]
M_B_A[15:0] [14]
CPU-989P-rPGA

PROJECT : BU5
Size
Document Number
Date:
Rev
2A
Sandy Bridge 2/4

5
Sheet
1
of
35
05
<CPU>
Sandy Bridge Processor (GRAPHIC POWER)
C400
10U/6.3V_8X
C394
10U/6.3V_8X
C416
10U/6.3V_8X
C420
10U/6.3V_8X
C410
10U/6.3V_8X
C395
10U/6.3V_8X
C409
10U/6.3V_8X
C413
10U/6.3V_8X
C64
10U/6.3V_8X
C408
*C@10U/6.3V_6X
C108
10U/6.3V_8X
C424
*C@10U/6.3V_6X
C404
10U/6.3V_8X
C412
*C@10U/6.3V_6X
REV-A1A Change Footprint from 0804 to 0603
C84
10U/6.3V_8X
C101
10U/6.3V_8X
C53
*C@10U/6.3V_6X
C402
*C@10U/6.3V_6X
C418
*C@10U/6.3V_6X
C58
*C@10U/6.3V_6X
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
C206
10U/6.3V_8X
C396
10U/6.3V_8X
C209
10U/6.3V_8X
C411
10U/6.3V_8X
C401
10U/6.3V_8X
C415
10U/6.3V_8X
C419
10U/6.3V_8X
C57
10U/6.3V_6X
C106
10U/6.3V_6X
C425
10U/6.3V_8X
C25
IV@10U/6.3V_8X
C385
IV@10U/6.3V_6X
C24
IV@10U/6.3V_8X
C384
IV@10U/6.3V_6X
C22
IV@10U/6.3V_8X
C26
IV@10U/6.3V_8X
C27
IV@10U/6.3V_8X
C23
IV@10U/6.3V_8X
C207
*10U/6.3V_8X
C208
*10U/6.3V_8X
C205
*10U/6.3V_8X
C387
*C@10U/6.3V_6X
0_4
C383
*C@10U/6.3V_8X
C442
*10U/6.3V_8X
PC260
22U/6.3V_8X
R77
C388
*C@10U/6.3V_6X
PC259
22U/6.3V_8X
REV-C3A Add PC259,PC260 for VAXG issue
+VTT
B6
A6
A2
+1.8V
VIDALERT#
VIDSCLK
VIDSOUT
AJ29
AJ30
AJ28
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
+ C439
C147
*C@10U/6.3V_8X
C139
1U/6.3V_4X
C140
1U/6.3V_4X
SENSE
LINES
VREF
C105
10U/6.3V_6X
C382
*C@10U/6.3V_8X
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
C405
10U/6.3V_8X
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
SA RAIL
C414
10U/6.3V_8X
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
R317
*EV@0_4
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
GRAPHICS
C403
10U/6.3V_8X
PEG AND DDR
C95
10U/6.3V_8X
CORE SUPPLY
C399
10U/6.3V_8X
SVID
C417
10U/6.3V_8X
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
+ C441
*C@330U/2V_7343P_E6b
VCCPLL1
VCCPLL2
VCCPLL3
*C@330U/2V_7343P_E6b
VAXG_SENSE
VSSAXG_SENSE
SM_VREF
AK35
AK34
AL1
R46
R43
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCSA_SENSE
FC_C22
VCCSA_VID1
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
H23
100_4
+VAXG
VCC_AXG_SENSE [33]
VSS_AXG_SENSE [33]
+VDDR_REF_CPU
S=20 mil; L<500mil
+1.5V_CPU
C113
10U/6.3V_8X
C51
10U/6.3V_8X
C111
10U/6.3V_8X
C112
10U/6.3V_8X
+ C116
C49
10U/6.3V_8X
M27
M26
L26
J26
J25
J24
H26
H25
C22
C24
100_4
R50
+VDDR_REF_CPU
W=20mil ;
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
R42
0_4
0_4
C44
10U/6.3V_8X
*C@330U/2V_7343P_E6b
+VCCSA
C426
10U/6.3V_8X
C107
10U/6.3V_8X
VCCSA_VCCSSENSE_R R79
R372
C427
10U/6.3V_8X
0_4
VCCSA_VCCSSENSE
[32]
10K_4
VCCSA_VID1
R365
[32]
10K_4
B
CPU-989P-rPGA
Layout note: need routing

together and ALERT need
between CLK and DATA
H_CPU_SVIDCLK
SENSE LINES
C74
10U/6.3V_8X
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
POWER
U22G
+VAXG
+VTT
DDR3 -1.5V RAILS
POWER
1.8V RAIL
U22F
+VCC_CORE
D
MISC
Sandy Bridge Processor (POWER)
R340
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
AJ35
AJ34
VCC_SENSE_R
VSS_SENSE_R
R339
R341
0_4
0_4
B10
A10
VCCP_SENSE_R
VSSP_SENSE_R
R359
R360
0_4
0_4
100_4
R342
100_4
R370
10_4
R371
10_4
R337
0_4
VR_SVID_CLK
[33]
+VCC_CORE
VCC_SENSE [33]
VSS_SENSE [33]
+VTT
+VTT
VCCP_SENSE [31]
VSSP_SENSE [31]
R336
130/F_4
H_CPU_SVIDDAT
R338
0_4
REV-C3A Mount R359,R360,R370,R371
VR_SVID_DATA
[33]
A
+VTT
CPU-989P-rPGA
R335
75/F_4
H_CPU_SVIDALRT#
R334
43_4
VR_SVID_ALERT#
[33]
PROJECT : BU5
Size
Document Number
Rev
2A
Sandy Bridge 3/4

Date:
5

1
Sheet
of
35
U22H
AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
CPU-989P-rPGA
06
Sandy Bridge Processor (RESERVED, CFG)

U22E
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
CFG0
TP11
TP10
CFG2
TP9
CFG4
CFG5
CFG6
CFG7
CFG7
AK28
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29
AJ31
AH31
AJ33
AH33
AJ26
+3V
B4
D1
SMDDR_VREF_DQ0_M3
SMDDR_VREF_DQ1_M3
[13] SMDDR_VREF_DQ0_M3
R358
R366
*1K_4
*1K_4
+VTT
R363
10K_4
R364
*10K/F_4
F25
F24
F23
D24
G25
G24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29
J20
B18
A19
REV-A1A change PU power from +VTT to +3V
J15
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
L7
AG7
AE7
AK2
W8
D
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
VCC_DIE_SENSE
RSVD54
RSVD55
RSVD24
RSVD25
VCCIO_SEL
RSVD56
RSVD57
RSVD58
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AH27
AN35 CLK_XDP_ITPP
AM35 CLK_XDP_ITPN
TP6
TP62
AT2
AT1
AR1
B
RSVD27
KEY
B1
CPU-989P-rPGA
CPU-989P-rPGA
Processor Strapping
The CFG signals have a default value of '1' if not terminated on the board.
1
A
U22I
RESERVED
Sandy Bridge Processor (GND)
<CPU>
CFG2
(PEG Static Lane Reversal)
CFG[6:5] (PCIE Port Bifurcation Straps)

0
Normal Operation
Lane Reversed
CFG4
(DP Presence Strap)
Disable; No physical DP attached to eDP
Enable; An ext DP device is connected to eDP
CFG7
(PEG Defer Training)
PEG train immediately following

xxRESETB de assertion
PEG wait for BIOS training
CFG2
R9
*EV@1K_4
CFG4
R333
*1K_4
CFG7
R327
*1K_4
CFG5
CFG6
R326
R329
*1K_4
*1K_4
11:
10:
01:
00:
(Default) x16 - Device 1 functions 1 and 2 disabled

x8, x8 - Device 1 function 1 enabled ; function 2 disabled
Reserved - (Device 1 function 1 disabled ; function 2 enabled)
x8,x4,x4 - Device 1 functions 1 and 2 enabled
REV-A1A change to 5% tolerance

PROJECT :BU5
Size
Document Number
Date:
Rev
2A
Sandy Bridge 4/4

5
Sheet
1
of
35
07
<CLG> <HDM> <CRT>
Cougar Point (DMI,FDI,PM)
Cougar Point (LVDS,DDI)
U25C
U25D
[3] DMI_TXP0
[3] DMI_TXP1
[3] DMI_TXP2
[3] DMI_TXP3
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
BJ24
+1.05V
R186
49.9/F_4 DMI_COMP
BG25
R191
750/F_4
BH21
DMI_ZCOMP
FDI_FSYNC0
DMI_IRCOMP
FDI_FSYNC1
DMI2RBIAS
FDI_LSYNC0
FDI_LSYNC1
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
J47
M45
[27] LCD_BLON_I
[17] LVDS_DIGON
P45
[17] LVDS_PWM
T40
K47
[17] LCD_EDIDCLK
[17] LCD_EDIDDATA
R389
R391
+3V
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
R169
BC10
AF37
AF36
2.37K/F_4
T6
AE48
AE47
AK39
AK40
[17] LCD_TXLCLKOUT[17] LCD_TXLCLKOUT+
FDI_INT [3]
AV12
T45
P39
2.2K_4
2.2K_4
FDI_FSYNC0
[3]
FDI_FSYNC1
[3]
FDI_LSYNC0
[3]
FDI_LSYNC1
[3]
AN48
AM47
AK47
AJ48
[17] LCD_TXLOUT0[17] LCD_TXLOUT1[17] LCD_TXLOUT2TP67
AV14
BB10
AN47
AM49
AK49
AJ47
[17] LCD_TXLOUT0+
[17] LCD_TXLOUT1+
[17] LCD_TXLOUT2+
TP71
C12
SUSACK#_R
K3
XDP_DBRST#
[3] XDP_DBRST#
SYS_PWROK
R239
0_4
SYS_PWROK_R
P12
MPWROK
R225
0_4
EC_PWROK_R
L22
L10
APWROK_R
PM_DRAM_PWRGD
[15] PM_DRAM_PWRGD
C21
RSMRST#
[27] RSMRST#
B13
SUS_PWR_ACK_R K16
E20
[27] DNBSWON#
AC_PRESENT_R
H20
PM_BATLOW#
E10
PM_RI#
A10
System Power Management
DSWVRMEN
SUSACK#
SYS_RESET#
WAKE#
+3V
SYS_PWROK
+3V_S5
PWROK
DPWROK
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
APWROK
+3V_S5
SUSCLK / GPIO62
DRAMPWROK
+3V_S5
SLP_S5# / GPIO63
RSMRST#
SLP_S4#
SUSWARN#/SUSPWRDNACK/GPIO30
+3V_S5
SLP_S3#
PWRBTN#
SLP_A#
ACPRESENT / GPIO31
DSW
SLP_SUS#
BATLOW# / GPIO72 +3V_S5
PMSYNCH
+3V_S5
SLP_LAN# / GPIO29
RI#
A18
DSWVREN [8]
E22
DPWROK_R
B9
PCIE_WAKE#
N3
CLKRUN#
G8
AH45
AH47
AF49
AF45
PCIE_WAKE# [19,23]
CLKRUN#
T23
C323
N14
AH43
AH49
AF47
AF43
[27]
*33P/50V_4N
SUSCLK [27]
D10
H4
SUSC# [27]
F4
[17] CRT_DDCCLK
[17] CRT_DDCDAT
R408
R407
[17] CRT_HSYNC
[17] CRT_VSYNC
20/F_4 INT_CRT_HSYNC_R
20/F_4 INT_CRT_VSYNC_R
M47
M49
DAC_IREF
T43
T42
T12
G16
SLP_SUS#_R
AP14
R173
1K/F_4
PM_SYNC [3]
K14
R406
150/F_4
INT_CRT_BLU
R405
150/F_4
INT_CRT_GRE
R404
150/F_4
INT_CRT_RED
SDVO_TVCLKINN
SDVO_TVCLKINP
L_BKLTCTL
SDVO_STALLN
SDVO_STALLP
L_DDC_CLK
L_DDC_DATA
SDVO_INTN
SDVO_INTP
Deep Sx <CLG>
LVD_IBG
LVD_VBG
SDVO_CTRLCLK
SDVO_CTRLDATA
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
PM_RI#
R450
10K_4
XDP_DBRST#
R481
1K_4
PM_BATLOW#
R220
8.2K_4
PCIE_WAKE#
R457
10K_4
RSMRST#
R430
10K_4
GPIO29
R197
10K_4
SYS_PWROK
R277
100K_4
SUS_PWR_ACK
R447
10K_4
LCD_BLON_I
R57
*100K_4
DELAY_VR_PWRGOOD
SYS_PWROK 4
1
U17
MPWROK
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DAC_IREF
CRT_IRTN
INT_HDMI_SCL [16]
INT_HDMI_SDA [16]
AT49
AT47
AT40
DDPD_AUXN
DDPD_AUXP
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
C_TMDSD_DATA2#
C_TMDSD_DATA2
C_TMDSD_DATA1#
C_TMDSD_DATA1
C_TMDSD_DATA0#
C_TMDSD_DATA0
C_TMDSD_CLK#
C_TMDSD_CLK
R398
R395
*10K_4
*10K_4
P46
P42
IHM@0.1U/10V_4X
IHM@0.1U/10V_4X
IHM@0.1U/10V_4X
IHM@0.1U/10V_4X
IHM@0.1U/10V_4X
IHM@0.1U/10V_4X
IHM@0.1U/10V_4X
IHM@0.1U/10V_4X
HDMITX2N
HDMITX2P
HDMITX1N
HDMITX1P
HDMITX0N
HDMITX0P
HDMICLKHDMICLK+
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
TP17
TP18
AP47
AP49
AT38
TP65
TP64
TP25
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
TP69
TP73
TP16
TP14
TP72
TP68
TP75
TP70
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
B
REV-C3A Reserve R437
Net Name
Ra
+3V_S5
*10K_4
Rb
+3V_DSW
R437
*0_4
Rc
[3,33]
R448
*0_4
Rd
SUSACK#_R
R449
0_4
Re
SUS_PWR_ACK [27]
R434
0_4
Rf
RSMRST#
DPWROK_R
R435
*0_4
Rg
SYS_HWPG [27,29]
SLP_SUS#_R
R212
*0_4
Rh
SLP_SUS# [27]
SUS_PWR_ACK_R
AC_PRESENT [27]
Deep Sx Support
Deep Sx No Support
AC_PRESENT
Rb,Rc stuff
Ra stuff
SUS_PWR_ACK
Rd stuff
Re stuff
DPWROK
Rg stuff
Rf stuff
SLP_SUS
Rh stuff
*TC7SH08FU(F)
Rh No stuff
R276
*S3@200/F_4
+3V
Port-B_HPD [16]
C241
C242
C240
C239
C462
C463
C460
C461
MPWROK [27,33]
R226
*100K_4
PM_DRAM_PWRGD R223
DDPC_CTRLCLK
DDPC_CTRLDATA
P38
M39
CougarPoint_R1P0
10K_4
AC_PRESENT_R
C298
*0.1U/10V_4X
[15] SYS_PWROK
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
CRT_HSYNC
CRT_VSYNC
R440
8.2K_4
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPD_CTRLCLK
DDPD_CTRLDATA
R439
REV-A1A Reserve U9000,R9042,Mount R9046
R460
AP39
AP40
L_CTRL_CLK
L_CTRL_DATA
+3V_S5
+3V_S5
CLKRUN#
AP43
AP45
AM42
AM40
GPIO29
System PWR_OK <CLG>
+3V
T39
M40
SUSB# [27]
G10
N48
P49
T49
INT_CRT_BLU
INT_CRT_GRE
INT_CRT_RED
[17] CRT_BLU
[17] CRT_GRE
[17] CRT_RED
T11
CougarPoint_R1P0
PCH Pull-high/low <CLG>
AF40
AF39
L_BKLTEN
L_VDD_EN
LVDS
AY24
AY20
AY18
AU18
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
Digital Display Interface
AW24
AW20
BB18
AV18
[3] DMI_TXN0
[3] DMI_TXN1
[3] DMI_TXN2
[3] DMI_TXN3
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
CRT
[3] DMI_RXP0
[3] DMI_RXP1
[3] DMI_RXP2
[3] DMI_RXP3
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
FDI
BE24
BC20
BJ18
BJ20
DMI
BC24
BE20
BG18
BG20
[3] DMI_RXN0
[3] DMI_RXN1
[3] DMI_RXN2
[3] DMI_RXN3
D
PROJECT : BU5
Size
Document Number
Date:
0_4
Rev
2A
Cougar Point 1/6

3
Sheet
of
35
C498
18P/50V_4C
C497
18P/50V_4C
SRTC_RST#
R72
RTC_X1
A20
RTC_X2
C20
RTC_RST#
D20
G22
SRTC_RST#
1K_4
1U/10V_4X
SM_INTRUDER#
K22
PCH_INVRMEN
C17
ACZ_BITCLK
N34
*SHORT_ PAD
1
CN9
ACZ_SYNC
L34
PCBEEP
T10
K34
ACZ_RST#
ACZ_SDIN0_AUDIO
E34
RTC_BAT(RTC SOCKET-2032)
G34
TP26
+3V
C34
A34
R132
*33P/50V_4N
N32
[21] HDPLOC
R129
0_4
REV-C3A Change power rail from +5V to +3V

and mount R129, reserve R132 C222 Q16
33_4
ACZ_BITCLK
R130
33_4
ACZ_SYNC_R
R427
33_4
ACZ_RST#
R422
33_4
TP83
PCH_JTAG_TCK
J3
PCH_JTAG_TMS
H7
PCH_JTAG_TDI
K5
PCH_JTAG_TDO
H1
+3VPCU
+3V_S5
R230
210/F_4
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TCK
R244
100/F_4
R229
100/F_4
MX25L3205DM2I-12G: AKE39FP0Z00
PCH Dual SPI (CLG)
+3V
U16
3
C509
*22P/50V_4N
+3V
R474
CE#
SCK
SI
SO
VDD
HOLD#
WP#
VSS
W25X32VSSIG
3.3K/F_4
C328
0.1U/10V_4X
REV-A1A change footprint

from socket type to W25X32VSSIG
[18,27]
HDA_SDIN2
HDA_SDIN3
HDA_DOCK_EN# / GPIO33
+3V
HDA_DOCK_RST# / GPIO13
+3V_S5
JTAG_TDI
R465
*10K_4
PCH_SPI_CLK
T3
PCH_SPI_CS0#
Y14
PCH_SPI_CS1#
T1
PCH_SPI_SI
V4
PCH_SPI_SO
U3
Y10
SATAICOMPI
JTAG_TDO
SATA_COMP
R214
37.4/F_4
AB13
SATA3_COMP
R209
49.9/F_4
AH1
SATA3_RBIAS
R472
+1.05V
AB12
SATA3RBIAS
SPI_CS1#
P3
750/F_4
SATALED#
SPI_MOSI
+3V
SATA0GP / GPIO21
SPI_MISO
+3V
SATA1GP / GPIO19
SATA_LED# [26]
V14
GPIO21
P1
GPIO19
GPIO21
Strap description
Sampled
PWROK
0 = Default (weak pull-down 20K)

1 = Setting to No-Reboot mode
GNT3# / GPIO55
Top-Block Swap Override
PWROK
0 = "top-block swap" mode

1 = Default (weak pull-up 20K)
Should be always pull-up
INTVRMEN
Integrated 1.05V VRM enable
ALWAYS
Boot BIOS Selection 1 [bit-1]
PWROK
GPIO19
Boot BIOS Selection 0 [bit-0]
PWROK
G3
*SHORT_ PAD
CougarPoint_R1P0
GNT1# / GPIO51
SATA ODD
TP47
TP50
TP49
TP46
SPI_CS0#
No reboot mode setting
Configuration
GNT1#
GPIO19
+3V
+3V_RTC
R238
*1K_4
R403
*1K_4
R438
330K_4
R399
*1K_4
R478
*1K_4
PCBEEP
REV-B2A Add G3 for Clear CMOS password
PCI_GNT3#
[9]
PCH_INVRMEN
Boot Location
SPI
LPC
HDA_SDO
Flash Descriptor Security
RSMRST
0 = Override
DF_TVS
DMI/FDI Termination voltage
PWROK
0 = Set to Vss
1 = Set to Vcc (weak pull-down 20K)
RSMRST#
0 = Disable
1 = Enable (Default)
On-die PLL Voltage Regulator
SATA_RXN_ODD# [21]
SATA_RXP_ODD [21]
SATA_TXN_ODD# [21]
SATA_TXP_ODD [21]
Y11
SATAICOMPO
SPI_CLK
TP53
TP51
TP81
TP82
Y3
SATA_RXN5
Y1
SATA_RXP5
AB3 SATA_TXN5_C
AB1 SATA_TXP5_C
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
JTAG_TCK
Remove SATA port 2 12/29
Y7
Y5
AD3
AD1
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA HDD/SSD
TP41
TP45
TP39
TP43
AB8 SATA_RXN3
AB10 SATA_RXP3
AF3 SATA_TXN3_C
AF1 SATA_TXP3_C
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
HDA_SDO
JTAG_TMS
AD7
AD5
AH5
AH4
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
HDA_SDIN1
SATA_RXN_1ST_HDD# [21]
SATA_RXP_1ST_HDD [21]
SATA_TXN_1ST_HDD# [21]
SATA_TXP_1ST_HDD [21]
+3V
R423
*1K_4 ACZ_SDOUT
R463
R464
+3VPCU
0 = Support by 1.8V (weak pull-down)

1 = Support by 1.5V
GNT1# [9]
2.2K_4
4.7K_4
R222
*10K_4
R228
*1K_4
R136
GPIO19
ACZ_SDOUT
+1.8V
DF_TVS [10]
H_SNB_IVB# [3]
PLL_ODVR_EN
1K_4
RSMRST
GPIO15
TLS Confidentiality
RSMRST
0 = Default. TLS no Confidentiality

1 = TLS Confidentiality
DSWVRMEN
Deep S4/S5 Well On -Die

Voltage Regulator Enable
ALWAYS
0 = Disable
1 = Enable
INIT3_3V#
Reserved
PWROK
Should not pull low. leave as No Connect
GNT2#/
GPIO53
ESI Strap (Server Only)
PWROK
1 = Default. Should not be pulled low

for desktop and mobile
Should not pull low for desktop and mobile
L_DDC_DATA
LVDS Detected
PWROK
0 = Default. Not Detected

1 = Detected
1= PU to 3V
SDVO_CTRLDATA
Port B Detected
PWROK

1 = Detected
1= PU to 3V
0=NC
R462
+3V_S5
1K_4
GPIO15 [10]
DSWVREN
+3V_RTC
R443
330K_4
[10]
ACZ_SYNC
On-Die PLL VR Voltage Select
+3V_S5
[27]
R442
[7]
*330K_4
3.3K/F_4
8.2K_4
10K_4
10K_4
LDRQ#1 [18]
SERIRQ
AM10 SATA_RX1N
AM8 SATA_RX1P
AP11 SATA_TXN1_C
AP10 SATA_TXP1_C
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
HDA_SDIN0
8
7 R459
R234
R267
R266
TP24
SERIRQ
AM3
AM1
AP7
AP5
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
HDA_RST#
Pin Name
HDA_SYNC
1
6
5
2
SPKR
SPKR
GPIO28
W25X32VSSIG: AKE39ZP0N00
PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
HDA_SYNC
ACZ_SDOUT
PCH JTAG Debug (CLG)
R466
51_4
HDA_BCLK
SATA3COMPI
PCH Strap Table
V5
SERIRQ
SATA3RCOMPO
ACZ_SDIN0_AUDIO
R233
210/F_4
E36 PCH_DRQ#0
K36
LDRQ0#
LDRQ1# / GPIO23
+3V
SERIRQ
GPIO19
GPIO21
LFRAME# [18,27]
R177
[22] ACZ_RST#_AUDIO
[22] ACZ_SDIN0_AUDIO
+3V
INTVRMEN
*33P/50V_4N
[22] ACZ_SYNC_AUDIO
[22] ACZ_SDOUT_AUDIO
SRTCRST#
INTRUDER#
LAD0 [18,27]
LAD1 [18,27]
LAD2 [18,27]
LAD3 [18,27]
D36
FWH4 / LFRAME#
ACZ_SYNC
Q16
*2N7002K_300MA
HDA Bus <ADO>
C36
TP27
C222
ACZ_SYNC_R
A36
ACZ_SDOUT
*33K/F_4
[22] BIT_CLK_AUDIO
RTCRST#
G2
[22] PCBEEP
C256
C38
A38
B37
C37
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
20MIL
1M_4
VCCRTC_2
C127
R429
+3V_RTC
RTC_RST#
RTCX2
SATA 6G
20K_6
R83
RTCX1
LPC
R436
10M_4
1U/10V_4X
20MIL
08
U25A
Y5
32.768KHZ_20
G1
*SHORT_ PAD
3
4
1U/10V_4X
IHDA
C126
C92
RTC
D7
CH500H-40PT
SATA
20K_6
2
1
R82
Cougar Point (HDA,JTAG,SATA)
20MIL
JTAG
+3V_RTC
CH500H-40PT
D6
SPI
+3VPCU
VCCRTC_1
PCH2 <CLG> <ADO> <RTC>
RTC Circuit <RTC>
DDPC_CTRLDATA
Port C Detected
PWROK

1 = Detected
DDPD_CTRLDATA
Port D Detected
PWROK

1 = Detected
0=NC
SATA3GP/
GPIO37
Reserved
PWROK
0 = Default
Should not be pulled high when strap is sampled
SATA2GP/
GPIO36
Reserved
PWROK
0 = Default
Should not be pulled high when strap is sampled

PROJECT :BU5
Size
Document Number
Date:
Rev
2A
Cougar Point 2/6

Sheet
1
of
35
09
<CLG> <U3B> <USB> <MNW> <MNT> <LAN>
Cougar Point-M (PCI-E,SMBUS,CLK)

U25B
TP42
K40
K38
H38
G38
GPIO50
GPIO52
GPIO54
C46
C44
E40
GNT1#
TP21
PCI_GNT3#
D47
E42
F46
PIRQE#
PIRQF#
PIRQG#
PIRQH#
G42
G40
C42
D44
PCI_PME#
K10
PCI_PLTRST#
TP74
TP20
CLK_PCI_FB
R164
PCLK_DEBUG R387
PCLK_591
R171
[18] PCLK_DEBUG
[27] PCLK_591
22_4
22_4
22_4
CLK_PCI0_R
CLK_PCI1_R
CLK_PCI_FB_R
PCLK_DEBUG_R
PCLK_591_R
C6
H49
H43
J48
K42
H40
RSVD26
RSVD27
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
PIRQA#
PIRQB#
PIRQC#
PIRQD#
RSVD28
RSVD29
AV5
AV10
NV_ALE
TP44
WLAN
[18] PCIE_RXN_WLAN#
[18] PCIE_RXP_WLAN
[18] PCIE_TXN_WLAN#
[18] PCIE_TXP_WLAN
LAN
[23] PCIE_RXN_LAN#
[23] PCIE_RXP_LAN
[23] PCIE_TXN_LAN#
[23] PCIE_TXP_LAN
AT8
AY5
BA2
C253
C255
C236
C235
0.1U/10V_4X
0.1U/10V_4X
BG36
BJ36
AV34
AU34
BF36
BE36
AY34
BB34
T18
T19
T5
T14
BG37
BH37
AY36
BB36
0.1U/10V_4X
0.1U/10V_4X
C246
C245
PCIE_TXN_3G#_C
PCIE_TXP_3G_C
T20
T17
T22
T21
0.1U/10V_4X
0.1U/10V_4X
PCIE_TXN_WLAN#_C
PCIE_TXP_WLAN_C
BJ38
BG38
AU36
AV36
PCIE_TXN_LAN#_C
PCIE_TXP_LAN_C
BG40
BJ40
AY40
BB40
AT12
BF3
BE38
BC38
AW38
AY38
REV-A1A Change port from 6 to 0
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
+3V
+3V
+3V
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
+3V
+3V
+3V
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
+3V
+3V
+3V
+3V
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
TP80
TP79
USBP1USBP1+
USB_3G#
USB_3G
USB_CARD#
USB_CARD
USB_SIM#
USB_SIM
USB_EXT2#
USB_EXT2
USB_EXT1#
USB_EXT1
USB_BIAS
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
WLAN
A14
K20
B17
C16
L16
A16
D14
C14
[18] CLK_PCIE_MINI#
[18] CLK_PCIE_MINI
R153
R152
0_4
0_4
CLK_PCIE_MINI#_R
CLK_PCIE_MINI_R
[18] PCIE_CLK_REQ1#
R274
0_4
PCIE_CLK_REQ1#_R
USB_CCD# [17]
USB_CCD [17]
TP33
TP36
USB 2.0 (R)

USB 2.0 (L)
3G
[18] CLK_PCIE_3G#
[18] CLK_PCIE_3G
[18] PCIE_CLK_3G_REQ#
CCD
T15
T16
3G@0_4 CLK_PCIE_3G#_R
3G@0_4 CLK_PCIE_3G_R
3G@0_4 PCIE_CLK_3G_REQ#_R
REV-B2A Reserve 0 ohm, modify control from

EC
USB_SC_OC_PCH#_R
USB_BUS_SW2_R
USB_BUS_SW0
USB_BUS_SW3_R
USB_OC4#
USB30_SMI#
USB_OC6#
USB_OC7#
R207
R583
0_4
*0_4
R584
R205
*0_4
0_4
R218
0_4
[19] CLK_PCIE_USB30#
[19] CLK_PCIE_USB30
[19] PCIE_CLK_USB30_REQ#
A8
Y43
Y45
PCIE_CLKREQ_REV1#
L12
R149
R148
U3@0_4 CLK_PCIE_USB30#_R
U3@0_4 CLK_PCIE_USB30_R
V45
V46
R143
L14
U3@0_4 PCIE_CLK_USB30_REQ#_R
REV-A1A change PCIE CLK port

PCIE1 clock WLAN
PCIE5 clock USB3.0 IC
USB_SC_OC_PCH# [19]
USB_BUS_SW2 [19,27]
Y37
Y36
CLK_PCIE_REV1N
CLK_PCIE_REV1P
TP23
TP19
22.6/F_4
M1
V10
R280
USB_WLAN# [18]
USB_WLAN [18] WLAN
R426
AB49
AB47
AA48
AA47
R151
R150
EHCI2
USB3.0
B33
PCIE_CLK_REQ_LAN#_R J2
GPIO20
USB_WLAN#
USB_WLAN
C33
CLK_PCIE_LAN#_R
CLK_PCIE_LAN_R
0_4
REV-A1A Add R7585,R7581,R7582

USB_EXT2# [20]
USB_EXT2 [20]
USB_EXT1# [20]
USB_EXT1 [20]
TP28
TP30
USB_CCD#
USB_CCD
0_4
0_4
R271
[23] PCIE_CLK_REQ_LAN#
EHCI1
Reader
Y40
Y39
R166
R165
[23] CLK_PCIE_LAN#
[23] CLK_PCIE_LAN
LAN
USB 2.0 (Colay w/ USB 3.0)
USB_3G# [18]
3G
USB_3G [18]
USB_CARD# [20]
USB_CARD [20] Card
USB_SIM# [18]
SIM
USB_SIM [18]
TP35
TP34
TP37
TP32
PME#
PLTRST#
USBP1- [19]
USBP1+ [19]
TP38
TP78
AB42
AB40
S3_STRAP
USB_BUS_SW3 [19,27]
USBOC#9 [20,27]
USB30_SMI# [19]
E6
V40
V42
REV-A1A Del USBOC#8
SCI# [27]
PCIE_CLKRQ6#
T13
CougarPoint_R1P0
CLK_PCI_FB
GPIO46
T9
T10
REV-A1A for EMI
CLK_REQ/Strap Pin <CLG>
PCI/USBOC# Pull-up <CLG>
+3V_S5
+3V_S5
+3V_S5
+3V
R441
10
9
USB_OC4#
USB_BUS_SW2_R 8
7
USB_BUS_SW0
USB_BUS_SW3_R 6
C330
*0.1U/10V_4X
2
1
2
3
4
5
USB_OC6#
USB_SC_OC_PCH#_R
USB_OC7#
USB30_SMI#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
R160
R158
R176
R170
8.2K_4
8.2K_4
8.2K_4
8.2K_4
PERN3
PERP3
PETN3
PETP3
SML0ALERT# / GPIO60
SML0CLK
SML0DATA
PERN4
PERP4
PETN4
PETP4
+3V_S5
PERN5
PERP5
PETN5
PETP5
SML1ALERT# / PCHHOT# / GPIO74
PERN6
PERP6
PETN6
PETP6
+3V_S5
SML1CLK / GPIO58
+3V_S5
SML1DATA / GPIO75
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
CL_CLK1
CL_DATA1
CL_RST1#
+3V_S5
PEG_A_CLKRQ# / GPIO47
CLKOUT_PCIE0N
CLKOUT_PCIE0P
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
+3V_S5
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
CLKOUT_DMI_N
CLKOUT_DMI_P
+3V
CLKOUT_PCIE2N
CLKOUT_PCIE2P
CLKIN_DMI_N
CLKIN_DMI_P
+3V
CLKOUT_PCIE3N
CLKOUT_PCIE3P
CLKIN_GND1_N
CLKIN_GND1_P
+3V_S5
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKOUT_PCIE4N
CLKOUT_PCIE4P
CLKIN_SATA_N
CLKIN_SATA_P
+3V_S5
CLKOUT_PCIE5N
CLKOUT_PCIE5P
REFCLK14IN
+3V_S5
PLTRST# [3,18,19,23,27]
+3V
SMBALERT#
H14
SCLK
C9
SDATA
SDATA [18,23]
A12
DRAMRST_CNTRL_PCH
DRAMRST_CNTRL_PCH
C8
SMB_ME0_CLK
G12
SMB_ME0_DAT
C13
SML1ALERT#_R
E14
SMB_ME1_CLK
M16
SMB_ME1_DAT
SCLK [18,23]
[15]
D
R204
*0_4
TP40
For EC,G-SENSOR,ID ROM
M7
T11
P10
M10 CLK_PEGA_REQ#
AB37
AB38
TP48
DEL CLK_PCIE_VGAN,CLK_PCIE_VGAP
AV22
AU22
CLK_CPU_BCLKN [3]
CLK_CPU_BCLKP [3]
C
CLKOUT_DP_N
CLKOUT_DP_P
E12
CLKIN_PCILOOPBACK
AM12
AM13
BF18 CLK_BUF_PCIE_3GPLLN
BE18 CLK_BUF_PCIE_3GPLLP
BJ30 CLK_BUF_BCLKN
BG30 CLK_BUF_BCLKP
G24 CLK_BUF_DREFCLKN
E24 CLK_BUF_DREFCLKP
AK7 CLK_BUF_DREFSSCLKN
AK5 CLK_BUF_DREFSSCLKP
K45
REV-C3A Change C456,C457 value

from 18P to 27P
C237
*22P/50V_4N
C247
*22P/50V_4N
CLK_PCH_14M
CLK_PCH_ITPN
CLK_PCH_ITPP
K12
AK14
AK13
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
XTAL25_IN
XTAL25_OUT
H45 CLK_PCI_FB
PEG_B_CLKRQ# / GPIO56
R264
R265
R216
R245
R217
10K_4
10K_4
*10K_4
*10K_4
*10K_4
PCIE_CLK_REQ_LAN#_R
PCIE_CLK_3G_REQ#_R
PCIE_CLKREQ_REV1#
PCIE_CLKRQ6#
GPIO46
R261
R269
*10K_4
10K_4
GPIO20
PCIE_CLK_REQ1#_R
10K_4
PCIE_CLK_USB30_REQ#_R
V47
V49
C457
XTAL25_IN
XTAL25_OUT
27P/50V_4N
Y4
R402
1M_4
25MHZ_30
+3V_S5
C456
XCLK_RCOMP
Y47
XCLK_RCOMP R401
90.9/F_4
K43
CLK_FLEX0
R172
*22_4
F47
CLK_FLEX1
R400
*EV@22_4
R409
*22_4
27P/50V_4N
+1.05V
CLKOUT_PCIE6N
CLKOUT_PCIE6P
+3V_S5
CLKOUT_PCIE7N
CLKOUT_PCIE7P
+3V_S5
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
+3V
CLKOUTFLEX0 / GPIO64
+3V
+3V
+3V
TP22
K49
CLK_FLEX3
TP66
TP15
48M_CARD [20]
REV-B2A Reserve
SMBus/Pull-up <CLG>
PCH_CLK_27M
H47 CLK_FLEX2
C451
*33P/50V_4N
+3V_S5
33MHz
R275
2.2K_4
CLK_FLEX0
SMB_ME1_CLK
CLK_FLEX1
27MHz
48/24MHz
14.318MHz
25MHz
+3V
10KX8
4
+3V_S5
CougarPoint_R1P0
PLTRST# <CLG>
PCI_PLTRST#
V38
V37
T7
T8
C248
*22P/50V_4N
C447
*22P/50V_4N
C234
*22P/50V_4N
PCLK_DEBUG
SMBDATA
PCLK_591
SMBCLK
PERN2
PERP2
PETN2
PETP2
SMBUS
3G
BE34
BF34
PCIE_TXN_USB30#_C BB32
AY32
PCIE_TXP_USB30_C
PCI-E*
[18] PCIE_RXN_3G#
[18] PCIE_RXP_3G
[18] PCIE_TXN_3G#
[18] PCIE_TXP_3G
0.1U/10V_4X
0.1U/10V_4X
SMBALERT# / GPIO11
Link
RSVD25
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
C261
C258
Controller
RSVD23
RSVD24
[19] PCIE_RXN_USB30#
[19] PCIE_RXP_USB30
[19] PCIE_TXN_USB30#
[19] PCIE_TXP_USB30
USB3.0
+3V_S5
[8] GNT1#
[8] PCI_GNT3#
[21] ODD_MD#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
TP21
TP22
TP23
TP24
AT10
BC8
PERN1
PERP1
PETN1
PETP1
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
AY7
AV7
AU3
BG4
FLEX CLOCKS
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
RSVD5
RSVD6
RSVD
B21
M20
AY16
BG46
RSVD1
RSVD2
RSVD3
RSVD4
PCI
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
USB
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45
BG34
BJ34
AV32
AU32
TP77
TP76
TP31
TP29
U25E
CLOCKS
Cougar Point-M (PCI,USB,NVRAM)
[21,27] 2ND_MBCLK
+3V_S5
+3V_S5
Q18
2N7002_200MA
CLK_FLEX2
R476
100K_4
PIRQE#
ODD_MD#
GPIO54
PIRQF#
10
9
8
7
6
1
2
3
4
5
PIRQG#
PIRQH#
GPIO50
GPIO52
R272
10KX8
R468
CLK_FLEX3
+3V_S5
R247
R237
0_4
R286
2.2K_4
R157
U27
*TC7SH08FU(F)
NS3@10K_4
*S3@10K_4
S3_STRAP
3
[21,27] 2ND_MBDATA
SMB_ME1_DAT
Q21
2N7002_200MA
+3V_S5
A
R243
R232
IV@10K_4 CLK_PEGA_REQ#
**EV@10K_4
+3V_S5
REV-B2A Add R489 for S3 Enable Strap

NS3@1K_4 DRAMRST_CNTRL_PCH
*S3@10K_4
R446
R489
CLK_BUF_BCLKN
CLK_BUF_BCLKP
R184
R183
10K_4
10K_4
CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP
CLK_BUF_DREFCLKN
CLK_BUF_DREFCLKP
CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP
CLK_PCH_14M
R208
R206
R188
R187
R236
R235
R156
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
+3V_S5
R219
R201
R458
R469
R203
R202
10K_4
2.2K_4
2.2K_4
2.2K_4
2.2K_4
10K_4
SMBALERT#
SCLK
SDATA
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R

PROJECT : BU5
Size
Document Number
Date:
Rev
2A
Cougar Point 3/6

5
Sheet
of
35
<CLG>
10
BOARD ID SETTING <CLG>
Cougar Point (GPIO,VSS_NCTF,RSVD)

U25F
[21] BOARD_ID6
D
[21] ODD_EN
[21] HDPACT
[8] GPIO15
BOARD_ID5
A42
BOARD_ID6
H36
BOARD_ID2
E38
ODD_EN
C10
HDPACT
C4
GPIO15
G2
BOARD_ID9
U2
GPIO17
D40
GPIO22
T5
USB_BUS_SW1
GPIO27
[8] PLL_ODVR_EN
PLL_ODVR_EN
STP_PCI#
[21] ODD_PRSNT#
K1
+3V
TACH4 / GPIO68
TACH1 / GPIO1
+3V
+3V
TACH5 / GPIO69
TACH2 / GPIO6
+3V
+3V
TACH6 / GPIO70
TACH3 / GPIO7
+3V
+3V
TACH7 / GPIO71
GPIO8
LAN_PHY_PWR_CTRL / GPIO12
A20GATE
PECI
SATA4GP / GPIO16 +3V

TACH0 / GPIO17 +3V
SCLOCK / GPIO22
+3V
RCIN#
GPIO24 / MEM_LED+3V_S5
GPIO27
DSW
GPIO28
+3V_S5
STP_PCI# / GPIO34
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
TS_VSS1
+3V
K4
GPIO35 +3V
V8
TS_VSS3
TS_VSS4
N2
SLOAD / GPIO38 +3V
M3
[21] HDPINT
HDPINT
TEMP_ALERT#
TEMP_ALERT#
V3
BOARD_ID3
D6
SDATAOUT0 / GPIO39
SDATAOUT1 / GPIO48
SATA5GP / GPIO49
NC_1
A45
A46
A5
B
A6
B3
B47
BD1
BD49
BE1
BE49
BF1
BF49
1.5K/F_4
A40 R417
1.5K/F_4
+3V
+3V
VSS_NCTF_15
+3V
VSS_NCTF_16
GPIO57 +3V_S5
VSS_NCTF_17
VSS_NCTF_1
VSS_NCTF_19
VSS_NCTF_2
VSS_NCTF_20
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_6
VSS_NCTF_24
VSS_NCTF_7
VSS_NCTF_25
VSS_NCTF_8
VSS_NCTF_26
VSS_NCTF_9
VSS_NCTF_27
VSS_NCTF_10
VSS_NCTF_28
VSS_NCTF_11
VSS_NCTF_29
VSS_NCTF_12
VSS_NCTF_30
VSS_NCTF_13
VSS_NCTF_31
VSS_NCTF_14
ID1
UMA SKU
VGA SKU
H
L
ID2
W/O 3G
W/ 3G
P4
RCIN#
RCIN#
[27]
H_PWRGOOD
PCH_THRMTRIP#
R224
390_4
VSS_NCTF_32
ID6
[3]
ID7
H
L
H
L
NC
13"
DF_TVS [8]
H
L
W/ USB3.0
W/O USB3.0
AH8
ID9
H
L
W/ HDMI
W/O HDMI
T14
ID8
H
L
W/ MDC
W/O MDC
PM_THRMTRIP# [3]
AY1
ID5
W G-SNR
W/O G-SNR
AY11
AY10
ID4
H
L
14"
15"
GATEA20 [27]
AU16
P5
ID3
H
L
H
L
AK11
+3V
+3V
+3V_S5
AH10
AK10
R479
P37
R161
10K_4
IV@10K_4
BOARD_ID1
NCTF
A44
1.5K/F_4
C41 R415
Board ID
+3V
VSS_NCTF_18
A4
B41 R413
+3V_S5
GPIO15 +3V_S5
M5
V13
GPIO68
W/O LED KB
W/ LED KB
ODD_PRSNT#
BOARD_ID8
C40
+3V_S5
GPIO36
BOARD_ID1
[3,27]
P8
+3V
TS_VSS2
BOARD_ID7
C
E8
E16
BMBUSY# / GPIO0
CPU/MISC
T7
REV-B2A Reserve PCH GPIO6 to HDPACT_R
GPIO
BOARD_ID4
R246
10K_4
BOARD_ID2
BOARD_ID3
CPUSB# [18]
BG2
BG48
R461
BH3
*EV@10K_4
+3V
+3V
BH47
BJ4
R240
*10K_4
BJ44
R410
GS@10K_4
BJ45
BOARD_ID4
GPIO Pull-up/Pull-down
<CLG>
+3V_S5
BJ46
BJ5
BJ6
BOARD_ID5
R412
*NGS@10K_4
C2
C48
USB_BUS_SW1
ODD_EN
HDPACT
R227
R159
R467
*10K_4
*10K_4
*10K_4
GPIO68
TEMP_ALERT#
R167
R470
10K_4
10K_4
GPIO17
GPIO22
R416
R268
10K_4
10K_4
HDPINT
ODD_PRSNT#
STP_PCI#
GATEA20
RCIN#
R255
R259
R482
R257
R258
*10K_4
10K_4
10K_4
10K_4
10K_4
GPIO36
GPIO27
R254
R452
10K_4
10K_4
D1
+3V
D49
+3V
E1
E49
F1
+3V
R414
*MDC@10K_4
F49
BOARD_ID6
CougarPoint_R1P0
+3V
R256
HM@10K_4
R477
U3@10K_4
BOARD_ID7
BOARD_ID8
BOARD_ID9
R411
R270
R480
R471
NMDC@10K_4
*NHM@10K_4
10K_4
U2@10K_4
B2A

PROJECT : BU5
Size
Document Number
Rev
2A
Cougar Point 4/6

Date:
5
Sheet
1
10
of
35
11
PCH5 <CLG>
COUGAR POINT (POWER)
REV-C3A Reserve C539 for ESD

+VCCA_DAC_1_2
VccADAC =1mA(8mils)
+1.05V_PCH_VCCDPLL_EXP
R199
0_6
C536
*0.1U/10V_4X
+1.05V
+1.05V_VCCAPLL_EXP
L32
*1uh_6_25MA
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VccIO =2.925 A(140mils)
0_1206
AN16
AN17
C257
1U/6.3V_4X
C265
1U/6.3V_4X
C266
1U/6.3V_4X
AN21
AN26
AN27
C274
1U/6.3V_4X
C307
10U/6.3V_8X
AP21
+ C308
*C@330U/2V_7343P_E6b
AP23
AP24
AP26
+3V
AT24
+3V_VCC_EXP
R432
AN33
0_8
AN34
C493
0.1U/10V_4X
BH29
+1.05V
+VCCAFDI_VRM
+VCCAFDI_VRM
AP16
C538
*0.1U/10V_4X
R231
*0_8
+1.05V_VCCAPLL_FDI
BG6
R241
0_8
+1.05V_VCCDPLL_FDI
AP17
C537
*0.1U/10V_4X
R174
IV@0_4
R175
*EV@0_4
+3V_S5
C230
IV@0.01U/25V_4X
AD49
POWER
VCCACLK
R445
0_4
+1.8V
+1.05V
L6
+VCCPDSW
T16
PCH_VCCDSW
V12
+3V_SUS_CLKF33
T38
VCCIO[30]
VCCDSW3_3
C305
*0.1U/10V_4X
+VCCAPLL_CPY_PCH
DCPSUSBYP
VCCIO[32]
VCCIO[33]
R147
C232
IV@22U/6.3V_8X
*10uh_8_100MA
VCCSUS3_3[7]
BH23
VCCAPLLDMI2
*EV@0_4
VCCME(+1.05V) = ??A(??mils)
C496
*10U/6.3V_8X
+1.05V
R178
0_6
C540
*0.1U/10V_4X
+VCCDPLL_CPY
AL29
+VCCSUS1
AL24
VCCSUS3_3[8]
VCCIO[14]
DCPSUS[3]
VCCIO[16]
VCC3_3[6]
C279
*1U/6.3V_4X
+3V
V33
R420
V34
C480
0.1U/10V_4X
+1.05V
0_6
VCC3_3[7]
+1.1V_VCC_DMI
R190
VCCIO[17]
+1.05V_VCCEPW
R198
VCCDMI = 42mA(10mils)
VCCSUS3_3[6]
AA19
VCCASW[1]
VCCIO[34]
AA21
VccASW =1.01 A(60mils)
0_1206
VCCASW[3]
AA26
C271
1U/6.3V_4X
0_4
C278
1U/6.3V_4X
C272
1U/6.3V_4X
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCIO[18]
VCCIO[19]
VCCVRM[3]
AT16
+VCCAFDI_VRM
C283
1U/6.3V_4X
+VCCAFDI_VRM
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCIO[20]
C259
10U/6.3V_8X
VCCCLKDMI = 20mA(8mils)
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCDMI[1]
AT20
+VCC_DMI_CCI
+1.1V_VCC_DMI_CCI
VCCCLKDMI
AB36
L26
*10uh_8_100MA
R379
R384
C448
1U/6.3V_4X
C260
10U/6.3V_8X
+ C268
*C@330U/2V_7343P_E6b
+1.05V
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
*1/F_4
VCCASW[11]
AD29
0_4
C444
*10U/6.3V_8X
VCCASW[12]
AD31
VCCIO[25]
VCCASW[13]
W21
VCCIO[26]
VCCDFTERM[1]
VCC3_3[3]
VCCVRM[2]
VccAFDIPLL
VCCDFTERM[2]
AG16
AG17
+VCCP_NAND
R248
+1.8V
VCCIO[27]
VCCDMI[2]
VCCASW[14]
W23
VCCPNAND = 190 mA(15mils)
VCCDFTERM[4]
AJ16
0_8
C291
0.1U/10V_4X
V1
R485
+3V
V5REF
C508
1U/6.3V_4X
R393
C297
0.1U/10V_4X +VCCRTCEXT
C453
1U/6.3V_4X
65mA(10mils)
8mA(8mils)
R392
C452
1U/6.3V_4X
+1.05V
+VCCAFDI_VRM
+1.05V_VCCA_A_DPL
VCC3_3[1]
VCC3_3[8]
DCPRTC
Y49
VCCVRM[4]
BD47
+1.05V_VCCA_B_DPL
BF47
AF17
AF33
AF34
AG34
VCCDIFFCLKN= 55mA(10mils)
*0_6
+V1.05V_SSCVCC
C292
*1U/6.3V_4X
C295
0.1U/10V_4X +VCCSST
+1.05V
VCCIO[13]
VCCADPLLA
VCCADPLLB
+V1.05M_VCCSUS
0_4
VCCIO[3]
AG33
VCCSSC
V16
VCCRTC<1mA(8mils) +3V_RTC
C302
0.1U/10V_4X
+3V_VCCPUSB
T24
R433
0_6
V23
V24
C494
0.1U/10V_4X
P24
+3V_VCCAUBG
T26
+VCCAUPLL
M26
+5V_PCH_VCC5REFSUS
AN23
+VCCA_USBSUS
AN24
+3V_VCCPSUS
R185
0_6
+1.05V
VCC5REFSUS=1mA
T17
V19
VCCIO[4]
P34
V_PROC_IO
+5V_PCH_VCC5REF
10/F_4
D11
CH500H-40PT
R168
N20
+5V_S5
+3V_S5
10/F_4
+5V
CH500H-40PT
+3V
C252
1U/6.3V_4X
N22
P20
R200
+3V_VCCPSUS
P22
0_6
+3V_S5
VCCSUS3_3 = 119mA(15mils)
C290
1U/6.3V_4X
AA16
W16
T34
+3V_VCCPCORE
R273
0_6
+3V
VCCPCORE = 28mA(10mils)
+3V
C326
0.1U/10V_4X
AJ2
+3V
AF13
AH13
C264
0.1U/10V_4X
+V1.05S_SATA3
R242
VCCASW[22]
VCCASW[23]
VCCASW[21]
0_8
+1.05V
AH14
C306
1U/6.3V_4X
AF14
??mA(??mils)
AK1
+V1.1LAN_VCCAPLL
AF11
+VCCAFDI_VRM
AC16
+VCC_SATA
L13
*10uh_8_100MA
+1.05V
C510
*10U/6.3V_8X
VCCVRM= 114mA(15mils)
R249
0_6
+1.05V
AC17
AD17
C294
1U/6.3V_4X
+1.05V_VCCEPW
DCPSUS[1]
DCPSUS[2]
C301
0.1U/10V_4X
R138
C225
0.1U/10V_4X
C280
*1U/6.3V_4X
DCPSST
BJ8
C299
4.7U/6.3V_6X
+3V_DSW
VCCAPLLSATA
VCCIO[2]
+VTT_VCCPCPU
REV-C3A Add C533 and reserver C535,C534
VCCIO[6]
VCCVRM[1]
VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]
1mA(8mils)
R221
C276
0.1U/10V_4X
T23
C314
0.1U/10V_4X
VCCASW[20]
N16
+VCCDIFFCLK
+VCCDIFFCLKN
VCCSSC= 95mA(10mils)
R192
+3VPCU
VCCSUS3_3[5]
VCC3_3[2]
0_6
+VCCAFDI_VRM
VCCSUS3_3[4]
VCC3_3[4]
VCCASW[19]
CougarPoint_R1P0
REV-C3A Reserve C537,C538 for ESD
VCCSUS3_3[3]
VCCIO[12]
+VCCAFDI_VRM
0_6
0_6
D13
VCCSUS3_3[2]
VCCIO[5]
C322
1U/6.3V_4X
R195
T29
VCCASW[18]
W33
0_6
T27
V5REF= 1mA
VCCSPI = 20mA(8mils)
0_6
VCCSUS3_3 = 119mA(15mils)
+3V_S5
P28
VCCASW[17]
W31
R253
VCCSPI
DCPSUS[4]
VCCSUS3_3[1]
VCCASW[16]
W29
+1.05V
AJ17
V5REF_SUS
VCCASW[15]
W24
W26
VCCDFTERM[3]
C472
1U/6.3V_4X
P26
VCCASW[2]
AA24
+1.05V
VCCSUS3_3[9]
VCCSUS3_3[10]
0_8
N26
VCC3_3[5]
IV@0.1uh_8_250MA
+1.05V
R139
VCCIO[29]
VCCIO[31]
L31
C254
IV@0.01U/25V_4X
+1.05V_VCCUSBCORE
+VCCACLK
AP37
+3V_VCC_GIO
VCCIO[15]
FDI
AU20
*0_4
VCCDSW3_3= 3mA
+VCC_TX_LVDS
VccTX_LVDS=60mA(10mils)
AM38
AP36
*0.1U/10V_4X
U25J
R444
+3V_DSW
+3V
C286
0.1U/10V_4X
AK37
AM37
C539
C446
10U/6.3V_8X
+VCCALVDS
+3V_VCCME_SPI
+1.05V
C450
0.1U/10V_4X
AK36
VCCAPLLEXP
HVCMOS
+1.05V_VCCIO
R210
C443
0.01U/25V_4X
VccALVDS=1mA(8mils)
DMI
BJ22
+1.05V
R382
*0_6
VCCIO[28]
VCCIO
AN19
VCCTX_LVDS[4]
DFT / SPI
C499
*10U/6.3V_6X
U48
U47
SATA
+1.05V
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]
USB
AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
*0_8
Clock and Miscellaneous
C285
10U/6.3V_6X
Cougar Point-M (POWER)
R137
PCI/GPIO/LPC
C273
1U/6.3V_4X
+1.05V
MISC
C277
1U/6.3V_4X
HCB1608KF-181T15_1.5A
CPU
C270
1U/6.3V_4X
CRT
VccCORE =1.3 A(60mils)
0_1206
VCC CORE
+1.05V_PCH_VCC
R211
LVDS
+1.05V
+3V
L25
POWER
U25G
VCCME = 1.01A(60mils)
T21
V21
T19
VCCRTC
*CH500H-40PT
C533
10U/6.3V_6X
C534
*0.1U/10V_4X
C535
*0.1U/10V_4X
C490
1U/6.3V_4X
REV-C3A Reserve D23
C489
0.1U/10V_4X
C488
0.1U/10V_4X
CougarPoint_R1P0
+1.05V
L7
RTC
+1.5V
A22
0_6
HDA
D23
R250
+V3.3A_1.5A_HDA_IO
C492
*1U/6.3V_4X
R431
0_4
+3V
C491
0.1U/10V_4X
VCCSUSHDA= 10mA(8mils)
Modify Power from +3V_S5 to +3V
+1.05V_VCCA_A_DPL
+ C251
IV@220U/2.5V_3528P_E35b
C250
IV@1U/6.3V_4X
+ C249
IV@220U/2.5V_3528P_E35b
C244
IV@1U/6.3V_4X
R581
*0_6
*0_6
L8
R380
P32
10uh_8_100MA
+3V
R381
VCCSUSHDA
1/F_4 L27
10uh_8_100MA
10uh_8_100MA
+1.05V_VCCA_B_DPL
+3V_SUS_CLKF33
C445
10U/6.3V_8X
C449
1U/6.3V_4X
REV-B2A Reserve R581

PROJECT : BU5
Size
Document Number
Rev
2A
Cougar Point 5/6

Date:
5
Friday, December 17, 2010

1
Sheet
11
of
35
12
PCH6 <CLG>
U25I
IBEX PEAK-M (GND)

D
U25H
H5
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
CougarPoint_R1P0
A
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
CougarPoint_R1P0

PROJECT : BU5
Size
Document Number
Rev
2A
Cougar Point 6/6

Date:
5
Tuesday, December 14, 2010
Sheet
1
12
of
35
13
<DDR>
H=8
11
28
46
63
136
153
170
187
[4] M_A_DQSP[7:0]
[4] M_A_DQSN[7:0]
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
+1.5VSUS
H=8
JDIM2B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
199
+3V
77
122
125
+3V
[14,15] DDR3_DRAMRST#
R309
R92
+1.5VSUS
R111
198
30
*10K/F_4 PM_EXTTS#0
*1K/F_4
*0_4
SMDDR_VREF_DQ0
SMDDR_VREF_DIMM
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDDSPD
NC1
NC2
NCTEST
EVENT#
RESET#
VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
DDRRK-20401-TP8D
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
+SMDDR_VTERM
GND
116
120
[4] M_A_ODT0
[4] M_A_ODT1
[4]
206
[14,18] CGCLK_SMB
[14,18] CGDAT_SMB
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ15
M_A_DQ14
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ23
M_A_DQ21
M_A_DQ20
M_A_DQ22
M_A_DQ19
M_A_DQ28
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ29
M_A_DQ24
M_A_DQ30
M_A_DQ31
M_A_DQ36
M_A_DQ37
M_A_DQ35
M_A_DQ34
M_A_DQ32
M_A_DQ33
M_A_DQ39
M_A_DQ38
M_A_DQ45
M_A_DQ44
M_A_DQ47
M_A_DQ46
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ48
M_A_DQ53
M_A_DQ55
M_A_DQ54
M_A_DQ52
M_A_DQ49
M_A_DQ51
M_A_DQ50
M_A_DQ61
M_A_DQ60
M_A_DQ58
M_A_DQ59
M_A_DQ57
M_A_DQ56
M_A_DQ62
M_A_DQ63
PC2100 DDR3 SDRAM SO-DIMM

(204P)
DIMM0_SA0
DIMM0_SA1
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
GND
10K/F_4
10K/F_4
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
205
R296
R295
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

(204P)
SO-DIMMA SPD Address is 0XA0

SO-DIMMA TS Address is 0X30
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
[4] M_A_BS#0
[4] M_A_BS#1
[4] M_A_BS#2
[4] M_A_CS#0
[4] M_A_CS#1
[4] M_A_CLKP0
[4] M_A_CLKN0
[4] M_A_CLKP1
[4] M_A_CLKN1
[4] M_A_CKE0
[4] M_A_CKE1
[4] M_A_CAS#
[4] M_A_RAS#
[4] M_A_WE#
M_A_DQ[63:0]
JDIM2A
[4] M_A_A[15:0]
SMDDR_VREF_DIMM
DDRRK-20401-TP8D
Place these Caps near So-Dimm0.

SMDDR_VREF_DQ0
+1.5VSUS
C36
470P/50V_4X
R36
0_4
R39
*10K/F_4
R38
*10K/F_4
[14]
+SMDDR_VREF
+1.5VSUS
+SMDDR_VTERM
C197
0.1U/10V_4X
C171
2.2U/6.3V_6X
C88
4.7U/6.3V_6X
C35
4.7U/6.3V_6X
C68
4.7U/6.3V_6X
C85
4.7U/6.3V_6X
C52
4.7U/6.3V_6X
C37
0.1U/10V_4X
C48
4.7U/6.3V_6X
C41
2.2U/6.3V_6X
+1.5VSUS
C345
1U/6.3V_4X
C343
1U/6.3V_4X
C346
1U/6.3V_4X
C344
1U/6.3V_4X
+1.5VSUS
SMDDR_VREF_DIMM
R107
1K/F_4
SMDDR_VREF_DQ0
+ C62
C76
0.1U/10V_4X
C66
0.1U/10V_4X
C87
0.1U/10V_4X
C79
0.1U/10V_4X
R104
1K/F_4
C198
0.1U/10V_4X
C199
*0.047U/10V_4X
*C@330U/2.5V_7343P_E9a
D
+3V
C340
2.2U/6.3V_6X
PROJECT : BU5
Size
Document Number
Rev
2A
DDR3 DIMM-0
Date:
1

7
Sheet
13
8
of
35
<DDR>
14
H=4
116
120
[4] M_B_ODT0
[4] M_B_ODT1
11
28
46
63
136
153
170
187
SO-DIMMB SPD Address is 0XA4

SO-DIMMB TS Address is 0X34
[4] M_B_DQSP[7:0]
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
[4] M_B_DQSN[7:0]
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
[4]
H=4
+1.5VSUS
M_B_DQ4
M_B_DQ5
M_B_DQ7
M_B_DQ6
M_B_DQ0
M_B_DQ1
M_B_DQ3
M_B_DQ2
M_B_DQ12
M_B_DQ13
M_B_DQ11
M_B_DQ15
M_B_DQ9
M_B_DQ8
M_B_DQ14
M_B_DQ10
M_B_DQ20
M_B_DQ21
M_B_DQ23
M_B_DQ22
M_B_DQ17
M_B_DQ16
M_B_DQ19
M_B_DQ18
M_B_DQ29
M_B_DQ28
M_B_DQ26
M_B_DQ27
M_B_DQ24
M_B_DQ25
M_B_DQ30
M_B_DQ31
M_B_DQ36
M_B_DQ32
M_B_DQ34
M_B_DQ35
M_B_DQ33
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ45
M_B_DQ44
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ55
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ50
M_B_DQ61
M_B_DQ60
M_B_DQ58
M_B_DQ62
M_B_DQ56
M_B_DQ57
M_B_DQ63
M_B_DQ59
JDIM1B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
+3V
199
77
122
125
+3V
[13,15] DDR3_DRAMRST#
[13] SMDDR_VREF_DIMM
R294
10K/F_4
R110
*0_4
PM_EXTTS#1
SMDDR_VREF_DQ1
198
30
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDDSPD
NC1
NC2
NCTEST
EVENT#
RESET#
VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
DDRRK-20401-TP4B
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
+SMDDR_VTERM
GND
10K/F_4
10K/F_4
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
206
R1
R2
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

(204P)
+3V
[13,18] CGCLK_SMB
[13,18] CGDAT_SMB
109
108
79
114
121
101
103
102
104
73
74
115
110
113
DIMM1_SA0 197
DIMM1_SA1 201
202
200
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
GND
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
205
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

(204P)
[4] M_B_BS#0
[4] M_B_BS#1
[4] M_B_BS#2
[4] M_B_CS#0
[4] M_B_CS#1
[4] M_B_CLKP0
[4] M_B_CLKN0
[4] M_B_CLKP1
[4] M_B_CLKN1
[4] M_B_CKE0
[4] M_B_CKE1
[4] M_B_CAS#
[4] M_B_RAS#
[4] M_B_WE#
M_B_DQ[63:0]
JDIM1A
[4] M_B_A[15:0]
A
DDRRK-20401-TP4B
Place these Caps near So-Dimm1.

+1.5VSUS
SMDDR_VREF_DIMM
+SMDDR_VTERM
C42
4.7U/6.3V_6X
C39
0.1U/10V_4X
C341
C81
4.7U/6.3V_6X
C34
2.2U/6.3V_6X
C6
1U/6.3V_4X
C55
4.7U/6.3V_6X
C342
1U/6.3V_4X
1U/6.3V_4X
C50
4.7U/6.3V_6X
C4
1U/6.3V_4X
C63
4.7U/6.3V_6X
C47
4.7U/6.3V_6X
C192
0.1U/10V_4X
C83
0.1U/10V_4X
C201
2.2U/6.3V_6X
C71
0.1U/10V_4X
C40
0.1U/10V_4X
C54
0.1U/10V_4X
+1.5VSUS
SMDDR_VREF_DQ1
R109
1K/F_4
+1.5VSUS
SMDDR_VREF_DQ1
+ C61
R108
1K/F_4
+3V
C11
C194
0.1U/10V_4X
C193
*0.047U/10V_4X
*C@330U/2.5V_7343P_E9a
2.2U/6.3V_6X

PROJECT : BU5
Size
Document Number
Rev
2A
DDR3 DIMM-1
Date:
1

7
Sheet
14
8
of
35
S3 power Reduction (SM_DRAMRST#) <S3P> <4>
22
S3 power Reduction (SM_DRAMPWROK)<S3P> <3>
REV-B2A Always mount R377

+3V_S5
+1.5VSUS
+1.5V_CPU
R377
1K/F_4
R374
*S3@0_4
CPU_DRAMRST#
[3]
Q28
*S3@2N7002_200MA
4 PM_DRAM_PWRGD_Q
R117
130/F_4
PM_DRAM_PWRGD_R
R375
*S3@4.99K/F_4
<S3P> <3>
[3]
*S3@TC7SH08FU(F)
R115
**S3@39/F_4 3
Q15
R118
For S3 power Reduction Sequence
PM_DRAM_PWRGD_R
[7] PM_DRAM_PWRGD
C440
*S3@0.047U/10V_4X
R114
200/F_4
U13
[7] SYS_PWROK
[9] DRAMRST_CNTRL_PCH
C212
*S3@0.1U/10V_4X
1K/F_4
DDR3_DRAMRST#
R378
[13,14]
NS3@0_4
R376
**S3@2N7002K_300MA
MAINON_ON_G
NS3@0_4
[34]
S3 power Reduction (CPU Power) <S3P> <5>

4.5A
+SMDDR_VREF
+3V_S5
R105
R96
5
R99
S3_1.5V
0_4
*S3@10K_4
[29,30,34]
*S3@TC7SH08FU(F)
MAIND
MAIND
NS3@0_1206
NS3@0_1206
C78
*S3@0.1U/10V_4X
C75
*S3@0.1U/10V_4X
C65
*S3@0.1U/10V_4X
C70
*S3@0.1U/10V_4X
REV-A1A Modify those to S3@
*S3@10K_4
[21,27,31,34]
1
U12
R493
R58
NS3@0_8
R94
MAINON
+1.5V_CPU
REV-C3A Add R493
R95
2
[30]
+1.5VSUS
NS3@0/F_6
+3V_S5
+VDDR_REF_CPU
+1.5V_CPU
Q11
*S3@2N7002_200MA
R93
100K_4
REV-B2A change R99 from 100k to 0

**S3@0_4
S3_Power Sequence
[27]
2 R102
8
7
6
5
*S3@1K_4
REV-B2A Always mount R93
Q12
*S3@FDV301N_200MA
MAIND
R103
*S3@0_6
MAINON_ON_G
1
2
3
Q13
*S3@2N7002_200MA
R98
[34]
C10
**S3@470P/50V_4X
Q14
R48
*S3@220_8
*S3@2N7002K_300MA
Q8
*S3@AO4466_9.4A
[34]
For S3 power Reduction VTT discharge<S3P> <13>
MAINON_ON_G
Q7
*S3@2N7002_200MA
+SMDDR_VTERM
B
R33
*S3@22_4
MAINON_ON_G
Q4
*S3@2N7002_200MA
[34]

PROJECT : BU5
Size
Document Number
Rev
2A
S3 power Reduction
Date:
5

1
Sheet
15
of
35
HDMI-SMBus
HDMI Conn <HDM>
<HDM>
21
+3V
+5V
CN18
[7] HDMITX2P
HDMITX2P
[7] HDMITX2N
[7] HDMITX1P
HDMITX2N
HDMITX1P
[7] HDMITX1N
[7] HDMITX0P
HDMITX1N
HDMITX0P
[7] HDMITX0N
[7] HDMICLK+
HDMITX0N
HDMICLK+
[7] HDMICLK-
HDMICLK-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
HDMI_DDCCLK
HDM_DDCDATA
+5V
F2
1 HM@NANOSMDC110F-2
DDC5V
D10
1 HM@RSX101M-30_1A
DDC5V_2
HDMI_CON_HP
C454
SHELL1
D2+
SHELL3
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET SHELL4
SHELL2
20
22
R396
R394
HM@2.2K_4
HM@2.2K_4
+3V
2
INT_HDMI_SCL
[7] INT_HDMI_SCL
Q39
+3V
23
21
+5V
R385
R388
HM@2.2K_4
HM@2.2K_4
HM@ABA-HDM-050-P01
+3V
2
HM@0.1U/10V_4X
REV-A1A For EMI close to connector

HDMITX2N
R122
*HM@120/F_4
HDMITX2P
HDMITX1N
R125
*HM@120/F_4
HDMITX1P
HDMITX0N
R134
*HM@120/F_4
HDMITX0P
R128
HDMICLK-
HDMI-passive level shift
*HM@120/F_4
INT_HDMI_SDA
[7] INT_HDMI_SDA
Q37
REV-C3A Modify footprint and P/N

Add pin22, pin23
HDMI_DDCCLK
HM@FDV301N_200MA
HDM_DDCDATA
HM@FDV301N_200MA
C
REV-A1A Nvidia Comment +3V_GFX to instead of +3V

as below power rails to avoid power leakage issue
HDMICLK+
<HDM>
HDMI-HPD
<HDM>
+3V
HDMITX2N
HDMITX2P
3
2
+3V
Q38
1
Port-B_HPD
HM@2N7002_200MA
3 HM@0_4
R386
Q30
IHM@2N7002_200MA
HDMI_CON_HP
R397
B
HM@100K_4
1
HDMITX0N
HDMITX0P
HDMICLKHDMICLK+
R133
IHM@680_4
Q36
IHM@2N7002_200MA
R131
IHM@680_4
Q34
IHM@2N7002_200MA
+3V
Q33
IHM@2N7002_200MA
REV-A1A Del
+3V
+3V
Q35
IHM@2N7002_200MA
R127
IHM@680_4
R135
IHM@680_4
3
+3V
[7] Port-B_HPD
+3V
+3V
Q31
IHM@2N7002_200MA
R123
IHM@680_4
Q29
IHM@2N7002_200MA
+3V
3
B
R121
IHM@680_4
R126
IHM@680_4
Q32
IHM@2N7002_200MA
R124
IHM@680_4
+3V
R390
HM@1M_4
HDMITX1N
HDMITX1P
External HDMI-HPD

PROJECT : BU5
Size
Document Number
Rev
2A
HDMI CONN
Date:
5
Sheet

1
16
of
35
CCD <CCD>
<HSR>
HALL SENSOR&BACK LIGHT SWITCH
LCD POWER SWITCH <LDS>
+5V
REV-A1A Co-Lay L15 for EMI
4
2
RP2
USB_CCD_R
USB_CCD#_R
3 0X2
1
USB_CCD
USB_CCD#
+3V
+3VPCU
C375
C363
C16
0.1U/10V_4X
0.1U/10V_4X
0.1U/10V_4X
[9]
[9]
L15
3
2
USB_CCD_R
USB_CCD#_R
D
3
2
4
1
4
1
C3A
USB_CCD
USB_CCD#
+3V
D
*DLP11SN900HL2L
+LCDVCC
+3V
0.2A(20mils)
+3V
LITTLE-0603-2A-32V
C347
C359
1U/10V_6X
U19
CCD_POWER
10U/6.3V_8X
F3
C348
*1000P/50V_4X
C350
*0.1U/10V_4X
[7] LVDS_DIGON
IN
OUT
IN
GND
ON/OFF
GND
1
R306
2
C364
C365
0.1U/16V_4Y
*C@0.01U/25V_4X
R290
+3VPCU
C373
100K_4
*10K_4
5
*C@10U/6.3V_8X
AAT4280AIGU-4-T1
R307
100K_4
LID591#
LID591#
DISPON
[27]
DISPON
[27]
MR1
C333
PT3661-BB
0.1U/10V_4X
R305
*100K_4
REV-C3A Reserve R305
LCD Panel Module <LDS>
0_6
LCD_BK_POWER
C352
C357
C358
10U/25V_1206X
1000P/50V_4X
0.1U/25V_6X
16
R301
VIN
CRT CONN Interface <CRT>
CN2
[22]
[22]
R300
[7] LVDS_PWM
*short_4
C355
L16
L17
INT_DMIC_DATA
INT_DMIC_CLK
LVDS_VADJ
CCD_POWER
SBY100505T-221Y-N_300MA
INT_DMIC_DATA_L
SBY100505T-221Y-N_300MA
INT_DMIC_CLK_L
DISPON
LVDS_VADJ
LCD_EDIDCLK
[7] LCD_EDIDCLK
LCD_EDIDDATA
[7] LCD_EDIDDATA
0.1U/10V_4X
USB_CCD_R
USB_CCD#_R
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
+LCDVCC
6
1
7
2
8
3
9
4
10
5
CRT_R1
LCD_TXLCLKOUT+
LCD_TXLCLKOUT-
LCD_TXLCLKOUT+
LCD_TXLCLKOUT-
+5V_CRT
[7]
[7]
CRT_B1
+5V
LCD_TXLOUT0+
LCD_TXLOUT0-
LCD_TXLOUT0+
LCD_TXLOUT0-
[7]
[7]
LCD_TXLOUT1+
LCD_TXLOUT1-
LCD_TXLOUT1+
LCD_TXLOUT1-
[7]
[7]
LCD_TXLOUT2+
LCD_TXLOUT2-
LCD_TXLOUT2+
LCD_TXLOUT2-
[7]
[7]
CRT_G1
D9
B130L-13-F_1A
+5V_CRT1 F1
1206L150PR
11
12
CRTDDAT
13
CRTHSYNC
14
CRTVSYNC
15
CRTDCLK
CN16
17
LCD_BK_POWER
+3V
DHR46-15K120A
87242-3001
+3V
R311
2.2K_4
LCD_EDIDCLK
R310
2.2K_4
LCD_EDIDDATA
REV-C3A Modify CN2 Footprint and P/N
<CRT>
REV-A1A Add R533 and R534
C89
+5V
L22
L23
L24
U5
C93
*C@0.1U/16V_4Y
C406
0.22U/6.3V_4X
7
8
2
+3V
[7] CRT_RED
[7] CRT_GRE
[7] CRT_BLU
0.1U/16V_4Y
+5V_CRT
C407
0.1U/16V_4Y
BLM18BA470SN1D_300MA
CRT_R1
CRT_G1
CRT_B1
R347
C421
R348
C422
R349
C423
C98
C97
C96
150/F_4
6.8P/50V_4N
150/F_4
6.8P/50V_4N
150/F_4
6.8P/50V_4N
6.8P/50V_4N
6.8P/50V_4N
6.8P/50V_4N
3
4
5
6
VCC_SYNC SYNC_OUT2
SYNC_OUT1
VCC_DDC
BYP
SYNC_IN2
VCC_VIDEO
SYNC_IN1
VIDEO_1
VIDEO_2
VIDEO_3
GND
DDC_IN1
DDC_IN2
DDC_OUT1
DDC_OUT2
16
14
R56
R60
CRTVSYNC_R
CRTHSYNC_R
15
13
CRT_VSYNC
CRT_HSYNC
10
11
CRT_DDCCLK
CRT_DDCDAT
9
12
CRTDCLK
CRTDDAT
CM2009-02QR
CRT_DDCCLK
CRT_DDCDAT
C397
C398
*C@10P/50V_4C
*C@10P/50V_4C
0_4
0_4
CRTVSYNC
CRTHSYNC
[7]
[7]
C60
C77
*C@10P/50V_4C
*C@10P/50V_4C
CRT_DDCCLK
CRT_DDCDAT
CRTDCLK
CRTDDAT
R345
R344
2.2K_4
2.2K_4
+3V
R346
R343
2.7K_4
2.7K_4
+5V_CRT
[7]
[7]

PROJECT : BU5
Size
Document Number
Rev
2A
LCD/LED Panel/CCD
Date:
5

1
Sheet
17
of
35
MINI Card Slot#1

(WiFi)
Before RAMP must to remove

debug card component
<MNW>
+1.5V
WIMAX_P
+3V
REV-C3A Mount C368

R3
C389
0_8
C356
C386
C368
C5
C354
*0.01U/25V_4X
*0.1U/16V_4Y
10U/6.3V_8X
0.1U/16V_4Y
*C@0.1U/16V_4Y *C@0.1U/16V_4Y *C@10U/6.3V_8X
C9
+3V_S5
REV-C3A Modify R303 Value from 100K to 0
R304
0_4
SERIRQ_debug
LDRQ#1__debug
PLTRST#_debug
PCLK__debug_R
[9] PCIE_TXP_WLAN
[9] PCIE_TXN_WLAN#
[9] PCIE_RXP_WLAN
[9] PCIE_RXN_WLAN#
[9] CLK_PCIE_MINI
[9] CLK_PCIE_MINI#
[9] PCIE_CLK_REQ1#
BT_RFCTRL_BT5
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
CN5
NC
C-Link_RST
C-Link_DAT
C-Link_CLK
GND
NC
NC
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
NC
NC
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
NC
NC
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
GND
REFCLK+
REFCLKGND
CLKREQ#
BT_CHCLK
BT_DATA
WAKE#
NC
NC
NC
NC
NC
+1.5V
GND
+3.3V
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
SMBus(DDR3/WLAN/3G)
C372
0.1U/16V_4Y
+3V
USB_WLAN
USB_WLAN#
USB_WLAN [9]
USB_WLAN# [9]
2
4
[9] PCLK_DEBUG
*0_4
0_4
RP3
CGDAT_SMB
CGCLK_SMB
4.7KX2
1
3
R303
R299
R302
PLTRST#
[8,27] SERIRQ
[8] LDRQ#1
0_4
PLTRST#
RF_EN
16
14
12
10
8
6
4
2
[9,23] SDATA
RF_EN [27]
LFRAME#_PCIE
LAD3_PCIE
LAD2_PCIE
LAD1_PCIE
LAD0_PCIE
RN5
RN6
4
2
4
2
R313
3
1
3
1
0X2
0X2
0_4
Q24
LFRAME# [8,27]
LAD3 [8,27]
LAD2 [8,27]
LAD1 [8,27]
LAD0 [8,27]
CGDAT_SMB [13,14]
2N7002E_200MA
+3V
[9,23] SCLK
80003-6021
Q23
CGCLK_SMB [13,14]
2N7002E_200MA
[27] BT_RFCTRL
WIMAX_P
1
Q1
MINI Card Slot#2

3G
3 DTC144EUBTL_30MA
R17
*10K_4
BT_RFCTRL_BT
R21
*0_4
BT_RFCTRL_BT5
R298
0_4
SERIRQ_debug
For SIM Card on daughtor board
<MNT>
+3V
+3V_3G
+1.5V
2.75A (120mils)
+1.5V_3G
R293
*3G@0_8
R494
R316
3G@0_8
3G@0_8
REV-C3A Add R494
C381
C374
C369
C366
C351
C390
C379
*3G@0.01U/25V_4X
*3G@0.1U/10V_4X
*3G@10U/6.3V_8X
3G@0.1U/10V_4X
3G@0.1U/10V_4X
3G@0.1U/10V_4X
3G@10U/6.3V_8X
L21
[9] CLK_PCIE_3G
[9] CLK_PCIE_3G#
PCIE_CLK_3G_REQ#_C
A
15
13
11
9
7
5
3
1
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
CPUSB#
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
RESET#
W_DISABLE#
GND
GND
REFCLK+
REFCLKGND
CLKREQ#
BT_CHCLK
BT_DATA
WAKE#
UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V
3G@80003-6021
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
3
2
4
1
4
1
USB_SIM#
USB_SIM
*DLP11SN900HL2L
CN14
USB_3G
USB_3G#
12
11
10
9
8
7
6
5
4
3
2
1
CPUSB# [10]
USB_3G [9]
USB_3G# [9]
CGDAT_SMB
CGCLK_SMB
PLTRST#
16
14
12
10
8
6
4
2
PLTRST# [3,9,19,23,27]
3G_EN [27]
UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
12
11
10
9
8
7
6
5
4
3
2
1
USB_SIM#_R
USB_SIM_R
RP7
4
2
USB_SIM#
USB_SIM
UIM_DATA
UIM_CLK
+3V_3G
REV-B2A Modify CN14 Footrpint and P/N,PIN define

REV-A1A Add Q10,R7,R201 for CLK REQ#
UIM_DATA C380
*22P/50V_4N
UIM_CLK
*22P/50V_4N
C377
R297
*3G@10K/F_4
*3G@100P/50V_4N
PCIE_CLK_3G_REQ#_C
PCIE_CLK_3G_REQ# [9]
Q22
*3G@2N7002_200MA
R292
USB_SIM# [9]
USB_SIM [9]
88511-120N
+3V_3G
C360
3 0X2
1
UIM_PWR
UIM_VPP
UIM_RST
[9] PCIE_RXP_3G
[9] PCIE_RXN_3G#
NC
C-Link_RST
C-Link_DAT
C-Link_CLK
GND
+3.3V
+3.3V
CPEE#
GND
PETp0
PETn0
GND
GND
PERp0
RERn0
GND
MMC_DAT
MMC_CMD
54
53
[9] PCIE_TXP_3G
[9] PCIE_TXN_3G#
3
2
USB_SIM#_R
USB_SIM_R
CN3
54
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
PROJECT : BU5
Size
Document Number
Date:
3G@0_4
Rev
2A
MINI CARD(WLAN/3G/SIM Card)

2
Sheet
18
of
35
24
USB 3.0 Controller <U3B>

+1.05VSUS
+3V_S5
(700mA)
L28
C455
C484
C485
C481
U3@10U/10V_8Y
U3@0.1U/10V_4X
U3@0.1U/10V_4X
U3@0.1U/10V_4X*C@0.1U/10V_4X
C475
C477
C469
C479
C470
C486
C466
C476
*C@0.01U/25V_4X
*C@0.01U/25V_4X
U3@0.01U/25V_4X
U3@0.01U/25V_4X
U3@0.01U/25V_4X
U3@0.1U/10V_4X
U3@0.01U/25V_4X U3@5P/50V_4C *C@10U/10V_8Y
C471
U3@HCB1608KF-181T15_1.5A
C464
+3V_S5
+3V_S5
(100mA)
L30
U3@HCB1608KF-181T15_1.5A
U3@SDM10K45-7-F_100MA
+3V_S5
+3V_S5
R146
[9] USB30_SMI#
U3@10K_4
R140
R141
R142
U3@10K_4
U3@10K_4
U3@0_4
J2
J1
H1
P5
USB_SPI_CLK
USB_CS#
USB_WR#
USB_RD#
C228
U3@1U/10V_6Y
M2
N2
N1
M1
K13
K14
J13
P4
C14
P13
U2AVDD33
U3AVDD33
D7
H3
H4
L5
E11
E12
E3
E4
C8
C9
D8
D9
H11
K11
K12
L8
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
N4
N5
N6
P3
C4
C5
C6
C7
D5
VDD10
VDD10
VDD10
VDD10
VDD10
U3TXDP2
PETXP
PETXN
U3TXDN2
U2DM2
PERXP
PERXN
U2DP2
U3RXDP2
PERSTB
PEWAKEB
PECREQB
U3RXDN2
OCI2B
OCI1B
AUXDET
PSEL
SMIB
PPON2
PPON1
U3TXDP1
PONRSTB
U3TXDN1
U2DM1
SPISCK
SPICSB
SPISI
SPISO
U2DP1
U3RXDP1
GND
GND
GND
GND
U3RXDN1
RREF
U2AVSS
U2PVSS
P6
R179
U3@100_4
Y3
U3@24MHZ_30
C263
U3@12P/50V_4C
U3@12P/50V_4C
+3V_S5
G14
H13
USB_SC_OC#
R182
R181
USB 3.0 Power switch <U2B> <USB> <U3B>

+5VPCU
U3@10K_4
U3@10K_4
U26
G545A2P8U
REV-A1A change S&C OC net
H14
J14
PPON1
B10
USB30_TX1+_R
A10
N10
USB30_TX1-_R
USB_S&C#
P10
B12
USB_S&C
USB30_RX1+_R
A12
R180
2
3
*U3@0_4 USB_SC_EN#
IN1
IN2
4
1
9
USB_SC_EN#
[27] USB_SC_EN#
EN#
GND
GND-C
C502
OUT3
OUT2
OUT1
8
7
6
+5VSUS_USBP0
*470P/50V_4X
C281
U3AVSS
XT1
XT2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
CSEL
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
P12
N12
C275
+ C501
C288
C296
R428
OC#
*0.1U/10V_4X
*C@100U/6.3V_3528P_E45b
10U/6.3V_8X
*10U/6.3V_8X
*470/F_4
1U/16V_6X
USB30_RX1-_R
R425
USB_SC_OC#
U3@1.6K/F_4
Close to chip
Use 1% RES
R194
[9] USB_SC_OC_PCH#
Q40
*2N7002_200MA
[27]
U2@0_4
N11
D6
P14
P11
P9
P7
P2
P1
N13
N9
N7
N3
M13
M12
M11
M10
M9
M8
M7
M6
M5
M4
M3
L12
L11
L7
L6
<EMI> <U3B> <USB>

EEPROM
<U3B>

L29
+3V_S5
3
2
USB_S&C#_R
USB_S&C_R
3
2
4
1
4
1
USB 3.0 CONN

CN19
R145
USB_S&C#_R
USB_S&C_R
U3@47K_4
+3V_S5
USB_CS#
USB_SPI_CLK
USB_WR#
USB_RD#
R383
R144
U3@33_4
U3@10K_4
1
6
5
2
3
CE
SCK
SI
SO
VDD
HOLD
WP
VSS
RP8
USB30_RX1-_R
USB30_RX1+_R
U24
+3V_S5
USB_S&C#_R1
USB_S&C_R1
*DLP11SN900HL2L
4
2
3 0X2
1
R421
R424
+5VSUS_USBP0
USB_S&C#_R1
USB_S&C_R1
U3@0_4 USB30_RX1U3@0_4 USB30_RX1+
8
USB30_TX1-_R R418
USB30_TX1+_R R419
C468
U3@0.1U/10V_4X
U3@0_4USB30_TX1-_R1
U3@0_4USB30_TX1+_R1
C473
C474
U3@0.1U/10V_4X
U3@0.1U/10V_4X
USB30_TX1-_C
USB30_TX1+_C
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
VBUS
DD+
GND
SSRXSSRX+
GND
SSTXSSTX+
1932354-3
U3@PM25LD512C-100SCE
C12
C13
D3
D4
D11
D12
D13
D14
E1
E2
E13
E14
F4
F6
F7
F8
F9
F11
F12
G1
G2
G6
G7
G8
G9
G11
G12
G13
H6
H7
H8
H9
H12
J3
J4
J6
J7
J8
J9
J11
J12
K3
K4
L1
L2
L3
L4
C262
A1
A2
A3
A4
A5
A7
A9
A11
A13
A14
B3
B4
B5
B7
B9
B11
B13
B14
C1
C2
C3
C10
C11
A6
N8
A8
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
N14
M14
B6
P8
B8
USB_SC_OC#
U3@UPD720200AF1-DAP-A
GND
XIN
XOUT
*C@10U/10V_8Y
H2
K1
K2
PECLKP
PECLKN
C478
F2
F1
[3,9,18,23,27] PLTRST#
[7,23] PCIE_WAKE#
[9] PCIE_CLK_USB30_REQ#
D12
D2
D1
C483
U3@0.01U/25V_4X U3@0.1U/10V_4X
13
12
11
10
U3@0.1U/10V_4X PCIE_RXP_USB30_C
U3@0.1U/10V_4X PCIE_RXN_USB30#_C
C487
13
12
11
10
C227
C226
[9] PCIE_TXP_USB30
[9] PCIE_TXN_USB30#
+3V_S5
VDD33
VDD33
VDD33
B2
B1
[9] CLK_PCIE_USB30
[9] CLK_PCIE_USB30#
[9] PCIE_RXP_USB30
[9] PCIE_RXN_USB30#
L13
L14
U15
VDD33
VDD33
VDD33
VDD33
C458
L9
L10
C465
VDD33
VDD33
C467
U3@0.01U/25V_4X U3@0.01U/25V_4X U3@0.01U/25V_4X U3@0.01U/25V_4X
VDD33
VDD33
C459
VDD33
VDD33
VDD33
C229
U3@0.01U/25V_4X U3@0.1U/10V_4X
F3
G3
G4
C482
D10
F13
F14
only USB2.0: DFHS04FR163

USB3.0:
DFHD09MR002
REV-B2A Change to AKE37ZN0Q01 for footprint issue
A1A delete 20101012
USB 2.0 Colay <U3B>

<U2B>
[9] USBP1+
[9] USBP1-
R162
R163
U2@0_4
U2@0_4
USB w S&C MAXIM solution <SLC>
USB_S&C_RR
USB_S&C#_RR
R154
R155
USB_S&C
USB_S&C#
U3@0_4
U3@0_4
REV-A1A change S&C routing
+5VPCU
C500
U14
MAX14566BEETA+T
0.1U/10V_4X
[9,27]
[9,27]
1
8
USB_BUS_SW3
USB_BUS_SW2
VCC
TDP
TDM
CB1(CEN#)
CB
DP
DM
GND
GND
6
7
USB_S&C_RR
USB_S&C#_RR
3
2
USB_S&C_R
USB_S&C#_R
CB0
CB1
Status
Auto mode
Force dedicated charger mode
Pass-Through(USB) mode:
Connect DP/DM to TDP/TDM

PROJECT : BU5
Size
Document Number
Date:
Rev
2A
USB 3.0(UPD720200F1-A)
5
Sheet
19
of
35
USB2.0 Left 1
USB2.0 Left 2 <U2B> <MMC> <USB> <EMI>
CN6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
L20
RP6
4
2
3 0X2
1
USB_EXT1#
USB_EXT1
USB_EXT1# [9]
USB_EXT1 [9]
USB_EXT2#_R
USB_EXT2_R
RP5
4
2
3 0X2
1
USB_EXT2#
USB_EXT2
USB_EXT2# [9]
USB_EXT2 [9]
USB_CARD#_R
USB_CARD_R
RP4
4
2
3 0X2
1
USB_CARD#
USB_CARD
USB_CARD# [9]
USB_CARD [9]
USB_EXT1#_R
USB_EXT1_R
USB_EN0# [27]
USBOC#9 [9,27]
TP_XD_LED# [26]
48M_CARD
48M_CARD
[9]
USB_EXT1#_R
USB_EXT1_R
3
2
4
1
4
1
USB_EXT1#
USB_EXT1
*DLP11SN900HL2L
L19
USB_EXT2#_R
USB_EXT2_R
3
2
3
2
4
1
4
1
USB_EXT2#
USB_EXT2
*DLP11SN900HL2L
L18
USB_CARD#_R
USB_CARD_R
+3V
+5VPCU
3
2
3
2
3
2
4
1
4
1
USB_CARD#
USB_CARD
*DLP11SN900HL2L
REV-B2A Del R346 0 ohm
88511-200N
REV-A1A Co-Lay L74,L75,L76 for EMI

PROJECT : BU5
Size
Document Number
Rev
2A
HDMI CONN
Date:
5
Sheet
1
20
of
35
HDD Interface <H1D>
CN20
C231
C233
0.01U/25V_4X
0.01U/25V_4X
SATA_RXN_1ST_HDD#_C
SATA_RXP_1ST_HDD_C
C238
C243
0.01U/25V_4X
0.01U/25V_4X
SATA_RXN_1ST_HDD# [8]
SATA_RXP_1ST_HDD [8]
+5V_HDD1
R193
1
2
3
4
5
6
7
GND1
RXP
RXN
GND2
TXN
TXP
GND3
SATA_TXP_1ST_HDD [8]
SATA_TXN_1ST_HDD# [8]
C284
*C@0.1U/16V_4Y
*C@10U/6.3V_8X
0_8
+5V
C303
C67
C72
0.01U/25V_4X
0.01U/25V_4X
SATA_RXN_ODD#_C
SATA_RXP_ODD_C
C80
C86
0.01U/25V_4X
0.01U/25V_4X
REV-B2A Fix ODD power discharge timing issue

SATA_TXP_ODD [8]
SATA_TXN_ODD# [8]
+5V_ODD
+5V
+5V
SATA_RXN_ODD# [8]
SATA_RXP_ODD [8]
C437
8
9
10
11
12
13
DP
+5V
+5V
RSVD
GND
GND
ODD_PRSNT#
+5V_ODD
0.01U/25V_4X
[10]
Q26
C438
AO3413_3A
*0.01U/25V_4X
R369
+5V_ODD
15
GND15
C287
SATA_TXP_ODD_C
SATA_TXN_ODD#_C
R373
4.7K_4
3.01K/F_4
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
SATA_TXP_1ST_HDD_C
SATA_TXN_1ST_HDD#_C
C109
C103
*C@0.1U/16V_4Y
*C@10U/6.3V_8X
C118
+5V_ODD
2
ODD_EN
*C@100U/6.3V_3528P_E45b
C185C8-11305-L
*C@100U/6.3V_3528P_E45b
ODD_MD#
R585
22_8
[9]
[10]
Q27
1
2
3
4
5
6
7
DTC144EUBTL_30MA
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V
24
14
GND14
GND1
RXP
RXN
GND2
TXN
TXP
GND3
CN15
GND
ODD Zero power . (Only for Intel) <OZP>
23
ODD Interface <ODD>
GND
Q41
C166G1-12208-L
2N7002_200MA
REV-A1A Add PIN23,24 to GND
3D-LDO Power <GSR>
3D-Sensor IC <GSR>
+3V_HDP
FS (Full Scale) selection

+3V_HDP
+3V_HDP
MAINON
+5VPCU
2
3
C102
FS
U6
U7
[15,27,31,34]
SHDN
VO
4
C100
GND
VIN
*GS@10U/6.3V_8X
SET
2
12
+3V_HDP
C104
Vdd
Vdd
C73
5
GS@10U/6.3V_8X
9
10
11
GS@0.1U/10V_4X
GS@G913C
6
13
1
GS@0.1U/10V_4X
Voutx
Vouty
Voutz
Reserve
Reserve
Reserve
ST
FS
PD
GND
GND
NC
NC
NC
3
5
7
ACCELX
ACCELY
ACCELZ
4
8
AXSTST
FS
14
15
16
R63
*GS@10K_4
U9
6g Full-Scale
Xout
Yout
Zout
SLEEP#
Self Test
2
3
4
13
ACCELX
ACCELY
ACCELZ
AXSTST
1
Power-down mode
Normal Mode
HDPPD
Vdd
*GS@0.1U/10V_4X
R81
10
9
*GS@0_4
TP12
HDPPD selection
GS@TSH35TR
C129
PD (Power Down) selection

PD
R66
GS@0_4
0
2g Full-Scale
0
Normal Mode
NC
NC
NC
NC
NC
g-select
0g-Detect
GND
1
8
11
12
14
*GS@MMA7366L(R2)
Power-down mode
3D-SMBus <GSR>
3D-u-micro P <GSR>
+3V_HDP
3
1
2
+3V_HDP
Vcc
Reset#
GND
U8
*GS@G691L308T73UF
U10
+3V_HDP
Close to Pin 7 and Pin 16
GS@4.7K_4
KXP84_SDA
C99
Q10
REV-B2A Reserve HDPACT_R to PCH GPIO6

2ND_MBDATA
[10] BOARD_ID6
[10] HDPACT
[10] HDPINT
[8] HDPLOC
2
Q9
2ND_MBCLK
GS@1U/10V_6X
GS@0.1U/10V_4X
R492
R318
*GS@0_4
GS@0_4
C128
GS@0.1U/10V_4X
C110
C114
C121
GS@0.033U/10V_4X
GS@0.033U/10V_4X
GS@0.033U/10V_4X
R90
R86
GS@1K_4
GS@0_4
ACCELY
ACCELX
ACCELZ
AXSTST
18
17
15
2
HDPACT_R
GND
HD_PINT
HD_PLOC
11
10
9
14
5
Close Chipset
R88
R84
GS@47K/F_6
GS@47K/F_6
Close Chipset
[9,27]
VCC
VCC
ACCELX
ACCELY
ACCELZ
AXSTST
HDPACT
HDPPD
HDPINT
HDPLOC
VSS
HDPSCL
HDPSDA
RESET
MODE
Reserved
Reserved
Reserved
Reserved
Reserved
1
20
KXP84_SCL
KXP84_SDA
3
8
G-RESET#
R80
R87
GS@4.7K_4
GS@4.7K_4
4
6
12
13
XIN_G
XOUT_G
R73
R89
GS@4.7K_4
GS@4.7K_4
C115
*GS@22P/50V_4N
19
Y1
GS@R5F211B4D34SP#W4(3B25H)
*GS@8MHZ_30
GS@2N7002_200MA
C117
[9,27]
GS@2N7002_200MA
+3V_HDP
KXP84_SCL
16
7
+3V_HDP
R76
GS@4.7K_4
R75
C119
*GS@22P/50V_4N

PROJECT : BU5
Size
Document Number
Date:
Rev
2A
HDD/ODD/MDC
5
Sheet
21
of
35
Codec (CX20671-21Z) <ADO> <EMI>
HP <ADO> <EMC>
Output
Output
FILT_1.65V
AVDD_3.3
CN12
C338
C337
C526
C529
HPOUT-L
R260
5.1/F_6
HPOUT-L2
L12
HCB1608KF-121T20_2A
HPOUT-L3
1U/10V_6Y
0.1U/16V_4Y
10U/6.3V_8X
0.1U/16V_4Y
HPOUT-R
R263
5.1/F_6
HPOUT-R2
L14
HCB1608KF-121T20_2A
HPOUT-R3
1
2
6
3
4
R486
+3V
1.2mA(20mils)
0_6
C520
C524
10U/6.3V_8X
0.1U/16V_4Y
ADOGND
1A(100mils)
CLASSD_5V
C514
C324
C528
10U/6.3V_8X
0.1U/16V_4Y
Determining HDA use +1.5V/+3V
10U/6.3V_8X
0.1U/16V_4Y
L11
D17
*VPORT 0603 220K-V05
HPOUT-L3
D18
*VPORT 0603 220K-V05
HPOUT-R3
GND
GND
GND
Output
0.1U/16V_4Y
GND
External MIC <ADO> <EMC>
FILT_1.8V
C507
C319
C519
C329
C325
C317
C527
10U/6.3V_8X
0.1U/16V_4Y
0.1U/16V_4Y
0.1U/16V_4Y
0.1U/16V_4Y
10U/6.3V_8X
10U/6.3V_8X
R473
33_4
5
8
6
4
SDATA_IN
MIC1-VREFO
+3AVDD_S5
28
15
C293
17
12
LPWR_5.0
RPWR_5.0
29
27
2
7
18
26
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
GND
CLASSDREF
AVDD_5V
RESET#
FILT_1.65
[8] ACZ_RST#_AUDIO
C
AVDD_3.3
0.1U/16V_4Y
FILT_1.8
U18
R252
0_4
SENSE_A_R
GND
VAUX_3.3
VDD_IO
DVDD_3.3
AVDD_HP
-21Z
SENSE_A
36
R196
3.3K/F_4
*4.7U/6.3V_6X
ADOGND
R487
R483
SENSE_A
R213
3.3K/F_4
SENSE PIN A
R475
5.11K/F_4
39.2K/F_4
20K/F_4
Port_A#
Port_B#
MIC1_L1
R189
100/F_6
MIC1_L2
L9
HCB1608KF-121T20_2A
MIC1_L3
MIC1_R1
R215
100/F_6
MIC1_R2
L10
HCB1608KF-121T20_2A
MIC1_R3
C300
GND
[27]
33_4
R262
*10K_4
C318
PCBEEP_R
PORTB_R
PORTB_L
B_BIAS
0.1U/16V_4Y
10
39
TP52
AMP_MUTE#
AMP_MUTE#
PCBEEP_C
Low Active
38
37
PC_BEEP
C_BIAS
PORTC_R
PORTC_L
SPDIF
GPIO0/EAPD#
GPIO1/SPK_MUTE#
[17] INT_DMIC_CLK
[17] INT_DMIC_DATA
100_4
DMIC
INT_DMIC_DATA
NC_DR
NC_DL
40
1
PORTA_R
PORTA_L
DMIC_CLK
DMIC_1/2
C517
C523
R488
2.2U/6.3V_6X
2.2U/6.3V_6X
MIC1_R1
MIC1_L1
MIC1-VREFO
0_4
2SJ-S351-A04
C282
C304
100P/50V_4N
ADOGND
Normal Open Jack
100P/50V_4N
*0.1U/25V_6X
GND
25
24
23
22
21
20
19
DMIC
TP54
TP55
TP56
AVEE
FLY_N
FLY_P
C332
1U/10V_6Y
REV-A1A Del short pad,Add C590
D14
1 *VPORT 0603 220K-V05
MIC1_L3
ADOGND
Port_B#
D15
1 *VPORT 0603 220K-V05
MIC1_R3
D16
*VPORT 0603 220K-V05
GND
HPOUT-R
HPOUT-L
EP_GND
41
RIGHT-
RIGHT+
16
14
LEFT13
LEFT+
AVEE
FLY_N
FLY_P
11
MIC1-RR
MIC1-LL
MIC1-VREFO_B
32
31
30
7
8
9
10
CX20671-21Z
Place close to audio codec.

R484
35
34
33
CN10
1
2
6
3
4
Port_B#
REV-A1A DEL 0 ohm
R251
D20
*VPORT 0603 220K-V05
+5V
(40mils)
C320
10U/6.3V_8X
[8] PCBEEP
ADOGND
Port_A#
PBY160808T-300Y-N_3A
-21Z
[8] BIT_CLK_AUDIO
[8] ACZ_SYNC_AUDIO
[8] ACZ_SDIN0_AUDIO
[8] ACZ_SDOUT_AUDIO
Normal Open Jack
GND
Place bypass caps very close to device.

+3AVDD_S5
C316
GND
C504
C513
*0.1U/25V_6X
48.7mA(20mils)
+3AVDD_S5
GND
C331
*100P/50V_4N
Layout Note: Path from +5V_IC to LPWR_5.0 and

RPWR_5.0 must be very low resistance ( <0.01 ohms).
GND
0_6
C315
*100P/50V_4N
0.1U/16V_4Y
0.061mA(15mils)
R451
ADOGND
2SJ-S351-A04
C327
C336
Near chip
+3V
7
8
9
10
Port_A#
ADOGND
+3AVDD
C335
C525
0.1U/16V_4Y
10U/6.3V_8X
Internal Speaker
<ADO> <EMC>
GND
CN11
SPK_R+
SPK_RSPK_LSPK_L+
GND
R456
R455
R454
R453
PBY160808T-501Y-N_1.2A
PBY160808T-501Y-N_1.2A
PBY160808T-501Y-N_1.2A
PBY160808T-501Y-N_1.2A
1
2
3
4
INSPKR+N
INSPKR-N
INSPKL-N
INSPKL+N
1
2
3
4
MIC1-LL
88266-04001-06
INT_DMIC_DATA
B
C516
GND
C334
*0.1U/16V_4Y
C267
*0.1U/16V_4Y
C321
*0.1U/16V_4Y
C309
*0.1U/16V_4Y
MIC1-RR
Close to CN2
REV-B2A Modify CN11 Footprint and P/N
C511
*0.47U/6.3V_4X
C518
*0.47U/6.3V_4X
C522
*0.47U/6.3V_4X
GND
GND
GND
INSPKL-N
INSPKL+N
INSPKR-N
INSPKR+N
*0.47U/6.3V_4X
C313
1000P/50V_4X
GND
C312
1000P/50V_4X
C310
1000P/50V_4X
C311
1000P/50V_4X
ADOGND
GND
GND
GND
GND
SPK_R+
For EMI
SPK_RBIT_CLK_AUDIO
ACZ_SDOUT_AUDIO
ACZ_RST#_AUDIO
SPK_L-
C505
C506
C512
*10P/50V_4C
*10P/50V_4C
*10P/50V_4C
INSPKR+N
INSPKR-N
D27
SPK_L+
*VPORT 0603 220K-V05
INSPKL+N
INSPKL-N
D26
D24
D25
*VPORT 0603 220K-V05
*VPORT 0603 220K-V05
*VPORT 0603 220K-V05

GND
Need to change 20671-21Z footprint

PROJECT : BU5
Size
Document Number
Rev
2A
Audio Codec(CX20671-21Z)
Date:
5

1
Sheet
22
of
35
<LAN> <LNG> <LN1>
Atheros Lan <LAN> <LNG>
26
LAN_VDD33
0.163A(20mils)
R85
+3V_S5
0_6
R351
+3V_S5
LAN_VDD33
10K_4
U11
C136
C124
C122
C125
4.7U/6.3V_6X
*10U/6.3V_8X
51@1000P/50V_4X 1U/10V_6Y
C123
1
0.1U/16V_4Y
VDD33
LED1/LED_LINK10/100n
LED0/LED_ACTn
LED2/CLKREQn
A1A 0716--->Follow AE Richard suggestion to change

from 10U/6.3V_8X to 4.7U/6.3V_6X for Layout issue
PLTRST#
PLTRST#
2
3
4
AVDD_CEN
AVDDL
LAN_XTLO
LAN_XTLI
PCIE_WAKE#
CKREQ_G#
C134
TEST_RST
TESTMODE
Y2
XTLI
SMDATA
SMCLK
25MHZ_30
AVDDH
AVDDL
AVDDL
37
24
31
34
33
32
36
35
30
29
DVDDL
DVDDL
AVDDL
AVDDL
1U/10V_6Y
C148
C159
C152
C157
0.1U/16V_4Y
0.1U/16V_4Y
0.1U/16V_4Y
0.1U/16V_4Y
PCIE_RXP_LAN_C
PCIE_RXN_LAN#_C
C161
C160
TRXP3
TRXN3
AR8151-BL1A-R
26
25
0.1U/10V_4X
0.1U/10V_4X
[9]
[9]
[9]
[9]
[9]
[9]
L3
51@0_4 CKREQ_G#
R350
52@0_6
R356
52@0_4 CKREQ#
C429
*52@1U/10V_6Y
C430
52@0.1U/16V_4Y
40
L2
LX
51@4.7uh_C_1A
AVDD_CEN
C142
C133
C145
51@1000P/50V_4X
51@10U/6.3V_8X
51@0.1U/16V_4Y
PCIE_WAKE#
PCIE_WAKE#
41
22
AVDDH
C162
0.1U/16V_4Y
16
19
13
AVDDH
AVDDL
AVDDL
C151
C155
C144
51@0.1U/16V_4Y
51@0.1U/16V_4Y
51@0.1U/16V_4Y
PBY160808T-601Y-N_1A
SB_SMBDATA1_LAN
R101
*0_4
SDATA [9,18]
SB_SMBCLK1_LAN
R100
*0_4
SCLK [9,18]
TX1P
TX1N
49.9X2
C143
C137
51@1000P/50V_4X
C213
0.1U/16V_4Y
49.9X2
C149
C146
0.1U/16V_4Y
1000P/50V_4X
51@1000P/50V_4X
0.1U/16V_4Y
C210
AVDD_CEN_T
TX3P
TX3N
1
2
3
AVDD_CEN_T
TX2P
TX2N
4
5
6
0.1U/16V_4Y
1000P/50V_4X
C214
51@1000P/50V_4X
C216
0.1U/16V_4Y
C217
51@1000P/50V_4X
AVDD_CEN_T
TX1P
TX1N
7
8
9
C218
0.1U/16V_4Y
AVDD_CEN_T
TX0P
TX0N
10
11
12
TCT1
TD1+
TD1-
MCT1
MX1+
MX1-
TCT2
TD2+
TD2-
MCT2
MX2+
MX2-
TCT3
TD3+
TD3-
MCT3
MX3+
MX3-
TCT4
TD4+
TD4-
MCT4
MX4+
MX4-
24
23
22
TERM4
21
20
19
TERM3
18
17
16
TERM2
X-TX3P
X-TX3N
X-TX2P
X-TX2N
X-TX1P
X-TX1N
15 TERM1
14
13
X-TX0P
X-TX0N
CN17
X-TX3N
X-TX3P
X-TX1N
X-TX2N
X-TX2P
X-TX1P
X-TX0N
X-TX0P
NC4/3NC/3+
RX-/1-
C211
C215
0.01U/100V_8
0.01U/100V_8
NC2/2NC1/2+
TX3P
TX3N
RN4
51@49.9X2
51@49.9X2
1
3
C220
1
3
LDO linear regulator select

10/100M LAN pull Low
Normal function
ATE test mode
TX+/0+
GND
GND
9
10
Power on Strapping pin

LAN_ACTLED
R355
5.1K/F_6
0.01U/100V_8
R112
R116
R119
R120
75/F_8
75/F_8
51_52@0_8
51_52@0_8
R353
LAN_LINKLED#
51@5.1K/F_6
R354
52@5.1K/F_6
2
4
TX2P
TX2N
2
4
RN3
A
C154
TX-/0-
+3V_S5
51@1000P/50V_4X
SWR switch-mode regulator select

Giga LAN pull High (default = 1)
RX+/1+
C219
0.01U/100V_8
CKREQ# or CKREQ_G#
130452-07
B2A 0812--->Add 0.01U/100V_8 for Toshiba recommend.
Over-clocking disable
LED1 = LAN_LINKLED#
NS892408-G
C203
Over-clocking enable (default = 1)
1
0
LED0 = LAN_ACTLED
AVDD_CEN
A1A 0705--->
Follow AE suggestion to mount 1UF Cap to filter.
RN2
1
3
1
3
RN1
C170
C204
[7,19]
LAN-SM-Bus <LAN>
GIGA:AR8151-BL1A-R
AL008151005
10/100:AR8152-BL1A-R
AL008152009
U23
2
4
TX0P
TX0N
2
4
LAN-Wake up function <LAN>
C165
*1U/10V_6Y
AVDD_CEN
REV-A1A Del C312 by Richard
RJ45 <LAN> <LNG> <LN1>

AVDD_CEN_T
R352
SB_SMBDATA1_LAN
SB_SMBCLK1_LAN
<LAN> <LNG>
<LAN> <LNG>
PCIE_CLK_REQ_LAN#
REV-A1A Del R138,R159 for cost down

CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_TXN_LAN#
PCIE_TXP_LAN
PCIE_RXP_LAN
PCIE_RXN_LAN#
28
27
TRANSFORMER
PLACE NEAR LAN IC SIDE
[9] PCIE_CLK_REQ_LAN#
GND10
TRXP2
TRXN2
GND9
20
21
TRXP1
TRXN1
GND8
TX3P
TX3N
AVDDH
GND7
17
18
TRXP0
TRXN0
50
14
15
TX2P
TX2N
GND1
49
TX1P
TX1N
RBIAS
GND6
11
12
LX
LAN_LINKLED#
LAN_ACTLED
CKREQ#
C150
AVDDH_REG
48
TX0P
TX0N
9
10
GND5
1U/10V_6Y
RBIAS
GND4
0.1U/16V_4Y
2.37K/F_4
47
C434
46
AVDDH
R91
C433
GND3
33P/50V_4N
XTLO
45
C131
REFCLKP
REFCLKN
RX_N
RX_P
TX_P
TX_N
AR8151/AR8152
AVDDL_REG
GND2
1U/10V_6Y
33P/50V_4N
Atheros
VDDCT
44
0.1U/16V_4Y
C132
PERSTn
WAKEn
VDDCT_REG/CKRn
43
C432
C431
0.1U/16V_4Y
42
[3,9,18,19,27]
DVDD_REG
DVDDL
AVDDL
AVDDL
39
38
23
C153
C156
51@0.1U/16V_4Y
51@1000P/50V_4X
C158
51_52@10P/3KV_1808N
51@0.1U/16V_4Y
Close to LED
TERM9
C220
GIGA = 10P/3KV_1808N (CH010GJ0I08)
10/100 = 220P/3KV_1808X (CH122GK1I10)
R119,R120
GIGA = 75 ohm
10/100 = 0 ohm
LAN_ACTLED
C436
*470P/50V_4X
LAN_LINKLED#
C435
*470P/50V_4X

PROJECT : BU5
Size
Document Number
Rev
2A
Atheros Lan
Date:
5

1
Sheet
23
of
35
3 IN 1 CARD READER
3 IN 1 CARD READER
REV-A1A change to daughtor board

PROJECT : BU5
Size
Document Number
Rev
2A
Card Reader (RTS5138)

Date:
5

1
Sheet
24
of
35
36
TP board
+3VPCU
MX7
MX6
MX5
MX4
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
MX7
MX2
MX3
MX4
C186
C187
C188
C189
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
MX0
MX5
MX6
MX1
C178
C179
C180
C181
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
MY7
MY13
MY12
MY15
C174
C175
C176
C177
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
MY3
MY5
MY14
MY6
<TPD> <EMI>
MY16 [27]
MY17
R113
*short_8
MY17 [27]
K_LED_P
MY2
MY1
MY0
MY4
MY3
MY5
MY14
MY6
MY7
MY13
MY8
MY9
MY10
MY11
MY12
MY15
MX7
MX2
MX3
MX4
MX0
MX5
MX6
MX1
K_LED_P
CAPSLED
(20mils)
FOR EMI
TPCLK_L
TPDATA_L
NUMLED
[27] TPCLK
[27] TPDATA
C195
C196
220P/50V_4X
C172
220P/50V_4X
C166
*100P/50V_4N MY17
C164
*100P/50V_4N MY16
1
2
3
4
5
6
Power board
<PSW>
C3A
[27]
[27]
CN1
1
2
3
4
[27] NBSWON#
MY2
MY1
MY0
MY4
C7
1000P/50V_4X
TPCLK_L
TPDATA_L
[27] TP_ON_OFF
0.1U/10V_4X
35
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
*220P/50V_4X
SBK160808T-121Y-N_400MA
SBK160808T-121Y-N_400MA
C200
220P/50V_4X
91504-344N
C167
C168
C169
C173
L4
L5
88513-080N
CAPSLED
NUMLED
CN8
1
2
3
4
5
6
+5V_TP
MY2 [27]
MY1 [27]
MY0 [27]
MY4 [27]
MY3 [27]
MY5 [27]
MY14 [27]
MY6 [27]
MY7 [27]
MY13 [27]
MY8 [27]
MY9 [27]
MY10 [27]
MY11 [27]
MY12 [27]
MY15 [27]
MX7 [27]
MX2 [27]
MX3 [27]
MX4 [27]
MX0 [27]
MX5 [27]
MX6 [27]
MX1 [27]
C182
C183
C184
C185
1 10KX8
2
3
4
5
+5V
10
9
8
7
6
K_LED_P
MY16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
RP1
MX0
MX1
MX3
MX2
CN7
<KBC> <EMI>
INT KeyBoard
88513-044N
C
NUMLED
CAPSLED
K_LED_P
C163
220P/50V_4X
C190
220P/50V_4X
C191
220P/50V_4X
(10mils)
+3V
R97
150_4
HOLE
K_LED_P
<OTH>
CPU
VGA
HDD&ODD
H-TC236BC315D110P2
H-TC217BC142D102P2
HOLE7
*H-TC276BC217D146P2
HOLE14
*pad-c197
HOLE16
*pad-c197
HOLE10
*pad-c197
HOLE9
*pad-c197
HOLE3
*pad-c197
HOLE4
*pad-c197
HOLE5
*H-TC315BC256D110P2
HOLE19
*H-TC217BC142D102P2
HOLE20
*H-TC217BC138D102P2
HOLE15
*H-TC236BC315D110P2
EMI PAD
MINI CARD
MDC
H-TC315BC256D110P2
HOLE8
*H-TC276BC217D146P2
HOLE12
*H-TC276BC217D146P2
HOLE21
*H-C91D91N
HOLE6
*H-C91D91N
HOLE2
*H-C91D91N
REV-A1A change footprint from

H-TC197BC130D98P2 to pad-c197
HG-TC315BC236D110P2
HOLE11
6
5
4
HOLE13
6
5
4
7
8
9
HG-C236D110P2
HOLE1
6
5
4
7
8
9

PROJECT : BU5
1
2
3
1
2
3
1
2
3
7
8
9
1
2
3
HOLE18
6
5
4
7
8
9
H-C91D91N
1
2
3
HOLE17
6
5
4
REV-A1A Change footprint to H-TC276BC217D146P2
REV-B2A Change footprint to HG-TC315BC315D110P2

REV-A1A Change GND to ADOGND
7
8
9
Size
Document Number
Date:
Rev
2A
KB/TP&TP/PB/FL/LEB/MMB/B-CAS
*HG-TC315BC315D110P2
ADOGND
5
4
*HG-C236D110P2
3
Sheet
1
25
of
35
<LED>
BATERRY
D3A : LED
RF LED
luminance to light,1K-ohm change 2.2K-ohm.
+5VPCU
LED4
2
+5V
AC-IN
2
10K_4
+5VPCU
-BATLED0 R284
2.2K_4
R279
RF_LED_R
220_4
RF_LED#
[27]
12-21/S2C-AL1M2VY/2C/2C
BAT_SAT0# [27]
R278
LED
1
LED1
2
R285
1K_4
12-21/T3D-CP1Q2B12Y/2C
+5VPCU
ACIN
ACIN
[27,28]
3
-BATLED1 R283
12-22/S2ST3D-C30/2C
LED6
1.2K/F_4
BAT_SAT1# [27]
DTC144EUBTL_30MA
Q17
Q20 MMBT3906-7-F_200MA
CARDREADER
+5V
HDD/ODD
luminance to light,1K-ohm change 2.2K-ohm.

1
LED3
TP_XD_LED#
[20] TP_XD_LED#
2
R291
1K_4
12-21/T3D-CP1Q2B12Y/2C
+5V
+5V
+5VPCU
LED2
REV-B2A DEL Q41 for fixing RTS5138 card reader LED blink issue
2
-PWRLED
R281
2.2K_4
PWRLED#
3
SUSLED
12-22/S2ST3D-C30/2C
R287
1.2K/F_4
SUSLED_EC#
1
R288
12-21/T3D-CP1Q2B12Y/2C
*10K_4
1K_4
SATA_LED#_C
HDDLED#
R282
+3V
PWRLED#
Q19
MMBT3906-7-F_200MA
D3A : LED
R289
POWER
10K_4
SATA_LED#
[8]
[27]
1
C
LED5
SUSLED_EC#
ESD Protect <EMC>
[27]
FOR POWER LED
FOR BATTERY LED
D19
-PWRLED
RF_LED_R
D22
1
3
-BATLED0
1
3
SATA_LED#
3
TP_XD_LED#
*PJMBZ5V6
*PJMBZ5V6
FOR 3G/CARDREADER LED
D28
3
SUSLED
FOR HDD/W-LAN LED
D21
-BATLED1
*PJMBZ5V6
2
*PJMBZ5V6
<EMI>
+5VPCU
+3VPCU
+5V
+5V
+5V
+1.8V
+1.8V
LAN_VDD33
VIN
C2
C391
C495
C221
C503
C141
C138
C120
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
+5V
VIN
+5V
+5V
+5V
+3VPCU
+3VPCU
+3V_S5
+3V_S5
C224
C223
C135
C392
C521
C289
C515
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
0.22U/6.3V_4X
VIN
VIN
VIN
VIN
C428
C15
C371
C12
C13
C370
0.22U/25V_6X
0.22U/25V_6X
0.22U/25V_6X
0.22U/25V_6X
0.22U/25V_6X
0.22U/25V_6X
VIN
C202
1U/25V_6X
VIN
C14
1U/25V_6X
VIN
C130
1U/25V_6X
VIN
C82
1U/25V_6X
VIN
C349
*0.1U/10V_4X
VIN
C69
*0.1U/10V_4X
VIN
C56
*0.1U/10V_4X
VIN
C3
*0.1U/10V_4X
VIN
C8
*0.1U/10V_4X
C353
*0.1U/10V_4X
REV-A1A Add 0.1u*6 for EMI
C269
VIN
C1
*0.1U/10V_4X
+3V_S5
C530
VIN
VIN
C3A
C367
10U/25V_8X

PROJECT : BU5
Size
Document Number
Date:
Rev
2A
LED/HOLE
5
Sheet
1
26
of
35
EC <KBC>
Intel Turbo mode only <CPU>

0.01A(20mils)
H_PROCHOT#
SM BUS PU/Address <KBC>

+3VPCU
[3,33]
+3VPCU
R20
0_6
+A3VPCU
R19
2.2_6
0.03A(30mils)
+3V_VDD_EC
R37
0_6
C30
C20
C33
C38
0.1U/10V_4X
10U/6.3V_8X
0.1U/10V_4X
10U/6.3V_8X
122
[10] RCIN#
S3
[9] SCI#
*SHORT_4
R495
[17] DISPON
SCI#_uR
2.2/F_4
REV-C3A Add R495 for EC issue

[3,9,18,19,23]
123
T2
125
[8,18] SERIRQ
T4
REV-A1A Del USBOC#8

[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
[25]
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
[28] MBCLK
[28] MBDATA
[9,21] 2ND_MBCLK
[9,21] 2ND_MBDATA
54
55
56
57
58
59
60
61
53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33
70
69
67
68
119
120
2ND_MBCLK
2ND_MBDATA
3ND_MBCLK
3ND_MBDATA
72
71
10
11
[25] TPCLK
[25] TPDATA
[7] AC_PRESENT
[19] USB_SC_EN#
R53
[7] SUSCLK
124
7
PLTRST#
REV-A1A Del USB_EN1#
29
0_6
R45
[3] EC_PECI
77
8768_32KX1
43_4
+VTT
EC_PECI_R
CLK 32.768K Hz from PCH
12
13
D/A
GPIO94/DA0
GPIO95/DA1
GPIO96/DA2
R35
97
98
99
100
*100K/F_4
+3VPCU
KBRST/GPIO86
GPIO01/TB2
GPIO02
GPIO03
GPIO04
GPIO05
GPIO06/IOX_DOUT
GPIO07
GPIO16
GPIO30
GPIO36
GPIO41
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO
GPO47/SCL4
GPIO50/PSCLK3/TDO
GPIO51
GPIO52/PSDAT3/RDY
GPIO53/SDA4
GPIO70
GPIO71
GPIO72
GPIO75
GPO76/SHBM
GPIO77
GPIO81
GPO82/IOX_LDSH/TEST
GPO84/IOX_SCLK/XORTR
GPIO97
LPC
ECSCI/GPIO54
GPIO24
GPIO10/LPCPD
LREST
GPIO67/PWUREQ
SERIRQ
GPIO65/SMI
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
GPIO56/TA1
KBSOUT7
GPIO20/TA2/IOX_DIN_DIO
KBSOUT8
GPIO14/TB1
KBSOUT9/SDP_VIS
TIMER
KBSOUT10/P80_CLK
GPIO15/A_PWM
KBSOUT11/P80_DAT
GPIO21/B_PWM
KBSOUT12/GPIO64
GPIO13/C_PWM
KBSOUT13/GPIO63
GPIO32/D_PWM
KBSOUT14/GPIO62
GPIO45/E_PWM
KBSOUT15/GPIO61/XOR_OUT
GPIO40/F_PWM
GPIO60/KBSOUT16
GPIO66/G_PWM
GPIO57/KBSOUT17
GPIO33/H_PWM
SKU_Strap
101
105
106
64
79
95
96
108
93
94
114
109
15
80
17
20
21
24
25
26
27
28
73
74
75
82
83
84
91
110
112
107
SMB
GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO26/PSCLK2
GPIO27PSDAT2
F_SDI/F_SDIO1
F_SDIO&F_SDIO0
F_CS0
F_SCK
PS/2 FIU
GPIO00/EXTCLK
VTT
PECI
GPIO87/SIN_CR
GPIO34
GPIO46/TRST
GPO83/SOUT_CR/TRIST
IR
GPIO55/CLKOUT/IOX_DIN_DIO
+VTT
C45
L1
VCC_POR
VREF
0_6
R27
H: UMA SKU
*10K_4
L: VGA SKU
Strap <KBC>
NBSWON#
R490
0_4
USB_SC_OC#
PWRLED#
RF_LED#
H_PROCHOT_EC
ACIN [26,28]
CAPSLED [25]
NBSWON# [25]
USB_BUS_SW2 [9,19]
USB_SC_OC# [19]
LID591# [17]
SUSB# [7]
GFX_MAINON [31]
PWRLED# [26]
VRON [33]
RF_LED# [26]
HWPG
DNBSWON#_uR
S2
*SHORT_4
ID EEPROM <KBC>
SKU_STRAP_3
SUSLED_EC#
BAT_SAT0#
BAT_SAT1#
*SHORT_4
WP
1
2
3
A0
A1
A2
0.003A(20mils)
8
4
VCC
GND
C17
R491
0_4
R54
1K_4
R44
100K/F_4
0.1U/10V_4X
[7]
SPI FLASH <KBC>
[20]
TEMP_ALERT# [3,10]
FANSIG1 [3]
USB_BUS_SW3
SPI_SDI_uR
R12
+3VPCU
SPI_SDO_uR
SPI_SCK_uR
+3VPCU
SPI_SDI
R7
33_4
SPI_SDO 5
R10
33_4
SPI_SCK
1
R16
10K_4
0.025A(20mils)
104
VREF_uR
R26
4.7K_4
SI
HOLD
SCK
WP
CE
VSS
W25X40BVSSIG
ACZ_SDOUT
*10K_4
REV-B2A Add for EMI

SPI_SCK
W25X40BVSSIG
AMD
2MB
W25Q16BVSSIG
*22P/50V_4N
[8]
INTERNAL KEYBOARD STRIP SET

<KBC>
+3VPCU
+3VPCU
R106
10K_4
[7]
HWPG circuit
<KBC>
+3VPCU
0_4 +A3VPCU
+3VPCU
+3V
AJ007910F00 (w/o CIR)
REV-B2A Reserve CN4

REV-A1A Add C32,C30 for EMI
R4
R5
0_4
*0_4
CN4
R6
TP_ON_OFF
1U/10V_6X
1
2
3
*22_4
8769AGND
3G_EN
10K_6
C32
[33] HWPG_VAXG
C532
*1000P/50V_4X
*10P/50V_4C
C531
*85205-0300L
*1000P/50V_4X
REV-A1A Del SKU strap pin

[32] HWPG_VCCSA
SMBUS Table
SMBUS Devices
0.1U/10V_4X
512KB
R32
C19
C721
TP_ON_OFF [25]
BT_RFCTRL [18]
SUS_PWR_ACK
R49
VDD
Intel
MY0
VCC_POR#
SO
[9,19]
3G_EN [18]
85
33_4
SPI_CS0#_uR
R51
30
M24C08-WMN6TP
ADDRESS: A0H
SUSLED_EC# [26]
BAT_SAT0# [26]
BAT_SAT1# [26]
SUSON [30]
MAINON [15,21,31,34]
SKU_STRAP_2
SPI_SDI_uR
SPI_SDO_uR
SPI_CS0#_uR
SPI_SCK_uR
SCL
SDA
U2
S1
113
14
23
111
+3VPCU
U1
6
5
2ND_MBCLK
2ND_MBDATA
REV-A1A Del USB30_PWR_EN

USB_EN0#
32
118
62
65
22
16
81
66
10K_4
Disabled ('1') if using FWH device on LPC.

Enabled ('0') if using SPI flash for both system BIOS and EC firmware
S3_Power Sequence [15]

DNBSWON#
T1
SKU_STRAP_1
R47
SHBM=0: Enable shared memory with host BIOS
SUSC# [7]
MPWROK [7,33]
RSMRST# [7]
SLP_SUS# [7]
RF_EN [18]
RF_EN
NPCE791LA0DX:
RF_EN
SHBM
REV-B2A Add USB_BUS_SW3
AMP_MUTE# [22]
ID [28]
NUMLED [25]
D/C# [28]
S5_ON [34]
LCD_BLON_I [7]
C94
*0.1U/10V_4X
VFAN1 [3]
USBOC#9 [9,20]
31
117
63
86
87
90
92
IV@4.7K_4
IV@4.7K_4
3Cell Battery protect & K/B LED Control <KBC>
REV-B2A Add USB_BUS_SW3

GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2
GPIO23/SCL3
GPIO31/SDA3
R30
R29
TEMP_MBAT [28]
ICMNT [28]
AC SET_EC [28]
ICMNT
AC SET_EC
SKU_Strap
GPIO85/GA20
NPCE791LA0DX
PCLK_591
GPIO11/CLKRUN
GPIO90/AD0
GPIO91/AD1
GPIO92/AD2
GPIO93/AD3
VCORF
[10] GATEA20
3ND_MBCLK
3ND_MBDATA
A/D
AGND
121
LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK
44
CLKRUN#
H=1.6mm
GND1
GND2
GND3
GND4
GND5
GND6
[7] CLKRUN#
VCC2
VCC3
VCC4
VCC5
3
126
127
128
1
2
[8,18] LFRAME#
[8,18] LAD0
[8,18] LAD1
[8,18] LAD2
[8,18] LAD3
[9] PCLK_591
+3V
8769AGND
VDD
U4
103
0.1U/10V_4X
4.7K_4
4.7K_4
4.7K_4
4.7K_4
REV-A1A change power

from +3VPCU to +3V
Q2
2N7002_200MA
VCORF_uR
C31
0.1U/10V_4X
102
C46
0.1U/10V_4X
AVCC
C59
0.1U/10V_4X
5
18
45
78
89
116
C90
0.1U/10V_4X
19
46
76
88
115
C91
10U/6.3V_8X
VCC1
C21
R59
R61
R65
R62
H_PROCHOT_EC
R28
100K_4
D
MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
+3V
Address
12H
Battery
SKU strap pin <KBC>
Close to U12
SKU_STRAP_1
SKU_STRAP_2
R64
R52
10K_4
10K_4
DNBSWON#_uR
C43
*10U/6.3V_8X
+3VPCU
NBSWON#
SW1
A0H
VGA Board Thermal Sensor
98H
SKU_STRAP_3
R70
R69
*EV@10K_4
IV@10K_4
ICMNT
R71
*IV@0_4
D4
*SW1010CPT_100MA
R25
0_4
+5VPCU
*SHORT_ PAD
D3
*SW1010CPT_100MA
R18
0_4
D2
*SW1010CPT_100MA
R15
0_4
D1
*SW1010CPT_100MA
R8
0_4
R22
R68
R67
R23
10K_4
10K_4
10K_4
10K_4
[7,29] SYS_HWPG
[30] HWPG_1.5V
D5
*EGA10402V05AH
C29
PROJECT : BU5
+5V
*10U/6.3V_8X
13MS UMA = 000

13MS VGA = 001
8769AGND
HWPG
SUSLED_EC#
BAT_SAT0#
BAT_SAT1#
PWRLED#
8769AGND
EC EEPROM
*IV@SW1010CPT_100MA
*0.1U/10V_4X
C28
LED PU/PD <LED>
[34] HWPG_1.8V
AC SET_EC
CPU Board Thermal Sensor
Power Button <KBC>
D8
RF_LED#
R55
Size
Document Number
Date:
10K_4
Rev
2A
EC NPCE791LA0DX
2
Sheet
1
27
of
35
PL2
*short/*HI0805R800R-00_5A
VA1
PCN1
4
PF1
F1206HA15V024TM
1
2VA0
DC_JACK
0.01_3720
PR138
PD5
SBR1045SP5-13
1
PL1
*short/*HI0805R800R-00_5A
R1
VA2
1
PD4
TVS_SMAJ20A
PD6
PC70
E@2200P/50V_4X
20288-044L
PR142
10/F_6
SW1010CPT_100MA
PR149
220K/F_4
BAT-V
PR56
33K_6
PR140
10/F_6
1
PR147
220K/F_4
add 2010/10/01 for EMI
PR63
10K_6
PC46
*2200P/50V_4X
( Near by sense R side)
3
PR59
82.5K/F_6
PC48
*0.1U/25V_4X
CSIN
PC130
0.1U/25V_4X
1
2
3
2
D
PC55
*0.1U/25V_4X
PC9
*4.7U/25V_8X
PC69
E@0.1U/25V_4X
P28
PQ22
AOL1413
VIN
1
2
3
VA3
2
3
PQ31
AOL1413
4
PQ34
PQ6
2N7002K_300MA
[27] D/C#
IMD2AT108
+3VPCU
CSIP
[27] AC SET_EC
11
[27] MBCLK
VDDSMB
PC71
E@10U/25V_8X
PC45
10U/25V_8X
PC31
10U/25V_8X
PC47
E@10U/25V_8X
PC150
*E@22U/25V_1206X
PC149
*E@22U/25V_1206X
add 2010/10/04 for EMI near PR129

5
PQ24
PR54
2.7_6
BOOT
SDA
PC34
*0.1U/25V_4X
UGATE
PC132
0.1U/50V_6X
AON7410
25
24
88731A_U_GATE
23
88731A_PHASE
20
88731A_L_GATE
0.01_3720
PR129
change 2010/12/21 C-stage
3
2
1
NC
GND
GND
GND
GND
CSSP
[27] MBDATA
26
+3VPCU
PC148 0.1U/25V_4X
21
ACIN
ACIN
VCC
[26,27]
PC138 1U/10V_4X
1
2
VDDP
PR139
4.7_6
PC140
0.1U/25V_4X
1
33
32
31
30
28
( Near by IC side)
Add 2010/11/01 for EMI
Add 2010/11/05 for EMI
PC57 1U/10V_4X
1
2
27
PR60
10K/F_4
CSSN
PC68
10U/6.3V_8X
VIN
PR152
10K/F_4
PC29
*0.1U/25V_4X
PL4
PHASE
ACOK
LGATE
3.3UH_7X7
22
3.2V
88731ACIN
PR144
22K/F_6
+3VPCU
PGND
CSOP
6
BAT-V
VBF
VCOMP
PC147
0.01U/50V_4X
1
2
1
2
TEMP_MBAT [27]
PR75
PD7
UDZSTE-175.6B
29
100_4
BAT-V
GND
(Please place this R near by battery pack side)
[27]
PC67
10U/6.3V_8X
1K/F_4
PD1
UDZSTE-175.6B
PR35
15
100_4
PC64
0.01U/50V_4X
MBCLK [27]
16
ICMNT
MBDATA [27]
47P/50V_4N
CSON
PR151
100K_4
update 2010/10/07
( Near by sense R side)

CSOP
12
7
2
PR28
100/F_4
*1U/10V_4X
PR31
100/F_4
( Near by IC side)
47P/50V_4N
PC19
17
PR150
2.21K/F_6
+3VPCU
PC63
PR32
NC
ID [27]
TEMP_MBAT_C
BTJ-09WQAB
PR143
10/F_6
NC
GND
M-DATA
M-CLOCK
PC18
PR141
10/F_6
PC40
*1000P/50V_4X
18
ICOMP
14
MBAT+
ID
ICM
11
PC20
*0.1U/25V_4X
PF2
F1206HA15V024TM
1
2
NC
PCN2
PC60
*1000P/50V_4X
PR27
10K/F_4
AON7410
PC141
0.1U/25V_4X
VREF
NC
PR26
*100K_4
19
ACIN
CSON
9
8
7
13 6
5
4
12 3
2
1
10
PU7
ISL88731CHRTZ-T
DCIN
3
2
1
DCIN
add 2010/10/01 for EMI
PR47
PQ18
*2.2/F_6
PC56
0.1U/25V_4X
PR146
49.9/F_6
PR145
82.5K/F_6
BAT-V
PC66
0.01U/50V_4X
B2A 10/12
PU12
*CM1213-04SO
ID
1
2
TEMP_MBAT_C
CH1
VN
CH2
CH4
VP
CH3
6
5
4
M-DATA
+3VPCU
M-CLOCK
PROJECT : BU5
Size
Document Number
Rev
CHARGER-ISL88731C
Date:
5
PC28
10U/25V_8X
13
PC39
10U/25V_8X
SCL
1
5
10
Sheet
1
2A
28
of
35
P34
PC44
5V_DH
5V_LX
PR148
5V_DL
PAD
PAD
PAD
PQ30
AON7702
PC61
0.1U/50V_6X
1
2
3
*2.2/F_6
PC146
*1000P/50V_4X
35
34
33
2.2UH_7X7
PR55
1/F_6
3
2
1
2.2UH_7X7
*6.8K/F_4
PQ21
PR44
*2.2/F_6
AON7702
+
PC119
*1000P/50V_4X
PC38
0.1U/50V_6X
RDSon=14m ohm
PR42
1/F_6
change 2010/ 10/20

PR123
REFIN2
+5VPCU_JP
PR41
32
REFIN2
330K_6
BYP
REFIN2 31
1
2
OUT1
ILIM2 30
FB1
OUT2 29
SKIP
PU1
ILIM1
SKIP#
28
DDPWRGD_R
PM6686TR
PGOOD1
PGOOD2 27
3V_EN
EN1
EN2 26
3V_DH
DH1
DH2 25
3V_LX
LX1
LX2
B-TEST change 2010/10/20
PAD
PAD
17
18
19
20
21
22
23
24
1
2
3
PR68 255K/F_6
delete 2010/10/26
PL5
3
2
1
9
10
11
12
DDPWRGD_R 13
14
5V_EN
15
16
37
36
+5VPCU_JP
PL7
PR66
0_4
AON7410
change 2010/12/21
BST1
DL1
PVCC
NC
GND
PGND
DL2
BST2
change 2010/12/21
delete 2010/10/26
*15.8K/F_4
+3VPCU
LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF
PR65
OCP:11.65A
PQ32
AON7410
(Peak 10.257A, AVG 7.17A)
PQ16
8
7
6
5
4
3
2
1
(Peak 9A , AVG 6.5A)
OCP:10.37A
220U/6.3V_7343P_E25b PC163
PR76
0_4
PR353
147K/F_4
Total capacitor : 370 uF
Total capacitor : 342uF

PC51
*2200P/50V_4X
change 2010/09/29
REF
ESR : 17m
f : 500k Hz
ESR : 17m
1
PC54
0.1U/50V_6X
PR53
150K/F_4
f : 400k Hz
PC53
4.7U/10V_6X
PC164
PD15
UDZSTE-175.6B
PC50
*0.1U/25V_4X
220U/6.3V_7343P_E25b
VL
PC25
*2200P/50V_4X
+5VPCU
PC52
10U/25V_8X
VIN
PR46
*0_4/S
5V_EN
B test 10/13
3V_EN
PR67
*0_4/S
PC26
10U/25V_8X
PC24
*0.1U/25V_4X
VL
PR62
VIN
*0_4/S
PC49
1U/16V_6X
[3] SYS_SHDN#
S5D [34]
0.1U/25V_4X
PR38
MAIND [15,30,34]
S5D
39K/F_4
MAIND
PR43
*10K/F_4
3V_DL
RDSon=14m ohm
PR50
0_6
VL
change 2010/10/20
PC36
0.1U/50V_6X
2
PD3
BAV99W-7-F
PC58
1U/16V_6X
+3VPCU
0.1U/25V_4X
PC22
1
2
PR29
PD2
PC37
0.1U/50V_6X
BAV99W-7-F
PC17
22_8
DDPWRGD_R
SYS_HWPG [7,27]
0.1U/25V_4X
+15V_ALWP
+15V
PR45
*100K/F_4
3
1
+3VPCU
+5VPCU
+5VPCU
1
2
5
6
+3VPCU
PQ33
AO6402A
PQ19
AO6402A
MAIND 3
PQ15
AO6402A
PQ14
AO6402A
1
2
5
6
1
2
5
6
S5D
1
2
5
6
MAIND
S5D
+3V_S5
+3V
(Peak 0.36A, AVG 0.25A)
+5V_S5
(Peak 1A, AVG 0.7A)
(Peak 6.456A, AVG 4.52A)
+5V
(Peak 3.5A, AVG 2.4A)

PROJECT : BU5
Size
Document Number
Date:
Rev
System 3V/5V(RT8210B)
5
Sheet
2A
29
of
35
PROJE
Quanta C
PROJ
Quanta C
P30
PC116
10U/10V_8X
PC123
0.1U/50V_6X
PR119
+SMDDR_VTERM
VIN
1.5SUS_HG
CHANGE 2010/10/20
1.5SUS_PHASE
PC106
*0.1U/25V_4X
1.5SUS_LG
PC27
*10U/25V_8X
2.2/F_6
PC109
10U/10V_8X
PC112
10U/25V_8X
20
19
1
2
3
DRVL
LL
21
DRVH
23
22
VBST
PGND
VTTSNS
CS_GND
CS
17
1
2
3
*2.2/F_6
RMW200N03FUBTB
15
+5VPCU
PC110
PR134 5.1/F_6
+SMDDR_VREF
VTTREF
V5FILT
14
*1000P/50V_4X
S5
NC
PC129
1U/10V_4X
PR132
*100K_4
PC41
*0.1U/25V_4X
S5_1.5V PR122
*0_4/S
PR118
*0_4/S
VIN
RDSon=5.6m ohm
+3VPCU
HWPG_1.5V [27]
PR124
620K/F_4
PC32
*10U/10V_8X
PC128
1U/10V_4X
13
12
S3
11
VDDQSET
VDDQSNS
PGOOD
10
FOR DDR III
PC113
0.033U/50V_6X
NC
COMP
+5VPCU
CHANGE 2010/10/20
V5IN
delete 2010/10/26
PC23
PQ20
12.4K/F_4
MODE
change 2010/12/21
PR116
CHANGE 2010/10/20
16
PU5
+1.5VSUS
+1.5VSUS_SRC
330U/2V_7343P_E6b
RT8207LGQW
GND
PC35
*2200P/50V_4X
PL3
1.5UH_10X10
18
PR131
RMW130N03FUBTB
VTTGND
VLDOIN
VTT
GND
24
25
PQ17
OCP:23.184A
For RT8207A 400KHZ
(Peak 21.3A, AVG 14.796A)

ESR : 9m
SUSON [27]
f : 400k Hz
S3_1.5V [15]
Be careful to this two net name.

+1.5VSUS
PR117
10K/F_4
Vout = (R1/R2) X 0.75 + 0.75

R1
PR111
*0/short_6
MAIND 3
PQ43
AO6402A
[15,29,34] MAIND
PR30
10K/F_4
R2
+5VPCU
+3VPCU
+1.5V
PR6020
**U3@100K_4
U3@0.1U/25V_6X
U3@0_4
3
8
9
+3V_S5
PC6041
U3@10U/10V_8X
PC6042
U3@0.1U/10V_4X
VEN
VO
VIN
GND
GND
PC6044
U3@1U/6.3V_4X
ADJ
PR6019
PU6003
U3@G9661-25ADJF12U
4
1
VPP PGOOD
PC6040
SUSON
1
2
5
6
PC16
*33P/50V_4N
NC
Vout =0.8(1+PR1/PR2)
(Peak 0.16A, AVG 0.11A)
+1.05VSUS
PR6021
U3@34.8K/F_4
R1
PC6046
U3@10U/10V_8X
PR6022
U3@100K/F_4
R2
PROJECT : BU5
Size
Document Number
Date:
Rev
2A
DDR 1.5V(RT8207L)/1.05VSUS
5
Sheet
1
30
of
35
+3VPCU
PR218
10K_4
F: 320k Hz
PR180
PHASE
LGATE
PC97
10U/25V_8X
PC95
10U/25V_8X
PC103
U:C2A
+VTT
0.1U/50V_6X
RT8240BLX
RT8240BDL
change 2010/12/21
C
1.0UH_7X7
FB
RGND
*2200P/50V_4X
PC102
PC118
10.10.14 change Value

2.2_6
DCR=10mohm
PR157
PQ36
2.2/F_6
PC100
PC137
10.10.05 delete JP
1
2
3
GND
12
[27] GFX_MAINON
RT8240BBST_1
PL11
EN
PAD
RT8240BDH
+1.05V
PGOOD
*0.1U/25V_4X
5
UGATE
1
2
3
PR167
PU9
OCP:19.107A
PQ37
RMW130N03FUBTB
RT8240BGQW
8
13
PR214
0_4
CS
BOOST
9
[32] HWPG_VTT
VCC
10
G0
U:C2A
PR216
60.4K/F_4
2
12.14.2010 C-STAGE change Value
PR183
10K_4
VIN
*360K/F_4
RT8240BTON
PC207
1U/10V_4X
11
RT8240BVCC
10/F_6
+3VPCU
(Peak 18.098A , AVG 12.669A)
PR215
+5VPCU
P31
PR213
*0_4
PC94
PC99
RMW200N03FUBTB
RT8240BFB
1000P/50V_4X
PR211
[15,21,27,34] MAINON
PC209
+5VPCU
*0_4
10.10.20 stuff for EMI sol.
U:C2A
PC170
PR210
390U/2.5V_105CS_E10f
0.01U/50V_6X
10U/6.3V_8X
0.1U/25V_4X
*100P/50V_4N
PR154
B
PR70
0_4
100_4
PR162
0_4
VCCP_SENSE [5]
PR161
0_4
VSSP_SENSE [5]
0_4
PR155
*10K/F_4
R1
R2
U:C2A
10.10.11 change solution
VOUT=(1+R1/R2)*0.5
PROJECT : BU5
Size
Document Number
Rev
2A
+VTT /+1.05V(RT8240B)
Date:
31
Sheet
of
35
P32
A
[27] HWPG_VCCSA
VCCSA_VID1
[5]
PR282
2.2K_4
+5VPCU
PC252
1U/10V_4X
PC238
HWPG_VTT
[31]
OCP:8.12A
2.2U/6.3V_6X
13
14
15
EN
VID0
VID1
17
16
PGOOD
PGND
V5FILT
19
V5DRV
18
(Peak 6.000A ,AVG 4.200A)

CHANGE 2010/09/21
ESR : 9m
PC253
BST
12
f : 300k Hz
+VCCSA
0.1U/25V_6X
20
PGND
SW
11
PL16
delete 2010/10/26
VIN
+5VPCU
MODE
SW
delete 2010/10/26
10
0.47UH_7X7
PC254
22U/6.3V_8X
8
PC255
22U/6.3V_8X
PC256
22U/6.3V_8X
100_4
9
PR257
SW
VOUT
VIN
SLEW
SW
COMP
24
SW
TPS51461RGER
PU16
VIN
23
CHANGE 2010/10/20
PGND
VREF
22
GND
PC239
0.1U/10V_4X
10U/6.3V_6X
21
PC257
PC258
10U/6.3V_6X
CHANGE 2010/12/21 c-stage
7
VCCSA_VCCSSENSE
VCCSA_VCCSSENSE
[5]
PR284
*0_4
+VCCSA
0.8V
0.9V
PR285 0_4
PR283
5.1K/F_4
VCCSA_VID1
C
PC248
0.01U/25V_4X
PC240
0.22U/25V_6X

PROJECT : BU5
Size
Document Number
Date:
Rev
2A
Sheet
5
32
of
35
P33
PR6023IV@2.2_6
VIN
Mount 2010/12/20 c-stage
36
37
ISUMPG
ISUMNG
38
RTNG
40
39
FBG
VWG
LGATEG
*0_4/S
VR_HOT#
PHASE_1
24
LGATE_1
PR39 2.2_6
BOOT_1
PC33 0.22U/25V_6X
SCLK
BOOT2
UGATE2
PHASE2
NTC
LGATE2
30
BOOT_2
29
UGATE_2
28
PHASE_2
27
LGATE_2
+5VPCU
0.36UH_10X10-O
Change 2010/12/21 c-stage

+VCC_CORE
PL9
Max. DCR=1.1m
1
2
3
1
(Peak
+
53A ,AVG 53A)
PR106
ISUMP
FB
CHANGE c-stage 2010/12/14
PAD
25
3 4
VR_PWM3
PC268
PC42
RDSon=2.3m ohm
41
1000P/50V_4X

PR9
3.65K/F_6
PR8
10K/F_6
PFA1212200D128MCBC
VSUM+
18
12
17
PR112
20.5K/F_4
PWM3
COMP
ISUMN
VW
11
3.09K/F_4
update 2010/12/20
ISEN_1
PR7
UGATE_2
PC59
*2200P/50V_4X
PQ23
RMW130N03FUBTB
PC127
NTC Place near the Vcore O/P L

PHASE_2
0.36UH_10X10-O
PC108 1000P/50V_4X
PR51
PQ28
TPCA8055-H
PC122
10U/25V_8X
VIN
0.22U/25V_6X
PC62
*0.1U/25V_4X
PR153
NTC_10K_6
1/F_6
PR125 2.2_6
BOOT_2
VSUM+
VSUMPC98
0.1U/50V_6X
PC111
0.1U/25V_4X
PR114 11K/F_4
1
2
PC115
*0.22U/10V_4X
PC114
0.22U/10V_4X
1.37K/F_4
ISEN_2
B
2
PR36
VSS_SENSE
PC105
330P/50V_4X
PC104 330P/50V_4X
NTC near the GT_core HS-FET

[5] VCC_SENSE
[5] VSS_SENSE
PC21
PC8
10P/50V_4C
PC157
*1000P/50V_4X
PR24
VSUMPR109
2.61K/F_4
PR97
887/F_4
PR159
*2K/F_4
PC96
1000P/50V_4X
*100/F_4
2
PR108
267K/F_4
*330P/50V_4X
PC6
680P/50V_4X
PR6
*10K/F_4
PC126
10U/25V_8X
10
ISEN1
8.06K/F_4
ISEN2
1000P/50V_4X
PR1
16
PC117
100U/25V_105CE_f
2.2/F_6
PC3
PR105
3.83K/F_4
CHANGE 2010/12/15
PR6038
27.4K/F_4
PQ29
TPCA8055-H
PR48
NTC near the Vcore HS-FET
PR6039
3.83K/F_4
PHASE_1
NTCG
LGATE_1
PC4
33P/50V_4N
PR6037
NTC_470K_4
VIN
PQ27
RMW130N03FUBTB
ALERT#
PR3
27.4K/F_4
UGATE_1
UGATE_1
54.9/F_4
BOOT_1
23
SDA
35
PR130
NTC_470K_4
LGATE1
21
22
PR100
PR6036 IV@1/F_6
PC101
10U/25V_8X
ISNG
PC107
10U/25V_8X
*0_4/S
update 2010/11/10
add 2010/12/15 c-stage
ISPG
PR99
LGATE_GT
PC5
*2200P/50V_4X
PHASE_GT
31
PR17
*0_4/S
32
PC6062
+
1
2
3
[5] VR_SVID_CLK
PR98
PC6065
IV@1000P/50V_4X
PR6035 IV@3.65K/F_6
PR104
1.91K/F_4
[5] VR_SVID_ALERT#
+VTT
130/F_4
ISEN3/FB2
[27] HWPG_VAXG
PR20
UGATE_GT
PC135
*0.1U/25V_4X
BOOT1
UGATE1
PHASE1
+VTT
BOOT_GT
33
PU4
ISL95835HRTZ-T
PGOOD
43P/50V_4N
1
[5] VR_SVID_DATA
34
1
2
3
PHASEG
VR_ON
15
0_4
UGATEG
VCCP
14
PR10
PC7
[3,27] H_PROCHOT#
BOOTG
RDSon=2.3m ohm
PC6061
+
PC12
E@68P/50V_4C
1
2
3
PC6066
+
Max. DCR=0.8m
IV@TPCA8055-H
PC10
E@68P/50V_4C
1
2
3
5
PR6033
IV@2.2/F_6
+VAXG
PGOODG
+3VPCU
[3,7] DELAY_VR_PWRGOOD
PC6052
IV@10U/25V_8X
5
PC6063
IV@0.1U/50V_6X
IV@11K/F_4
PQ72
PR6032
IV@NTC_10K_6
LGATE_GT
VDD
13
*0_4
PR103
IV@1.91K/F_4
[7,27] MPWROK
PR12
update 2010/10/26
PR11
PC124
1U/10V_4X
100K/F_4
RTN
VIN
19
COMPG
20
PC125
1U/10V_4X
26
2
PL17
IV@330U/2V_7343P_E6b
PR127
*0_4/S
PR6034
IV@8.06K/F_4
PC120
0.22U/25V_6X
IV@0.36UH_10X10-N
NTC Place near the GT_core O/P L
+5VPCU
[27] VRON
PHASE_GT
ISPG
ISNG
IV@330U/2V_7343P_E6b
PR6028
IV@475K/F_4
PC6064IV@1000P/50V_4X
PR6026
IV@7.5K/F_4
IV@330U/2V_7343P_E6b
2010/10/07
PR6029
PC6057
IV@422/F_4
IV@330P/50V_4X
PR6030
PC6056
change 2010/10/07IV@150P/50V_4N
PR158
2.2/F_6 change
1
PC6058
294K/F_4
(Peak 33A ,AVG 23A)
PR6025IV@2.8K/F_4
IV@330P/50V_4X
+5VPCU
PR128
2.2/F_4
PR6027
UGATE_GT
PC6060
IV@0.1U/50V_6X
PC6054 IV@1000P/50V_4X
IV@39P/50V_4N
PC6055
VIN
PQ71
IV@RMW130N03FUBTB
PR6031
PC6050
*IV@2200P/50V_4X
PC6048IV@0.22U/25V_6X
VCC_AXG_SENSE
VSS_AXG_SENSE
[5] VCC_AXG_SENSE
PR6024
[5] VSS_AXG_SENSE
IV@20K/F_4
IV@787/F_4
PC6059
IV@0.1U/50V_6X
PC6053
IV@330P/50V_4X
PC6049
*IV@0.1U/25V_4X
PC6047 IV@330P/50V_4X
PC6051
IV@10U/25V_8X
BOOT_GT
+VCC_CORE
PL8
Max. DCR=1.1m
4
PC11 0.22U/25V_6X
2.2/F_6
1
2
3
ISEN_1
LGATE_2
PC2
ISEN_2
0.22U/25V_6X
VSUM-
PC43
RDSon=2.3m ohm
1000P/50V_4X

PR22
3.65K/F_6
VSUM+
PR23
10K/F_6
ISEN_2
PR21
PR18
*10K/F_4
1/F_6
VSUM-
ISEN_1

PROJECT : BU5
Size
Document Number
Date:
Rev
2A
+VCC_CORE (ISL95831)
5
Sheet
33
of
35
+3VPCU
PU10
G9661-25ADJF12U
0.1U/25V_4X
PR209 1
0_4
2
3
8
9
PC185
10U/6.3V_8X
PC189
0.1U/25V_4X
VPP PGOOD
VEN
VIN
GND
GND
PC191
*0.1U/25V_4X
[27]
VO
+1.8V
(Peak 1.45A, AVG 1A)

PC184
10U/6.3V_8X
ADJ
PC181
MAINON
+3VPCU
HWPG_1.8V
NC
[15,21,27,31]
PR202
R1
12.7K/F_4
PR204
10K/F_4
Vout =0.8(1+R1/R2)
R2
VIN
+3V_S5
PR52
1M/F_6
+15V
+5V_S5
PR57
*22_8
PR40
*22_8
PR19
1M/F_6
S5D [29]
S5D
[27]
P34
PR206
*100K_4
+5VPCU
S5_ON
2
PC14
PQ3
DTC144EUBTL_30MA
*2N7002K_300MA
VIN
+3V
PR69
1M/F_6
*2N7002K_300MA
+5V
PR61
*22_8
PQ1
PQ4
2200P/50V_4X
2N7002K_300MA
+1.5V
PR74
*22_8
PR37
1M/F_6
PQ2
+15V
PR64
*22_8
PR73
1M/F_6
MAIND
MAINON
2
PC65
2200P/50V_4X
DTC144EUBTL_30MA
2N7002K_300MA
*2N7002K_300MA
[15]
PQ5
PQ9
PQ7
PQ10
[15,21,27,31]
PQ11
PR58
1M/F_6
[15,29,30]
MAINON_ON_G
*2N7002K_300MA
*2N7002K_300MA
MAINON_ON_G

PROJECT : BU5
Size
Document Number
Rev
2A
Discharge
Date:
5

1
Sheet
34
of
35
AO6402A
P.29
OCP 10.37A
+5VPCU
AC/DC Insert enable
(Peak 9A , AVG 6.5A)
PM6686
P.29
AC
D
DC
System
Charger
ISL88731C
P.28
41
S5D enable
+5V_S5
AO6402A
P.29
+5V
AO6402A
P.32
+VCCSA
AO6402A
P.29
+3V
(peak 1A,
Avg 0.7A)
MAIND enable
(peak 3.5A,
Avg 2.4A)
OCP 8.12A
HWPG_VTT enable
(peak 6A,
Avg 4.2A)
OCP 11.65A
+3VPCU
AC/DC Insert enable
(peak 10.257A,
Avg 7.17A)
+SMDDR_VTERM
SUSON enable
RT8207LGQW
P.30
MAIND enable
(peak 6.456A,
Avg 4.52A)
S5D enable
AO6402A
P.29
+3V_S5
G966-25ADJ
P.34
+1.8V
AO6402A
P.30
+1.5V
(peak 0.36A,
Avg 0.25A)
G9661-25ADJF12U
P.30
SUSON enable
+1.05VSUS (peak 1.2A, Avg 0.7A)
MAINON enable
(peak 1.45A,
Avg 1A)
+SMDDR_VREF
SUSON enable
OCP 23A
+1.5VSUS
SUSON enable
(Peak 21.3A , AVG 14.796A)
RT8240BGQW
MAIND enable
(peak 0.16A,
Avg 0.11A)
OCP 20A
+1.05V,+VTT
MAINON enable
P.31
(Peak 18.098A , AVG 12.669A)
OCP= 63.6A
VCC_CORE
VRON enable
ISL95835HRTZ-T
P.33
B
Discharge
P.34
(Peak 53A , AVG 53A)
OCP= 39A
+VAXG
VRON enable
(Peak 33A , AVG 23A)

PROJECT : BU5
Size
Document Number
Date:
Rev
2A
POWER TREE TABLE

5
Sheet
35
of
35

Quanta BU5

Загружено:

Сведения о документе

Оригинальное название

Авторское право

Доступные форматы

Поделиться этим документом

Поделиться или встроить документ

Параметры публикации

Этот документ был вам полезен?

Это неприемлемый материал?

Авторское право:

Доступные форматы

Quanta BU5

Загружено:

Авторское право:

Доступные форматы

1

BU5 Block Diagram

Dual Channel DDR III

DDR SYSTEM MEMORY

HDMI-passive level shift

USB 2.0 (Port0~13)

P7,8, 9, 10, 11,12

USB 3.0 Conn.

Quanta Computer Inc.

Wednesday, November 17, 2010

Schematic Block Diagram

CRT & CRT BUS SWITCH

HALL SENSOR&BACK LIGHT SWITCH

HDMI comm part

Main SATA HDD & 2nd SATA HDD

MINI Card (Wi-Fi & WIMAX)

MINI Card 2nd

MINI Card 3nd

INT KeyBoard & K/B LED Power

New Card (Express Card)

E-SATA comb USB

Audio & USB Board

RF LED / WIMAX LED / Kill SW

System 5V/3V (ISL6237)

CPU CORE (ISL62882)

AC/DC Insert enable

AC/DC Insert enable

USB 2.0 (colay W USB 3.0)

DDR 1.5V (TPS51116)

Power Tree Table

PCH Power Plane

Quanta Computer Inc.

Wednesday, November 17, 2010

POWER STAGE AND BOI-FUNCTION

Sandy Bridge Processor (CLK,MISC,JTAG)

Sandy Bridge Processor (DMI,PEG,FDI)

REV-A1A Change from 26.1/F_4 to 25.5/F_4

REV-A1A add 0.01uF capacitor

JTAG & BPM

PCI EXPRESS* - GRAPHICS

Processor pull-up <CPU>

Level Shift <CPU>

Thermal Trip <CPU>

DP & PEG Compensation

W=12mil; S=15mil; L<500mil

W=12mil; S=15mil; L<500mil

FDI Disabling (Discrete Only)

CPU Thermal sensor / MB Local TEMP <THC>

FAN Control-->For one FAN solution <THC>

REV-A1A Reserve Q8003

Rset(Kohm)=0.0012T*T-0.9308T+96.147,Shut down on 86dgree

REV-C3A Change VCC PIN5 of U3 from +3VPCU to VL

Quanta Computer Inc.

Sandy Bridge 1/4

Monday, December 20, 2010

Sandy Bridge Processor (DDR3)

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY A

Quanta Computer Inc.

Monday, December 20, 2010

Sandy Bridge 2/4

Sandy Bridge Processor (GRAPHIC POWER)

REV-A1A Change Footprint from 0804 to 0603