ECE 645: Lecture 5

Conditional-Sum Adders and Parallel Prefix Network Adders

Required Reading
Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design Chapter 7.4, Conditional-Sum Adder Chapter 7.5, Hybrid Adder Designs Chapter 6.4, Carry Determination as Prefix Computation Chapter 6.5, Alternative Parallel Prefix Networks

Note errata at:

http://www.ece.ucsb.edu/~parhami/text_comp_arit_1ed.htm#errors

Recommended Reading
J-P. Deschamps, G. Bioul, G. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems Chapter 11.1.9, Prefix Adders

Conditional-Sum Adders

One-level k-bit Carry-Select Adder

Two-level k-bit Carry Select Adder

Conditional Sum Adder

Extension of carry-select adder Carry select adder
One-level using k/2-bit adders Two-level using k/4-bit adders Three-level using k/8-bit adders Etc.

Assuming k is a power of two, eventually have an extreme where there are log2k-levels using 1-bit adders
This is a conditional sum adder
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Conditional Sum Adder: Top-Level Block for One Bit Position

Three Levels of a Conditional Sum Adder

xi+3 yi+3 xi+2 yi+
2

xi+1 yi+1

xi yi

branch point
1-bit conditional sum block

concatenation

c=1 c=0 2 1 1

c=1 c=0 2

c=1 c=0 2 1

c=1 c=0 2

1+1
1 1 1 2 2 1 1 2

c=1 3

c=0 3 1

c=1 3

c=0 3

2+1
2 2

1 3 3

5 5

4+1

c=1

c=0

block carry-in determines selection

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16-Bit Conditional Sum Adder Example

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Conditional Sum Adder Metrics

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Parallel Prefix Network Adders

Parallel Prefix Network Adders

Basic component - Carry operator (1) g B p B

B g p g p

g = g + gp p = pp (g, p) = (g, p) (g, p) = (g + gp, pp)

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Parallel Prefix Network Adders

Basic component - Carry operator (2) g p overlap okay! B B

B g p g p

g = g + gp p = pp (g, p) = (g, p) (g, p) = (g + gp, pp)

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Properties of the carry operator

Associative [(g1, p1) (g2, p2)] (g3, p3) = (g1, p1) [(g2, p2) (g3, p3)]

Not commutative
(g1, p1) (g2, p2) (g2, p2) (g1, p1)

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Parallel Prefix Network Adders

Major concept
Given:
(g0, p0) (g1, p1) (g2, p2) . (gk-1, pk-1)

Find:
(g[0,0], p[0,0]) (g[0,1], p[0,1]) (g[0,2], p[0,2]) (g[0,k-1], p[0,k-1])

ci = g[0,i-1] + c0p[0,i-1]

block generate from index 0 to k-1

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Similar to Parallel Prefix Sum Problem

Parallel Prefix Sum Problem

Given:
x0 Find: x1 x2 xk-1 x0+x1+x2+ + xk-1

x0 x0+x1 x0+x1+x2

Parallel Prefix Adder Problem Given: x0 x1 x2 Find: x0 x0 x 1 x0 x 1 x 2

xk-1 x0 x1 x2 xk-1
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where xi = (gi, pi)

Parallel Prefix Sums Network I

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Parallel Prefix Sums Network I Cost (Area) Analysis

Cost = C(k) = 2 C(k/2) + k/2 = = 2 [2C(k/4) + k/4] + k/2 = 4 C(k/4) + k/2 + k/2 = = . = = 2 log2 k-1C(2) + k/2 (log2k-1) = = k/2 log2k C(2) = 1 Example: C(16) = 2 C(8) + 8 = 2[2 C(4) + 4] + 8 = = 4 C(4) + 16 = 4 [2 C(2) + 2] + 16 = = 8 C(2) + 24 = 8 + 24 = 32 = (16/2) log2 16
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Parallel Prefix Sums Network I Delay Analysis

Delay = D(k) = D(k/2) + 1 = = [D(k/4) + 1] + 1 = D(k/4) + 1 + 1 = = . = = log2k D(2) = 1 Example: D(16) = D(8) + 1 = [D(4) + 1] + 1 = = D(4) + 2 = [D(2) + 1] + 2 = = 4 = log2 16
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Parallel Prefix Sums Network II (Brent-Kung)

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Parallel Prefix Sums Network II Cost (Area) Analysis

Cost = C(k) = C(k/2) + k-1 = = [C(k/4) + k/2-1] + k-1 = C(k/4) + 3k/2 - 2 = = . = = C(2) + (2k - 2k/2(log 2k-1)) - (log2k-1) = = 2k - 2 - log2k C(2) = 1 Example: C(16) = C(8) + 16-1 = [C(4) + 8-1] + 16-1 = = C(2) + 4-1 + 24-2 = 1 + 28 - 3 = 26 = 216 - 2 - log216
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Parallel Prefix Sums Network II Delay Analysis

Delay = D(k) = D(k/2) + 2 = = [D(k/4) + 2] + 2 = D(k/4) + 2 + 2 = = . = = 2 log2k - 1 D(2) = 1 Example: D(16) = D(8) + 2 = [D(4) + 2] + 2 = = D(4) + 4 = [D(2) + 2] + 4 = = 7 = 2 log2 16 - 1
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8-bit Brent-Kung Parallel Prefix Network

x7 x6 x5 x4 x3 x2 x1 x0

4 bit B-K PPN

s7

s6

s5

s4

s3

s2

s1

s0

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4-bit Brent-Kung Parallel Prefix Network

x7 x5 x3 x1

2 bit B-K PPN

s7

s5

s3

s1
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8-bit Brent-Kung Parallel Prefix Network Adder

x7 y7 GP g7,p7 x6 y 6 GP g6,p6 x5 y5 GP g5,p5 x4 y4 x3 y3 GP g4,p4 GP g3,p3 x2 y 2 GP g2,p2 x1 y 1 GP g1,p1 x0 y0 GP g0,p0

c critical path c

g[0,7] p[0,7] C c8

g[0,6] p[0,6] C c7 S s7 p7 c 6

g[0,5] p[0,5] C S s6

g[0,4] p[0,4] C

g[0,3] p[0,3] C

g[0,2] p[0,2] C

g[0,1] p[0,1] C

g[0,0] p[0,0] C

c0 p0 S s0
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p6 c 5 S s5

p5 c4 S s4

p4 c3 S s3

p3 c 2 S s2

p2 c1 S s1

p1

Critical Path
GP

gi = xi yi pi = xi yi g = g + g p p = p p ci+1 = g[0,i] + c0 p[0,i] si = pi ci

1 gate delay

2 gate delays

2 gate delays

1 gate delay
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Brent-Kung Parallel Prefix Graph for 16 Inputs

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Kogge-Stone Parallel Prefix Graph for 16 Inputs

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Parallel Prefix Network Adders

Comparison of architectures Hybrid Network 2 Kogge-Stone Brent-Kung Delay(k) 2 log2k - 2 log2k+1 k/2 log2k 5 32 6 80 log2k k log2k - k + 1 4 49 5 129
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Cost(k)
Delay(16)

2k - 2 - log2k
6 26 8 57

Cost(16)
Delay(32) Cost(32)

Latency vs. Area Tradeoff

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Hybrid Brent-Kung/Kogge-Stone Parallel Prefix Graph for 16 Inputs

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