VHDL PROBLEMS Q1. Write program for the following components using data flow style of modeling. 1.

Half adder and full adder 2. 2X4 decoder with enable as input. 3. 4X1 Multiplexer. Q2.Implement the following in VHDL using behavioral coding a) 4X1 multiplexer using sequential statements (case statement) Q3.Implement a full adder in VHDL with structural coding using half adder as Component. Q4. Implement a combinational 2X4 decoder in VHDL. Using a) behavioral coding b) structural coding using MUX as a component Q5. Implement a D-latch with a data input, an enable input and a data output port Q6. Implement a negative trigger D-flip flop with a data input, clock signal and a data output port Q7 a) Implement a negative trigger JK flip-flop in VHDL b) Using this flip-flop implement a four bit ripple counter

Q7. Implement a 4-bit SIPO shift register in VHDL assuming the program of D flip flop is given to you.