Академический Документы
Профессиональный Документы
Культура Документы
( Defeature )
3
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
of
89
BLOCK DIAGRAM
Mobile Tualatin
or
Coppermine-T
(uFCBGA/uFCPGA)
Thermal Sensor
MAX1617MEE
PAGE 8
PAGE 7
PAGE 16
VCH
Almador-M
GMCH-M
SO-DIMM X2
Memory Bus
PAGE 15
PAGE 15
PSB
LVDS
Conn.
CK TITAN
ICS9250-38
PAGE 5
PAGE 4,5
CRT
Conn.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
BANK 0, 1, 2, 3
Docking Connector
PAGE 14
LAN
USB X 2
625 BGA
TV-Out
Conn. PAGE 16
TV-Out
Encoder
SERIAL PORT
PAGE 9,10,11
PAGE 15
HUB
Interface
HDD Connector
PARALLEL PORT
DC-IN JACK
LAN
LINE OUT
Kinnereth
82562ET
EXT. MIC IN
CRT CONN.
PAGE 25
PAGE 37
PS/2 CONN.
ATA 66/100
IEEE-1394
Controller
PAGE 21
PAGE 22
CD-ROM Connector
PAGE 36
ICH3-M
2nd IDE
PAGE 21
421 BGA
PCI BUS
USB
PAGE 17,18
PAGE 20
Mini PCI
Socket
DC/DC Interface
RTC Battery
PAGE 38
PAGE 39
LPC
CardBus
OZ6933T
PAGE 23
Super I/O
Slot 0/1
BATTERY
Charger
PAGE 24
Embedded
Controller
NS PC87391
PAGE 32
PAGE 42
NS PC87591
Audio
Controller
ES1988
PAGE 30
PAGE 27
EQ Circuit
POWER
Interface
PAGE 29
PAGE 40,41,42,44
Parallel
PAGE 33
FIR
PAGE 33
ROM
BIOS
FDD
PAGE 33
PAGE 31
Scan KB
PS/2 Interface
Mic Jack
PAGE 35
PAGE 28
PAGE 35
Audio Amplifier
PAGE 28
Title
Size
Document Number
Custom
Rev
2A
401200
Date:
A
, 10, 2002
Sheet
E
of
89
Voltage Rails
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Power Plane
Description
S1
S3
S5
VIN
N/A
N/A
N/A
B+
N/A
N/A
N/A
+VCC_H_CORE
ON
OFF
OFF
+VTT
ON
OFF
OFF
+1.5V_ALW
ON
ON
ON*
+1.5V_SW
AGP 4X
ON
OFF
OFF
+1.8V_ALW
ON
ON
ON*
+1.8V_SW
ON
OFF
OFF
OFF
+2.5V
ON
ON
+2-5V_MRIMM
ON
OFF
OFF
+3V_ALW
ON
ON
ON*
+3V
ON
ON
OFF
+3V_SW
ON
OFF
OFF
+5V_ALW
ON
ON
ON*
+5V
5V power rail
ON
ON
OFF
+5V_SW
ON
OFF
OFF
+12V_ALW
ON
ON
ON*
+12V_SW
ON
OFF
OFF
RTCVCC
RTC power
ON
ON
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Device
IDSEL#
LAN
(AD24 internal)
CardBus
AD20
PIRQA/PIRQB
Audio Controller
AD19
PIRQD
Mini-PCI
AD18
PIRQC
Mini-PCI(LAN)
AD22
PIRQD
IEEE-1394 Controller
AD16
PIRQA
EC SM Bus1 address
Device
REQ#/GNT#
Interrupts
EC SM Bus2 address
Device
Smart Battery
0001 011X b
MAX1617MEE
1001 110X b
EEPROM
1010 000X b
OZ163
0011 0100 b
Docking
0011 011X b
DOT Board
XXXX XXXXb
1010 000X b
Clock Gen.
1101 001X b
Title
Size
Document Number
Custom
Rev
2A
401200
Date:
A
, 10, 2002
Sheet
E
of
89
+VCC_H_CORE
K1
J1
G2
K3
J2
H3
G1
A3
J3
H1
D3
F3
G3
C2
B5
B11
C6
B9
B7
C8
A8
A10
B3
A13
A9
C3
C12
C10
A6
A15
A14
B13
A12
A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35
R1
L3
T1
U1
L1
T4
AA3
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
RP#
ADS#
W2
AB3
P3
C14
AF23
AF4
AERR#
AP#0
AP#1
BERR#
BINIT#
IERR#
H_BPRI#
H_BNR#
H_LOCK#
A7
C4
C22
AD23
R2
L2
V3
BREQ0#
NC
NC
NC
BPRI#
BNR#
LOCK#
H_HIT#
H_HITM#
H_DEFER#
AA2
U2
T3
HIT#
HITM#
DEFER#
H_REQ#[0..4]
H_REQ#[0..4]
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADS#
+1.5V_SW
3
9
9
9
9
9
9
R19
1
1.5K
2
R28
1
10
2
TUALATIN
VCC
Address
Lines
Mobile
Tualatin
Data
Signals
Request
Signals
Error
Interface
Arbitration
Signals
Snoop
Signals
VSS
VCC
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74
VCC_73
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_D#[0..63]
D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8
D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63
A16
B17
A17
D23
B19
C20
C16
A20
A22
A19
A23
A24
C18
D24
B24
A18
E23
B21
B23
E26
C24
F24
D25
E24
B25
G24
H24
F26
L24
H25
C26
K24
G26
K25
J24
K26
F25
N26
J26
M24
U26
P25
L26
R24
R26
M25
V25
T24
M26
P24
AA26
T26
U24
Y25
W26
V26
AB25
T25
Y24
W24
Y26
AB24
AA24
V24
H_D#[0..63] 9
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
P6
M6
AC5
AA5
AB6
W5
Y6
U5
U4A
H_A#[3..31]
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
H_A#[3..31]
E16
VSS_0
R4
VSS_1
E25
VSS_2
G25
VSS_3
J25
VSS_4
L25
VSS_5
N25
VSS_6
R25
VSS_7
U25
VSS_8
W25
VSS_9
AA25
VSS_10
AC25
VSS_11
AF25
VSS_12
AE26
VSS_13
C23
VSS_14
F23
VSS_15
H23
VSS_16
K23
VSS_17
M23
VSS_18
P23
VSS_19
T23
VSS_20
V23
VSS_21
Y23
VSS_22
AB23
VSS_23
AE23
VSS_24
B22
VSS_25
D21
VSS_26
F21
VSS_27
E22
VSS_28
H21
VSS_29
G22
VSS_30
K21
VSS_31
J22
VSS_32
M21
VSS_33
L22
VSS_34
P21
VSS_35
N22
VSS_36
T21
VSS_37
R22
VSS_38
V21
VSS_39
U22
VSS_40
Y21
VSS_41
W22
VSS_42
AB21
VSS_43
AA22
VSS_44
AC22
VSS_45
AE21
VSS_46
B20
VSS_47
D19
VSS_48
AB19
VSS_49
AA20
VSS_50
AC20
VSS_51
AE19
VSS_52
B18
VSS_53
D17
VSS_54
F17
VSS_55
E18
VSS_56
AB17
VSS_57
D22
F22
E21
H22
G21
K22
J21
M22
L21
P22
N21
T22
R21
V22
U21
Y22
W21
AB22
AA21
AC21
D20
F20
E19
AB20
AA19
AC19
D18
F18
E17
AB18
AA17
AC17
D16
F16
E15
AB16
AA15
AC15
D14
F14
E13
AB14
AA13
AC13
D12
F12
E11
AB12
AA11
AC11
D10
F10
E9
AB10
AA9
AC9
D8
F8
E7
AB8
AA7
AC7
D6
F6
E5
H6
G5
K6
J5
N5
T6
V6
+VCC_H_CORE
4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
of
89
+VTT
+1.8V_SW
H_TRDY#
17
H_STPCLK#
17,42 H_DPSLP#
17
H_INTR
17
H_NMI
17
H_INIT#
9
H_INTR
H_NMI
H_RESET#
9
9
+1.5V_SW
W3
Y1
H_DBSY#
H_DRDY#
R40
150
R42
150
8,11
8
DBSY#
DRDY#
Analog
THERMDA
THERMDC
H_BSEL0
H_BSEL1
AE12
AF10
2 AF16
110_1%
1
R35
Mobile
Tualatin
SELFSB0
SELFSB1
EDGECTRLP
R284 1
26.7_1%
PIC_CLK
C449
8 CLK_CPU_APIC
AF13
AF14
VTT Ref
H_THERMDA
H_THERMDC
R286
137_1%
R285 2
1
@33
7
7
7
7
7
7
7
+VS_CMOSREF
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_PREQ#
ITP_PRDY#
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_PREQ#
ITP_PRDY#
Note :
GHI# Pull-Up internally
1
R38
2
56.2_1%
PICD0
PICD1
PICCLK
APIC
AF22
AE20
AD22
AD21
RP2#
RP3#
BPM0#
BPM1#
Debug
Break
Point
AD10
AD7
AD11
AF7
AF15
AF19
AE22
TCK
TDI
TDO
TMS
TRST#
PREQ#
PRDY#
AF12
AD5
AE16
CMOSREF_1
CMOSREF_0
RTTIMPDEP
L5
17 PM_CPUPERF#
CLK0
CLK0#
TESTLO
AC1
AD1
M1
8P4R_1K
+V_AGTLREF
+VCC_H_CORE
+VTT
TESTLO1
VCPU_PLL1
VCPU_PLL2
1
L10
2
4.7UH
C27
33UF_D2_16V
CLK_HCLK
CLK_HCLK#
TESTLO2
AF18
AD16
AF11
AE8
N24
AE10
E2
NC
NCHCTRLP
TESTHI
NC
NC
NC
TESTHI
CLK_HCLK 8
CLK_HCLK# 8
R41
1
NCHCTRLP
TESTHI1
14_1%
2
TESTHI2
CLK_HCLK
Test
Access
PORT
P4
( ITP )
VCCT
VID
R261
@33
C378
@10PF
C377
@10PF
VTT_PWRGD
E3
VTTPWRGOOD
CLK_HCLK#
R262
@33
AD4
A5
D1
AD13
B1
P26
A11
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
D26
NC
GHI#
+VTT
Y4
R5
N3
N2
P1
P5
E1
F1
NC
+5V_ALW
W=40mil
TESTLO
VCC
PLL1
PLL2
NC
NC
NC
NC
TESTLO1
TESTLO2
TESTHI2
TESTHI1
+VTT
AD19
AD17
AF20
@10PF
AF21
AB26
H26
A21
AF9
A4
N1
AA1
+VTT
8
7
6
5
+1.5V_SW
VREF_1
VREF_2
VREF_3
VREF_4
VREF_5
VREF_6
VREF_7
VREF_8
1
2
3
4
VSS_142
VSS_141
VSS_140
VSS_139
VSS_138
VSS_137
VSS_136
VSS_135
VSS_134
VSS_133
VSS_132
VSS_131
VSS_130
H_IGNNE#
H_SMI#
AE24
AD25
AE25
AC24
AF24
AD26
AC26
AD24
Data
Signals
A20M#
FERR#
FLUSH#
IGNNE#
SMI#
PWRGOOD
STPCLK#
DPSLP# Compatibility
INTR/LINT0
NMI/LINT1
INIT#
RESET#
F19
E20
C25
A25
AE1
AD2
AB2
Y2
V2
T2
P2
M2
K2
17
17
AC3
AF6
AF5
AD9
AD3
AB4
AE4
AF8
AD15
AE14
AE6
B15
C1
NC
AF17
NC
N4
NC
H_PWRGD
H_FLUSH#
H_IGNNE#
B26
VSS
M4
VSS
AF26
VSS
17
H_A20M#
H_A20M#
VID0
VID1
VID2
VID3
VID4
H_FERR#
AB1
AC2
AE2
AF3
R3
17
17
RP1
DEP#0
DEP#1
DEP#2
DEP#3
DEP#4
DEP#5
DEP#6
DEP#7
GND
1.5K
2
1.5K
RS#0
RS#1
RS#2
RSP# Request
TRDY# Signals
R22
Y3
V1
U3
M5
W1
R21
3K
H_RS#0
H_RS#1
H_RS#2
R13
9
9
9
A26
VCCT_1
G23
VCCT_2
J23
VCCT_3
L23
VCCT_4
N23
VCCT_5
R23
VCCT_6
U23
VCCT_7
W23
VCCT_8
AA23
VCCT_9
C21
VCCT_10
C19
VCCT_11
AD20
VCCT_12
C17
VCCT_13
AD18
VCCT_14
C15
VCCT_15
C13
VCCT_16
AD14
VCCT_17
C11
VCCT_18
AD12
VCCT_19
C9
VCCT_20
C7
VCCT_21
AD8
VCCT_22
C5
VCCT_23
AD6
VCCT_24
AC23
VCCT_25
AA4
VCCT_26
E4
VCCT_27
G4
VCCT_28
J4
VCCT_29
L4
VCCT_30
AC4
VCCT_31
V4
VCCT_32
AE3
VCCT_33
AF2
VCCT_34
AF1
VCCT_35
AE18
VCCT_36
D5
VCCT_37
E6
VCCT_38
Place H_RESET#
R267
R272<0.1" from 56.2_1%
U6
+1.5V_SW
+1.5V_SW
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
U4B
AA18
AC18
AE17
B16
D15
F15
AB15
AA16
AC16
AE15
B14
D13
F13
E14
AB13
AA14
AC14
AE13
B12
D11
F11
E12
AB11
AA12
AC12
AE11
B10
D9
F9
E10
AB9
AA10
AC10
AE9
B8
D7
F7
E8
AB7
AA8
AC8
AE7
B6
F5
H5
G6
K5
J6
N6
L6
T5
R6
V5
U6
Y5
W6
AB5
AA6
AC6
AE5
B4
D4
F4
H4
K4
M3
U4
W4
B2
D2
F2
H2
TUALATIN
R274
200
CPU_VR_VID4
CPU_VR_VID3
CPU_VR_VID2
CPU_VR_VID1
CPU_VR_VID0
C422
+3V_SW
+VTT
R18
1K
2
2
R16
18K
VTT_PWRGD# 8,29
1
Q8
3 3904
4
2
VCC
2
1
@2.2UF_16V_0805
R273
100K
Title
1K
2
VTT_PWRGD
C758
From 87591
+5V_ALW
R36
1
42
VTT_PWRGD
2
R268
+5V_ALW
DXN
10
6
C58
2200PF
GND
GND
H_THERMDC
2K
EC_SMC_2 29,33,36
EC_SMD_2 29,33,36
8
7
14
12
11
10K
R17
Thermal Sensor
MAX1617/NE1617
U6
SMBC
SMBD
ALERT#
ADD0
ADD1
MAX1617
16 NC
13 NC
9 NC
5 NC
1
H_THERMDA 3 NC
DXP
STBY#
15
.1UF
7
7
7
7
7
100K
2
R37
1
Address:1001_110X
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
of
89
Layout note :
Place close to CPU, Use 2~3 vias per PAD.
Place .47uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD.
Layout note :
C42
+
150UF_D2_6.3V
C75
+
150UF_D2_6.3V
C105
+
150UF_D2_6.3V
C47
150UF_D2_6.3V
1
+
C51
+
150UF_D2_6.3V
C392
150UF_D2_6.3V
.22UF_0603
.22UF_0603
.22UF_0603
C426
C428
.22UF_0603
.22UF_0603
C440
C434
.22UF_0603
2
C404
C413
.22UF_0603
.22UF_0603
1
2
C437
C401
.22UF_0603
.22UF_0603
C396
C411
.22UF_0603
C399
C398
.22UF_0603
+VTT
+VCC_H_CORE
+VCC_H_CORE
.22UF_0603
.22UF_0603
C91
C436
C56
C29
C43
C41
C63
C55
C101
C102
1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603
.22UF_0603
C438
C439
.22UF_0603
.22UF_0603
C425
C432
.22UF_0603
2
C402
C410
.22UF_0603
.22UF_0603
1
2
C403
C433
.22UF_0603
.22UF_0603
C427
C435
.22UF_0603
C397
C412
.22UF_0603
+VTT
C406
10UF_10V_1206
Tualatin
C17
10UF_10V_1206
2
C407
10UF_10V_1206
2
C62
10UF_10V_1206
2
C98
10UF_10V_1206
+VCC_H_CORE
------------------------------------------------------D4 D3 D2 D1 D0
QS( MP)
C25
10UF_10V_1206
C46
10UF_10V_1206
0 1 0 0 1
1.40V
0 1 1 0 0
1.15V
-------------------------------------------------------
1
C390
10UF_10V_1206
2
C99
10UF_10V_1206
2
C429
10UF_10V_1206
2
CPU_Core(V)
------------------------------------------------------1
+VCC_H_CORE
+VCC_H_CORE
3
C387
+
150UF_D2_6.3V
1
C28
+
150UF_D2_6.3V
C76
150UF_D2_6.3V
D4 D3 D2 D1 D0
CPU_Core(V) ES(before MP)
-------------------------------------------------------
1
C391
+
150UF_D2_6.3V
2
1
C104
+
150UF_D2_6.3V
2
C59
+
150UF_D2_6.3V
Coppermine-T
0 0 0 0 1
1.70V
0 1 0 0 0
1.35V
-------------------------------------------------------
+VCC_H_CORE
C444
+
150UF_D2_6.3V
1
C471
+
150UF_D2_6.3V
C52
150UF_D2_6.3V
CPU_Core(V)
QS( MP)
0 0 0 0 1
1.70V
0 1 0 0 0
1.35V
-------------------------------------------------------
1
C469
+
150UF_D2_6.3V
2
1
C424
+
150UF_D2_6.3V
2
C24
+
150UF_D2_6.3V
D4 D3 D2 D1 D0
-------------------------------------------------------
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
of
89
+3V
+VTT
R133
249_1%
BE#
VCC
24
13
BX
GND
12
C515
.01UF
+1.8V_SW
1
R152
301_1%
12
1
1
1
1
C430
.1UF
C229 1
+VTT
+1.5V_SW
+VTT
+VAGP_CRDREF
R134
82.5_1%
C643
.1UF
R113
1K_1%
R119
82.5_1%
CLK_ITPP
200
150
200
56.2_1%
+1.8V_SW
ITP_TDI
5
ITP_TDO 5
ITP_TRST# 5
1
R43
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
R296
576_1%
ITP_PREQ# 5
ITP_PRDY# 5
2
240
R34
1
510
2
GND
GND
GND
TDI
TDO
TRST#
BSEN#
PREQ0#
PRDY0#
PREQ1#
PRDY1#
NC
NC
NC
BCLK#
RESET#
DBRESET#
TCK
TMS
POWERON
DBINST#
GND
GND
GND
GND
GND
GND
GND
GND
BCLK
CLK_ITPP# 8
1
R287
2K_1%
R317
R332
@10
@10
12
12
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
@ITP_RECEPTACLE
1
C496
C512
@15PF
@15PF
Title
2 470PF
R270
39
C216 1
R44
R275
1.5K
10K
2
ITP_TCK
ITP_TMS
1
240
5
5
2
R311
R269
39
JP15
H_RESETX#
56.2_1%
9
R266
R86
R313
R84
R79
+VTT
R328
240
R438
301_1%
2 470PF
R127
1K_1%
2
+VTT
+1.5V_SW
+VS_HUBVSWING
+3V_ALW
1
+1.5V_SW
2
2
2
2
+1.8V_SW
In-Target Probe
C516
@.01UF
R435
301_1%
C423
.1UF
+5V_SW
@SN74CBT3383
2
R65
1K_1%
GND
C256
.1UF
BX
13
17,42 PM_DPRSLPVR
R159
301_1%
24
+VS_CMOSREF
VCC
+VS_HUBREF
1
BE#
5
9
15
19
23
D0
D1
D2
D3
D4
42
42
42
42
42
B0
B1
B2
B3
B4
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
4
8
14
18
22
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
2
6
10
16
20
C0
C1
C2
C3
C4
A0
A1
A2
A3
A4
Layout note :
STRAP_VID0
STRAP_VID1
STRAP_VID2
STRAP_VID3
STRAP_VID4
8
7
6
5
@10K
3
7
11
17
21
R68
499_1%
Layout note :
1
2
3
4
U33
MUX_VID0
MUX_VID1
MUX_VID2
RP2
@8P4R_10K MUX_VID3
MUX_VID4
+3V_SW
R100
+1.5V_SW
SN74CBT3383
C443
.1UF
17,42 PM_SSMUXSEL
C400
.1UF
+5V_SW
0 2 CPU_VID4
1R553
C388
.1UF
5
9
15
19
23
C389
.1UF
D0
D1
D2
D3
D4
R64
2K_1%
B0
B1
B2
B3
B4
+V_AGTLREF
C223
.1UF
4
8
14
18
22
+V_SMREF
R126
49.9_1%
AC_VID0
AC_VID1
AC_VID2
AC_VID3
AC_VID4
MUX_VID0 4
MUX_VID1 3
MUX_VID2 2
MUX_VID3 1
MUX_VID4
2
6
10
16
20
C0
C1
C2
C3
C4
A0
A1
A2
A3
A4
Layout note :
1. Place R70 and R75 between and GMCH and CPU.
2. Place decoupling caps near CPU.(Within 500mils)
3
7
11
17
21
CPU_VR_VID0
CPU_VR_VID1
CPU_VR_VID2
CPU_VR_VID3
CPU_VR_VID4
RP37 8P4R_0
CPU_VID0
5
CPU_VID1
6
CPU_VID2
7
CPU_VID3
8
18
18
18
18
18
8
7
6
5
2
5
5
5
5
5
U34
R62
1K_1%
249.9_1%
RP16
8P4R_1K
R333
1K
1
2
3
4
+3V_SW
CPU Voltege ID
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
of
89
+3V_CLK
L46
BLM21A601SPT
1
2
Width=40 mils
1
+3V_SW
+
C316
.01UF
C615
.01UF
2
C315
.01UF
2
C314
.01UF
2
C313
.01UF
2
C286
.01UF
2
C287
.01UF
2
C288
.01UF
2
C289
.01UF
2
C626
22UF_1206_10V
2
BLM21A601SPT
L52
1
8
14
19
32
37
46
50
5,29 VTT_PWRGD#
R232
10K
R364 1
2 10K
CLK_BCLK
1
R9 1
R5
2
2 33
60.4_1%
R6 1
CLK_BCLK# R10 1
2 60.4_1%
2 33
CLK_HT
1
R2781
R282
2
2 33
60.4_1%
R2801
R2771
2 60.4_1%
2 33
1
R3181
R320
2
2 33
60.4_1%
R396 2
0
VTT_PWRGD#
44
HOST_CPU#
CPUCLKT1
49
GMCH_CPU
R397
2
R394 2
0
17
CLK_ICH48
R389 1
CLK_DREF
R390 1
VCH_66M
2 220_1%
2 33
USB_48M
CPUCLKC1
48
CPUCLKT0
52
MULT0
2 22
SDATA
SCLK
33
35
3V66_0/DRCG
3V66_1/VCH_CLK
DOT_48M
39
38
GMCH_CPU#
R393
CLK_HT#
IREF
CLK_ITP
51
66MHZ_IN/3V66_5
24
66MHZ_OUT2/3V66_4
66MHZ_OUT1/3V66_3
66MHZ_OUT0/3V66_2
23
22
21
56
48MHZ_USB
PCICLK_F2
PCICLK_F1
PCICLK_F0
48MHZ_DOT
REF
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
GBIN_66M
ICH_66M
2 240K
R434 1
R433 1
2 33
2 33
2 60.4_1%
2 @33
CLK_ITPP 7
CLK_ITPP# 7
C655 .01UF
7
6
5
ICH_33M
APIC_33M
R425 1
R424 1
2 33
2 33
18
17
16
13
12
11
10
CB_33M
AUD_33M
SIO_33M
1394_33M
R432
R431
R430
R429
2
2
2
2
EC_33M
MINI_33M
R427 1
R426 1
1
1
1
1
C653
R437
2
@33
GBIN_ISO
1
@10PF
CLK_GBIN 9
CLK_ICHHUB 17
CLK_ICHPCI 17
CLK_CPU_APIC 5
PCIF1
33
33
33
33
CLK_PCI_CB 23
CLK_PCI_AUD 26
CLK_LPC_SIO 31
CLK_1394 22
2 33
2 33
CLK_LPC_EC 29
CLK_MINIPCI 37
C654
@10PF
4
9
15
20
31
36
41
47
ICS9250-38
C652
@10PF
C588
C589
@10PF @10PF
CLK_GHT# 9
CLK_GBOUT 9
R375 1
CLK_ITP#
CPUCLKC0
GND_REF
GND_PCI
GND_PCI
GND_3V66
GND_3V66
GND_48MHZ
GND_IREF
GND_CPU
REF_14M
CLK_ICH14
CLK_SIO14
2 33
2
33
R325
475_1%
R400 1
1
R399
CLK_GHT 9
R281
475_1%
29
30
42
CLK_HCLK# 5
R388 1
2 22_1%
28
CPU_CLKC2
PWR_DWN#
PCI_STOP#
CPU_STOP#
R391 1
CLK_HCLK 5
R8
475_1%
25
34
53
43
HOST_CPU
CLK_VCH
45
SEL2
SEL1
SEL0
3
2N7002
27
CPUCLKT2
R230
10K
2
2
1
D
Q29
17
31
GND_CORE
22
G
2N7002
3
14,17,19 SMB_CLK
2 0
2
G
R229
100K
14,17,19 SMB_DATA
+3V_SW
+12V_SW
+3V_SW
R231
100K
Q31
XTAL_OUT
C335
22UF_1206_10V
+12V_SW
R403 1
+3V_SW
+
C664
.01UF
40
55
54
17,29 PM_SLP_S1#
17 PM_STPPCI#
17 PM_STPCPU#
15
1
10PF
SEL1
SEL0
H_BSEL1
H_BSEL0
L50
BLM21A601SPT
1
2
26
Y3
14.318MHZ
2
C647
1K
5
5,11
VDD_CORE
R380
1K
XTAL_IN
R386
R365
100K
+3V_SW
1
10PF
2
C629
VDD_REF
VDD_PCI
VDD_PCI
VDD_3V66
VDD_3V66
VDD_48MHZ
VDD_CPU
VDD_CPU
U41
+3V_SW
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
of
89
AJ5
D2
AC5
Y5
U5
P5
L5
H5
AH2
AE2
AB2
W2
T2
N2
K2
G2
AC7
VSS_H0
VSS_H1
VSS_H2
VSS_H3
VSS_H4
VSS_H5
VSS_H6
VSS_H7
VSS_H8
VSS_H9
VSS_H10
VSS_H11
VSS_H12
VSS_H13
VSS_H14
VSS_H15
VSS_H16
H_A#[3..31]
Almador-M
GMCH
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_CPURST#
H_ADS#
H_BNR#
H_BPRI#
H_DBSY#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
R6
C1
E1
L4
G5
J4
F4
D3
D1
J6
G4
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
K6
M4
K5
K4
L6
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H6
H4
G6
H_RS#0
H_RS#1
H_RS#2
1
R96
H_RS#[0..2]
CLK_GHT 8
CLK_GHT# 8
R288
47
R297R298
.01UF
@33
C124
@10PF
@10PF
2
80.6_1%
@10PF
C527
.1UF
2
2 28_1%
2 54.9_1%
2
R112
1
2
+VAGP_CRDREF
C79
R82
@33
@33
240K
CLK_DREF 8
CLK_GBIN 8
CLK_GBOUT 8
2 GBOUT_ISO
2
1
R60
AC19
AG26
AD24GBOUT_GMCH
G8
VSSA_CPLL
AD7
VSSA_HPLL
AH26
VSSA_DAC
AH24
VSSP_DVO0
AF25
VSSP_DVO1
AF27
VSSP_DVO2
G28
VSSP_HUB0
H25
VSSP_HUB1
CLK_DREF
CLK_GBIN
CLK_GBOUT
1
R348 1
R109 1
C207
.01UF
H_RS#[0..2] 5
AJ4
AH5
+V_AGTLREF
C532
.1UF
R81
54.9_1%
1
C638
.1UF
H_RESETX# 7
H_RESET# 5
H_ADS# 4
H_BNR# 4
H_BPRI# 4
H_DBSY# 5
H_DEFER# 4
H_DRDY# 5
H_HIT#
4
H_HITM# 4
H_LOCK# 4
H_TRDY# 5
H_REQ#[0..4] 4
H_REQ#[0..4]
1
R361
17 HUB_PD[0..10]
17 HUB_PSTRB
17 HUB_PSTRB#
2
@0
C455 C456
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
+VS_HUBREF
CLK_HT
CLK_HT#
AH19
VSSPCMOS_LM0
AH20
VSSPCMOS_LM1
AF5
VSSPCMOS_LM2
Host
Interface
H_A#[3..31] 4
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H2
E3
G3
N4
M6
F1
F2
J3
F3
P6
G1
N5
H1
P4
T4
M2
J2
L2
R4
K1
L3
L1
J1
N1
T5
H3
M3
M1
K3
Host
Interface
AB23
VSS
AC23
VSS
82830
VSS
H_GTLRCOMP
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
C2
U4
P1
W6
U2
U6
R1
N3
W5
V4
P3
R3
U1
V6
W4
T3
P2
V3
R2
T1
W3
U3
Y4
AA3
W1
V1
Y1
Y6
AD3
AB4
AB5
V2
Y3
Y2
AA4
AA1
AA6
AB1
AC4
AA2
AB3
AD2
AD1
AC2
AB6
AC6
AC1
AF3
AD4
AD6
AC3
AH3
AE5
AE3
AG2
AF4
AF2
AJ3
AE4
AG1
AE1
AG4
AH4
AG3
AF1
AC22
DVO_RCOMP
F6
SM_RCOMP
J23
HUB_RCOMP
J25
AGP_REF
K24
AGP_RCOMP/DVOBC_RCOMP
AB24
RESET#
AA7
H_GTLREF1
J7
H_GTLREF0
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
AC26
VSSP_IO0
AD22
VSSP_IO1
AE28
VSSP_IO2
U30A
H_D#[0..63]
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
H_D#[0..63]
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
HUB_PSTRB
HUB_PSTRB#
HUB_REF
M12
M13
M17
M18
N12
N13
N14
N15
N16
N17
N18
P13
P14
P15
P16
P17
R13
R14
R15
R16
R17
T13
T14
T15
T16
T17
U12
U13
U14
U15
U16
U17
U18
V12
V13
V17
V18
G26
H28
H29
H27
F29
F27
E29
E28
G25
G27
H26
G29
F28
H24
1
54.9_1%_0603
PCI_RST# 15,17,21,22,23,26,29,31,37
C198
.1UF
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
of
89
SM_DQ[0..63]
AE20
G24
VSSA_DPLL0
VSSA_DPLL1
K28
N28
T28
W28
AB28
L25
P25
U25
Y25
Almador-M
GMCH
SDRAM
System
Memory
A20
B20
B19
C19
A18
A19
C17
C18
B17
A17
A16
C15
C14
NC
NC
NC
NC
VSS
VSS
VCC_SM
VCC_SM
F20
E20
F12
E11
C21
F19
E12
A12
SM_BA0
SM_BA1
B16
C16
SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7
F18
D18
D13
D12
E18
F17
F14
F13
SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
VCCQ_SM
VSS
E17
F16
D16
D15
E15
E14
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
SM_CLK0
SM_CLK1
SM_CLK2
SM_CLK3
VSS
VSS
A15
B2
B14
A3
A14
C3
SM_D_CLK0
SM_D_CLK1
SM_D_CLK2
SM_D_CLK3
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
VSS
VCC_SM
A13
C9
C13
A9
B13
A8
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
+3V
C248 1
2 .1UF
SM_BA0 14
SM_BA1 14
SM_DQM[0..7] 14
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
14
14
14
14
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
14
14
14
14
+3V
C253 1
2 .1UF
+3V
Layout note :
1.Placement TP6 for Almador-M A2 stepping die.
2.The 0.1uF capacitor and connection to +3V
must be implanted for Almador-M A3 stepping
die.
SM_DQ[0..63] 14
GMCH_RAS#
GMCH_CAS#
GMCH_WE#
+VTT
SM_D_MA[0..12] 13
SM_D_MA0
SM_D_MA1
SM_D_MA2
SM_D_MA3
SM_D_MA4
SM_D_MA5
SM_D_MA6
SM_D_MA7
SM_D_MA8
SM_D_MA9
SM_D_MA10
SM_D_MA11
SM_D_MA12
SM_MA0
SM_MA1
SM_MA2
SM_MA3
SM_MA4
SM_MA5
SM_MA6
SM_MA7
SM_MA8
SM_MA9
SM_MA10
SM_MA11
SM_MA12
A21
SM_WE#
D19
SM_CAS#
C20
SM_RAS#
Power
C24
SM_RCLK
A24
SM_OCLK
VSS
SDRAM
System
Memory
F24
SM_VREF1
E5
SM_VREF0
82830
SM_D_MA[0..12]
VSS
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59
SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63
H7
H23
K7
K23
L7
N6
T6
W7
Y7
AB7
M24
P24
T24
V24
Y23
M14
M15
M16
P12
R12
T12
P18
R18
T18
D29
C29
D27
C27
A27
B26
E24
C25
E23
B25
C23
F22
B23
C22
E21
B22
C12
D10
C11
A10
C10
C8
A7
E9
C7
E8
A5
F8
C5
D6
B4
C4
E27
C28
B28
E26
C26
D25
A26
D24
F23
A25
G22
D22
A23
F21
D21
A22
F11
A11
B11
F10
B10
B8
D9
B7
F9
A6
C6
D7
B5
E6
A4
D4
VSSP_SM0
VSSP_SM1
VSSP_SM2
VSSP_SM3
VSSP_SM4
VSSP_SM5
VSSP_SM6
VSSP_SM7
VSSP_SM8
VSSP_SM9
VSSP_SM10
VSSP_SM11
VSSP_SM12
VSSP_SM13
VSSP_SM14
VSSP_SM15
VSSP_SM16
VSSP_SM17
VSSP_SM18
VSSP_SM19
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59
SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63
B3
B6
B9
B12
B15
B18
B21
B24
B27
E7
E10
E13
E16
E19
E22
E25
G9
G21
E4
D28
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
U30B
VSSP_AGP0
VSSP_AGP1
VSSP_AGP2
VSSP_AGP3
VSSP_AGP4
VSSP_AGP5
VSSP_AGP6
VSSP_AGP7
VSSP_AGP8
AD8
AD9
AD10
AJ21
AE8
AE9
AE10
AE11
AE12
AE13
AE17
AE19
AH21
AF8
AF9
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AG7
AG15
AG16
AG21
AH6
AH8
AH9
AH11
AH12
AH14
AH17
AH18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
R150 1
R149 1
R151 1
2
2
2
10
10
10
SM_RAS# 14
SM_CAS# 14
SM_WE# 14
SM_OCLK
C181/C188 close to
Ball E5 and F24
10
10
10
10
14
14
14
14
C260
@33PF
C587
@33PF
Title
C255
@33PF
2
C259
@33PF
SMD_CLK0
SMD_CLK1
SMD_CLK2
SMD_CLK3
2
2
2
2
1
1
1
1
R378
R156
R148
R157
SM_D_CLK0
SM_D_CLK1
SM_D_CLK2
SM_D_CLK3
C254
@22PF_NPO
2
.1UF
2
.1UF
Layout note :
C217
+V_SMREF
C230
Size
Document Number
Custom
Rev
2A
401200
Date:
A
, 10, 2002
Sheet
E
10
of
89
L14
82830
+1.5V_SW
4
3
2
1
17,23,24 RTCCLK
2
3
+VCCA_DPLL0
+VCCA_DPLL1
R289 1
R290 1
2 @2.2K DVOA_D6
2 2.2K DVOA_D5
R292 1
R293 1
2 @2.2K DVOA_D1
DVOA_D0 1
2 10K
AC21
AF21
AF24
R59
H_BSEL0 5,8
DAC_RED 16,36
DAC_GREEN 16,36
DAC_BLUE 16,36
IO_DDC1CLK 16
IO_DDC1DATA 16
2 255_1%
DAC_VSYNC
DVOA_CLKINT
IO_DDC2DATA
IO_DDC2CLK
DVO_INTR#
DVO_FIELD
AD26
AE26
AE21
AE22
LM_DQA0
LM_DQA1
LM_DQA2
LM_DQA3
LM_DQA4
LM_DQA5
LM_DQA6
LM_DQA7
AG17
AJ17
AG18
AJ18
AG19
AJ19
AG20
AJ20
LM_DQB0
LM_DQB1
LM_DQB2
LM_DQB3
LM_DQB4
LM_DQB5
LM_DQB6
LM_DQB7
AJ11
AH10
AJ10
AG10
AJ9
AG9
AJ8
AG8
RP13
DVOD0 1
DVOD1 2
DVOD2 3
DVOD3 4
DVOD4 5
DVOD5 6
DVOD6 7
DVOD7 8
DVOD8 4
DVOD9 3
DVOD10 2
DVOD11 1
C765
10PF
DVOA_CLK# 15
DVOA_CLK 15
16P8R_22
16 DVOA_D0
15 DVOA_D1
14 DVOA_D2
13 DVOA_D3
12 DVOA_D4
11 DVOA_D5
10 DVOA_D6
DVOA_D7
9
DVOA_D8
5
DVOA_D9
6
DVOA_D10
7
DVOA_D11
8
DVOA_D[0..11]
C764
10PF
2
AJ22
AH22
AG22
AJ23
AH23
AG23
AE23
AE24
AJ25
AH25
AG25
AJ26
1
1
DAC_HSYNC
1
DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8
DVO_D9
DVO_D10
DVO_D11
DVOA_BLANK# 15
DVOA_VSYNC 15
DVOA_HSYNC 15
DVOA_I2CCLK 15
DVOA_I2CDATA 15
2 22
2 22
VCCP_DVO
VCCP_DVO
VCCP_DVO
VCCA_DPLL0
VCCA_DPLL1
AC20
F25
DVOA_D6
15
2
8P4R_22
TV_I2CDATA
TV_I2CCLK
TV_DDCDATA 15
TV_DDCCLK 15
DVO_INTR#
2
DVOA_STALL 15
C756
R46
@33
VCCA_DAC
F5
J5
M5
R5
V5
AA5
AD5
AG5
E2
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
AF26
AG27
VCCA_DAC
VCCA_DAC
VCCPCMOS_LM
VCCPCMOS_LM
VCCPCMOS_LM
VCCPCMOS_LM
AF6
AE7
AC9
AC8
VCCA_PLL
G10
G20
VCCQ_SM
VCCQ_SM
AE6
G7
N24
W23
VCCQ_AGP
VCCQ_AGP
J24
F26
VCCP_HUB
VCCP_HUB
AE25
AD23
VCCP_IO
VCCP_IO
Mobile
C757
27PF
+3V_SW
27PF
DVOA_I2CDATA1
C77
@10PF
R91
DVOA_I2CCLK 1
R89
10K
2
2
10K
DVOA_CLKINT 1
100K
2
1
R57
2
100K
R452
+3V_SW
TV_I2CDATA 1
8.2K
AGP_BUSY#
R56
DVO_INTR#
1
Local Memory
Interface
+3V_SW
AC24
AGP_BUSY# 17
TV_I2CCLK
R554
4.7K
2
1
2
R555 4.7K
+1.8V_SW
C108
68PF
2
+3V_SW
R295 1
R55 1
NC
VCC
A
Y
GND
2 10K
2 10K
5
4
2
1
R568
732_1%_0603
DPMS_CLK
+VS_RIMMREF
VS_RIMMREF
R569
604_1%_0603
1
R294
NC7S14
2
100_1%_0603
C454
.1UF
C452
.1UF
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
IOQD=8
Desktop
DAC_VSYNC 16,36
DAC_HSYNC 16,36
R72 1
R63 1
R61 1
DVOA_I2CCLK
DVOA_I2CDATA
DVCLK#
R50
DVCLK
R52
+3V
U60
AE29 DAC_VSYNC
AD28 DAC_HSYNC
AF28 DAC_RED#
AG28 DAC_GREEN#
AH27 DAC_BLUE#
AF29
AG29
AH28
AE27
AD27
R53 1
AJ27
AD20
AD21
AF23
AF22
AD25
AC25
AG24
AJ24
8P4R_100K
IOQD=2
DVOA_D5
+1.5V_SW
5
6
7
8
RP36
DVOA_D1
100UF_D2_6.3V
100UF_D2_6.3V
DVO_CLKIN
DVO_BLANK#
DVO_VSYNC
DVO_HSYNC
IO_I2CCLK
IO_I2CDATA
DVO_CLK#
DVO_CLK
Local Memory
Interface
M_DDC2_CLK
M_DDC2_DATA
M_DDC1_CLK
M_DDC1_DATA
133MHz
15 DVOC_D[0..11]
C210
+1.5V_SW
Reserved
.1UF
RP14
15
DAC_VSYNC
DAC_HSYNC
DAC_RED#
DAC_GREEN#
DAC_BLUE#
DAC_RED
DAC_GREEN
DAC_BLUE
IO_DDC1CLK
IO_DDC1DATA
DAC_REFSET
Almador-M
GMCH
C93
High
DVOA_D0
J29
J28
K26
K25
L26
J27
K29
K27
M29
M28
L24
M27
N29
DVOC_FLD
M25
2
1
N26
R90
100K M_DDC2_CLK
N27
R25
15 DVOC_VSYNC
R24
15 DVOC_HSYNC
T29
DVOC_D0
T27
DVOC_D1
T26
DVOC_D2
U27
DVOC_D3
V27
DVOC_D4
V28
DVOC_D7
U26
DVOC_D6
V29
DVOC_D9 W29
DVOC_D8
V25
DVOC_D11 W26
DVOC_D10 W25
DPMS_CLK W27
R105
100K
1
2
Y29
C92
Low
680
(DVOA port)
AGP
Interface
C227
+
.1UF
Strap Name
2
R104
AC10VCC_LM
AC11VCC_LM
AD11VCC_LM
AD12VCC_LM
AD13VCC_LM
AE18 VCC_LM
AD17VCC_LM
AD18VCC_LM
AD19VCC_LM
2
100K
+1.5V_SW
Display
Interface
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
1
R363
+VTT
D5
D8
D11
D14
D17
D20
D23
D26
F7
F15
G11
G19
G23
2
100K
AJ16
LM_CFM
AH16
LM_CFM#
1
R369
AH15LM_CTM
AJ15
LM_CTM#
AD14LM_RAMREF0
AE14 LM_RAMREF1
+1.5V_SW
AGP_ADSTB0/DVOB_CLK
AGP_ADSTB#0/DVOB_CLK#
AGP_ADSTB1/DVOC_CLK
AGP_ADSTB#1/DVOC_CLK#
AGP_SBSTB/ZV_D4
AGP_SBSTB#/ZV_D3
AGP_FRAME#/M_DDC1_DATA
AGP_IRDY#/M_I2C_CLK
AGP_TRDY#/M_DDC1_CLK
AGP_STOP#/M_DDC2_DATA
AGP_DEVSEL#/M_I2C_DATA
AGP_REQ#/ZV_CLK
AGP_GNT#/ZV_D15
AGP_PAR
AJ6 LM_RCLK
AG6 LM_GCLK
R307 1
R310 1
DVOC_CLK
DVOC_CLK#
AG11LM_RQ0
AJ12 LM_RQ1
AG12LM_RQ2
AH13LM_RQ3
AG13LM_RQ4
AJ13 LM_RQ5
AG14LM_RQ6
AJ14 LM_RQ7
L29
L28
DVCCLK
2 22
U29
DVCCLK#
2 22
U28
AA27
AA28
M_DDC1_DATA
R29
M_I2CCLK
P26
M_DDC1_CLK
P27
M_DDC2_DATA
N25
M_I2CDATA
R28
AC27
AD29
AGP_PAR
1
P28
330
+1.8V_SW
.1UF
AGP_CBE#0/DVOB_D7
AGP_CBE#1/DVOB_BLANK#
AGP_CBE#2/ZV_VSYNC
AGP_CBE#3/DVOC_D5
AH7
LM_CMD
AF7 LM_SCK
AJ7 LM_SIO
DVOC_D5
1
.1UF
.01UF
.1UH_0805
1
1
.1UH_0805
2
2
L17
C95
Power
Interface
AC28AGP_ST0/ZV_D14
AC29AGP_ST1/ZV_D13
AB27 AGP_ST2/ZV_D12
L27
P29
R27
T25
AGP_SBA0/ZV_D8
AGP_SBA1/ZV_D7
AGP_SBA2/ZV_D6
AGP_SBA3/ZV_D5
AGP_SBA4/ZV_D2
AGP_SBA5/ZV_D1
AGP_SBA6/ZV_D0
AGP_SBA7/ZV_HREF
AB26
AGP_PIPE#/ZV_D10
AB29 AGP_WBF#/ZV_D9
AB25 AGP_RBF#/ZV_D11
AA29
AA24
AA25
Y24
Y27
Y26
W24
Y28
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
U30C
15
15
V14
V15
V16
AE16
AE15
AD15
AD16
C127
68PF
2
C205
C96
+3V
VCCA_HPLL
VCCA_CPLL
+3V
J26
M26
R26
V26
AA26
L23
AA23
U24
+VTT
.1UF
1
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
Layout note :
C103
2
R, L, C
place near
GMCH.
1
L16
+1.8V_SW
+VTT
+1.5V_SW
+1.8V_SW
2
0_0805
1
R66
L0603
2
+VTT
Size
Document Number
Custom
Rev
2A
401200
Date:
C
, 10, 2002
Sheet
E
11
of
89
Layout note :
Layout note :
+1.8V_SW
1
C121
.01UF
C122
.01UF
2
C120
.1UF
1
C224
.1UF
C136
.1UF
C114
.1UF
C106
.1UF
C132
.1UF
C142
.1UF
C84
.1UF
C547
.1UF
C537
.1UF
C87
.1UF
C74
22UF_1206_10V
+
C100
.1UF
+VTT
+VTT
C148
.1UF
C151
.1UF
C112
.1UF
C85
.1UF
C88
.1UF
C113
.1UF
1
C111
.1UF
2
C89
.1UF
2
C86
.1UF
2
C109
.1UF
Layout note :
+1.8V_SW
1
2
C118
.1UF
C197
.1UF
2
1
C137
82PF
2
C131
.1UF
2
2
C135
.1UF
+
C133
C82
82PF 22UF_1206_10V
C212
150UF_D2_6.3V
1
C414
+
150UF_D2_6.3V
C65
+
150UF_D2_6.3V
+VTT
+VTT
Layout note :
Distribute as close as possible
to GMCH AGP/DVO Quadrant .
C183
.1UF
2
C174
.1UF
2
C161
.1UF
2
C154
.1UF
2
C147
.1UF
2
C143
.1UF
1
C117
.1UF
2
C116
.1UF
2
C115
.1UF
2
C128
.1UF
1
C211
150UF_D2_6.3V
+VTT
+1.5V_SW
C139
.1UF
C186
.1UF
2
C180
82PF
2
C125
.1UF
2
C181
.1UF
2
C185
82PF
2
C126
.1UF
2
C175
.1UF
2
C193
82PF
2
C141
.1UF
2
C123
.1UF
2
C168
82PF
2
C157
.1UF
2
C97
.1UF
2
22UF_1206_10V
C140
.1UF
2
C155
.1UF
2
C162
.1UF
2
C172
.1UF
2
C94
.1UF
1
C204
.1UF
2
C199
.1UF
2
C194
.1UF
2
C192
.1UF
C165
C64
150UF_D2_6.3V
Layout note :
+VTT
1
C146
.1UF
+3V
3
+
C242
.1UF
2
C237
.1UF
2
C244
.1UF
2
C238
.1UF
2
C215
82PF
2
C239
.1UF
2
C220
.1UF
2
C208
82PF
2
C209
.1UF
2
C240
.1UF
2
C213
82PF
2
C236
.1UF
2
C214
.1UF
2
C201
82PF
2
C203
.1UF
C226
.1UF
2
C145
.1UF
2
C202
.1UF
1
C130
.1UF
2
C191
.1UF
2
C187
.1UF
2
C206
.1UF
1
C195
.1UF
2
C184
.1UF
2
C173
.1UF
2
C156
.1UF
C221
22UF_1206_10V
+VTT
C134
.1UF
2
C110
.1UF
2
C188
.1UF
1
C189
.1UF
2
C190
.1UF
2
C171
.1UF
2
C159
.1UF
1
C153
.1UF
2
C138
.1UF
2
C50
150UF_D2_6.3V
Layout note :
Distribute as close as possible
to IO Quadrant .
1
+3V
1
C241
.1UF
C225
.1UF
C235
22UF_1206_10V
2
C415
150UF_D2_6.3V
1
C67
+
150UF_D2_6.3V
2
1
C49
+
150UF_D2_6.3V
2
C66
+
150UF_D2_6.3V
+VTT
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
12
of
89
Layout note :
1
10 SM_D_MA[0..12]
1
2
C479
.1UF
C464
.1UF
2
1
C492
.1UF
2
C540
.1UF
2
C528
.1UF
2
C556
.1UF
1
C584
.1UF
2
C598
.1UF
2
C613
.1UF
2
C494
.1UF
1
C602
.1UF
2
C592
.1UF
2
C579
.1UF
2
C566
.1UF
1
C491
.1UF
2
C475
.1UF
2
C465
.1UF
2
C462
.1UF
+3V
SM_MA[0..12] 14
+3V
1
2
3
4
8
7
6
5
SM_MA3
SM_MA2
SM_MA1
SM_MA0
SM_D_MA5
SM_D_MA4
SM_D_MA7
SM_D_MA6
1
2
3
4
8P4R_10
RP5
8
7
6
5
SM_MA5
SM_MA4
SM_MA7
SM_MA6
SM_D_MA9
SM_D_MA8
SM_D_MA10
SM_D_MA11
1
2
3
4
8P4R_10
RP4
8
7
6
5
SM_MA9
SM_MA8
SM_MA10
SM_MA11
C417
22UF_1206_10V
SM_D_MA3
SM_D_MA2
SM_D_MA1
SM_D_MA0
RP3
Layout note :
One .1uF cap per power pin .
Place each cap close to SODIMM(DIMM 1) pin .
+3V
8P4R_10
C470
.1UF
2
C467
.1UF
2
C575
.1UF
1
C611
.1UF
2
C619
.1UF
2
C601
.1UF
2
C591
.1UF
1
C553
.1UF
2
C543
.1UF
2
C495
.1UF
2
C481
.1UF
1
C606
.1UF
2
C593
.1UF
2
C586
.1UF
2
C574
.1UF
1
C521
.1UF
2
C489
.1UF
2
C461
.1UF
SM_MA12
2
10
SM_D_MA12 1
R147
+3V
C416
22UF_1206_10V
3
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
13
of
89
SM_DQ[0..63] 10
+3V
+3V
+3V
+3V
JP28
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CKE0#DQMB0
CKE1#/DQMB1
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RFU/DQ64
RFU/DQ65
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
DQMB4/CE4#
DQMB5/CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
DQ68/RFU
DQ69/RFU
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
RFU/CLK0
VCC
RFU/RAS#
WE#
RE0#/S0#
RE1#/S1#
RFU/EDO_OE#
VSS
RFU/DQ66
RFU/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/DQMB2
CE3#/DQMB3
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC
CKE0/RFU
VCC
CAS#/RFU
CKE1/RFU
A12/RFU
A13/RFU
CLK1/RFU
VSS
DQ70/RFU
DQ71/RFU
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
BA0
VSS
BA1
A11
VCC
DQMB6/CE6#
DQMB7/CE7#
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
10
10
SM_DQM0
SM_DQM1
13
13
13
SM_MA0
SM_MA1
SM_MA2
SM_DQM0
SM_DQM1
SM_MA0
SM_MA1
SM_MA2
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
10
SMD_CLK0
10
10
10
10
SM_RAS#
SM_WE#
SM_CS#0
SM_CS#1
SMD_CLK0
SM_RAS#
SM_WE#
SM_CS#0
SM_CS#1
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
13
13
SM_MA6
SM_MA8
SM_MA6
SM_MA8
13
13
SM_MA9
SM_MA10
10
10
SM_DQM2
SM_DQM3
SM_MA9
SM_MA10
SM_DQM2
SM_DQM3
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31
SODIMM0_SMDAT
JP29
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
SM_DQM4
SM_DQM5
SM_MA3
SM_MA4
SM_MA5
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
SM_CKE0 10
SM_CAS#
SM_CKE1
SM_MA12
1
2
R352
0
10
SM_CAS# 10
SM_CKE1 10
SM_MA12 13
SMD_CLK1
SMD_CLK2
SMD_CLK2
10
10
SM_RAS#
SM_WE#
SM_CS#2
SM_CS#3
SM_CS#2
SM_CS#3
SMD_CLK1 10
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
SM_MA7
SM_BA0
SM_MA7
SM_BA0
SM_BA1
SM_MA11
SM_MA6
SM_MA8
13
10
SM_MA9
SM_MA10
SM_BA1 10
SM_MA11 13
SM_DQM6
SM_DQM7
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
DQMB4/CE4#
DQMB5/CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
DQ68/RFU
DQ69/RFU
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
RFU/CLK0
VCC
RFU/RAS#
WE#
RE0#/S0#
RE1#/S1#
RFU/EDO_OE#
VSS
RFU/DQ66
RFU/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/DQMB2
CE3#/DQMB3
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC
CKE0/RFU
VCC
CAS#/RFU
CKE1/RFU
A12/RFU
A13/RFU
CLK1/RFU
VSS
DQ70/RFU
DQ71/RFU
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
BA0
VSS
BA1
A11
VCC
DQMB6/CE6#
DQMB7/CE7#
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
SM_MA0
SM_MA1
SM_MA2
13
13
13
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
SM_CKE0
VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CKE0#DQMB0
CKE1#/DQMB1
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RFU/DQ64
RFU/DQ65
SM_DQM0
SM_DQM1
SM_DQM4 10
SM_DQM5 10
SM_MA3
SM_MA4
SM_MA5
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
SM_DQM2
SM_DQM3
SM_DQM6 10
SM_DQM7 10
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63
SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31
SODIMM0_SMCLK
SODIMM1_SMDAT
SO-DIMM144-Reverse
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
SM_DQM4
SM_DQM5
SM_MA3
SM_MA4
SM_MA5
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
SM_CKE2
SM_CKE2 10
SM_CAS#
SM_CKE3
SM_MA12
1
2
R344
0
SM_CKE3 10
SMD_CLK3
SMD_CLK3 10
2
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
SM_MA7
SM_BA0
SM_BA1
SM_MA11
SM_DQM6
SM_DQM7
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59
SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63
SODIMM1_SMCLK
SO-DIMM144-Normal
DIMM0
DIMM1
+3V
+3V
13
2N7002
SODIMM0_SMDAT
SODIMM1_SMDAT
12
14
15
11
1
R335
R349
10
10
10
10
C533
C559
10PF
C511
12
R357
10PF
Y0
Y1
Y2
Y3
SMD_CLK3
R341
12
12
SODIMM0_SMCLK
SODIMM1_SMCLK
1
5
2
4
SMD_CLK2
10PF
C546
10PF
1
2
3
4
16
RB751V
74HC4052
7
8
Q22
U17
X0
X1
X2
X3
SMD_CLK1
INH
A
B
8,17,19 SMB_DATA
SM_SEL0
8,17,19 SMB_CLK
17
6
10
9
VCC
2N7002
8P4R_10K
GND
GND
2
G
D45
Q24
SMD_CLK0
R551
100K
RP7
C318
.1UF
12
+3V
R176
100K
8
7
6
5
+12V_SW
R194
100K
Output
X0, Y0
X1, Y1
X2, Y2
X3, Y3
Title
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
B
Rev
2A
Sheet
E
14
of
89
+1.8V_SW
+LCDVDD
VCH
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
9,17,21,22,23,26,29,31,37 PCI_RST#
D14
8 CLK_VCH
M12
DVOrCOMP
TESTIN
OSC
VSS1
VSS2
VSS3
VSS4
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS5
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS6
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS40
VSS38
VSS39
VSS41
VSS42
VSS43
VSS44
A1
A14
B1
C4
D11
E5
E6
E7
E9
E10
F5
F6
F7
F8
F9
F10
G5
G6
G7
G8
G9
G10
H5
H6
H7
H8
H9
H10
J5
J6
J7
J8
J9
J10
K5
K6
K7
K8
K9
K10
L4
N14
P1
P14
DVOA_CLK
DVOA_CLK#
R51
@33
FLM
LP
DE
SHFCLK
PCIRST#
R49
@33
YA4P
YA4M
YA5P
YA5M
YA6P
YA6M
YA7P
YA7M
CLKBP
CLKBM
36.5_1%
2
N9
1 2.2K B14
ENABKL
ENAVDD
ENEXBUF
150
150
4.7UF_16V_1206
2N7002
1
1
2
150K
4.7UF_16V_1206
E3
E2
E1
F3
F2
F1
G3
G2
G1
H3
H2
H1
J3
J2
J1
K3
K2
K1
L3
L2
L1
M3
M2
M1
N1
N2
P2
N3
P3
M4
N4
P4
M5
N5
P5
M6
ENVDD
22K
@1000PF
Q12
DTC124EK
22K
+3V_SW
D20
29
BKOFF#
29
ENBLT
R305
4.7K
D19
LVDS CONNECTOR
RB751V
DISPOFF# 33
LCDVDD
RB751V
ENBLT 1
2
C53
C395
+
C54
1000PF
L53
C1
B2
D2
D3
+LCDVDD
ENBLT
ENVDD
ENEXBUF
C2
C3
D1
10UF_10V_1206
.1UF
@0_0805
2
JP10
L13
LCDVDD
1
2
FBM-l11-201209-221LMAT
TXOUT0TXOUT0+
1
TP1
TP
TXOUT1TXOUT1+
A8
B8
A9
B9
A10
B10
A11
B11
A12
B12
R326
1
R299 2
YA0P
YA0M
YA1P
YA1M
YA2P
YA2M
YA3P
YA3M
CLKAP
CLKAM
+1.8V_SW
I2C_DATA
I2C_CLK
A3
B3
A4
B4
A5
B5
A7
B7
A6
B6
11 DVOA_I2CDATA
11 DVOA_I2CCLK
L11
VSSA
C11
VSSBA
C8
VSSDA
D13
D12
2R279
1
R283
C409 C405
+
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35
VCH_VREFHI
VCH_VREFLO
D8
D7
C419
1000PF
2
TV_CLKIN
TV_CLKOUT#
TV_CLKOUT
TV_VSYNC
TV_HSYNC
TV_BLANK#
F14
J13
J12
G14
G13
G12
H14
H13
H12
J14
K14
K13
K12
L14
L13
L12
M14
M13
TV_DATA0
TV_DATA1
TV_DATA2
TV_DATA3
TV_DATA4
TV_DATA5
TV_DATA6
TV_DATA7
TV_DATA8
TV_DATA9
TV_DATA10
TV_DATA11
L10
C10
C7
A2
A13
C9
D4
D6
D9
E4
F11
G4
H4
J4
K4
L6
C6
C5
D5
D10
E8
E11
F4
G11
H11
J11
K11
L5
L7
L8
L9
N13
VCCA
VCCBA
VCCDA
VREF_HI
VREF_LO
1 R33
Q10
2N7002
PID3
PID2
PID1
PID0
F13
E14
F12
E13
E12
C13
B13
C14
C12
2
3
C418
.1UF
C420
22UF_1206_10V
+3V_SW
2 @10K
2 @10K
+
C421
R3031
R3011
Q11
1
+1.8V_SW
CLKIN
CLKIN#
BLANK#
CLKOUT
LCD_HDE#
LCD_VDE#
LCD_VREF
75_1%
R31
100K
M8
11 DVOA_CLK
N8
11 DVOA_CLK#
N11
11 DVOA_BLANK#
R322
15_1%P12
2
1
DVOA_HSYNC
P11
11 DVOA_HSYNC
DVOA_VSYNC
N12
11 DVOA_VSYNC
LCD_VREF P13
R327
DVODATA0
DVODATA1
DVODATA2
DVODATA3
DVODATA4
DVODATA5
DVODATA6
DVODATA7
DVODATA8
DVODATA9
DVODATA10
DVODATA11
Q35
100
10K
1
1
1
11 DVOA_STALL
M11
P10
N10
M10
P9
M9
P8
P7
N7
M7
P6
N6
VCC1_8V16
VCC1_8V1
VCC1_8V2
VCC1_8V3
VCC1_8V5
VCC1_8V7
VCC1_8V6
VCC1_8V8
VCC1_8V9
VCC1_8V10
VCC1_8V11
VCC1_8V12
VCC1_8V13
VCC1_8V14
VCC1_8V15
DVOA_D0
DVOA_D1
DVOA_D2
DVOA_D3
DVOA_D4
DVOA_D5
DVOA_D6
DVOA_D7
DVOA_D8
DVOA_D9
DVOA_D10
DVOA_D11
VCC_3V1
VCC_3V2
VCC_3V3
VCC3_3V4
VCC3_3V5
VCC3_3V6
VCC3_3V7
VCC3_3V8
VCC3_3V9
VCC3_3V10
VCC3_3V11
VCC3_3V12
VCC3_3V13
VCC3_3V14
11 DVOA_D[0..11]
SI2302DS
3
1
R32
100K
R26
R302
2
C448
.1UF
U28
+12V_ALW
1
1.8VS_VCH
+LCDVDD
+3V
C451
1000PF
2
C450
.1UF
+1.8V_SW
1
C442
22UF_1206_10V
L0805
+3V_SW
+12V_ALW
L44
C447
.1UF
10UF_10V_1206
C441
+3V_SW
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
11
12
13
14
15
16
17
18
19
20
TXOUT2TXOUT2+
TXCLK0TXCLK0+
JST BM20B-SRDS
TXCLK1+
TXCLK1-
C80
@10PF
TXOUT4+
TXOUT4TXOUT5+
TXOUT5TXOUT6+
TXOUT6-
C78
@10PF
TXCLK0+
TXCLK0-
TXOUT0+
TXOUT0TXOUT1+
TXOUT1TXOUT2+
TXOUT2-
82807
+3V_SW
JP11
LCDVDD
1
2
3
4
+1.5V_SW
8P4R_4.7K
1 0
37
42
43
PCI_RST#
29
+3V_SW
11
11
C474
.1UF
26
27
TV_DDCDATA
TV_DDCCLK
C445
.1UF
2
@75_1%
C478
.1UF
SL_STALL
11 DVOC_HSYNC
11 DVOC_VSYNC
2 100K
22
R5361
2 75_1%
21
R5371
2 75_1%
TXCLK1TXCLK1+
DGND[0]
DGND[1]
DGND[2]
POUT
H
V
RESET*
DVDD2
DGND[3]
SD
SC
AVDD
AGND
GPIO[1]
GPIO[0]
5
16
30
C510
.1UF
10UF_10V_1206
C545
10UF_10V_1206
+5V_SW
2 10K
VREF_TVO
39
DVOC_CLK
DVOC_CLK#
VREF
C573
1UF_0603
C567
.01UF
C571
.1UF
C577
10UF_10V_1206
32
Y2
R543
@33
R542
@33
C536
33
CH7007
+5V_SW
R340 1
+1.5V_SW
C497
1000PF
2
C463
.1UF
XO
1
1
R343
C760
@10PF
1
C560
C759
@10PF
22PF
C578
2
10K
2
.1UF
14.318MHZ
2
1
2
C485
22UF_1206_10V
25
19
23
ISET
24
1 360_1%
R362 2
1
+
2
VDD
GND[0]
GND[1]
R337
100K
LCDVDD
C562
C542
.1UF
31
34
2
RB751V
TXOUT6TXOUT6+
+1.5V_SW
38
36
1
D46
TXOUT4TXOUT4+
C541
C570
1000PF .1UF
8
18
28
DVDD[0]
DVDD[1]
DVDD[2]
XI/FIN
17 PAL/NTSC#
+3V_SW
TXCLK0TXCLK0+
@IPEX20265-030E
R336 1
15
14
16,36
R7
75_1%
R351 2
DVOC_FLD
COMPS
2 75_1%
TXOUT2TXOUT2+
+3V_SW
XCLK*
XCLK
11
R5351
20
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
C473
.1UF
2
C476
.1UF
R353
C446
.1UF
41
40
DVOC_CLK#
DVOC_CLK
1
C498
.1UF
2
1
C499
.1UF
10UF_10V_1206
C486
11
11
17
TXOUT5TXOUT5+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
+1.8V_SW
CVBS
SW DIP-4
CSYNC
2 @75_1%
C500
.01UF
2.2UF_16V_0805
2K_1%
DS/BCO
R5341
C493
5
6
7
8
35
R323
LCD_VREF
2
1
C330
@10PF
4
3
2
1
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
PID3
PID2
PID1
PID0
13
12
11
10
9
7
6
4
3
2
1
44
TXOUT1TXOUT1+
SW1
2K_1%
TXOUT0TXOUT0+
U31
DVOC_D11
DVOC_D10
DVOC_D9
DVOC_D8
DVOC_D7
DVOC_D6
DVOC_D5
DVOC_D4
DVOC_D3
DVOC_D2
DVOC_D1
DVOC_D0
8
7
6
5
R329
RP15
R226
@33
11 DVOC_D[0..11]
CLK_VCH
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Title
12PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
5
Rev
2A
401200
, 10, 2002
Sheet
1
15
of
89
CRTVCC
CRT Connector
D47
2
+5V_SW
1
F1
POLYSWITCH_0.5A
RB491D
+1.8V_SW
C5
.1UF
Q60
2N7002 Q61
1
C361
18PF_0603
S
G
2
JP2
CRTGATE
CRT-15P
33
18
19
L33
1
2
FBM-L10-160808-301
DAC_V
1
1
Q33
2N7002
R142
1
2
FBM-L10-160808-301
1
Q3
2N7002
DAC_H
33
R135
DAC_VSYNC
11,36 DAC_VSYNC
5VDDCCL
L2
DAC_HSYNC
11,36 DAC_HSYNC
C357
18PF_0603
2
C8
18PF_0603
C18
DAC_B
18PF
2
2
DAC_G
75_1%
C365
18PF
18PF 75_1%
C360
R250
75_1%
R4
R256
DAC_BLUE
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
DAC_R
DAC_GREEN
11,36 DAC_BLUE
L7
1
2
FCM2012C-800(0805)
L35
1
2
FCM2012C-800(0805)
L36
1
2
FCM2012C-800(0805)
DAC_RED
11,36 DAC_GREEN
C16
.1UF
30,36
M_SEN#
11,36 DAC_RED
5VDDCDA
2N7002
1
D15
DAN217
D16
DAN217
D1
DAN217
G
C2
220PF
C352
220PF
2
C353
100PF
2
C354
100PF
2
C359
10PF
2
C11
10PF
2
100K
1
R254
+12V_SW
CRTGATE
+5V_SW
GMBus switch
D5
+3V_SW
1
C20
33PF_0603
1
2
21 CDLED_CON#
21 HDDLED_CON#
11 IO_DDC1DATA
11 IO_DDC1CLK
JP6
RCA JACK
2.2K
24
1A1
1A2
1A3
1A4
1A5
1B1
1B2
1B3
1B4
1B5
2
5
6
9
10
14
17
18
21
22
2A1
2A2
2A3
2A4
2A5
2B1
2B2
2B3
2B4
2B5
15
16
19
20
23
1
13
OE1#
OE2#
GND
12
5VDDCDA
5VDDCCL
CDLED#
HDDLED#
5VDDCDA
5VDDCCL
33
33
36
36
2.2K
VCC
3
4
7
8
11
COMPS_CON
29
29
29
31
C22
270PF_0603
1
C21
100PF_0603
1
10K
R74
U10
L9
1.8UH_0603
1
2
COMPS
R99
.1UF
R73
2
DAN217
15,36
C163
RB751V
1
TV Out CONN.
D39
SCROLLED#
NUMLED#
CAPSLED#
DRV0#
SCRLED5V# 33
NUMLED5V# 33
CAPSLED5V# 33
DRV05V# 33
CBTD_3384
4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
16
of
89
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
D3
F4
A3
R4
E4
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
+RTCVCC
R475
1
10M_0603
R566 22M_0603
1
R491
RTC_X1
RTC_X2
2
10M_0603
CLK_ICH14
CLK_ICH48
CLK_ICH14
CLK_ICH48
+RTCVCC
2
R472 15K
C690
1UF_0603
X3
R567
32.768KHZ
C713
12PF
2
C696
12PF
HUB_VSWING
HUB_VREF
HUB_RCOMP
HUB_PSTRB#
HUB_PSTRB
HUB_PAR
HUB_CLK
SM_INTRUDER# 19
SMLINK0 19
SMLINK1 19
SMB_CLK 8,14,19
SMB_DATA 8,14,19
SMB_ALERT# 19
Y22
V23
AB22
J22
AA21
AB23
AA23
Y21
W23
U22
W21
Y23
U23
GATE20
29
H_A20M# 5
1
12
2
@15PF
2
R233 1
H_FERR# 5
H_IGNNE# 5
H_INIT#
5
H_INTR
5
H_NMI
5
H_PWRGD 5
KBRST# 29
5,42
2 0
H_DPSLP#
H_SMI#
5
H_STPCLK# 5
3
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
H_PICD0
H_PICD1
R211
1K
R220
1K
HUB_PD[0..10] 9
CLK_ICHHUB
+VS_HUBVSWING
CLK_ICHHUB 8
HUB_PSTRB 9
HUB_PSTRB# 9
R456
@33
1
R227
C334
.01UF
R186
@1K
Title
C686
@10PF
2
36.5_1%
C666
.01UF
Close to ICH3-M.
Size
Document Number
Custom 401200
Date:
C328
PCI_RST# 9,15,21,22,23,26,29,31,37
PCI_SERR# 19,22,23,37
PCI_STOP# 19,22,23,26,37
PCI_TRDY# 19,22,23,26,37
+1.5V_SW
L19
L20
K19
P23
N22
R19
T19
D10
EEP_SHCLK
E8
EEP_DOUT
D8
EEP_DIN
E9
EEP_CS
2 22
@10
PCI_IRDY# 19,22,23,26,37
PCI_PAR 19,22,23,26,37
PCI_PERR# 19,22,23,37
PCI_LOCK# 19,23
ICH3_PME#
EEP_CS 25
EEP_DIN 25
EEP_DOUT 25
EEP_SHCLK 25
R5291
R222
+VS_HUBREF
CLK_ICHHUB
LAN_RXD0 25
LAN_RXD1 25
LAN_RXD2 25
LAN_TXD0 25
LAN_TXD1 25
LAN_TXD2 25
LAN_JCLK 25
LAN_RSTSYNC 25
CLK_ICHPCI
CLK_ICHPCI 8
PCI_DEVSEL# 19,22,23,26,37
PCI_FRAME# 19,22,23,26,37
PCI_REQA# 19
PCI_REQB# 19
J19
J20
J21
B1
C1
B2
A2
A6
B5
C5
A5
AB14
W19
H22
INT_APICCLK
INT_APICD0
INT_APICD1
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQE#/GPIO2
INT_PIRQF#/GPIO3
INT_PIRQG#/GPIO4
INT_PIRQH#/GPIO5
INT_IRQ14
INT_IRQ15
INT_SERIRQ
LAN_RSTSYNC
LAN_JCLK
LAN_TXD2
LAN_TXD1
LAN_TXD0
LAN_RXD2
LAN_RXD1
LAN_RXD0
CLK_ICHPCI
Y6
AC3
AB2
AC4
AB5
AC5
L22
M21
M23
N20
P21
R22
R20
T23
M19
P19
N19
100K
Place closely to
ICH3-M
HUB_PD[0..10]
HUB_ICH_RCOMP
R482
1K
2.4M_1%_0603
HubLink
Interface
J1
JOPEN
RTC_VBIAS
8
8
2
1K
1
R495
.047UF
C702
EEPROM
Interface
LAN_CLK_ICH
82801
LAN
Interface
D7
C9
A10
C10
B9
A9
A8
C8
A1
A13
A16
A17
A20
A23
B8
B10
B13
B14
B15
B18
B19
B20
B22
C3
C6
F19
C14
C15
C16
C17
C18
C19
C20
C21
C22
D9
D13
D16
D17
D20
D21
D22
E5
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
Clocks
VSS
CLK_14
CLK_48
CLK_RTEST#
CLK_RTCX1
CLK_RTCX2
CLK_VBIAS
19,22
19,37
19,23
19,26
19,37
@15PF
V2
W2
Y4
Y2
W3
W4
Y3
V1
U3
T3
U2
T2
U4
U1
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#
C290
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
R525
A4
E3
D2
D5
B4
T5
M3
F1
C4
D4
B6
B3
N3
G5
M2
M1
W1
Y1
L5
H2
H1
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
CPU_A20GATE
CPU_A20M#
CPU_DPSLP#
CPU_FERR#
CPU_IGNNE#
CPU_INIT#
CPU
CPU_INTR
Interface
CPU_NMI
CPU_PWRGOOD
CPU_RCIN#
CPU_SLP#
CPU_SMI#
STPCLK#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
J23
F20
RTC_RST# Y7
RTC_X1
AC7
RTC_X2
AC6
RTC_VBIASAB7
12
@10
19,22,23
19,23
19,37
19,26,37
22
37
23
26
37
R188
+3V_ALW
ICH3_PME#
SMB_ALERT#/GPIO11
AC_BITCLK
AC_RST#
AC_SDATAIN0
AC_SDATAIN1
AC_SDATAOUT
AC_SYNC
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
2 100K
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
CLK_ICH48
22,23,26,37
22,23,26,37
22,23,26,37
22,23,26,37
R580 1
INT_IRQ14 19,21
INT_IRQ15 19,21
INT_SERIRQ 19,23,29,31
SM_INTRUDER#
SMLINK0
ICH3-M (1/2)
2
@100K
1
System
SMLINK1
Managment SMB_CLK
Interface SMB_DATA
PCI
Interface
1
R579
@15PF
PM_GMUXSEL/GPIO23
PM_CPUPREF#/GPIO22
PM_VGATE/VRMPWRGD
K2
K5
N1
R2
C327
+3V_SW
PCI_CLK
PCI_DEVSEL#
PCI_FRAME#
PCI_GPIO0/REQA#
PCI_GPIO1/REQB#/REQ5#
PCI_GPIO16/GNTA#
PCI_GPIO17/GNTB#/GNT5#
PCI_IRDY#
PCI_PAR
PCI_PERR#
PCI_LOCK#
PCI
PCI_PME#
Interface
PCI_RST#
PCI_SERR#
STOP#
PCI_TRDY#
Interrupt
Interface
12
12
@10
unMUX
GPIO
2 LAN@100K
R212
Geyserville
LPC
Interface
R578 1
IR_DET
1 0
1 10K
1 10K
CLK_ICH14
Power Management
AC'97
Interface
R577
2
100K
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
8
7
6
5
J2
K1
J4
K3
H5
K4
H3
L1
L2
G2
L4
H4
M4
J3
M5
J1
F5
N2
G4
P2
G1
P1
F2
P3
F3
R1
E2
N4
D1
P4
E1
P5
PM_AGPBUSY#/GPIO6
PM_AUXPWROK
PM_BATLOW#
PM_C3_STAT#/GPIO21
PM_CLKRUN#/GPIO24
PM_DPRSLPVR
PM_PWRBTN#
PM_PWROK
PM_RI#
PM_RSMRST#
PM_SLP_S1#/GPIO19
PM_SLP_S3#
PM_SLP_S5#
PM_STPCPU#/GPIO20
PM_STPPCI#/GPIO18
PM_SUS_CLK
PM_SUS_STAT#
PM_THRM#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
U20
Y20
V19
U16A
22,23,26,37 PCI_AD[0..31]
B7
D11
B11
C11
C7
A7
AGP_BUSY#
V4
Y5
AB3
V5
AC2
AB21
AB1
AA6
AA1
AA7
W20
AA5
AA2
V21
U21
AA4
AB4
U5
11
1
2
3
4
8P4R_100K
CLK_ICHAPIC
H_PICD0
H_PICD1
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
LAN_DET
IR_DET
S_GPIO4
S_GPIO5
IDE_PATADET
EC_SMI#
EC_SCI#
EC_LID_OUT#
@4.7K
25,29 PM_LANPWROK
R474 2
0
S_GPIO4
S_GPIO5
R225 2
R224 2
R213 2
LAN_DET
R401
19,29 PM_BATLOW#
PM_RSMRST# 1
+3V_SW
RP18
+3V_SW
PM_RSMRST#
+3V_SW
29,31
29,31
29,31
29,31
LPC_DRQ#1 31
LPC_FRAME# 29,31
WARM_RST# 34
SM_SEL0 14
PAL/NTSC# 15
GPIO_7
GPIO_8
GPIO_12
GPIO_13
GPIO_25
GPIO_27
GPIO_28
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
EC_SMI#
EC_SCI#
EC_LID_OUT#
IDE_PATADET
29
EC_SMI#
29
EC_SCI#
29 EC_LID_OUT#
21 IDE_PATADET
34,42
VGATE
5 PM_CPUPERF#
7,42 PM_SSMUXSEL
29
PM_THRM#
29,31 PM_SUS_STAT#
11,23,24 RTCCLK
8
PM_STPPCI#
8 PM_STPCPU#
29 PM_SLP_S5#
29 PM_SLP_S3#
8,29 PM_SLP_S1#
19 PM_RSMRST#
19,29 ICH_SWI#
34
PM_PWROK
29 PBTN_OUT#
7,42 PM_DPRSLPVR
19,22,23,29,31,37 PM_CLKRUN#
Rev
2A
, 10, 2002
Sheet
D
17
of
89
USB_D_PP0
USB_D_PN0
USB_D_PP1
USB_D_PN1
USB_D_PP2
USB_D_PN2
USB_D_PP3
USB_D_PN3
USB_D_PP4
USB_D_PN4
D27
1SS355
20
20
36
36
19
USB_RBIAS
ICH_SPKR
H23
SPKR
+1.8V_SW
U19
VCCA
F17
F18
K14
VCCPSUS3/VCCPUSB0
VCCPSUS4/VCCPUSB1
VCCPSUS5/VCCPUSB2
E10
V8
V9
VCCPSUS0
VCCPSUS1
VCCPSUS2
GPIO43
USB_BIAS
R196
+3V_SW
27
R154
18.2_1%
2 @1K
V3ALW_ICH
+3V_ALW
1
R181
VPLL_USB
J18
M14
R18
T18
VCCPHL0
VCCPHL1
VCCPHL2
VCCPHL3
P12
V15
V16
V17
V18
VCCPIDE0
VCCPIDE1
VCCPIDE2
VCCPIDE3
VCCPIDE4
G18
H18
VCCP0
VCCP1
F6
G6
H6
J6
M10
R6
T6
U6
VCCPPCI0
VCCPPCI1
VCCPPCI2
VCCPPCI3
VCCPPCI4
VCCPPCI5
VCCPPCI6
VCCPPCI7
A21
A22
VSS102
VSS103
B23
E7
T21
D6
T1
C2
N/C0
N/C1
N/C2
N/C3
N/C4
C23
P14
U18
V22
C13
W5
E6
W8
AB6
VCC_RTC
F7
F8
K10
+3V_SW
+1.8V_SW
82801
IDE_PDCS1#
IDE_PDCS3#
IDE_SDCS1#
IDE_SDCS3#
AC15
AB15
AC21
AC22
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_SDA0
IDE_SDA1
IDE_SDA2
AA14
AC14
AA15
AC20
AA19
AB20
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
W12
AB11
AA10
AC10
W11
Y9
AB9
AA9
AC9
Y10
W9
Y11
AB10
AC11
AA11
AC12
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
Y17
W17
AC17
AB16
W16
Y14
AA13
W15
W13
Y16
Y15
AC16
AB17
AA17
Y18
AC18
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_PDDACK#
IDE_SDDACK#
IDE_PDDREQ
IDE_SDDREQ
IDE_PDIOR#
IDE_SDIOR#
IDE_PDIOW#
IDE_SDIOW#
IDE_PIORDY
IDE_SIORDY
Y13
Y19
AB12
AB18
AC13
AC19
Y12
AA18
AB13
AB19
Power
USB
Interface
ICH3-M (2/2)
IDE
Interface
Misc
Power
VSS
+3V_SW
VCCUSBPLL/VCC_SUS9
B21
ICH_ACIN
VCCUSBBG/VCC_SUS8
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43
21 ICH_IDE_PRST#
21 ICH_IDE_SRST#
7
AC_VID0
7
AC_VID1
7
AC_VID2
7
AC_VID3
7
AC_VID4
19
FWH_WP#
19
FWH_TBL#
30
EC_FLASH#
VCCPCPU0
VCCPCPU1
VCCPCPU2
H20
G22
F21
G19
E22
E21
H21
G23
F23
G21
D23
E23
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
VCC5REFSUS1
VCC5REFSUS2
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_D_PN0
USB_D_PN1
USB_D_PN2
USB_D_PN3
USB_D_PN4
VCC5REF1
VCC5REF2
E12
D12
C12
B12
A12
A11
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
8
7
6
5
F15
F16
USB_PP0
USB_PP1
USB_PP2
USB_PP3
USB_PP4
USB_PP5
USB_PN#0
USB_PN#1
USB_PN#2
USB_PN#3
USB_PN#4
USB_PN#5
1
2
3
4
E13
F14
K12
P10
V6
V7
D19
A19
E17
B17
D15
A15
D18
A18
E16
B16
D14
A14
VCC_AUX0/VCCLAN1_8
VCC_AUX1/VCCLAN1_8
VCC_AUX2/VCCLAN1_8
USB_D_PP0
USB_D_PP1
USB_D_PP2
USB_D_PP3
USB_D_PP4
VCC_USB0/VCC_SUS6
VCC_USB1/VCC_SUS7
RP19
8P4R_100K
IDE_PDCS1#
IDE_PDCS3#
IDE_SDCS1#
IDE_SDCS3#
21
21
21
21
IDE_PDA0 21
IDE_PDA1 21
IDE_PDA2 21
IDE_SDA0 21
IDE_SDA1 21
IDE_SDA2 21
IDE_PDD[0..15] 21
IDE_SDD[0..15] 21
IDE_PDDACK# 21
IDE_SDDACK# 21
IDE_PDDREQ 21
IDE_SDDREQ 21
IDE_PDIOR# 21
IDE_SDIOR# 21
IDE_PDIOW# 21
IDE_SDIOW# 21
IDE_PIORDY 21
IDE_SIORDY 21
E14
VSS35
E15
VSS36
E18
VSS37
E19
VSS38
E20
VSS39
F22
VSS40
G3
VSS41
G20
VSS42
H19
VSS43
AA22
VSS44
J5
VSS45
K11
VSS46
K13
VSS47
K20
VSS48
K21
VSS49
K22
VSS50
K23
VSS51
L3
VSS52
L10
VSS53
L11
VSS54
L12
VSS55
L13
VSS56
L14
VSS57
L21
VSS58
L23
VSS59
M11
VSS60
M12
VSS61
M13
VSS62
M20
VSS63
M22
VSS64
N5
VSS65
N10
VSS66
N11
VSS67
N12
VSS68
N13
VSS69
N14
VSS70
N21
VSS71
N23
VSS72
P11
VSS73
P13
VSS74
P20
VSS75
P22
VSS76
R3
VSS77
R5
VSS78
R21
VSS79
R23
VSS80
T4
VSS81
T20
VSS82
T22
VSS83
V3
VSS84
AC23
VSS85
V20
VSS86
W6
VSS87
W7
VSS88
W10
VSS89
W14
VSS90
W18
VSS91
W22
VSS92
Y8
VSS93
AA3
VSS94
AA8
VSS95
AA12
VSS96
AA16
VSS97
AA20
VSS98
AB8
VSS99
AC1
VSS100
AC8
VSS101
+3V_ALW
VCC_SUS0
VCC_SUS1
VCC_SUS2
VCC_SUS3
VCC_SUS4
VCC_SUS5
U16B
FBM-L10-160808-301
FBM-L10-160808-301
FBM-L10-160808-301
FBM-L10-160808-301
FBM-L10-160808-301
FBM-L10-160808-301
2
VCCP_AUX
C705
BLM21A601SPT
1UF_0603
+1.8V_ALW
2
2
2
2
2
2
20
20
20
20
36
36
36
36
20
20
+1.8V_ALW
+3V_ALW
+1.5V_SW
+V1.8_ICHLAN
L47
1
F9
F10
+1.8V_ALW
1
1
1
1
1
1
C599
.1UF
+RTCVCC
VCCPAUX0/VCCLAN3_3
VCCPAUX1/VCCLAN3_3
C714
@1UF_0603
2
C709
.1UF
VCC5REF
L27
L26
L19
L18
L25
L24
USB_PP0
USB_PN0
USB_PP1
USB_PN1
USB_PP2
USB_PN2
USB_PP3
USB_PN3
USB_PP4
USB_PN4
E11
K6
K18
P6
P18
V10
V14
+3V_ALW
1
VCCCORE0
VCCCORE1
VCCCORE2
VCCCORE3
VCCCORE4
VCCCORE5
VCCCORE6
+5V_SW +3V_SW
R493
1K
100K
29,38,40
ACIN
1
D13
2
RB751V
ICH_ACIN
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
18
of
89
+3V_SW
RP8
+3V_SW
1
2
3
4
18
FWH_WP#
18
FWH_TBL#
17,22,23,29,31,37 PM_CLKRUN#
+3V_SW
8
7
6
5
R200 1
17,22,23,26,37 PCI_PAR
100
RP6
8P4R_10K
+3V_ALW
17,29 ICH_SWI#
10P8R_8.2K
R461 1
100K
R466 1
100K
+3V_ALW
17,29 PM_BATLOW#
+3V_SW
17 SMB_ALERT#
+3V_SW
C341
.1UF
C340
.1UF
C660
C678
1UF_0603 .1UF
2
C338
1UF_0603
10P8R_8.2K
+3V_SW
PCI_REQ#2 17,23
PCI_REQ#3 17,26
PCI_REQ#4 17,37
INT_SERIRQ 17,23,29,31
+1.5V_SW
10
9
8
7
6
1
2
3
4
5
PCI_REQA#
PCI_REQB#
PCI_REQ#0
PCI_REQ#1
100K
2
+5V_SW
RP20
17
17
17,22
17,37
R550
1
PCI_SERR# 17,22,23,37
PCI_DEVSEL# 17,22,23,26,37
PCI_PERR# 17,22,23,37
PCI_LOCK# 17,23
C661
.1UF
2
10
9
8
7
6
1
2
3
4
5
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
17,22,23,26,37
17,22,23,26,37
17,22,23,26,37
17,22,23,26,37
+3V_SW
RP17
C646
.1UF
2
C675
.1UF
2
C658
47PF
2
C621
.1UF
1
C610
.1UF
2
C624
47PF
2
C667
.1UF
2
C657
.1UF
1
C656
.1UF
C662
47PF
C674
.1UF
C673
.1UF
1
C672
47PF
C622
.1UF
C617
.1UF
1
C625
47PF
C616
.1UF
C645
.1UF
C336
22UF_1206_10V
+
C337
22UF_1206_10V
10P8R_8.2K
+3V_SW
INT_IRQ15 17,21
INT_PIRQA# 17,22,23
INT_PIRQB# 17,23
INT_PIRQC# 17,37
10
9
8
7
6
1
2
3
4
5
GPIO43
18
17,26,37 INT_PIRQD#
17,21 INT_IRQ14
+3V_ALW
+
C262
.1UF
2
C264
.1UF
2
C261
.1UF
2
C263
.1UF
C249
22UF_1206_10V
+3V_ALW
+1.8V_ALW
+
C246
.1UF
C250
.1UF
C251
.1UF
2
C243
22UF_10V_1206
2
C677
.1UF
2
C676
.1UF
2
C604
33PF
2
C630
.1UF
2
C644
.1UF
2
C651
33PF
2
C639
.1UF
2
C325
100UF_D2_6.3V
2.2K
2.2K
100K
100K
2
2
2
2
1
1
1
1
+1.8V_SW
8,14,17 SMB_DATA
8,14,17 SMB_CLK
17
SMLINK0
17
SMLINK1
R556
R557
R558
R559
+RTCVCC
17 SM_INTRUDER#
1
R476
+3V_ALW
2
8.2K
R538
1
@0
2
R473
0
1
G_RST#
22,23,24,29
+3V_ALW
+3V_ALW
+3V_ALW
R359
74LVC14
11
10
U63
1
14
U36E
4
7SH08
3
C549
.47UF_0603
2
R354
PM_RSMRST# 17
EC_RST#
U36D
74LVC14
0
2
1
29,34
14
47K
R549
1
330K
30
EC_GRST#
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
19
of
89
USB Interface
+5V_ALW
USB_OC#0 18
USB_OC#1 18
C374
OC1#
OUT1
OUT2
OC2#
GND
IN
EN1#
EN2#
TPS2042
4.7UF_10V_0805
C383
18
18
USB_PN0
USB_PP0
USB_PN1 18
USB_PP1 18
USBPWR_AS
C60
.1UF
1UF_0603
2
1UF_0603
USBPWR_BS
JP4
C61
.1UF
+ C35
1000PF
2
C39
150UF_D2_16V
2 USB_CPN0 2
FBM-L10-160808-301
USB_CPP0 3
2
FBM-L10-160808-301
4
VCC
D0-
D1-
D0+
D1+
VSS
VSS
VCC
USB_BS
USB_CPN12
L30
USB_CPP12
L29
USB_AS
1
L32
1
L31
1
FBM-L10-160808-301
1
FBM-L10-160808-301
C369+
C367
1000PF 150UF_D2_16V
2
8
7
6
5
AXN420C530P
C380
BT_ON# 30
BT_PRES# 30
1
2
3
4
30 BT_RST#
2
4
6
8
10
12
14
16
18
20
1
18 USB_PP4
18 USB_PN4
1
3
5
7
9
11
13
15
17
19
10K
JP13
BT_WAKE_UP
R263
10K
U26
Bluetooth Connector
30 BT_DETACH
30 BT_WAKE_UP
R260
+3V_ALW
USBPWR_BS
+5V_ALW
+3V_ALW
USBPWR_AS
BlueTooth Interface
11
G3
G1
12
G4
G2
10
Molex-67300
USB_CPP1
1
C762
USB_CPN1
USB_CPP0
1
C34
15PF
15PF
C370
2
C763
15PF
15PF
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
20
of
89
+5V_SW
9,15,17,22,23,26,29,31,37
U24
1
+3V_SW
HDD_RST#
+5V_SW
PCI_RST#
1
R243
2 IDE_PIORDY
4.7K
1
R240
2 IDE_PDDREQ
@5.6K
2 IDE_SIORDY
4.7K
1
R239
2 IDE_SDDREQ
@5.6K
7SH08
18 ICH_IDE_PRST#
+5V_SW
HDD Connector
R241
@10K
2
JP22
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
Layout note :
+5V_SW
+5V_SW
C349
.1UF
C715
1000PF
C347
22UF_1206_10V
2
C717
22UF_1206_10V
HDD CONN
+5V_SW
IDE_PDA2 18
IDE_PDCS3# 18
1
IDE_PDA2
IDE_PDCS3#
Layout note :
C344
.1UF
C343
1000PF
2
IDE_PD_CSEL
IDE_PDDREQ
IDE_PDIOW#
IDE_PDIOR#
IDE_PIORDY
IDE_PDDACK#
INT_IRQ14
IDE_PDA1
IDE_PDA0
IDE_PDCS1#
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
18 IDE_PDDREQ
18 IDE_PDIOW#
18 IDE_PDIOR#
18 IDE_PIORDY
18 IDE_PDDACK#
17,19 INT_IRQ14
18
IDE_PDA1
18
IDE_PDA0
18 IDE_PDCS1#
16 HDDLED_CON#
+5V_SW
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
R242
100K
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
IDE_PATADET 17
18 IDE_PDD[0..15]
1
R238
IDE_PDD[0..15]
18 ICH_IDE_SRST#
9,15,17,22,23,26,29,31,37
PCI_RST#
+5V_SW
U8
1
CDR_RST#
4
2
3
7SH08
+5V_SW
CD-ROM Connector
18 IDE_SDD[0..15]
JP23
C769
10UF_10V_1206
+5V_SW
18
18
17,19
18
18
18
16
CDR_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0
IDE_SDIOW#
IDE_SIORDY
INT_IRQ15
IDE_SDA1
IDE_SDA0
IDE_SDCS1#
CDLED_CON#
2
R235
1 SEC_CSEL
470
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
INT_CD_R 26
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDDREQ 18
IDE_SDIOR# 18
IDE_SDDACK# 18
R237 1
2 100K
IDE_SDA2 18
IDE_SDCS3# 18
W=80mils
INT_CD_L
CD_AGND
C345
.1UF
2
26
26
CD-ROM CONN.
4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
21
of
89
+3V_ALW
1
R197
R198
@100K
@100K
@100K
ID: AD16
17,19,23,26,37
17,19,23,26,37
17,19,23,26,37
17,19,23,26,37
17,19,23,26,37
17,19,23,37
17,19,23
30
17,19,23,37
17,19,23,26,37
17,19,23,29,31,37
9,15,17,21,23,26,29,31,37
PCI_AD16
1R187
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
INT_PIRQA#
1394_PME#
PCI_SERR#
PCI_PAR
PM_CLKRUN#
PCI_RST#
1
2
C301
C308
C307
C304
C295
C284
@.1UF
@.1UF
2
@.1UF
2
@.1UF
2
@.1UF
2
@.1UF
C234
C233
C272
C268
2 @6.34K_1%
C232
R179
R1
119
X0
X1
FILTER0
FILTER1
C312 1
2 @15PF
@24.576MHz
C311 1
2 @15PF
X1
FILTER
C305 1
2 @.1UF
92
SDA_1395
R131 1
2 @220
SCL
91
SCL_1394
R123 1
2 @220
PC0
PC1
PC2
99
98
97
POWER CLASS
PHY PORT 1
TPBIAS0
TPA0+
TPA0TPB0 +
TPB0 -
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
TEST9
TEST8
94
95
TEST3
TEST2
TEST1
TEST0
101
102
104
105
XTPBIAS0
XTPA0+
XTPA0XTPB0+
XTPB0-
R248
@56.2_1%
XTPBIAS0
XTPA0+
XTPA0XTPB0+
XTPB0-
R247
@56.2_1%
C350
@1UF_25V_0805
U19
JP5
L1
1
2
3
4
17
23
33
44
55
64
68
75
83
103
116
115
114
113
112
8
7
6
5
PA0+_C
PA0-_C
PB0+_C
PB0-_C
4
3
2
1
5
6
@1394_CONN 4PIN
@IEEE1394-COILS
R244
@56.2_1%
C231
2
@.1UF
1
@.1UF
@.1UF
2 @1K
2 @1K
R246
@56.2_1%
C302
1
2
@.1UF
OSCILLATOR
AGND
AGND
AGND
AGND
AGND
AGND
AGND
GPIO3
GPIO2
C303
2 @.1UF
Near 1394 IC
PLLGND1
89
90
C297 1
109
110
111
117
126
127
128
1
1 @220
@220
118
86
96
10
11
CYCLEOUT
CNA
TEST17
TEST16
87
VDDP
VDDP
VDDP
VDDP
VDDP
BIAS CURRENT
2
2
9
30
93
R124
R132
R0
+3V_ALW
2 @1K
C281
PHY PORT 2
G_RST
REG_EN#
REG18
REG18
14
R190 1
R185 1
@4.7UF_10V_0805
19,23,24,29 G_RST#
125
124
123
122
121
C320
@.01UF
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
CLK_1394
PCI_GNT#0
PCI_REQ#0
TPBIAS1
TPA1+
TPA1TPB1+
TPB1-
C306
17,23,26,37
17,23,26,37
17,23,26,37
17,23,26,37
8
17
17,19
106
VPLL_1394
@15PF
CPS
R167 1
2 @0_0805
C319
L28
12
@10
TSB43AB22
15
27
39
51
59
72
88
100
7
1
2
107
108
120
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PLLVDD
AVDD
AVDD
AVDD
AVDD
AVDD
R201
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA
PCI_PME
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST
+3V_ALW
CLK_1394
22
24
25
26
28
29
31
32
37
38
40
41
42
43
45
46
61
63
65
66
67
69
70
71
74
76
77
79
80
81
82
84
34
47
60
73
16
18
19
2@100 36
49
50
52
53
54
56
13
21
57
58
12
85
CYCLEIN
20
35
48
62
78
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
R136
2
2
@100K
@100K
1
1
1
R130
17,23,26,37 PCI_AD[0..31]
R116
C351
R245
@5.11K
@220PF
A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
5
Rev
2A
Sheet
1
22
of
89
S1_IOWR#
S1_IORD#
S1_OE#
S1_CE2#
S1_IOWR# 24
S1_IORD# 24
S1_OE#
24
S1_CE2# 24
S1_A[0..25]
S1_D[0..15]
+3V_ALW
+3V_SW +3V_SW
S1_A[0..25] 24
S1_D[0..15] 24
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
G_RST#
19,22,24,29
S1_VCC
163
208
72
128
133
193
IRQ12/PME#
IRQ14/CLKRUN#
IRQ15/RI_OUT#
SPKR_OUT#
LEDO#/SKTA_ACTV
IRQ11/SKTB_ACTV
17,19,29,31 INT_SERIRQ
205
206
IRQ5/SERIRQ#
IRQ7/SIN#/B_VPP_PGM
2
1
GND
GND
GND
GND
GND
GND
GND
GND
C563
.1UF
C607
.1UF
C682
.1UF
79
134
180
124
122
121
120
119
116
113
111
109
107
105
103
102
100
99
83
81
80
78
77
75
74
73
71
68
67
66
65
64
63
62
59
A_D10/CAD31
A_D9/CAD30
A_D1/CAD29
A_D8/CAD28
A_D0/CAD27
A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A25/CAD19
A_A7/CAD18
A_A24/CAD17
A_A17/CAD16
A_IOWR/CAD15
A_A9/CAD14
A_IORD#/CAD13
A_A11/CAD12
A_OE#/CAD11
A_CE2#/CAD10
A_A10/CAD9
A_D15/CAD8
A_D7/CAD7
A_D13/CAD6
A_D6/CAD5
A_D12/CAD4
A_D5/CAD3
A_D11/CAD2
A_D4/CAD1
A_D3/CAD0
GRST#
A_SKT_VCC
A_SKT_VCC
117
98
60
A_REG#/CCBE3#
A_A12/CCBE2#
A_A8/CCBE1#
A_CE1#/CCBE0#
112
97
82
70
C580
C649
C659
.1UF
.1UF
.1UF
S1_REG# 24
S1_A12
S1_A8
S1_CE1# 24
A_A16/CCLK
A_A23/CFRAME#
A_A15/CIRDY#
A_A22/CTRDY#
A_A21/CDEVSEL#
A_A20/CSTOP#
A_A13/CPAR
A_A14/CPERR#
A_WAIT#/CSERR#
A_INPACK#/CREQ#
A_WE#/CGNT#
A_RDY_IRQ#/CINT#
A_A19/CBLOCK#
A_WP/CCLKRUN#
A_RST/CRST#
A_R2_D2/RFU
A_R2_D14/RFU
A_R2_A18/RFU
A_VS1/CVS1
A_VS2/CVS2
A_CD1#/CCD1#
A_CD2#/CCD2#
A_BVD2/CAUDIO
A_BVD1/CSTSCHG
93 R421 1
2 33
S1_A23
96
S1_A15
95
S1_A22
94
S1_A21
92
S1_A20
90
S1_A13
84
S1_A14
86
108
110
89
91
S1_A19
88
125
106
S1_D2
123
S1_D14
69
S1_A18
85
76
104
61
126
114
118
B_BVD1/CSTCHG
B_BVD2/CAUDIO
B_CD2#/CCD2#
B_CD1#/CCD1#
B_VS2/CVS2
B_VS1/CVS1
B_R2_A18/RFU
B_R2_D14/RFU
B_R2_D2/RFU
B_RST/CRST#
B_WP/CCLKRUN#
B_A19/CBLOCK#
B_RDY_IRQ#/CINT#
B_WE#/CGNT#
B_INPACK#/CREQ#
B_WAIT#/CSERR#
B_A14/CPERR#
B_A13/CPAR
B_A20/CSTOP#
B_A21/CDEVSEL#
B_A22/CTRDY#
B_A15/CIRDY#
B_A23/CFRAME#
B_A16/CCLK
192
190
202
136
179
152
161
145
198
182
201
164
167
165
186
184
162
159
166
168
170
171
172
169
B_CE1#/CCBE0#
B_A8/CCBE1#
B_A12/CCBE2#
B_REG#/CCBE3#
147
157
173
188
B_SKT_VCC
B_SKT_VCC
B_SKT_VCC
143
160
200
S1_A16
S1_WAIT# 24
S1_INPACK# 24
S1_WE# 24
S1_RDY# 24
S1_WP
S1_RST
24
24
S1_VS1
S1_VS2
S1_CD1#
S1_CD2#
S1_BVD2
S1_BVD1
24
24
24
24
24
24
S2_BVD1
S2_BVD2
S2_CD2#
S2_CD1#
S2_VS2
S2_VS1
24
24
24
24
24
24
S2_RST
S2_WP
24
24
S2_A18
S2_D14
S2_D2
S2_A19
S2_A14
S2_A13
S2_A20
S2_A21
S2_A22
S2_A15
S2_A23
1
R418
S2_RDY# 24
S2_WE# 24
S2_INPACK# 24
S2_WAIT# 24
2
33
S2_A16
S2_CE1#
S2_A8
S2_A12
24
S2_REG# 24
S2_VCC
C684
C650
C583
.1UF
.1UF
.1UF
OZ6933TQFP
C605
4.7UF_10V_0805
CORE_VCC
CORE_VCC
CORE_VCC
S2_D10
S2_D9
S2_D1
S2_D8
S2_D0
S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A25
S2_A7
S2_A24
S2_A17
14
26
28
44
57
101
129
177
1
+3V_SW
U37
S2_A10
S2_D15
S2_D7
S2_D13
S2_D6
S2_D12
S2_D5
S2_D11
S2_D4
S2_D3
30
PCM_PME#
17,19,22,29,31,37 PM_CLKRUN#
32
PCM_RI#
27
CB_SPK#
S2_A11
IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PERR#
SERR#
PCI_REQ#
PCI_GNT#
IRQ9/INTA#
IRQ4/INTB#/A_VPP_PGM
LOCK#
RST#
CardBus Controller
OZ6933T (TQFP)
S2_A9
15
1
31
27
29
30
32
35
33
34
3
2
203
204
58
207
17,22,26,37 PCI_AD20
8
CLK_PCI_CB
17,19,22,26,37 PCI_DEVSEL#
17,19,22,26,37 PCI_FRAME#
R355
17,19,22,26,37 PCI_IRDY#
@33
17,19,22,26,37 PCI_TRDY#
17,19,22,26,37 PCI_STOP#
17,19,22,26,37 PCI_PAR
17,19,22,37 PCI_PERR#
C557
17,19,22,37 PCI_SERR#
@10PF
17,19 PCI_REQ#2
17
PCI_GNT#2
17,19,22 INT_PIRQA#
17,19 INT_PIRQB#
17,19 PCI_LOCK#
9,15,17,21,22,26,29,31,37 PCI_RST#
CLK_PCI_CB
C/BE3#
C/BE2#
C/BE1#
C/BE0#
B_D10/CAD31
B_D9/CAD30
B_D1/CAD29
B_D8/CAD28
B_D0/CAD27
B_A0/CAD26
B_A1/CAD25
B_A2/CAD24
B_A3/CAD23
B_A4/CAD22
B_A5/CAD21
B_A6/CAD20
B_A25/CAD19
B_A7/CAD18
B_A24/CAD17
B_A17/CAD16
B_IOWR#/CAD15
B_A9/CAD14
B_IORD#/CAD13
B_A11/CAD12
B_OE#/CAD11
B_CE2#/CAD10
B_A10/CAD9
B_D15/CAD8
B_D7/CAD7
B_D13/CAD6
B_D6/CAD5
B_D12/CAD4
B_D5/CAD3
B_D11/CAD2
B_D4/CAD1
B_D3/CAD0
R358
100
1
2
CLK_PCI_CB
13
25
36
47
199
197
196
195
194
191
189
187
185
183
181
178
176
175
174
158
156
155
154
153
151
150
149
148
144
142
141
140
139
138
137
135
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
IRQ3/A_VCC_3#
SCLK/A_VCC_5#
SDATA/B_VCC_3#
SLATCH/SMBCLK/B_VCC_5#
IRQ9/A_VPP_VCC_PGM
IRQ10/B_VPP_VCC_PGM
17,22,26,37
17,22,26,37
17,22,26,37
17,22,26,37
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
87
132
131
130
115
146
4
5
7
8
9
10
11
12
16
17
18
19
20
22
23
24
38
39
40
41
42
43
45
46
48
49
51
52
53
54
55
56
PCI_VCC
PCI_VCC
PCI_VCC
PCI_VCC
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
AUX_VCC
17,22,26,37 PCI_AD[0..31]
6
21
37
50
127
+3V_ALW
+3V_SW
C681
C612
.1UF
C561
.1UF
C565
.1UF
C564
.1UF
SLATCH
SLDATA
RTCCLK
24
24
11,17,24
.1UF
S2_CE2#
S2_OE#
S2_IORD#
S2_IOWR#
S2_A[0..25]
S2_D[0..15]
S2_CE2# 24
S2_OE#
24
S2_IORD# 24
S2_IOWR# 24
S2_A[0..25] 24
S2_D[0..15] 24
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
23
of
89
CARDBUS SOCKET
JP18
1
S1_VS2
S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22
S1_A16
S1_VPP
S1_VCC
23
S1_RDY#
23
S1_WE#
23
S1_IOWR#
23
S1_IORD#
23
23
23
S1_VS1
S1_OE#
S1_CE2#
23
S1_CE1#
S1_CD1#
S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3
S2_REG# 23
C502 2.2UF_16V_0805
S2_INPACK# 23
C501 .1UF
C550 .1UF
S2_WAIT# 23
S2_RST
23
S2_VS2
23
78
79
80
81
25
+3V_ALW
C551 .1UF
C504 .1UF
SLDATA
SLATCH
C503 .1UF
23
SLDATA
SLATCH
C548 .1UF23
11,17,23 RTCCLK
S2_A7
S2_A24
S2_A12
S2_A23
S2_A15
S2_A22
+3V_ALW
NC
7
24
12V
12V
1
2
30
5V
5V
5V
15
16
17
3.3V
3.3V
3.3V
3
5
4
DATA
LATCH
CLOCK
13
19
18
NC
STBY#
OC#
S2_A16
AVPP
AVCC
AVCC
AVCC
8
9
10
11
BVPP
BVCC
BVCC
BVCC
23
20
21
22
RESET
RESET#
6
14
NC
NC
NC
MODE
26
27
28
29
GND
12
C552
10UF_16V_1206
S2_VPP
S2_VPP
S2_VCC
C513
10UF_16V_1206
G_RST#
S2_VCC
S2_A17
S2_A8
S2_IOWR#
S2_A9
S2_IORD#
S2_A11
S2_VS1
S2_OE#
S2_CE2#
S2_A10
S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6
S2_D12
S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3
19,22,23,29
TPS2216
1
R561
1
R562
S2_VPP
S2_A21
S2_RDY#
S2_A20
S2_WE#
S2_A19
S2_A14
S2_A18
S2_A13
S1_VCC
1
S2_BVD2 23
2 SLDATA
100K
2 SLATCH
100K
S2_RDY# 23
S2_WE#
23
S1_VCC
S2_VCC
C529
.1UF
C530
.01UF
C538
4.7UF_16V_1206
C523
.1UF
C522
.01UF
C505
4.7UF_16V_1206
S2_IOWR# 23
S2_IORD# 23
3
S2_VS1
23
S2_OE#
23
S2_CE2# 23
S1_VPP
C531
.01UF
C539
4.7UF_25V_1206
S2_CE1# 23
S2_VPP
C526
.01UF
C582
S1_CD1# 1
1000PF
S2_CD1# 23
C514
4.7UF_25V_1206
C680
S1_CD2# 1
2
1000PF
78
79
80
81
23
S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13
S1_VPP
U32
23
S1_VPP
+5V_ALW
S1_RST
+12V_ALW
S2_BVD1 23
23
S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]
S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]
S1_WAIT#
S2_WAIT#
S2_A4
S2_RST
S2_A5
S2_VS2
S2_A6
S2_A25
23
23
23
23
23
S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25
S2_A0
S2_BVD2
S2_A1
S2_REG#
S2_A2
S2_INPACK#
S2_A3
S2_CD2# 23
S2_WP
23
S1_REG#
S1_INPACK#
S2_D10
S2_D2
S2_D9
S2_D1
S2_D8
S2_D0
S2_BVD1
23
23
S2_CD2#
S2_WP
S1_BVD2
S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3
B77
B76
B75
B74
B73
B72
B71
B70
B69
B68
B67
B66
B65
B64
B63
B62
B61
B60
B59
B58
B57
B56
B55
B54
B53
B52
B51
B50
B49
B48
B47
B46
B45
B44
B43
B42
B41
B40
B39
B38
B37
B36
B35
B34
B33
B32
B31
B30
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
23
S1_BVD1
S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1
b68
b34
b67
b33
GND
b66
b32
b65
b31
b64
b30
b63
GND
b29
b62
b28
b61
b27
b60
b26
GND
b59
b25
b58
b24
b57
b23
b56
GND
b22
b55
b21
b54
b20
b53
GND
b19
b52
b18
b51
b17
b50
b16
b49
b15
b48
b14
b47
b13
GND
b46
b12
b45
b11
b44
GND
b10
b43
b9
b42
b8
GND
b41
b7
b40
b6
b39
b5
GND
b38
b4
b37
b3
b36
b2
b35
b1
23
S1_CD2#
S1_WP
a68
a34
a67
a33
GND
a66
a32
a65
a31
a64
a30
a63
GND
a29
a62
a28
a61
a27
a60
a26
GND
a59
a25
a58
a24
a57
a23
a56
GND
a22
a55
a21
a54
a20
a53
GND
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
GND
a46
a12
a45
a11
a44
GND
a10
a43
a9
a42
a8
GND
a41
a7
a40
a6
a39
a5
GND
a38
a4
a37
a3
a36
a2
a35
a1
23
23
S1_CD2#
S1_WP
A77
A76
A75
A74
A73
A72
A71
A70
A69
A68
A67
A66
A65
A64
A63
A62
A61
A60
A59
A58
A57
A56
A55
A54
A53
A52
A51
A50
A49
A48
A47
A46
A45
A44
A43
A42
A41
A40
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
PCMC154PIN
S2_CD1# 1
1000PF
C683
2
C581
S2_CD2# 1
1000PF
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
68
of
89
CARDBUS SOCKET
JP18
1
S1_VS2
S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22
S1_A16
S1_VPP
S1_VCC
23
S1_RDY#
23
S1_WE#
23
S1_IOWR#
23
S1_IORD#
23
23
23
S1_VS1
S1_OE#
S1_CE2#
23
S1_CE1#
S1_CD1#
S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3
S2_REG# 23
C502 2.2UF_16V_0805
S2_INPACK# 23
C501 .1UF
C550 .1UF
S2_WAIT# 23
S2_RST
23
S2_VS2
23
78
79
80
81
25
+3V_ALW
C551 .1UF
C504 .1UF
SLDATA
SLATCH
C503 .1UF
23
SLDATA
SLATCH
C548 .1UF23
11,17,23 RTCCLK
S2_A7
S2_A24
S2_A12
S2_A23
S2_A15
S2_A22
+3V_ALW
NC
7
24
12V
12V
1
2
30
5V
5V
5V
15
16
17
3.3V
3.3V
3.3V
3
5
4
DATA
LATCH
CLOCK
13
19
18
NC
STBY#
OC#
S2_A16
AVPP
AVCC
AVCC
AVCC
8
9
10
11
BVPP
BVCC
BVCC
BVCC
23
20
21
22
RESET
RESET#
6
14
NC
NC
NC
MODE
26
27
28
29
GND
12
C552
10UF_16V_1206
S2_VPP
S2_VPP
S2_VCC
C513
10UF_16V_1206
G_RST#
S2_VCC
S2_A17
S2_A8
S2_IOWR#
S2_A9
S2_IORD#
S2_A11
S2_VS1
S2_OE#
S2_CE2#
S2_A10
S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6
S2_D12
S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3
19,22,23,29
TPS2216
1
R561
1
R562
S2_VPP
S2_A21
S2_RDY#
S2_A20
S2_WE#
S2_A19
S2_A14
S2_A18
S2_A13
S1_VCC
1
S2_BVD2 23
2 SLDATA
100K
2 SLATCH
100K
S2_RDY# 23
S2_WE#
23
S1_VCC
S2_VCC
C529
.1UF
C530
.01UF
C538
4.7UF_16V_1206
C523
.1UF
C522
.01UF
C505
4.7UF_16V_1206
S2_IOWR# 23
S2_IORD# 23
3
S2_VS1
23
S2_OE#
23
S2_CE2# 23
S1_VPP
C531
.01UF
C539
4.7UF_25V_1206
S2_CE1# 23
S2_VPP
C526
.01UF
C582
S1_CD1# 1
1000PF
S2_CD1# 23
C514
4.7UF_25V_1206
C680
S1_CD2# 1
2
1000PF
78
79
80
81
23
S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13
S1_VPP
U32
23
S1_VPP
+5V_ALW
S1_RST
+12V_ALW
S2_BVD1 23
23
S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]
S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]
S1_WAIT#
S2_WAIT#
S2_A4
S2_RST
S2_A5
S2_VS2
S2_A6
S2_A25
23
23
23
23
23
S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25
S2_A0
S2_BVD2
S2_A1
S2_REG#
S2_A2
S2_INPACK#
S2_A3
S2_CD2# 23
S2_WP
23
S1_REG#
S1_INPACK#
S2_D10
S2_D2
S2_D9
S2_D1
S2_D8
S2_D0
S2_BVD1
23
23
S2_CD2#
S2_WP
S1_BVD2
S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3
B77
B76
B75
B74
B73
B72
B71
B70
B69
B68
B67
B66
B65
B64
B63
B62
B61
B60
B59
B58
B57
B56
B55
B54
B53
B52
B51
B50
B49
B48
B47
B46
B45
B44
B43
B42
B41
B40
B39
B38
B37
B36
B35
B34
B33
B32
B31
B30
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
23
S1_BVD1
S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1
b68
b34
b67
b33
GND
b66
b32
b65
b31
b64
b30
b63
GND
b29
b62
b28
b61
b27
b60
b26
GND
b59
b25
b58
b24
b57
b23
b56
GND
b22
b55
b21
b54
b20
b53
GND
b19
b52
b18
b51
b17
b50
b16
b49
b15
b48
b14
b47
b13
GND
b46
b12
b45
b11
b44
GND
b10
b43
b9
b42
b8
GND
b41
b7
b40
b6
b39
b5
GND
b38
b4
b37
b3
b36
b2
b35
b1
23
S1_CD2#
S1_WP
a68
a34
a67
a33
GND
a66
a32
a65
a31
a64
a30
a63
GND
a29
a62
a28
a61
a27
a60
a26
GND
a59
a25
a58
a24
a57
a23
a56
GND
a22
a55
a21
a54
a20
a53
GND
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
GND
a46
a12
a45
a11
a44
GND
a10
a43
a9
a42
a8
GND
a41
a7
a40
a6
a39
a5
GND
a38
a4
a37
a3
a36
a2
a35
a1
23
23
S1_CD2#
S1_WP
A77
A76
A75
A74
A73
A72
A71
A70
A69
A68
A67
A66
A65
A64
A63
A62
A61
A60
A59
A58
A57
A56
A55
A54
A53
A52
A51
A50
A49
A48
A47
A46
A45
A44
A43
A42
A41
A40
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
PCMC154PIN
S2_CD1# 1
1000PF
C683
2
C581
S2_CD2# 1
1000PF
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
24
of
89
+3V_ALW
JP7
DL@22PF
VCCR_LAN
+
C488
DL@.1UF
LAN_TD+ 1
1
2
DL@4.7UH
1
L45
C490
C477
C468
C472
C466
DL@.1UFDL@.1UFDL@.1UFDL@.1UF
DL@4.7UF_10V_0805
C517
DL@4.7UF_10V_0805
X2
C457
LAN_X1
R309
2 LAN_TDDL@100_1%
36
36
LAN_TX+
LAN_TX-
RJ45_TX+
RJ45_TX-
L37
L38
1
1
2 DL@0_0805
2 DL@0_0805
TX+_CON
TX-_CON
36
36
LAN_RX+
LAN_RX-
RJ45_RX+
RJ45_RX-
L41
L42
1
1
2 DL@0_0805
2 DL@0_0805
RX+_CON
RX-_CON
1
2
3
4
5
6
1
2
3
4
5
6
DL@25MHZ
S
3
DL@82562ET
LAN_X2
LAN_X1
LAN_LILED#
DL@H0013
C460
@.01UF
C459
DL@1000PF
X2
X1
47
46
LAN_TD+
LAN_TD-
HEADER 2
C394
1000PF_1206_2KV
LAN_ACTLED#
32
31
27
C393
1000PF_1206_2KV
2
ACTLED#
SPDLED#
LILED#
2 DL@619_1%
2 DL@549_1%
RX+_CON
RX-_CON
16
15
14
13
12
11
10
9
TX+_CON
TX-_CON
1
R306 1
R304 1
RX+
RXCT
NC
NC
CT
TX+
TX-
RD+
RDCT
NC
NC
CT
TD+
TD-
R272
DL@75_1%
R271
DL@75_1%
2
5
4
1
2
3
4
5
6
7
8
RBIAS100
RBIAS10
U27
LAN_RD+
LAN_RD-
VSSA
VSSA2
VSSR
VSSR
Q42
DL@2N7002
= LAN_RST#
19
23
ADV10
ISOL_TCK
ISOL_TI
ISOL_TEX
TOUT
TESTEN
RDP
RDN
LAN_RD+
LAN_RD-
41
30
28
29
26
21
2
G
17,29 PM_LANPWROK
TP_LAN_ADV
LAN_TCK
LAN_TI
LAN_EX
TP_LAN_TOUT
LAN_TESTEN
LAN_TD+
LAN_TD-
15
16
LAN_GND
C408
DL@1000PF_1206_2KV
3
6
20
22
LAN_TCK
LAN_TI
LAN_EX
LAN_TESTEN
10
11
If LAN is enable,
PM_LANPWROK
waits for PM_PWROK
to go high and stays high in S3
Kinnereth
TDP
TDN
1
2
R338
2 TP_LAN_TOUT
@0
VSS
VSS
VSS
VSS
VSS
VSSP
VSSP
JCLK
JRSTSYNC
JTXD[2]
JTXD[1]
JTXD[0]
JRXD[2]
JRXD[1]
JRXD[0]
1
TP_LAN_ADV
39
42
45
44
43
37
35
34
JP12
MOD_RING
MOD_TIP
17
LAN_JCLK
17 LAN_RSTSYNC
17
LAN_TXD2
17
LAN_TXD1
R347
17
LAN_TXD0
DL@100K
17
LAN_RXD2
17
LAN_RXD1
17
LAN_RXD0
+3V_ALW
@33
KIN_CLK
KIN_RST
KIN_TXD2
KIN_TXD1
KIN_TXD0
KIN_RXD2
KIN_RXD1
KIN_RXD0
@10PF
@HEADER 6
DL@22PF
R339
VCC
VCC
VCCP
VCCP
VCCA
VCCA2
VCCT
VCCT
VCCT
VCCT
C535
2
1 2
VCCR
VCCR
LAN_X2
8
13
18
24
48
33
38
1
25
36
40
2
7
9
12
14
17
C458
2
U29
1
2
3
4
EEP_CS
EEP_SHCLK
EEP_DOUT
EEP_DIN
CS
SK
DI
DO
VCC
DC
ORG
GND
+3V_ALW
8
7
6
5
1
R236
2
DL@10K
DL@AT93C46-10SC-2.7
JP8
Layout note :
Cassis LANGND
should cover part
of U22.
RJ45_TX+
TX+
RJ45_TX-
TX-
RJ45_RX+
RJ45_RX-
GND
13
CATHODE1
15
RX+
N/C
N/C
ANODE1
N/C
N/C
N/C
330
+3V_ALW
GRN_LED_P
R379
@100K
R546
@100K
ORE_LED_P
CATHODE2
RING
TIP
12
N/C
LAN_ACTLED#
R368
R387
@0
ORE_LED_N
17
LED2_YELN
Orange Led
R257
RX-
11
R258
75_1%
LED1_GRNN 37
+3V_SW
GRN_LED_P
16
@0
10
MOD_TIP
LAN_LILED#
LED1_GRNN
R39
Green Led
MOD_RING
VH1
DSSA-P3100SB
0
R30
GRN_LED_N
ANODE2
18
GND
14
ORE_LED_P
R264
220
LED2_YELN 37
+3V_ALW
R259
75_1%
RJ-45 & RJ-11
LAN_GND
GRN_LED_N
GRN_LED_P
ORE_LED_N
ORE_LED_P
C368
47PF
C366
47PF
C379
47PF
47PF
C382
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
25
of
89
+5V_ALW
22UF_10V_1206
Cnoise
ERR#
2
R563
2
R564
GD4
2
R570
1
10K
1
10K
1
@10K
GD0
4.7UF_10V_0805
DELAY
SEN/ADJ
GND
VOUT
C299
.1UF
2
SD#
Cnoise
ERR#
DELAY
SEN/ADJ
GND
VOUT
37
MD_SYNC
29 MIC_GAINLOW#
37
MD_BITCLK
37 MD_SDATAO
@33PF
MIC
67
66
68
CD_GND
CD_L
CD_R
70
71
LINE_IN_L
LINE_IN_R
79
80
LINE_OUT_L
LINE_OUT_R
C269
C275
1000PF
.1UF
.1UF
1UF_0603
C585
10UF_10V_1206
R139
6.8K
INT_CD_R
1
R129 6.8K
CD_L_R
1
R141 6.8K
CD_R_R
2
49
48
47
63
62
61
60
56
53
52
51
50
59
85
84
39
INT_PIRQD# 17,19,37
PCI_RST# 9,15,17,21,22,23,29,31,37
C/BE3#
C/BE2#
C/BE1#
C/BE0#
1
13
20
30
54
2
19
18
17
16
15
14
55
1
R143
6.8K
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
R95
17,22,23,37
17,22,23,37
17,22,23,37
17,22,23,37
100_0805
2 R166
100
AUD_PME# 30
1 PCI_AD19ID#:AD19
38
+3V_ALW
@20K
1
C252
CDROM_AGND
2
.1UF_0603
C274
.01UF
R576
@20K
INT_CD_L
INT_CD_R
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
6.8K
C267
1UF_0603
16V
R575
@20K
R158
C179
.01UF
C772 @10UF_16V_1206
1
16V
1
2
6.8K
C178
1UF_0603
C278
CD_AGND
AUD_VREF
@20K
21
@15PF
R530
C771 @10UF_16V_1206
R165
2N7002
R531
12
+3V_SW
C692
C703
22UF_10V_1206 1UF_0603
+3V_SW
+
R169
@10
C766
22UF_10V_1206
Q17
+3V_ALW
+5V_SW
2
G
SUSP
PCI_PAR 17,19,22,23,37
PCI_STOP# 17,19,22,23,37
PCI_DEVSEL# 17,19,22,23,37
PCI_TRDY# 17,19,22,23,37
PCI_IRDY# 17,19,22,23,37
PCI_FRAME# 17,19,22,23,37
21
2
R370 0
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
INT_CD_L
87
86
38
37
36
35
34
33
32
31
29
28
27
26
25
24
23
22
11
10
9
8
7
6
5
4
100
99
98
97
96
95
94
93
2
21
AVSS1
AVSS2
GND
GND
GND
GND
INT#
RST#
+5V_AMP
CLK_PCI_AUD 8
C576
10UF_10V_1206
73
82
89
40
21
3
88
1UF_0603
PCI_REQ#3 17,19
PCI_GNT#3 17
1000PF
C265
PCICLK
AUD_VREF
2
1
2R172 0 1
R171 0
CLK_PCI_AUD
C508
C257
C507
AFILT1
AFILT2
VCM
VREFADC
REQ#
GNT#
92
91
10UF_10V_1206
75
76
77
78
74
C518
.1UF
R173 1
6.8K
R178 1
6.8K
2
R145 1
6.8K
2
R160
2
1
6.8K
VREF
C525
LEFT_EQ
RIGHT_EQ
1
2
C228 1UF_0603 1
2
C245 1UF_0603
1
2
C273 1UF_0603 1
2
C247 1UF_0603
1
2
C597 1UF_0603
1
2
C596 1UF_0603
72
83
69
AVDD1
AVDD2
PHONE
MONO_OUT
PC_BEEP
65
81
VCC
VCC
VCC
64
+5V_AMP
+5V_AMP
90
41
12
ESS_VOL_DW#
1
6.8K
1
0
1
2
C218 1UF_0603 1
2
C270 1UF_0603
U15
ES1988
OSCI
OSCO
CLKRUN# / ECS
1
6.8K2
1
R138
2 6.8K
2
1 R175
R174 6.8K
2
R371
CDROM_AGND
CD_L_R
CD_R_R
36 DOCK_LIN_L
36 DOCK_LIN_R
29 EC_VOL_DW#
MIC_OUT+
10K
2
ESS_VOL_UP#
R377 1K
1
2
R331 10K
2
1
GPIO15 / GD7
GPIO14 / GD6
GPIO13 / GD5
GPIO12 / PCGNT# / GTO# / GS0
GPIO11 / SDO2 / VauxD
GPIO10 / SCLK2
GPIO9 / SDFS2
GPIO8 / SDI2
GPIO7 / MC97_DI / PCREQ# / VOLUP#
GPIO6 / ISDATA / R0#
GPIO5 / ISLR / GS0 / GT0#
GPIO4 / ISCLK / SIRQ#
GPIO3 / SRESET2
GPIO2 / TXD
GPIO1 / RXD
37 MOD_AUDIO_MON
37
MOD_MIC
R572
1
R376 1K
2
+3V_SW
GD4
GD3 / ECLK / VOLDN#
GD2 / EDIN / VOLUP#
GD1 / EDOUT
GD0
57
58
C176 1500PF
NPO
2
R128
.1UF
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
LK1608-1R0K
MONO_IN
29 EC_VOL_UP#
MD_SDATAI 37
MD_RST# 37
46
45
44
43
42
L15
2
+5V_AMP
C149
@10K_1%
C219
+5V_SW
R595
SI9181
2
1
R114
22
ESS_VOL_UP#
ESS_VOL_DW#
@30K_1%
2
R404 100K
2
C166 33PF
NPO
2
R106
2
100K
GD4
R110
1M
Y1
49.152 MHz
R115 1
R594
ADJ2
1
GD1
GD0
C182 10PF
NPO
1
@100K
2
R565
5VAUD_GATE
1
2
C167
.1UF
22UF_10V_1206
16V
2
VIN
4
2
+3V_ALW
C293
+
.1UF
.01UF
PCI_AD[0..31]
PCI_C/BE#[0..3]
17,22,23,37 PCI_AD[0..31]
17,22,23,37 PCI_C/BE#[0..3]
+5V_AMP
C296
10K_1%
U12
C158
28
28
ADJ2
30K_1%
2
R593
+5V_ALW
27
0
2
R592
ADJ1 1
SI9181
Place component's
to ES1988
27
R591
1
GD1
.1UF
2
VIN
C169
C160
1000PF .1UF
SD#
1
16V
1
C170
C555
+3V_SW
.01UF
5VAUD_GATE
U59
C291
C280
Rev
2A
Sheet
E
26
of
89
3
G
Q25
EC_MUTE
C663
Layout note:
2N7002
C506
30
1 R208
100K
ROUT+
12
SPK_R+
ROUT-
19
SPK_R-
2.2UF_16V_0805
R457
L_IN
LLINEIN
LOUT+
LOUT-
Q26
1
SPK_L+
2N7002
3
SPKL+
SPK_L+
SPKR-
C333
33
SPKL+
33
SPKL-
33
C317
C775
HPS
R_UP/DOWN#
L_UP/DOWN#
R439
1
R217
1K
5 U58
GAINSEL
14
SVR
16
GND1
GND2
GND3
GND4
MODE
R228
100K
ADJVOL_UP/DW# 30
74AHCT1G125GW
+5V_AMP
+3V_MIC
2
GAIN_SEL# 28
D
Q30
TDA8552TS
C634
.1UF
100K
C628
2.2UF_16V_0805
HPS
2
G
2N7002
R440
1
10
11
20
LINEOUT_L 33,36
150UF_TPB_6.3V
DIS_ADJVOL 30
2
100K
LINEOUT_R 33,36
150UF_TPB_6.3V
+5V_ALW
1
HPS
EC_MUTE
33
R460
@10K
10UF_16V_1206
16V
+3V_MIC
R590
2.2K
JP26
U61
+3V_ALW
1UF_0603
C371
2
1
VIN
VOUT
+3V_MIC
C519
.1UF
AVDD_AC97
SD#
BP
4 MIC_BP
2
1
C520
R360
1
1UF_0603
560
C768
R596
1
33,36 INTMICOFF#
DOCK_MIC
DOCK_MIC 36
MICOFF#
1
R94
2
470K
+12V_SW
10UF_16V_1206
39K
2
.22UF_0603
+5V_AMP
R356
10K
+3V_ALW
C776
10UF_16V_1206
16V
+5V_AMP
1
74AHCT1G125GW
+5V_AMP
16V
U35
+3VALW POWER
INT_MIC
INT_MIC
10K
2
2
14
1
2
33
R350
C569
1
2
R345 10K_1%
1
2
U36A
74LVC14
2
.1UF
C544
Q40
2N7002
MIC_SD# 3
VSS
R342
100K_1%
FOXCONN JA6033L-101
330PF
U62
SI9183DT-33
+5V_ALW
+5V_ALW
MIC
C385
330PF
10UF_10V_1206
@MAX8868_EUK30
C48
.1UF
C73
.01UF
+3V_ALW
BEEP#
3
6
2
1
C81
C119
2
MIC_BP
GND
SHDN#
MIC_OUT+
4
L43
FBM-L10-160808-301
DOCK_MIC1
2
1
2
L12
FBM-L10-160808-301
BP
2
1 MIC_SD#
R459 100K
VOUT
26
+3V_MIC
VIN
C72
4.7UF_10V_0805
29
R20
2.2K
+5V_ALW
+5V_SW
30
SPKR+
2.2UF_16V_0805
R447
@10K
15
SPKR+
1
0
LEFT 2
LEFT
28
C679
1
2
2N7002
3
RLINEIN
17
C665
1
2
R_IN
1
0
+12V_ALW
RIGHT 2
RIGHT
R448
28
Q28
2
G
C648
.1UF
VDD1
VDD2
VDD3
VDD4
C635
1000PF
150UF_TPB_6.3V
U21
3
8
13
18
150UF_TPB_6.3V
7
8
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
+5V_AMP
+3VALW POWER
R346
2.4K
1
2
HPS
36
D
Q45
2
G
INTSPKOFF#
HPS
28
R412
RB425D
2N7002
1M
+3V_ALW
ICH_SPKR
U36C
74LVC14
6
C568
2
1UF_0603
D42
R366
1
2
560
2
Title
+3VALW POWER
RB751V
Size
Document Number
Custom 401200
Date:
R372
@10K
18
33,36 LINE_OUT_PLUG
14
3 Q43
2SC2411EK
R382
100K
D23
2
560
R383
100K
1UF_0603
1UF_0603
R384
100K
MONO_IN 26
1
R367
CB_SPK#
C572
1
2
23
14
C534
U36B
74LVC14
4
, 10, 2002
Rev
2A
Sheet
E
27
of
89
EQ_L_INPUT1
OUT2_L
OUT3_L
IN4
OUT4
11
OUT4_L
OUT5
13
OUT5_L
2
2
L_EQ
R441 1
@33K
R454 1
@33K
R445 1
0
LEFTEQ
GAIN_SEL#
U22B
74HCT4066
18299HZ
+6dB
Q=1.41
560K_1%
C294
OUT2
OUT2_R
IN3
OUT3
OUT3_R
IN4
OUT4
11
OUT4_R
IN5
OUT5
13
OUT5_R
IN6
OUT6
15
16
1
C326
1
OUT2_R
470PF
R207
200K_1%
R_EQ
1
2
200K_1%
2230HZ
-6dB
Q=0.72
OUT3_R
330PF
R215
200K_1%
3410HZ
-6dB
Q=0.707
R216
C321
301K_1%
220PF
EQ_IN_R
R_EQ
LMV801
27
HPS
1
10UF_10V_1206
GAIN_SEL#
U22D
74HCT4066
RIGHT
27
HPS_PLUG
EQ_IN_R
27
3
U22C
74HCT4066
14
8
7
OUT4_R
82PF
R218
75K_1%
18299HZ
+6dB
Q=1.41
R_EQ
301K_1%
R205
1
2
127K_1%
C322
1
C331
R219
1
2
75K_1%
82PF
.1UF 14
RIGHTEQ
4
7
C594
1UF_0603
R203
+5V_AMP
1
C332
EQ_R_INPUT5
EQ_R_INPUT4
C329
R223
2K_1%
536HZ
+6dB
Q=1.41
200K_1%
C324
OUT5_R
220PF
R204
39.2K_1%
7646HZ
+1.45dB
Q=1.59
SUM_OUT
1
2
220K_1%
REF
R_EQ
R202
R214
IN2
OUT1_R
OUT1_R
1500PF
R183
140K_1%
C300
R210
14
EQ2_VREF
12
EQ_R_INPUT5
5V
10
OUT1
330PF
2
140K_1%
4.7UF_10V_0805
GND
EQ_R_INPUT4
EQ_R_INPUT3
C283
R184
1UF_0603
7646HZ
+1.45dB
Q=1.59
RIGHTEQ
C285
R_EQ 1
C323
220K_1%
+5V_AMP
EQ_R_INPUT2
OUT5_L
220PF
R416
39.2K_1%
EQ_R_INPUT3
R193
470PF
1500PF
U18
2
C310
R189
+5V_AMP
IN1
1
2
127K_1%
EQ_R_INPUT2
EQ_R_INPUT1
L_EQ
82PF
R422
75K_1%
RIGHTEQ
C282
EQ_R_INPUT1
2
OUT4_L
75K_1%
10
12
R442 1
0
301K_1%
C618
R420
RIGHT_EQ
C631
R423
27
R407
220PF
26
LEFT_EQ
301K_1%
LEFT
U22A
74HCT4066
14
11
7
10UF_10V_1206
R221
2K_1%
1
2
LMV801
26
EQ_L_INPUT5
C623
LEFTEQ
3410HZ
-6dB
Q=0.707
R415
200K_1%
R414
82PF
14
1
7
EQ_IN_L
.1UF
R417
200K_1%
2230HZ
-6dB
Q=0.72
OUT3_L
EQ_IN_L
HPS_PLUG
C292
C603
1UF_0603
13
16
C627
15
R419
2K_1%
470PF
R195
200K_1%
L_EQ
EQ_L_INPUT4
C636
SUM_OUT
OUT2_L
REF
OUT6
536HZ
+6dB
Q=1.41
IN6
R192
1
2
220K_1%
14
IN5
1500PF
R411
140K_1%
L_EQ
12
OUT1_L
EQ_L_INPUT5
10
EQ_L_INPUT4
R413
200K_1%
C633
330PF
1
2
OUT3
C642
330PF
220K_1%
C298
OUT2
IN3
EQ_L_INPUT3
R405
2
140K_1%
IN2
EQ_L_INPUT2
EQ1_VREF
OUT1_L
5V
IN1
1UF_0603
OUT1
GND
U39
EQ_L_INPUT1
C608
L_EQ
C614
LEFTEQ
EQ_L_INPUT3
R191
470PF
C595
4.7UF_10V_0805
C600
.1UF
C309
560K_1%
R406
1500PF
R436
2K_1%
EQ_L_INPUT2
2
C620
+5V_AMP
+5V_AMP
GAIN_SEL#
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
28
of
89
.1UF
ECAGND
19,34
+3V_ALW
C632
17,31 LPC_FRAME#
17,31 LPC_AD0
17,31 LPC_AD1
17,31 LPC_AD2
17,31 LPC_AD3
8
CLK_LPC_EC
EC_RST#
R458
@100K
R467
+3V_ALW
PC7
100K
CLK_LPC_EC
D
Q50
2N7002
2
G
S
17
EC_SCI#
EC_SCI#
31
RB751V
17
17
GATE20
GATE20 2
KBRST#
D29
34
RB751V 34
KBRST# 2
1
5
6
1
KSI[0..7]
KSO[0..15]
KSI[0..7]
KSO[0..15]
ADB[0..7] 30
KBA[0..18]
KBA[0..18] 30
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15
R468
@10
PS2_DATA
PS2_CLK
1
2
3
4
5
+5V_SW
C688
@15PF
10
9
8
7
6
KBD_DATA
KBD_CLK
TP_DATA
TP_CLK
12
RP21
+5V_SW
10P8R_10K
+3V_SW
RP26
GATE20
1
KBRST#
2
PM_THRM# 3
4
8
7
6
5
EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
8P4R-10K
+3V_ALW
+5V_ALW
RP30
FSEL#
SELIO#
FRD#
EC_SMI#
1
2
3
4
RP32
EC_SMD_2
EC_SMC_2
EC_SMD_1
EC_SMC_1
8
7
6
5
1
2
3
4
8P4R-10K
8
7
6
5
8P4R-10K
KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA
LID_SW#
34,36
KBD_CLK
34,36 KBD_DATA
34,36
PS2_CLK
34,36 PS2_DATA
33
TP_CLK
33
TP_DATA
30,33 LID_SW#
26 MIC_GAINLOW#
105
106
107
108
109
110
111
114
115
116
117
118
119
VBAT
AVCC
DA0
DA1
DA2
DA3
DA output
IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7
TINT
TCK
TDO
TDI
TMS
PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7
PWM
or
PORTA
168
169
170
171
172
175
176
1
173
174
47
SEL0
SEL1
CLK
20M
2
CRY2
R501
C719
1
120K
PC87591VPC
PCI_WAKE_UP#
1
2 PM_THRM#
D25 RB751V
124
125
126
127
128
131
132
133
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
PORTI
IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7
138
139
140
141
144
145
146
147
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
PORTJ-1
IOPJ0/RD
IOPJ1/WR0
150
151
FRD#
FWR#
SELIO
152
SELIO#
IOPD4
IOPD5
IOPD6
IOPD7
41
42
54
55
PORTK
PORTM
PORTL
.01UF
2
BATT_TEMP 40
TEMP_GMCH 35
LI/NIMH# 40,41
ECAGND
I/O Address
Index
Data
BADDR1-0
2E
2F
0 0
4E
4F
0 1
(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
1 0
Reserved
1 1
ACOFF
41
PM_BATLOW# 17,19
EC_ON
34
EC_LID_OUT# 17
PM_LANPWROK 17,25
TRIS
OBD
DEV
PROG
+3V_ALW
KBA1
PBTN_OUT# 17
EC_SMC_2 5,33,36
EC_SMD_2 5,33,36
FAN_SPEED 35
PM_THRM# 17
FAN_SPEED2 35
10K
R449
@10K
R507
(ENV1)
KBA2
(BADDR0)
KBA3
(BADDR1)10K
R506
KBA5
(SHBM)
10K
R505
PCI_WAKE_UP#
ACIN
18,38,40
RING#
32
PM_SLP_S3# 17
ON/OFFBTN# 33,36
PM_SLP_S5# 17
2
R541
1
100K
+3V_ALW
PM_CLKRUN# 17,19,22,23,31,37
U56
LPCPD#
5
2
2
R137
4
1
7SH08
1 PCI_RST#
4.7K
PM_SUS_STAT# 17,31
C14
.1UF
FRD#
FWR#
30
30
SELIO#
30
SCROLLED# 16
NUMLED# 16
CAPSLED# 16
IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13/BE0
IOPK6/A14/BE1
IOPK7/A15/CBRD
143
142
135
134
130
129
121
120
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1
113
112
104
103
48
KBA16
KBA17
KBA18
JP30
1
2
3
4
5
6
7
8
9
10
FSTCHG
1
2
3
4
5
6
7
8
9
10
EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
+3V_ALW
EC_VOL_UP#
EC_VOL_DW#
EN_WOL#
41
@96212-1011S
Title
Size
Document Number
Custom
Rev
2A
401200
Date:
B
ENV1
EC_VOL_UP# 26
EC_VOL_DW# 26
EN_WOL# 37
EC_SMC_1 30,40
EC_SMD_1 30,40
PCI_RST# 9,15,17,21,22,23,26,31,37
ECAGND
ENV0
IRE
PC7
IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7
PORTD-2
C641
1
10PF
2
10PF
EC_SMC_2
EC_SMD_2
LPCPD#
GND1
GND2
GND3
GND4
GND5
GND6
GND7
32.768KHZ
X4
2
C716
FSEL#
FSEL#
EC_SMC_1
EC_SMD_1
PCI_RST#
2
44
24
25
17
35
46
122
159
167
137
R498
1
30
R443
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
PORTJ-2
BATT_TEMP
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15
R528
@0
PORTE
AGND
148
149
155
156
3
4
27
28
.01UF
2
11
12
20
21
85
86
91
92
97
98
38
SYSON
32,38,39 EC_SUSP#
42
VR_ON
41
TRICKLE
42
VTT_ON
5,8 VTT_PWRGD#
15
ENBLT
15
BKOFF#
2
ICH_SWI#
IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO
C640
1
INVT_PWM 33
BEEP#
27
26
29
30
96
8,17 PM_SLP_S1#
EC_SMI#
19,22,23,24 G_RST#
17,19
CRY1
EC_SMI#
62
63
69
@0 70
75
76
17
32KX2
TEMP_GMCH
DAC_BRIG 33
EC_EN_FAN 35
EC_EN_FAN2 35
IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24/LRESET2
32KX1/32KCLKOUT
32
33
36
37
38
39
40
43
IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
PORTH
160
TEMP_GMCH
99
100
101
102
153
154
162
163
164
165
PS2 interface
CRY2
BATT_TEMP
PORTD-1
158
81
82
83
84
87
88
89
90
93
94
IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL/LRESET2
PORTC
CRY1
95
161
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
CLK_LPC_EC
AD Input
GA20/IOPB5
KBRST/IOPB6
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
C723
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
1UF_0603
U46
AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9
Host interface
IOPD3/ECSCI
71
72
73
74
77
78
79
80
ADB[0..7]
SERIRQ
LDRQ
LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK
LREST1
SMI
PWUREQ
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
D14
34
45
123
136
157
166
16
7
8
9
15
14
13
10
18
19
22
23
17,19,23,31 INT_SERIRQ
1000PF
1
2
BLM11A20
C637
L49
EC_AVCC
2
2
BLM11A20
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
L48
.1UF
2
22UF_10V_1206
22UF_10V_1206
+3V_ALW
+RTCVCC
EC_3VDD
C695
VDD
1
2
R488 @0
1
2
C697
R489 0
+3V_ALW
1000PF
C732
.1UF
C733
C742 C734
EC_AVCC
+3V_ALW
+3V_SW
.1UF
+3V_ALW
, 10, 2002
Sheet
E
29
of
89
INPUT
OUTPUT
+5V_ALW
C753
1
2
+5V_ALW
+3V_ALW
1
R521
100K
1394_PME#
BT_WAKE_UP
1
19
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
18
16
14
12
9
7
5
3
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
1G
2G
U57B
74LVC32
+3V_ALW
C747
1
2
.1UF
KBA2
SELIO#
M_SEN#
CONA#
C754
2
29,33
LID_SW#
BT_PRES#
+3V_ALW
1
19
1G
2G
R516
20K
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
18
16
14
12
9
7
5
3
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
1
2
3
4
10
U57D
74LVC32
8
7
6
5
+5V_ALW
1
C685
1
2
+3V_ALW
100K
2
R548
1394_PME# 1
.1UF
14
1
KBA4
AUD_PME#
PCM_PME#
MDM_PME#
LAN_PME#
13
7
R532
1
1
2
3
4
U43A
74LVC32
2
7
8P4R-100K
100K
2 BT_WAKE_UP
26
23
37
37
AUD_PME#
PCM_PME#
MDM_PME#
LAN_PME#
AUD_PME#
PCM_PME#
MDM_PME#
LAN_PME#
+3V_ALW
KBA5
U57C
74LVC32
1
19
1G
2G
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
18
16
14
12
9
7
5
3
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
74LVC244
11
1
CLK
CLR
1
R499
1
R508
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
VCC
WE*
A17
A14
A13
A8
A9
A11
OE*
A10
CE*
DQ7
DQ6
DQ5
DQ4
DQ3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
FWE#
C720 +
KBA17
KBA14
KBA13
KBA8 4.7UF_10V_0805
KBA9
KBA11
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
TPAD_LED# 33
1
1
1
1
DIS_ADJVOL 27
ADJVOL_UP/DW# 27
TP5
TP6
TP7
TP8
74HCT273
2
@0
2
0
+5V_ALW
+3V_ALW
C718
VCC_FLASH
KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
.1UF
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
A11
A9
A8
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
A6
A5
A4
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
@29F040_TSOP
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3
TSOP 8x20
+12V_SW
10
7
+3V_ALW
29F040/SST39VF040_PLCC
SELIO#
LARST#
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
10
14
9
2
4
6
8
11
13
15
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
20
100K
100K
100K
100K
VCC
2
2
2
2
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2
GND
1
1
1
1
D0
D1
D2
D3
D4
D5
D6
D7
U50
Q0 2
Q1 5
Q2 6
Q3 9
Q4 12
Q5 15
Q6 16
Q7 19
U42
VCC_FLASH
.1UF
U52
3
4
7
8
13
14
17
18
8
7
6
5
U38
+3V_ALW
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
3
SELIO#
RP22
74LVC244
C748
2
.1UF
+3V_ALW
+3V_ALW
+3V_ALW
C749
1
2
R586
R587
R588
R589
1
1
8P4R-100K
11
SELIO#
74HCT273
20
20
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
VCC
2
4
6
8
11
13
15
17
14
12
CLK
CLR
EC_GRST# 19
BT_RST# 20
BT_DETACH 20
BT_ON# 20
TP2
EC_MUTE 27
TP3
TP4
1UF_0603
U54
GND
33 USER_BTN1#
33 USER_BTN2#
33 USER_BTN3#
33 USER_BTN4#
33,36
SUSPBTN#
2 100K
2 100K
100K
2
KBA3
+3V_ALW
+3V_ALW
RP34
5
7
.1UF
R583 1
R584 1
R585 1
11
1
PCMRST#
U51
2
5
6
9
12
15
16
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
C726
D0
D1
D2
D3
D4
D5
D6
D7
74LVC244
+3V_ALW
+3V_ALW
LARST#
2
7
3
4
7
8
13
14
17
18
10
SELIO#
U57A
74LVC32
14
1
6
29
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
GND
14
4
KBA1
.1UF
U53
10
+3V_ALW
KBA[0..18]
10
33 TPAD_ON/OFF#
22
1394_PME#
20 BT_WAKE_UP
KBA[0..18]
VCC
2 100K
2
4
6
8
11
13
15
17
29
20
20
R582 1
M_SEN#
CONA#
BT_PRES#
16,36 M_SEN#
36
CONA#
20
BT_PRES#
ADB[0..7]
.1UF
VCC
+3V_ALW
ADB[0..7]
GND
2
1
29
VCC
C755
2
GND
U40
R206
1
.1UF
1
2
3
4
A0
A1
A2
GND
VCC
WC
SCL
SDA
8
7
6
5
29,40 EC_SMC_1
29,40 EC_SMD_1
4
100K
U55
R526
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
R515
NM24C164
100K
@SST39VF040_TSOP
FRD#
29
FSEL#
29
100K
R209
+3V_ALW
U43B
74LVC32
FWE#
100K
14
4
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
2
G
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Q27
2N7002
3
EC_FLASH# 18
5
7
ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3
FWR#
29
TSOP 8x14
100K
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
VCC_FLASH
R517
A11
A9
A8
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
A6
A5
A4
C738
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
+5V_ALW
1
+5V_ALW
KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
30
of
89
14
39
63
88
+3V_SW
+3V_SW
17,29
17,29
17,29
17,29
R512
100K
1
R511
2
@0
8 CLK_LPC_SIO
9,15,17,21,22,23,26,29,37 PCI_RST#
17,29 LPC_FRAME#
17
LPC_DRQ#1
CLK_SIO14
LCLK
LRESET#
LFRAME#
LDRQ#
LPCPD#
CLKRUN#
SERIRQ
SMI#
20
CLKIN
21
22
23
24
25
26
27
28
29
30
31
32
33
34
72
73
84
DSKCHG#
HDSEL#
RDATA#
WP#
TRK0#
WGATE#
WDATA#
SETP#
DIR#
DR0#
MTR0#
INDEX#
DENSEL
DRATE0/IRSL2
DR1#
MTR1#/DRATE0
MTR1#
DSKCHG#
HDSEL#
RDATA#
WP #
TRACK0 #
WGATE#
WDA TA#
STEP#
FDDIR#
DRV0#
MTR0#
INDEX#
3MODE#
DSKCHG#
HDSEL#
RDATA#
WP #
TRACK0 #
WGATE#
WDA TA#
STEP#
FDDIR#
DRV0#
MTR0#
INDEX#
3MODE#
R504
@33
R503
@33
8
9
12
11
7
6
10
19
PC87391
C721
1
2
3
4
65
82
83
85
86
87
90
91
92
93
94
95
96
97
98
99
100
C722
@15P F
@15PF
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Signal
Pin #
Description
BADDR
61
52
50
48
46
45
44
43
42
PNF
SLCT/WGATE#
PE/WDATA#
BUSY_WAIT#/MTR1#
ACK#/DR1#
SLIN#_ASTRB#/STEP#
INIT#/DIR#
ERR#/HDSEL#
AFD#_DSTRB#/DENSEL
STB#_WRITE#
35
36
37
40
41
47
49
51
53
54
DCD1#
DSR1#
SIN1
RTS1#/TEST
SOUT1/XCNF0
CTS1#
DTR1#_BOUT1/BADDR
RI1#
55
56
57
58
59
60
61
62
DCD2#
DSR2#
SIN2
RTS2#
SOUT2
CTS2#
DTR2#_BOUT2
RI2#
74
75
76
77
78
79
80
81
IRTX
IRRX1
IRRX2_IRSL0
IRSL1
IRSL2/DR1#
IRSL3/PWUREQ#
70
69
68
67
71
66
WDO#
PC8739 1
PD0/INDEX#
PD1/TRK0#
PD2/WP#
PD3/RDATA#
PD4/DSKCHG#
PD5/MSEN0
PD6/DRATE0
PD7/MSEN1
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
R479
100K
2
1
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTSLCTIN #
LPTINIT#
LPTERR #
LPTAFD #
LPTSTB#
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
+3V_SW
LPTSLCT 32,36
LPTPE
32,36
LPTBUSY 32,36
LPTACK# 32,36
LPTSLCTIN # 32,36
LPTINIT# 32,36
LPTERR# 32,36
LPTAFD # 32,36
LPTSTB# 32,36
DCDA#
DSRA#
RXDA
RTSA#
TXDA
CTSA#
DTRA#
RIA#
RP24
8
7
6
5
2
R469
32,36
32,36
32,36
32,36
32,36
32,36
32,36
32,36
DCDA#
DSRA#
RXDA
RTSA#
TXDA
CTSA#
DTRA#
RIA#
8P4R_10 0K
1
2
3
4
32
32
32
32
32
32
32
32
+3V_SW
1
100K
IRTXOUT 32
IRRX
32
IRMODE 32
VSS
VSS
VSS
VSS
33
33
33
33
33
33
33
33
33
16
33
33
33
CLK_SIO14
1
CLK_LPC_SIO
C
CLK_LPC_SIO
PCI_RST#
LPC_FRAME#
LPC_DRQ#1
C671
1000PF_ 50V
2
.1UF
C670
LAD0
LAD1
LAD2
LAD3
C669
4.7UF_10V_0805
.1UF
C668
15
16
17
18
PM_CLKRUN#
SERIRQ
1
2
R509
@10K
CLK_SIO14
17,19,22,23,29,37 PM_CLKRUN#
17,19,23,29 INT_SERIRQ
+3V_SW
VDD_391
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
13
38
64
89
17,29 PM_SUS_STAT#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
VDD
VDD
VDD
VDD
U47
DTRA#
1
R450
+3V_SW
2
@10K
"1": 4E~4F
TEST
58
90, 4, 59
Function
No BIOS
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
5
Size
Custom
Date:
Document Number
Rev
2A
401200
, 10, 2002
Sheet
1
31
of
89
PARALLEL
+5V_PRN
+5V_PRN
1
R253
2
33
LPTSLCTIN#_1
D4
2
+5V_SW
LPTINIT#_1
1
RB420D
C364
4.7UF_10V_0805
R2
2.7K
+5V_SW
C13
.1UF
2
31,36 LPTSLCTIN#
2
33
1
R249
LPTINIT#
31,36
RP12
+5V_SW
1
2
3
4
5
10
9
8
7
6
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
10P8R_2.7K
+5V_SW
31,36
31,36
LPTSTB#
LPTAFD#
31,36
LPTERR#
R3
33
1
2
1
2
R252 33
LPTSTB#
LPTAFD#
FD0
LPTERR#
FD1
LPTINIT#_1
FD2
LPTSLCTIN#_1
FD3
RP10
FD0
FD1
FD2
FD3
1
2
3
4
5
+5V_SW
10
9
8
7
6
FD7
FD6
FD5
FD4
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
FD5
FD6
RP11
9
10
11
12
13
14
15
16
CP12
w=10mils
AFD#/3M#
FD4
10P8R_2.7K
LPD3
LPD2
LPD1
LPD0
LPD7
LPD6
LPD5
LPD4
JP1
LPTCN-25
LPTSLCTIN#_1
LPTINIT#_1
LPTERR#
AFD#/3M#
8
7
6
5
4
3
2
1
FD3
FD2
FD1
FD0
FD7
FD6
FD5
FD4
FD7
LPTACK#
31,36
LPTBUSY
31,36
LPTPE
31,36
LPTSLCT
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
1
2
3
4
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
1
2
3
4
8P4C_220PF
CP10
8
7
6
5
FD0
FD1
FD2
FD3
1
2
3
4
8P4C_220PF
CP1
8
7
6
5
FD4
FD5
FD6
FD7
1
2
3
4
8P4C_220PF
CP11
8
7
6
5
LPD[0..7]
LPD[0..7]
8
7
6
5
8P4C_220PF
28
29
16P8R_33
31,36
AFD#/3M#
LPTERR#
LPTINIT#_1
LPTSLCTIN#_1
31,36
SERIAL
+5V_ALW
U1
LED_C
RXD
VCC
GND
LED_A
TXD
SD
MODE
1
3
5
7
37
T = 12mil IRTXOUT
T = 12mil IRMODE
T = 12mil IRRX
26
2
1
23
PCM_RI#
RB751V
D2
2
IRTXOUT 31
IRMODE 31
IRRX
31
MODEM_RI#
RB751V
29
RING#
1
C3
@.1UF
D3
2
4
6
8
C372
D@.1UF
1
2
28
100K
T = 20mil
T = 20mil
C373
D@.1UF
C9
@10UF_10V_1206
R251
C4
@22UF_10V_1206
+3V_ALW
+
@TFDU6101E
2
G
DTRA#
RTSA#
TXDA
CTSA#
RIA#
RXDA
DCDA#
DSRA#
29,38,39 EC_SUSP#
24
1
C1+
C1C2+
U25
D@MAX3243
V+
27
C375
D@.47UF_16V_0805
1
2
V-
C362
D@.47UF_16V_0805
C2TIN1
TIN2
TIN3
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUTB2
23
FORCEON
22
FORCEOFF#
TOUT1
TOUT2
TOUT3
RIN1
RIN2
RIN3
RIN4
RIN5
9
10
11
4
5
6
7
8
INVLD#
21
GND
25
DTR1#
RTS1#
TXD1
CTS1#
RI1#
RXD1
DCD1#
DSR1#
DTR1#
RTS1#
TXD1
CTS1#
RI1#
RXD1
DCD1#
DSR1#
36
36
36
36
36
36
36
36
CP2
TXD1
CTS1#
DTR1#
RI1#
1
2
3
4
DCD1#
DSR1#
RXD1
RTS1#
1
2
3
4
Q4
D@2N7002 S
31
31
31
31
31
31
31
31
C363
D@.47UF_16V_08052
14
13
12
19
RIA#
18
17
16
15
RIA0
20
VCC
FIR Module
T = 20mil
C1
@10UF_10V_1206
R1
@5.6_1206
+3V_SW
+5V_SW
8
7
6
5
D@8P4C_220PF
CP3
8
7
6
5
D@8P4C_220PF
R581
100K
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
76
of
89
PARALLEL
+5V_PRN
+5V_PRN
1
R253
2
33
LPTSLCTIN#_1
D4
2
+5V_SW
LPTINIT#_1
1
RB420D
C364
4.7UF_10V_0805
R2
2.7K
+5V_SW
C13
.1UF
2
31,36 LPTSLCTIN#
2
33
1
R249
LPTINIT#
31,36
RP12
+5V_SW
1
2
3
4
5
10
9
8
7
6
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
10P8R_2.7K
+5V_SW
31,36
31,36
LPTSTB#
LPTAFD#
31,36
LPTERR#
R3
33
1
2
1
2
R252 33
LPTSTB#
LPTAFD#
FD0
LPTERR#
FD1
LPTINIT#_1
FD2
LPTSLCTIN#_1
FD3
RP10
FD0
FD1
FD2
FD3
1
2
3
4
5
+5V_SW
10
9
8
7
6
FD7
FD6
FD5
FD4
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
FD5
FD6
RP11
9
10
11
12
13
14
15
16
CP12
w=10mils
AFD#/3M#
FD4
10P8R_2.7K
LPD3
LPD2
LPD1
LPD0
LPD7
LPD6
LPD5
LPD4
JP1
LPTCN-25
LPTSLCTIN#_1
LPTINIT#_1
LPTERR#
AFD#/3M#
8
7
6
5
4
3
2
1
FD3
FD2
FD1
FD0
FD7
FD6
FD5
FD4
FD7
LPTACK#
31,36
LPTBUSY
31,36
LPTPE
31,36
LPTSLCT
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
1
2
3
4
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
1
2
3
4
8P4C_220PF
CP10
8
7
6
5
FD0
FD1
FD2
FD3
1
2
3
4
8P4C_220PF
CP1
8
7
6
5
FD4
FD5
FD6
FD7
1
2
3
4
8P4C_220PF
CP11
8
7
6
5
LPD[0..7]
LPD[0..7]
8
7
6
5
8P4C_220PF
28
29
16P8R_33
31,36
AFD#/3M#
LPTERR#
LPTINIT#_1
LPTSLCTIN#_1
31,36
SERIAL
+5V_ALW
U1
LED_C
RXD
VCC
GND
LED_A
TXD
SD
MODE
1
3
5
7
37
T = 12mil IRTXOUT
T = 12mil IRMODE
T = 12mil IRRX
26
2
1
23
PCM_RI#
RB751V
D2
2
IRTXOUT 31
IRMODE 31
IRRX
31
MODEM_RI#
RB751V
29
RING#
1
C3
@.1UF
D3
2
4
6
8
C372
D@.1UF
1
2
28
100K
T = 20mil
T = 20mil
C373
D@.1UF
C9
@10UF_10V_1206
R251
C4
@22UF_10V_1206
+3V_ALW
+
@TFDU6101E
2
G
DTRA#
RTSA#
TXDA
CTSA#
RIA#
RXDA
DCDA#
DSRA#
29,38,39 EC_SUSP#
24
1
C1+
C1C2+
U25
D@MAX3243
V+
27
C375
D@.47UF_16V_0805
1
2
V-
C362
D@.47UF_16V_0805
C2TIN1
TIN2
TIN3
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUTB2
23
FORCEON
22
FORCEOFF#
TOUT1
TOUT2
TOUT3
RIN1
RIN2
RIN3
RIN4
RIN5
9
10
11
4
5
6
7
8
INVLD#
21
GND
25
DTR1#
RTS1#
TXD1
CTS1#
RI1#
RXD1
DCD1#
DSR1#
DTR1#
RTS1#
TXD1
CTS1#
RI1#
RXD1
DCD1#
DSR1#
36
36
36
36
36
36
36
36
CP2
TXD1
CTS1#
DTR1#
RI1#
1
2
3
4
DCD1#
DSR1#
RXD1
RTS1#
1
2
3
4
Q4
D@2N7002 S
31
31
31
31
31
31
31
31
C363
D@.47UF_16V_08052
14
13
12
19
RIA#
18
17
16
15
RIA0
20
VCC
FIR Module
T = 20mil
C1
@10UF_10V_1206
R1
@5.6_1206
+3V_SW
+5V_SW
8
7
6
5
D@8P4C_220PF
CP3
8
7
6
5
D@8P4C_220PF
R581
100K
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
32
of
89
+5V_SW
JP17
FDD Connector
30 TPAD_ON/OFF#
30
TPAD_LED#
WP#
31
RDATA#
31
HDSEL#
WP#
RDATA#
HDSEL#
C339
1UF_0603
C346
.1UF
JP19
27
27
27
27
WGATE#
TRACK0#
RP9
WP#
RDATA#
HDSEL#
3MODE#
DSKCHG#
INDEX#
6
7
8
9
10
+5V_SW
5
4
3
2
1
1
2
3
4
SPKR+
SPKRSPKL+
SPKL-
+5V_SW
C279
220PF
RDATA#
WP#
TRACK0#
C271
220PF
C266
220PF
1
2
3
4
HEADER 4
TRACK0#
31
C348
10UF_10V_1206
C258
220PF
31
TRACK0#
C342
1000PF
WGATE#
WDATA#
WGATE#
FDDIR#
3MODE#
STEP#
WDATA#
+5V_SW
MTR0#
WDATA#
HEADER 8
22PF
22PF
31
1
2
3
4
5
6
7
8
FDDIR#
3MODE#
STEP#
FDDIR#
3MODE#
STEP#
C558
31
31
31
MTR0#
MTR0#
DSKCHG#
31
C554
Layout note :
Place capacitors near Floppy connector .
DRV05V#
DSKCHG#
DSKCHG#
TP_DATA
TP_CLK
INDEX#
29
29
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
31
31
DRV05V#
DRV05V#
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
16
INDEX#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
31
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
INDEX#
+5V_SW
JP20
+5V_SW
1
1
2
3
4
5
6
7
8
10P8R_1K
FDD Connector
2
RP35
FDDIR#
WDATA#
HDSEL#
+5V_SW
10P8R_1K
JP24
1
2
3
4
5
6
27,36 LINE_OUT_PLUG
27,36 LINEOUT_R
27,36 LINEOUT_L
C735
220PF
5
4
3
2
1
C736
220PF
C737
220PF
1
2
3
4
5
6
HEADER 6
+5V_SW
6
7
8
9
10
DRV05V#
MTR0#
STEP#
WGATE#
+5V_SW
JP9
16
16
16
SCRLED5V#
NUMLED5V#
CAPSLED5V#
DRV05V#
FDDLED#
16
16
CDLED#
HDDLED#
27
INT_MIC
15
29
DISPOFF#
DAC_BRIG
29
INVT_PWM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
C386
3
+5V_ALW
3
+5V_SW
.1UF
LID_SW_CON#
EC_PWR_ON#
ON/OFFBTN# 29,36
SUSPBTN# 30,36
USER_BTN1# 30
USER_BTN2# 30
USER_BTN3# 30
USER_BTN4# 30
EC_PWR_ON# 34,36,41
EC_SMC_2 5,29,36
EC_SMD_2 5,29,36
D48
1
D49
1
RB751V
2
LID_SW# 29,30
RB751V
2
INTMICOFF# 27,36
HEADER 40
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
33
of
89
+3V_SW
CP4
1
R573
+3V_SW
U64
@47K
2
NC
NC
GND
C770
2
1
R574
VCC
KSI1
KSI6
5
4
KSI4
GND
@NC7S14
5
KSO0
@NC7S14
@.47UF_0603
KSI3
KSO1
+3V_SW
U13
8P4C_220PF
15
15
19
21
21
KSO10
23
23
D9
1
17,42 VGATE
1
2
3
4
8
7
6
5
KSI5
8P4C_220PF
KSI2
8
10
12
12
14
14
KSO4
16
16
KSO8
18
18
KSO3
20
20
KSO13
22
22
KSO11
24
24
KSO15
19
KSO9
KSO0
KSO1
KSO5
KSO9
10
17
KSO14
KSI7
KSO5
CP7
KSI4
KSI2
KSI3
KSI0
KSI0
1
2
3
4
8
7
6
5
8P4C_220PF
CP8
KSO2
KSO4
KSO7
KSO8
1
2
3
4
8
7
6
5
8P4C_220PF
PM_PWROK 17
CP9
INT_KB_CONN.
MAX809SEUR
SOT23
GND
1
C196
.1UF
D8
RB751V
RESET#
13
KSO7
17
11
13
KSO12
R111
100K
11
KSO2
KSO6
+3V_SW
VCC
29
8
7
6
5
CP6
2
@330K
KSI[0..7]
1
2
3
4
JP21
VCC
KSI[0..7]
+3V_SW
U65
1
2
KSI1
KSI7
KSI6
KSI5
INT_KBD CONN.
KSO[0..15]
RB751V
2
KSO6
KSO3
KSO12
KSO13
KSO[0..15] 29
1
2
3
4
8
7
6
5
8P4C_220PF
CP5
17
D40
1
WARM_RST#
KSO14
KSO11
KSO10
KSO15
RB751V
2
1
2
3
4
8
7
6
5
8P4C_220PF
Reset Button
1
+3V_ALW
D36
PS2 CONN.
1N4148
R519 2
33
EC_RST# 19,29
Q2
@SM05
C744
SW2
C10
C12
220PF
220PF
2 2
R314
22K
C7
220PF
220PF
E
Q38 22K
DTC124EK
C6
Q1
@SM05
EC_ON
8
7
D22
RLZ20A
2
2
29
22K
B
6
8
7
5
C358
4.7UF_10V_0805
1
C
4.7K
C484
1000PF
29,36 KBD_CLK
R316
L3
1
2
FCM1608C-121T
1
2
L4
FCM1608C-121T
4
2
1
3
29,36 KBD_DATA
JP3
KBD/PS2_6
EC_PWR_ON# 33,36,41
+3V_ALW
Power ON
+5V_SW
1
2
29,36 PS2_CLK
FCM1608C-121T
1
2
29,36 PS2_DATA
L5
KB_VCC
KB_AS
FCM1608C-121T
F2
L34
W=40mils
W=40mils
1
2
FBM-11-451616-800T
4516
POLYSWITCH_1A
C355
C356
1000PF
220PF
1
L6
.01UF_0603
RESET BTN
D
Q39
@2N7002
2
G
3
S
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
78
of
89
+3V_SW
CP4
1
R573
+3V_SW
U64
@47K
2
NC
NC
GND
C770
2
1
R574
VCC
KSI1
KSI6
5
4
KSI4
GND
@NC7S14
5
KSO0
@NC7S14
@.47UF_0603
KSI3
KSO1
+3V_SW
U13
8P4C_220PF
15
15
19
21
21
KSO10
23
23
D9
1
17,42 VGATE
1
2
3
4
8
7
6
5
KSI5
8P4C_220PF
KSI2
8
10
12
12
14
14
KSO4
16
16
KSO8
18
18
KSO3
20
20
KSO13
22
22
KSO11
24
24
KSO15
19
KSO9
KSO0
KSO1
KSO5
KSO9
10
17
KSO14
KSI7
KSO5
CP7
KSI4
KSI2
KSI3
KSI0
KSI0
1
2
3
4
8
7
6
5
8P4C_220PF
CP8
KSO2
KSO4
KSO7
KSO8
1
2
3
4
8
7
6
5
8P4C_220PF
PM_PWROK 17
CP9
INT_KB_CONN.
MAX809SEUR
SOT23
GND
1
C196
.1UF
D8
RB751V
RESET#
13
KSO7
17
11
13
KSO12
R111
100K
11
KSO2
KSO6
+3V_SW
VCC
29
8
7
6
5
CP6
2
@330K
KSI[0..7]
1
2
3
4
JP21
VCC
KSI[0..7]
+3V_SW
U65
1
2
KSI1
KSI7
KSI6
KSI5
INT_KBD CONN.
KSO[0..15]
RB751V
2
KSO6
KSO3
KSO12
KSO13
KSO[0..15] 29
1
2
3
4
8
7
6
5
8P4C_220PF
CP5
17
D40
1
WARM_RST#
KSO14
KSO11
KSO10
KSO15
RB751V
2
1
2
3
4
8
7
6
5
8P4C_220PF
Reset Button
1
+3V_ALW
D36
PS2 CONN.
1N4148
R519 2
33
EC_RST# 19,29
Q2
@SM05
C744
SW2
C10
C12
220PF
220PF
2 2
R314
22K
C7
220PF
220PF
E
Q38 22K
DTC124EK
C6
Q1
@SM05
EC_ON
8
7
D22
RLZ20A
2
2
29
22K
B
6
8
7
5
C358
4.7UF_10V_0805
1
C
4.7K
C484
1000PF
29,36 KBD_CLK
R316
L3
1
2
FCM1608C-121T
1
2
L4
FCM1608C-121T
4
2
1
3
29,36 KBD_DATA
JP3
KBD/PS2_6
EC_PWR_ON# 33,36,41
+3V_ALW
Power ON
+5V_SW
1
2
29,36 PS2_CLK
FCM1608C-121T
1
2
29,36 PS2_DATA
L5
KB_VCC
KB_AS
FCM1608C-121T
F2
L34
W=40mils
W=40mils
1
2
FBM-11-451616-800T
4516
POLYSWITCH_1A
C355
C356
1000PF
220PF
1
L6
.01UF_0603
RESET BTN
D
Q39
@2N7002
2
G
3
S
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
34
of
89
FAN Connector
R75
10M_0603
+12V_SW
16.9K_1%
1
0
C107
R78
MAINPWON 39
100K_1%
2
.22UF_0805
1
LM393
CON3
R70
C129
.1UF
1
D7
3
1SS355
Q21
1
2SA1036K
1
2
3
5V_FAN1
C177
JP16
U11A
1
D6
1SS355
1
2
29 EC_EN_FAN
R87
2
100K
3
+5V_SW
1
R83
47K_1%
R125
100K
R510
D10
1N4148
1
1M
U14A
LMC6482IM
R118
Q20
FMMT619
2
100K
R117
+5V_SW
2.15K_1%
R140
3.48K
10UF_10V_1206
100K_1%
R69
C222
+3V_SW
+5V_SW
VL
3M
R122
R121
VL
C200 1UF_0603
1
2
R71
Thermistor_0805
10UF_10V_1206
29 FAN_SPEED
Layout note :
Place a copper ground plan from CPU and place the
Thermistor upper this ground plan.
+3V_ALW
C276 1UF_0603
1
2
3M
R164
R162 10M_0603
R76
+12V_SW
2.15K_1%
+3V_SW
1
1SS355
D18
C431
2
R80
CON3
1SS355
Thermistor_0805
3
Q23
1
2SA1036K
1
2
3
5V_FAN2
1
2
29 EC_EN_FAN2
JP14
1N4148
+5V_SW
1
R77
3
D11
R163
100K
100K
D17
2
U14B
LMC6482IM
TEMP_GMCH 29
R276
Q36
FMMT619
2
R153
3.48K
1M
C277
10UF_10V_1206
R168
+5V_SW
6
R170 100K
+5V_SW
Layout note :
10UF_10V_1206
29 FAN_SPEED2
4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
1
35
of
89
EMI Finger
PAD1
@EMIPAD_PS-4
PAD2
EMIPAD_PS-4
PAD3
EMIPAD_PS-4
Unused IC parts.
PAD4
EMIPAD_PS-4
PAD5
EMIPAD_PS-4
PAD6
EMIPAD_PS-4
PAD7
EMIPAD_PS-4
14
U11B
LM393
7
13
12
+12V_ALW
+3V_ALW
U43C
74LVC32
14
9
+3V_ALW
U43D
74LVC32
14
12
8
10
7
U36F
74LVC14
+3V_ALW
VL
11
13
7
+3V_ALW
+3V_ALW
11,16 DAC_BLUE
27 INTSPKOFF#
27,33 LINE_OUT_PLUG
27,33 INTMICOFF#
LINEOUT_L
LINEOUT_R
27,33 LINEOUT_L
27,33 LINEOUT_R
26 DOCK_LIN_L
26 DOCK_LIN_R
27
DOCK_MIC
1
2
ON/OFFBTN# 29,33
EC_PWR_ON# 33,34,41
H7
H1
H12
H6
H3
H2
H11
H5
H13
31,32
31,32
31,32
31,32
H10
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
Screw Hole
@DAN202U
H9
H4
H8
H16
H15
H17
H14
+5V_SW
DAC_V
DAC_H
16
16
M_SEN# 16,30
DDC_MD2
5VDDCCL 16
5VDDCDA 16
+5V_ALW
CONA#
NPTH
USB_OC#2 18
USB_OC#3 18
Fiducial Mark
USB_PP2 18
USB_PN2 18
FD4
FD6
11,16 DAC_GREEN
11,16 DAC_RED
3
D12
3
COMPS
SPR_ON/OFFBTN#
LPD0
LPD2
LPD4
LPD6
15,16
32
32
32
32
31,32
LPTSTB#
31,32
LPTAFD#
31,32 LPTERR#
31,32
LPTINIT#
31,32 LPTSLCTIN#
DTR1#
CTS1#
RTS1#
RI1#
LPD1
LPD3
LPD5
LPD7
DTR1#
CTS1#
RTS1#
RI1#
DCD1#
DSR1#
TXD1
RXD1
EC_SMD_2 5,29,33
EC_SMC_2 5,29,33
SUSPBTN# 30,33
DCD1#
DSR1#
TXD1
RXD1
32
32
32
32
@1000PF
LAN_RX+
LAN_RX-
R11
2
VIN
@FBM-L11-322513-201LMAT
25
25
@100PF
C31
LAN_TX+
LAN_TX-
1
C30
25
25
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
101
102
102
103
103
104
104
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
29,34 KBD_DATA
29,34 KBD_CLK
29,34
PS2_CLK
29,34 PS2_DATA
NPTH
FD5
FD2
FD3
FD1
1
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
CF17
CF18
CF19
CF20
1
1
1
1
USB_PP3 18
USB_PN3 18
CONA#
30
CF14
CF12
CF15
CF16
CF13
1
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
@DOCKING 100
CF8
1
CF3
CF2
CF7
CF5
1
31,32
C19
@100PF
LPD[0..7]
LPD[0..7]
CF4
CF9
CF6
C23
@100PF
CF1
1
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
LINEOUT_L
LINEOUT_R
4
CF11
1
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
80
of
89
EMI Finger
PAD1
@EMIPAD_PS-4
PAD2
EMIPAD_PS-4
PAD3
EMIPAD_PS-4
Unused IC parts.
PAD4
EMIPAD_PS-4
PAD5
EMIPAD_PS-4
PAD6
EMIPAD_PS-4
PAD7
EMIPAD_PS-4
14
U11B
LM393
7
13
12
+12V_ALW
+3V_ALW
U43C
74LVC32
14
9
+3V_ALW
U43D
74LVC32
14
12
8
10
7
U36F
74LVC14
+3V_ALW
VL
11
13
7
+3V_ALW
+3V_ALW
11,16 DAC_BLUE
27 INTSPKOFF#
27,33 LINE_OUT_PLUG
27,33 INTMICOFF#
LINEOUT_L
LINEOUT_R
27,33 LINEOUT_L
27,33 LINEOUT_R
26 DOCK_LIN_L
26 DOCK_LIN_R
27
DOCK_MIC
1
2
EC_PWR_ON# 33,34,41
+5V_SW
L54
1
1
M_SEN# 16,30
L55
DDC_MD2
5VDDCCL 16
5VDDCDA 16
+5V_ALW
CONA#
@FBM-L10-160808-301
2
DAC_VSYNC 11,16
2
DAC_HSYNC 11,16
H7
H1
H12
H6
H3
H2
H11
H5
H13
31,32
31,32
31,32
31,32
H10
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
Screw Hole
@DAN202U
H9
H4
H8
H16
H15
H17
H14
3
@FBM-L10-160808-301
NPTH
USB_OC#2 18
USB_OC#3 18
Fiducial Mark
USB_PP2 18
USB_PN2 18
FD4
FD6
11,16 DAC_GREEN
ON/OFFBTN# 29,33
11,16 DAC_RED
3
1
3
COMPS
D12
SPR_ON/OFFBTN#
LPD0
LPD2
LPD4
LPD6
15,16
32
32
32
32
31,32
LPTSTB#
31,32
LPTAFD#
31,32 LPTERR#
31,32
LPTINIT#
31,32 LPTSLCTIN#
DTR1#
CTS1#
RTS1#
RI1#
LPD1
LPD3
LPD5
LPD7
DTR1#
CTS1#
RTS1#
RI1#
DCD1#
DSR1#
TXD1
RXD1
EC_SMD_2 5,29,33
EC_SMC_2 5,29,33
SUSPBTN# 30,33
DCD1#
DSR1#
TXD1
RXD1
32
32
32
32
@1000PF
LAN_RX+
LAN_RX-
R11
2
VIN
@FBM-L11-322513-201LMAT
25
25
@100PF
C31
LAN_TX+
LAN_TX-
1
C30
25
25
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
101
102
102
103
103
104
104
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
29,34 KBD_DATA
29,34 KBD_CLK
29,34
PS2_CLK
29,34 PS2_DATA
NPTH
FD5
FD2
FD3
FD1
1
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
CF17
CF18
CF19
CF20
1
1
1
1
USB_PP3 18
USB_PN3 18
CONA#
30
CF14
CF12
CF15
CF16
CF13
1
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
@DOCKING 100
CF8
1
CF3
CF2
CF7
CF5
1
31,32
C19
@100PF
LPD[0..7]
LPD[0..7]
CF4
CF9
CF6
C23
@100PF
CF1
1
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
LINEOUT_L
LINEOUT_R
4
CF11
1
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
36
of
89
Or use SI2305DS.
+3V_ALW
C725
C741
1
1
+3VAUX
Q57
SI2301DS
1UF_0603
2
1UF_0603
JP31
PCI_AD3
W=30mils
PCI_AD1
26
26
26
MD_SYNC
MD_SDATAI
MD_BITCLK
MD_BITCLK
R492
12
@10
C707
26 MOD_AUDIO_MON
26
MOD_MIC
32
MODEM_RI#
+5V_SW
MOD_AUDIO_MON
W=30mils
@15PF
17,22,23,26
17,22,23,26
17,19,22,23,26
17,22,23,26
17,22,23,26
C730
PCI_FRAME# 17,19,22,23,26
PCI_TRDY# 17,19,22,23,26
PCI_STOP# 17,19,22,23,26
4.7UF_10V_0805
C731
.1UF
C727
1000PF
PCI_DEVSEL# 17,19,22,23,26
PCI_AD15 17,22,23,26
PCI_AD13 17,22,23,26
PCI_AD11 17,22,23,26
+3V_SW
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
17,22,23,26
17,22,23,26
17,22,23,26
17,22,23,26
PCI_AD9 17,22,23,26
PCI_C/BE#0 17,22,23,26
C739
4.7UF_10V_0805
C743
.1UF
C698
128
PCI_AD22
PCI_AD20
PCI_PAR
PCI_AD18
PCI_AD16
128
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
+5V_SW
IDSEL : AD18
127
PCI_AD9
PCI_C/BE#0
PCI_AD28 17,22,23,26
PCI_AD26 17,22,23,26
PCI_AD24 17,22,23,26
127
PCI_AD15
PCI_AD13
PCI_AD11
1000PF
PCI_AD5
PCI_DEVSEL#
+3V_SW
.1UF
C699
1000PF
C706
4.7UF_10V_0805
17,22,23,26 PCI_AD3
+5V_SW
17,22,23,26 PCI_AD1
PCI_FRAME#
PCI_TRDY#
PCI_STOP#
17,22,23,26 PCI_AD5
PCI_AD8
PCI_AD7
PCI_AD22
PCI_AD20
PCI_PAR
PCI_AD18
PCI_AD16
R524
0_1206
17,22,23,26 PCI_AD8
17,22,23,26 PCI_AD7
PCI_AD12
PCI_AD10
2
100
100PF
C752
MD_SDATAO 26
+3VAUX
MD_RST# 26
MOD_AUDIO_MON
C740
W=40mils
4.7UF_10V_0805
+3VAUX
C729
17,22,23,26 PCI_AD12
17,22,23,26 PCI_AD10
PCI_PERR#
PCI_C/BE#1
PCI_AD14
1
R471
PCI_AD28
PCI_AD26
PCI_AD24
PCI_AD18
MDM_PME# 30
LAN_PME# 30
PCI_AD30 17,22,23,26
C745
.1UF
C728
1000PF
17,19,22,23 PCI_PERR#
17,22,23,26 PCI_C/BE#1
17,22,23,26 PCI_AD14
PM_CLKRUN#
PCI_SERR#
MDM_PME#
LAN_PME#
PCI_AD30
PCI_GNT#1 17
17,19,22,23,29,31 PM_CLKRUN#
17,19,22,23 PCI_SERR#
PCI_AD17
PCI_C/BE#2
PCI_IRDY#
1
PCI_GNT#1
17,22,23,26 PCI_AD17
17,22,23,26 PCI_C/BE#2
17,19,22,23,26 PCI_IRDY#
PCI_AD21
PCI_AD19
W=40mils
@15PF
2
100
PCI_RST# 9,15,17,21,22,23,26,29,31
17,22,23,26 PCI_AD21
17,22,23,26 PCI_AD19
C704
1
R494
1 0
@10
PCI_AD27
PCI_AD25
PCI_AD22
PCI_C/BE#3
PCI_AD23
MINI_RST#
R477 2
+5V_SW
INT_PIRQC# 17,19
PCI_GNT#4 17
+3VAUX
IDSEL : AD22
17,22,23,26 PCI_C/BE#3
17,22,23,26 PCI_AD23
PCI_AD31
PCI_AD29
INT_PIRQC#
PCI_GNT#4
17,22,23,26 PCI_AD27
17,22,23,26 PCI_AD25
R484
2
PCI_REQ#1
LED2_YELN 25
W=30mils
1
2
R486
0
W=40mils
17,22,23,26 PCI_AD31
17,22,23,26 PCI_AD29
CLK_MINIPCI
LAN RESERVED
LED2_YELN
CLK_MINIPCI
2
0
EN_WOL#
17,19 PCI_REQ#1
1
R481
29
CLK_MINIPCI
12
C711
100PF
1000PF
17,19 PCI_REQ#4
INT_PIRQD#
W=40mils
PCI_REQ#4
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
C710
17,19,26 INT_PIRQD#
1
+3V_SW
2 R483 1
0_1206
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
LED1_GRNN
25 LED1_GRNN
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
LAN RESERVED
RING
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
TIP
Mini-PCI SLOT
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
37
of
89
+3V
+1.5V_ALW
+1.5V_SW
C57
.01UF_25V_0805
2
G
SUSP
SYSON_ALW
1
2
1
2
Q5
2N7002
3
+3V_ALW
BATT1
R514
200_0805
1
2
470
D32
2 RB751V
W=30mils
SUSP
29,32,39 EC_SUSP#
EC_SUSP#
SUSP
26
D
Q46
2N7002
2
G
2
W=30mils
D33
RB751V
S
3
R402
100K
W=30mils
RTCBATT
C708
C693
C701
1UF_0603 4.7UF_10V_0805 4.7UF_10V_0805
R496
RTCVREF
1
+RTCVCC
+RTC_BATT
+5VS_GATE
2
G
SUSP
C15
C32
4.7UF_10V_0805 4.7UF_10V_0805
SI4800
C694
4.7UF_10V_0805
1
470
SUSP
1
2
3
4
1
C26
4.7UF_10V_0805
12
R12
C33
1UF_0603
+5VS_GATE
SI4800
2 SUSP
G Q6
2N7002
U45
S
S
S
G
+5V_SW
S
S
S
G
D
D
D
D
1
2
3
4
12
C38
.1UF_25V_0805
SUSP
2
G
Q7
2N7002
D
D
D
D
+1.8V_SW
8
7
6
5
1
100K
C40
C44
C45
1UF_0603 4.7UF_10V_0805 4.7UF_10V_0805
+12V_ALW
R265
470
C37
4.7UF_10V_0805
R15
1
+5VS_GATE
1
S
S
S
G
SI4800
8
7
6
5
1
2
3
4
1
1
2
D
D
D
D
2
Q13
2N7002
2
G
+1.8V_ALW
+3V_SW
U5
8
7
6
5
470
Q9
2N7002
C70
C69
4.7UF_10V_0805 4.7UF_10V_0805
R45
SI4800
C71
4.7UF_10V_0805
12
SYSON_ALW
S
Q34
2N7002
C68
1UF_0603
+5VS_GATE
2 SYSON#
G
1
2
3
4
S
S
S
G
2
1
SYSON#
R14
470
C36
4.7UF_10V_0805
D
D
D
D
C376
C381
C384
1UF_0603 4.7UF_10V_0805 4.7UF_10V_0805
+12V_ALW
2
100K
SI4800
8
7
6
5
R25
SYSON_ALW
U7
1
2
3
4
S
S
S
G
1
2
D
D
D
D
U3
8
7
6
5
Q55
2N7002
2
G
S
3
+3V_ALW
1
+3V_SW
3
D
1
2
18,29,40
ACIN
ACIN_SYS#
Q51
@2N7002
2
G
S
100
4.7UF_25V_1206
D
12
2
1
R92
C144
S
S
Q14
2 SUSP
G
2N7002
Title
12
+12V_SW
@10K
Q19
EC_SUSP# 2
G
2N7002
2
G
SYSON
Q15
NDS352P
51K
4
Q44
2N7002
R470
R98
.1UF
29
R97
C150
100K
SYSON#
+12V_ALW +12V_ALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
82
of
89
+3V
+1.5V_ALW
+1.5V_SW
C57
.01UF_25V_0805
2
G
SUSP
SYSON_ALW
1
2
1
2
Q5
2N7002
3
+3V_ALW
BATT1
R514
200_0805
1
2
470
D32
2 RB751V
W=30mils
SUSP
29,32,39 EC_SUSP#
EC_SUSP#
SUSP
26
D
Q46
2N7002
2
G
2
W=30mils
D33
RB751V
S
3
R402
100K
W=30mils
RTCBATT
C708
C693
C701
1UF_0603 4.7UF_10V_0805 4.7UF_10V_0805
R496
RTCVREF
1
+RTCVCC
+RTC_BATT
+5VS_GATE
2
G
SUSP
C15
C32
4.7UF_10V_0805 4.7UF_10V_0805
SI4800
C694
4.7UF_10V_0805
1
470
SUSP
1
2
3
4
1
C26
4.7UF_10V_0805
12
R12
C33
1UF_0603
+5VS_GATE
SI4800
2 SUSP
G Q6
2N7002
U45
S
S
S
G
+5V_SW
S
S
S
G
D
D
D
D
1
2
3
4
12
C38
.1UF_25V_0805
SUSP
2
G
Q7
2N7002
D
D
D
D
+1.8V_SW
8
7
6
5
1
100K
C40
C44
C45
1UF_0603 4.7UF_10V_0805 4.7UF_10V_0805
+12V_ALW
R265
470
C37
4.7UF_10V_0805
R15
1
+5VS_GATE
1
S
S
S
G
SI4800
8
7
6
5
1
2
3
4
1
1
2
D
D
D
D
2
Q13
2N7002
2
G
+1.8V_ALW
+3V_SW
U5
8
7
6
5
470
Q9
2N7002
C70
C69
4.7UF_10V_0805 4.7UF_10V_0805
R45
SI4800
C71
4.7UF_10V_0805
12
SYSON_ALW
S
Q34
2N7002
C68
1UF_0603
+5VS_GATE
2 SYSON#
G
1
2
3
4
S
S
S
G
2
1
SYSON#
R14
470
C36
4.7UF_10V_0805
D
D
D
D
C376
C381
C384
1UF_0603 4.7UF_10V_0805 4.7UF_10V_0805
+12V_ALW
2
100K
SI4800
8
7
6
5
R25
SYSON_ALW
U7
1
2
3
4
S
S
S
G
1
2
D
D
D
D
U3
8
7
6
5
Q55
2N7002
2
G
S
3
+3V_ALW
1
+3V_SW
3
D
1
2
18,29,40
ACIN
ACIN_SYS#
Q51
@2N7002
2
G
S
100
4.7UF_25V_1206
D
12
2
1
R92
C144
S
S
Q14
2 SUSP
G
2N7002
Title
12
+12V_SW
@10K
Q19
EC_SUSP# 2
G
2N7002
2
G
S
Q15
NDS352P
51K
4
Q44
2N7002
R470
R98
SYSON
.1UF
29
R97
C150
100K
SYSON#
+12V_ALW +12V_ALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
38
of
89
B+
P6
B++
PR1
10
PC3
0.1UF_0805_25V
8
7
6
5
PC12
@1000PF
PL2
SDT-1205P-100-120
PC107
TIME/ON5
28
RUN/ON3
47PF_0603
PR7
PR6
29,32,38 EC_SUSP#
0.015_2512
1M
PR139
+3VALWP
PC118
1000PF_0603
B++
0
2
10UH_SDT-1205P-100-120
P7 P8
PQ4
SI4800
3
P9
PC13
22UF_1812_25V
PQ5
SI4810
PC108
PR5
0.015_2512
1W
47PF_0603
PR8
10K
+
PD5
RB161L-40
PR140
3.65K_1%
PC109
100PF_0603
3
PT1
@0
MAX1632
8
7
6
5
CSH3
CSL3
FB3
SKIP#
SHDN#
PR2
22_1206
D
D
D
D
1
2
3
10
23
PU1
0.1UF_0805_25V
PR4
S
S
S
G
LX3
DL3
4
5
18
16
17
19
20
14
13
12
15
9
6
11
1
2
3
4
26
24
PD4
EC11FS2
8
7
6
5
0
P5
12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#
D
D
D
D
DH3
S
S
S
G
BST3
27
VL
25
PR3
GND
1
2
3
4
1
2
3
4
2
PC9
470PF_0805_100V
PC11
21
PC10
0.1UF_0805_25V
4.7UF_1210_25V 25V
PC4
4.7UF_1206_16V
1
PC5
0.1UF_0805_25V
1
2
3
4
PQ2
SI4810
22
PC8
4.7UF_1210_25V
PC2
4.7UF_1210_16V
PQ3
SI4800
V+
PC7
S
S
S
G
0.1UF_0805_25V
PC1
4.7UF_1206_25V
VL
S
S
S
G
D
D
D
D
PC6
D
D
D
D
8
7
6
5
FBJ3216HS800
DAP202U
PD3
PL1
+12VALWP
B+
PR141
10K_1%
+5VALWP
1
PC17
@150UF_D_6.3V
PR126
PR142
2M
PC110
PC15
150UF_D_6.3V
10
41
MAINPWON 35
PZD4
UDZ5.6B
5%
100PF_0603
PR143
10.5K_1%
PC18
@150UF_D_6.3V
PC19
PD6
RB161L-40
+
PC116
PC117
150UF_D_6.3V
VREF
PC104
PC102
0.1UF_0603_25V
PC20
SHDN#
PR144
10K_1%
4.7UF_1206_10V
0.1UF_0805_25V 0.22UF_0805_16V
0.47UF_0603_16V
PR127
100K
5%
VL
PR133
47K
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
83
of
89
B+
P6
B++
PR1
10
PC3
0.1UF_0805_25V
8
7
6
5
PL2
SDT-1205P-100-120
PC107
TIME/ON5
28
RUN/ON3
47PF_0603
PR7
PR6
29,32,38 EC_SUSP#
0.015_2512
1M
PR139
+3VALWP
B++
0
2
10UH_SDT-1205P-100-120
P7 P8
PQ4
SI4800
3
P9
PC13
22UF_1812_25V
PQ5
SI4800
PC108
PR5
0.015_2512
1W
47PF_0603
PR8
10K
+
PD5
EC10QS04
PR140
3.65K_1%
PC109
100PF_0603
3
PT1
MAX1632
8
7
6
5
CSH3
CSL3
FB3
SKIP#
SHDN#
PR2
22_1206
D
D
D
D
1
2
3
10
23
0.1UF_0805_25V
PR4
S
S
S
G
LX3
DL3
4
5
18
16
17
19
20
14
13
12
15
9
6
11
1
2
3
4
PC12
@1000PF
PU1
26
24
PD4
EC11FS2
8
7
6
5
0
P5
12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#
D
D
D
D
DH3
S
S
S
G
BST3
27
VL
25
PR3
GND
1
2
3
4
1
2
3
4
2
PC9
470PF_0805_100V
PC11
21
PC10
0.1UF_0805_25V
4.7UF_1210_25V 25V
PC4
4.7UF_1206_16V
1
PC5
0.1UF_0805_25V
1
2
3
4
PQ2
SI4800
22
PC8
4.7UF_1210_25V
PC2
4.7UF_1210_25V
PQ3
SI4800
V+
PC7
S
S
S
G
0.1UF_0805_25V
PC1
4.7UF_1206_25V
VL
S
S
S
G
D
D
D
D
PC6
D
D
D
D
8
7
6
5
FBJ3216HS800
DAP202U
PD3
PL1
+12VALWP
B+
+5VALWP
1
PR141
10K_1%
PR126
SHDN#
10
PR142
2M
PC110
41
MAINPWON 35
PZD4
UDZ5.6B
5%
100PF_0603
PR143
10.5K_1%
PC18
PC19
47UF_D_6.3V
PD6
EC10QS04
+
PC116
PC117
47UF_D_6.3V
VREF
PC104
PC102
0.1UF_0603_25V
PC20
PC17
47UF_D_6.3V
PC15
47UF_D_6.3V
PR144
10K_1%
4.7UF_1206_10V
0.1UF_0805_25V 0.22UF_0805_16V
0.47UF_0603_16V
PR127
100K
5%
VL
PR133
47K
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
39
of
89
+3VALWP
1
PR11
100K
30,42
LI/NIMH#
VMB
PR13
PD11
EC10QS04
PD7
@BAS40-04
PL3
1
3
BATT CONN.
PC22
0.01UF
PC23
1000PF
BATT_TEMP
BATT_TEMP
2
PC28
1000PF
PC29
0.01UF_0805_25V
PC30
1000PF
PC31
0.01UF_0805_25V
+5VALWP
3
2
DC JACK
30
PR15
1K
PD8
@BAS40-04
1
FBJ3216HS800
1
2
3
4
5
6
7
1K_1%
TS
SLD
SLC
PR14
25.5K_1%
1
VIN
PCN1
0_1206
+3VALWP
PCN2
PF1
5A
PR119
PR12
1K_1%
1
PR18
200
PD9
@BAS40-04
30,31
EC_SMD_1
3
+5VALWP
1
2
PR21
200
PD10
@BAS40-04
30,31
EC_SMC_1
P1
VMB
P1
PC111
0.1UF_25V_0805
PR25
PR146
1M_1%
10K
42
PR147
PR145
110K_1%
ACIN
OVP#
22K
PACIN
42
3
PQ7
@2N7002
PR150
32.4K_1%
LM393
PU11B
LM393
5
1000PF
RTCVREF
PC112
PD13
UDZ3.6B
PR38
@100K
PR40
10K
PC34
@1UF_1206
PC35
@1000P
PR29
@0
@1M
PR34
@100K
1%
PC33
@1UF_0805_16V
PR27
@895.12K_1%
PR28
PR33
@324K 1%
8
PR148
PR24
@1M_1%
PR26
@39K
18,30,39
10K
PU14A
VREF
VIN
PD12
@1SS355
1
PR36
@1M
PQ8
2
PR35
@208.33K_1%
NIMH/LI#
42
@2N7002
25V
PC113
0.22UF_0805_16V
PR151
100K
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
84
of
89
+3VALWP
1
PR11
100K
29,41 LI/NIMH#
VMB
PR13
PD11
EC10QS04
PD7
@BAS40-04
PL3
1
3
BATT CONN.
PC22
0.01UF
PC23
1000PF
BATT_TEMP
BATT_TEMP
2
PC28
1000PF
PC29
0.01UF_0805_25V
PC30
1000PF
PC31
0.01UF_0805_25V
+5VALWP
3
2
DC JACK
29
PR15
1K
PD8
@BAS40-04
1
FBJ3216HS800
1
2
3
4
5
6
7
1K_1%
TS
SLD
SLC
PR14
25.5K_1%
1
VIN
PCN1
0_1206
+3VALWP
PCN2
PF1
5A
PR119
PR12
1K_1%
1
PR18
200
PD9
@BAS40-04
29,30 EC_SMD_1
3
+5VALWP
1
2
PR21
200
PD10
@BAS40-04
29,30 EC_SMC_1
P1
VMB
P1
PC111
0.1UF_25V_0805
PR25
PR146
1M_1%
10K
41
PR147
PR145
110K_1%
ACIN
PU14A
22K
PACIN
41
PU11B
LM393
5
3
PQ7
@2N7002
1000PF
RTCVREF
PC112
PD13
UDZS3.6B
PR38
@100K
PR40
10K
PC34
@1UF_1206
PC35
@1000P
PR29
@0
@1M
PR34
@100K
1%
PC33
@1UF_0805_16V
PR27
@895.12K_1%
PR28
PR33
@324K 1%
2
PR24
@1M_1%
PR150
32.4K_1%
VREF
PR26
@39K
18,29,38
LM393
10K
8
PR148
OVP#
VIN
PD12
@1SS355
1
PR36
@1M
PR35
@208.33K_1%
PQ8
2
NIMH/LI# 41
@2N7002
25V
PC113
0.22UF_0805_16V
PR151
100K
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
40
of
89
PR42
@0
P2
B+
PQ9
8
7
6
5
PR45
10K
PR43
0.02_2512
PQ11
D
D
D
D
S
S
S
G
1
2
3
4
1
2
PC118 3
4
@1000PF
PR44
200K
D
D
D
D
S
S
S
G
SI4835
8
7
6
5
PC38
@100P 1
2
3
4
1W
SI4435
PQ10
S
S
S
G
D
D
D
D
8
7
6
5
P3
PQ12
1
2
3
4
SI4435
D
D
D
D
S
S
S
G
PC41
PR47
150K
PC42
4.7UF_1210_25V
PACIN
22UH_SPC-1207P-220
PC43
0.1UF_0805_25V
PD14
4.7UF_1210_25V
P4
PC40
PC106
22UF_1812_25V
VIN
2
PR46
0.02_2512
1W
PD29
EC31QS04
EC31QS04
PR152
40
SI4435
VMB
PL5
8
7
6
5
4.7UF_1210_25V
VIN
P1
B+
47K
PD27
1SS355
PR50
PR49
47K
4.7
OVP#
40
Modify by CT at 2/25
1
2
PU5
PQ13 3
2N7002
-INC2
+INC2
24
OUTC2 GND
23
+INE2
CS
22
-INE2 VCC(o)
21
PR51
0
PR52
@0
PC44
2200PF
PR53
10K
FB2
VREF
10K
PC48
2200PF_0603_50V
PR57
PR58
PC47
0.1UF
FB1
VCC
-INE1
RT
17
+INE1
-INE3
16
OUTC1
FB3
15
11
OUTD
CTL
14
29
TRICKLE
12
-INC1
+INC1
13
Add by CT at 29
PC49
5/3
PR59
PR64
10K
1
PQ15
3
FSTCHG
0.1UF_0805_25V
68K
PR63
10
10K_1%
2
19
PR62
PC51
0.1UF_0805_25V
1
PQ16
3
VH
18
10K
24.9K_1%
PR60
16.9K 1%
1.2K_0.5%
20
9
PR61
OUT
PC45
0.1UF
TRICKLE
PC46
4700PF_0603_50V
27K_1%
PR56
10K_1%
100K
PR55
PR54
PD16
1SS355
PC50
PD17
1SS355
1
PQ14
DTC115EK
100K
ACOFF
1
324K_1%
1500PF
MB3878
P1
VMB
PR66
69.8K_0.5%
150K_0.5%
PD19
RLS4148
PR67
PD18
RB751V
CV:LI-ION 13.241V
NI-MH 16.202V
PR65
47K
2N7002
2N7002
PR68
3
1
CHGRTCP
215K_0.5%
1
PQ17
2N7002
NIMH/LI#
40
SHDN#
+5VALWP
100K
39
PU6
S-81235SG
200_0805
PQ19
0.1UF
PR71
100K
100K
DTC115EK
2
RTCVREF
LI/NIMH# 29,40
PC55
10UF_1206_10V
PC54
1UF_0805_25V
PC53
0.22UF_1206_25V
PZD2
RLZ16B
100K
2
PR72
22K
PC52
PZD1
RLZ6.2C
33,34,36 EC_PWR_ON#
PR70
PR69
CHGRTCP
PQ18
TP0610T
3
1
29
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
41
of
89
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
B+
PL6
4.7UF_1210_25V
VIN2
4.7UF_1210_25V
FBJ3216HS800
PC63
PC64
PC65
4.7UF_1210_25 V
5
6
7
8
PC114
0.1U_0603
PQ20
IR7811A
PR81
+VCC_H_COREP
23
D2
BST
26
D1
DL
16
25
D0
V+
14
VGATE
VCC
FB
SDN/SKIP
PC75
17
4.7UF_1206_16V
PC77
6
470PF_0 603
20
+5VALWP
PR134
30K_1%
PR94
24.9K
3
2
1
PQ24
SI4404
PD28
EC10QS 04
2.2
+5VALWP
PC70
150UF_D_6.3V
1
POS
13
NEG
5
19
OVP
SUS
18
11
REF
S1
12
ILIM
S0
15
GND
TON
PC74
4.7UF_1206
10
PU9
NO2
V+
NO3
COM
NO1
NO0
INH
ADDA
7 7,17
GND
ADDB
VDD
14
18
SKIP
BST
19
17
V+
DH
PGOOD
LX
20
1.5VLX
SHDN
DL
13
1.5VDL
ILIM
PGND
12
N/C
N/C
11
REF
N/C
16
TON
OUT
FB
PR107
10K
AGND
PL9
SDT-1205P-1 00-120
PC84
0.1UF_0805
1
- 4
PR131 1K_1%
MAX4322
VOLTS
D3
D2
D1
D0
D4 = 1
D4 = 0
0.975
1.75
0.950
1.70
0.925
1.65
0.900
1.60
0.875
1.55
0.850
1.50
0.825
1.45
0.800
1.40
0.775
1.35
0.750
1.30
0.725
1.25
0.700
1.20
0.675
1.15
0.650
1.10
0.625
1.05
0.600
1.00
PM_SSMUXSEL
PQ25
2N390 4
2
PR101
61.9K
3
PR102
19.6K
PR104
10K
+VTTP
+
2.2
5,17
PC85
150U/6.3V
PR106
3K/F
MODE
DEEPER SLEEP
BATTEY SLEEP
PERFORMANCE SLEEP
BATTERY MODE
PERFORMANCE MODE
OFFSET
0mV
-56mV
-51mV
-16mV
-1.8mV
RBOTTOM
X
16.2K
19.6K
61.9K
604K
Vout(0A)
0.850
1.094
1.199
1.134
1.248
H_DPSLP#
PQ26
SI4834
PD23
@EC10Q S04
ADDA
X
1
1
0
0
ADDB
X
0
1
0
1
1.25VFB
PR109 +VTTP
12K/F
PC89
150PF_0 603PC90
1UF_0805
+VTTP
PC87
Title
PC88
0.01UF_0603 0.1UF_0805
1K
1.5VBST
PR138
2
MAX1714A
PC86
0.1UF_0805
PR93
PR97
10K
1
4
PR103
16.2K
PR100
604K
PC81
4.7U/25V
VCC
PC80
4.7U/25V
PC83
4.7UF_1206_16V
PD22
1SS355
15
10
PR108
15K
+ 3
43
PR130 1K_1%
PU10
PR129
10
MAX4524
2
PC79
0.1UF_0805
2
10
PR128 510
2
1
2
B+
PL8
+5VALWP
PC82
4.7UF_1206_16V
2 2.0VREF
PPU13
+3VALWP
PR99
1.2VILIM
PC103
0.1UF_0805
PM_DPRSLPVR 7,17
FBJ3216HS800
VTT_ON
2
100
PC73
@.01U/16V
1
29
OUTPUT
@0
VTT_P WRGD
PC71
P+
PC76
1000PF_0 603
VIN3
PR92
PR95
27.4K
VIN3
@0
PC72
0.1UF_0805
PR135
20K_1%
PR136
1
5
6
7
8
PQ23
SI4404
PQ22
SI4404
VIN2
ZMODE
CC
PC69
0.1UF_0805
2
VR_ON
PC78
1U
PD26
RB751V
VDD
2.2
PR154
1
TIME
PR85
2mR
PR88
24
PR87
1
51K 2
PR91
VTTLX
28
27
DH
VGATE
PC105
@0.1UF_0603
29
LX
D3
150UF_D_6.3V
PR90
10K
17,34
D4
22
3
2
1
1
2
PL7
HK-RM136-20A0 R8
MAX1718
21
+3V_SW
PL11
PD20
1SS355
20
PU8
PQ21
IR7811A
CPU_VID0
43
1.0UH
P-
5
6
7
8
CPU_VID1
3
2
1
P+
+5VALWP
3
2
1
CPU_VID2
PR79
10
5
6
7
8
4.7UF_1210_25 V
4.7UF_1210_25V
3
2
1
CPU_VID3
CPU_VID4
PC115
1000PF_0 603
5
6
7
8
PC62
PC61
Document Number
Rev
2A
401200
, 10, 2002
Sheet
E
42
of
89
+5VALWP
4
5
6
VREF
S
D
D
PR112
2.2K
PQ27
1
SI3443DV
3
PU11A
PC92
1000PF
8
3
2
LM393
+
47K
2
PQ28
2SC2411K
JOPEN11
+VTTP
PC91
0.1UF_0805_25V
PR110
G
D
D
PR111
105K_1%
PD24
ISS355
+5VALWP
3
2
1
1
PQ29
2SA1036K
+VTT
+VTT
+VTT
+5V_ALW
+5V_ALW
+3V_ALW
+VCC_H_CORE
+VCC_H_CORE
+12V_ALW
3MM
PD25
RB051L-40
JOPEN2
PR113
270K_1%
+VTTP
PC93
0.047UF
80mil
3MM
PL10
JOPEN3
5UH_SPC1002
+VTTP
1
3MM
PR114
5.1K
JOPEN12
+1.8VALWP
+5VALWP
1
3MM
VREF
JOPEN4
PC94
150UF_D_6.3V
+5VALWP
+12VALWP
3MM
JOPEN5
D
D
D
D
+3VALWP
PQ30
1
3MM
SI4800
JOPEN6
+VCC_H_COREP
4
3
2
1
PU12A
LM358
G
S
S
S
5
6
7
8
PR115
100K_1%
3MM
PR116
100K_1%
1000PF_0603_50V
JOPEN7
+VCC_H_COREP
PC95
1
3MM
JOPEN8
+1.5VALWP
PR117 3K_1%
PR118
+12VALWP
PC96
0.1UF_0805_25V
15K_1%
1
2MM
+
PC97
47UF_D_6.3V
JOPEN9
+1.5VALWP
+1.5V_ALW
+1.8V_ALW
2MM
3
JOPEN10
+1.8VALWP
1
3MM
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom 401200
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
A
Rev
2A
Sheet
E
43
of
89
Power PIR
Item
Fixed Issue
Page
Modify item
MB_Ver. Phase
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
5
Rev
2A
401200
, 10, 2002
2
Sheet
44
of
1
89
Page
09/03
P26
P27
P33
P7
09/05
P26
Description
Date
Page
Description
Document Number
Rev
2A
401200
Date:
, 10, 2002
Sheet
45
of
89
BLOCK DIAGRAM
Mobile Tualatin
or
Coppermine-T
(uFCBGA/uFCPGA)
Thermal Sensor
MAX1617MEE
PAGE 52
PAGE 51
PAGE 60
VCH
Almador-M
GMCH-M
SO-DIMM X2
Memory Bus
PAGE 59
PAGE 59
PSB
LVDS
Conn.
CK TITAN
ICS9250-38
PAGE 49
PAGE 48,49
CRT
Conn.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
BANK 0, 1, 2, 3
Docking Connector
PAGE 58
LAN
USB X 2
625 BGA
TV-Out
Conn. PAGE 60
TV-Out
Encoder
SERIAL PORT
PAGE 53,54,55
PAGE 59
HUB
Interface
HDD Connector
PARALLEL PORT
DC-IN JACK
LAN
LINE OUT
Kinnereth
82562ET
EXT. MIC IN
CRT CONN.
PAGE 69
PAGE 81
PS/2 CONN.
ATA 66/100
IEEE-1394
Controller
PAGE 65
PAGE 66
CD-ROM Connector
PAGE 80
ICH3-M
2nd IDE
PAGE 65
421 BGA
PCI BUS
USB
PAGE 61,62
PAGE 64
Mini PCI
Socket
DC/DC Interface
RTC Battery
PAGE 82
PAGE 83
LPC
CardBus
OZ6933T
PAGE 67
Super I/O
Slot 0/1
BATTERY
Charger
PAGE 68
Embedded
Controller
NS PC87391
PAGE 76
PAGE 86
NS PC87591
Audio
Controller
ES1988
PAGE 74
PAGE 71
EQ Circuit
POWER
Interface
PAGE 73
PAGE 54,85,86,88
Parallel
PAGE 77
FIR
PAGE 77
ROM
BIOS
FDD
PAGE 77
PAGE 75
Scan KB
PS/2 Interface
Mic Jack
PAGE 79
PAGE 72
PAGE 79
Audio Amplifier
PAGE 72
Title
Size
Document Number
Custom
Rev
2A
401200
Date:
A
, 10, 2002
Sheet
E
46
of
89
Voltage Rails
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Power Plane
Description
S1
S3
S5
VIN
N/A
N/A
N/A
B+
N/A
N/A
N/A
+VCC_H_CORE
ON
OFF
OFF
+VTT
ON
OFF
OFF
+1.5V_ALW
ON
ON
ON*
+1.5V_SW
AGP 4X
ON
OFF
OFF
+1.8V_ALW
ON
ON
ON*
+1.8V_SW
ON
OFF
OFF
OFF
+2.5V
ON
ON
+2-5V_MRIMM
ON
OFF
OFF
+3V_ALW
ON
ON
ON*
+3V
ON
ON
OFF
+3V_SW
ON
OFF
OFF
+5V_ALW
ON
ON
ON*
+5V
5V power rail
ON
ON
OFF
+5V_SW
ON
OFF
OFF
+12V_ALW
ON
ON
ON*
+12V_SW
ON
OFF
OFF
RTCVCC
RTC power
ON
ON
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Device
IDSEL#
LAN
(AD24 internal)
CardBus
AD20
PIRQA/PIRQB
Audio Controller
AD19
PIRQD
Mini-PCI
AD18
PIRQC
Mini-PCI(LAN)
AD22
PIRQD
IEEE-1394 Controller
AD16
PIRQA
EC SM Bus1 address
Device
REQ#/GNT#
Interrupts
EC SM Bus2 address
Device
Smart Battery
0001 011X b
MAX1617MEE
1001 110X b
EEPROM
1010 000X b
OZ163
0011 0100 b
Docking
0011 011X b
DOT Board
XXXX XXXXb
1010 000X b
Clock Gen.
1101 001X b
Title
Size
Document Number
Custom
Rev
2A
401200
Date:
A
, 10, 2002
Sheet
E
47
of
89
+VCC_H_CORE
K1
J1
G2
K3
J2
H3
G1
A3
J3
H1
D3
F3
G3
C2
B5
B11
C6
B9
B7
C8
A8
A10
B3
A13
A9
C3
C12
C10
A6
A15
A14
B13
A12
A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35
R1
L3
T1
U1
L1
T4
AA3
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
RP#
ADS#
W2
AB3
P3
C14
AF23
AF4
AERR#
AP#0
AP#1
BERR#
BINIT#
IERR#
H_BPRI#
H_BNR#
H_LOCK#
A7
C4
C22
AD23
R2
L2
V3
BREQ0#
NC
NC
NC
BPRI#
BNR#
LOCK#
H_HIT#
H_HITM#
H_DEFER#
AA2
U2
T3
HIT#
HITM#
DEFER#
H_REQ#[0..4]
H_REQ#[0..4]
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADS#
+1.5V_SW
3
9
9
9
9
9
9
R19
1
1.5K
2
R28
1
10
2
TUALATIN
VCC
Address
Lines
Mobile
Tualatin
Data
Signals
Request
Signals
Error
Interface
Arbitration
Signals
Snoop
Signals
VSS
VCC
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74
VCC_73
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_D#[0..63]
D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8
D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63
A16
B17
A17
D23
B19
C20
C16
A20
A22
A19
A23
A24
C18
D24
B24
A18
E23
B21
B23
E26
C24
F24
D25
E24
B25
G24
H24
F26
L24
H25
C26
K24
G26
K25
J24
K26
F25
N26
J26
M24
U26
P25
L26
R24
R26
M25
V25
T24
M26
P24
AA26
T26
U24
Y25
W26
V26
AB25
T25
Y24
W24
Y26
AB24
AA24
V24
H_D#[0..63] 9
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
P6
M6
AC5
AA5
AB6
W5
Y6
U5
U4A
H_A#[3..31]
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
H_A#[3..31]
E16
VSS_0
R4
VSS_1
E25
VSS_2
G25
VSS_3
J25
VSS_4
L25
VSS_5
N25
VSS_6
R25
VSS_7
U25
VSS_8
W25
VSS_9
AA25
VSS_10
AC25
VSS_11
AF25
VSS_12
AE26
VSS_13
C23
VSS_14
F23
VSS_15
H23
VSS_16
K23
VSS_17
M23
VSS_18
P23
VSS_19
T23
VSS_20
V23
VSS_21
Y23
VSS_22
AB23
VSS_23
AE23
VSS_24
B22
VSS_25
D21
VSS_26
F21
VSS_27
E22
VSS_28
H21
VSS_29
G22
VSS_30
K21
VSS_31
J22
VSS_32
M21
VSS_33
L22
VSS_34
P21
VSS_35
N22
VSS_36
T21
VSS_37
R22
VSS_38
V21
VSS_39
U22
VSS_40
Y21
VSS_41
W22
VSS_42
AB21
VSS_43
AA22
VSS_44
AC22
VSS_45
AE21
VSS_46
B20
VSS_47
D19
VSS_48
AB19
VSS_49
AA20
VSS_50
AC20
VSS_51
AE19
VSS_52
B18
VSS_53
D17
VSS_54
F17
VSS_55
E18
VSS_56
AB17
VSS_57
D22
F22
E21
H22
G21
K22
J21
M22
L21
P22
N21
T22
R21
V22
U21
Y22
W21
AB22
AA21
AC21
D20
F20
E19
AB20
AA19
AC19
D18
F18
E17
AB18
AA17
AC17
D16
F16
E15
AB16
AA15
AC15
D14
F14
E13
AB14
AA13
AC13
D12
F12
E11
AB12
AA11
AC11
D10
F10
E9
AB10
AA9
AC9
D8
F8
E7
AB8
AA7
AC7
D6
F6
E5
H6
G5
K6
J5
N5
T6
V6
+VCC_H_CORE
4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
48
of
89
+VTT
+1.8V_SW
H_TRDY#
17
H_STPCLK#
17,42 H_DPSLP#
17
H_INTR
17
H_NMI
17
H_INIT#
9
H_INTR
H_NMI
H_RESET#
9
9
+1.5V_SW
W3
Y1
H_DBSY#
H_DRDY#
R40
150
R42
150
8,11
8
THERMDA
THERMDC
H_BSEL0
H_BSEL1
AE12
AF10
2 AF16
110_1%
1
R35
Mobile
Tualatin
SELFSB0
SELFSB1
EDGECTRLP
R284 1
26.7_1%
PIC_CLK
C449
8 CLK_CPU_APIC
AF13
AF14
Analog
H_THERMDA
H_THERMDC
DBSY#
DRDY#
R286
137_1%
R285 2
1
@33
7
7
7
7
7
7
7
+VS_CMOSREF
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_PREQ#
ITP_PRDY#
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_PREQ#
ITP_PRDY#
Note :
GHI# Pull-Up internally
1
R38
2
56.2_1%
PICD0
PICD1
PICCLK
APIC
AF22
AE20
AD22
AD21
RP2#
RP3#
BPM0#
BPM1#
Debug
Break
Point
AD10
AD7
AD11
AF7
AF15
AF19
AE22
TCK
TDI
TDO
TMS
TRST#
PREQ#
PRDY#
AF12
AD5
AE16
CMOSREF_1
CMOSREF_0
RTTIMPDEP
L5
17 PM_CPUPERF#
TESTLO
VCC
PLL1
PLL2
NC
NC
NC
NC
Y4
R5
N3
N2
P1
P5
E1
F1
CLK0
CLK0#
TESTLO
AC1
AD1
M1
+VTT
8
7
6
5
TESTLO1
TESTLO2
TESTHI2
TESTHI1
8P4R_1K
+V_AGTLREF
+VCC_H_CORE
+VTT
TESTLO1
VCPU_PLL1
VCPU_PLL2
1
L10
2
4.7UH
C27
33UF_D2_16V
CLK_HCLK
CLK_HCLK#
TESTLO2
AF18
AD16
AF11
AE8
N24
AE10
E2
NC
NCHCTRLP
TESTHI
NC
NC
NC
TESTHI
CLK_HCLK 8
CLK_HCLK# 8
R41
1
NCHCTRLP
TESTHI1
14_1%
2
TESTHI2
CLK_HCLK
Test
Access
PORT
P4
( ITP )
VCCT
VID
R261
@33
C378
@10PF
C377
@10PF
VTT_PWRGD
E3
VTTPWRGOOD
CLK_HCLK#
R262
@33
AD4
A5
D1
AD13
B1
P26
A11
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
D26
NC
GHI#
+VTT
AF21
AB26
H26
A21
AF9
A4
N1
AA1
NC
+5V_ALW
W=40mil
VREF_1
VREF_2
VREF_3
VREF_4
VREF_5
VREF_6
VREF_7
VREF_8
1
2
3
4
+VTT
AD19
AD17
AF20
@10PF
AE24
AD25
AE25
AC24
AF24
AD26
AC26
AD24
+1.5V_SW
VTT Ref
RP1
DEP#0
DEP#1
DEP#2
DEP#3
DEP#4
DEP#5
DEP#6
DEP#7
VSS_142
VSS_141
VSS_140
VSS_139
VSS_138
VSS_137
VSS_136
VSS_135
VSS_134
VSS_133
VSS_132
VSS_131
VSS_130
H_IGNNE#
H_SMI#
Data
Signals
A20M#
FERR#
FLUSH#
IGNNE#
SMI#
PWRGOOD
STPCLK#
DPSLP# Compatibility
INTR/LINT0
NMI/LINT1
INIT#
RESET#
F19
E20
C25
A25
AE1
AD2
AB2
Y2
V2
T2
P2
M2
K2
17
17
AC3
AF6
AF5
AD9
AD3
AB4
AE4
AF8
AD15
AE14
AE6
B15
C1
NC
AF17
NC
N4
NC
H_PWRGD
H_FLUSH#
H_IGNNE#
B26
VSS
M4
VSS
AF26
VSS
17
H_A20M#
H_A20M#
VID0
VID1
VID2
VID3
VID4
H_FERR#
AB1
AC2
AE2
AF3
R3
17
17
GND
1.5K
2
1.5K
RS#0
RS#1
RS#2
RSP# Request
TRDY# Signals
R22
Y3
V1
U3
M5
W1
R21
3K
H_RS#0
H_RS#1
H_RS#2
R13
9
9
9
A26
VCCT_1
G23
VCCT_2
J23
VCCT_3
L23
VCCT_4
N23
VCCT_5
R23
VCCT_6
U23
VCCT_7
W23
VCCT_8
AA23
VCCT_9
C21
VCCT_10
C19
VCCT_11
AD20
VCCT_12
C17
VCCT_13
AD18
VCCT_14
C15
VCCT_15
C13
VCCT_16
AD14
VCCT_17
C11
VCCT_18
AD12
VCCT_19
C9
VCCT_20
C7
VCCT_21
AD8
VCCT_22
C5
VCCT_23
AD6
VCCT_24
AC23
VCCT_25
AA4
VCCT_26
E4
VCCT_27
G4
VCCT_28
J4
VCCT_29
L4
VCCT_30
AC4
VCCT_31
V4
VCCT_32
AE3
VCCT_33
AF2
VCCT_34
AF1
VCCT_35
AE18
VCCT_36
D5
VCCT_37
E6
VCCT_38
Place H_RESET#
R267
R272<0.1" from 56.2_1%
U6
+1.5V_SW
+1.5V_SW
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
U4B
AA18
AC18
AE17
B16
D15
F15
AB15
AA16
AC16
AE15
B14
D13
F13
E14
AB13
AA14
AC14
AE13
B12
D11
F11
E12
AB11
AA12
AC12
AE11
B10
D9
F9
E10
AB9
AA10
AC10
AE9
B8
D7
F7
E8
AB7
AA8
AC8
AE7
B6
F5
H5
G6
K5
J6
N6
L6
T5
R6
V5
U6
Y5
W6
AB5
AA6
AC6
AE5
B4
D4
F4
H4
K4
M3
U4
W4
B2
D2
F2
H2
TUALATIN
R274
200
CPU_VR_VID4
CPU_VR_VID3
CPU_VR_VID2
CPU_VR_VID1
CPU_VR_VID0
C422
+3V_SW
+VTT
R18
1K
2
2
R16
18K
VTT_PWRGD# 8,29
1
Q8
3 3904
4
2
VCC
2
1
2.2UF_16V_0805
R273
100K
Title
1K
2
VTT_PWRGD
C758
From 87591
+5V_ALW
R36
1
42
VTT_PWRGD
2
R268
+5V_ALW
DXN
10
6
C58
2200PF
GND
GND
H_THERMDC
2K
EC_SMC_2 29,33,36
EC_SMD_2 29,33,36
8
7
14
12
11
10K
R17
Thermal Sensor
MAX1617/NE1617
U6
SMBC
SMBD
ALERT#
ADD0
ADD1
MAX1617
16 NC
13 NC
9 NC
5 NC
1
H_THERMDA 3 NC
DXP
STBY#
15
.1UF
7
7
7
7
7
100K
2
R37
1
Address:1001_110X
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
49
of
89
Layout note :
Place close to CPU, Use 2~3 vias per PAD.
Place .47uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD.
Layout note :
C42
+
150UF_D2_6.3V
C75
+
150UF_D2_6.3V
C105
+
150UF_D2_6.3V
C47
150UF_D2_6.3V
1
+
C51
+
150UF_D2_6.3V
C392
150UF_D2_6.3V
.22UF_0603
.22UF_0603
.22UF_0603
C426
C428
.22UF_0603
.22UF_0603
C440
C434
.22UF_0603
2
C404
C413
.22UF_0603
.22UF_0603
1
2
C437
C401
.22UF_0603
.22UF_0603
C396
C411
.22UF_0603
C399
C398
.22UF_0603
+VTT
+VCC_H_CORE
+VCC_H_CORE
.22UF_0603
.22UF_0603
C91
C436
C56
C29
C43
C41
C63
C55
C101
C102
1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603 1UF_0603
.22UF_0603
C438
C439
.22UF_0603
.22UF_0603
C425
C432
.22UF_0603
2
C402
C410
.22UF_0603
.22UF_0603
1
2
C403
C433
.22UF_0603
.22UF_0603
C427
C435
.22UF_0603
C397
C412
.22UF_0603
+VTT
C406
10UF_10V_1206
Tualatin
C17
10UF_10V_1206
2
C407
10UF_10V_1206
2
C62
10UF_10V_1206
2
C98
10UF_10V_1206
+VCC_H_CORE
------------------------------------------------------D4 D3 D2 D1 D0
QS( MP)
C25
10UF_10V_1206
C46
10UF_10V_1206
0 1 0 0 1
1.40V
0 1 1 0 0
1.15V
-------------------------------------------------------
1
C390
10UF_10V_1206
2
C99
10UF_10V_1206
2
C429
10UF_10V_1206
2
CPU_Core(V)
------------------------------------------------------1
+VCC_H_CORE
+VCC_H_CORE
3
C387
+
150UF_D2_6.3V
1
C28
+
150UF_D2_6.3V
C76
150UF_D2_6.3V
D4 D3 D2 D1 D0
CPU_Core(V) ES(before MP)
-------------------------------------------------------
1
C391
+
150UF_D2_6.3V
2
1
C104
+
150UF_D2_6.3V
2
C59
+
150UF_D2_6.3V
Coppermine-T
0 0 0 0 1
1.70V
0 1 0 0 0
1.35V
-------------------------------------------------------
+VCC_H_CORE
C444
+
150UF_D2_6.3V
1
C471
+
150UF_D2_6.3V
C52
150UF_D2_6.3V
CPU_Core(V)
QS( MP)
0 0 0 0 1
1.70V
0 1 0 0 0
1.35V
-------------------------------------------------------
1
C469
+
150UF_D2_6.3V
2
1
C424
+
150UF_D2_6.3V
2
C24
+
150UF_D2_6.3V
D4 D3 D2 D1 D0
-------------------------------------------------------
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
50
of
89
+3V
+VTT
R133
249_1%
BE#
VCC
24
13
BX
GND
12
C515
.01UF
+1.8V_SW
1
R152
301_1%
12
1
1
1
1
C430
.1UF
C229 1
+VTT
+1.5V_SW
+VTT
+VAGP_CRDREF
R134
82.5_1%
C643
.1UF
R113
1K_1%
R119
82.5_1%
CLK_ITPP
200
150
200
56.2_1%
+1.8V_SW
ITP_TDI
5
ITP_TDO 5
ITP_TRST# 5
1
R43
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
R296
576_1%
ITP_PREQ# 5
ITP_PRDY# 5
2
240
R34
1
510
2
GND
GND
GND
TDI
TDO
TRST#
BSEN#
PREQ0#
PRDY0#
PREQ1#
PRDY1#
NC
NC
NC
BCLK#
RESET#
DBRESET#
TCK
TMS
POWERON
DBINST#
GND
GND
GND
GND
GND
GND
GND
GND
BCLK
CLK_ITPP# 8
1
R287
2K_1%
R317
R332
@10
@10
12
12
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
@ITP_RECEPTACLE
1
C496
C512
@15PF
@15PF
Title
2 470PF
R270
39
C216 1
R44
R275
1.5K
10K
2
ITP_TCK
ITP_TMS
1
240
5
5
2
R311
R269
39
JP15
H_RESETX#
56.2_1%
9
R266
R86
R313
R84
R79
+VTT
R328
240
R438
301_1%
2 470PF
R127
1K_1%
2
+VTT
+1.5V_SW
+VS_HUBVSWING
+3V_ALW
1
+1.5V_SW
2
2
2
2
+1.8V_SW
In-Target Probe
C516
@.01UF
R435
301_1%
C423
.1UF
+5V_SW
@SN74CBT3383
2
R65
1K_1%
GND
C256
.1UF
BX
13
17,42 PM_DPRSLPVR
R159
301_1%
24
+VS_CMOSREF
VCC
+VS_HUBREF
1
BE#
5
9
15
19
23
D0
D1
D2
D3
D4
42
42
42
42
42
B0
B1
B2
B3
B4
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
4
8
14
18
22
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
2
6
10
16
20
C0
C1
C2
C3
C4
A0
A1
A2
A3
A4
Layout note :
STRAP_VID0
STRAP_VID1
STRAP_VID2
STRAP_VID3
STRAP_VID4
8
7
6
5
@10K
3
7
11
17
21
R68
499_1%
Layout note :
1
2
3
4
U33
MUX_VID0
MUX_VID1
MUX_VID2
RP2
@8P4R_10K MUX_VID3
MUX_VID4
+3V_SW
R100
+1.5V_SW
SN74CBT3383
C443
.1UF
17,42 PM_SSMUXSEL
C400
.1UF
+5V_SW
0 2 CPU_VID4
1R553
C388
.1UF
5
9
15
19
23
C389
.1UF
D0
D1
D2
D3
D4
R64
2K_1%
B0
B1
B2
B3
B4
+V_AGTLREF
C223
.1UF
4
8
14
18
22
+V_SMREF
R126
49.9_1%
AC_VID0
AC_VID1
AC_VID2
AC_VID3
AC_VID4
MUX_VID0 4
MUX_VID1 3
MUX_VID2 2
MUX_VID3 1
MUX_VID4
2
6
10
16
20
C0
C1
C2
C3
C4
A0
A1
A2
A3
A4
Layout note :
1. Place R70 and R75 between and GMCH and CPU.
2. Place decoupling caps near CPU.(Within 500mils)
3
7
11
17
21
CPU_VR_VID0
CPU_VR_VID1
CPU_VR_VID2
CPU_VR_VID3
CPU_VR_VID4
RP37 8P4R_0
CPU_VID0
5
CPU_VID1
6
CPU_VID2
7
CPU_VID3
8
18
18
18
18
18
8
7
6
5
2
5
5
5
5
5
U34
R62
1K_1%
249.9_1%
RP16
8P4R_1K
R333
1K
1
2
3
4
+3V_SW
CPU Voltege ID
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
51
of
89
+3V_CLK
L46
BLM21A601SPT
1
2
Width=40 mils
1
+3V_SW
+
C316
.01UF
C615
.01UF
2
C315
.01UF
2
C314
.01UF
2
C313
.01UF
2
C286
.01UF
2
C287
.01UF
2
C288
.01UF
2
C289
.01UF
2
C626
22UF_1206_10V
2
BLM21A601SPT
L52
1
8
14
19
32
37
46
50
5,29 VTT_PWRGD#
R232
10K
R364 1
2 10K
CLK_BCLK
1
R9 1
R5
2
2 33
60.4_1%
R6 1
CLK_BCLK# R10 1
2 60.4_1%
2 33
CLK_HT
1
R2781
R282
2
2 33
60.4_1%
R2801
R2771
2 60.4_1%
2 33
1
R3181
R320
2
2 33
60.4_1%
R396 2
0
VTT_PWRGD#
44
HOST_CPU#
CPUCLKT1
49
GMCH_CPU
R397
2
R394 2
0
17
CLK_ICH48
R389 1
CLK_DREF
R390 1
VCH_66M
2 220_1%
2 33
USB_48M
CPUCLKC1
48
CPUCLKT0
52
MULT0
2 22
SDATA
SCLK
33
35
3V66_0/DRCG
3V66_1/VCH_CLK
DOT_48M
39
38
GMCH_CPU#
R393
CLK_HT#
IREF
CLK_ITP
51
66MHZ_IN/3V66_5
24
66MHZ_OUT2/3V66_4
66MHZ_OUT1/3V66_3
66MHZ_OUT0/3V66_2
23
22
21
56
48MHZ_USB
PCICLK_F2
PCICLK_F1
PCICLK_F0
48MHZ_DOT
REF
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
GBIN_66M
ICH_66M
2 240K
R434 1
R433 1
2 33
2 33
2 60.4_1%
2 @33
CLK_ITPP 7
CLK_ITPP# 7
C655 .01UF
7
6
5
ICH_33M
APIC_33M
R425 1
R424 1
2 33
2 33
18
17
16
13
12
11
10
CB_33M
AUD_33M
SIO_33M
1394_33M
R432
R431
R430
R429
2
2
2
2
EC_33M
MINI_33M
R427 1
R426 1
1
1
1
1
C653
R437
2
@33
GBIN_ISO
1
@10PF
CLK_GBIN 9
CLK_ICHHUB 17
CLK_ICHPCI 17
CLK_CPU_APIC 5
PCIF1
33
33
33
33
CLK_PCI_CB 23
CLK_PCI_AUD 26
CLK_LPC_SIO 31
CLK_1394 22
2 33
2 33
CLK_LPC_EC 29
CLK_MINIPCI 37
C654
@10PF
4
9
15
20
31
36
41
47
ICS9250-38
C652
@10PF
C588
C589
@10PF @10PF
CLK_GHT# 9
CLK_GBOUT 9
R375 1
CLK_ITP#
CPUCLKC0
GND_REF
GND_PCI
GND_PCI
GND_3V66
GND_3V66
GND_48MHZ
GND_IREF
GND_CPU
REF_14M
CLK_ICH14
CLK_SIO14
2 33
2
33
R325
475_1%
R400 1
1
R399
CLK_GHT 9
R281
475_1%
29
30
42
CLK_HCLK# 5
R388 1
2 22_1%
28
CPU_CLKC2
PWR_DWN#
PCI_STOP#
CPU_STOP#
R391 1
CLK_HCLK 5
R8
475_1%
25
34
53
43
HOST_CPU
CLK_VCH
45
SEL2
SEL1
SEL0
3
2N7002
27
CPUCLKT2
R230
10K
2
2
1
D
Q29
17
31
GND_CORE
22
G
2N7002
3
14,17,19 SMB_CLK
2 0
2
G
R229
100K
14,17,19 SMB_DATA
+3V_SW
+12V_SW
+3V_SW
R231
100K
Q31
XTAL_OUT
C335
22UF_1206_10V
+12V_SW
R403 1
+3V_SW
+
C664
.01UF
40
55
54
17,29 PM_SLP_S1#
17 PM_STPPCI#
17 PM_STPCPU#
15
1
10PF
SEL1
SEL0
H_BSEL1
H_BSEL0
L50
BLM21A601SPT
1
2
26
Y3
14.318MHZ
2
C647
1K
5
5,11
VDD_CORE
R380
1K
XTAL_IN
R386
R365
100K
+3V_SW
1
10PF
2
C629
VDD_REF
VDD_PCI
VDD_PCI
VDD_3V66
VDD_3V66
VDD_48MHZ
VDD_CPU
VDD_CPU
U41
+3V_SW
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
52
of
89
AJ5
D2
AC5
Y5
U5
P5
L5
H5
AH2
AE2
AB2
W2
T2
N2
K2
G2
AC7
VSS_H0
VSS_H1
VSS_H2
VSS_H3
VSS_H4
VSS_H5
VSS_H6
VSS_H7
VSS_H8
VSS_H9
VSS_H10
VSS_H11
VSS_H12
VSS_H13
VSS_H14
VSS_H15
VSS_H16
H_A#[3..31]
Almador-M
GMCH
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_CPURST#
H_ADS#
H_BNR#
H_BPRI#
H_DBSY#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
R6
C1
E1
L4
G5
J4
F4
D3
D1
J6
G4
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
K6
M4
K5
K4
L6
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H6
H4
G6
H_RS#0
H_RS#1
H_RS#2
1
R96
H_RS#[0..2]
CLK_GHT 8
CLK_GHT# 8
R288
47
R297R298
.01UF
@33
C124
@10PF
@10PF
2
80.6_1%
@10PF
C527
.1UF
2
2 28_1%
2 54.9_1%
2
R112
1
2
+VAGP_CRDREF
C79
R82
@33
@33
240K
CLK_DREF 8
CLK_GBIN 8
CLK_GBOUT 8
2 GBOUT_ISO
2
1
R60
AC19
AG26
AD24GBOUT_GMCH
G8
VSSA_CPLL
AD7
VSSA_HPLL
AH26
VSSA_DAC
AH24
VSSP_DVO0
AF25
VSSP_DVO1
AF27
VSSP_DVO2
G28
VSSP_HUB0
H25
VSSP_HUB1
CLK_DREF
CLK_GBIN
CLK_GBOUT
1
R348 1
R109 1
C207
.01UF
H_RS#[0..2] 5
AJ4
AH5
+V_AGTLREF
C532
.1UF
R81
54.9_1%
1
C638
.1UF
H_RESETX# 7
H_RESET# 5
H_ADS# 4
H_BNR# 4
H_BPRI# 4
H_DBSY# 5
H_DEFER# 4
H_DRDY# 5
H_HIT#
4
H_HITM# 4
H_LOCK# 4
H_TRDY# 5
H_REQ#[0..4] 4
H_REQ#[0..4]
1
R361
17 HUB_PD[0..10]
17 HUB_PSTRB
17 HUB_PSTRB#
2
@0
C455 C456
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
+VS_HUBREF
CLK_HT
CLK_HT#
AH19
VSSPCMOS_LM0
AH20
VSSPCMOS_LM1
AF5
VSSPCMOS_LM2
Host
Interface
H_A#[3..31] 4
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H2
E3
G3
N4
M6
F1
F2
J3
F3
P6
G1
N5
H1
P4
T4
M2
J2
L2
R4
K1
L3
L1
J1
N1
T5
H3
M3
M1
K3
Host
Interface
AB23
VSS
AC23
VSS
82830
VSS
H_GTLRCOMP
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
C2
U4
P1
W6
U2
U6
R1
N3
W5
V4
P3
R3
U1
V6
W4
T3
P2
V3
R2
T1
W3
U3
Y4
AA3
W1
V1
Y1
Y6
AD3
AB4
AB5
V2
Y3
Y2
AA4
AA1
AA6
AB1
AC4
AA2
AB3
AD2
AD1
AC2
AB6
AC6
AC1
AF3
AD4
AD6
AC3
AH3
AE5
AE3
AG2
AF4
AF2
AJ3
AE4
AG1
AE1
AG4
AH4
AG3
AF1
AC22
DVO_RCOMP
F6
SM_RCOMP
J23
HUB_RCOMP
J25
AGP_REF
K24
AGP_RCOMP/DVOBC_RCOMP
AB24
RESET#
AA7
H_GTLREF1
J7
H_GTLREF0
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
AC26
VSSP_IO0
AD22
VSSP_IO1
AE28
VSSP_IO2
U30A
H_D#[0..63]
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
H_D#[0..63]
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
HUB_PSTRB
HUB_PSTRB#
HUB_REF
M12
M13
M17
M18
N12
N13
N14
N15
N16
N17
N18
P13
P14
P15
P16
P17
R13
R14
R15
R16
R17
T13
T14
T15
T16
T17
U12
U13
U14
U15
U16
U17
U18
V12
V13
V17
V18
G26
H28
H29
H27
F29
F27
E29
E28
G25
G27
H26
G29
F28
H24
1
54.9_1%_0603
PCI_RST# 15,17,21,22,23,26,29,31,37
C198
.1UF
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
53
of
89
SM_DQ[0..63]
AE20
G24
VSSA_DPLL0
VSSA_DPLL1
K28
N28
T28
W28
AB28
L25
P25
U25
Y25
Almador-M
GMCH
SDRAM
System
Memory
A20
B20
B19
C19
A18
A19
C17
C18
B17
A17
A16
C15
C14
NC
NC
NC
NC
VSS
VSS
VCC_SM
VCC_SM
F20
E20
F12
E11
C21
F19
E12
A12
SM_BA0
SM_BA1
B16
C16
SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7
F18
D18
D13
D12
E18
F17
F14
F13
SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
VCCQ_SM
VSS
E17
F16
D16
D15
E15
E14
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
SM_CLK0
SM_CLK1
SM_CLK2
SM_CLK3
VSS
VSS
A15
B2
B14
A3
A14
C3
SM_D_CLK0
SM_D_CLK1
SM_D_CLK2
SM_D_CLK3
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
VSS
VCC_SM
A13
C9
C13
A9
B13
A8
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
+3V
C248 1
2 .1UF
SM_BA0 14
SM_BA1 14
SM_DQM[0..7] 14
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
14
14
14
14
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
14
14
14
14
+3V
C253 1
2 .1UF
+3V
Layout note :
1.Placement TP6 for Almador-M A2 stepping die.
2.The 0.1uF capacitor and connection to +3V
must be implanted for Almador-M A3 stepping
die.
SM_DQ[0..63] 14
GMCH_RAS#
GMCH_CAS#
GMCH_WE#
+VTT
SM_D_MA[0..12] 13
SM_D_MA0
SM_D_MA1
SM_D_MA2
SM_D_MA3
SM_D_MA4
SM_D_MA5
SM_D_MA6
SM_D_MA7
SM_D_MA8
SM_D_MA9
SM_D_MA10
SM_D_MA11
SM_D_MA12
SM_MA0
SM_MA1
SM_MA2
SM_MA3
SM_MA4
SM_MA5
SM_MA6
SM_MA7
SM_MA8
SM_MA9
SM_MA10
SM_MA11
SM_MA12
A21
SM_WE#
D19
SM_CAS#
C20
SM_RAS#
Power
C24
SM_RCLK
A24
SM_OCLK
VSS
SDRAM
System
Memory
F24
SM_VREF1
E5
SM_VREF0
82830
SM_D_MA[0..12]
VSS
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59
SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63
H7
H23
K7
K23
L7
N6
T6
W7
Y7
AB7
M24
P24
T24
V24
Y23
M14
M15
M16
P12
R12
T12
P18
R18
T18
D29
C29
D27
C27
A27
B26
E24
C25
E23
B25
C23
F22
B23
C22
E21
B22
C12
D10
C11
A10
C10
C8
A7
E9
C7
E8
A5
F8
C5
D6
B4
C4
E27
C28
B28
E26
C26
D25
A26
D24
F23
A25
G22
D22
A23
F21
D21
A22
F11
A11
B11
F10
B10
B8
D9
B7
F9
A6
C6
D7
B5
E6
A4
D4
VSSP_SM0
VSSP_SM1
VSSP_SM2
VSSP_SM3
VSSP_SM4
VSSP_SM5
VSSP_SM6
VSSP_SM7
VSSP_SM8
VSSP_SM9
VSSP_SM10
VSSP_SM11
VSSP_SM12
VSSP_SM13
VSSP_SM14
VSSP_SM15
VSSP_SM16
VSSP_SM17
VSSP_SM18
VSSP_SM19
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59
SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63
B3
B6
B9
B12
B15
B18
B21
B24
B27
E7
E10
E13
E16
E19
E22
E25
G9
G21
E4
D28
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
U30B
VSSP_AGP0
VSSP_AGP1
VSSP_AGP2
VSSP_AGP3
VSSP_AGP4
VSSP_AGP5
VSSP_AGP6
VSSP_AGP7
VSSP_AGP8
AD8
AD9
AD10
AJ21
AE8
AE9
AE10
AE11
AE12
AE13
AE17
AE19
AH21
AF8
AF9
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AG7
AG15
AG16
AG21
AH6
AH8
AH9
AH11
AH12
AH14
AH17
AH18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
R150 1
R149 1
R151 1
2
2
2
10
10
10
SM_RAS# 14
SM_CAS# 14
SM_WE# 14
SM_OCLK
C181/C188 close to
Ball E5 and F24
10
10
10
10
14
14
14
14
C260
@33PF
C587
@33PF
Title
C255
@33PF
2
C259
@33PF
SMD_CLK0
SMD_CLK1
SMD_CLK2
SMD_CLK3
2
2
2
2
1
1
1
1
R378
R156
R148
R157
SM_D_CLK0
SM_D_CLK1
SM_D_CLK2
SM_D_CLK3
C254
@22PF_NPO
2
.1UF
2
.1UF
Layout note :
C217
+V_SMREF
C230
Size
Document Number
Custom
Rev
2A
401200
Date:
A
, 10, 2002
Sheet
E
54
of
89
L14
82830
+1.5V_SW
4
3
2
1
17,23,24 RTCCLK
2
3
+VCCA_DPLL0
+VCCA_DPLL1
R289 1
R290 1
2 @2.2K DVOA_D6
2 2.2K DVOA_D5
R292 1
R293 1
2 @2.2K DVOA_D1
DVOA_D0 1
2 10K
AC21
AF21
AF24
R59
H_BSEL0 5,8
DAC_RED 16,36
DAC_GREEN 16,36
DAC_BLUE 16,36
IO_DDC1CLK 16
IO_DDC1DATA 16
2 255_1%
DAC_VSYNC
DVOA_CLKINT
IO_DDC2DATA
IO_DDC2CLK
DVO_INTR#
DVO_FIELD
AD26
AE26
AE21
AE22
LM_DQA0
LM_DQA1
LM_DQA2
LM_DQA3
LM_DQA4
LM_DQA5
LM_DQA6
LM_DQA7
AG17
AJ17
AG18
AJ18
AG19
AJ19
AG20
AJ20
LM_DQB0
LM_DQB1
LM_DQB2
LM_DQB3
LM_DQB4
LM_DQB5
LM_DQB6
LM_DQB7
AJ11
AH10
AJ10
AG10
AJ9
AG9
AJ8
AG8
RP13
DVOD0 1
DVOD1 2
DVOD2 3
DVOD3 4
DVOD4 5
DVOD5 6
DVOD6 7
DVOD7 8
DVOD8 4
DVOD9 3
DVOD10 2
DVOD11 1
C765
10PF
DVOA_CLK# 15
DVOA_CLK 15
16P8R_22
16 DVOA_D0
15 DVOA_D1
14 DVOA_D2
13 DVOA_D3
12 DVOA_D4
11 DVOA_D5
10 DVOA_D6
DVOA_D7
9
DVOA_D8
5
DVOA_D9
6
DVOA_D10
7
DVOA_D11
8
DVOA_D[0..11]
C764
10PF
2
AJ22
AH22
AG22
AJ23
AH23
AG23
AE23
AE24
AJ25
AH25
AG25
AJ26
1
1
DAC_HSYNC
1
DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8
DVO_D9
DVO_D10
DVO_D11
DVOA_BLANK# 15
DVOA_VSYNC 15
DVOA_HSYNC 15
DVOA_I2CCLK 15
DVOA_I2CDATA 15
2 22
2 22
VCCP_DVO
VCCP_DVO
VCCP_DVO
VCCA_DPLL0
VCCA_DPLL1
AC20
F25
DVOA_D6
15
2
8P4R_22
TV_I2CDATA
TV_I2CCLK
TV_DDCDATA 15
TV_DDCCLK 15
DVO_INTR#
2
DVOA_STALL 15
C756
R46
@33
VCCA_DAC
F5
J5
M5
R5
V5
AA5
AD5
AG5
E2
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
AF26
AG27
VCCA_DAC
VCCA_DAC
VCCPCMOS_LM
VCCPCMOS_LM
VCCPCMOS_LM
VCCPCMOS_LM
AF6
AE7
AC9
AC8
VCCA_PLL
G10
G20
VCCQ_SM
VCCQ_SM
AE6
G7
N24
W23
VCCQ_AGP
VCCQ_AGP
J24
F26
VCCP_HUB
VCCP_HUB
AE25
AD23
VCCP_IO
VCCP_IO
Mobile
C757
27PF
+3V_SW
27PF
DVOA_I2CDATA1
C77
@10PF
R91
DVOA_I2CCLK 1
R89
10K
2
2
10K
DVOA_CLKINT 1
100K
2
1
R57
2
100K
R452
+3V_SW
TV_I2CDATA 1
8.2K
AGP_BUSY#
R56
DVO_INTR#
1
Local Memory
Interface
+3V_SW
AC24
AGP_BUSY# 17
TV_I2CCLK
R554
4.7K
2
1
2
R555 4.7K
+1.8V_SW
C108
68PF
2
+3V_SW
R295 1
R55 1
NC
VCC
A
Y
GND
2 10K
2 10K
5
4
2
1
R568
732_1%_0603
DPMS_CLK
+VS_RIMMREF
VS_RIMMREF
R569
604_1%_0603
1
R294
NC7S14
2
100_1%_0603
C454
.1UF
C452
.1UF
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
IOQD=8
Desktop
DAC_VSYNC 16,36
DAC_HSYNC 16,36
R72 1
R63 1
R61 1
DVOA_I2CCLK
DVOA_I2CDATA
DVCLK#
R50
DVCLK
R52
+3V
U60
AE29 DAC_VSYNC
AD28 DAC_HSYNC
AF28 DAC_RED#
AG28 DAC_GREEN#
AH27 DAC_BLUE#
AF29
AG29
AH28
AE27
AD27
R53 1
AJ27
AD20
AD21
AF23
AF22
AD25
AC25
AG24
AJ24
8P4R_100K
IOQD=2
DVOA_D5
+1.5V_SW
5
6
7
8
RP36
DVOA_D1
100UF_D2_6.3V
100UF_D2_6.3V
DVO_CLKIN
DVO_BLANK#
DVO_VSYNC
DVO_HSYNC
IO_I2CCLK
IO_I2CDATA
DVO_CLK#
DVO_CLK
Local Memory
Interface
M_DDC2_CLK
M_DDC2_DATA
M_DDC1_CLK
M_DDC1_DATA
133MHz
15 DVOC_D[0..11]
C210
+1.5V_SW
Reserved
.1UF
RP14
15
DAC_VSYNC
DAC_HSYNC
DAC_RED#
DAC_GREEN#
DAC_BLUE#
DAC_RED
DAC_GREEN
DAC_BLUE
IO_DDC1CLK
IO_DDC1DATA
DAC_REFSET
Almador-M
GMCH
C93
High
DVOA_D0
J29
J28
K26
K25
L26
J27
K29
K27
M29
M28
L24
M27
N29
DVOC_FLD
M25
2
1
N26
R90
100K M_DDC2_CLK
N27
R25
15 DVOC_VSYNC
R24
15 DVOC_HSYNC
T29
DVOC_D0
T27
DVOC_D1
T26
DVOC_D2
U27
DVOC_D3
V27
DVOC_D4
V28
DVOC_D7
U26
DVOC_D6
V29
DVOC_D9 W29
DVOC_D8
V25
DVOC_D11 W26
DVOC_D10 W25
DPMS_CLK W27
R105
100K
1
2
Y29
C92
Low
680
(DVOA port)
AGP
Interface
C227
+
.1UF
Strap Name
2
R104
AC10VCC_LM
AC11VCC_LM
AD11VCC_LM
AD12VCC_LM
AD13VCC_LM
AE18 VCC_LM
AD17VCC_LM
AD18VCC_LM
AD19VCC_LM
2
100K
+1.5V_SW
Display
Interface
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
1
R363
+VTT
D5
D8
D11
D14
D17
D20
D23
D26
F7
F15
G11
G19
G23
2
100K
AJ16
LM_CFM
AH16
LM_CFM#
1
R369
AH15LM_CTM
AJ15
LM_CTM#
AD14LM_RAMREF0
AE14 LM_RAMREF1
+1.5V_SW
AGP_ADSTB0/DVOB_CLK
AGP_ADSTB#0/DVOB_CLK#
AGP_ADSTB1/DVOC_CLK
AGP_ADSTB#1/DVOC_CLK#
AGP_SBSTB/ZV_D4
AGP_SBSTB#/ZV_D3
AGP_FRAME#/M_DDC1_DATA
AGP_IRDY#/M_I2C_CLK
AGP_TRDY#/M_DDC1_CLK
AGP_STOP#/M_DDC2_DATA
AGP_DEVSEL#/M_I2C_DATA
AGP_REQ#/ZV_CLK
AGP_GNT#/ZV_D15
AGP_PAR
AJ6 LM_RCLK
AG6 LM_GCLK
R307 1
R310 1
DVOC_CLK
DVOC_CLK#
AG11LM_RQ0
AJ12 LM_RQ1
AG12LM_RQ2
AH13LM_RQ3
AG13LM_RQ4
AJ13 LM_RQ5
AG14LM_RQ6
AJ14 LM_RQ7
L29
L28
DVCCLK
2 22
U29
DVCCLK#
2 22
U28
AA27
AA28
M_DDC1_DATA
R29
M_I2CCLK
P26
M_DDC1_CLK
P27
M_DDC2_DATA
N25
M_I2CDATA
R28
AC27
AD29
AGP_PAR
1
P28
330
+1.8V_SW
.1UF
AGP_CBE#0/DVOB_D7
AGP_CBE#1/DVOB_BLANK#
AGP_CBE#2/ZV_VSYNC
AGP_CBE#3/DVOC_D5
AH7
LM_CMD
AF7 LM_SCK
AJ7 LM_SIO
DVOC_D5
1
.1UF
.01UF
.1UH_0805
1
1
.1UH_0805
2
2
L17
C95
Power
Interface
AC28AGP_ST0/ZV_D14
AC29AGP_ST1/ZV_D13
AB27 AGP_ST2/ZV_D12
L27
P29
R27
T25
AGP_SBA0/ZV_D8
AGP_SBA1/ZV_D7
AGP_SBA2/ZV_D6
AGP_SBA3/ZV_D5
AGP_SBA4/ZV_D2
AGP_SBA5/ZV_D1
AGP_SBA6/ZV_D0
AGP_SBA7/ZV_HREF
AB26
AGP_PIPE#/ZV_D10
AB29 AGP_WBF#/ZV_D9
AB25 AGP_RBF#/ZV_D11
AA29
AA24
AA25
Y24
Y27
Y26
W24
Y28
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
U30C
15
15
V14
V15
V16
AE16
AE15
AD15
AD16
C127
68PF
2
C205
C96
+3V
VCCA_HPLL
VCCA_CPLL
+3V
J26
M26
R26
V26
AA26
L23
AA23
U24
+VTT
.1UF
1
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
Layout note :
C103
2
R, L, C
place near
GMCH.
1
L16
+1.8V_SW
+VTT
+1.5V_SW
+1.8V_SW
2
0_0805
1
R66
L0603
2
+VTT
Size
Document Number
Custom
Rev
2A
401200
Date:
C
, 10, 2002
Sheet
E
55
of
89
Layout note :
Layout note :
+1.8V_SW
1
C121
.01UF
C122
.01UF
2
C120
.1UF
1
C224
.1UF
C136
.1UF
C114
.1UF
C106
.1UF
C132
.1UF
C142
.1UF
C84
.1UF
C547
.1UF
C537
.1UF
C87
.1UF
C74
22UF_1206_10V
+
C100
.1UF
+VTT
+VTT
C148
.1UF
C151
.1UF
C112
.1UF
C85
.1UF
C88
.1UF
C113
.1UF
1
C111
.1UF
2
C89
.1UF
2
C86
.1UF
2
C109
.1UF
Layout note :
+1.8V_SW
1
2
C118
.1UF
C197
.1UF
2
1
C137
82PF
2
C131
.1UF
2
2
C135
.1UF
+
C133
C82
82PF 22UF_1206_10V
C212
150UF_D2_6.3V
1
C414
+
150UF_D2_6.3V
C65
+
150UF_D2_6.3V
+VTT
+VTT
Layout note :
Distribute as close as possible
to GMCH AGP/DVO Quadrant .
C183
.1UF
2
C174
.1UF
2
C161
.1UF
2
C154
.1UF
2
C147
.1UF
2
C143
.1UF
1
C117
.1UF
2
C116
.1UF
2
C115
.1UF
2
C128
.1UF
1
C211
150UF_D2_6.3V
+VTT
+1.5V_SW
C139
.1UF
C186
.1UF
2
C180
82PF
2
C125
.1UF
2
C181
.1UF
2
C185
82PF
2
C126
.1UF
2
C175
.1UF
2
C193
82PF
2
C141
.1UF
2
C123
.1UF
2
C168
82PF
2
C157
.1UF
2
C97
.1UF
2
22UF_1206_10V
C140
.1UF
2
C155
.1UF
2
C162
.1UF
2
C172
.1UF
2
C94
.1UF
1
C204
.1UF
2
C199
.1UF
2
C194
.1UF
2
C192
.1UF
C165
C64
150UF_D2_6.3V
Layout note :
+VTT
1
C146
.1UF
+3V
3
+
C242
.1UF
2
C237
.1UF
2
C244
.1UF
2
C238
.1UF
2
C215
82PF
2
C239
.1UF
2
C220
.1UF
2
C208
82PF
2
C209
.1UF
2
C240
.1UF
2
C213
82PF
2
C236
.1UF
2
C214
.1UF
2
C201
82PF
2
C203
.1UF
C226
.1UF
2
C145
.1UF
2
C202
.1UF
1
C130
.1UF
2
C191
.1UF
2
C187
.1UF
2
C206
.1UF
1
C195
.1UF
2
C184
.1UF
2
C173
.1UF
2
C156
.1UF
C221
22UF_1206_10V
+VTT
C134
.1UF
2
C110
.1UF
2
C188
.1UF
1
C189
.1UF
2
C190
.1UF
2
C171
.1UF
2
C159
.1UF
1
C153
.1UF
2
C138
.1UF
2
C50
150UF_D2_6.3V
Layout note :
Distribute as close as possible
to IO Quadrant .
1
+3V
1
C241
.1UF
C225
.1UF
C235
22UF_1206_10V
2
C415
150UF_D2_6.3V
1
C67
+
150UF_D2_6.3V
2
1
C49
+
150UF_D2_6.3V
2
C66
+
150UF_D2_6.3V
+VTT
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
56
of
89
Layout note :
1
10 SM_D_MA[0..12]
1
2
C479
.1UF
C464
.1UF
2
1
C492
.1UF
2
C540
.1UF
2
C528
.1UF
2
C556
.1UF
1
C584
.1UF
2
C598
.1UF
2
C613
.1UF
2
C494
.1UF
1
C602
.1UF
2
C592
.1UF
2
C579
.1UF
2
C566
.1UF
1
C491
.1UF
2
C475
.1UF
2
C465
.1UF
2
C462
.1UF
+3V
SM_MA[0..12] 14
+3V
1
2
3
4
8
7
6
5
SM_MA3
SM_MA2
SM_MA1
SM_MA0
SM_D_MA5
SM_D_MA4
SM_D_MA7
SM_D_MA6
1
2
3
4
8P4R_10
RP5
8
7
6
5
SM_MA5
SM_MA4
SM_MA7
SM_MA6
SM_D_MA9
SM_D_MA8
SM_D_MA10
SM_D_MA11
1
2
3
4
8P4R_10
RP4
8
7
6
5
SM_MA9
SM_MA8
SM_MA10
SM_MA11
C417
22UF_1206_10V
SM_D_MA3
SM_D_MA2
SM_D_MA1
SM_D_MA0
RP3
Layout note :
One .1uF cap per power pin .
Place each cap close to SODIMM(DIMM 1) pin .
+3V
8P4R_10
C470
.1UF
2
C467
.1UF
2
C575
.1UF
1
C611
.1UF
2
C619
.1UF
2
C601
.1UF
2
C591
.1UF
1
C553
.1UF
2
C543
.1UF
2
C495
.1UF
2
C481
.1UF
1
C606
.1UF
2
C593
.1UF
2
C586
.1UF
2
C574
.1UF
1
C521
.1UF
2
C489
.1UF
2
C461
.1UF
SM_MA12
2
10
SM_D_MA12 1
R147
+3V
C416
22UF_1206_10V
3
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
57
of
89
SM_DQ[0..63] 10
+3V
+3V
+3V
+3V
JP28
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CKE0#DQMB0
CKE1#/DQMB1
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RFU/DQ64
RFU/DQ65
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
DQMB4/CE4#
DQMB5/CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
DQ68/RFU
DQ69/RFU
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
RFU/CLK0
VCC
RFU/RAS#
WE#
RE0#/S0#
RE1#/S1#
RFU/EDO_OE#
VSS
RFU/DQ66
RFU/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/DQMB2
CE3#/DQMB3
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC
CKE0/RFU
VCC
CAS#/RFU
CKE1/RFU
A12/RFU
A13/RFU
CLK1/RFU
VSS
DQ70/RFU
DQ71/RFU
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
BA0
VSS
BA1
A11
VCC
DQMB6/CE6#
DQMB7/CE7#
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
10
10
SM_DQM0
SM_DQM1
13
13
13
SM_MA0
SM_MA1
SM_MA2
SM_DQM0
SM_DQM1
SM_MA0
SM_MA1
SM_MA2
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
10
SMD_CLK0
10
10
10
10
SM_RAS#
SM_WE#
SM_CS#0
SM_CS#1
SMD_CLK0
SM_RAS#
SM_WE#
SM_CS#0
SM_CS#1
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
13
13
SM_MA6
SM_MA8
SM_MA6
SM_MA8
13
13
SM_MA9
SM_MA10
10
10
SM_DQM2
SM_DQM3
SM_MA9
SM_MA10
SM_DQM2
SM_DQM3
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31
SODIMM0_SMDAT
JP29
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
SM_DQM4
SM_DQM5
SM_MA3
SM_MA4
SM_MA5
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
SM_CKE0 10
SM_CAS#
SM_CKE1
SM_MA12
1
2
R352
0
10
SM_CAS# 10
SM_CKE1 10
SM_MA12 13
SMD_CLK1
SMD_CLK2
SMD_CLK2
10
10
SM_RAS#
SM_WE#
SM_CS#2
SM_CS#3
SM_CS#2
SM_CS#3
SMD_CLK1 10
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
SM_MA7
SM_BA0
SM_MA7
SM_BA0
SM_BA1
SM_MA11
SM_MA6
SM_MA8
13
10
SM_MA9
SM_MA10
SM_BA1 10
SM_MA11 13
SM_DQM6
SM_DQM7
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
DQMB4/CE4#
DQMB5/CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
DQ68/RFU
DQ69/RFU
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
RFU/CLK0
VCC
RFU/RAS#
WE#
RE0#/S0#
RE1#/S1#
RFU/EDO_OE#
VSS
RFU/DQ66
RFU/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/DQMB2
CE3#/DQMB3
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC
CKE0/RFU
VCC
CAS#/RFU
CKE1/RFU
A12/RFU
A13/RFU
CLK1/RFU
VSS
DQ70/RFU
DQ71/RFU
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
BA0
VSS
BA1
A11
VCC
DQMB6/CE6#
DQMB7/CE7#
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
SM_MA0
SM_MA1
SM_MA2
13
13
13
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
SM_CKE0
VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CKE0#DQMB0
CKE1#/DQMB1
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RFU/DQ64
RFU/DQ65
SM_DQM0
SM_DQM1
SM_DQM4 10
SM_DQM5 10
SM_MA3
SM_MA4
SM_MA5
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
SM_DQM2
SM_DQM3
SM_DQM6 10
SM_DQM7 10
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63
SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31
SODIMM0_SMCLK
SODIMM1_SMDAT
SO-DIMM144-Reverse
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
SM_DQM4
SM_DQM5
SM_MA3
SM_MA4
SM_MA5
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
SM_CKE2
SM_CKE2 10
SM_CAS#
SM_CKE3
SM_MA12
1
2
R344
0
SM_CKE3 10
SMD_CLK3
SMD_CLK3 10
2
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
SM_MA7
SM_BA0
SM_BA1
SM_MA11
SM_DQM6
SM_DQM7
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59
SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63
SODIMM1_SMCLK
SO-DIMM144-Normal
DIMM0
DIMM1
+3V
+3V
13
2N7002
SODIMM0_SMDAT
SODIMM1_SMDAT
12
14
15
11
1
R335
R349
10
10
10
10
C533
C559
10PF
C511
12
R357
10PF
Y0
Y1
Y2
Y3
SMD_CLK3
R341
12
12
SODIMM0_SMCLK
SODIMM1_SMCLK
1
5
2
4
SMD_CLK2
10PF
C546
10PF
1
2
3
4
16
RB751V
74HC4052
7
8
Q22
U17
X0
X1
X2
X3
SMD_CLK1
INH
A
B
8,17,19 SMB_DATA
SM_SEL0
8,17,19 SMB_CLK
17
6
10
9
VCC
2N7002
8P4R_10K
GND
GND
2
G
D45
Q24
SMD_CLK0
R551
100K
RP7
C318
.1UF
12
+3V
R176
100K
8
7
6
5
+12V_SW
R194
100K
Output
X0, Y0
X1, Y1
X2, Y2
X3, Y3
Title
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
58
of
89
+1.8V_SW
+LCDVDD
VCH
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
9,17,21,22,23,26,29,31,37 PCI_RST#
D14
8 CLK_VCH
M12
DVOrCOMP
TESTIN
OSC
VSS1
VSS2
VSS3
VSS4
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS5
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS6
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS40
VSS38
VSS39
VSS41
VSS42
VSS43
VSS44
A1
A14
B1
C4
D11
E5
E6
E7
E9
E10
F5
F6
F7
F8
F9
F10
G5
G6
G7
G8
G9
G10
H5
H6
H7
H8
H9
H10
J5
J6
J7
J8
J9
J10
K5
K6
K7
K8
K9
K10
L4
N14
P1
P14
DVOA_CLK
DVOA_CLK#
R51
@33
FLM
LP
DE
SHFCLK
PCIRST#
R49
@33
YA4P
YA4M
YA5P
YA5M
YA6P
YA6M
YA7P
YA7M
CLKBP
CLKBM
36.5_1%
2
N9
1 2.2K B14
ENABKL
ENAVDD
ENEXBUF
150
150
4.7UF_16V_1206
2N7002
1
1
2
150K
4.7UF_16V_1206
E3
E2
E1
F3
F2
F1
G3
G2
G1
H3
H2
H1
J3
J2
J1
K3
K2
K1
L3
L2
L1
M3
M2
M1
N1
N2
P2
N3
P3
M4
N4
P4
M5
N5
P5
M6
ENVDD
22K
@1000PF
Q12
DTC124EK
22K
+3V_SW
D20
29
BKOFF#
29
ENBLT
R305
4.7K
D19
LVDS CONNECTOR
RB751V
DISPOFF# 33
LCDVDD
RB751V
ENBLT 1
2
C53
C395
+
C54
1000PF
L53
C1
B2
D2
D3
+LCDVDD
ENBLT
ENVDD
ENEXBUF
C2
C3
D1
10UF_10V_1206
.1UF
@0_0805
2
JP10
L13
LCDVDD
1
2
FBM-l11-201209-221LMAT
TXOUT0TXOUT0+
1
TP1
TP
TXOUT1TXOUT1+
A8
B8
A9
B9
A10
B10
A11
B11
A12
B12
R326
1
R299 2
YA0P
YA0M
YA1P
YA1M
YA2P
YA2M
YA3P
YA3M
CLKAP
CLKAM
+1.8V_SW
I2C_DATA
I2C_CLK
A3
B3
A4
B4
A5
B5
A7
B7
A6
B6
11 DVOA_I2CDATA
11 DVOA_I2CCLK
L11
VSSA
C11
VSSBA
C8
VSSDA
D13
D12
2R279
1
R283
C409 C405
+
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35
VCH_VREFHI
VCH_VREFLO
D8
D7
C419
1000PF
2
TV_CLKIN
TV_CLKOUT#
TV_CLKOUT
TV_VSYNC
TV_HSYNC
TV_BLANK#
F14
J13
J12
G14
G13
G12
H14
H13
H12
J14
K14
K13
K12
L14
L13
L12
M14
M13
TV_DATA0
TV_DATA1
TV_DATA2
TV_DATA3
TV_DATA4
TV_DATA5
TV_DATA6
TV_DATA7
TV_DATA8
TV_DATA9
TV_DATA10
TV_DATA11
L10
C10
C7
A2
A13
C9
D4
D6
D9
E4
F11
G4
H4
J4
K4
L6
C6
C5
D5
D10
E8
E11
F4
G11
H11
J11
K11
L5
L7
L8
L9
N13
VCCA
VCCBA
VCCDA
VREF_HI
VREF_LO
1 R33
Q10
2N7002
PID3
PID2
PID1
PID0
F13
E14
F12
E13
E12
C13
B13
C14
C12
2
3
C418
.1UF
C420
22UF_1206_10V
+3V_SW
2 @10K
2 @10K
+
C421
R3031
R3011
Q11
1
+1.8V_SW
CLKIN
CLKIN#
BLANK#
CLKOUT
LCD_HDE#
LCD_VDE#
LCD_VREF
75_1%
R31
100K
M8
11 DVOA_CLK
N8
11 DVOA_CLK#
N11
11 DVOA_BLANK#
R322
15_1%P12
2
1
DVOA_HSYNC
P11
11 DVOA_HSYNC
DVOA_VSYNC
N12
11 DVOA_VSYNC
LCD_VREF P13
R327
DVODATA0
DVODATA1
DVODATA2
DVODATA3
DVODATA4
DVODATA5
DVODATA6
DVODATA7
DVODATA8
DVODATA9
DVODATA10
DVODATA11
Q35
100
10K
1
1
1
11 DVOA_STALL
M11
P10
N10
M10
P9
M9
P8
P7
N7
M7
P6
N6
VCC1_8V16
VCC1_8V1
VCC1_8V2
VCC1_8V3
VCC1_8V5
VCC1_8V7
VCC1_8V6
VCC1_8V8
VCC1_8V9
VCC1_8V10
VCC1_8V11
VCC1_8V12
VCC1_8V13
VCC1_8V14
VCC1_8V15
DVOA_D0
DVOA_D1
DVOA_D2
DVOA_D3
DVOA_D4
DVOA_D5
DVOA_D6
DVOA_D7
DVOA_D8
DVOA_D9
DVOA_D10
DVOA_D11
VCC_3V1
VCC_3V2
VCC_3V3
VCC3_3V4
VCC3_3V5
VCC3_3V6
VCC3_3V7
VCC3_3V8
VCC3_3V9
VCC3_3V10
VCC3_3V11
VCC3_3V12
VCC3_3V13
VCC3_3V14
11 DVOA_D[0..11]
SI2302DS
3
1
R32
100K
R26
R302
2
C448
.1UF
U28
+12V_ALW
1
1.8VS_VCH
+LCDVDD
+3V
C451
1000PF
2
C450
.1UF
+1.8V_SW
1
C442
22UF_1206_10V
L0805
+3V_SW
+12V_ALW
L44
C447
.1UF
10UF_10V_1206
C441
+3V_SW
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
11
12
13
14
15
16
17
18
19
20
TXOUT2TXOUT2+
TXCLK0TXCLK0+
JST BM20B-SRDS
TXCLK1+
TXCLK1-
C80
@10PF
TXOUT4+
TXOUT4TXOUT5+
TXOUT5TXOUT6+
TXOUT6-
C78
@10PF
TXCLK0+
TXCLK0-
TXOUT0+
TXOUT0TXOUT1+
TXOUT1TXOUT2+
TXOUT2-
82807
+3V_SW
JP11
LCDVDD
1
2
3
4
+1.5V_SW
8P4R_4.7K
1 0
37
42
43
PCI_RST#
29
+3V_SW
11
11
C474
.1UF
26
27
TV_DDCDATA
TV_DDCCLK
C445
.1UF
2
@75_1%
C478
.1UF
SL_STALL
11 DVOC_HSYNC
11 DVOC_VSYNC
2 100K
22
R5361
2 75_1%
21
R5371
2 75_1%
TXCLK1TXCLK1+
DGND[0]
DGND[1]
DGND[2]
POUT
H
V
RESET*
DVDD2
DGND[3]
SD
SC
AVDD
AGND
GPIO[1]
GPIO[0]
5
16
30
C510
.1UF
10UF_10V_1206
C545
10UF_10V_1206
+5V_SW
2 10K
VREF_TVO
39
DVOC_CLK
DVOC_CLK#
VREF
C573
1UF_0603
C567
.01UF
C571
.1UF
C577
10UF_10V_1206
32
Y2
R543
@33
R542
@33
C536
33
CH7007
+5V_SW
R340 1
+1.5V_SW
C497
1000PF
2
C463
.1UF
XO
1
1
R343
C760
@10PF
1
C560
C759
@10PF
22PF
C578
2
10K
2
.1UF
14.318MHZ
2
1
2
C485
22UF_1206_10V
25
19
23
ISET
24
1 360_1%
R362 2
1
+
2
VDD
GND[0]
GND[1]
R337
100K
LCDVDD
C562
C542
.1UF
31
34
2
RB751V
TXOUT6TXOUT6+
+1.5V_SW
38
36
1
D46
TXOUT4TXOUT4+
C541
C570
1000PF .1UF
8
18
28
DVDD[0]
DVDD[1]
DVDD[2]
XI/FIN
17 PAL/NTSC#
+3V_SW
TXCLK0TXCLK0+
IPEX20265-030E
R336 1
15
14
16,36
R7
75_1%
R351 2
DVOC_FLD
COMPS
2 75_1%
TXOUT2TXOUT2+
+3V_SW
XCLK*
XCLK
11
R5351
20
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
C473
.1UF
2
C476
.1UF
R353
C446
.1UF
41
40
DVOC_CLK#
DVOC_CLK
1
C498
.1UF
2
1
C499
.1UF
10UF_10V_1206
C486
11
11
17
TXOUT5TXOUT5+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
+1.8V_SW
CVBS
SW DIP-4
CSYNC
2 @75_1%
C500
.01UF
2.2UF_16V_0805
2K_1%
DS/BCO
R5341
C493
5
6
7
8
35
R323
LCD_VREF
2
1
C330
@10PF
4
3
2
1
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
PID3
PID2
PID1
PID0
13
12
11
10
9
7
6
4
3
2
1
44
TXOUT1TXOUT1+
SW1
2K_1%
TXOUT0TXOUT0+
U31
DVOC_D11
DVOC_D10
DVOC_D9
DVOC_D8
DVOC_D7
DVOC_D6
DVOC_D5
DVOC_D4
DVOC_D3
DVOC_D2
DVOC_D1
DVOC_D0
8
7
6
5
R329
RP15
R226
@33
11 DVOC_D[0..11]
CLK_VCH
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Title
12PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
5
Rev
2A
401200
, 10, 2002
Sheet
1
59
of
89
CRTVCC
CRT Connector
D47
2
+5V_SW
1
F1
POLYSWITCH_0.5A
RB491D
+1.8V_SW
C5
.1UF
Q60
2N7002 Q61
1
C361
18PF_0603
S
G
2
CRTGATE
CRT-15P
33
18
19
L33
1
2
FBM-L10-160808-301
DAC_V
1
R142
1
Q33
2N7002
1
2
FBM-L10-160808-301
1
Q3
2N7002
DAC_VSYNC
DAC_VSYNC
JP2
DAC_H
33
R135
11
5VDDCCL
L2
DAC_HSYNC
11 DAC_HSYNC
C357
18PF_0603
2
C8
18PF_0603
C18
DAC_B
18PF
2
2
DAC_G
75_1%
C365
18PF
18PF 75_1%
C360
R250
75_1%
R4
R256
DAC_BLUE
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
DAC_R
DAC_GREEN
11,36 DAC_BLUE
L7
1
2
FCM2012C-800(0805)
L35
1
2
FCM2012C-800(0805)
L36
1
2
FCM2012C-800(0805)
DAC_RED
11,36 DAC_GREEN
C16
.1UF
30,36
M_SEN#
11,36 DAC_RED
5VDDCDA
2N7002
1
D15
DAN217
D16
DAN217
D1
DAN217
G
C2
220PF
C352
220PF
2
C353
100PF
2
C354
100PF
2
C359
10PF
2
C11
10PF
2
100K
1
R254
+12V_SW
CRTGATE
DAC_V
36
DAC_H
36
GMBus switch
+5V_SW
D5
+3V_SW
1
C20
33PF_0603
1
2
21 CDLED_CON#
21 HDDLED_CON#
11 IO_DDC1DATA
11 IO_DDC1CLK
JP6
RCA JACK
2.2K
24
1A1
1A2
1A3
1A4
1A5
1B1
1B2
1B3
1B4
1B5
2
5
6
9
10
14
17
18
21
22
2A1
2A2
2A3
2A4
2A5
2B1
2B2
2B3
2B4
2B5
15
16
19
20
23
1
13
OE1#
OE2#
GND
12
5VDDCDA
5VDDCCL
CDLED#
HDDLED#
5VDDCDA
5VDDCCL
33
33
36
36
2.2K
VCC
3
4
7
8
11
COMPS_CON
29
29
29
31
C22
270PF_0603
1
C21
100PF_0603
1
10K
R74
U10
L9
1.8UH_0603
1
2
COMPS
R99
.1UF
R73
2
DAN217
15,36
C163
RB751V
1
TV Out CONN.
D39
SCROLLED#
NUMLED#
CAPSLED#
DRV0#
SCRLED5V# 33
NUMLED5V# 33
CAPSLED5V# 33
DRV05V# 33
CBTD_3384
4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
60
of
89
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
A4
E3
D2
D5
B4
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
D3
F4
A3
R4
E4
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
1
R212
12
@10
C327
@15PF
+3V_SW
R580 1
2 100K
+3V_ALW
ICH3_PME#
19,22,23
19,23
19,37
19,26,37
SM_INTRUDER#
SMLINK0
SMB_ALERT#/GPIO11
ICH3-M (1/2)
2
@100K
INT_IRQ14 19,21
INT_IRQ15 19,21
INT_SERIRQ 19,23,29,31
System
SMLINK1
Managment SMB_CLK
Interface SMB_DATA
PCI
Interface
1
R579
PCI_CLK
PCI_DEVSEL#
PCI_FRAME#
PCI_GPIO0/REQA#
PCI_GPIO1/REQB#/REQ5#
PCI_GPIO16/GNTA#
PCI_GPIO17/GNTB#/GNT5#
PCI_IRDY#
PCI_PAR
PCI_PERR#
PCI_LOCK#
PCI
PCI_PME#
Interface
PCI_RST#
PCI_SERR#
STOP#
PCI_TRDY#
Interrupt
Interface
2 LAN@100K
IR_DET
J19
J20
J21
B1
C1
B2
A2
A6
B5
C5
A5
AB14
W19
H22
V2
W2
Y4
Y2
W3
W4
Y3
V1
U3
T3
U2
T2
U4
U1
unMUX
GPIO
R578 1
CPU_A20GATE
CPU_A20M#
CPU_DPSLP#
CPU_FERR#
CPU_IGNNE#
CPU_INIT#
CPU
CPU_INTR
Interface
CPU_NMI
CPU_PWRGOOD
CPU_RCIN#
CPU_SLP#
CPU_SMI#
STPCLK#
T5
M3
F1
C4
D4
B6
B3
N3
G5
M2
M1
W1
Y1
L5
H2
H1
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
R525
100K
Place closely to
ICH3-M
CLK_ICHPCI
CLK_ICHPCI
CLK_ICHPCI 8
PCI_DEVSEL# 19,22,23,26,37
PCI_FRAME# 19,22,23,26,37
PCI_REQA# 19
PCI_REQB# 19
R222
@10
PCI_IRDY# 19,22,23,26,37
PCI_PAR 19,22,23,26,37
PCI_PERR# 19,22,23,37
PCI_LOCK# 19,23
ICH3_PME#
C328
@15PF
2
PCI_RST# 9,15,21,22,23,26,29,31,37
PCI_SERR# 19,22,23,37
PCI_STOP# 19,22,23,26,37
PCI_TRDY# 19,22,23,26,37
+1.5V_SW
Y6
AC3
AB2
AC4
AB5
AC5
SM_INTRUDER# 19
SMLINK0 19
SMLINK1 19
SMB_CLK 8,14,19
SMB_DATA 8,14,19
SMB_ALERT# 19
Y22
V23
AB22
J22
AA21
AB23
AA23
Y21
W23
U22
W21
Y23
U23
GATE20
29
H_A20M# 5
R233 1
H_FERR# 5
H_IGNNE# 5
H_INIT#
5
H_INTR
5
H_NMI
5
H_PWRGD 5
KBRST# 29
5,42
2 0
H_DPSLP#
H_SMI#
5
H_STPCLK# 5
CLK_ICH48
22,23,26,37
22,23,26,37
22,23,26,37
22,23,26,37
LPC
Interface
R577
2
100K
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
CLK_ICH14
AC'97
Interface
8
7
6
5
1 0
1 10K
1 10K
INT_APICCLK
INT_APICD0
INT_APICD1
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQE#/GPIO2
INT_PIRQF#/GPIO3
INT_PIRQG#/GPIO4
INT_PIRQH#/GPIO5
INT_IRQ14
INT_IRQ15
INT_SERIRQ
K2
K5
N1
R2
Geyserville
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
Power Management
AC_BITCLK
AC_RST#
AC_SDATAIN0
AC_SDATAIN1
AC_SDATAOUT
AC_SYNC
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PM_GMUXSEL/GPIO23
PM_CPUPREF#/GPIO22
PM_VGATE/VRMPWRGD
J2
K1
J4
K3
H5
K4
H3
L1
L2
G2
L4
H4
M4
J3
M5
J1
F5
N2
G4
P2
G1
P1
F2
P3
F3
R1
E2
N4
D1
P4
E1
P5
PM_AGPBUSY#/GPIO6
PM_AUXPWROK
PM_BATLOW#
PM_C3_STAT#/GPIO21
PM_CLKRUN#/GPIO24
PM_DPRSLPVR
PM_PWRBTN#
PM_PWROK
PM_RI#
PM_RSMRST#
PM_SLP_S1#/GPIO19
PM_SLP_S3#
PM_SLP_S5#
PM_STPCPU#/GPIO20
PM_STPPCI#/GPIO18
PM_SUS_CLK
PM_SUS_STAT#
PM_THRM#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
U20
Y20
V19
U16A
22,23,26,37 PCI_AD[0..31]
B7
D11
B11
C11
C7
A7
AGP_BUSY#
V4
Y5
AB3
V5
AC2
AB21
AB1
AA6
AA1
AA7
W20
AA5
AA2
V21
U21
AA4
AB4
U5
11
1
2
3
4
8P4R_100K
CLK_ICHAPIC
H_PICD0
H_PICD1
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
LAN_DET
IR_DET
S_GPIO4
S_GPIO5
IDE_PATADET
EC_SMI#
EC_SCI#
EC_LID_OUT#
@4.7K
25,29 PM_LANPWROK
R474 2
0
S_GPIO4
S_GPIO5
12
R225 2
R224 2
R213 2
LAN_DET
R401
19,29 PM_BATLOW#
PM_RSMRST# 1
+3V_SW
RP18
+3V_SW
PM_RSMRST#
+3V_SW
29,31
29,31
29,31
29,31
LPC_DRQ#1 31
LPC_FRAME# 29,31
WARM_RST# 34
SM_SEL0 14
PAL/NTSC# 15
GPIO_7
GPIO_8
GPIO_12
GPIO_13
GPIO_25
GPIO_27
GPIO_28
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
EC_SMI#
EC_SCI#
EC_LID_OUT#
IDE_PATADET
29
EC_SMI#
29
EC_SCI#
29 EC_LID_OUT#
21 IDE_PATADET
34,42
VGATE
5 PM_CPUPERF#
7,42 PM_SSMUXSEL
29
PM_THRM#
29,31 PM_SUS_STAT#
11,23,24 RTCCLK
8
PM_STPPCI#
8 PM_STPCPU#
29 PM_SLP_S5#
29 PM_SLP_S3#
8,29 PM_SLP_S1#
19 PM_RSMRST#
19,29 ICH_SWI#
34
PM_PWROK
29 PBTN_OUT#
7,42 PM_DPRSLPVR
19,22,23,29,31,37 PM_CLKRUN#
R566 22M_0603
1
R491
+RTCVCC
C690
1UF_0603
X3
R567
32.768KHZ
HUB_VSWING
HUB_VREF
HUB_RCOMP
HUB_PSTRB#
HUB_PSTRB
HUB_PAR
HUB_CLK
L19
L20
K19
P23
N22
R19
T19
R456
@33
LAN_RSTSYNC
LAN_JCLK
LAN_TXD2
LAN_TXD1
LAN_TXD0
LAN_RXD2
LAN_RXD1
LAN_RXD0
D10
EEP_SHCLK
E8
EEP_DOUT
D8
EEP_DIN
E9
EEP_CS
2 22
CLK_ICHHUB
CLK_ICHHUB 8
HUB_PSTRB 9
HUB_PSTRB# 9
1
R227
EEP_CS 25
EEP_DIN 25
EEP_DOUT 25
EEP_SHCLK 25
R5291
HUB_PD[0..10] 9
+VS_HUBVSWING
CLK_ICHHUB
LAN_RXD0 25
LAN_RXD1 25
LAN_RXD2 25
LAN_TXD0 25
LAN_TXD1 25
LAN_TXD2 25
LAN_JCLK 25
LAN_RSTSYNC 25
R220
1K
+VS_HUBREF
HUB_ICH_RCOMP
R482
1K
C713
12PF
2
C696
12PF
HUB_PD[0..10]
J1
JOPEN
2.4M_1%_0603
CLK_14
CLK_48
CLK_RTEST#
CLK_RTCX1
CLK_RTCX2
CLK_VBIAS
2
R472 15K
R211
1K
RTC_X1
RTC_X2
2
10M_0603
CLK_ICH14
CLK_ICH48
CLK_ICH14
CLK_ICH48
H_PICD0
H_PICD1
C334
.01UF
R186
@1K
Title
C686
@10PF
2
36.5_1%
C666
.01UF
R475
1
10M_0603
RTC_VBIAS
8
8
2
1K
1
R495
.047UF
C702
HubLink
Interface
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
+RTCVCC
EEPROM
Interface
LAN_CLK_ICH
82801
LAN
Interface
D7
C9
A10
C10
B9
A9
A8
C8
A1
A13
A16
A17
A20
A23
B8
B10
B13
B14
B15
B18
B19
B20
B22
C3
C6
F19
C14
C15
C16
C17
C18
C19
C20
C21
C22
D9
D13
D16
D17
D20
D21
D22
E5
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
Clocks
VSS
J23
F20
RTC_RST# Y7
RTC_X1
AC7
RTC_X2
AC6
RTC_VBIASAB7
19,22
19,37
19,23
19,26
19,37
@15PF
L22
M21
M23
N20
P21
R22
R20
T23
M19
P19
N19
C290
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
12
@10
22
37
23
26
37
R188
12
Close to ICH3-M.
Size
Document Number
Custom
Rev
2A
401200
Date:
A
, 10, 2002
Sheet
D
61
of
89
USB_D_PP0
USB_D_PN0
USB_D_PP1
USB_D_PN1
USB_D_PP2
USB_D_PN2
USB_D_PP3
USB_D_PN3
USB_D_PP4
USB_D_PN4
D27
1SS355
20
20
36
36
19
USB_RBIAS
ICH_SPKR
H23
SPKR
+1.8V_SW
U19
VCCA
F17
F18
K14
VCCPSUS3/VCCPUSB0
VCCPSUS4/VCCPUSB1
VCCPSUS5/VCCPUSB2
E10
V8
V9
VCCPSUS0
VCCPSUS1
VCCPSUS2
GPIO43
USB_BIAS
R196
+3V_SW
27
R154
18.2_1%
2 @1K
V3ALW_ICH
+3V_ALW
1
R181
VPLL_USB
J18
M14
R18
T18
VCCPHL0
VCCPHL1
VCCPHL2
VCCPHL3
P12
V15
V16
V17
V18
VCCPIDE0
VCCPIDE1
VCCPIDE2
VCCPIDE3
VCCPIDE4
G18
H18
VCCP0
VCCP1
F6
G6
H6
J6
M10
R6
T6
U6
VCCPPCI0
VCCPPCI1
VCCPPCI2
VCCPPCI3
VCCPPCI4
VCCPPCI5
VCCPPCI6
VCCPPCI7
A21
A22
VSS102
VSS103
B23
E7
T21
D6
T1
C2
N/C0
N/C1
N/C2
N/C3
N/C4
C23
P14
U18
V22
C13
W5
E6
W8
AB6
VCC_RTC
F7
F8
K10
+3V_SW
+1.8V_SW
82801
IDE_PDCS1#
IDE_PDCS3#
IDE_SDCS1#
IDE_SDCS3#
AC15
AB15
AC21
AC22
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_SDA0
IDE_SDA1
IDE_SDA2
AA14
AC14
AA15
AC20
AA19
AB20
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
W12
AB11
AA10
AC10
W11
Y9
AB9
AA9
AC9
Y10
W9
Y11
AB10
AC11
AA11
AC12
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
Y17
W17
AC17
AB16
W16
Y14
AA13
W15
W13
Y16
Y15
AC16
AB17
AA17
Y18
AC18
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_PDDACK#
IDE_SDDACK#
IDE_PDDREQ
IDE_SDDREQ
IDE_PDIOR#
IDE_SDIOR#
IDE_PDIOW#
IDE_SDIOW#
IDE_PIORDY
IDE_SIORDY
Y13
Y19
AB12
AB18
AC13
AC19
Y12
AA18
AB13
AB19
Power
USB
Interface
ICH3-M (2/2)
IDE
Interface
Misc
Power
VSS
+3V_SW
VCCUSBPLL/VCC_SUS9
B21
ICH_ACIN
VCCUSBBG/VCC_SUS8
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43
21 ICH_IDE_PRST#
21 ICH_IDE_SRST#
7
AC_VID0
7
AC_VID1
7
AC_VID2
7
AC_VID3
7
AC_VID4
19
FWH_WP#
19
FWH_TBL#
30
EC_FLASH#
VCCPCPU0
VCCPCPU1
VCCPCPU2
H20
G22
F21
G19
E22
E21
H21
G23
F23
G21
D23
E23
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
VCC5REFSUS1
VCC5REFSUS2
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_D_PN0
USB_D_PN1
USB_D_PN2
USB_D_PN3
USB_D_PN4
VCC5REF1
VCC5REF2
E12
D12
C12
B12
A12
A11
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
8
7
6
5
F15
F16
USB_PP0
USB_PP1
USB_PP2
USB_PP3
USB_PP4
USB_PP5
USB_PN#0
USB_PN#1
USB_PN#2
USB_PN#3
USB_PN#4
USB_PN#5
1
2
3
4
E13
F14
K12
P10
V6
V7
D19
A19
E17
B17
D15
A15
D18
A18
E16
B16
D14
A14
VCC_AUX0/VCCLAN1_8
VCC_AUX1/VCCLAN1_8
VCC_AUX2/VCCLAN1_8
USB_D_PP0
USB_D_PP1
USB_D_PP2
USB_D_PP3
USB_D_PP4
VCC_USB0/VCC_SUS6
VCC_USB1/VCC_SUS7
RP19
8P4R_100K
IDE_PDCS1#
IDE_PDCS3#
IDE_SDCS1#
IDE_SDCS3#
21
21
21
21
IDE_PDA0 21
IDE_PDA1 21
IDE_PDA2 21
IDE_SDA0 21
IDE_SDA1 21
IDE_SDA2 21
IDE_PDD[0..15] 21
IDE_SDD[0..15] 21
IDE_PDDACK# 21
IDE_SDDACK# 21
IDE_PDDREQ 21
IDE_SDDREQ 21
IDE_PDIOR# 21
IDE_SDIOR# 21
IDE_PDIOW# 21
IDE_SDIOW# 21
IDE_PIORDY 21
IDE_SIORDY 21
E14
VSS35
E15
VSS36
E18
VSS37
E19
VSS38
E20
VSS39
F22
VSS40
G3
VSS41
G20
VSS42
H19
VSS43
AA22
VSS44
J5
VSS45
K11
VSS46
K13
VSS47
K20
VSS48
K21
VSS49
K22
VSS50
K23
VSS51
L3
VSS52
L10
VSS53
L11
VSS54
L12
VSS55
L13
VSS56
L14
VSS57
L21
VSS58
L23
VSS59
M11
VSS60
M12
VSS61
M13
VSS62
M20
VSS63
M22
VSS64
N5
VSS65
N10
VSS66
N11
VSS67
N12
VSS68
N13
VSS69
N14
VSS70
N21
VSS71
N23
VSS72
P11
VSS73
P13
VSS74
P20
VSS75
P22
VSS76
R3
VSS77
R5
VSS78
R21
VSS79
R23
VSS80
T4
VSS81
T20
VSS82
T22
VSS83
V3
VSS84
AC23
VSS85
V20
VSS86
W6
VSS87
W7
VSS88
W10
VSS89
W14
VSS90
W18
VSS91
W22
VSS92
Y8
VSS93
AA3
VSS94
AA8
VSS95
AA12
VSS96
AA16
VSS97
AA20
VSS98
AB8
VSS99
AC1
VSS100
AC8
VSS101
+3V_ALW
VCC_SUS0
VCC_SUS1
VCC_SUS2
VCC_SUS3
VCC_SUS4
VCC_SUS5
U16B
FBM-L10-160808-301
FBM-L10-160808-301
FBM-L10-160808-301
FBM-L10-160808-301
FBM-L10-160808-301
FBM-L10-160808-301
2
VCCP_AUX
C705
BLM21A601SPT
1UF_0603
+1.8V_ALW
2
2
2
2
2
2
20
20
20
20
36
36
36
36
20
20
+1.8V_ALW
+3V_ALW
+1.5V_SW
+V1.8_ICHLAN
L47
1
F9
F10
+1.8V_ALW
1
1
1
1
1
1
C599
.1UF
+RTCVCC
VCCPAUX0/VCCLAN3_3
VCCPAUX1/VCCLAN3_3
C714
@1UF_0603
2
C709
.1UF
VCC5REF
L27
L26
L19
L18
L25
L24
USB_PP0
USB_PN0
USB_PP1
USB_PN1
USB_PP2
USB_PN2
USB_PP3
USB_PN3
USB_PP4
USB_PN4
E11
K6
K18
P6
P18
V10
V14
+3V_ALW
1
VCCCORE0
VCCCORE1
VCCCORE2
VCCCORE3
VCCCORE4
VCCCORE5
VCCCORE6
+5V_SW +3V_SW
R493
1K
100K
29,38,40
ACIN
1
D13
2
RB751V
1
R601
2 ICH_ACIN
100K
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
62
of
89
+3V_SW
RP8
+3V_SW
1
2
3
4
18
FWH_WP#
18
FWH_TBL#
17,22,23,29,31,37 PM_CLKRUN#
+3V_SW
8
7
6
5
R200 1
17,22,23,26,37 PCI_PAR
100
RP6
8P4R_10K
+3V_ALW
17,29 ICH_SWI#
10P8R_8.2K
R461 1
100K
R466 1
100K
+3V_ALW
17,29 PM_BATLOW#
+3V_SW
17 SMB_ALERT#
+3V_SW
C341
.1UF
C340
.1UF
C660
C678
1UF_0603 .1UF
2
C338
1UF_0603
10P8R_8.2K
+3V_SW
PCI_REQ#2 17,23
PCI_REQ#3 17,26
PCI_REQ#4 17,37
INT_SERIRQ 17,23,29,31
+1.5V_SW
10
9
8
7
6
1
2
3
4
5
PCI_REQA#
PCI_REQB#
PCI_REQ#0
PCI_REQ#1
100K
2
+5V_SW
RP20
17
17
17,22
17,37
R550
1
PCI_SERR# 17,22,23,37
PCI_DEVSEL# 17,22,23,26,37
PCI_PERR# 17,22,23,37
PCI_LOCK# 17,23
C661
.1UF
2
10
9
8
7
6
1
2
3
4
5
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
17,22,23,26,37
17,22,23,26,37
17,22,23,26,37
17,22,23,26,37
+3V_SW
RP17
C646
.1UF
2
C675
.1UF
2
C658
47PF
2
C621
.1UF
1
C610
.1UF
2
C624
47PF
2
C667
.1UF
2
C657
.1UF
1
C656
.1UF
C662
47PF
C674
.1UF
C673
.1UF
1
C672
47PF
C622
.1UF
C617
.1UF
1
C625
47PF
C616
.1UF
C645
.1UF
C336
22UF_1206_10V
+
C337
22UF_1206_10V
10P8R_8.2K
+3V_SW
INT_IRQ15 17,21
INT_PIRQA# 17,22,23
INT_PIRQB# 17,23
INT_PIRQC# 17,37
10
9
8
7
6
1
2
3
4
5
GPIO43
18
17,26,37 INT_PIRQD#
17,21 INT_IRQ14
+3V_ALW
+
C262
.1UF
2
C264
.1UF
2
C261
.1UF
2
C263
.1UF
C249
22UF_1206_10V
+3V_ALW
+1.8V_ALW
+
C246
.1UF
C250
.1UF
C251
.1UF
2
C243
22UF_10V_1206
2
C677
.1UF
2
C676
.1UF
2
C604
33PF
2
C630
.1UF
2
C644
.1UF
2
C651
33PF
2
C639
.1UF
2
C325
100UF_D2_6.3V
2.2K
2.2K
100K
100K
2
2
2
2
1
1
1
1
+1.8V_SW
8,14,17 SMB_DATA
8,14,17 SMB_CLK
17
SMLINK0
17
SMLINK1
R556
R557
R558
R559
+RTCVCC
17 SM_INTRUDER#
1
R476
+3V_ALW
2
8.2K
R538
1
@0
2
R473
0
1
G_RST#
22,23,24,29
+3V_ALW
+3V_ALW
+3V_ALW
R359
74LVC14
11
10
U63
1
14
U36E
4
7SH08
3
C549
.47UF_0603
2
R354
PM_RSMRST# 17
EC_RST#
U36D
74LVC14
0
2
1
29,34
14
47K
R549
1
330K
30
EC_GRST#
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
63
of
89
USB Interface
+5V_ALW
USB_OC#0 18
USB_OC#1 18
C374
OC1#
OUT1
OUT2
OC2#
GND
IN
EN1#
EN2#
TPS2042
4.7UF_10V_0805
C383
18
18
USB_PN0
USB_PP0
USB_PN1 18
USB_PP1 18
USBPWR_AS
C60
.1UF
1UF_0603
2
1UF_0603
USBPWR_BS
JP4
C61
.1UF
+ C35
1000PF
2
C39
150UF_D2_16V
2 USB_CPN0 2
FBM-L10-160808-301
USB_CPP0 3
2
FBM-L10-160808-301
4
VCC
D0-
D1-
D0+
D1+
VSS
VSS
VCC
USB_BS
USB_CPN12
L30
USB_CPP12
L29
USB_AS
1
L32
1
L31
1
FBM-L10-160808-301
1
FBM-L10-160808-301
C369+
C367
1000PF 150UF_D2_16V
2
8
7
6
5
AXN420C530P
C380
BT_ON# 30
BT_PRES# 30
1
2
3
4
30 BT_RST#
2
4
6
8
10
12
14
16
18
20
1
18 USB_PP4
18 USB_PN4
1
3
5
7
9
11
13
15
17
19
10K
JP13
BT_WAKE_UP
R263
10K
U26
Bluetooth Connector
30 BT_DETACH
30 BT_WAKE_UP
R260
+3V_ALW
USBPWR_BS
+5V_ALW
+3V_ALW
USBPWR_AS
BlueTooth Interface
11
G3
G1
12
G4
G2
10
Molex-67300
USB_CPP1
1
C762
USB_CPN1
USB_CPP0
1
C34
15PF
15PF
C370
2
C763
15PF
15PF
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
64
of
89
+5V_SW
9,15,17,22,23,26,29,31,37
U24
1
+3V_SW
HDD_RST#
+5V_SW
PCI_RST#
1
R243
2 IDE_PIORDY
4.7K
1
R240
2 IDE_PDDREQ
@5.6K
2 IDE_SIORDY
4.7K
1
R239
2 IDE_SDDREQ
@5.6K
7SH08
18 ICH_IDE_PRST#
+5V_SW
HDD Connector
R241
@10K
2
JP22
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
Layout note :
+5V_SW
+5V_SW
C349
.1UF
C715
1000PF
C347
22UF_1206_10V
2
C717
22UF_1206_10V
HDD CONN
+5V_SW
IDE_PDA2 18
IDE_PDCS3# 18
1
IDE_PDA2
IDE_PDCS3#
Layout note :
C344
.1UF
C343
1000PF
2
IDE_PD_CSEL
IDE_PDDREQ
IDE_PDIOW#
IDE_PDIOR#
IDE_PIORDY
IDE_PDDACK#
INT_IRQ14
IDE_PDA1
IDE_PDA0
IDE_PDCS1#
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
18 IDE_PDDREQ
18 IDE_PDIOW#
18 IDE_PDIOR#
18 IDE_PIORDY
18 IDE_PDDACK#
17,19 INT_IRQ14
18
IDE_PDA1
18
IDE_PDA0
18 IDE_PDCS1#
16 HDDLED_CON#
+5V_SW
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
R242
100K
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
IDE_PATADET 17
18 IDE_PDD[0..15]
1
R238
IDE_PDD[0..15]
18 ICH_IDE_SRST#
9,15,17,22,23,26,29,31,37
PCI_RST#
+5V_SW
U8
1
CDR_RST#
4
2
3
7SH08
+5V_SW
CD-ROM Connector
18 IDE_SDD[0..15]
JP23
C769
10UF_10V_1206
+5V_SW
18
18
17,19
18
18
18
16
CDR_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0
IDE_SDIOW#
IDE_SIORDY
INT_IRQ15
IDE_SDA1
IDE_SDA0
IDE_SDCS1#
CDLED_CON#
2
R235
1 SEC_CSEL
470
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
INT_CD_R 26
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDDREQ 18
IDE_SDIOR# 18
IDE_SDDACK# 18
R237 1
2 100K
IDE_SDA2 18
IDE_SDCS3# 18
W=80mils
INT_CD_L
CD_AGND
C345
.1UF
2
26
26
CD-ROM CONN.
4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
65
of
89
+3V_ALW
1
R197
R198
@100K
@100K
@100K
ID: AD16
17,19,23,26,37
17,19,23,26,37
17,19,23,26,37
17,19,23,26,37
17,19,23,26,37
17,19,23,37
17,19,23
30
17,19,23,37
17,19,23,26,37
17,19,23,29,31,37
9,15,17,21,23,26,29,31,37
PCI_AD16
1R187
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
INT_PIRQA#
1394_PME#
PCI_SERR#
PCI_PAR
PM_CLKRUN#
PCI_RST#
1
2
C301
C308
C307
C304
C295
C284
@.1UF
@.1UF
2
@.1UF
2
@.1UF
2
@.1UF
2
@.1UF
C234
C233
C272
C268
2 @6.34K_1%
C232
R179
R1
119
X0
X1
FILTER0
FILTER1
C312 1
2 @15PF
@24.576MHz
C311 1
2 @15PF
X1
FILTER
C305 1
2 @.1UF
92
SDA_1395
R131 1
2 @220
SCL
91
SCL_1394
R123 1
2 @220
PC0
PC1
PC2
99
98
97
POWER CLASS
PHY PORT 1
TPBIAS0
TPA0+
TPA0TPB0 +
TPB0 -
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
TEST9
TEST8
94
95
TEST3
TEST2
TEST1
TEST0
101
102
104
105
XTPBIAS0
XTPA0+
XTPA0XTPB0+
XTPB0-
R248
@56.2_1%
XTPBIAS0
XTPA0+
XTPA0XTPB0+
XTPB0-
R247
@56.2_1%
C350
@1UF_25V_0805
U19
JP5
L1
1
2
3
4
17
23
33
44
55
64
68
75
83
103
116
115
114
113
112
8
7
6
5
PA0+_C
PA0-_C
PB0+_C
PB0-_C
4
3
2
1
5
6
@1394_CONN 4PIN
@IEEE1394-COILS
R244
@56.2_1%
C231
2
@.1UF
1
@.1UF
@.1UF
2 @1K
2 @1K
R246
@56.2_1%
C302
1
2
@.1UF
OSCILLATOR
AGND
AGND
AGND
AGND
AGND
AGND
AGND
GPIO3
GPIO2
C303
2 @.1UF
Near 1394 IC
PLLGND1
89
90
C297 1
109
110
111
117
126
127
128
1
1 @220
@220
118
86
96
10
11
CYCLEOUT
CNA
TEST17
TEST16
87
VDDP
VDDP
VDDP
VDDP
VDDP
BIAS CURRENT
2
2
9
30
93
R124
R132
R0
+3V_ALW
2 @1K
C281
PHY PORT 2
G_RST
REG_EN#
REG18
REG18
14
R190 1
R185 1
@4.7UF_10V_0805
19,23,24,29 G_RST#
125
124
123
122
121
C320
@.01UF
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
CLK_1394
PCI_GNT#0
PCI_REQ#0
TPBIAS1
TPA1+
TPA1TPB1+
TPB1-
C306
17,23,26,37
17,23,26,37
17,23,26,37
17,23,26,37
8
17
17,19
106
VPLL_1394
@15PF
CPS
R167 1
2 @0_0805
C319
L28
12
@10
TSB43AB22
15
27
39
51
59
72
88
100
7
1
2
107
108
120
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PLLVDD
AVDD
AVDD
AVDD
AVDD
AVDD
R201
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA
PCI_PME
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST
+3V_ALW
CLK_1394
22
24
25
26
28
29
31
32
37
38
40
41
42
43
45
46
61
63
65
66
67
69
70
71
74
76
77
79
80
81
82
84
34
47
60
73
16
18
19
2@100 36
49
50
52
53
54
56
13
21
57
58
12
85
CYCLEIN
20
35
48
62
78
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
R136
2
2
@100K
@100K
1
1
1
R130
17,23,26,37 PCI_AD[0..31]
R116
C351
R245
@5.11K
@220PF
A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
1
66
of
89
S1_IOWR#
S1_IORD#
S1_OE#
S1_CE2#
S1_IOWR# 24
S1_IORD# 24
S1_OE#
24
S1_CE2# 24
S1_A[0..25]
S1_D[0..15]
+3V_ALW
+3V_SW +3V_SW
S1_A[0..25] 24
S1_D[0..15] 24
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
G_RST#
19,22,24,29
S1_VCC
163
208
72
128
133
193
IRQ12/PME#
IRQ14/CLKRUN#
IRQ15/RI_OUT#
SPKR_OUT#
LEDO#/SKTA_ACTV
IRQ11/SKTB_ACTV
17,19,29,31 INT_SERIRQ
205
206
IRQ5/SERIRQ#
IRQ7/SIN#/B_VPP_PGM
2
1
GND
GND
GND
GND
GND
GND
GND
GND
C563
.1UF
C607
.1UF
C682
.1UF
79
134
180
124
122
121
120
119
116
113
111
109
107
105
103
102
100
99
83
81
80
78
77
75
74
73
71
68
67
66
65
64
63
62
59
A_D10/CAD31
A_D9/CAD30
A_D1/CAD29
A_D8/CAD28
A_D0/CAD27
A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A25/CAD19
A_A7/CAD18
A_A24/CAD17
A_A17/CAD16
A_IOWR/CAD15
A_A9/CAD14
A_IORD#/CAD13
A_A11/CAD12
A_OE#/CAD11
A_CE2#/CAD10
A_A10/CAD9
A_D15/CAD8
A_D7/CAD7
A_D13/CAD6
A_D6/CAD5
A_D12/CAD4
A_D5/CAD3
A_D11/CAD2
A_D4/CAD1
A_D3/CAD0
GRST#
A_SKT_VCC
A_SKT_VCC
117
98
60
A_REG#/CCBE3#
A_A12/CCBE2#
A_A8/CCBE1#
A_CE1#/CCBE0#
112
97
82
70
C580
C649
C659
.1UF
.1UF
.1UF
S1_REG# 24
S1_A12
S1_A8
S1_CE1# 24
A_A16/CCLK
A_A23/CFRAME#
A_A15/CIRDY#
A_A22/CTRDY#
A_A21/CDEVSEL#
A_A20/CSTOP#
A_A13/CPAR
A_A14/CPERR#
A_WAIT#/CSERR#
A_INPACK#/CREQ#
A_WE#/CGNT#
A_RDY_IRQ#/CINT#
A_A19/CBLOCK#
A_WP/CCLKRUN#
A_RST/CRST#
A_R2_D2/RFU
A_R2_D14/RFU
A_R2_A18/RFU
A_VS1/CVS1
A_VS2/CVS2
A_CD1#/CCD1#
A_CD2#/CCD2#
A_BVD2/CAUDIO
A_BVD1/CSTSCHG
93 R421 1
2 33
S1_A23
96
S1_A15
95
S1_A22
94
S1_A21
92
S1_A20
90
S1_A13
84
S1_A14
86
108
110
89
91
S1_A19
88
125
106
S1_D2
123
S1_D14
69
S1_A18
85
76
104
61
126
114
118
B_BVD1/CSTCHG
B_BVD2/CAUDIO
B_CD2#/CCD2#
B_CD1#/CCD1#
B_VS2/CVS2
B_VS1/CVS1
B_R2_A18/RFU
B_R2_D14/RFU
B_R2_D2/RFU
B_RST/CRST#
B_WP/CCLKRUN#
B_A19/CBLOCK#
B_RDY_IRQ#/CINT#
B_WE#/CGNT#
B_INPACK#/CREQ#
B_WAIT#/CSERR#
B_A14/CPERR#
B_A13/CPAR
B_A20/CSTOP#
B_A21/CDEVSEL#
B_A22/CTRDY#
B_A15/CIRDY#
B_A23/CFRAME#
B_A16/CCLK
192
190
202
136
179
152
161
145
198
182
201
164
167
165
186
184
162
159
166
168
170
171
172
169
B_CE1#/CCBE0#
B_A8/CCBE1#
B_A12/CCBE2#
B_REG#/CCBE3#
147
157
173
188
B_SKT_VCC
B_SKT_VCC
B_SKT_VCC
143
160
200
S1_A16
S1_WAIT# 24
S1_INPACK# 24
S1_WE# 24
S1_RDY# 24
S1_WP
S1_RST
24
24
S1_VS1
S1_VS2
S1_CD1#
S1_CD2#
S1_BVD2
S1_BVD1
24
24
24
24
24
24
S2_BVD1
S2_BVD2
S2_CD2#
S2_CD1#
S2_VS2
S2_VS1
24
24
24
24
24
24
S2_RST
S2_WP
24
24
S2_A18
S2_D14
S2_D2
S2_A19
S2_A14
S2_A13
S2_A20
S2_A21
S2_A22
S2_A15
S2_A23
1
R418
S2_RDY# 24
S2_WE# 24
S2_INPACK# 24
S2_WAIT# 24
2
33
S2_A16
S2_CE1#
S2_A8
S2_A12
24
S2_REG# 24
S2_VCC
C684
C650
C583
.1UF
.1UF
.1UF
OZ6933TQFP
C605
4.7UF_10V_0805
CORE_VCC
CORE_VCC
CORE_VCC
S2_D10
S2_D9
S2_D1
S2_D8
S2_D0
S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A25
S2_A7
S2_A24
S2_A17
14
26
28
44
57
101
129
177
1
+3V_SW
U37
S2_A10
S2_D15
S2_D7
S2_D13
S2_D6
S2_D12
S2_D5
S2_D11
S2_D4
S2_D3
30
PCM_PME#
17,19,22,29,31,37 PM_CLKRUN#
32
PCM_RI#
27
CB_SPK#
S2_A11
IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PERR#
SERR#
PCI_REQ#
PCI_GNT#
IRQ9/INTA#
IRQ4/INTB#/A_VPP_PGM
LOCK#
RST#
CardBus Controller
OZ6933T (TQFP)
S2_A9
15
1
31
27
29
30
32
35
33
34
3
2
203
204
58
207
17,22,26,37 PCI_AD20
8
CLK_PCI_CB
17,19,22,26,37 PCI_DEVSEL#
17,19,22,26,37 PCI_FRAME#
R355
17,19,22,26,37 PCI_IRDY#
@33
17,19,22,26,37 PCI_TRDY#
17,19,22,26,37 PCI_STOP#
17,19,22,26,37 PCI_PAR
17,19,22,37 PCI_PERR#
C557
17,19,22,37 PCI_SERR#
@10PF
17,19 PCI_REQ#2
17
PCI_GNT#2
17,19,22 INT_PIRQA#
17,19 INT_PIRQB#
17,19 PCI_LOCK#
9,15,17,21,22,26,29,31,37 PCI_RST#
CLK_PCI_CB
C/BE3#
C/BE2#
C/BE1#
C/BE0#
B_D10/CAD31
B_D9/CAD30
B_D1/CAD29
B_D8/CAD28
B_D0/CAD27
B_A0/CAD26
B_A1/CAD25
B_A2/CAD24
B_A3/CAD23
B_A4/CAD22
B_A5/CAD21
B_A6/CAD20
B_A25/CAD19
B_A7/CAD18
B_A24/CAD17
B_A17/CAD16
B_IOWR#/CAD15
B_A9/CAD14
B_IORD#/CAD13
B_A11/CAD12
B_OE#/CAD11
B_CE2#/CAD10
B_A10/CAD9
B_D15/CAD8
B_D7/CAD7
B_D13/CAD6
B_D6/CAD5
B_D12/CAD4
B_D5/CAD3
B_D11/CAD2
B_D4/CAD1
B_D3/CAD0
R358
100
1
2
CLK_PCI_CB
13
25
36
47
199
197
196
195
194
191
189
187
185
183
181
178
176
175
174
158
156
155
154
153
151
150
149
148
144
142
141
140
139
138
137
135
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
IRQ3/A_VCC_3#
SCLK/A_VCC_5#
SDATA/B_VCC_3#
SLATCH/SMBCLK/B_VCC_5#
IRQ9/A_VPP_VCC_PGM
IRQ10/B_VPP_VCC_PGM
17,22,26,37
17,22,26,37
17,22,26,37
17,22,26,37
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
87
132
131
130
115
146
4
5
7
8
9
10
11
12
16
17
18
19
20
22
23
24
38
39
40
41
42
43
45
46
48
49
51
52
53
54
55
56
PCI_VCC
PCI_VCC
PCI_VCC
PCI_VCC
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
AUX_VCC
17,22,26,37 PCI_AD[0..31]
6
21
37
50
127
+3V_ALW
+3V_SW
C681
C612
.1UF
C561
.1UF
C565
.1UF
C564
.1UF
SLATCH
SLDATA
RTCCLK
24
24
11,17,24
.1UF
S2_CE2#
S2_OE#
S2_IORD#
S2_IOWR#
S2_A[0..25]
S2_D[0..15]
S2_CE2# 24
S2_OE#
24
S2_IORD# 24
S2_IOWR# 24
S2_A[0..25] 24
S2_D[0..15] 24
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
67
of
89
+3V_ALW
JP7
DL@22PF
VCCR_LAN
+
C488
DL@.1UF
LAN_TD+ 1
1
2
DL@4.7UH
1
L45
C490
C477
C468
C472
C466
DL@.1UFDL@.1UFDL@.1UFDL@.1UF
DL@4.7UF_10V_0805
C517
DL@4.7UF_10V_0805
X2
C457
LAN_X1
R309
2 LAN_TDDL@100_1%
36
36
LAN_TX+
LAN_TX-
RJ45_TX+
RJ45_TX-
L37
L38
1
1
2 DL@0_0805
2 DL@0_0805
TX+_CON
TX-_CON
36
36
LAN_RX+
LAN_RX-
RJ45_RX+
RJ45_RX-
L41
L42
1
1
2 DL@0_0805
2 DL@0_0805
RX+_CON
RX-_CON
1
2
3
4
5
6
1
2
3
4
5
6
DL@25MHZ
S
3
DL@82562ET
LAN_X2
LAN_X1
LAN_LILED#
DL@H0013
C460
@.01UF
C459
DL@1000PF
X2
X1
47
46
LAN_TD+
LAN_TD-
HEADER 2
C394
220PF_3KV_1808
LAN_ACTLED#
32
31
27
C393
220PF_3KV_1808
2
ACTLED#
SPDLED#
LILED#
2 DL@619_1%
2 DL@549_1%
RX+_CON
RX-_CON
16
15
14
13
12
11
10
9
TX+_CON
TX-_CON
1
R306 1
R304 1
RX+
RXCT
NC
NC
CT
TX+
TX-
RD+
RDCT
NC
NC
CT
TD+
TD-
R272
DL@75_1%
R271
DL@75_1%
2
5
4
1
2
3
4
5
6
7
8
RBIAS100
RBIAS10
U27
LAN_RD+
LAN_RD-
VSSA
VSSA2
VSSR
VSSR
Q42
DL@2N7002
= LAN_RST#
19
23
ADV10
ISOL_TCK
ISOL_TI
ISOL_TEX
TOUT
TESTEN
RDP
RDN
LAN_RD+
LAN_RD-
41
30
28
29
26
21
2
G
17,29 PM_LANPWROK
TP_LAN_ADV
LAN_TCK
LAN_TI
LAN_EX
TP_LAN_TOUT
LAN_TESTEN
LAN_TD+
LAN_TD-
15
16
LAN_GND
C408
DL@1000PF_1206_2KV
3
6
20
22
LAN_TCK
LAN_TI
LAN_EX
LAN_TESTEN
10
11
If LAN is enable,
PM_LANPWROK
waits for PM_PWROK
to go high and stays high in S3
Kinnereth
TDP
TDN
1
2
R338
2 TP_LAN_TOUT
@0
VSS
VSS
VSS
VSS
VSS
VSSP
VSSP
JCLK
JRSTSYNC
JTXD[2]
JTXD[1]
JTXD[0]
JRXD[2]
JRXD[1]
JRXD[0]
1
TP_LAN_ADV
39
42
45
44
43
37
35
34
JP12
MOD_RING
MOD_TIP
17
LAN_JCLK
17 LAN_RSTSYNC
17
LAN_TXD2
17
LAN_TXD1
R347
17
LAN_TXD0
DL@100K
17
LAN_RXD2
17
LAN_RXD1
17
LAN_RXD0
+3V_ALW
@33
KIN_CLK
KIN_RST
KIN_TXD2
KIN_TXD1
KIN_TXD0
KIN_RXD2
KIN_RXD1
KIN_RXD0
@10PF
@HEADER 6
DL@22PF
R339
VCC
VCC
VCCP
VCCP
VCCA
VCCA2
VCCT
VCCT
VCCT
VCCT
C535
2
1 2
VCCR
VCCR
LAN_X2
8
13
18
24
48
33
38
1
25
36
40
2
7
9
12
14
17
C458
2
U29
1
2
3
4
EEP_CS
EEP_SHCLK
EEP_DOUT
EEP_DIN
CS
SK
DI
DO
VCC
DC
ORG
GND
+3V_ALW
8
7
6
5
1
R236
2
DL@10K
DL@AT93C46-10SC-2.7
JP8
Layout note :
Cassis LANGND
should cover part
of U22.
RJ45_TX+
TX+
RJ45_TX-
TX-
RJ45_RX+
RJ45_RX-
GND
13
CATHODE1
15
RX+
N/C
N/C
ANODE1
N/C
N/C
N/C
330
+3V_ALW
GRN_LED_P
R379
@100K
R546
@100K
ORE_LED_P
CATHODE2
RING
TIP
12
N/C
LAN_ACTLED#
R368
R387
@0
ORE_LED_N
17
LED2_YELN
Orange Led
R257
RX-
11
R258
75_1%
LED1_GRNN 37
+3V_SW
GRN_LED_P
16
@0
10
MOD_TIP
LAN_LILED#
LED1_GRNN
R39
Green Led
MOD_RING
VH1
DSSA-P3100SB
0
R30
GRN_LED_N
ANODE2
18
GND
14
ORE_LED_P
R264
220
LED2_YELN 37
+3V_ALW
R259
75_1%
RJ-45 & RJ-11
LAN_GND
GRN_LED_N
GRN_LED_P
ORE_LED_N
ORE_LED_P
C368
47PF
C366
47PF
C379
47PF
47PF
C382
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
69
of
89
+5V_ALW
C160
.1UF
+5V_AMP
Vin
FB
Limit
NC
GATE
COMP
GND
+5V_AMP
C293
+
C296
.1UF
22UF_10V_1206
16V
C291 @4700PFR592
4.7UF_10V_0805
@LP2975-ADJ
1000PF .1UF
@1.2K_1%
Place component's
to ES1988
U67
2
22UF_10V_1206
PCI_AD[0..31]
PCI_C/BE#[0..3]
VIN
16V
GND
SD
5VAUD_GATE
ADJ
VOUT
1
R594
2
C167
@33PF
LINE_IN_L
LINE_IN_R
79
80
LINE_OUT_L
LINE_OUT_R
C269
C275
1000PF
.1UF
.1UF
1UF_0603
C585
10UF_10V_1206
R139
6.8K
1
R141 6.8K
CD_R_R
2
49
48
47
63
62
61
60
56
53
52
51
50
59
85
84
39
C/BE3#
C/BE2#
C/BE1#
C/BE0#
PME# / SPDIFO / VOLDN#
SPDIFO / R0# / IDSEL
PAR
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
VAUX
54
2
19
18
17
16
15
14
55
1
R143
6.8K
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
R95
17,22,23,37
17,22,23,37
17,22,23,37
17,22,23,37
100_0805
2 R166
100
AUD_PME# 30
1 PCI_AD19ID#:AD19
38
+3V_ALW
@20K
1
C252
CDROM_AGND
2
.1UF_0603
C274
.01UF
R576
@20K
INT_CD_L
INT_CD_R
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 16, 2002
Date:
6.8K
C267
1UF_0603
16V
R575
@20K
R158
C179
.01UF
C772 @10UF_16V_1206
1
16V
1
2
6.8K
C178
1UF_0603
C278
CD_AGND
AUD_VREF
@20K
21
@15PF
R530
C771 @10UF_16V_1206
R165
2N7002
R531
12
+3V_SW
C692
C703
22UF_10V_1206 1UF_0603
+3V_SW
+
R169
@10
C766
22UF_10V_1206
Q17
+3V_ALW
+5V_SW
2
G
SUSP
PCI_PAR 17,19,22,23,37
PCI_STOP# 17,19,22,23,37
PCI_DEVSEL# 17,19,22,23,37
PCI_TRDY# 17,19,22,23,37
PCI_IRDY# 17,19,22,23,37
PCI_FRAME# 17,19,22,23,37
CD_L_R
INT_PIRQD# 17,19,37
PCI_RST# 9,15,17,21,22,23,29,31,37
1
13
20
30
1
R129 6.8K
2
R370 0
INT_CD_R
87
86
+5V_AMP
CLK_PCI_AUD 8
21
INT#
RST#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
INT_CD_L
88
38
37
36
35
34
33
32
31
29
28
27
26
25
24
23
22
11
10
9
8
7
6
5
4
100
99
98
97
96
95
94
93
2
21
AVSS1
AVSS2
GND
GND
GND
GND
PCI_REQ#3 17,19
PCI_GNT#3 17
C576
10UF_10V_1206
73
82
89
40
21
3
PCICLK
AUD_VREF
2
1
2R172 0 1
R171 0
CLK_PCI_AUD
C265
AFILT1
AFILT2
VCM
VREFADC
REQ#
GNT#
92
91
75
76
77
78
74
10UF_10V_1206
70
71
VREF
C518
.1UF
CD_GND
CD_L
CD_R
C525
MIC
67
66
68
72
83
69
AVDD1
AVDD2
PHONE
MONO_OUT
VCC
VCC
VCC
1
2
C228 1UF_0603 1
2
C245 1UF_0603
1
2
C273 1UF_0603 1
2
C247 1UF_0603
1
2
C597 1UF_0603
1
2
C596 1UF_0603
1000PF
1UF_0603
ESS_VOL_DW#
+5V_AMP
+5V_AMP
90
41
12
PC_BEEP
65
81
CLKRUN# / ECS
64
U15
ES1988
1
2
C218 1UF_0603 1
2
C270 1UF_0603
C508
C507
29 EC_VOL_DW#
R331 10K
2
1
GPIO15 / GD7
GPIO14 / GD6
GPIO13 / GD5
GPIO12 / PCGNT# / GTO# / GS0
GPIO11 / SDO2 / VauxD
GPIO10 / SCLK2
GPIO9 / SDFS2
GPIO8 / SDI2
GPIO7 / MC97_DI / PCREQ# / VOLUP#
GPIO6 / ISDATA / R0#
GPIO5 / ISLR / GS0 / GT0#
GPIO4 / ISCLK / SIRQ#
GPIO3 / SRESET2
GPIO2 / TXD
GPIO1 / RXD
OSCI
OSCO
C257
ESS_VOL_UP#
R377 1K
1
2
+3V_SW
46
45
44
43
42
1
6.8K
1
0
R173 1
6.8K
R178 1
6.8K
2
R145 1
6.8K
2
R160
2
1
6.8K
10K
2
LEFT_EQ
RIGHT_EQ
28
28
R376 1K
2
MD_SDATAI 37
MD_RST# 37
GD4
GD3 / ECLK / VOLDN#
GD2 / EDIN / VOLUP#
GD1 / EDOUT
GD0
1
6.8K2
1
R138
2 6.8K
2
1 R175
R174 6.8K
2
R371
CDROM_AGND
CD_L_R
CD_R_R
36 DOCK_LIN_L
36 DOCK_LIN_R
R572
1
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
57
58
C176 1500PF
NPO
MIC_OUT+
2
100K
GD4
C219
29 EC_VOL_UP#
2
1
R114
22
ESS_VOL_UP#
ESS_VOL_DW#
LK1608-1R0K
27
CDPLAY#
2
R106
R115 1
L15
37 MOD_AUDIO_MON
37
MOD_MIC
2 CDPLAY#
G
C149
GD1
GD0
R110
1M
Y1
49.152 MHz
2
R128
+5V_SW
.1UF
1
@100K
37
MD_SYNC
29 MIC_GAINLOW#
37
MD_BITCLK
37 MD_SDATAO
C182 10PF
NPO
MONO_IN
1
68PF
2
R565
27
Q47
@2N7002
+5V_AMP
R595
10K_1%
30K_1%
LP3964-ADJ
+3V_ALW
C166 33PF
NPO
S
1
17,22,23,37 PCI_AD[0..31]
17,22,23,37 PCI_C/BE#[0..3]
1UF
C280
100K
2
C158
.1UF
C299
+5V_ALW
R404
1
C169
@3.4K_1%
2
SD
1
1
C170
R591
1
C555
1
10K
1
10K
1
@10K
2
R563
GD0
2
R564
GD4
2
R570
5VAUD_GATE
GD1
+3V_SW
Q66
@SI2301DS
U66
Rev
2A
401200
Sheet
E
70
of
89
3
G
Q25
EC_MUTE
C663
Layout note:
2N7002
C506
30
1 R208
100K
12
ROUT-
19
SPK_L-
2
G
SPKL+
C775
R_UP/DOWN#
L_UP/DOWN#
R217
SPKL-
33
14
MODE
SVR
16
LINEOUT_L 33,36
150UF_TPB_6.3V
5 U58
R228
100K
ADJVOL_UP/DW# 30
74AHCT1G125GW
+5V_AMP
+3V_MIC
2
GAIN_SEL# 28
D
Q30
TDA8552TS
C634
.1UF
100K
C628
2.2UF_16V_0805
HPS
2
G
2N7002
R440
1
10
11
20
33
1K
GAINSEL
GND1
GND2
GND3
GND4
100K
SPKL+
LINEOUT_R 33,36
150UF_TPB_6.3V
DIS_ADJVOL 30
EC_MUTE
C333
33
+5V_ALW
1
HPS
R439
+3V_MIC
R590
2.2K
JP26
U61
+3V_ALW
1UF_0603
C371
2
1
VIN
VOUT
+3V_MIC
C519
.1UF
+5V_AMP
SD#
BP
4 MIC_BP
2
1
C520
R360
1
1UF_0603
560
C768
R596
1
33,36 INTMICOFF#
DOCK_MIC
DOCK_MIC 36
MICOFF#
1
R94
2
470K
+12V_SW
10UF_16V_1206
39K
2
.22UF_0603
+5V_AMP
R356
10K
+3V_ALW
C776
10UF_16V_1206
16V
+5V_AMP
1
74AHCT1G125GW
+5V_AMP
16V
U35
+3VALW POWER
INT_MIC
INT_MIC
10K
2
2
14
1
2
33
R350
C569
1
2
R345 10K_1%
1
2
U36A
74LVC14
2
.1UF
C544
Q40
2N7002
MIC_SD# 3
VSS
R342
100K_1%
FOXCONN JA6033L-101
330PF
U62
SI9183DT-33
+5V_ALW
+5V_ALW
MIC
C385
330PF
10UF_10V_1206
@MAX8868_EUK30
C48
.1UF
C73
.01UF
+3V_ALW
BEEP#
3
6
2
1
C81
C119
2
MIC_BP
GND
SHDN#
MIC_OUT+
4
L43
FBM-L10-160808-301
DOCK_MIC1
2
1
2
L12
FBM-L10-160808-301
BP
2
1 MIC_SD#
R459 100K
VOUT
26
+3V_MIC
VIN
C72
4.7UF_10V_0805
29
R20
2.2K
+5V_ALW
+5V_SW
30
SPKR-
C317
10UF_16V_1206
16V
4
33
3
Q63
2N7002
LOUT-
R460
@10K
HPS
SPKR+
+
SPK_L+
LOUT+
LLINEIN
2.2UF_16V_0805
1
2
SPKR+
2N7002
3
R447
@10K
15
Q26
1
D
L_IN
1
0
LEFT 2
LEFT
2N7002
3
SPK_RS
28
C679
1
2
+12V_ALW
2.2UF_16V_0805
R457
SPK_R+
RLINEIN
ROUT+
17
C665
1
2
R_IN
1
0
RIGHT 2
RIGHT
Q28
R448
28
Q62
2N7002
3
C648
.1UF
VDD1
VDD2
VDD3
VDD4
C635
1000PF
150UF_TPB_6.3V
2
U21
3
8
13
18
150UF_TPB_6.3V
7
8
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
+5V_AMP
+3VALW POWER
R346
2.4K
1
2
HPS
36
D
Q45
2
G
INTSPKOFF#
HPS
28
R412
RB425D
2N7002
1M
+3V_ALW
ICH_SPKR
U36C
74LVC14
6
C568
2
1UF_0603
D42
R366
1
2
560
2
Title
+3VALW POWER
RB751V
Size
Document Number
Custom
Rev
2A
401200
Date:
A
R372
@10K
18
33,36 LINE_OUT_PLUG
14
3 Q43
2SC2411EK
R382
100K
D23
2
560
R383
100K
1UF_0603
1UF_0603
R384
100K
MONO_IN 26
1
R367
CB_SPK#
C572
1
2
23
14
C534
U36B
74LVC14
4
, 10, 2002
Sheet
E
71
of
89
EQ_L_INPUT1
OUT2_L
OUT3_L
IN4
OUT4
11
OUT4_L
OUT5
13
OUT5_L
2
2
L_EQ
R441 1
@33K
R454 1
@33K
R445 1
0
LEFTEQ
GAIN_SEL#
U22B
74HCT4066
18299HZ
+6dB
Q=1.41
560K_1%
C294
OUT2
OUT2_R
IN3
OUT3
OUT3_R
IN4
OUT4
11
OUT4_R
IN5
OUT5
13
OUT5_R
IN6
OUT6
15
16
1
C326
1
OUT2_R
470PF
R207
200K_1%
R_EQ
1
2
200K_1%
2230HZ
-6dB
Q=0.72
OUT3_R
330PF
R215
200K_1%
3410HZ
-6dB
Q=0.707
R216
C321
301K_1%
220PF
EQ_IN_R
R_EQ
LMV801
27
HPS
1
10UF_10V_1206
GAIN_SEL#
U22D
74HCT4066
RIGHT
27
HPS_PLUG
EQ_IN_R
27
3
U22C
74HCT4066
14
8
7
OUT4_R
82PF
R218
75K_1%
18299HZ
+6dB
Q=1.41
R_EQ
301K_1%
R205
1
2
127K_1%
C322
1
C331
R219
1
2
75K_1%
82PF
.1UF 14
RIGHTEQ
4
7
C594
1UF_0603
R203
+5V_AMP
1
C332
EQ_R_INPUT5
EQ_R_INPUT4
C329
R223
2K_1%
536HZ
+6dB
Q=1.41
200K_1%
C324
OUT5_R
220PF
R204
39.2K_1%
7646HZ
+1.45dB
Q=1.59
SUM_OUT
1
2
220K_1%
REF
R_EQ
R202
R214
IN2
OUT1_R
OUT1_R
1500PF
R183
140K_1%
C300
R210
14
EQ2_VREF
12
EQ_R_INPUT5
5V
10
OUT1
330PF
2
140K_1%
4.7UF_10V_0805
GND
EQ_R_INPUT4
EQ_R_INPUT3
C283
R184
1UF_0603
7646HZ
+1.45dB
Q=1.59
RIGHTEQ
C285
R_EQ 1
C323
220K_1%
+5V_AMP
EQ_R_INPUT2
OUT5_L
220PF
R416
39.2K_1%
EQ_R_INPUT3
R193
470PF
1500PF
U18
2
C310
R189
+5V_AMP
IN1
1
2
127K_1%
EQ_R_INPUT2
EQ_R_INPUT1
L_EQ
82PF
R422
75K_1%
RIGHTEQ
C282
EQ_R_INPUT1
2
OUT4_L
75K_1%
10
12
R442 1
0
301K_1%
C618
R420
RIGHT_EQ
C631
R423
27
R407
220PF
26
LEFT_EQ
301K_1%
LEFT
U22A
74HCT4066
14
11
7
10UF_10V_1206
R221
2K_1%
1
2
LMV801
26
EQ_L_INPUT5
C623
LEFTEQ
3410HZ
-6dB
Q=0.707
R415
200K_1%
R414
82PF
14
1
7
EQ_IN_L
.1UF
R417
200K_1%
2230HZ
-6dB
Q=0.72
OUT3_L
EQ_IN_L
HPS_PLUG
C292
C603
1UF_0603
13
16
C627
15
R419
2K_1%
470PF
R195
200K_1%
L_EQ
EQ_L_INPUT4
C636
SUM_OUT
OUT2_L
REF
OUT6
536HZ
+6dB
Q=1.41
IN6
R192
1
2
220K_1%
14
IN5
1500PF
R411
140K_1%
L_EQ
12
OUT1_L
EQ_L_INPUT5
10
EQ_L_INPUT4
R413
200K_1%
C633
330PF
1
2
OUT3
C642
330PF
220K_1%
C298
OUT2
IN3
EQ_L_INPUT3
R405
2
140K_1%
IN2
EQ_L_INPUT2
EQ1_VREF
OUT1_L
5V
IN1
1UF_0603
OUT1
GND
U39
EQ_L_INPUT1
C608
L_EQ
C614
LEFTEQ
EQ_L_INPUT3
R191
470PF
C595
4.7UF_10V_0805
C600
.1UF
C309
560K_1%
R406
1500PF
R436
2K_1%
EQ_L_INPUT2
2
C620
+5V_AMP
+5V_AMP
GAIN_SEL#
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
72
of
89
.1UF
ECAGND
19,34
+3V_ALW
C632
17,31 LPC_FRAME#
17,31 LPC_AD0
17,31 LPC_AD1
17,31 LPC_AD2
17,31 LPC_AD3
8
CLK_LPC_EC
EC_RST#
R458
@100K
R467
+3V_ALW
PC7
100K
CLK_LPC_EC
D
Q50
2N7002
2
G
S
17
EC_SCI#
EC_SCI#
31
RB751V
17
17
GATE20
GATE20 2
KBRST#
D29
34
RB751V 34
KBRST# 2
1
5
6
1
KSI[0..7]
KSO[0..15]
KSI[0..7]
KSO[0..15]
ADB[0..7] 30
KBA[0..18]
KBA[0..18] 30
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15
R468
@10
PS2_DATA
PS2_CLK
1
2
3
4
5
+5V_SW
C688
@15PF
10
9
8
7
6
KBD_DATA
KBD_CLK
TP_DATA
TP_CLK
12
RP21
+5V_SW
10P8R_10K
+3V_SW
RP26
GATE20
1
KBRST#
2
PM_THRM# 3
4
8
7
6
5
EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
8P4R-10K
+3V_ALW
+5V_ALW
RP30
FSEL#
SELIO#
FRD#
EC_SMI#
1
2
3
4
RP32
EC_SMD_2
EC_SMC_2
EC_SMD_1
EC_SMC_1
8
7
6
5
1
2
3
4
8P4R-10K
8
7
6
5
8P4R-10K
KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA
LID_SW#
34,36
KBD_CLK
34,36 KBD_DATA
34,36
PS2_CLK
34,36 PS2_DATA
33
TP_CLK
33
TP_DATA
30,33 LID_SW#
26 MIC_GAINLOW#
105
106
107
108
109
110
111
114
115
116
117
118
119
VBAT
AVCC
DA0
DA1
DA2
DA3
DA output
IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7
TINT
TCK
TDO
TDI
TMS
PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7
PWM
or
PORTA
168
169
170
171
172
175
176
1
173
174
47
SEL0
SEL1
CLK
20M
2
CRY2
R501
C719
1
120K
PC87591VPC
PCI_WAKE_UP#
1
2 PM_THRM#
D25 RB751V
124
125
126
127
128
131
132
133
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
PORTI
IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7
138
139
140
141
144
145
146
147
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
PORTJ-1
IOPJ0/RD
IOPJ1/WR0
150
151
FRD#
FWR#
SELIO
152
SELIO#
IOPD4
IOPD5
IOPD6
IOPD7
41
42
54
55
PORTK
PORTM
PORTL
.01UF
2
BATT_TEMP 40
TEMP_GMCH
LI/NIMH# 40,41
ECAGND
I/O Address
Index
Data
BADDR1-0
2E
2F
0 0
4E
4F
0 1
(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
1 0
Reserved
1 1
ACOFF
41
PM_BATLOW# 17,19
EC_ON
34
EC_LID_OUT# 17
PM_LANPWROK 17,25
TRIS
OBD
DEV
PROG
+3V_ALW
KBA1
PBTN_OUT# 17
EC_SMC_2 5,33,36
EC_SMD_2 5,33,36
FAN_SPEED 35
PM_THRM# 17
FAN_SPEED2
10K
R449
@10K
R507
(ENV1)
KBA2
(BADDR0)
KBA3
(BADDR1)10K
R506
KBA5
(SHBM)
10K
R505
PCI_WAKE_UP#
ACIN
18,38,40
RING#
32
PM_SLP_S3# 17
ON/OFFBTN# 33,36
PM_SLP_S5# 17
2
R541
1
100K
+3V_ALW
PM_CLKRUN# 17,19,22,23,31,37
U56
LPCPD#
5
2
2
R137
4
1
7SH08
1 PCI_RST#
4.7K
PM_SUS_STAT# 17,31
C14
.1UF
FRD#
FWR#
30
30
SELIO#
30
SCROLLED# 16
NUMLED# 16
CAPSLED# 16
IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13/BE0
IOPK6/A14/BE1
IOPK7/A15/CBRD
143
142
135
134
130
129
121
120
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1
113
112
104
103
48
KBA16
KBA17
KBA18
JP30
1
2
3
4
5
6
7
8
9
10
FSTCHG
1
2
3
4
5
6
7
8
9
10
EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
+3V_ALW
EC_VOL_UP#
EC_VOL_DW#
EN_WOL#
41
@96212-1011S
Title
Size
Document Number
Custom
Rev
2A
401200
Date:
B
ENV1
EC_VOL_UP# 26
EC_VOL_DW# 26
EN_WOL# 37
EC_SMC_1 30,40
EC_SMD_1 30,40
PCI_RST# 9,15,17,21,22,23,26,31,37
ECAGND
ENV0
IRE
PC7
IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7
PORTD-2
C641
1
10PF
2
10PF
EC_SMC_2
EC_SMD_2
LPCPD#
GND1
GND2
GND3
GND4
GND5
GND6
GND7
32.768KHZ
X4
2
C716
FSEL#
FSEL#
EC_SMC_1
EC_SMD_1
PCI_RST#
2
44
24
25
17
35
46
122
159
167
137
R498
1
30
R443
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
PORTJ-2
BATT_TEMP
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15
R528
@0
PORTE
AGND
148
149
155
156
3
4
27
28
.01UF
2
11
12
20
21
85
86
91
92
97
98
38
SYSON
32,38,39 EC_SUSP#
42
VR_ON
41
TRICKLE
42
VTT_ON
5,8 VTT_PWRGD#
15
ENBLT
15
BKOFF#
2
ICH_SWI#
IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO
C640
1
INVT_PWM 33
BEEP#
27
26
29
30
96
8,17 PM_SLP_S1#
EC_SMI#
19,22,23,24 G_RST#
17,19
CRY1
EC_SMI#
62
63
69
@0 70
75
76
17
32KX2
TEMP_GMCH
DAC_BRIG 33
EC_EN_FAN 35
EC_EN_FAN2
IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24/LRESET2
32KX1/32KCLKOUT
32
33
36
37
38
39
40
43
IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
PORTH
160
TEMP_GMCH
99
100
101
102
153
154
162
163
164
165
PS2 interface
CRY2
BATT_TEMP
PORTD-1
158
81
82
83
84
87
88
89
90
93
94
IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL/LRESET2
PORTC
CRY1
95
161
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
CLK_LPC_EC
AD Input
GA20/IOPB5
KBRST/IOPB6
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
C723
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
1UF_0603
U46
AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9
Host interface
IOPD3/ECSCI
71
72
73
74
77
78
79
80
ADB[0..7]
SERIRQ
LDRQ
LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK
LREST1
SMI
PWUREQ
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
D14
34
45
123
136
157
166
16
7
8
9
15
14
13
10
18
19
22
23
17,19,23,31 INT_SERIRQ
1000PF
1
2
BLM11A20
C637
L49
EC_AVCC
2
2
BLM11A20
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
L48
.1UF
2
22UF_10V_1206
22UF_10V_1206
+3V_ALW
+RTCVCC
EC_3VDD
C695
VDD
1
2
R488 @0
1
2
C697
R489 0
+3V_ALW
1000PF
C732
.1UF
C733
C742 C734
EC_AVCC
+3V_ALW
+3V_SW
.1UF
+3V_ALW
, 10, 2002
Sheet
E
73
of
89
INPUT
OUTPUT
+5V_ALW
C753
1
2
+5V_ALW
+3V_ALW
1
R521
100K
1394_PME#
BT_WAKE_UP
1
19
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
18
16
14
12
9
7
5
3
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
1G
2G
U57B
74LVC32
+3V_ALW
C747
1
2
.1UF
KBA2
SELIO#
M_SEN#
CONA#
C754
2
29,33
LID_SW#
BT_PRES#
+3V_ALW
1
19
1G
2G
R516
20K
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
18
16
14
12
9
7
5
3
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
1
2
3
4
10
U57D
74LVC32
8
7
6
5
+5V_ALW
1
C685
1
2
+3V_ALW
100K
2
R548
1394_PME# 1
.1UF
14
1
KBA4
AUD_PME#
PCM_PME#
MDM_PME#
LAN_PME#
13
7
R532
1
1
2
3
4
U43A
74LVC32
2
7
8P4R-100K
100K
2 BT_WAKE_UP
26
23
37
37
AUD_PME#
PCM_PME#
MDM_PME#
LAN_PME#
AUD_PME#
PCM_PME#
MDM_PME#
LAN_PME#
+3V_ALW
KBA5
U57C
74LVC32
1
19
1G
2G
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
18
16
14
12
9
7
5
3
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
74LVC244
11
1
CLK
CLR
1
R499
1
R508
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
VCC
WE*
A17
A14
A13
A8
A9
A11
OE*
A10
CE*
DQ7
DQ6
DQ5
DQ4
DQ3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
FWE#
C720 +
KBA17
KBA14
KBA13
KBA8 4.7UF_10V_0805
KBA9
KBA11
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
TPAD_LED# 33
1
1
1
1
DIS_ADJVOL 27
ADJVOL_UP/DW# 27
TP5
TP6
TP7
TP8
74HCT273
2
@0
2
0
+5V_ALW
+3V_ALW
C718
VCC_FLASH
KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
.1UF
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
A11
A9
A8
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
A6
A5
A4
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
@29F040_TSOP
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3
TSOP 8x20
+12V_SW
10
7
+3V_ALW
29F040/SST39VF040_PLCC
SELIO#
LARST#
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
10
14
9
2
4
6
8
11
13
15
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
20
100K
100K
100K
100K
VCC
2
2
2
2
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2
GND
1
1
1
1
D0
D1
D2
D3
D4
D5
D6
D7
U50
Q0 2
Q1 5
Q2 6
Q3 9
Q4 12
Q5 15
Q6 16
Q7 19
U42
VCC_FLASH
.1UF
U52
3
4
7
8
13
14
17
18
8
7
6
5
U38
+3V_ALW
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
3
SELIO#
RP22
74LVC244
C748
2
.1UF
+3V_ALW
+3V_ALW
+3V_ALW
C749
1
2
R586
R587
R588
R589
1
1
8P4R-100K
11
SELIO#
74HCT273
20
20
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
VCC
2
4
6
8
11
13
15
17
14
12
CLK
CLR
EC_GRST# 19
BT_RST# 20
BT_DETACH 20
BT_ON# 20
TP2
EC_MUTE 27
TP3
TP4
1UF_0603
U54
GND
33 USER_BTN1#
33 USER_BTN2#
33 USER_BTN3#
33 USER_BTN4#
33,36
SUSPBTN#
2 100K
2 100K
100K
2
KBA3
+3V_ALW
+3V_ALW
RP34
5
7
.1UF
R583 1
R584 1
R585 1
11
1
PCMRST#
U51
2
5
6
9
12
15
16
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
C726
D0
D1
D2
D3
D4
D5
D6
D7
74LVC244
+3V_ALW
+3V_ALW
LARST#
2
7
3
4
7
8
13
14
17
18
10
SELIO#
U57A
74LVC32
14
1
6
29
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
GND
14
4
KBA1
.1UF
U53
10
+3V_ALW
KBA[0..18]
10
33 TPAD_ON/OFF#
22
1394_PME#
20 BT_WAKE_UP
KBA[0..18]
VCC
2 100K
2
4
6
8
11
13
15
17
29
20
20
R582 1
M_SEN#
CONA#
BT_PRES#
16,36 M_SEN#
36
CONA#
20
BT_PRES#
ADB[0..7]
.1UF
VCC
+3V_ALW
ADB[0..7]
GND
2
1
29
VCC
C755
2
GND
U40
R206
1
.1UF
1
2
3
4
A0
A1
A2
GND
VCC
WC
SCL
SDA
8
7
6
5
29,40 EC_SMC_1
29,40 EC_SMD_1
4
100K
U55
R526
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
R515
NM24C164
100K
@SST39VF040_TSOP
FRD#
29
FSEL#
29
100K
R209
+3V_ALW
U43B
74LVC32
FWE#
100K
14
4
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
2
G
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Q27
2N7002
3
EC_FLASH# 18
5
7
ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3
FWR#
29
TSOP 8x14
100K
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
VCC_FLASH
R517
A11
A9
A8
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
A6
A5
A4
C738
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
+5V_ALW
1
+5V_ALW
KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
74
of
89
14
39
63
88
+3V_SW
+3V_SW
17,29
17,29
17,29
17,29
R512
100K
1
R511
2
@0
8 CLK_LPC_SIO
9,15,17,21,22,23,26,29,37 PCI_RST#
17,29 LPC_FRAME#
17
LPC_DRQ#1
CLK_SIO14
LCLK
LRESET#
LFRAME#
LDRQ#
LPCPD#
CLKRUN#
SERIRQ
SMI#
20
CLKIN
21
22
23
24
25
26
27
28
29
30
31
32
33
34
72
73
84
DSKCHG#
HDSEL#
RDATA#
WP#
TRK0#
WGATE#
WDATA#
SETP#
DIR#
DR0#
MTR0#
INDEX#
DENSEL
DRATE0/IRSL2
DR1#
MTR1#/DRATE0
MTR1#
DSKCHG#
HDSEL#
RDATA#
WP #
TRACK0 #
WGATE#
WDA TA#
STEP#
FDDIR#
DRV0#
MTR0#
INDEX#
3MODE#
DSKCHG#
HDSEL#
RDATA#
WP #
TRACK0 #
WGATE#
WDA TA#
STEP#
FDDIR#
DRV0#
MTR0#
INDEX#
3MODE#
R504
@33
R503
@33
8
9
12
11
7
6
10
19
PC87391
C721
1
2
3
4
65
82
83
85
86
87
90
91
92
93
94
95
96
97
98
99
100
C722
@15P F
@15PF
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Signal
Pin #
Description
BADDR
61
52
50
48
46
45
44
43
42
PNF
SLCT/WGATE#
PE/WDATA#
BUSY_WAIT#/MTR1#
ACK#/DR1#
SLIN#_ASTRB#/STEP#
INIT#/DIR#
ERR#/HDSEL#
AFD#_DSTRB#/DENSEL
STB#_WRITE#
35
36
37
40
41
47
49
51
53
54
DCD1#
DSR1#
SIN1
RTS1#/TEST
SOUT1/XCNF0
CTS1#
DTR1#_BOUT1/BADDR
RI1#
55
56
57
58
59
60
61
62
DCD2#
DSR2#
SIN2
RTS2#
SOUT2
CTS2#
DTR2#_BOUT2
RI2#
74
75
76
77
78
79
80
81
IRTX
IRRX1
IRRX2_IRSL0
IRSL1
IRSL2/DR1#
IRSL3/PWUREQ#
70
69
68
67
71
66
WDO#
PC8739 1
PD0/INDEX#
PD1/TRK0#
PD2/WP#
PD3/RDATA#
PD4/DSKCHG#
PD5/MSEN0
PD6/DRATE0
PD7/MSEN1
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
R479
100K
2
1
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTSLCTIN #
LPTINIT#
LPTERR #
LPTAFD #
LPTSTB#
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
+3V_SW
LPTSLCT 32,36
LPTPE
32,36
LPTBUSY 32,36
LPTACK# 32,36
LPTSLCTIN # 32,36
LPTINIT# 32,36
LPTERR# 32,36
LPTAFD # 32,36
LPTSTB# 32,36
DCDA#
DSRA#
RXDA
RTSA#
TXDA
CTSA#
DTRA#
RIA#
RP24
8
7
6
5
2
R469
32,36
32,36
32,36
32,36
32,36
32,36
32,36
32,36
DCDA#
DSRA#
RXDA
RTSA#
TXDA
CTSA#
DTRA#
RIA#
8P4R_10 0K
1
2
3
4
32
32
32
32
32
32
32
32
+3V_SW
1
100K
IRTXOUT 32
IRRX
32
IRMODE 32
VSS
VSS
VSS
VSS
33
33
33
33
33
33
33
33
33
16
33
33
33
CLK_SIO14
1
CLK_LPC_SIO
C
CLK_LPC_SIO
PCI_RST#
LPC_FRAME#
LPC_DRQ#1
C671
1000PF_ 50V
2
.1UF
C670
LAD0
LAD1
LAD2
LAD3
C669
4.7UF_10V_0805
.1UF
C668
15
16
17
18
PM_CLKRUN#
SERIRQ
1
2
R509
@10K
CLK_SIO14
17,19,22,23,29,37 PM_CLKRUN#
17,19,23,29 INT_SERIRQ
+3V_SW
VDD_391
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
13
38
64
89
17,29 PM_SUS_STAT#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
VDD
VDD
VDD
VDD
U47
DTRA#
1
R450
+3V_SW
2
@10K
"1": 4E~4F
TEST
58
90, 4, 59
Function
No BIOS
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
5
Size
Custom
Date:
Document Number
Rev
2A
401200
, 10, 2002
Sheet
1
75
of
89
+5V_SW
JP17
FDD Connector
30 TPAD_ON/OFF#
30
TPAD_LED#
WP#
31
RDATA#
31
HDSEL#
WP#
RDATA#
HDSEL#
C339
1UF_0603
C346
.1UF
JP19
27
27
27
27
WGATE#
TRACK0#
RP9
WP#
RDATA#
HDSEL#
3MODE#
DSKCHG#
INDEX#
6
7
8
9
10
+5V_SW
5
4
3
2
1
1
2
3
4
SPKR+
SPKRSPKL+
SPKL-
+5V_SW
C279
220PF
RDATA#
WP#
TRACK0#
C271
220PF
C266
220PF
1
2
3
4
HEADER 4
TRACK0#
31
C348
10UF_10V_1206
C258
220PF
31
TRACK0#
C342
1000PF
WGATE#
WDATA#
WGATE#
FDDIR#
3MODE#
STEP#
WDATA#
+5V_SW
MTR0#
WDATA#
HEADER 8
22PF
22PF
31
1
2
3
4
5
6
7
8
FDDIR#
3MODE#
STEP#
FDDIR#
3MODE#
STEP#
C558
31
31
31
MTR0#
MTR0#
DSKCHG#
31
C554
Layout note :
Place capacitors near Floppy connector .
DRV05V#
DSKCHG#
DSKCHG#
TP_DATA
TP_CLK
INDEX#
29
29
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
31
31
DRV05V#
DRV05V#
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
16
INDEX#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
31
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
INDEX#
+5V_SW
JP20
+5V_SW
1
1
2
3
4
5
6
7
8
10P8R_1K
FDD Connector
2
RP35
FDDIR#
WDATA#
HDSEL#
+5V_SW
10P8R_1K
JP24
1
2
3
4
5
6
27,36 LINE_OUT_PLUG
27,36 LINEOUT_R
27,36 LINEOUT_L
C735
220PF
5
4
3
2
1
C736
220PF
C737
220PF
1
2
3
4
5
6
HEADER 6
+5V_SW
6
7
8
9
10
DRV05V#
MTR0#
STEP#
WGATE#
+5V_SW
JP9
16
16
16
SCRLED5V#
NUMLED5V#
CAPSLED5V#
DRV05V#
FDDLED#
16
16
CDLED#
HDDLED#
27
INT_MIC
15
29
DISPOFF#
DAC_BRIG
29
INVT_PWM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
C386
3
+5V_ALW
3
+5V_SW
.1UF
LID_SW_CON#
EC_PWR_ON#
ON/OFFBTN# 29,36
SUSPBTN# 30,36
USER_BTN1# 30
USER_BTN2# 30
USER_BTN3# 30
USER_BTN4# 30
EC_PWR_ON# 34,36,41
EC_SMC_2 5,29,36
EC_SMD_2 5,29,36
D48
1
D49
1
RB751V
2
LID_SW# 29,30
RB751V
2
INTMICOFF# 27,36
HEADER 40
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
77
of
89
C200 1UF_0603
1
2
3M
FAN Connector
10M_0603
VL
+12V_SW
+5V_SW
+3V_SW
2
1
1
2
R87
16.9K_1%
R70
0
R78
MAINPWON 39
LM393
100K_1%
10UF_10V_1206
C107
.22UF_0805
U11A
C129
.1UF
29 FAN_SPEED
CON3
3
1SS355
Q21
1
2SA1036K
1
2
3
C177
D7
2
1
+5V_SW
2
R83
47K_1%
2.15K_1%
JP16
5V_FAN1
D10
1N4148
100K_1%
R69
U14A
LMC6482IM
R75
100K
D6
1SS355
29 EC_EN_FAN
VL
R510
R125
100K
Q20
FMMT619
2
1M
R140
3.48K
R118
1
3
10UF_10V_1206
2
4
100K
+5V_SW
R117
VL
C222
R122
R121
R71
2
Thermistor_0805
Layout note :
Place a copper ground plan from CPU and place the
Thermistor upper this ground plan.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
1
79
of
89
Or use SI2305DS.
+3V_ALW
C725
C741
1
1
+3VAUX
Q57
SI2301DS
1UF_0603
2
1UF_0603
JP31
PCI_AD3
W=30mils
PCI_AD1
26
26
26
MD_SYNC
MD_SDATAI
MD_BITCLK
MD_BITCLK
R492
12
@10
C707
26 MOD_AUDIO_MON
26
MOD_MIC
32
MODEM_RI#
+5V_SW
MOD_AUDIO_MON
W=30mils
@15PF
17,22,23,26
17,22,23,26
17,19,22,23,26
17,22,23,26
17,22,23,26
C730
PCI_FRAME# 17,19,22,23,26
PCI_TRDY# 17,19,22,23,26
PCI_STOP# 17,19,22,23,26
4.7UF_10V_0805
C731
.1UF
C727
1000PF
PCI_DEVSEL# 17,19,22,23,26
PCI_AD15 17,22,23,26
PCI_AD13 17,22,23,26
PCI_AD11 17,22,23,26
+3V_SW
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
17,22,23,26
17,22,23,26
17,22,23,26
17,22,23,26
PCI_AD9 17,22,23,26
PCI_C/BE#0 17,22,23,26
C739
4.7UF_10V_0805
C743
.1UF
C698
128
PCI_AD22
PCI_AD20
PCI_PAR
PCI_AD18
PCI_AD16
128
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
+5V_SW
IDSEL : AD18
127
PCI_AD9
PCI_C/BE#0
PCI_AD28 17,22,23,26
PCI_AD26 17,22,23,26
PCI_AD24 17,22,23,26
127
PCI_AD15
PCI_AD13
PCI_AD11
1000PF
PCI_AD5
PCI_DEVSEL#
+3V_SW
.1UF
C699
1000PF
C706
4.7UF_10V_0805
17,22,23,26 PCI_AD3
+5V_SW
17,22,23,26 PCI_AD1
PCI_FRAME#
PCI_TRDY#
PCI_STOP#
17,22,23,26 PCI_AD5
PCI_AD8
PCI_AD7
PCI_AD22
PCI_AD20
PCI_PAR
PCI_AD18
PCI_AD16
R524
0_1206
17,22,23,26 PCI_AD8
17,22,23,26 PCI_AD7
PCI_AD12
PCI_AD10
2
100
100PF
C752
MD_SDATAO 26
+3VAUX
MD_RST# 26
MOD_AUDIO_MON
C740
W=40mils
4.7UF_10V_0805
+3VAUX
C729
17,22,23,26 PCI_AD12
17,22,23,26 PCI_AD10
PCI_PERR#
PCI_C/BE#1
PCI_AD14
1
R471
PCI_AD28
PCI_AD26
PCI_AD24
PCI_AD18
MDM_PME# 30
LAN_PME# 30
PCI_AD30 17,22,23,26
C745
.1UF
C728
1000PF
17,19,22,23 PCI_PERR#
17,22,23,26 PCI_C/BE#1
17,22,23,26 PCI_AD14
PM_CLKRUN#
PCI_SERR#
MDM_PME#
LAN_PME#
PCI_AD30
PCI_GNT#1 17
17,19,22,23,29,31 PM_CLKRUN#
17,19,22,23 PCI_SERR#
PCI_AD17
PCI_C/BE#2
PCI_IRDY#
1
PCI_GNT#1
17,22,23,26 PCI_AD17
17,22,23,26 PCI_C/BE#2
17,19,22,23,26 PCI_IRDY#
PCI_AD21
PCI_AD19
W=40mils
@15PF
2
100
PCI_RST# 9,15,17,21,22,23,26,29,31
17,22,23,26 PCI_AD21
17,22,23,26 PCI_AD19
C704
1
R494
1 0
@10
PCI_AD27
PCI_AD25
PCI_AD22
PCI_C/BE#3
PCI_AD23
MINI_RST#
R477 2
+5V_SW
INT_PIRQC# 17,19
PCI_GNT#4 17
+3VAUX
IDSEL : AD22
17,22,23,26 PCI_C/BE#3
17,22,23,26 PCI_AD23
PCI_AD31
PCI_AD29
INT_PIRQC#
PCI_GNT#4
17,22,23,26 PCI_AD27
17,22,23,26 PCI_AD25
R484
2
PCI_REQ#1
LED2_YELN 25
W=30mils
1
2
R486
0
W=40mils
17,22,23,26 PCI_AD31
17,22,23,26 PCI_AD29
CLK_MINIPCI
LAN RESERVED
LED2_YELN
CLK_MINIPCI
2
0
EN_WOL#
17,19 PCI_REQ#1
1
R481
29
CLK_MINIPCI
12
C711
100PF
1000PF
17,19 PCI_REQ#4
INT_PIRQD#
W=40mils
PCI_REQ#4
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
C710
17,19,26 INT_PIRQD#
1
+3V_SW
2 R483 1
0_1206
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
LED1_GRNN
25 LED1_GRNN
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
LAN RESERVED
RING
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
TIP
Mini-PCI SLOT
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
81
of
89
PR42
@0
P2
B+
8
7
6
5
PR45
10K
PR43
0.02_2512
PQ11
D
D
D
D
S
S
S
G
1
2
3
4
1
2
3
4
PR44
200K
SI4835
D
D
D
D
S
S
S
G
8
7
6
5
PC38
@100P 1
2
3
4
1W
SI4435
PQ10
S
S
S
G
D
D
D
D
8
7
6
5
P3
PQ12
1
2
3
4
SI4435
D
D
D
D
S
S
S
G
PC41
PR47
150K
PC42
4.7UF_1210_25V
PACIN
PR152
PC43
0.1UF_0805_25V
PD14
EC31QS04
4.7UF_1210_25V
P4
PC40
PC106
22UF_1812_25V
PD29
EC31QS04
VIN
2
PR46
0.02_2512
1W
22UH_SPC-1207P-220
41
SI4435
VMB
PL5
8
7
6
5
PQ9
VIN
10UF_1210_25V
P1
B+
47K
PD27
PR50
PR49
47K
1SS355
1
4.7
OVP#
41
Modify by CT at 2/25
1
2
PU5
PQ13 3
2N7002
-INC2
+INC2
24
OUTC2 GND
23
+INE2
CS
22
-INE2 VCC(o)
21
PR51
0
PR52
@0
PC44
2200PF
PR53
10K
FB2
VREF
10K
PC48
2200PF_0603_50V
PR57
PR58
PC47
0.1UF
FB1
VCC
-INE1
RT
17
+INE1
-INE3
16
30
TRICKLE
OUTC1
10K
1
PQ15
3
FB3
15
FSTCHG
PC49
0.1UF_0805_25V
68K
PR63
10
PR64
30
Add by CT at
5/3
PR59
10K_1%
2
19
PR62
PC51
0.1UF_0805_25V
1
PQ16
3
VH
18
10K
24.9K_1%
PR60
16.9K 1%
1.2K_0.5%
20
9
PR61
OUT
PC45
0.1UF
TRICKLE
PC46
4700PF_0603_50V
27K_1%
PR56
10K_1%
100K
PR55
PR54
PD17
1SS355
PD16
1SS355
PC50
PQ14
DTC115EK
100K
ACOFF
30
324K_1%
11
OUTD
CTL
14
12
-INC1
+INC1
13
1500PF
MB3878
P1
VMB
PR66
69.8K_0.5%
150K_0.5%
PD19
RLS4148
PR67
PD18
RB751V
CV:LI-ION 13.241V
NI-MH 16.202V
PR65
47K
2N7002
2N7002
PR68
3
1
CHGRTCP
215K_0.5%
1
PQ17
2N7002
NIMH/LI#
41
SHDN#
+5VALWP
100K
40
PU6
S-81233SG
200_0805
PQ19
100K
DTC115EK
2
RTCVREF
LI/NIMH#
30,41
PC55
10UF_1206_10V
PC54
1UF_0805_25V
PC53
0.22UF_1206_25V
PZD2
RLZ16B
100K
2
PR72
22K
EC_PWR_ON#
3
1
0.1UF
PR71
100K
PC52
PZD1
RLZ6.2C
34,35,37
PR70
PR69
CHGRTCP
PQ18
TP0610T
3
1
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
85
of
89
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
B+
PL6
4.7UF_1210_25V
VIN2
4.7UF_1210_25V
FBJ3216HS800
PC63
PC64
PC65
4.7UF_1210_25 V
5
6
7
8
PC114
0.1U_0603
PQ20
IR7811A
PR81
D3
DH
28
23
D2
BST
26
DL
25
D0
V+
14
VGATE
VCC
FB
+5VALWP
1
PR134
30K_1%
PR94
24.9K
VR_ON
PC78
1U
PD26
RB751V
3
2
1
PD28
EC10QS0 4
2
0
POS
13
NEG
5
19
OVP
SUS
18
11
REF
S1
12
ILIM
S0
15
GND
TON
PC74
4.7UF_1206
PM_DPRSLPVR
7,17
10
PU9
NO2
V+
NO3
COM
14
18
SKIP
BST
19
17
V+
DH
PGOOD
LX
20
1.5VLX
SHDN
DL
13
1.5VDL
ILIM
PGND
12
N/C
N/C
11
REF
N/C
16
TON
OUT
FB
PR107
10K
AGND
NO1
NO0
INH
ADDA
GND
ADDB
PC84
0.1UF_0805
1
- 4
1K
PR131 1K_1%
MAX4322
VOLTS
D3
D2
D1
D0
D4 = 1
D4 = 0
0.975
1.75
0.950
1.70
0.925
1.65
0.900
1.60
0.875
1.55
0.850
1.50
0.825
1.45
0.800
1.40
0.775
1.35
0.750
1.30
0.725
1.25
0.700
1.20
0.675
1.15
0.650
1.10
0.625
1.05
0.600
1.00
PM_SSMUXSEL
PQ25
2N390 4
2
2
1
PR97
10K
7,17
PR101
61.9K
PR104
10K
+VTTP
PL9
10UH SPC-1207P
+
2.2
5,17
PC85
150U/6.3V
PR106
3K/F
MODE
DEEPER SLEEP
BATTEY SLEEP
PERFORMANCE SLEEP
BATTERY MODE
PERFORMANCE MODE
OFFSET
0mV
-56mV
-51mV
-16mV
-1.8mV
RBOTTOM
X
16.2K
19.6K
61.9K
604K
Vout(0A)
0.850
1.094
1.199
1.134
1.248
H_DPSLP#
PQ26
SI4834
PD23
@EC10Q S04
ADDA
X
1
1
0
0
ADDB
X
0
1
0
1
1.25VFB
PR109 +VTTP
12K/F
PC89
150PF_0 603PC90
1UF_0805
+VTTP
PC87
Title
PC88
0.01UF_0603 0.1UF_0805
PR93
1.5VBST
PR138
2
PR102
19.6K
1
4
PR103
16.2K
PR100
604K
MAX1714A
PC86
0.1UF_0805
+ 3
44
PR130 1K_1%
VDD
PC81
4.7U/25V
VCC
PC80
4.7U/25V
PC83
4.7UF_1206_16V
PD22
1SS355
15
10
PR108
15K
PR129
PR128 510
2
1
2
PU10
10
MAX4524
2
PC79
0.1UF_0805
2
10
PPU13
+3VALWP
B+
PL8
+5VALWP
PC82
4.7UF_1206_16V
2 2.0VREF
PC103
0.1UF_0805
PR99
1.2VILIM
2
100
PC73
@.01U/16V
FBJ3216HS800
VTT_ON
P+
PC76
1000PF_0 603
30
PC71
OUTPUT
@0
VTT_P WRGD
+5VALWP
VIN3
@0
PR92
PR95
27.4K
VIN3
PR85
2mR
PR88
PC70
150UF_D_6V
PC72
0.1UF_0805
PR135
20K_1%
PR136
1
5
6
7
8
PQ24
SI4404
VIN2
ZMODE
CC
PQ23
SI4404
PC105
@0.1UF_0603
VDD
PQ22
SI4404
SDN/SKIP
PC75
17
4.7UF_1206_16V
PC77
6
470PF_0 603
20
PC69
0.1UF_0805
VGATE
2
2.2
PR154
2
2
TIME
D1
16
PR87
24
100K 2
PR91
VTTLX
22
27
PR90
10K
30
LX
3
2
1
1
2
17,35
D4
+VCC_H_COREP
150UF_D_6V
PL7
HK-RM136-20A0 R8
MAX1718
21
+3V_SW
PL11
PD20
1SS355
20
PU8
PQ21
IR7811A
CPU_VID0
44
1.0UH
P-
5
6
7
8
CPU_VID1
3
2
1
P+
+5VALWP
3
2
1
CPU_VID2
PR79
10
5
6
7
8
4.7UF_1210_25 V
4.7UF_1210_25V
3
2
1
CPU_VID3
CPU_VID4
PC115
1000PF_0 603
5
6
7
8
PC62
PC61
Document Number
Rev
2A
401200
, 10, 2002
Sheet
E
86
of
89
+5VALWP
4
5
6
VREF
PD24
SI3443DV
3
PU11A
PC92
1000PF
8
3
2
PQ28
2SC2411K
JOPEN11
+VTTP
1
PQ29
2SA1036K
+VTT
+VTT
+VTT
+5V_ALW
+5V_ALW
+3V_ALW
+VCC_H_CORE
+VCC_H_CORE
+12V_ALW
3MM
PD25
EC31QS04
JOPEN2
PR113
270K_1%
LM393
+
47K
PQ27
1
G
D
D
RB751V
PC91
PR112
0.1UF_0805_25V
2.2K
PR111
105K_1%
PR110
3
2
1
+5VALWP
S
D
D
+VTTP
PC93
0.047UF
80mil
3MM
PL10
JOPEN3
5UH_SPC1002
+VTTP
1
3MM
PR114
5.1K
JOPEN12
+1.8VALWP
+5VALWP
1
3MM
VREF
JOPEN4
PC94
150UF_D_6.3V
+5VALWP
+12VALWP
3MM
JOPEN5
D
D
D
D
+3VALWP
PQ30
1
3MM
SI4800
JOPEN6
+VCC_H_COREP
4
3
2
1
PU12A
LM358
G
S
S
S
5
6
7
8
PR115
100K_1%
3MM
PR116
100K_1%
1000PF_0603_50V
JOPEN7
+VCC_H_COREP
PC95
1
3MM
JOPEN8
+1.5VALWP
PR117 3K_1%
PR118
+12VALWP
PC96
0.1UF_0805_25V
15K_1%
1
2MM
+
PC97
47UF_D_6.3V
JOPEN9
+1.5VALWP
+1.5V_ALW
+1.8V_ALW
2MM
3
JOPEN10
+1.8VALWP
1
3MM
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
, 10, 2002
Date:
Rev
2A
401200
Sheet
E
87
of
89
Power PIR
Item
Fixed Issue
Page
Modify item
MB_Ver. Phase
System shutdown
41
Add PR126,PC102,PZD4,PR127
0.2
EVT
41
Add PR132,PR133,PC104
0.2
EVT
43
Add PR128,PR129,PR130,PR131,PC103,PU13
0.2
EVT
43
0.2
EVT
Eliminate +2.5VP
44
Delete PQ33,PQ34,PR122,PR121,PR123,PR124
PC99,PC98,PC100,PC101,PQ32
0.2
EVT
43
0.2
EVT
43
0.2
EVT
43
1.Connect S0 to REF
2.Connect S1 to REF
0.2
EVT
43
0.2
EVT
41
0.3
DVT
0.3
DVT
0.3
DVT
1.Delete PR73~76,PC56~60
2.Delete PR80,82,83,84.86
3.Connect PU8.19PIN to GND
1.Add PR87 to PU8.28 PIN in series
2.Add PR138 to PU10.1 PIN in series
0.3
DVT
0.3
DVT
0.5
DVT
11
43
12
43
13
42
Add PC106
14
15
43
16
42
&
43
8
C
9
10
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
5
Size
A
Date:
Document Number
Rev
2A
401200
, 10, 2002
2
Sheet
88
of
1
89
Page
07/09
P11
07/16
P15
P16
P21
P35
P27
P30
P37
P26
P31
P16/21
07/19 P38
P27
P28
B P30
P19
P31
07/23 P16
P31
07/25 P5
P8
P11
P14
P15
P17
P18
P19
P21
P22
P24
P25
P26
Description
Date
Page
08/03
P28
P37
08/16
P28
09/03
P27
Add C775 parallel with pin R208.1 and GND, add a 2.2K ohm
bias resistor R590 by +3V_MIC on pin JP26.3 and change R217
value from 2.2K ohm to 1K ohm.
Change SI9181( U12 & U59 ) from fixed to adjustable version.
Add 30Kohm resistor R592(R594) and 10Kohm resistor
R593(R595) to make output voltage at 4.8V.
Add a 39Kohm serial resistor R596, change R94 value from
100Kohm to 470Kohm and add a 10uF/16V parallel with Q40.2
and GND to solve pop sound when Int-MIC mute.
Change D48 from one DAN202U to two RB751Vs.
Change R68 from 1Kohm_1% to 499ohm_1% and R65 from 2Kohm_1%
to 1Kohm_1% by Intel recommanded.
Change C167, C299 value from .01uF to .1uF.
P28
P34
P7
09/05
P27
12/06
P16
Description
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Title
to
abnormal
or
sound from
Size
Document Number
Rev
2A
401200
Date:
, 10, 2002
Sheet
89
of
89