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ENGI 242
ELEC 222
BJT Biasing 1
For Fixed Bias Configuration:
• Draw Equivalent Input circuit
• Draw Equivalent Output circuit
• Write necessary KVL and KCL Equations
• Determine the Quiescent Operating Point
– Graphical Solution using Loadlines
– Computational Analysis
• Design and test design using a computer simulation
Fixed Bias 1
ENGI 242/ELEC 222 January 2004
Fixed Bias 2
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Fixed-Bias Circuit
DC Equivalent Circuit
Fixed Bias 3
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Since: IC = β IB
Using Kirchoff’s voltage law: – VCC + IC RC + VCE = 0
Because: VCE = VC – VE
Since VE = 0V, then: VC = VCE
And VCE = VCC - IC RC
Also: VBE = VB - VE
with VE = 0V, then: VB = VBE
Fixed Bias 4
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VCC - VCE
ICsat =
RC
where VCE = 0.2 V
Determining Icsat
Fixed Bias 5
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Fixed Bias 6
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Fixed Bias 7
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Fixed Bias 8
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Load-line analysis
Fixed Bias 9
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ENGI 242
ELEC 222
Fixed Bias 10
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Fixed Bias 11
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Adding an emitter resistor to the circuit between the emitter lead and ground stabilizes
the bias circuit over Fixed Bias
January 2004 ENGI 242/ELEC 222 23
Base-Emitter Loop
Fixed Bias 12
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Equivalent Network
Fixed Bias 13
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Base-Emitter Loop
Collector-Emitter Loop
Fixed Bias 14
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Collector-Emitter Loop
Transistor Saturation
At saturation, VCE is at a minimum
We will find the value VCEsat = 0.2V
For load line analysis, we use VCE = 0
To solve for ICSAT, use the output KVL
equation:
V CC - V CE
ICSAT =
RC + RE
Fixed Bias 15
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At saturation: VCC
IC = | VCE = 0V
RC + RE
January 2004 ENGI 242/ELEC 222 31
Fixed Bias 16
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Fixed Bias 17
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Fixed Bias 18