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5

S50IAx REV:D P/N LIST

S50IAx Schematics Rev:D


PAGE

PCB P/N

CONTENT

PCB ASSY P/N

S40II M/B

37GS50000-D0

S40/S50 TOUCH PAD BD

S50IA M/B(HYNIX)

37GS50000-D0

82GS50000-D0

43.

S40 MODEM BD

S50IA M/B(SAM)

37GS50000-D0

82GS50000-??

44.

S50 MODEM WITH USB BD

YONAH CPU HOST & CPU Thermal Sensor

45.

AUDIO BD(1)(FPC CON/USB*2/LID/RF SW/MDC)

S40 MODEM BD

35GNS4000-D0

6.

CPU_POWER

46.

AUDIO BD(2)(Codec/MIC/ERA JACK)

S50 MODEM BD

35GNS5000-D0

7.

CLK GEN ICS9LPR310-CLK

47.

AUDIO BD(3)(AMP/INTERNAL MIC)

S40 SWITCH BD

35G5S5000-D0

8.

NB(1)_Host

48.

AUDIO BD(4)(LED indicator)

9.

NB(2)_DMI/Configuation/PM

S50 SWITCH BD

35G5S5000-D0

1.

Cover Page

41.

S40/S50 SWITCH BD

2.

System Block Diagram

42.

3.

POWER BLOCK DIAGRAM

4.

GPIO & POWER CONSU

5.

80GNS5000-D0

80G5S5000-D0

10.

NB(3)_VGA_TV_LVDS_PCIEx16* I/F

S40 ODD BD

35GPS4000-D0

11.

NB(4)_DDR2 I/F

S50 ODD BD

35GPS5000-D0

80GPS5000-D0

12.

NB(5)_POWER

13.

NB(6)_POWER

TOUCH PAD

35G8S5000-D0

80G8S5000-D0

35G2S5000-D0

80G2S5000-D0

35GKS5000-D0

80GKS5000-D0

DDR2 _SO-DIMM

AUDIO BD

15.

SB(1)_CPU/SATA/IDE/RTC/LPC/AZALIA

3G BD

16.

SB(2)_PCI/GPIO/SMBUS/PM/DMI/USB/PCIEx1

17.

SB(3)_Power

14.

18.

IEEE1394A & CARD READER IC(OZ128T)

19.

GIGA LAN

20.

SATA HDD/PATA ODD/Lan_Transformer

21.

EC IT8510E

22.

LCD PWR / INVERT CONN / LVDS CONN

23.

FAN CTRL / SYS BIOS /SMART PWR

24.

MINI CARD & NEW CARD

25.

S/W&AUDIO&MDC(CONN)USB&S-VEDIO(ON MB)

26.

Cardreader CONN

27.

CRT CONN WITH PR8800

28.

+5V&+3V(MAX8734A)

29.

+CPU CORE(MAX8771)

30.

+1.5V&+1.8V(OZ813) & +2.5V(RT9173B)

31.

+1.05V(OZ818) & +1.2V(RT9173B) & +0.9V(RT9173B)

32.

+1.0V_VGA & +1.8V_VGA(OZ813)

33.

POWER ON SWITCH FUNC.

34.

Charger func.(TL594) & DC IN CON & BATTERY CONN

35.

Discharger Function

36.

GPU M52-T/M54-T(1)-GPIO&PCIEx16*&CRT&TV

37.

GPU M52-T/M54-T(2)-LVDS & MEMORY I/F

38.

GPU M52-T/M54-T(3)-POWER

Name of Part

39.

GDDR2 FOR GPU

Project

40.

VBIOS & SS IC & GPU THEMAL IC

Cover Page

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006

ISSUED BY DC2
5

3255

Rev

/ 50

UNIWILL COMPUTER CORP.


1

CLK GEN
ICS 9LPR310

INTEL CPU
Yonah/Merom
Dual/Single
D

CRT
FSB533/667

TV
S-OUT

North Bridge
ATI GPU
M52-T

PCI-Express 16x

DDR2 Channel A

DDR2 SO-DIMM1/533/667

DDR2 Channel B

DDR2 SO-DIMM2/533/667

INTEL
945PM

14.318 MHz

14"~15"
LCD
GDDR2

GDDR2

16X16

16X16

DMI BUS
PATA I/F

ODD
MASTER

SATA I/F

SATA HDD

South Bridge

AZALIA I/F

MIC

INTEL
ICH7M

AZALIA
MODEM

AUDIO CODEC

EAR/SPDIF

ALC861

IEEE 1394/CardReader
PCI I/F

OZ128TN

AMP

TPA6011A

1XPCI-EXPRESS

SPK-L

SPK-R

USB

USB
PR8800

USB
NEW-Card

USB
BlueTooth

MINI CARD

LAN
8111B

LPC BUS

EC
ITE 8510

NEW CARD

Wireless LAN

SMART PWR

VGA SENSOR

CPU SENSOR

ADM1032

ADM1032

Touch PAD

CHARGER

SYS Temp
Thermistor

DDR Temp
Thermistor

BATTERY

SWITCH

LCD CTRL

USB
3G-WCDMA

Debug
PORT

BIOS

FAN_CPU

K/B

LED

PWR ON
CTRL

Name of Part
Project

BLOCK_DIAGRAM

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

/ 50

UNIWILL COMPUTER CORP.


1

VIN

POWER BLOCK DIAGRAM


D

VID0
VID1
VID2
VID3
VID4
VID5
VID6

+1.8VS/6A

+1.8V

SPK810S

AO4422

VIN
D

OZ813
MAX8771

RSS090N03
RQA200N03

VIN

CPU_CORE

+1.0VS/10A

RSS090N03

VIN

AO4422

+1.0V/10A

+5VA

RSS090N03

AO4422

+5VS

SI4835

POWER Sequence

+5V

MAX8734A
VIN

+3VA,+5VA,+12VA

+3.3VA

+3.3VS

PWRSW

+2.5VS
AO4422

RSS090N03

. +3.3VS_ON

RT9173B

+5VS,+12VS

+3.3V/ 0.9A

SI4835

+3.3VS

. +1.5VS_ON
+1.5VS

VIN

+1.8VS

RSS090N03

RT9173B

AO4422

OZ813
B

VIN

1ms

. +1.05VS_ON
. +1.8V_DDR_ON
+0.9VS

+1.8VS

1ms

+1.05VS

1ms

. RSMRST#
. PWRBTN#
. +5V_ON

+1.8V/10A

50ms

10ms

1s

+1.05VS/4.5A

5.8ms

+5V
40ms

+3.3V

RSS090N03

AO4422

+1.5V/1.8A

+2.5V

. +1.8V_ON
+1.8V
+1.05V

VIN

+1.05VS/6A

+1.5V

. Vcore_ON
OZ818

SPK810S

AO4422

7ms

Vcore

+1.05V/6A

. PWROK/VR_PWRGD

110ms

H_PWRGD
PCIRST#/PLTRST#
A

CPURST#

+3.3VS

+1.8VS
RT9173B

+2.5V

RT9173B

+1.2VVS

Name of Part

POWER DIAGRAM & SEQUENCE

. EC Control Pin

Project

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

/ 50

UNIWILL COMPUTER CORP.


1

ICH7-M
GPIO

GPI0
GPI9
GPI11
GPI12
GPI13
GPI14
GPO16
GPO18
GPO20
GPO21
GPO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34

BM_BUSY#
EC_EXTSMI#
SMB_ALERT#
PNLSW0
PNLSW1
PNLSW2
PM_DPRSLPVR
PM_STPPCI#
PM_STPCPU#

PM_CLKRUN#

ITE8510E

ITE8510E

GPIO
GPCF0
GPCF1
GPCF2
GPCF3
GPCF4
GPCF5
GPCF6
GPCF7
GPI0
GPI1
GPI2
GPI3
GPI4
GPI5
GPI6
GPH0
GPH1
GPH2
GPH3
GPH4
GPH5
GPH6
GPH7
GPG4
GPG5
GPG6
GPG7
GPB0
GPB1
GPB2
GPB3
GPB4
GPB5
GPB6
GPB7
GPE0
GPE1
GPE2
GPE3
GPE4
GPE5
GPE6
GPE7
GPD0
GPD1
GPD2
GPD3
GPD4
GPD5
GPD6
GPD7
GPA0
GPA1
GPA2
GPA3
GPA4
GPA5
GPA6
GPA7

CPU
2.0G
1.5G
1.67G
1.83G
2.0G
2.16G
2.33G
2.66G
2.8G
3.06G

GPIO

RF_SW#
SILENT#/
NEW_CARD_PWR_ON#

NA
TP_CLK
TP_DATA
3G_ON

NA
SCROLL
CAPS
NUM
CHG_R_LED#
CHG_G_LED#
PWRON_LED
+1.8V_VGA_ON
+1.8VS_ON
+1.8V_ON
+1.05VS_ON
+3.3VS_ON
+5V_ON
SET_V
+1.5VS_ON
VCORE_ON
BT_ON
+VGA_CORE_ON
AMP_MUTE#
EXTTS#0
C4_OUT
CPPE#
PM_RSMRST#
BAT_SMBCLK
BAT_SMBDAT
H_A20GATE
H_RCIN#
RFLED_ON

GPC0
GPC1
GPC2
GPC3
GPC4
GPC5
GPC6
GPC7
ADC0
ADC1
ADC2
ADC3
DA0
DA1
DA2
DA3

PWROK
SMBCLK_EC
SMBDAT_EC
FPWRON
BROWSER#
C4_OUT#
CHG_ON
SILENT_LED
BAT_TEMP
ADAPTOR_I
DDR2_TEMP
VGA_TEMP
BRIGHTADJ
CHG_I
FAN_CTRL0

CPU

CORE(V)ICC(A)
36
1.25
1.25
36
1.25
36
1.25
36
36
1.25
36
1.25
36
1.25
43.35
1.525
1.525
44.86
55.9
1.525

W
44
44
44
44
44
44
44
66.1
68.4
85.2

TEMP()
69
70
70
71
72
72
72
74
75
81

ITE8510E
VCC
+3.3V

ICC(mA)
300

TEMP()
70

W
1

CLOCK GENERATOR
VCC
+3.3V

ICC(mA)
180

W
0.594

TEMP()
70

ALC861
VCC
ICC(mA) W
TEMP()
70
0.234
+3.3V(DVDD)
71

GMCH

NA

VCC
+3.3V
+2.5V
+1.8V
+1.5V
+VTT
+VCC_GMCH_CORE

ICC(A)
0.12
0.6
5.1
1.544
0.8
1.5

W
0.396
1.500
9.18
2.316
0.84
0.75

TEMP()

70

TPA6011A4
VCC
3.3V

W
ICC(mA)
0.099W
30

TEMP()
85
C

ADM1032
VCC
+3.3V

ICH7-M
VCC
+5VS
+3.3VS
+3.3V
+1.5V
+1.05V

NA
EC_CPU_BSEL1

+3.3VA_RTC

NA
NA

ICC(A)
0.016
0.35
1.0
4.38
1.5
0.003

ICC
170uA

TEMP()
W
150
0.56mW

TEMP()
W
0.08
1.155
3.3
70
6.57
1.575
0.00001

EC_PWR_ON
LID#

NA
B

PM_SLP_S3#
ADAP_IN
LCDSW
PCI_RST#/PLT_RST#
EC_EXTSMI#
PM_SLP_S4#
PM_THROTTLING#
AUTO_C4#
EC_PREST#
BTL_BEEP
EC_VID1
EC_VID2
EC_VID3
EC_VID4
EC_VID5
SMP2_EN#
PWRBTN#

Name of Part
Project

GPIO & POWER CONSU

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

/ 50

UNIWILL COMPUTER CORP.


1

8
8
8

H_A#[31:3]
H_REQ#[4:0]
H_RS#[2:0]

H_D#[63:0]

CN15-1

H_ADSTB#1

15
15
15

H_A20M#
H_FERR#
H_IGNNE#

A6
A5
C4

A20M#
FERR#
IGNNE#

15
15
15
15

H_STPCLK#
H_INTR
H_NMI
H_SMI#

D5
C6
B4
A3

STPCLK#
LINT0
LINT1
SMI#

AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3

RSVD{01}
RSVD{02}
RSVD{03}
RSVD{04}
RSVD{05}
RSVD{06}
RSVD{07}
RSVD{08}
RSVD{09}
RSVD{10}

B25

RSVD{11}

H5
F21
E1

H_DEFER# 8
H_DRDY# 8
H_DBSY# 8

F1
D20
B3

LOCK#

H4
B1
F3
F4
G3
G2

HIT#
HITM#

G6
E4

H_IERR#
H_INIT#

15

H_LOCK# 8
H_CPURST#
H_RS#0
H_RS#1
H_RS#2

H_CPURST# 8
8
8
8

H_TRDY# 8
H_HIT#
H_HITM#

BPM{0}#
BPM{1}#
BPM{2}#
BPM{3}#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

PROCHOT#
THERMDA
THERMDC

D21
A24
A25

THERMTRIP#

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_BREQ#0 8

IERR#
INIT#

RESET#
RS{0}#
RS{1}#
RS{2}#
TRDY#

CN15-2

8
8
8

8
8

H_PREQ#
H_TCK
H_TDI
H_TDO
H_TMS
H_TRST#

R362

8
8
8

1K_1%

H_DSTBN#1
H_DSTBP#1
H_DINV#1

PM_THRMTRIP# 9,15

H_GTLREF

A22
A21

RSVD{12}

T22

RSVD{13}
RSVD{14}
RSVD{15}
RSVD{16}
RSVD{17}
RSVD{18}
RSVD{19}
RSVD{20}

D2
F6
D3
C1
AF1
D22
C23
C24

D{0}#
D{1}#
D{2}#
D{3}#
D{4}#
D{5}#
D{6}#
D{7}#
D{8}#
D{9}#
D{10}#
D{11}#
D{12}#
D{13}#
D{14}#
D{15}#
DSTBN{0}#
DSTBP{0}#
DINV{0}#

N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26

D{16}#
D{17}#
D{18}#
D{19}#
D{20}#
D{21}#
D{22}#
D{23}#
D{24}#
D{25}#
D{26}#
D{27}#
D{28}#
D{29}#
D{30}#
D{31}#
DSTBN{1}#
DSTBP{1}#
DINV{1}#

AD26

D{32}#
D{33}#
D{34}#
D{35}#
D{36}#
D{37}#
D{38}#
D{39}#
D{40}#
D{41}#
D{42}#
D{43}#
D{44}#
D{45}#
D{46}#
D{47}#
DSTBN{2}#
DSTBP{2}#
DINV{2}#

AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

D{48}#
D{49}#
D{50}#
D{51}#
D{52}#
D{53}#
D{54}#
D{55}#
D{56}#
D{57}#
D{58}#
D{59}#
D{60}#
D{61}#
D{62}#
D{63}#
DSTBN{3}#
DSTBP{3}#
DINV{3}#

AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP{0}
COMP{1}
COMP{2}
COMP{3}

R26
U26
U1
V1

H_COMP0
H_COMP1
H_COMP2
H_COMP3

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PS1#

E5
B5
D24
D6
D7
AE6

GTLREF

Layout note: 0.5" max length.

PM_THRMTRIP# space 2:1


BCLK{0}
BCLK{1}

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

+1.05V

H_PROCHOT#
H_THERMDA
H_THERMDC

C7

H_DSTBN#0
H_DSTBP#0
H_DINV#0

E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
H23
G22
J26

DATA GRP 2

CONTROL

BR0#

H_ADS#
H_BNR#
H_BPRI#

DATA GRP 3

A{17}#
A{18}#
A{19}#
A{20}#
A{21}#
A{22}#
A{23}#
A{24}#
A{25}#
A{26}#
A{27}#
A{28}#
A{29}#
A{30}#
A{31}#
ADSTB{1}#

Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
V4

XDP/ITP SIGNALS

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

THERM

REQ{0}#
REQ{1}#
REQ{2}#
REQ{3}#
REQ{4}#

H CLK

K3
H2
K2
J3
L5

DEFER#
DRDY#
DBSY#

H1
E2
G5

DATA GRP 1

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

ADDR GROUP 1

H_ADSTB#0

ADS#
BNR#
BPRI#

RESERVED

A{3}#
A{4}#
A{5}#
A{6}#
A{7}#
A{8}#
A{9}#
A{10}#
A{11}#
A{12}#
A{13}#
A{14}#
A{15}#
A{16}#
ADSTB{0}#

DATA GRP 0

J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
L2

ADDR GROUP 0

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

R359

CLK_CPU_BCLK 7
CLK_CPU_BCLK# 7

2K_1%

9/23
review

R416

*1K

H_TEST1 C26

TEST1

R415

51R

H_TEST2 D25

TEST2

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

9,21 CPU_BSEL1

B22
B23
C21

MISC

BSEL{0}
BSEL{1}
BSEL{2}

H_DSTBN#2 8
H_DSTBP#2 8
H_DINV#2 8

H_DSTBN#3 8
H_DSTBP#3 8
H_DINV#3 8
R70
R63
R64
R62

27.4R_1%
54.9R_1%
27.4R_1%
54.9R_1%

H_DPRSTP# 15,29
H_DPSLP# 15
H_DPWR# 8
H_PWRGD 15
H_CPUSLP# 8,15
H_PSI#
29

I24075270

+1.05V

I24074326

Close to NB

R425
1K

Design guide recommend 2.2K

H_DPRSTP# Layout
routing is
ICH-7 -> CPU -> IMVP-6
sequency

CPU_BSEL0 9
CPU_BSEL0

R498

*10K

CLK_BSEL0 7

+1.05V

H_PREQ#

R51

*56R

+CPU_CORE

Close
CPU

R150
AUX_OFF# 28,35

Z0504

CPU_BSEL1

PM_THRMTRIP#

CPU_BSEL1 9,21
10K

R160

1K

Z0505

Q23
2N3904

Q22
2N3904

R426

56R

H_PROCHOT#

R103

56R

H_TDO

R53

*54.9R

H_TMS

R59

*39.2R

H_TDI

R61

150R

H_CPURST#

R107

*54.9R

H_STPCLK#

R102

*150R

1u

C204

CLK_BSEL1 7

H_IERR#

B
C205

R281

Design guide recommend 2.2K

+1.05V

100K

0.1u
R424
+3.3V

1K
+3.3V

R433

200R

Z0503

CPU Thermal Sensor

C579

Design guide recommend 2.2K


1u/10V/Y5V/0603

SMBDAT_EC 7,21

H_THERM#

R434

R133

0R

C578
H_THERM#
2200p

THERM

D-

SCLK

ALERT

GND

*0R

Z0507 G
C197

BSEL2

BSEL1

BSEL0 MHZ

FSB533

133

FSB667

166

R60

680R

H_TCK

R52

27.4R

1u
Name of Part

*0.1u

Project

CPU_HOST

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255

H_TRST#

ADM1032ARM

R149

Q16
2N7002

C192
Q15
2N7002

1K

SMBCLK_EC 7,21

40 VGA_THERM#

H_THERMDC

Z0506

ADATA

100K
100K

CLK_BSEL2 7

D+

10K

R148

CPU_BSEL2 9
R489

VDD

H_THERMDA

CPU_BSEL2
U13
A

Modify in R:D

R151

Rev

/ 50

UNIWILL COMPUTER CORP.


1

+CPU_CORE
+CPU_CORE

CN15-4

+CPU_CORE
CN15-3

VCC001
VCC002
VCC003
VCC004
VCC005
VCC006
VCC007
VCC008
VCC009
VCC010
VCC011
VCC012
VCC013
VCC014
VCC015
VCC016
VCC017
VCC018
VCC019
VCC020
VCC021
VCC022
VCC023
VCC024
VCC025
VCC026
VCC027
VCC028
VCC029
VCC030
VCC031
VCC032
VCC033
VCC034
VCC035
VCC036
VCC037
VCC038
VCC039
VCC040
VCC041
VCC042
VCC043
VCC044
VCC045
VCC046
VCC047
VCC048
VCC049
VCC050
VCC051
VCC052
VCC053
VCC054
VCC055
VCC056
VCC057
VCC058
VCC059
VCC060
VCC061
VCC062
VCC063
VCC064
VCC065
VCC066
VCC067

C498

VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099
VCC100

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16

V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

VCCA

B26

VID0
VID1
VID2
VID3
VID4
VID5
VID6

AD6
AF5
AE5
AF4
AE3
AF2
AE2

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

VCCSENSE

AF7

VCORE_VCCSENSE 29

VSSSENSE

AE7

VCORE_VSSSENSE 29

C100

C525

C58

C537

C487

4.7u/10V/X5R/0805 4.7u/10V/X5R/0805 4.7u/10V/X5R/0805 4.7u/10V/X5R/0805 4.7u/10V/X5R/0805 4.7u/10V/X5R/0805

C93

C85

C538

C486

C526

C497

4.7u/10V/X5R/0805 4.7u/10V/X5R/0805 4.7u/10V/X5R/0805 4.7u/10V/X5R/0805 4.7u/10V/X5R/0805 4.7u/10V/X5R/0805

C531

C532

C474

C481

C534

C482

C533

C479

1u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/0603

C132

C480

C180

1u/10V/Y5V/0603
1u/10V/Y5V/0603

C53

C116

C115

C475

C54

1u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/0603

+1.05V
C45

C38

C43

C153

C144

C127

C51

C40

C49

C47

1000p

1000p

1000p

1000p

1000p

1000p

1000p

1000p

1000p

1000p

C44
0.1u

C37
0.1u

C46
0.1u

C48
0.1u

C41
0.1u

C39
0.1u

C50
0.1u

C52
0.1u

C124

C126

C143

C154

C152

C142
0.1u

C125
0.1u

C151
0.1u

C141
0.1u

1000p

1000p

1000p

1000p

1000p

+1.5V

L57
QT1608RL600

Close to Pin

Z0601

23
23
23
23
23
23
23

C557

C554

4.7u/10V/X5R/0805

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

0.01u

I24088053

+CPU_CORE

QT1608GRL600 = 200mA
QT1608RL120 = 200mA
QT1608RL600 = 200 mA
QT1608RL030 = 500mA
QT1608RL060 = 500mA

A4
A8
A11
A14
A16
A19
A23
A26
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

VSS001
VSS002
VSS003
VSS004
VSS005
VSS006
VSS007
VSS008
VSS009
VSS010
VSS011
VSS012
VSS013
VSS014
VSS015
VSS016
VSS017
VSS018
VSS019
VSS020
VSS021
VSS022
VSS023
VSS024
VSS025
VSS026
VSS027
VSS028
VSS029
VSS030
VSS031
VSS032
VSS033
VSS034
VSS035
VSS036
VSS037
VSS038
VSS039
VSS040
VSS041
VSS042
VSS043
VSS044
VSS045
VSS046
VSS047
VSS048
VSS049
VSS050
VSS051
VSS052
VSS053
VSS054
VSS055
VSS056
VSS057
VSS058
VSS059
VSS060
VSS061
VSS062
VSS063
VSS064
VSS065
VSS066
VSS067
VSS068
VSS069
VSS070
VSS071
VSS072
VSS073
VSS074
VSS075
VSS076
VSS077
VSS078
VSS079
VSS080
VSS081

VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24

I24089147
C133

C183

C140

C35

C139

C99

C76

C179

1u/10V/Y5V/0603

1u/10V/Y5V/0603

1u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/06031u/10V/Y5V/0603

C97
0.1u

C495
0.1u

C521
0.1u

C57
0.1u

C61
0.1u

C500
0.1u

C101
0.1u

C516

C506

C515
4.7u/10V/X5R/0805

C493
0.1u

4.7u/10V/X5R/0805

C499
0.1u

4.7u/10V/X5R/0805

C505
C520
0.1u

4.7u/10V/X5R/0805

+1.05V

Name of Part
Project

CPU_POWER

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

/ 50

UNIWILL COMPUTER CORP.


1

+3.3V

Close pin 28,42


CLK_VDDA

L42
QT1608RL600
C356

C359

C358

C357

0.1u

0.1u

0.1u

10u/10V/Y5V/0805

Close pin 56

Close pin 1,7

R295

Reserved FOR EMI

Z0703
10p

PCI_CLK_1394_A

C348

10p

PCI_CLK_LPC

C627

10p

PCI_CLK_SB

C340

10p

PCI_CLK_DEBUG

C354

C347

10p

CLK_BSEL1

1u

C628

10p

CLK_BSEL0

2.2R/0603

Close pin 50

PCI
Power

VDD_A_CR

R292

C352
R291
0.1u

Pin3,4,12,64 programming to "normal" driving.


18 PCI_CLK_1394_A
21 PCI_CLK_LPC
21 PCI_CLK_DEBUG

SELDOT

, 1= Pin 14/15 DOT 96MHZ , Pin 17/18 LCDCLK


0= Pin 14/15 27MHZ Fix/SS Pin 17/18 PCIEX

CLK_BSEL2

5 CLK_BSEL2

VDDCPU
PCICLK3

PCICLK2_2X

R279

33R

PCI_CLK3

PCICLK1_2X

R278

33R

PCI_CLK1

64

PCICLK0_2X

@10K/10K Z0707
PCI_CLK2
33R

IP

CLK_BSEL2
CLK_BSEL1

33R
33R

5,21 SMBDAT_EC
5,21 SMBCLK_EC

9
8

PCI_CLK4

2.2R/0603

VDDPCI0

50

33R

R283
R490

16 CLK_ICH14
16 CLK_USB48

CLK_BSEL1

5 CLK_BSEL1
5 CLK_BSEL0

VDDPCIEX
VDDPCIEX

R483

R286
R486

16 PCI_CLK_SB

Bsel [0,2]
Vil = 0.3
Vih = 0.7

U21

28
42

VDDPCI1

PCI-E
Power

VDD48
VDDREF

11
56

Z0704
VDD_REF_CR

PLL VDDA
PowerGNDA

45
46

CLK_VDDA

PCI/PCIEX_STOP#
CPU_STOP#

63
62

STP_PCI#
STP_CPU#

R484
R485

0R
*0R

CPUCLKT1
CPUCLKC1

49
48

GMCH_HCLK
GMCH_HCLK#

R500
R502

22R
22R

CPUCLKT0
CPUCLKC0

52
51

CPU_HCLK
CPU_HCLK#

R492
R497

22R
22R

PCIEXT1
PCIEXC1

19
20

PCIE_CLK1
PCIE_CLK1#

R299
R301

22R
22R

PCIEXT2
PCIEXC2

22
23

PCIE_CLK2
PCIE_CLK2#

R501
R503

22R
22R

PCIEXT3
PCIEXC3

24
25

PCIE_CLK3
PCIE_CLK3#

R504
R507

22R
22R

PCIEXT4
PCIEXC4

30
31

PCIE_CLK4
PCIE_CLK4#

R509
R514

22R
22R

PCIEXT5
PCIEXC5

36
35

PCIE_CLK5
PCIE_CLK5#

R510
R515

22R
22R

PCIEXT6
PCIEXC6

39
38

PCIE_CLK6
PCIE_CLK6#

R505
R508

22R
22R

PCIEXT7
PCIEXC7

41
40

PCIEXT8
PCIEXC8

44
43

R293
R296

@22R/*22R
@22R/*22R

DOTT_96M
DOTC_96M

14
15

R496
R499

@*22R/22R
@*22R/22R

VTT_PWRGD#/PD

10

SELDOT/ PCICLK_F1
PCICLK_F0

61
60
12

FLSC/REF1
FLSB/REF0
FLSA/USB_48M_2X

55
54

SDATA
SCLK

R522

R304
R305

15 SATA_CLKP
15 SATA_CLKN

22R
22R

Z0701
Z0702

SATA_CLKP_ C
SATA_CLKN_C

+3.3V

check

26
27

LCD_SSCGT/PCIEXOT
LCD_SSCGC/PCIEXOC
SATACLKT
SATACLKC

33
32
34
16

PEREQ4#
PEREQ3#
PEREQ2#
PEREQ1#

XTAL_OUT
XTAL_IN

57
58

X2_OUT
X1_IN

IREF

47

VREF

24 NEW_CARD_REQ#
9 GMCH_CLK_REQ#
24 MINICARD_CLK_REQ#

Modify 1 in R:A1

17
18

R297
9LPR310-CLK
XTAL_OUT

Xtal
Power

C345
1u

C351

Modify in R:D
1u/6.3V/X7R/0603

Add to check list


PM_STPPCI# 16
PM_STPCPU# 16,23
CLK_MCH_BCLK 8
CLK_MCH_BCLK# 8
CLK_CPU_BCLK 5
CLK_CPU_BCLK# 5
GCLK
GCLK#

9
9

CLK_PCIE_NEW_CARD 24
CLK_PCIE_NEW_CARD# 24

CLK_PCIE_ICH 16
CLK_PCIE_ICH# 16
CLK_PCIE_VGA 36
CLK_PCIE_VGA# 36
CLK_PCIE_GLAN 19
CLK_PCIE_GLAN# 19
CLK_PCIE_Mini card 24
CLK_PCIE_Mini card# 24
+3.3V

DOT_96CLK
DOT_96CLK#

CLK_GEN_27MHz 40
CLK_GEN_27MHz_SS 40
NB_DOT_96CLK 9
NB_DOT_96CLK# 9

R289
10K

MAX8771_CLKEN# 29

GND
GND
GND
GND
GND
GND
GND
GND

@*22R/22R
@*22R/22R

GCLK
=> PCI-E & DMI
(100MHZ)
DREFCLK => Dispaly PLLA ( nun- ss 96MHZ)
DRESSFCLK => Display LVDS PLLB ( ss 100MHZ)

2
6
13
21
29
37
53
59

R298
R300

9 NB_LVDS_SSCLK
9 NB_LVDS_SSCLK#

100R

1R/0603

C350
2.2u/X5R/0603

C624

L40
QT1608RL600

4.3K_1%

XTAL_IN

Y6

Ce =

2*CL - ( Cs + Ci )

CL =

Crystal Load Cap = 20P

Ci =

IC internal Cap = 5P

14.318MHz_DIP
R275

*10M

C342

C341

Cs =

2P

33p

33p

Ce =

Crystal external Cap = 33P

REQ1#
REQ2#
REQ3#
REQ4#

=
=
=
=

PCI-E
PCI-E
PCI-E
PCI-E

0,6
1,8
2,4
3,5,7

STP_PCI#

R600

*10K/0603

STP_CPU#

R601

10K/0603

+3.3V

Modify 51 in R:B

BSEL2
FSLC

BSEL1
FSLB

BSEL0 CPU
FSLA MHZ

FS4

FS3

PSB533

133

PSB667

166

PSB533

133

PSB667

166

FS3 , FS 4 SEETING BY I2C BUS

PCI
MHZ
33
33

PCI-E SPREAD %
MHZ
100

0.5% DOWN

100

+/- 0.25%
CENTER
A

??????

Name of Part
Project

CLK GEN

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

/ 50

UNIWILL COMPUTER CORP.


1

5 H_D#[63:0]
U11J
5 H_A#[31:3]

VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272

VSS

VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360

J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

U11A
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

FSB I/O slew rate compensation


+1.05V

+1.05V

R422

R76

54.9R_1%

54.9R_1%

H_XSCOMP

H_YSCOMP

10mil width, 20mil space

Reference Voltage for RCOMP

+1.05V

R439
221R_1%
H_XSWING

R438
100R_1%

C584
0.1u

+1.05V

R394
221R_1%
H_YSWING

C518
R393

F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

HOST

AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21
AN21
AL21
AB21
Y21
P21
K21
J21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
J16
F16
C16
AN15
AM15
AK15
N15
M15
L15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11

0.1u

E1
E2
E4

H_XRCOMP
H_XSCOMP
H_XSWING

H_YRCOMP Y1
H_YSCOMP U1
H_YSWING W1

H_YRCOMP
H_YSCOMP
H_YSWING

10mil width, 20mil space

7 CLK_MCH_BCLK
7 CLK_MCH_BCLK#

Calibration FSB I/O Buffer

H_XRCOMP

CALISTOGA

R420
24.9R_1%

AG2
AG1

H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_VREF
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF

E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

+1.05V

R108
H_ADS# 5
H_ADSTB#0 5
H_ADSTB#1 5

100R_1%

>=10mil
H_VREF

H_BNR# 5
H_BPRI# 5
H_BREQ#0 5
H_CPURST# 5
H_DBSY# 5
H_DEFER# 5
H_DPWR# 5
H_DRDY# 5

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

J7
W8
U3
AB10

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

K4
T7
Y5
AC4

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

K3
T6
AA5
AC5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

C120
0.1u

R109
200R_1%

5
5
5
5

Close to MGCH <100mil

100R_1%
H_XRCOMP
H_XSCOMP
H_XSWING

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31

H_CLKIN
H_CLKIN#

H_HIT#
H_HITM#
H_LOCK#

D3
D4
B3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

D8
G8
B8
F8
A8

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#_0
H_RS#_1
H_RS#_2

B4
E6
D6

H_RS#0
H_RS#1
H_RS#2

H_SLPCPU#
H_TRDY#

E3
E7

H_CPUSLP#_GMCH

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

5
5
5
5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

5
5
5
5

H_HIT#
5
H_HITM# 5
H_LOCK# 5
H_REQ#[4:0] 5
B

H_RS#[2:0] 5

R419

p71 not mout ,


they mount SB
side
*0R

H_CPUSLP# 5,15
H_TRDY# 5

CALISTOGA

H_YRCOMP

R390
24.9R_1%

10mil width, 20mil space


Name of Part
Project

NB(1)_Host

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

/ 50

UNIWILL COMPUTER CORP.


1

U11B

16
16
16
16

DMI_TXP3
DMI_TXP2
DMI_TXP1
DMI_TXP0

16
16
16
16

+1.8VS

DMI_RXN3
DMI_RXN2
DMI_RXN1
DMI_RXN0

AH41
AG37
AF41
AE37

DMI_TXN_3
DMI_TXN_2
DMI_TXN_1
DMI_TXN_0

DMI_TXP3
DMI_TXP2
DMI_TXP1
DMI_TXP0

AG39
AF35
AE39
AC35

DMI_RXP_3
DMI_RXP_2
DMI_RXP_1
DMI_RXP_0

DMI_TXN3
DMI_TXN2
DMI_TXN1
DMI_TXN0

AH39
AG35
AF39
AE35
D41
C40
A26
A27
AG33
AF33

NB_LVDS_SSCLK
NB_LVDS_SSCLK#
NB_DOT_96CLK
NB_DOT_96CLK#
GCLK
GCLK#

DMI_RXN_3
DMI_RXN_2
DMI_RXN_1
DMI_RXN_0
D_REFSSCLKIN
D_REFSSCLKIN#
D_REFCLKIN
D_REFCLKIN#
G_CLKIN
G_CLKIN#

CLK

7
7
7
7
7
7

DMI_TXN3
DMI_TXN2
DMI_TXN1
DMI_TXN0

DMI_TXP_3
DMI_TXP_2
DMI_TXP_1
DMI_TXP_0

NC

DMI_RXN3
DMI_RXN2
DMI_RXN1
DMI_RXN0

AG41
AF37
AE41
AC37

MISC

16
16
16
16

DMI_RXP3
DMI_RXP2
DMI_RXP1
DMI_RXP0

PM

DMI_RXP3
DMI_RXP2
DMI_RXP1
DMI_RXP0

DMI

16
16
16
16

NC18
NC17
NC16
NC15
NC14
NC13
NC12
NC11
NC10
NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
NC0
CLK_REQ#
LT_RESET#
SDVO_CTRLDATA
SDVO_CTRLCLK
RSTIN#
PWROK
PM_THRMTRIP#
PM_EXTTS#_1
PM_EXTTS#_0
PM_BMBUSY#

C471

AT9
AV9

R374
0.1u

0.1u

150R_1%

AU21
AY20
BA12
BA13

SM_ODT_3
SM_ODT_2
SM_ODT_1
SM_ODT_0

R69

M_OCDCOMP1
M_OCDCOMP0

AF10
AL20

SM_OCDCOMP_1
SM_OCDCOMP_0

14
14
14
14

MB_CS#3
MB_CS#2
MA_CS#1
MA_CS#0

AW21
AY21
AW12
AW13

SM_CS#_3
SM_CS#_2
SM_CS#_1
SM_CS#_0

R329

14
14
14
14

MB_CKE3
MB_CKE2
MA_CKE1
MA_CKE0

AY29
BA29
AT20
AU20

SM_CKE_3
SM_CKE_2
SM_CKE_1
SM_CKE_0

14
14
14
14

MB_CK#3
MB_CK#4
MA_CK#1
MA_CK#0

AY40
AY7
AT1
AW35

SM_CK#_3
SM_CK#_2
SM_CK#_1
SM_CK#_0

14
14
14
14

MB_CK3
MB_CK4
MA_CK1
MA_CK0

AW40
AW7
AR1
AY35

SM_CK_3
SM_CK_2
SM_CK_1
SM_CK_0

R338

*40.2R_1%

*40.2R_1%

80.6R_1%
M_RCOMPN
M_RCOMPP
R330
80.6R_1%

MUXING

MB_ODT3
MB_ODT2
MA_ODT1
MA_ODT0

14
14
14
14

as short as
possible

+1.8VS

SM_RCOMP
SM_RCOMP#

DDR

C59

M_RCOMPP
M_RCOMPN

SM_VREF_1
SM_VREF_0

CFG

M_VREF_MCH

0.05A

AK41
AK1

RSVD_13
RSVD_12
RSVD_11
RSVD_10
RSVD_9
RSVD_8
RSVD_7
RSVD_6
RSVD_5
RSVD_4
RSVD_3
RSVD_2
RSVD_1

RSVD

M_VREF_MCH

GCLK
=> PCI-E & DMI
(100MHZ)
DREFCLK => Dispaly PLLA ( nun- ss 96MHZ)
DRESSFCLK => Display LVDS PLLB ( ss 100MHZ)
SDVODATA has internal pull down
0= no DVO device
1= DVO device present
SDVOCLK has internal pull
down .

Asserted to control the raw PCI-E clock


H32
K28
H27
H28

Z0901

AH34
AH33
G6
H26
F25
G28

GMCH_RST#
R67
DELAY_VR_PWRGOOD

R155

*0R

Add to
GMCH_CLK_REQ# 7
GMCH
NB_SYNC# 16

check list ( Bat life )


PWROK

Asserted to synchronize with ICH on fault


100R

GMCH_THRMTRIP#
R418
PM_EXTTS#1
R146
*0R
PM_EXTTS#0
R145
0R

PLT_RST# 16,17,19,20,21,24,36
DELAY_VR_PWRGOOD 16
PM_THRMTRIP# 5,15
C4_OUT# 21
EXTTS#0 14,21
BM_BUSY# 16

*0R

PWROK input level


PM_THRMTRIP# space 2:1

Break event in C3 state.

J26
K27
J25
H15
G18
H16
C15
K15
G15
D15
E16
G16
D16
D19
E18
F15
E15
F18
J18
K18
K16

Z0902
Z0903

D27
D28
A34
A35
A41
J19
H7
AF11
AG11
F7
F3
R32
T32

SM_CKE_2(#) connected to Dimm1 CK1(#)


SM_CKE_3(#) connected to Dimm1 CK0(#)

GHCH integrated graphics busy


CFG_20
CFG_19
CFG_18
CFG_17
CFG_16
CFG_15
CFG_14
CFG_13
CFG_12
CFG_11
CFG_10
CFG_9
CFG_8
CFG_7
CFG_6
CFG_5
CFG_4
CFG_3
CFG_2
CFG_1
CFG_0

R375
150R_1%

A3
A39
A4
A40
AW1
AW41
AY1
AY41
B2
B41
BA1
BA2
BA3
BA39
BA40
BA41
C1
C41
D1

CFG19
CFG18

13
13

CFG16

13

PM_THRMTRIP#
C

R110
R123

*2.2K
*2.2K

C553
*0.1u
CFG9

13

CFG5

13

CPU_BSEL2 5
CPU_BSEL1 5,21
CPU_BSEL0 5

PM_EXTTS#1

R804

Base on PWROK
+1.5VS

R805
R806

*60.4R
*60.4R

R807
R808

*60.4R
*60.4R

*0R

PM_DPRSLPVR 16,29

Add 212 in RD
Colse to NB
DELAY_VR_PWRGOOD

C63
0.1u

Add 213 in R:D

CALISTOGA

Only Base on Discreted VGA


VCCA_DPLLA , VCCA_DPLLB => NC
DREF_CLKP / DREF_SSCLKP = GND
DREF_CLKN / DREF_SSCLKN = GND
VCCA_DPLLA , VCCA_DPLLB =>1.5V
DREF_CLKP / DREF_SSCLKP = 1.5V
DREF_CLKN / DREF_SSCLKN = GND
CFG0

CFG1

CFG2

Host
Clock
frequency

For MEN bus throttling

133

+3.3V

166

R141

10K

R130

10K

CFG7 ( IPU ) =>

1= Mobility CPU
0 = Reverse

PM_EXTTS#0
Name of Part
PM_EXTTS#1
Project

Check with S/W

NB(2)_DMI/VGA/MICS

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

/ 50

UNIWILL COMPUTER CORP.


1

NB_PEG_RXN[15..0]
NB_PEG_RXP[15..0]
ATI_PEG_RXN[15..0]
ATI_PEG_RXP[15..0]

CRT FUNC. SEL


@0Rx4_0402/*0Rx4_0402
NB_CRT_RED
8
NB_CRT_GREEN
7
NB_CRT_BLUE
6
5

RP11
1
2
3
4

@0Rx4_0402/*0Rx4_0402
NB_CRT_RED#
8
NB_CRT_GREEN#
7
NB_CRT_BLUE#
6
NB_CRT_IREF
5

R113
R111

NB_CRT_BLUE#
NB_CRT_GREEN#
NB_CRT_RED#

RP28
8
7
6
5

@*0Rx4_0402/0Rx4_0402
1
2
3
4

24.9R_1%
U11C

22

GM_CRT_HSYNC
@0R/*0R
GM_CRT_VSYNC
@0R/*0R

NB_EN_BL

22 NB_LDDC_CLK
22 NB_LDDC_DATA
R132
22 NB_FPVDDEN

TV FUNC. SEL
1
2
3
4

1
2
3
4

@0Rx4_0402/*0Rx4_0402
8
7 TV_DACB
6 TV_DACA
5 TV_IRTNA

RP8

CRT FUNC.
DISable.
ALL DAC
PORT

TVIREF

L_BKLTCTL
L_BKLTEN
L_CLKCTLA
L_CLKCTLB
L_DDC_CLK
L_DDC_DATA
L_IBG
L_VBG
L_VDDEN
L_VREFH
L_VREFL
LA_CLK#
LA_CLK
LB_CLK#
LB_CLK

22 NB_LA_DATA022 NB_LA_DATA122 NB_LA_DATA2-

C37
B35
A37

LA_DATA#_0
LA_DATA#_1
LA_DATA#_2

22 NB_LA_DATA0+
22 NB_LA_DATA1+
22 NB_LA_DATA2+

B37
B34
A36

LA_DATA_0
LA_DATA_1
LA_DATA_2

22 NB_LB_DATA022 NB_LB_DATA122 NB_LB_DATA2-

G30
D30
F29

LB_DATA#_0
LB_DATA#_1
LB_DATA#_2

22 NB_LB_DATA0+
22 NB_LB_DATA1+
22 NB_LB_DATA2+

F30
D29
F28

LB_DATA_0
LB_DATA_1
LB_DATA_2

TV_DACA
TV_DACB
TV_DACC

A16
C18
A19

TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT

TVIREF
TV_IRTNA
TV_IRTNB
TV_IRTNC

J20
B16
B18
B19

TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC

K30
J29

TV_DCONSEL0
TV_DCONSEL1

NB_LA_CLKNB_LA_CLK+
NB_LB_CLKNB_LB_CLK+

LVDS

@0Rx4_0402/*0Rx4_0402
8 TV_IRTNB
7 TV_IRTNC
6 TV_DACC
5 TVIREF

D32
J30
H30
H29
G26
G25
L_IBG
B38
@*1.5K_1%/1.5K_1% C35
F32
C33
C32
A33
A32
E27
E26

22
22
22
22

+1.5V
RP9

R147
RP29
8
7
6
5

TV_IRTNC
TV_IRTNB
TV_IRTNA

@*0Rx4_0402/0Rx4_0402
1
2
3
4

@*4.99K_1%/4.99K_1%

TV_DACB
TV_DACC
R448
@*150R/150R

R443

R449

@*150R/150R

@*150R/150R

27 NB_CRT_GREEN
27 NB_CRT_RED

R447

R446

R445
@*150R/150R

@*150R/150R

27 NB_DCC_CLK
27 NB_DCC_DATA
27 NB_CRT_HSYNC

R114

27 NB_CRT_VSYNC

R112

GM_CRT_HSYNC
@*39R/39R
GM_CRT_VSYNC
@*39R/39R

NB_CRT_IREF

C26
C25
G23
J22
H23

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC

VGA

NB_CRT_BLUE E23
NB_CRT_BLUE# D23
NB_CRT_GREEN C22
NB_CRT_GREEN#B22
NB_CRT_RED
A21
NB_CRT_RED# B21

27 NB_CRT_BLUE

TV

25
25

+1.5V

R126

@*150R/150R
R444
@*255R_1%/255R_1%

GRAPHICS

RP10
1
2
3
4

PCI-EXPRESS

+1.05V

36
36
36
36

EXP_A_COMPI
EXP_A_COMPO

D40 PEG_COMP
D38

EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15

F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38

NB_PEG_RXN0
NB_PEG_RXN1
NB_PEG_RXN2
NB_PEG_RXN3
NB_PEG_RXN4
NB_PEG_RXN5
NB_PEG_RXN6
NB_PEG_RXN7
NB_PEG_RXN8
NB_PEG_RXN9
NB_PEG_RXN10
NB_PEG_RXN11
NB_PEG_RXN12
NB_PEG_RXN13
NB_PEG_RXN14
NB_PEG_RXN15

EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15

D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38

NB_PEG_RXP0
NB_PEG_RXP1
NB_PEG_RXP2
NB_PEG_RXP3
NB_PEG_RXP4
NB_PEG_RXP5
NB_PEG_RXP6
NB_PEG_RXP7
NB_PEG_RXP8
NB_PEG_RXP9
NB_PEG_RXP10
NB_PEG_RXP11
NB_PEG_RXP12
NB_PEG_RXP13
NB_PEG_RXP14
NB_PEG_RXP15

EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15

F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40

NB_PEG_TXN0 C147
NB_PEG_TXN1 C555
NB_PEG_TXN2 C138
NB_PEG_TXN3 C547
NB_PEG_TXN4 C123
NB_PEG_TXN5 C542
NB_PEG_TXN6 C111
NB_PEG_TXN7 C540
NB_PEG_TXN8 C96
NB_PEG_TXN9 C530
NB_PEG_TXN10 C92
NB_PEG_TXN11 C524
NB_PEG_TXN12 C84
NB_PEG_TXN13 C514
NB_PEG_TXN14 C73
NB_PEG_TXN15 C503

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u

ATI_PEG_RXN0
ATI_PEG_RXN1
ATI_PEG_RXN2
ATI_PEG_RXN3
ATI_PEG_RXN4
ATI_PEG_RXN5
ATI_PEG_RXN6
ATI_PEG_RXN7
ATI_PEG_RXN8
ATI_PEG_RXN9
ATI_PEG_RXN10
ATI_PEG_RXN11
ATI_PEG_RXN12
ATI_PEG_RXN13
ATI_PEG_RXN14
ATI_PEG_RXN15

EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15

D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40

NB_PEG_TXP0 C150
NB_PEG_TXP1 C558
NB_PEG_TXP2 C145
NB_PEG_TXP3 C549
NB_PEG_TXP4 C131
NB_PEG_TXP5 C545
NB_PEG_TXP6 C117
NB_PEG_TXP7 C541
NB_PEG_TXP8 C107
NB_PEG_TXP9 C539
NB_PEG_TXP10 C95
NB_PEG_TXP11 C529
NB_PEG_TXP12 C86
NB_PEG_TXP13 C517
NB_PEG_TXP14 C79
NB_PEG_TXP15 C510

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u

ATI_PEG_RXP0
ATI_PEG_RXP1
ATI_PEG_RXP2
ATI_PEG_RXP3
ATI_PEG_RXP4
ATI_PEG_RXP5
ATI_PEG_RXP6
ATI_PEG_RXP7
ATI_PEG_RXP8
ATI_PEG_RXP9
ATI_PEG_RXP10
ATI_PEG_RXP11
ATI_PEG_RXP12
ATI_PEG_RXP13
ATI_PEG_RXP14
ATI_PEG_RXP15

CALISTOGA

Name of Part
Project

NB(3)_VGA_TV_LVDS

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

10

/ 50

UNIWILL COMPUTER CORP.


1

14 MA_DQ[63:0]

MA_BA[2:0] 14
14 MB_DQ[63:0]

MB_BA[2:0] 14

MA_DM[7:0] 14

U11I

MB_DM[7:0] 14
MA_DQS[7:0] 14
MB_DQS[7:0] 14
MA_DQS#[7:0] 14
MB_DQS#[7:0] 14
MAA_A[13:0] 14
MBA_A[13:0] 14

U11D
D

SA_BS_0
SA_BS_1
SA_BS_2

AU12
AV14
BA20

MA_BA0
MA_BA1
MA_BA2

SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

AY13
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4

MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5

MA_DQS0
MA_DQS1
MA_DQS2
MA_DQS3
MA_DQS4
MA_DQS5
MA_DQS6
MA_DQS7
MA_DQS#0
MA_DQS#1
MA_DQS#2
MA_DQS#3
MA_DQS#4
MA_DQS#5
MA_DQS#6
MA_DQS#7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12

MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13

SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#

AW14
AK23
AK24
AY14

MA_CAS# 14

MA_RAS# 14
MA_WE#

14

MB_DQ0
MB_DQ1
MB_DQ2
MB_DQ3
MB_DQ4
MB_DQ5
MB_DQ6
MB_DQ7
MB_DQ8
MB_DQ9
MB_DQ10
MB_DQ11
MB_DQ12
MB_DQ13
MB_DQ14
MB_DQ15
MB_DQ16
MB_DQ17
MB_DQ18
MB_DQ19
MB_DQ20
MB_DQ21
MB_DQ22
MB_DQ23
MB_DQ24
MB_DQ25
MB_DQ26
MB_DQ27
MB_DQ28
MB_DQ29
MB_DQ30
MB_DQ31
MB_DQ32
MB_DQ33
MB_DQ34
MB_DQ35
MB_DQ36
MB_DQ37
MB_DQ38
MB_DQ39
MB_DQ40
MB_DQ41
MB_DQ42
MB_DQ43
MB_DQ44
MB_DQ45
MB_DQ46
MB_DQ47
MB_DQ48
MB_DQ49
MB_DQ50
MB_DQ51
MB_DQ52
MB_DQ53
MB_DQ54
MB_DQ55
MB_DQ56
MB_DQ57
MB_DQ58
MB_DQ59
MB_DQ60
MB_DQ61
MB_DQ62
MB_DQ63

AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

DDR SYSTEM MEMORY B

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

DDR SYSTEM MEMORY

AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8

U11H
MA_DQ0
MA_DQ1
MA_DQ2
MA_DQ3
MA_DQ4
MA_DQ5
MA_DQ6
MA_DQ7
MA_DQ8
MA_DQ9
MA_DQ10
MA_DQ11
MA_DQ12
MA_DQ13
MA_DQ14
MA_DQ15
MA_DQ16
MA_DQ17
MA_DQ18
MA_DQ19
MA_DQ20
MA_DQ21
MA_DQ22
MA_DQ23
MA_DQ24
MA_DQ25
MA_DQ26
MA_DQ27
MA_DQ28
MA_DQ29
MA_DQ30
MA_DQ31
MA_DQ32
MA_DQ33
MA_DQ34
MA_DQ35
MA_DQ36
MA_DQ37
MA_DQ38
MA_DQ39
MA_DQ40
MA_DQ41
MA_DQ42
MA_DQ43
MA_DQ44
MA_DQ45
MA_DQ46
MA_DQ47
MA_DQ48
MA_DQ49
MA_DQ50
MA_DQ51
MA_DQ52
MA_DQ53
MA_DQ54
MA_DQ55
MA_DQ56
MA_DQ57
MA_DQ58
MA_DQ59
MA_DQ60
MA_DQ61
MA_DQ62
MA_DQ63

SB_BS_0
SB_BS_1
SB_BS_2

AT24
AV23
AY28

MB_BA0
MB_BA1
MB_BA2

SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AR24
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4

MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5

MB_DQS0
MB_DQS1
MB_DQS2
MB_DQS3
MB_DQS4
MB_DQS5
MB_DQS6
MB_DQS7
MB_DQS#0
MB_DQS#1
MB_DQS#2
MB_DQS#3
MB_DQS#4
MB_DQS#5
MB_DQS#6
MB_DQS#7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23

MBA_A0
MBA_A1
MBA_A2
MBA_A3
MBA_A4
MBA_A5
MBA_A6
MBA_A7
MBA_A8
MBA_A9
MBA_A10
MBA_A11
MBA_A12
MBA_A13

SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#

AU23
AK16
AK18
AR27

MB_CAS# 14

MB_RAS# 14
MB_WE#

14

CALISTOGA

Value

AC41
AA41
W41
T41
P41
M41
J41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34

VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96

VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179

VSS

AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23

CALISTOGA
A

Name of Part
Project

NB(3)_DDR2

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

11 / 50

UNIWILL COMPUTER CORP.


1

PCIE & DMI ANA


POWER <1.5 A

2.5V PCIE ANA


Power < 2 mA
+2.5V

Intel :10Ux2 + 220Ux1


+1.5V
L53

+1.05V

0R/0805
Ca_VCC3G

L58

< 0.8A

0R/0603
C488

C489

C78

4.7u/10V/X5R/0805 4.7u/10V/X5R/0805 0.1u

@*0R/0R/0603

Ca_VCCA3GBG

0.1u

C146

L14

+2.5V

C550
JP13

@*QT1608RL181/QT1608RL181

Z1201
@0R/0.1u
Z1202

<>
C182

0.1u

Ca_VCC3G
@*0R/1u/10V
R152

@0R/0.1u

@0R/*0R

C74
C492

+1.05V

0.1u

D12
4.7u/10V/X5R/0805

Z1203
R165

VCCA_CRTDAC

@*QT1608RL181/QT1608RL181
C149

C198
@*0R/0.1u

@*0R/1u/10V
1

2
JP3
+2.5V

Ca_VCC3APLL
Ca_VCCA3GBG
Ca_VSSA3GBG

@0R/10R

@*BAT54/BAT54

L20

+2.5V

<>
@*QT1608RL181/QT1608RL181

L13

C190
@0R/0.1u
2

JP2

VCCSYNC

C30
B30
A30

VCC_TXLVDS0
VCC_TXLVDS1
VCC_TXLVDS2

AJ41
AB41
Y41
V41
R41
N41
L41
AC33
G41
H41

0R/0603
Ca_VCC3APLL

H22

C186

1 Ca_VSSA3GBG

2
L9

L25

+2.5V

C469

U11G

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG

VSSA_CRTDAC

F21
E21
G21

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC

Ca_VCCADPLLA
Ca_VCCADPLLB
Ca_VCCAHPLL

B26
C39
AF1

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL

Z1204
Z1205

A38
B39

VCCA_LVDS
VSSA_LVDS

Ca_VCCAMEMPLL

AF2

VCCA_MPLL

+3.3V_ATVBG
VSS_ATVBG

H20
G20

VCCA_TVBG
VSSA_TVBG

E19
F19
C20
D20
E20
F20

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

AH1
AH2

VCCD_HMPLL0
VCCD_HMPLL1

A28
B28
C28

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

D21

VCCD_TVDAC

A23
B23
B25

VCC_HV0
VCC_HV1
VCC_HV2

H19

VCCD_QTVDAC

<>

+1.5V
+3.3V_TVDACA

COULD OP , SEE LAYOUT .

+3.3V_TVDACB

DACA
40mA

+3.3V_TVDACC

Ca_VCCADPLLA
L23
@*QT1608RL060/QT1608RL060
C

C232

+1.5V

C222

L8

@0R/0603/QT1608RL060

digital divider

150mA

Z1206

C490
VCC_LVDS

@*4.7u/10V/X5R/0805/*4.7u/10V/X5R/0805
@*0.1U/0.1u
0.1u

DACB
40mA
Ca_VCCADPLLB
L60
@*QT1608RL060/QT1608RL060

+1.5V
C176

C199

0.1u

C191

1u

+3.3V

C187

0.1u

C188

40mA

@*4.7u/10V/X5R/0805/*4.7u/10V/X5R/0805
@*0.1U/0.1u

HOSTPLL
45mA

+1.5V

L11

+1.5V_QTVDAC

@0R/0603/QT1608RL181
C137

Ca_VCCAHPLL

L54

0.1u
QT1608RL120
C502

C501

*4.7u/10V/X5R/0805

0.1u

C69

1u

+1.5V

Ca_VCCAMEMPLL

L10
QT1608RL120
C62

MEMTPLL
45mA

R142

@*0R/0R

VCC_LVDS

C185

C181

@*0R/1u

@0R/0.1u

C68

*4.7u/10V/X5R/0805

For DDR DLL , DDR IO ,


FSB IO < 1.9A

0.1u

Filter component only need when


GMCH core is 1.5V for extended
graphics performance .
B

R173
+1.5V

@0R/*0R
Z1207
R172
C

D13

@*BAT54/BAT54

@0R/10R
+1.5VS

L95 change to 0805


+3.3V

L19

+3.3V_TVDACA

@*QT1608RL181/QT1608RL181

C215

C178
@0.1u/0.1u

C155
@*0.022u/0.022u

C461

C81

C91

C66

*0.1u

0.1u

*4.7u/10V/X5R/0805
*4.7u/10V/X5R/0805 *1u/10V
+3.3V_TVDACB
C362
@0R/0603/QT1608RL181

C148
@*0.1u/0.1u

C212
@*0.022u/0.022u

C70

*4.7u/10V/X5R/0805 *1u/10V

C65

C67

C802

*0.1u

0.1u

0.1u

AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14
AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AD12

VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40

POWER

VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76

AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1

C128

C82

4.7u/10V/X5R/0805
*4.7u/10V/X5R/0805

C104

C114

1u

0.1u

C544

C122

4.7u/10V/X5R/0805

1u

C543

C121

4.7u/10V/X5R/0805

1u

C130

C90

0.1u

0.1u

C108

C80

0.1u

0.1u

VTTLF_C3
C583
0.47u/X7R

NB 1.05V layout < 2.5A


VTTLF_C1
VTTLF_C2

NB 1.5VS layout < 1.9A


C511

0.47u/X7R

C577
0.22u/X7R

NB 1.5V layout < 1.8A


B

NB 2.5V layout < 0.1A


NB 3.3V layout < 0.1A
NB 1.8VS layout < 3.2A

CALISTOGA

Add in R:C

+3.3V_TVDACC

C202
@*0.1u/0.1u

C207
@*0.022u/0.022u

L17

+3.3V_ATVBG

C203

JP4
2

<>

@0.1u/0.1u
VSS_ATVBG

Name of Part
Project

NB(4)_POWER

S50IA Main Board

Power decoupling need to modify for 945GM.

Sheet
Date: Thursday, October 12, 2006
3255

Rev

12 / 50

UNIWILL COMPUTER CORP.


1

+1.05V

+1.8VS
U11E

9 CFG16

R122
*2.2K

CFG16

Low = Dynamic ODT Disabled

(FSB Dynamic ODT) High = Dynamic ODT Enabled

9 CFG5

9 CFG9

R129
*2.2K

R124
*2.2K

Low = Reverse Lane


High = Normal

Low = DMI*2

CFG5
High = DMI*4
PCIe Lane

Design guide use 2.5V

CFG[17:3] have internal pullup ressistors.


Design guide use 2.5V

+3.3V

+3.3V

Low = 1.05V

CFG18
(VCC Select)

R121

High = 1.5V

CFG19
(DMI lane
Reversal)

*1K

9 CFG18

R120

0 = normal

*1K

1 = Reversed

9 CFG19

CFG[20:18] have internal pulldown resistors.

+1.05V

C88

+1.8VS

C98

C106

C110

C83

0.1u

0.1u

C89

C109

C129

0.1u

0.1u

0.1u

*4.7u/10V/X5R/0805

C536

4.7u/10V/X5R/0805

C103

4.7u/10V/X5R/0805

*4.7u/10V/X5R/0805

C87

4.7u/10V/X5R/0805

C102

4.7u/10V/X5R/0805

C535

0.22u/X7R

1.05V core < 1.5A

C105

1u

0.22u/X7R 0.1u

C112

C422

C423
4.7u/10V/X5R/0805

4.7u/10V/X5R/0805

C421

4.7u/10V/X5R/0805

C424

C417

C428

C426

4.7u/10V/X5R/0805

FSB 667 , 2 CHANNEL < 3.2A

0.1u

0.1u

0.1u

AA33
W33
P33
N33
L33
J33
AA32
Y32
W32
V32
P32
N32
M32
L32
J32
AA31
W31
V31
T31
R31
P31
N31
M31
AA30
Y30
W30
V30
U30
T30
R30
P30
N30
M30
L30
AA29
Y29
W29
V29
U29
R29
P29
M29
L29
AB28
AA28
Y28
V28
U28
T28
R28
P28
N28
M28
L28
P27
N27
M27
L27
P26
N26
L26
N25
M25
L25
P24
N24
M24
AB23
AA23
Y23
P23
N23
M23
L23
AC22
AB22
Y22
W22
P22
N22
M22
L22
AC21
AA21
W21
N21
M21
L21
AC20
AB20
Y20
W20
P20
N20
M20
L20
AB19
AA19
Y19
N19
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16

VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110

VCC

VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1

VCCSM_LF_C1
VCCSM_LF_C2
C470
0.47u/X7R

C458
0.47u/X7R
D

+1.05V
U11F
AD27
AC27
AB27
AA27
Y27
W27
V27
U27
T27
R27
AD26
AC26
AB26
AA26
Y26
W26
V26
U26
T26
R26
AD25
AC25
AB25
AA25
Y25
W25
V25
U25
T25
R25
AD24
AC24
AB24
AA24
Y24
W24
V24
U24
T24
R24
AD23
V23
U23
T23
R23
AD22
V22
U22
T22
R22
AD21
V21
U21
T21
R21
AD20
V20
U20
T20
R20
AD19
V19
U19
T19
AD18
AC18
AB18
AA18
Y18
W18
V18
U18
T18

VCCSM_LF_C3
C427
0.47u/X7R

VCCSM_LF_C4
C429
0.47u/X7R

VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

+1.5VS

NCTF

VCCSM_LF_C5
VCCSM_LF_C6
C431

Name of Part

C483
0.47u/X7R

CALISTOGA
0.47u/X7R

Project

NB(5)_POWER

S50IA Main Board

Date: Thursday, October 12, 2006


3255
4

CALISTOGA

Sheet

Rev

13 / 50

UNIWILL COMPUTER CORP.


1

+3.3V
+3.3V

Check SPD power comsumption


11 MBA_A[13:0]

MBA_A0
MBA_A1
MBA_A2
MBA_A3
MBA_A4
MBA_A5
MBA_A6
MBA_A7
MBA_A8
MBA_A9
MBA_A10
MBA_A11
MBA_A12
MBA_A13

+1.8VS

10K

10K
Z1401
Z1402

16,17 SB_SMB_DATA
16,17 SB_SMB_CLK
11 MA_BA[2:0]

MA_BA0
MA_BA1
MA_BA2
MA_CS#0
MA_CS#1

9 MA_CS#0
9 MA_CS#1
11 MA_DM[7:0]

MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_WE#
MA_CAS#
MA_RAS#

11 MA_WE#
11 MA_CAS#
11 MA_RAS#
9 MA_CKE0
9 MA_CKE1
9
9
9
9
11

MA_CK0
MA_CK1
MA_CK#0
MA_CK#1
MA_DQS[7:0]

198
200

SA0
SA1

195
197

SDA
SCL

107
106
85

BA0
BA1
BA2

110
115

S0#
NC/S1#

10
26
52
67
130
147
170
185

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

109
113
108

WE#
CAS#
RAS#

MA_CKE0
MA_CKE1

79
80

MA_CK0
MA_CK1
MA_CK#0
MA_CK#1

30
164
32
166

CK0
CK1
CK#0
CK#1

13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

114
119

ODT0
NC/ODT1

MA_DQS0
MA_DQS1
MA_DQS2
MA_DQS3
MA_DQS4
MA_DQS5
MA_DQS6
MA_DQS7
MA_DQS#0
MA_DQS#1
MA_DQS#2
MA_DQS#3
MA_DQS#4
MA_DQS#5
MA_DQS#6
MA_DQS#7

11 MA_DQS#[7:0]

MA_ODT0
MA_ODT1

9 MA_ODT0
9 MA_ODT1

DDR_VREF

C378

184
187
190
193
196
171
172
177
178
183

163
DIMM1_EXTTS#0 50
69
83
120

10K
R320
10K

Z1403
Z1404
16,17 SB_SMB_DATA
16,17 SB_SMB_CLK
11 MB_BA[2:0]

MB_BA0
MB_BA1
MB_BA2
MB_CS#2
MB_CS#3

9 MB_CS#2
9 MB_CS#3
11 MB_DM[7:0]

11 MB_WE#
11 MB_CAS#
11 MB_RAS#
9 MB_CKE2
9 MB_CKE3
9 MB_CK3
9 MB_CK4
9 MB_CK#3
9 MB_CK#4
11 MB_DQS[7:0]

11 MB_DQS#[7:0]

Thermistor

+3.3V

1.5K_1%

BA0
BA1
BA2
S0#
NC/S1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

MB_WE#
MB_CAS#
MB_RAS#

109
113
108

WE#
CAS#
RAS#

MB_CKE2
MB_CKE3

79
80

MB_CK3
MB_CK4
MB_CK#3
MB_CK#4

30
164
32
166

CK0
CK1
CK#0
CK#1

MB_DQS0
MB_DQS1
MB_DQS2
MB_DQS3
MB_DQS4
MB_DQS5
MB_DQS6
MB_DQS7
MB_DQS#0
MB_DQS#1
MB_DQS#2
MB_DQS#3
MB_DQS#4
MB_DQS#5
MB_DQS#6
MB_DQS#7

13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

114
119

ODT0
NC/ODT1

0.1u
R333

SDA
SCL

107
106
85

10
26
52
67
130
147
170
185

C11

21 DDR2_TEMP

SA0
SA1

195
197

110
115

DDR_VREF

10K_T/0805

198
200

MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7

MB_ODT2
MB_ODT3

9 MB_ODT2
9 MB_ODT3
RT1

1
184
187
190
193
196
171
172
177
178
183

81
82
87
88
95
96
103
104
111
112
117
118

199

NC/TEST
NC
NC
NC
NC

CN10

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

145
149
150
155
156
161
162
165
168

R321

VDDSPD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+3.3V

VREF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84

81
82
87
88
95
96
103
104
111
112
117
118

199

CKE0
NC/CKE1

2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144

0.1u

VDDSPD

NC/TEST
NC
NC
NC
NC

+1.8VS

CKE0
NC/CKE1

MB_DQ[63:0] 11
DQ5
DQ0
DQ2
DQ3
DQ7
DQ6
DQ1
DQ4
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ21
DQ17
DQ20
DQ19
DQ18
DQ16
DQ22
DQ23
DQ24
DQ25
DQ27
DQ30
DQ28
DQ29
DQ26
DQ31
DQ37
DQ36
DQ39
DQ38
DQ33
DQ32
DQ35
DQ34
DQ40
DQ41
DQ42
DQ43
DQ45
DQ44
DQ46
DQ47
DQ54
DQ55
DQ50
DQ52
DQ53
DQ49
DQ48
DQ51
DQ56
DQ57
DQ62
DQ63
DQ60
DQ61
DQ59
DQ58

6
5
17
19
16
14
7
4
23
25
35
37
20
22
36
38
46
45
44
57
55
43
56
58
61
63
75
74
62
64
73
76
126
124
136
134
125
123
137
135
141
143
151
153
142
140
152
154
174
176
173
158
160
159
157
175
179
181
192
194
180
182
191
189

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

145
149
150
155
156
161
162
165
168

MB_DQ4
MB_DQ5
MB_DQ7
MB_DQ6
MB_DQ2
MB_DQ3
MB_DQ0
MB_DQ1
MB_DQ9
MB_DQ8
MB_DQ15
MB_DQ14
MB_DQ12
MB_DQ13
MB_DQ11
MB_DQ10
MB_DQ19
MB_DQ17
MB_DQ18
MB_DQ16
MB_DQ22
MB_DQ21
MB_DQ20
MB_DQ23
MB_DQ28
MB_DQ25
MB_DQ27
MB_DQ31
MB_DQ26
MB_DQ24
MB_DQ29
MB_DQ30
MB_DQ37
MB_DQ36
MB_DQ39
MB_DQ38
MB_DQ33
MB_DQ32
MB_DQ35
MB_DQ34
MB_DQ45
MB_DQ40
MB_DQ46
MB_DQ42
MB_DQ41
MB_DQ44
MB_DQ43
MB_DQ47
MB_DQ54
MB_DQ55
MB_DQ50
MB_DQ52
MB_DQ48
MB_DQ49
MB_DQ53
MB_DQ51
MB_DQ57
MB_DQ61
MB_DQ63
MB_DQ59
MB_DQ56
MB_DQ60
MB_DQ58
MB_DQ62

VREF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DDR_CON_NORMAL
PIN NC3~4=GND POWER

2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144

R324

DQ5
DQ1
DQ3
DQ7
DQ4
DQ0
DQ6
DQ2
DQ12
DQ13
DQ14
DQ11
DQ9
DQ8
DQ10
DQ15
DQ17
DQ16
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ28
DQ27
DQ30
DQ29
DQ26
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ44
DQ42
DQ43
DQ45
DQ41
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

MA_DQ1
MA_DQ7
MA_DQ6
MA_DQ3
MA_DQ0
MA_DQ4
MA_DQ5
MA_DQ2
MA_DQ13
MA_DQ8
MA_DQ10
MA_DQ9
MA_DQ12
MA_DQ14
MA_DQ15
MA_DQ11
MA_DQ16
MA_DQ20
MA_DQ18
MA_DQ22
MA_DQ21
MA_DQ17
MA_DQ19
MA_DQ23
MA_DQ24
MA_DQ25
MA_DQ28
MA_DQ30
MA_DQ26
MA_DQ29
MA_DQ31
MA_DQ27
MA_DQ37
MA_DQ36
MA_DQ35
MA_DQ38
MA_DQ33
MA_DQ32
MA_DQ39
MA_DQ34
MA_DQ42
MA_DQ44
MA_DQ43
MA_DQ47
MA_DQ45
MA_DQ40
MA_DQ46
MA_DQ41
MA_DQ53
MA_DQ52
MA_DQ54
MA_DQ55
MA_DQ48
MA_DQ49
MA_DQ50
MA_DQ51
MA_DQ60
MA_DQ63
MA_DQ58
MA_DQ62
MA_DQ57
MA_DQ61
MA_DQ59
MA_DQ56

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

R323

163
DIMM0_EXTTS#0 50
69
83
120

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
NC/A13
NC/A14
NC/A15

MA_DQ[63:0] 11
6
7
19
16
4
5
14
17
20
22
36
37
25
23
35
38
45
43
55
57
44
46
56
58
61
63
62
75
74
64
73
76
123
125
135
137
124
126
134
136
141
140
151
153
142
143
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

0.1u

0R

9,21 EXTTS#0

CN2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

0R

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84

R315

C387

0.1u

R312
9,21 EXTTS#0

MBA_A[13:0]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
NC/A13
NC/A14
NC/A15

MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13

C10

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

11 MAA_A[13:0]

DDR_CON_REV
PIN NC3~4=GND POWER

+0.9VS

C369

C6

C8

C367

C365

C364

C3

C395

C396

C366

C403

C402

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

+1.8VS
R322
C392
150R_1%

C399

C401

C400

C394

C9

C7

C4

C398

C397

C5

C368

C393

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

DDR2_Terminate (SWAP RP PIN when layout)

0.1u

R325

C390

C379

150R_1%

0.1u

1000p

Layout note: Place one cap close to every 2 pullup resistors terminated to DDR_VREF

+1.8VS

+1.8VS

+1.8VS

Modify in R:D

Modify in R:D

D
C389
2.2u/X5R/0603

C419
2.2u/X5R/0603

C371
2.2u/X5R/0603

C372
2.2u/X5R/0603

C388
2.2u/X5R/0603

C370
22u/10V/X5R/0805

C383
22u/10V/X5R/0805

C375
0.1u

C374
0.1u

C373
0.1u

C384
0.1u

C382
0.1u

C385
0.1u

C386
0.1u

+0.9VS

DDR_VREF

C13
2.2u/X5R/0603

C12

C803

C804

C805

C806

0.1u

0.1u

0.1u

0.1u

C376

2.2u/X5R/0603

Modify 52 in R:B

2.2u/X5R/0603

Add in 71 R:B1

RP15
MBA_A12
8
MBA_A9
7
MBA_A8
6
MA_CKE1
5

56Rx4_0402
1
2
3
4

RP2
MA_ODT1
1
MA_CS#1
2
MA_CAS#
3
MA_WE#
4

56Rx4_0402
8
7
6
5

RP3
MA_BA0
1
MAA_A10
2
MAA_A1
3
MAA_A3
4

56Rx4_0402
8
7
6
5

56Rx4_0402
MB_ODT3
8
MA_ODT0
7
MAA_A13
6
MA_CS#0
5

RP20
1
2
3
4

56Rx4_0402
MA_RAS#
8
MA_BA1
7
MB_CAS#
6
MB_CS#3
5

RP19
1
2
3
4

RP4
MAA_A5
1
MAA_A8
2
MAA_A9
3
MAA_A12
4
56Rx4_0402
MAA_A0
8
MAA_A2
7
MB_BA0
6
MB_WE#
5
RP5
MA_BA2
1
MA_CKE0
2
3
4

56Rx4_0402
8
7
6
5
RP18
1
2
3
4
56Rx4_0402
8
7
6
5

56Rx4_0402
MAA_A11
8
MAA_A7
7
MBA_A5
6
MBA_A3
5

RP16
1
2
3
4

56Rx4_0402
MBA_A1
8
MAA_A6
7
MAA_A4
6
MBA_A10
5

RP17
1
2
3
4

56Rx4_0402
8
7
6
5

RP12
MB_CKE3
1
MBA_A11
2
MBA_A7
3
MBA_A6
4

56Rx4_0402
8
7
6
5

RP13
1
2
3
4

56Rx4_0402
8
7
6
5

MBA_A4
MBA_A2
MBA_A0
MB_BA1

MB_CKE2
MB_BA2
Name of Part
Project

R318
R319

56R
56R

DDR2 _SO-DIMM

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255

RP14
MB_RAS#
1
MB_CS#2
2
MB_ODT2
3
MBA_A13
4

Rev

14 / 50

UNIWILL COMPUTER CORP.


1

+3.3VA

+3.3VA_RTC
D23
C Z1501 R367

470R

RTC Circuitry

C455
BAT54

1u/10V/Y5V/0603

Modify in R:D
D17

Check J1 on big door side

Z1502 A

R373

20K

C
BAT54

C459
1u

J2
OPEN_S
R366

C437
C438

*0.1u
2

R238
1M
1K

12p
Y1
32.768KHz_DIP

Z1503

R346
10M

+1.05V

C434

LPC_AD[3:0] 21

INTRUDER#
INTVRMEN

W1
Y1
Y2
W3

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

Disable VccSus1.05 VRM Mode


EE_CS has internal pull-down.
EE_DOUT has internal pull-up.

Modify 72 in R:B1

25 ACZ_BITCLK

R355

0R

C452
*22p/NPO

25 ACZ_SYNC
25 ACZ_RST#

Change BOM

V3

LAN_CLK

U3

LAN_RSTSYNC

U5
V4
T5

LAN_RXD0
LAN_RXD1
LAN_RXD2

U7
V6
V7

LAN_TXD0
LAN_TXD1
LAN_TXD2

R365

22R

Z1504
Z1506

U1
R6

ACZ_BIT_CLK
ACZ_SYNC

R364

22R

Z1507

R5

ACZ_RST#

T2
T3
T1

ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2

T4

ACZ_SDOUT

25 ACZ_SDATAIN0
25 ACZ_SDATAIN1

Add series resister 39 ohm in Audio Bd.


25 ACZ_SDATAOUT

R356

Z1508

22R

AF18

25 SATA_LED#

SATA C =
1nF ~
20nF

20
20
20
20

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

7 SATA_CLKN
7 SATA_CLKP

C23

C24
1000p

C404
1000p

C409
1000p

1000p SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

SATA_CLKN
SATA_CLKP

within 500 mils

R31

20
20
20
20
20
20

24.3R_1%

IDE_PDIOR#
IDE_PDIOW#
IDE_PDDACK#
IDE_IRQ15
IDE_PDIORDY
IDE_PDDREQ

+3.3VA_RTC

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

AF7
AE7
AG6
AH6

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AF1
AE1

SATA_CLKN
SATA_CLKP

AF15
AH15
AF16
AH16
AG16
AE15

LAD0
LAD1
LAD2
LAD3
LDRQ0#
LDRQ1#/GPIO23

AC3
AA5

LDRQ0#

LFRAME#

AB3

LPC_FRAME# 21

A20GATE
A20M#
CPUSLP#

AE22
AH28
AG27

CPUSLP# R339

TP1/DPRSTP#
TP2/DPSLP#

AF24
AH25

Z1510
Z1511

H_A20GATE

0R
0R

H_DPRSTP#
H_DPSLP#

R348

56R

H_DPRSTP#

R343

*56R

H_DPSLP#

R345

*56R

H_A20GATE

R331

8.2K

+3.3V

H_DPRSTP# 5,29
H_DPSLP# 5
C

SB_H_FERR

R347

0R

H_FERR#

AG26

GPIO49/CPUPWRGD

AG24

H_PWRGD 5

IGNNE#
INIT3_3V#
INIT#
INTR

AG22
AG21
AF22
AF25

H_IGNNE# 5

RCIN#

H_FERR#

H_A20GATE 21
H_A20M# 5
H_CPUSLP# 5,8

0R

R342
R344

21

FERR#

SATARBIASN
SATARBIASP
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

AA6
AB5
AC4
Y6

H_INIT#
H_INTR

AG23RC_IN

NMI
SMI#

AH24
AF23

= KBC RESET OK

H_FERR# 5

5
5

+1.05V

H_RCIN# 17,21
H_NMI
H_SMI#

R335

5
5

56R

STPCLK#

AH22

THERMTRIP#

AF26

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15

IDE_PDD0 20
IDE_PDD1 20
IDE_PDD2 20
IDE_PDD3 20
IDE_PDD4 20
IDE_PDD5 20
IDE_PDD6 20
IDE_PDD7 20
IDE_PDD8 20
IDE_PDD9 20
IDE_PDD10 20
IDE_PDD11 20
IDE_PDD12 20
IDE_PDD13 20
IDE_PDD14 20
IDE_PDD15 20

DA0
DA1
DA2

AH17
AE17
AF17

IDE_PDA0 20
IDE_PDA1 20
IDE_PDA2 20

DCS1#
DCS3#

AE16
AD16

IDE_PDCS1# 20
IDE_PDCS3# 20

H_STPCLK# 5
H_THERMTRIP_R

R328

24.9R_1%

PM_THRMTRIP# space 2:1

PM_THRMTRIP# 5,9

Close to SB in 2".

SATALED#

AF3
AE3
AG2
AH2

Z1509 AH10
AG10

LPC

Y5
W4

CPU

RTCRST#

RTC

SM_INTRUDER#
INTVRMEN

RTXC1
RTCX2

AA3

LAN

RTC_RST#

AC-97 /AZALIA

12p
RTC_CON

SATA

CN21

AB1
AB2

IDE

U4A
RTC_X1
RTC_X2

H_THERMTRIP_R

C411
*0.1u
B

+3.3VS

R357
100K

ICH6-6-21_0

AUTO_C4# 21
R360
H_DPSLP#

R340

499R

Z1512

*330K

Q35
2N3904

B
E

C440
INTVRMEN
0.1u
R358

Disable VccSus1.05 VRM Mode

0R
A

Name of Part
Project

SB(1)_CPU/SATA/IDE

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

15 / 50

UNIWILL COMPUTER CORP.


1

E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4#/GPIO22
GNT4#/GPIO48
GPIO1/REQ5#
GPIO17/GNT5#

D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8

C/BE0#
C/BE1#
C/BE2#
C/BE3#

B15
C12
D12
C15

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

A7
E10
B18
A12
C9
E11
B10
F15
F14
F16

PLTRST#
PCICLK
PME#

C26
A9
B19

PCI

INTERRUPT

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

18 INT_PIRQC#
18 INT_PIRQD#

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

A3
B4
C5
B5

PIRQA#
PIRQB#
PIRQC#
PIRQD#

AE5
AD5
AG4
AH4
AD9

RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]

I/F
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#

PCI_REQ#2

PCI_REQ#1 18
PCI_GNT#1 18

PCI_REQ#3

R82

R398

*10K

*10K

+3.3V
RP6
SMBCLK
SMBDATA
LINK_ALERT#

+3.3VS
+3.3VS

BIOS strap LSB


PCI_REQ#5

R98
BIOS strap MSB

10K

R92
R24

Z1601
SYS_RST#

10K

AB18
B23

17 SMB_ALERT#

AC20
AF21

+3.3V
+3.3VS

R387
R381

10K
10K

18 PM_CLKRUN#

BIOS_REC_R
FWH_MFG_MODE_R
PM_CLKRUN#

S/W Throtting

17,19,24 PCIE_WAKE#
17,18,21 INT_SERIRQ
17,21 PM_THROTTING#

AE9
AG8
AH8
F21
AH20

RI#
SPKR
SUS_STAT#
SYS_RST#

GPIO21/SATA0GP
GPIO19/SATA1GP
GPIO36/SATA2GP
GPIO37/SATA3GP

GPIO0/BM_BUSY#
GPIO11/SMBALERT#
GPIO18/STPPCI#
GPIO20/STPCPU#

A21

GPIO26

B21
E23

GPIO27
GPIO28
GPIO32/CLKRUN#

AC19
U2

GPIO33/AZ_DOCK_EN#
GPIO34/AZ_DOCK_RST#

PCIE_WAKE#

F20
AH21
AF20

WAKE#
SERIRQ
THRM#

SB_VR_PWRGD

AD22

VRMPWRGD

AC21
AC18
E21

GPIO6
GPIO7
GPIO8

MISC
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#

SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1

AG18

PLT_RST# 9,17,19,20,21,24,36
PCI_CLK_SB 7
PCI_PME# 18

LAN IDSEL=AD24 Device=8,


1394 IDSEL=AD20 Device=5

A27
A22

R334

7 PM_STPPCI#
7,23 PM_STPCPU#

PCIE WAKE#

C22
B22
A26
B25
A25

A28
ACZ_SPKR A19
*10K

9 BM_BUSY#
*10K

PCI_IRDY# 18
PCI_PAR 18
PCI_RST# 17,18,21,24
PCI_DEVSEL# 18
PCI_PERR#
PCI_LOCK#
PCI_SERR#
PCI_STOP# 18
PCI_TRDY# 18
PCI_FRAME# 18
PLT_RST#

17 SMLINK0
17 SMLINK1
17 PM_RI#
25 ACZ_SPKR

+3.3V

PCI_C/BE#[3:0] 18

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

8.2Kx4_0402

U4C

PCI_REQ#4

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

G8
F7
F8
G7

01 = SPI
10 = PCI
11 = LPC
( Internal PU)

PCI_REQ#0

SMB

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

CLOCKS SATA
GPIO

+3.3V

U4B

18 PCI_AD[31:0]

SYS-GPIO
Power MGT

AF19 Z1602
AH18Z1603
AH19Z1604
AE19 Z1605

4
3
2
1

5
6
7
8

( 3.3V , 1.5V
, PCI CLK )

CLK14
CLK48

AC1
B2

CLK_ICH14 7
CLK_USB48 7

SUSCLK

C20

SUS_CLK 17

SLP_S3#
SLP_S4#
SLP_S5#

B24
D23
F22

PM_SLP_S3# 17,19,21,24
PM_SLP_S4# 17,21

PWROK

AA4

GPIO16/DPRSLPVR

PWROK

AC22Z1607 R336

TP0/BATLOW#

C21

PWRBTN#

C23
C19 LAN_RST#

RSMRST#

Y4

GPIO

17,21

PM_DPRSLPVR 9,29

Modify in R:D

PM_BATLOW# 17

LAN_RST#

GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39

0R

PWRBTN# 21
LAN_RST#
0R PLT_RST#
*0R

R392
R264
Z1609 R352
100R

Modify in R:D
PM_RSMRST# 17,21

E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20

Check
with
BIOS

EC_EXTSMI# 21
PNLSW0
PNLSW1
PNLSW2

22
22
22

+1.5V
NB_SYNC# 9

ICH6-6-21_0

Internal AND with PWROK.

ICH6-6-21_0

Resume Power GPIO [8:10] [12:15] [25:28]

R326
*100K
PM_DPRSLPVR

PLTRST = platform Reset


High mininum 1 ms after both PEROK &
VRMPWRGD are high

+3.3V

R353

P72

10K
0R

R350

0R

SB_VR_PWRGD
C447

29 VR_PWRGD

0.1u

close
SB

CardReader

USB (M/B)

USB1

CON(USB BD)

USB (Audio)

USB2

CON(USB BD)

USB (MDC)

NEW CARD

NEW CARD

USB3

U4D

Modify 3 in R:A1

C60

0.33u/X7R

0.33u/X7R
C64

24 PCIE_TXN2
24 PCIE_TXP2

19 PCIE_RXN4
19 PCIE_RXP4

24 PCIE_RXN2
24 PCIE_RXP2

PCIE_RXN0
PCIE_RXP0
PCIE_TXN0_C
PCIE_TXP0_C

F26
F25
E28
E27

PCIE_RXN4
PCIE_RXP4
PCIE_TXN4_C
PCIE_TXP4_C

H26
H25
G28
G27

PERn2
PERp2
PETn2
PETp2

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2_C
PCIE_TXP2_C

K26
K25
J28
J27

PERn3
PERp3
PETn3
PETp3

M26
M25
L28
L27

PERn4
PERp4
PETn4
PETp4

P26
P25
N28
N27

PERn5
PERp5
PETn5
PETp5

T25
T24
R28
R27

PERn6
PERp6
PETn6
PETp6

0.33u/X7R

Modify in R:B

R2
P6
P1
+3.3VS
RP21
1
2
3
4

8
7
6
5

8.2Kx4_0402
8
7
6
5
1
2
3
4

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7

PERn1
PERp1
PETn1
PETp1

SPI_CLK
SPI_CS#
SPI_ARB

Direct Media Interface

0.33u/X7R
C56

24 PCIE_RXN0
24 PCIE_RXP0

PCI-Express

C55
19 PCIE_TXN4
19 PCIE_TXP4

0.33u/X7R

USB

0.33u/X7R
C77

24 PCIE_TXN0
24 PCIE_TXP0

SPI

C71

P5
P2

SPI_MOSI
SPI_MISO

D3
C4
D5
D4
E5
C3
A2
B3

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

V26
V25
U28
U27

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

9
9
9
9

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y26
Y25
W28
W27

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

9
9
9
9

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB26
AB25
AA28
AA27

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

9
9
9
9

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD25
AD24
AC28
AC27

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

9
9
9
9

DMI_CLKN
DMI_CLKP

AE28
AE27

CLK_PCIE_ICH# 7
CLK_PCIE_ICH 7

DMI_ZCOMP
DMI_IRCOMP

C25
D25

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3

USBRBIAS#
USBRBIAS

D2
D1

USB5

DOCKING

3G Module

USB6

CON(DC BD)

BlueTooth

USB7

CON(DC BD)

PR88

Del 9/1

PAD19
PAD20
PAD21
PAD23

8.2Kx4_0402

MINPCI
1394A
LAN
VT6421

EC_EXTSMI#

R410

10K

R412

10K

SMBCLK

R386

10K

SMBDATA

LINK_ALERT#

R93

10K

ACZ_SPKR

R80

*4.7K

+3.3V
+1.5V

1:Normal 0:No
Reboot Mode

R391
24.9R_1%
+3.3V

USB_P5USB_P5+
USB_P3USB_P3+
USB_P7USB_P7+
USB_P1USB_P1+
USB_P2USB_P2+
USB_P0USB_P0+
USB_P4USB_P4+
USB_P6USB_P6+

18
18
18
18

PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_SERR#
18 PCI_DEVSEL#
PCI_PERR#
PCI_LOCK#

25
25
25
25
25
25
24
24
25
25
24
24
24
24
27
27

PCI_REQ#0

18 PCI_REQ#1

PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_REQ#5
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
PM_CLKRUN#

18 INT_PIRQC#
18 INT_PIRQD#

19.6R_1%

ICH6-6-21_0
RP7

:
:
:
:

+3.3VS

Z1610

USB_RBIAS_PN R74

+3.3VS

USB (Audio)

USB4

ICH7M support PCI-E port1~4,


ICH7M-DH support PCI-E port1~6.

S50

USB0

Close to SB

R405
R87
R404
R376
R85
R84
R86
R402
R396
R81
R406
R403
R83
R399

8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K

R90
R89
R397
R88
R377
R384
R400
R380
R32

8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K

R28

*10K

R401

8.2K

+3.3V

R79
4.7K
Z1611
G

R354

SMBDATA

SB_SMB_CLK 14,17
A

SB_SMB_DATA 14,17

Q39
2N7002

Name of Part
Project

18 PCI_PAR

Q10
2N7002

SMBCLK

9 DELAY_VR_PWRGOOD

SB(2)_IO/GPIO/SYS

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

16 / 50

UNIWILL COMPUTER CORP.


1

+5VS +5VREF

+3.3V
A

+1.05V

AD17

V5REF[2]

F6
+3.3VS
A

C414

C478

D24
R388

BAT54

0.1u

1u

10R
V5REF_SUS

C507
0.1u
+1.5V

R363
0R/0805

PCI-E
C425

C456
C491

4.7u/10V/X5R/0805 0.1u

Z1701

C412

C435

C463

C485

C700

0.1u

0.1u

0.1u

0.1u

0.1u

4.7u/10V/X5R/0805

C454
4.7u/10V/X5R/0805

C473

C418

C494

C453

C444

C701

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

+3.3V

C484
+1.5V
0.1u

B27
SB_DMIPLL

L47
0R/0603

+1.5V
C413

C410

0.01u
4.7u/10V/X5R/0805

SB_DMIPLL

C408
C406

0.1u

1u/10V/Y5V/0603

C702

0.1u

0.1u

Add C on S/B
SB_SATAPLL

VccDMIPLL

AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5

Vcc1_5_A[1]
Vcc1_5_A[2]
Vcc1_5_A[3]
Vcc1_5_A[4]
Vcc1_5_A[5]
Vcc1_5_A[6]
Vcc1_5_A[7]
Vcc1_5_A[8]
Vcc1_5_A[9]

C448
+1.5V

C405
B

C430

1u/10V/Y5V/0603
+3.3VS

C703

0.1u

0.1u

Add C on S/B
C504

+1.5V

Vcc1_5_A[10]
Vcc1_5_A[11]
Vcc1_5_A[12]
Vcc1_5_A[13]
Vcc1_5_A[14]
Vcc1_5_A[15]
Vcc1_5_A[16]
Vcc1_5_A[17]
Vcc1_5_A[18]

+1.5V
0.1u
R75
R332
0R
C72
SB_SATAPLL

U6
R7

V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]

AE23
AE26
AH26

Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]

AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19

Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]

A5
B13
B16
B7
C10
D15
F9
G11
G12
G16

VccRTC
VccSus3_3[1]

P7

VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]

A24
C24
D19
D22
G19

VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]

K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7

Vcc1_5_A[19]
Vcc1_5_A[20]

AB17
AC17

Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]

T7
F17
G17

Vcc1_5_A[24]
Vcc1_5_A[25]

AB8
AC8

C1

VccUSBPLL

VccSus1_05[2]
VccSus1_05[3]

C28
G20

C415
0.1u

C449
0.1u

C451

C446
0.1u

+3.3VS

4.7u/10V/X5R/0805
16 PM_RI#
16 SMB_ALERT#

In Mobile is for
LAN controller
Interface buffer
C442

Z1703

+3.3V

10K
10K

R94
R95

10K
10K

L49

C443

0.1u

16 SMLINK0
16 SMLINK1

R91
R97

0R/0603

0.1u

+3.3V

+3.3VS

C420
0.1u

+1.05V
+3.3V
C466

C462

+3.3V

C512

0.1u

16,18,21 INT_SERIRQ
16,21 PM_THROTTING#
15,21 H_RCIN#

R30
R25
R327

8.2K
8.2K
8.2K

14,16 SB_SMB_CLK
14,16 SB_SMB_DATA

R78
R389

10K
10K

R407

*8.2K

R408

*8.2K

R411
R409

*10K
1K

C476

Add C on S/B
0.1u

0.1u

+3.3VA_RTC
C513

C407

0.1u

0.1u

C436

C441

Add C on S/B

0.1u

0.1u

16,18,21,24 PCI_RST#
9,16,19,20,21,24,36

Del C on S/B

PLT_RST#

16 SUS_CLK
16,19,24 PCIE_WAKE#

R99

16 PM_BATLOW#

C468

C460

0.1u

0.1u
16,21 PM_RSMRST#
16,21 PWROK
C467

0.1u

0.1u

8.2K

R96
R382

16,19,21,24 PM_SLP_S3#
16,21 PM_SLP_S4#

C519

+3.3VS

4.7K
4.7K

R351

10K

R341

10K

C496
0.1u

Add C on S/B

R337

+1.5V
0R

C432
Z1704

0.1u

+1.5V

C433

C477
C391

K7

1u/6.3V/X5R

C465
0.1u

+3.3VS
W5

Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]

C706
0.1u

1u/10V/Y5V/0603

VccSus1_05[1]

VccSus1_05/VccLAN1_05[1]
VccSus1_05/VccLAN1_05[2]

C705
0.1u

0.1u

VccSus3_3[19]

AA2
Y7

C704
0.1u

C457

E3
0R
Z1702

Vcc3_3/VccHDA
VccSus3_3/VccSusHDA

ATX

Vcc3_3[2]

AB10
AB9
AC10
AD10
AE10
AF10
AF9
AG9
AH9

L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
V5
V1
W2
W7

VccSATAPLL

AH11

0.1u

Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]

VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]

Vcc3_3[1]

AG28

AD2

VCC PAUX

ARX

+3.3V

C508

Vcc1_5_B[1]
Vcc1_5_B[2]
Vcc1_5_B[3]
Vcc1_5_B[4]
Vcc1_5_B[5]
Vcc1_5_B[6]
Vcc1_5_B[7]
Vcc1_5_B[8]
Vcc1_5_B[9]
Vcc1_5_B[10]
Vcc1_5_B[11]
Vcc1_5_B[12]
Vcc1_5_B[13]
Vcc1_5_B[14]
Vcc1_5_B[15]
Vcc1_5_B[16]
Vcc1_5_B[17]
Vcc1_5_B[18]
Vcc1_5_B[19]
Vcc1_5_B[20]
Vcc1_5_B[21]
Vcc1_5_B[22]
Vcc1_5_B[23]
Vcc1_5_B[24]
Vcc1_5_B[25]
Vcc1_5_B[26]
Vcc1_5_B[27]
Vcc1_5_B[28]
Vcc1_5_B[29]
Vcc1_5_B[30]
Vcc1_5_B[31]
Vcc1_5_B[32]
Vcc1_5_B[33]
Vcc1_5_B[34]
Vcc1_5_B[35]
Vcc1_5_B[36]
Vcc1_5_B[37]
Vcc1_5_B[38]
Vcc1_5_B[39]
Vcc1_5_B[40]
Vcc1_5_B[41]
Vcc1_5_B[42]
Vcc1_5_B[43]
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc1_5_B[46]
Vcc1_5_B[47]
Vcc1_5_B[48]
Vcc1_5_B[49]
Vcc1_5_B[50]
Vcc1_5_B[51]
Vcc1_5_B[52]
Vcc1_5_B[53]

VCCA3GP

AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23

V5REF_Sus

CORE

+5VS

V5REF[1]

IDE

10R

*10R

G10

PCI

VCC5REF

USB

D11
BAT54

INTEL
recommend
100 ohm

ICH6 PULLUPS

U4F

R100

USB CORE

R101

0.1u

0.1u

+1.05VS

Z1705

R385
C464

0R

Could be generated
internal by strap
for LAN logic

4.7u/10V/X5R/0805

C509

+1.5V
0.1u

A1
H6
H7
J6
J7

C472
*0.1u

0.1u

Modify 53 in R:B

C416
0.1u

+3.3V

ICH6-6-21_0
C707
0.1u

C708
0.1u

C709
0.1u

C710
0.1u

C711
0.1u

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]

U4E

A4
A23
B1
B8
B11
B14
B17
B20
B26
B28
C2
C6
C27
D10
D13
D18
D21
D24
E1
E2
E4
E8
E15
F3
F4
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G18
G21
G24
G25
G26
H3
H4
H5
H24
H27
H28
J1
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M17
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P3
P4
P12
P13
P14
P15
P16
P17
P24
P27

VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]

P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27

Add C700~C711 for S/B bypass C

ICH6-6-21_0
Name of Part
Project

SB(3)_Power

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

17 / 50

UNIWILL COMPUTER CORP.


1

Modify 4 in R:A1
R533

0R/0805

1394_AVCC3
+1394_CORE

+2.0V
R534

L33
1394_AVCC3

+3.3V

*0R/0805

QT1608RL060

+1.8V

1394_AVCC3

C307

1u

0.1u

C300

C302

0.1u

0.1u

0.1u

+1394_CORE

+3.3V
C308

C290

C305

C299

0.1u

0.1u

Modify 73 in R:B1

Close to Pin 107,108,109,110

+3.3V
R251

PCI_AD20 R242
R239

16
16
16
16
16
16
16
16
16,17,21,24
16
16
16
16,17,21

PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_PAR
PCI_REQ#1
PCI_GNT#1
PCI_RST#
INT_PIRQC#
PCI_PME#
PM_CLKRUN#
INT_SERIRQ

PCI_IDSEL
PCI_CLK_1394_A_R

R255
R245
R247
R254

9
45
42
39
40
41
43
44
17
18
5
Z1801 14
0R
7
0R 1394_CLKRUN# 10
6
*10K
104
*0R

C295

77

XI
XO

82
83

Z1803
Z1804

BIAS
TPA+
TPATPB+
TPB-

76
75
74
72
71

1394A_TPBIAS0
1394A_TPA0+
1394A_TPA01394A_TPB0+
1394A_TPB0-

SC_VCC
SC_3V#
SC_5V#
SC_RST
SC_CLK
SC_IO
SC_CD#

11
2
3
15
12
13
4

Z1805

MC_3V#
SD/MS_CLK
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
SM_WPI#/SD_WP
SD_CD#

8
111
109
110
105
106
108
115
112

MC_3V#

MS_D1/XD_D7
XD_D6
XD_D5
XD_D4
MS_BS/XD_D3
MS_D0/XD_D2
MS_D2/XD_D1
MS_D3/XD_D0
XD_CE#
XD_R/B#
XD_CLE
XD_ALE
XD_WE#
XD_RE#
XD_WPO#
MS_CD#
XD_CD#

93
91
88
86
87
89
92
94
117
97
116
107
103
99
96
98
95

TEST0
TEST1

84
85

NC
NC
NC
NC
NC

70
69
68
66
65

1u
C303

18p

CN23
R248

R246

56.2R_1%

56.2R_1%

L65
8
7
6
5

1394A_TPB01394A_TPB0+

GND

REF

R2O
R1O
L2O
L1O

1
2
3
4

R2I
R1I
L2I
L1I

1394A_I_TP_A0+
1394A_I_TP_A01394A_I_TP_B0+
1394A_I_TP_B0-

4
3
2
1

FRC1394_SMALL(8PIN)
C296

R244

R243

*0.1u

56.2R_1%

56.2R_1%

GND2

24.576MHz_DIP
Z1802

MEDIA_ACTV

Near IC

TPA+
TPATPB+
TPB-

GND1GND

CORE_1.8
CORE_1.8

CORE_3.3A
CORE_3.3A
CORE_3.3A
CORE_3.3A

CORE_3.3
CORE_3.3

IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
REQ#
GNT#
PCI_RST#
INTA#
PME#
CLKRUN#
SERIRQ

33
102
113
114
127
128

16 INT_PIRQD#

100R
0R

C/BE3#
C/BE2#
C/BE1#
C/BE0#

18p

Y3

1394_CON_BOT
C

Z1808

SD/MS_CLK
SD_DATA3
SD_DATA2
SD_DATA1
SD_DATA0
SD_CMD
SD_WP
SD_IN#
MS_DATA1

MS_BS
MS_DATA0
MS_DATA2
MS_DATA3

MC_3V#
SD/MS_CLK
SD_DATA3
SD_DATA2
SD_DATA1
SD_DATA0
SD_CMD
SD_WP
SD_IN#

26
26
26
26
26
26
26
26
26

MS_DATA1

26

MS_BS
MS_DATA0
MS_DATA2
MS_DATA3

26
26
26
26

MS_IN#

MS_IN#

R240

Modify 74 in R:B1

C291
820p

5.11K_1%

Check pin define with ME&1394


SPEC(OK)9/25

26

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

7 PCI_CLK_1394_A

28
38
46
55

C301

1
118
119
120
121
122
123
124
125
126

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

AGND
AGND

16 PCI_C/BE#[3:0]

79
81

LAN IDSEL=AD24 Device=8,


1394 IDSEL=AD20 Device=5

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

GND
GND
GND
GND
GND
GND

19
20
21
22
23
24
25
27
29
30
31
32
34
35
36
37
47
48
49
50
51
52
53
54
57
58
59
60
61
62
63
64

PCI_VCC
PCI_VCC

16 PCI_AD[31:0]
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

5.9K_1%

U7
OZ128T

16
90

67
73
78
80

0.1u

100
101

C294

0.1u

26
56

C289

PME#, CLKRUN, IRQSER# AND INTA#


MUST BE PULLED-UP ON THE MLB.

Modifi 54 in R:B

Modify 73 in R:B1

Name of Part
Project

IEEE1394A

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

18 / 50

UNIWILL COMPUTER CORP.


1

+3.3VS
L36

QT1608RL600

Modify 6 in R:A1

+3.3VS_LAN_A
C315

C324

0.1u

0.1u

+3.3VS_LAN_A

+3.3VS
+1.8VS

* C16 and C17 are for U2 RTL8111B


AVDDH pins-- 2 and 59.

C338

C326

C334

C310

0.1u

0.1u

0.1u

0.1u

* C9 to C12 are for U2 RTL8111B VDD33


pins--16, 37, 46 and 53.
CTRL18 12mil

R520

+3.3VS

* C20 to C23 are for U2 RTL8111B


AVDDL pins--5, 8, 11 and 14.

0R/0805

Q24

B
C

*A1797
+1.8VS_LAN

C318

Modify 6 in R:A1

4.7u/10V/X5R/0805
+3.3VS

C312

C314

0.1u

0.1u

0.1u

0.1u

* C38 to C42 are for U2 RTL8111B


VDD1A pins, such as 22 and 28.

R521
0R/0805

Q30

C311

+1.5VS

CTRL15 12mil

+1.8VS_LAN
C313

*A1797
C

+1.5VS_LAN
L37

QT1608RL600

+1.8VS_LAN_A

+1.8VS_LAN_A

+1.5VS_LAN

C344
4.7u/10V/X5R/0805

C343

C325

C327

C329

C337

C336

C333

C335

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

0.1u

C321

C323

0.1u

0.1u
L38

QT1608RL600

* C26 to C35 are for U2 RTL8111B VDD1 pins-- 15, 21,


32, 33, 38, 41, 43, 49, 52 and 58.

C319

C317

1u

*1u

R262
+3.3VS

LAN_MDI0+
LAN_MDI0-

20
20

LAN_MDI1+
LAN_MDI1-

20
20

LAN_MDI2+
LAN_MDI2-

20
20

LAN_MDI3+
LAN_MDI3-

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

+1.8VS_LAN
+1.8VS_LAN
+1.8VS_LAN
+1.8VS_LAN
+1.5VS_LAN

+1.5VS_LAN

VCTRL18
AVDD33
MDIP0
MDIN0
AVDD18
MDIP1
MDIN1
AVDD18
MDIP2
MDIN2
AVDD18
MDIP3
MDIN3
AVDD18
VDD15
VDD33

EESK
EEDI
VDD33
EEDO
EECS
VDD15
NC
VDD1
NC
NC
VDD15
VDD33
ISOLATEB
NC
NC
VDD15

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

EESK
EEDI
EEDO
EECS
+1.5VS_LAN

Modify 7 in R:A1

Add 9 GND Via under IC Body

+3.3VS

+1.5VS_LAN
+1.5VS_LAN
ISOLATEB

+3.3VS

R539

*0R

R269

1K

R268

15K

PM_SLP_S3# 16,17,21,24
+3.3V
B

+1.5VS_LAN

R529

PLT_RST#

C632

0R

+1.5VS_LAN

16,17,24 PCIE_WAKE#
9,16,17,20,21,24,36

+1.8VS_LAN_A

+1.5VS_LAN
+1.8VS_LAN_A

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

+3.3VS

GND
RSET
NC
VCTRL15
NC
GVDD
LANWAKEB
CKTAL2
PERSTB
CKTAL1
VDD15
AVDD33
EVDD18
VDD15
HSIP
LED0
HSIN
RTL8111B/8100E/8101E LED1
EGND
LED2
REFCLK_P
LED3
REFCLK_N
VDD33
EVDD18
VDD15
HSOP
NC
HSON
NC
EGND
VDD15
VDD15

CTRL18
+3.3VS_LAN_A
20
20

65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

Modify 5 in R:A1.
Add 9 GND Via under IC Body
U8

+1.5VS_LAN

Z1901
CTRL15
GVDD
LAN_XO
LAN_XI
+3.3VS_LAN_A
+1.5VS_LAN

2.49K_1%

GLAN_RST#

*0.1u
C330 0.33u/X7R

16 PCIE_TXP4
16 PCIE_TXN4
7 CLK_PCIE_GLAN
7 CLK_PCIE_GLAN#

PCIE_RXN4_C
PCIE_RXP4_C

PCIE_RXN4 16
PCIE_RXP4 16
C328

0.33u/X7R

Modify in R:B
LAN_XI
R256

*1M

R271
R270

*10K
4.7K

+3.3VS
U9

C304
22p

25MHz_DIP

+3.3VS

LAN_XO

Y4
C306

EECS
EESK
EEDI
EEDO

1
2
3
4

22p

CS
SK
DI
DO

VCC
NC
NC
GND

8
7
6
5

C353
0.1u

93C46
Name of Part

+/- 30 ppm

Project

GIGA_LAN

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

19 / 50

UNIWILL COMPUTER CORP.


1

LAN Transformer & Choke & RJ45 CONN

U18
Z2002
19
19

LAN_MDI0+
LAN_MDI0-

19
19

LAN_MDI1+
LAN_MDI1-

19
19

LAN_MDI2+
LAN_MDI2-

19
19

LAN_MDI3+
LAN_MDI3-

Z2003
Z2004
Z2005

1
2
3
4
5
6
7
8
9
10
11
12

TCD_0
TRD+_0
TRD-_0
TCD_1
TRD+_1
TRD-_1
TCD_2
TRD+_2
TRD-_2
TCD_3
TRD+_3
TRD-_3

CMT_0
TXD+_0
TXD-_0
CMT_1
TXD+_1
TXD-_1
CMT_2
TXD+_2
TXD-_2
CMT_3
TXD+_3
TXD-_3

24
23
22
21
20
19
18
17
16
15
14
13

CT0

L55
TRL_0+
TRL_0TRL_1+
TRL_1-

CT1

8
7
6
5

CT2
TRL_2+
TRL_2TRL_3+
TRL_3-

CT3

8
7
6
5

R2O
R1O
L2O
L1O

R2I
R1I
L2I
L1I

1
2
3
4

TRL0+
TRL0TRL1+
TRL1-

CN16
1
2
3
4
5
6
7
8

FRC1394_SMALL(8PIN)
L56
TRL2+
R2O R2I 1
TRL2R1O R1I 2
TRL3+
L2O L2I 3
TRL3L1O L1I 4

TX+
TXRX+
RJ-4
RJ-5
RXRJ-7
RJ-8

GND

GND2

GND

GND1

RJ45_CON_BOT

FRC1394_SMALL(8PIN)
Lan_Transformer
C603

C602

C604

C605

0.1u

0.1u

0.1u

0.1u

Z2001 R115
R116
R117
R118

Modify 205 in R:D

75R
75R
75R
75R

C113
150P_3KV_1808

SATA HDD CONN

ODD CONN

+5V
+5V_CDROM

80 mil
L43

0R/0805

L66
+3.3V

+3.3V_SATA

C361

C2

QT2012RL030HC_3A
C599

C598

C601

0.1u

4.7u/10V/X5R/0805 *10U_16V_1206

*4.7u/10V/X5R/08050.1u
+5V_CDROM

Modify 76

+5V_CDROM

in R:B1

CN8
L64
+5V

25 CD_L
25 CD_GND
9,16,17,19,21,24,36 PLT_RST#

+5V_SATA
QT2012RL030HC_3A
C596

C595

0.1u

4.7u/10V/X5R/0805 *10U_16V_1206

R47

C594

CN5

+5V_SATA

+3.3V_SATA

15 SATA_RXP0
15 SATA_RXN0
15 SATA_TXN0
15 SATA_TXP0

P15
P14
P13
P12
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
S7
S6
S5
S4
S3
S2
S1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

IDE_RST#

0R
15
15
15
15
15
15
15
15

IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0

15
15
15
15
15
15
25

IDE_PDIOW#
IDE_PDIORDY
IDE_IRQ15
IDE_PDA1
IDE_PDA0
IDE_PDCS1#
CD_LED#

IDE_M/S_SET
+3.3V
+3.3V

Close to ICH7-M

Close to ODD conn.

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

CD_R

IDE_PDDACK# 15
IDE_PDA2 15
IDE_PDCS3# 15

DVD_BD_CON
+3.3V

Modify 55 in R:B
A

IDE_PDIORDY

R35

4.7K

IDE_IRQ15
IDE_M/S_SET

R15
R48

10K
Name of Part

470R

Project

SATA_HDD_CON
PIN GND1~2=GND POWER

Modify 56 in R:B
Modify 75 in R:B1
Modify 206 in R:D

CSEL : Master = 0 / Slave = 1


4

HDD/ODD/Lan_Trans'X

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255

25

IDE_PDD8 15
IDE_PDD9 15
IDE_PDD10 15
IDE_PDD11 15
IDE_PDD12 15
IDE_PDD13 15
IDE_PDD14 15
IDE_PDD15 15
IDE_PDDREQ 15
IDE_PDIOR# 15

Rev

20 / 50

UNIWILL COMPUTER CORP.


1

TOUCHPAD CONN
+5V

+3.3VA

solving IR remote controller's


PS/2 pull high weak issue

+5V
+3.3VA
+3.3VA

+3.3VA

+5V

L39

CN4
Z2105
C621

C610
0.1u

C597
0.1u

C332
0.1u

C606
0.1u

C591

C600

4.7u/10V/X5R/0805 0.1u

C611
TP_DATA
TP_CLK

4.7u/10V/X5R/0805 0.1u

R417

6
5 10
4 9
3 8
2 7
1

QT1608RL060

KEY_0
KEY_1
KEY_2
KEY_3
KEY_4
KEY_5
KEY_6
KEY_7
KEY_8
KEY_9
KEY_10
KEY_11
KEY_12
KEY_13
KEY_14
KEY_15

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

25
25
25
25
25
25
32

30
33
31
33,35
33,35
34
30
29

SCROLL
CAPS
NUM

SCROLL
CAPS
NUM
CHG_R_LED#
CHG_G_LED#
PWRON_LED
+1.8_VGA_ON
+1.8VS_ON
+1.8V_ON
+1.05VS_ON
+3.3VS_ON
+5V_ON
SET_V
+1.5VS_ON
VCORE_ON

+1.8V_ON
+3.3VS_ON
+5V_ON

GPCF6/PS2CLK3
GPCF7/PS2DAT3

148
149
152
155
156
168
174

GPI0
GPI1
GPI2
GPI3
GPI4
GPI5
GPI6

48
54
55
69
70
75
76
105

GPH0
GPH1
GPH2
GPIO
GPH3
GPH4
GPH5
GPH6
GPH7 GPO

Modify 9 in R:A1.

3
4
27
28

24
BT_ON#
32 +VGA_CORE_ON
25 AMP_MUTE#
9,14
EXTTS#0
30
24
16,17
34
34

C4_OUT
CPPE#
PM_RSMRST#
BAT_SMBCLK
BAT_SMBDAT

R265

0RZ2102

24,25 RFLED_ON
32KI
Z2103
R481
*20M

R478
0R

GPB7

95

161
VBAT

AVCC

ROMD0
ROMD1
ROMD2
ROMD3
ROMD4
ROMD5
ROMD6
ROMD7

FCS
FRD
FWR

173
150
151

ROMCS#
ROMRD#
ROMWR#

DA0
DA1
DA2
DA3

99
100
101
102

+3.3V

R491
4.7K

+3.3V

R267

R266

4.7K

4.7K

+3.3V

R272
4.7K

R276
4.7K

Q28
2N7002

SMBCLK_EC

BAT_SMBCLK

VGA_SMBCLK 40

SMBDAT_EC

BAT_SMBDAT

S
2N7002
Q29

VGA_SMBDAT 40

Keyboard CONN

Z2107
Z2108

ADC4/GPE0
ADC5/GPE1
ADC6/GPE2
ADC7/GPE3

87
88
89
90

Z2109 R257
Z2110 R161

PWRSW/GPE4
WUI5/GPE5
LPCPD/WUI6/GPE6
CLKRUN/WUI7/GPE7

2
44
24
25

EC_PWR_ON
LID#

WUI0/GPD0
WUI1/GPD1
WUI4/GPD2

26
29
30

IOPD4
GINT/IOPD5
TACH0/GPD6
TACH1/GPD7

41
42
62
63

GPA0/PWM0
GPA1/PWM1
GPA2/PWM2
GPA3/PWM3
GPA4/PWM4
GPA5/PWM5
GPA6/PWM6
GPA7/PWM7

32
33
36
37
38
39
40
43

BTL_BEEP
EC_VID1
EC_VID2
EC_VID3
EC_VID4
EC_VID5
SMP#
PWRBTN#

47
169 SMBCLK_EC
170 SMBDAT_EC
171
172
175 C4_OUT#
176
1

PWROK
16,17
SMBCLK_EC 5,7
SMBDAT_EC 5,7
FPWRON 28
BROWSER# 25
C4_OUT# 9
CHG_ON 34
SILENT_LED 25

GPIO

GPIO

GPO

CLOCKOUT/GPC0
GPC1/SMCLK1
GPC2/SMDAT1
GPC3
GPIO
WUI2/GPC4
GPC5
WUI3/GPC6
CLKOUT/GPC7

GPIO

BRIGHTADJ 22
CHG_I
34
FAN_CTRL0 23

81
82
83
84

GPI

GPIO

FAN_CTRL0

BATT_TEMP 34
ADAPTOR_I 25
DDR2_TEMP 14
CPU_PWR 29
4.7K
0R

R465
R464
PM_SLP_S4#

EC_CPU_BSEL1

EC_PWR_ON 28
LID#
25

PM_SLP_S3#

Z2111

CN3

PM_SLP_S3# 16,17,19,24

*0R
0R

CHECK
ADAP_IN 28,35
LCDSW
22
PCI_RST# 16,17,18,24
PLT_RST# 9,16,17,19,20,24,36
PM_SLP_S4# 16,17
PM_THROTTING# 16,17
AUTO_C4# 15
EC_PREST# 24

WITH TC

NC2

NC2

NC1

NC1

25
23
23
23
23
23
23
16

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

KEYIN7
KEYIN6
KEYIN5
KEYIN4
KEYIN3
KEYIN2
KEYIN1
KEYIN0
KEY_15
KEY_14
KEY_13
KEY_12
KEY_11
KEY_10
KEY_9
KEY_8
KEY_7
KEY_6
KEY_5
KEY_4
KEY_3
KEY_2
KEY_1
KEY_0

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

+3.3V

R162
100K
EC_CPU_BSEL1

R164

5,9 CPU_BSEL1

1K

Z2116

Q19

2N3904

BSEL2

KEYBOARD_CON

BSEL1

BSEL0 MHZ

FSB533

133

FSB667

166

LPC Debug CONN


Check S/W Power-Off define

+3.3VA

(ID1)
CAPLED#

R138

R430

MODEL
223

*1K

*1K

1K

245

255

259

P71EN0

SCROLL
CAPS
NUM

CN22
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

C620
8.2p

15

LDRQ0#
+5VS

1
3
5
7
9
11

2
4
6
8
10
12

INT_SERIRQ
LPC_FRAME#

PCI_RST# 16,17,18,24
PCI_CLK_DEBUG 7

LPC_DEBUG_CON

R432

R139

R431

1K

1K

*1K

(ID0)
SCROLED#

P50EN0

XXX

XXX

Name of Part
Project

EC IT8510E / BIOS / TP CONN

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
3

ID

(ID2)
NUMLED#
R137

EC default set High

1 Z2104

Modify 78 in R:B1

32.768KHz_DIP

100K
100K
100K
100K
*4.7K
*4.7K
*4.7K

ROMCS# 23
ROMRD# 23
ROMWR# 23

8.2p

+3.3VA

R288
4.7K

Y5

C622

+3.3V
R482
R428
R466
R462
R472
R469
R463

EC SMBUS

ADC0
ADC1
ADC2
ADC3

GPIO

CK32K
CK32KE

*10p

BROWSER#
RF_SW#
SILENT#
LID#
H_A20GATE
H_RCIN#
EC_EXTSMI#

93
94

GPIO

165

C546

C609
0.1u

Modify 77 in R:B1

ADC8/ANOTE
ADC9/CATHODE

GPO

GPG4
GPG5
GPG6/LPC80HL
GPG7/LPCGPG7

IT8510E

138
139
140
141
144
145
146
147

IN

GPIO

GPB0/URXD
GPB1/UTXD
GPB2
SMCLK0/GPB3
SMDAT0/GPB4

160

FD0
FD1
FD2
FD3
FD4
FD5
FD6
FD7

Embedded
Controller

GPI

153
154
162
163
164

158

ROMA0
ROMA1
ROMA2
ROMA3
ROMA4
ROMA5
ROMA6
ROMA7
ROMA8
ROMA9
ROMA10
ROMA11
ROMA12
ROMA13
ROMA14
ROMA15
ROMA16
ROMA17
ROMA18
ROMA19

IT8510E

GPI

118
119

TP_CLK

*4.7K
100K
D

NC
NC
LPCPROG
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

24 3G_ON
3G_RESET#

124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103

OUT

PS2CLK0/GPCF0
PS2DAT0/GPCF1
PS2CLK1/GPCF2
PS2DAT1/GPCF3
PS2CLK2/GPCF4
PS2DAT2/GPCF5

*10p

11
12
20
21
85
86
91
92
97
98
106
107
108
109
8

Modify 8 in R:A1.

GPO

110
111
114
115
116
117

C552

R467

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

TP_DATA

LRST1#

71
72
73
74
77
78
79
80

FA0
FA1
BADDR1/FA2
BADDR0/FA3
FA4
SHBM/FA5
FA6
FA7
FA8
FA9
FA10
FA11
FA12
FA13
FA14
FA15
FA16
FA17
FA18
FA19

Flash Interface

KEYIN0
KEYIN1
KEYIN2
KEYIN3
KEYIN4
KEYIN5
KEYIN6
KEYIN7

RF_SW#
SILENT#
IR_PS2CLK1
IR_PS2DAT1
TP_CLK
TP_DATA

25 RF_SW#
25 SILENT#
24 NEW_CARD_PWR_ON#

34
45
123
136
157
166

GPD3/ECSCI
GPB5/GA20
GPB6/KBRST

KB Matrix Interface

PWUREQ
ECSMI

31
5
6

GND1
GND2
GND3
GND4
GND5
GND6
GND7

SERIRQ
LFRAME
LPCCLK
WRST

23
22
16 EC_EXTSMI#
15 H_A20GATE
15,17 H_RCIN#

RC_IN = KBC RESET

7
9
18
19

Power Supply

AGND

LRST1#

LAD3
LAD2
LAD1
LAD0

96

LPC_FRAME#

10
13
14
15

17
35
46
122
159
167
137

16,17,18 INT_SERIRQ
15 LPC_FRAME#
7 PCI_CLK_LPC

VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

16
VCC

LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

System & LPC Bus

15 LPC_AD[3:0]

ROMA[0..19] 23
ROMD[0..7] 23

0.1u

4.7K

T/P_CON
U19

C556

4.7K

R260

IR_PS2DAT1

Modify 57 in R:B.

R414

+3.3V

K/B CONTROLLER

Rev

21 / 50

UNIWILL COMPUTER CORP.


1

LCD POWER SW

Q6
SI2301BDS
+3.3V

L46
VCC3_LCD

+3.3V_LCD

QT2012RL030HC_3A

+3.3V_LCD
G

R19
47K

R313
1K

C377
0.01u

Z2201
D

CN11

Q5

10 NB_FPVDDEN

R154

100K

R153

*100K

Z2202

LVDSB_CLKN
LVDSB_CLKP

2N7002

LVDSA_N0
LVDSA_P0

37 ATI_FPVDDEN

C15
0.1u/10V/X7R

LVDSA_CLKN
LVDSA_CLKP

LCD CONN

LVDSB_N1
LVDSB_P1

PANNEL ID SELECT

16 PNLSW1

LCD_EDID_CLK

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

+3.3V

LVDSB_N2
LVDSB_P2
LVDSA_N1
LVDSA_P1

C16
LVDSA_N2
LVDSA_P2

0.1u

LVDSB_N0
LVDSB_P0
PNLSW2
PNLSW0

LCD_EDID_DAT

16
16

LCD_CON

PNLSW2

PNLSW1

1024X768

1400X1050

1280X800

1280X768

reserved

1680X1050

1920X1200

1440X900

+3.3V
PNLSW0
PNLSW1
PNLSW2

R18
R20
R17

4.7K
4.7K
4.7K

PNLSW0

For 945GM
10
10
10
10

NB_LB_DATA2NB_LB_DATA2+
NB_LB_CLKNB_LB_CLK+

RP27
8
7
6
5

*0Rx4_0402
LVDSB_N2
1
LVDSB_P2
2
LVDSB_CLKN
3
LVDSB_CLKP
4

10
10
10
10

NB_LB_DATA0NB_LB_DATA0+
NB_LB_DATA1NB_LB_DATA1+

RP26
8
7
6
5

*0Rx4_0402
1
2
3
4

LVDSB_N0
LVDSB_P0
LVDSB_N1
LVDSB_P1

10
10
10
10

NB_LA_DATA1NB_LA_DATA1+
NB_LA_CLKNB_LA_CLK+

RP25
8
7
6
5

*0Rx4_0402
LVDSA_N1
1
LVDSA_P1
2
LVDSA_CLKN
3
LVDSA_CLKP
4

10
10
10
10

NB_LA_DATA0NB_LA_DATA0+
NB_LA_DATA2NB_LA_DATA2+

RP24
8
7
6
5

*0Rx4_0402
1
2
3
4

LVDSA_N0
LVDSA_P0
LVDSA_N2
LVDSA_P2

37 ATI_LVDSB_N2
37 ATI_LVDSB_P2
37 ATI_LVDSB_CLKN
37 ATI_LVDSB_CLKP

RP33
1
2
3
4

0Rx4_0402
LVDSB_N2
8
LVDSB_P2
7
LVDSB_CLKN
6
LVDSB_CLKP
5

37 ATI_LVDSB_N0
37 ATI_LVDSB_P0
37 ATI_LVDSB_N1
37 ATI_LVDSB_P1

RP32
1
2
3
4

0Rx4_0402
8
7
6
5

LVDSB_N0
LVDSB_P0
LVDSB_N1
LVDSB_P1

37 ATI_LVDSA_N1
37 ATI_LVDSA_P1
37 ATI_LVDSA_CLKN
37 ATI_LVDSA_CLKP

RP31
1
2
3
4

0Rx4_0402
LVDSA_N1
8
LVDSA_P1
7
LVDSA_CLKN
6
LVDSA_CLKP
5

37 ATI_LVDSA_N0
37 ATI_LVDSA_P0
37 ATI_LVDSA_N2
37 ATI_LVDSA_P2

RP30
1
2
3
4

0Rx4_0402
8
7
6
5

LVDSA_N0
LVDSA_P0
LVDSA_N2
LVDSA_P2

For ATI

INVERTER CONN
CN12
VIN

Imax check

+VIN_LCD
BL_ON

R23

100R Z2205

R34

100R Z2204

21 BRIGHTADJ
QT2012RL030HC_3A

C19

C17

0.1u/50V/X7R/0603

L2

+VIN_LCD

+3.3V

0.01u/50V/0603
INV_CON

10 NB_LDDC_CLK
+3.3V

36 ATI_LDDC_CLK

R440

*0R

R453

0R

R441

*0R

R454

0R

R21

R22

10K

10K
LCD_EDID_CLK

R26
10K
C
D5

21 LCDSW

BL_ON

A
BAS16

10 NB_LDDC_DATA
36 ATI_LDDC_DATA

10 NB_EN_BL

R29
R33

10K

Z2209

C
D6

LCD_EDID_DAT

A
*BAS16

*0R

37 ATI_BL_EN

Q33
R314

100K

Z2206

Q32

D8
BRIGHTADJ

C22

0.1u

945PM/GM Co-Layout

2N7002
S

A2
+3.3V

2N7002
S

+3.3V
A

Name of Part

R27
A1
*BAT54C

BL_ON

C20

0.1u

C642
100K

0.1u

Project

SMART PWR& LCD/INV CONN

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006

Modify 10 in R:A1
3255
5

Rev

22 / 50

UNIWILL COMPUTER CORP.


1

SMART POWER2
U22B
LM358
5

CPU FAN CONTROL


7

6
Default = Hi
Q41
E

CN9

A1797
C

Z2305
Z2306

0~5V

+5V

C14

C18

R511

+3.3V

"H"=1.198V
"L"=0.999V

3
2
1

+3.3V
D

R700

C800

0.1u

CPU_FAN_CON
PIN NC1~2=GND POWER

4.7u/10V/X5R/0805 *0.1u

10K

+5V

R512

1K
Z2301

21

C355
0.1u

8
Z2302

Z2304

C801
0.1u

Q60

R513

R803

SMP2_EN#

*0R

2N7002
S

7,16 PM_STPCPU#

10K_1%

U22A
LM358
C360

U30
74AHC1G32

SMP#

5.11K_1%

1K

SMP2_EN#

C3
R307

PM_STPCPU#

SMP#

74AHC1G32
VCC=2~5.5V
74AHCT1G32
VCC=4.5~5.5V

Add 203 in R:D

0.1u
R308
Z2303

FAN_CTRL0

Add 79 in R:B1.

FAN_CTRL0 21

0~3.3V
R306

100K

+1.05V

100K
R311

*0R
R310

Q31
10K

2N7002
S

H_VID0

PM_VID0 29

Check Vgs

VID6

SMP2_EN_5V#
+1.05V

Check Linya Vcore voltage

solving system power off lekage


+3.3VA
current over 2mA@10.8V issue

FLASH ROM

R9

R285

ROMA[0..19]
ROMD[0..7]

ROMA0
ROMA1
ROMA2
ROMA3
ROMA5
ROMA4

R294
R282
R277
R274
R280
R284

*10K
*10K
*10K
10K
10K
*10K

*2N7002
6

H_VID6

H_VID6

WE#
RESET#

0.1u

13
14

NC
NC

15

RY/BY#

16
17
18
19
20
21
22
23
24

A18
A17
A7
A6
A5
A4
A3
A2
A1

ROMA19
ROMA18
ROMA8
ROMA7
ROMA6
ROMA5
ROMA4
ROMA3
ROMA2
A

46

DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4

45
44
43
42
41
40
39
38

VCC

37

DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0

36
35
34
33
32
31
30
29

OE#

28

VSS

27

CE#

26
25

1.5000

-0mV

1.4875

-2.5mV

1.4750

-5mV

1.4500

-50mV

1.4000

-100mV

1.3000

-200mV

10K

1.1000

-400mV

0.7000

-800mV

1.1625

PM_VID6 29

1
0

2N7002

10K

SMART POWER

ROMA0
ROMD7

+5V

+1.05V

ROMD6
ROMD5

C1

ROMD4

+3.3VA

0.1u
U1

C349

ROMD3
C346
0.1u

ROMD2

6
6
6
6
6

4.7u/10V/X5R/0805

ROMD1
ROMD0
ROMRD#

21
21
21
21
21

ROMRD# 21

ROMCS#

ROMCS# 21
+5V

ROMA1

R8
R6
R5
R4
R3

EC_VID4
EC_VID3
EC_VID2
EC_VID1
EC_VID5

10Kx4_0402

1A1
1A2
1A3
1A4
1A5

1B1
1B2
1B3
1B4
1B5

2
5
6
9
10

Z2307
Z2308
Z2309
Z2310
Z2314

14
17
18
21
22

2A1
2A2
2A3
2A4
2A5

2B1
2B2
2B3
2B4
2B5

15
16
19
20
23

R1

SMP2_EN
SMP2_EN#

1
13

1OE#
2OE#

200R
200R
200R
200R
200R

4.7K

Q1

1MBytes Flash ROM


G

2N7002

10K

PM_VID4
PM_VID3
PM_VID2
PM_VID1
PM_VID5

Name of Part
SN74CBT3384A

29
29
29
29
29

Project

SMP2_EN#

R7
RP1

3
4
7
8
11

H_VID4
H_VID3
H_VID2
H_VID1
H_VID5

A0

8
7
6
5

11
12

Z2311 R506

VSS

1
2
3
4

ROMWR#
10K Z2313

ROMA17

47

24

NC
NC

48

VCC

9
10

A16
BYTE#

GND

C625

A15
A14
A13
A12
A11
A10
A9
A8

12

21 ROMWR#
R487
+3.3VA

1
2
3
4
5
6
7
8

0
0

ROMA16
ROMA15
ROMA14
ROMA13
ROMA12
ROMA11
ROMA10
ROMA9

FUNC_CTRL

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

+_mV

Q2
SMP2_EN

VCORE

10K
U20

VID0

SMP2_EN_5V#

VID1

R2
+5V

VID2

SMP2_EN_5V#

STRAP define

VID3

21
21

*4.7K

VID4

R10

0R

Q3
ROMA4

VID5

Rev

23 / 50

UNIWILL COMPUTER CORP.


1

MINI CARD Socket

Intel PRO/Wireless 2100 LAN


Hi(3.3V)

PIN12

LED_WLAN_ACT

PIN13

HW_RadioXMIT_OFF#

+3.3V
CN24

0.1u

Del 210 in R:D

Z2401

C MINI_CLK_REQ#
*BAT54

A
D25

7 MINICARD_CLK_REQ#

+3.3VS

0R

7 CLK_PCIE_Mini card#
7 CLK_PCIE_Mini card

+1.5V

Modify 11 in R:A1.

C607

C608

4.7u/10V/X5R/0805 0.1u

C613

C614

4.7u/10V/X5R/0805

0.1u

16 PCIE_RXN2
16 PCIE_RXP2
16 PCIE_TXN2
16 PCIE_TXP2

+3.3V

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

WAKE#
BT_SM_DATA
BT_SM_CLK
CLKREQ#
GND
REFCLKREFCLK+
GND
Reserved/UIM_C8
Reserved/UIM_C4
GND
PERn0
PERp0
GND
GND
PETn0
PETp0
GND
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND1GND

R479
10K

3.3V
GND
1.5V
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
GND
W_DISABLE#
PERST#
+3.3VAUX
GND
+1.5V
SMB_CLK
SMB_DATA
GND
USB_DUSB_D+
GND
LED_WWAN#
LED_WLAN#
LED_WPAN#
+1.5V
GND
+3.3V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

Low(0V)

Disable

Radio transmitter turn off

+3.3V

+1.5V

R470
Z2402 R471

*0R
10K

Z2403
Z2404

R468

Modify 13 in R:A1.

0R

PLT_RST# 9,16,17,19,20,21,36

R538

+3.3VS
R532

+1.5V

*0R

Q40

PCI_RST# 16,17,18,21

0R

*2N7002

C637

RFLED_ON 21,25
C612

*0.1u

*0.1u

Add 12 in R:A1.
Add 14 in R:A1,
+1.5V

Del 210 in R:D

CN30

+3.3V
21

BT_ON#

MINI_CARD_CON

16
16

MINICARD_CLK_REQ#

4
1

USB_P4+
USB_P4-

Modify 100 in RC

R1I R1O
R2I R2O

3
2

FRC1394_SMALL(4 PIN)

Modify 15 in R:A1.

1
2
3
4
5
6
7
8

Z2419

L71
USB_BT+
USB_BT-

CLK_PCIE_Mini card#
CLK_PCIE_Mini card

9
10

0.1u

R480

16,17,19 PCIE_WAKE#

0.1u

C616

4.7u/10V/X5R/0805 0.1u

C617

GND4GND

C592

GND2GND

C593

Associated AP
Not Associated with an AP
Power OFF or RF_Kill active
Passing data traffic to AP
Beacon traffic to Ap
Power OFF or not activity or RF_Kill active
Radio transmitter is ON

Low(0V)
Hi(3.3V)

+3.3VS
C615

Low(0V)
Hi(3.3V)

Solid ON
1 flash/3 sec
LED OFF
Rapid Blinking
Slow Blinking
LED OFF
Enable

LED_WLAN_LINK

PIN11
+3.3V

+3.3V

C619

C635

C636

*2P

*2P

C634 C900

0.1u
0.1u

Add 82 in R:B 1

0.1u
BlueTooth_CON

Modify 16 in R:A1.

Add 101 R:C for EMI


VIN_SW

NEW CARD Socket

Add 19 in R:A1.
+1.5V

+1.5V_PCIE

+3.3V

+3.3V_PCIE
VIN_SW

PR306

PR305

R488

0R

R476

0R
+3.3VS

100K

+1.5V_PCIE

+3.3VS

R535

S
SI2304BDS

100K

C626

0.1u

0.1u

0.1u

R531

Modify 17 in R:A1.

Modify in R:D

Modify 58 in R:B.

Z2413

100K
PR304

1K

3G_ON

21

CPPE#

R475

0R Z2409

CPUSB#

R495

0R

Q52
Z2416

R602

*0R

R603

0R

PM_SLP_S3# 16,17,19,21
NEW_CARD_PWR_ON# 21

+3.3VS_PCIE

2N7002

PQ200
2N3904
Z2417
B

C623

G
S

+3.3VS_PCIE

C618

2N7002

+3.3V_PCIE

Q50

PQ201

3G_ON_HV

Z2418

10K

CN6

+3.3V
+5V
C640
C639
0.1u

16,17,19 PCIE_WAKE#
21 EC_PREST#
+3.3V_PCIE
21 CPPE#
7 CLK_PCIE_NEW_CARD
16
16

R477

0R PREST#

PCIE_RXN0
PCIE_TXP0

USB_NEW_CARDCPUSB#

Z2412

+1.5V_PCIE
+3.3VS_PCIE
+3.3V_PCIE
0R

R309

+3.3V

Q51
S

NEW_CARD_REQ# 7
CLK_PCIE_NEW_CARD# 7

PCIE_RXP0 16
PCIE_TXN0 16

R537

*100K

*100K

Q53
G Z2415

Modify 18 in R:A1.

L68

*2N7002

+3.3V
Q54

L67

QT1608RL600

QT1608RL600

replace
0R??

replace
0R??

Add 14 in R:A1,

R536

*SI2302BDS
Z2414

Modify 82 in R:B1

4.7u/10V/X5R/0805

300mA

VIN_SW

Z2411

NEWCARD_CON
PIN GND1~4=GND POWER

Modify 18 in R:A1.

C641
3G_CON
0.1u

2
4
6
8
10
12
14
16
18
20
22
24
26

3G_ON_HV

1
2
3
4
5
6
7
8
9
10

USBDCPUSB#
RESERVED
SMBCLK
+1.5V
+3.3VAUX
+3.3V
CLKREQ#
REFCLKGND
PERp0
PETn0
GND

USB_P0USB_P0+

GND
USBD+
RESERVED
RESERVED
SMBDATA
WAKE#
PERST#
+3.3V
CPPE#
REFCLK+
PERn0
GND
PETp0

CN31
16
16

1
3
5
7
9
11
13
15
17
19
21
23
25

USB_NEW_CARD+

Z2410

Modify 82 in R:B1.

*2N7002

Modify 204 in R:D

USB_NEW_CARD+
USB_NEW_CARD-

16 USB_P1+
16 USB_P1M13
M23
M14
M4
M6
M3
M18
M16
M20
M8
M5
M21
M17
M19
M15
M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1

M7
M24
M11
M2
M10
M12
M25
M1
M9
M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1
R287

0R

R290

0R

Name of Part
H11
U8-132B6-132D165

H3
U8-126D165

H6
C197B237D87

H4
C197D87

H15
H18
C315B197D107-1 C217B98D60

H19
C217B98D60

H14
C217B98D60

H17
C217B102D60

H12
C335B276D158

H16
C335B276D158

H13
C335B276D158

H9
C126D107

H10
C126D107

H5
C217B197D87

H8
H1
H7
H2
C158D158 C158D158 C158D158 C158D158

H20
C197D118B134-1

Project

MINI CARD&NEW CARD

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

24 / 50

UNIWILL COMPUTER CORP.


1

SWITCH BD CONN

AUDIO & LED BD CONN


CN19
CHG_R_LED
21 SCROLL
21
21
21
21
21,24
21
21

3LP01C

+5V
CN14

+3.3V

IDE_LED

6
21 ADAPTOR_I

R140
G

10K

4
28 SW_PWR_ON#

21 SILENT#

21 BROWSER#

21
20
20
20
15
15
15
15
15

Q17

20 CD_LED#

3LP01C
+3.3V

S/W_CON
G

R134

LID#
NUM
SILENT_LED
CAPS
RFLED_ON
PWRON_LED
AMP_MUTE#

IDE_LED

RF_SW#
CD_R
CD_GND
CD_L
ACZ_SDATAIN1
ACZ_SDATAIN0
ACZ_SDATAOUT
ACZ_RST#
ACZ_SYNC

L59
ACZ_BITCLK_C

15 ACZ_BITCLK

10K

Modify in R:B1

QT1608RL120
R800
100K

VIN_SW
15 SATA_LED#
+5VS

ON BOARD USB

Q26
+3.3VS
3LP01C
+3.3VA

Modify 83 in R:B1

+5V_AUX_P

CHG_R_LED

+3.3V
16 USB_P3+
16 USB_P3-

POLY_SW_1206
21 CHG_R_LED#
+

C273

0.1u

+3.3VA

GND2

ATCM3216-900T

C582

3LP01C

USB_5V
1
USB_P5-_C 2
USB_P5+_C 3
4

3
2

0.1u

21 CHG_G_LED#

16 ACZ_SPKR

in R:B

0.1u

Modify 84 in R:B1

0.1u

R182

10K

R181

10K

Z2501

PC_BEEP

C
BAS16

R143

C194

10K

*0.1u

Close to U13

S-Vedio CONN

MDC BD's USB Conn


Modify 83 in R:B1

CN17
Z2504

S1

+5VS

POLY_SW_1206
16
16

C580

Modify 22 in R:A1.

D15
21 BTL_BEEP

C581

CHG_G_LED

USB_MB_CON_BOT

Modify 59

AUDIO_BD_CON

Q27

GND4

R2I R2O
R1I R1O

GND3

GND1
L28
4
1

USB_P5USB_P5+

CN20

33u/6.3V_NOJB

16 USB_P2+
16 USB_P2-

16
16

PC_BEEP

C590

USB_P7USB_P7+
C548
0.1u

C551
*100p

1
2
3
4
5
6
7
8

R169
150R
36 DK_TVY_DACC_OUT
10

TV_DACC

R175

0R

R174

*0R

C211

C206

5.6p

5.6p

Modify 21 in R:A1.

TVY

SY_OUT
QT1608RL600
L16

USB_MDC_CON

36 DK_TVC_DACB_OUT

Modify 60 in R:B

10

TV_DACB

R177

0R

R176

*0R

L22

TVC

CN18
S-VEDIO_CON_BOT
S-VIDEO_CONN
QT1608RL600

SC_OUT

C208
150R

5.6p

GND1

R168
C214
5.6p

GND2

S2

VIN_SW_A

Add 200 in R:D

+5VS

Modify 83 in R:B1

+5VS

42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

CHG_G_LED

Q18

Z2503
L12

QT1608RL600

L100

*QT1608RL600
A

Modify 61 in R:B.

Name of Part
Project

Daughter BD CONN

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

25 / 50

UNIWILL COMPUTER CORP.


1

+3.3V

18

R708

MC_3V#

22K

MC_3V#_SOFT

470R

R261

C309

Q25
SI2301BDS

1u

C901
0.1u

CN25

Add 102 in RC.


18
18
18
18

SD_IN#
SD_DATA2
SD_DATA3
SD_CMD

SD_IN#
SD_DATA2
SD_DATA3
SD_CMD

CARDPWR
SD/MS_CLK R273

18 SD/MS_CLK
C

SD_DATA0
SD_DATA1
SD_WP

18 SD_DATA0
18 SD_DATA1
18 SD_WP

18
18
18
18
18
18

SD/MS_CLK R263
MS_DATA3
MS_IN#
MS_DATA2
MS_DATA0
MS_DATA1
MS_BS

MS_DATA3
MS_IN#
MS_DATA2
MS_DATA0
MS_DATA1
MS_BS

1
2
3
4
5
6
Z2601 7
QT1608RL120
8
9
10
11
12
13
Z2602 14
QT1608RL120
15
16
17
18
19
20
21
22
23

MS PWR : PIN4.
SD/MMC PWR : PIN11.

CARD_READER_CON
C316

C320

C331

0.1u

0.1u

C339
4.7u/10V/X5R/0805

MMC(Mutimedia Card) / SD(Seure Digtal Card)


MS(Memory Stick) /MS Pro

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23

C322

*10P

*10P

Add 3 in RC

For EMI issue

Modify 1 in RD

Name of Part
Project

Card Reader

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

26 / 50

UNIWILL COMPUTER CORP.


1

+5V
10 NB_CRT_VSYNC

R379

*0R

10 NB_CRT_HSYNC

R68

*0R

R65

0R

36 DK_CRT_HSYNC

Check 2n7002 Rds on

HSYNC_R

Q9 2N7002
HSYNC
D

R54

39R

R372

39R

*0R

R801

36 DK_CRT_VSYNC

R378

VSYNC_R

0R

Q38 2N7002
D

S
R802

Add 201 in R:D

VSYNC

+5V
C21
100 ohm

*0R

CN13

Imax check

GND2

*0.1u
ROUT

L4

QT1608RL100

0R

GOUT

L5

QT1608RL100

0R

BOUT

L6

QT1608RL100

L48

QT1608RL100

HSYNC_OUT

L50

QT1608RL100

HSYNC_CRT

VSYNC_OUT

L51

QT1608RL100

VSYNC_CRT

L52

QT1608RL100

R38

0R

R43
R44

10 NB_CRT_RED

R36

*0R

10 NB_CRT_GREEN

R42

*0R

10 NB_CRT_BLUE

R46

*0R

36 DK_CRT_RED
36 DK_CRT_GREEN
36 DK_CRT_BLUE

DDC_DATA

ROUT_CON
+5V_PR88
GOUT_CON

L7
*QT1608RL060

1
9
2
10
3
11
4
12
5
13
6
14
7
15
8

BOUT_CON
CRT_DOCK_DET
DCC_DATA_OUT
CRT_USB-_IO

DDC_CLK
R39
C34

C450

C445

C439

10p

10p

10p

10p

CRT_USB+_IO
DCC_CLK_OUT

R41

C27

R45

C31

C28

C29

C30

C32

C33

C36

C42

150R

10p

150R

10p

10p

10p

10p

*10p

10p

10p

*10p

GND1

C26
150R

CRT_CON_BOT

10p

Modify 207 in R:D

D7
C
+5V

*BAT54
A

+5V
R316

*300K

CRT_GND_ON

C381
D10

R370

+5V

*0.1u

+5V

CRT_USB-_IO
CRT_USB+_IO

BAT54
+3.3V

U2
*74AHC14_1G

+3.3V

*BAT54
C

D22
A

*100K

U10
*74AHC14_1G

Z2706

36 CRT1DDCDATA

36 CRT1DDCCLK

R371
2.2K

R369
2.2K

10K

D
CRT_DOCK_DET

10K

R56

0R

Z2704

Q37 2N7002
D

DDC_DATA

R58

0R

Z2705

DDC_CLK

Z2703 2

R704

R705

0R

0R

CRT_USB_ON#

*0.1u

Add 103 in R:C

Q8
2N7002

DOCK_DET is Pulled High at Docking Side


B

C380
Q36
*2N7002

Z2702

*300K

@*0R/0R

R317

R55

Z2701

*1M

R49

R368
R50

@*0R/0R

10 NB_DCC_DATA

R57

10 NB_DCC_CLK

+3.3V

Close to CRT

CRT_USB_ON#
CRT_USB_ON#

A1
A2
BE1#
BE2#
GND

B1
B2

3
6

VCC

CRT_USB+_OUT
CRT_USB-_OUT

1
4

CRT_USB+_IO

CRT_USB-_IO

R2I R2O
R1I R1O

2
3

CRT_USB+_IO
CRT_USB-_IO

*FRC1394_SMALL(4PIN)

CRT_GND_ON

+5V

2
5
1
7
4

USB_P6+
USB_P6-

Q34
*2N7002

G
S

16
16

CRT_GND_ON

Q7
*2N7002

G
S

L3

U3

C25
*SN74CBT3306PWR
*0.1u
A

CLOSE TO CON2
Keep the USB Stub to the MOSFET.Drain as Short as Possible
Pin 2.PIN 5 --> Input
Common Mode Chock For EMI
Name of Part

Pin 3.PIN 6 --> Output

Project

Card Reader

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

27

/ 50

UNIWILL COMPUTER CORP.


1

VIN

220 mils

+5V_LDO

MAX8734A_VCC

PR150
4.7R/0603

PR49
10R/0603
1
2
2

8734A_V+

2
PC53

PC51
1u/6.3V/X7R/0603

PD19
C

DL5

19

MAX8734A_DL5

OUT5

21

MAX8734A_ILIM3

PGOOD

REF

PC129
0.1u

PC130

2
PR151
15K_1%

PR165
33K_1%

LDO5

2
1
1

25

PR163
300K_1%

+5V_LDO

PR154
10K_1%

MAX8734A_REF

PR56
27K_1%
PR55
51K_1%

PC56
1u/25V/Y5V/0603

1u/10V/0603

1
PR48
10K/0603

PC49
4.7u/10V/X5R/0805

PR54
330K

100R
2

18

LDO3

23

*10K
2
10K
2

GND

+3V_LDO
PC152

PR160
1

SKIP#

PR59
*0R

PC57
1u/6.3V/X7R/0603

220K
2
2

8734A_OFF#

PR58
*0R

PR159
1

8734A_V+

12

1
2
PR156
10K_1%

8734A_ON3

PR161
1
PR200
1

PC151
47p/50V/NPO

1 Z2807
PR57
*0R

5,35 AUX_OFF#

PC149
*47p/50V/NPO

MAX8734A_REF

*2.2U/6.3V/0805

ILIM3

220U/6.3V_OSC_6*6 PC120

MAX8734A_ILIM5

11

TON

(560U/4V_OSC_8*7)

3
2
1
ILIM5

SHDN#

PC154
47p/50V/NPO

1 Z281513

PC30
*2200p/50V/X7R

OPEN-SMALL

4.7u/10V/X5R/0805

Z2806 6

10
1

PR61MAX8734A_VCC
10K
PR60
2
0R

PRO#
NC

PR152
*2M
Z2812

PR53
10K

PC55

ON3
ON5

3
1 Z2805 4

8734A_ON3

*0R
Z2811

MAX8734A_QSOP28

PC43
*2200p/50V/X7R

PD3

PQ14
SI4800BDY
4

MAX8734A_FB5

FB5

PR42

SK14A
1

OUT3

200mils
PJP2

DL3

FB3

+5VA

PL6
4.7UH_BCRH105/8A

5
6
7
8

LX3

3
2
1

LX5

MAX8734A_LX5

4.7u/25V/X5R/N1206

MAX8734A_DH5

15

2
16

+5V/5A

+5V_AUX_P

MAX8734A_VCC

DH5

TO AUDIO

Fsw=200kHz

PC33
*2200p/50V/X7R

5
6
7
8

2
22

17

20

VCC

1
Z2804

2
1

24

BST5

PR155
6.49K_1%

V+

D
G
S
1
2
3
A

MAX8734A_DL3

PC153
*47p/50V/NPO

27

MAX8734A_FB3

1
2
3

*2200p/50V/X7R PC140

1
1

220U/6.3V_OSC_6*6

0.1u

*2.2u/6.3V/0805

Z2803

PQ19
SI4800BDY

MAX8734A_LX3

4
PC54
0.1u/50V/X7R/0603

14

Z2802

BST3
PC50
0.1u/50V/X7R/0603
26 DH3

PQ17
SI4800BDY

SK14A

*0R

PR153
*2M

PD6
8
7
6
5
D

PC144

PC47

PR145

+
C

28

MAX8734A_DH3

PR52
0R

PC142

OPEN-SMALL

8
7
6
5

4.7u/25V/X5R/N1206 PC39

1
2

PU3

PJP4

PR50
0R

PQ18
SI4800BDY

PL9
4.7UH_BCRH105/8A

180 mils

BAT54
Z2808
C

Fsw=300kHz

PD7
A

BST5

+3.3V/4.5A

Rds-on,tpy = 15 ohm,max=22m ohm


9A@70 degree C

BST3

+3.3VA

BAT54
A

Z2801

0.1u/50V/X7R/0603

PC35

PC203
4.7u/25V/X5R/N1206

Modify 62 in R:B.

PR201
1

0R
2

Modify 63 in R:B.

PC61
4.7u/10V/X5R/0805

21,35 ADAP_IN

For EC Aux power Reset issue

+3.3VA
+5V_LDO
R421
47K

TO EC 21 EC_PWR_ON
Q14

R131
10K

2N7002

+5V_LDO

SW_PWR_ON#

SW_PWR_ON# 25

from SW BD

8734A_OFF#

Q12

R127
47K

2N7002

Z2813
D

J1
OPEN_S

Q13
2N7002

Name of Part

Q11
2N7002

Z2814

R125

47K

R119

*0R

PR231

PR232

+3.3VA

+5VA

0R

NC

300KHz

200KHz

+3.3VA
FPWRON 21

Project

+5V&+3V(MAX8734A)

S50IAx Main Board


Sheet

Date: Thursday, October 12, 2006

NC

0R

500KHz

400KHz
3255

Rev

28 / 50

UNIWILL COMPUTER CORP.


1

VIN

8771VCC

+5V
L45

*HCB4516K-600T60

L44

HCB4516K-600T60

PR40

275 mils
Z2919

PQ54

(RQA130N03)

RQA130N03

(RQA130N03)
3
2
1

3
2
1
Z2902 38

SHDN

0R

Z2903 40

DPRSTP

PR22

499R

Z2904 39

DPRSLPVR

CCV

PR113
2

71.5K_1%
Z2906
1

TIME

PC19
2

0.22u/25V/X7R/0603
8771REF
1
11

REF

18
41

GND
EP

0R Z2907

THRM

VRHOT

PGND1
FB

12

Z2910

21

CPU_PWR

Z2915

Z2914

2
PR117
4.87K_1%

Z2911

10

Z2917

PC11 *470p/50V/X7R

*0R/0603

PC38

1
2

NTC_10K_6-B4.25K
1 Z2916

PR44
2

0R

VCORE_VCCSENSE

PC42

D
Modify 64 in R:B.

1
PC40
0.22u/10V/X7R/0603

PR114

PC48

220u/2V_SP/9m

PC44

220u/2V_SP/9m

PC59

**2V_SP

PR127
100R

*220u/2V_SP/9m

PR143

1.8K_1%

D
PR131

PC52
4.7u/10V/X5R/0805
2
1

Z2920
1

C
A

SK34A PD18

3
2
1

PC111
*0.22u/X7R
Z2913

PR36
10R

PC109
1000p/25V/X7R
2
*20K

VCORE_SC+

GNDS

Z2912

13

PR20

PR128

100R

Z2918

PR132

0R

VCORE_VSSSENSE 6

PC101
1 CPU_PWR_A

PR126
*0R
2

1
27

CCI
PR123
8771VCC

PC36
1000p/0603/X7R

1760 mils

PR45
3.3K_1%

(RQW200N03)
PIN 9=8771LX1

*2200p/0603/X7R

0R

470p/50V/X7R
Z2905
2

5
6
7
8

5
6
7
8

5
6
7
8
3
2
1

check PU or PD?

PC41
1000p/0603/X7R

PR43

PR111

PC12
1

PQ57
RQA200N03

1000p/0603/X7R

PR23

Modify in R:D

(RQW200N03)
PIN 9=8771LX1
S

9,16 PM_DPRSLPVR

Z2901

0R

PL8
0.36uH_PCMC135T-R36MF
2
1

PQ58
RQA200N03

21 VCORE_ON
5,15 H_DPRSTP#

PIN 9=Z2919

PIN 9=8771LX1

PC34
PR112

5 H_PSI#

+CPU_CORE

(RQW200N03)

PSI

8771DL1

26

PQ56
RQA200N03

DL1

(RQA130N03)

PIN 9=Z2919

8771LX1

28

LX1

D
PQ55
RQA130N03

S
PIN 9=Z2919

D0
D1
D2
D3
D4
D5
D6

PQ53
*RQA130N03

8771DH1

29

5
6
7
8

PC121
0.22u/25V/X7R/0603

DH1

31
32
33
34
35
36
37

EMI Sol.

PM_VID0
PM_VID1
PM_VID2
PM_VID3
PM_VID4
PM_VID5
PM_VID6

PC200
4.7u/25V/X5R/N1206

2 8771BST1

3
2
1

PR135
8771BST1_R 1
0R/0603

30

PC98
0.1u

23
23
23
23
23
23
23

PC126
PC132
4.7u/25V/X5R/N1206
1u/25V/0805
X5R
PC131
0.1u/50V/X7R/0603

25
BST1

3
2
1

CLKEN

5
6
7
8

PWRGD

5
6
7
8

PHASEGD

7 MAX8771_CLKEN#

17

VDD

PU2
Z2908

16 VR_PWRGD

VCC

19

PR37
*10K

PR21
*2.2K

PC125
PC127
4.7u/25V/X5R/N1206 4.7u/25V/X5R/N1206
+
X5R
X5R
PC133
10u/25V_6.3*7
OS-CON

PC123
2200p/0603/X7R

+3.3V

PC28
4.7u/10V/X5R/0805

10R/0603

PC25
1u/6.3V/0603

POUT

1000p/25V/X7R

PR35
10R

10K
VCORE_SC-

PC13
0.1u
C

VIN

C75

PR19

CSP2
14

23

BST2
DL2
LX2
DH2
20
24
22
21

Freq=300Khz

TON

CSP1

16

8771CSP1

8771CSP1

CSN12

15

8771CSN12

8771CSN12

MAX8771_QFN40

220u/2V_SP/9m

200K_1%

C94
+

220u/2V_SP/9m

2 Z2909

PGND2

8771VCC

Vcore for 44A Merom change notes


VID TABLE

1.High side MOS change to RQA130N03*3PCS


D

Vcore

Status

1.2875

Yonah(HFM)

1.2000

Boot Vout

1.1500

Merom(HFM)

Name of Part

0.8375

Y&M(LFM)

Project

0.7625

Y&M(Deeper Sleep)

0.0000

2.Add output CAP PC42 (220uF/SPCAP/9mohm) Option

3.PR45 change to 3.3kohm


4.PR44 change to 1.8kohm
5.PC40 change to 0.22U/10V/X7R/0603
6.Add input CAP PC200 (4.7UF/1206)
7.PR117 change to 4.87kohm
1

Shut down

+CPU CORE(MAX8771)

S50IAx Main Board


Sheet

Date: Thursday, October 12, 2006


3255

Rev

29 / 50

UNIWILL COMPUTER CORP.


5

VIN

180 mils
+5VS

VIN

A
PR2

PD13
PR3
BAT54
C

22R/0603

1K/0603

Z3005

Z3007

Z3006

PC2
PC1

PC14

PD15

1u/6.3V/X7R/0603

0.01u/50V/0603

PC15
PC106
*0.1u/50V/X7R/0603

BAT54

0.6V ~ 2.1V = PWM ON


> 2.1V PWM + SKIP

15

13

BST1

Z3008

+1.8V/13A
PC9
+1.8VS

0.1u/50V/X7R/0603
813_HDR2

D
G

19

HDR2

813_HDR1

HDR1

12

LX1

11

813_LX1

14

PQ9
RQA200N03
PIN 9=813_LX1
813_LDR1
4

PQ10
SI4800BDY

OZ813
QFN24

PQ11
SI4800BDY

5
6
7
8

8
7
6
5

0.1u/50V/X7R/0603

+1.5VS

61.9K_1%

*2200p/50V/X7R

*2200p/50V/X7R

1000p/0603/X7R

PR9

813_CS2P

22

51R_1%

813_CS2N

23
24

21

CS1P

813_CS1P

CS2N

CS1N

813_CS1N

VSET2

VSET1

Z3010

PGD2

PGD1

10

CS2P

PC205

PC204

PR14

PC118

PC116

Z3012

PC102

*2200p/50V/X7R/0603

100K_1%

10u/10V/X5R/0805

PC24

PC22

PC108

*0R

10u/10V/X5R/1206

LDR1

0.82UH_PCMC063T

PR16

1u/10V/0603

LDR2

PD1

17

G
A

Z3011

*0R

1
2
3

100K_1%

PR118

SK34A

8
7
6
5
1u/6.3V/0603

813_LDR2

PL3

PR15

LX2

220u/4V_POS

100K_1%

20

PQ12
SI4800BDY

PR122

PD2

PC23

SK14A

PC112

PR102
+

5
6
7
8

813_LX2

3.3UH_BCRH104R

OPEN_4A

3
2
1

PL2

3
2
1

S
1
2
3
+1.5VS_813_VOUT2

520 mils

Change
footprint

PJP7
1

4.7u/25V/X5R/N1206

PR25
0R/0603 Z3009

PC10

+1.5V/5.5A

220 mils

PC20

*0.1u/50V/X7R/0603

VIN

GNDP

BST2

VDDP

Z3002 18
0R/0603

VDDA

PR24

PU1

16

PC18
Z3001

220U/6.3V_OSC_6*6

4.7u/25V/X5R/N1206

PD14

1u/6.3V/0603
C

BAT54

PR12
51R_1%

PC85

PR5

Z3003

813_CS1P

813_CS1N

76.8K_1%813_VREF

PR1

PC94

5.6n/X7R
PC90

PC84

PR6

PC4

22p/NPO

160K_1%

1000p

22p/NPO

*0R

1M_1%

1000p

PR7

147K_1%

PR90

C4_OUT

PC5

*0R

1000p
PR4

+1.5VS=2.75*PR6/(PR5+PR6)

PR107

PC3

PR8
1000p

+1.5VS

2.2n/16V/X7R

124K_1%

813_CS2P 813_VREF

813_CS2N

PC89

750K_1%

Disable Skip

Z3013

Z3017

1.4V

HIGH

PR92

PQ47
Z3018

C4_OUT
PR94

2N7002

*0R

813_ON2

ON/SKIP2

813_ON1

ON/SKIP1

PR97

180K

+1.8VS_ON 21

PR93

PQ1
2N7002

PC87

21

180K

21 +1.5VS_ON

PR100

150K

100K

*0.1u

150K

25

GNDA

Z3014

PR302

*0R

C4_OUT

PC91

*0.1u

PR303

Disable Skip

21

LOW
D

1.5V

PR17
813_VREF
Z3004

Modify 85 in R:B1

3
4

Modify 85 in R:B1

100K

VREF
TSET

PR95
10R_1%
PC83

Change R:C

0.1u/50V/X7R/0603

Modify 23 in R:A1

PR98

PC88

110K_1%

0.1u
2

+3.3V

+5V

+1.8VS=2.75*PR4/(PR1+PR4)

Modify 86 in R:B1

+1.8VS

PR181
1
10R_0805
2

+3.3VS
PU5

REFEN

GND

OUTPUT

PR401

PU10
CM431LBCM233

Z3019

PQ301
Z3016

REF

V_OUT

+2.5V

*SI2304BDS
G

FIFT6137B
PC74
10u/6.3V/X5R/0805

PC164

PR402
Z3020

PC180
*1u/6.3V/0603

PR183
1.8K_1%

10K
VGA_CORE_ON_HV 31,32

*4.7u/10V/X5R/0805

+2.0V/100mA

Vout

PR182

PR183

+2.0V

PC181
*4.7u/10V/Y5V/0805

1.8V

1.2K

1.9V

1K

1.9K

1.93V

1K

1.82K

2.0V

1K

1.6K

2.7K
Name of Part

PC300
0.1u/50V/X7R/0603
PC165

HIGH

PR182
1K_1%

0R/0805
1

PC169
1u/6.3V/X7R/0603

GND

PR172
3.16K_1%

5
6
7
8

PC170
1u/6.3V/X7R/0603

VCNTL
VCNTL
VCNTL
VCNTL

Z3015

VIN

LOW

1.7V

C4_OUT

1.8V

Project

PR173
10K_1%

+1.5V&+1.8V(OZ813)

S50IAx Main Board

1u/6.3V/X7R/0603

Sheet

Add 209 in R:D

Vout=Vref(1+R1/R2)

Vref=1.24V+-1%

Rmin>=Vin(max)/150mA
Rmin>=[Vin(max)-Vout]/[Iout(min)+100mA]

Date: Thursday, October 12, 2006


3255

Rev

30 / 50

UNIWILL COMPUTER CORP.


1

+5VS

VIN

+5VS
22R/0603
PD12
Z3103

PR108

PD17

Z3104 C

PC99

PC100

1u/10V/0603

BAT54

30 mils

C
BAT54

1u/6.3V/X7R/0603

5
VDDP

16
VDDA

BST

VIN

Z3106
0R/0603

PC93

PC119
0.22u/25V/X7R/0603
818_HDR

0.01u/0603

PQ15A
8

200 mils

SP8K10S_FD5

PL5

PGD

1.5UH_PCMC063T

PJP8
+1.05VS_818_VOUT

818_LX

10

5
6

LX

PR140
Z3102

180K

D
PC96

Disable Skip

0.01u

ON/SKIP

818_LDR

LDR

PR104

3
PC29

818_VREF = 2.75 V

150K

PR136
100K_1%

*0R
SP8K10S_FD5
PC124 Z3111

PR137

*2200p/50V/X7R/0603
818_VREF

14

VREF

PQ15B

CSP
CSN

11
12

818_CSP
818_CSN

VSET

13

818_VSET

PC110
0.1u/10V/X7R

818_TSET
PR125
66.5K_1%

15

TSET

PC113
PC103
0.1u/10V/X7R

0.01u

Modify 24 in R:A1

1u/10V/Y5V/0603

B
818_CSP

818_VREF PR129
24.9K_1%

+
PC201
4.7u/X7R/0805

76.8K_1%

2
OPEN_4A

PC37

PR138
51R_1%

*2200p/50V/X7R

PR101

21 +1.05VS_ON

PC135

HDR

+1.05VS

OZ818_QFN16A

+1.05V/5A

220U/6.3V_OSC_6*6

GNDP

Z3101

4.7u/25V/X5R/N1206

1K/0603

8 Z3105
PR130

2
1

PR105

GNDA
GNDA

PU7

VIN

17
1

PC32

PC115

818_CSN

2.2n/X7R

174K_1% 818_VREF

PR133

PC117
22p/NPO

PR134

PR139

PC122

*0R

1000p

107K_1%

DDR2 Termination Power

+1.2VS Power
Check Power plane
+3.3V
+3.3VS

+1.8VS

+1.8VS

PU9
PU8

Z3107
PC141
1u/6.3V/X7R/0603 PR146
10K_1%

VIN

REFEN

GND

VCNTL
VCNTL
VCNTL
VCNTL

5
6
7
8

OUTPUT

Z3109

PC136
1u/6.3V/X7R/0603

Z3108

PJP3
OPEN_S
2

PC147
1u/6.3V/X7R/0603 PR148
5.11K_1%
+0.9VS

VIN

REFEN

GND

VCNTL
VCNTL
VCNTL
VCNTL

5
6
7
8

OUTPUT

0R/0805
PQ302

Z3110

+1.2VS

S
*SI2304BDS

PC146
PC137
10u/6.3V/X5R/0805

PR403

FIFT6137B

FIFT6137B
A

PC143
1u/6.3V/X7R/0603

PC148

PR404

10K

Z3112

PC138
10u/6.3V/X5R/0805

10u/6.3V/X5R/0805

VGA_CORE_ON_HV 30,32

10u/6.3V/X5R/0805
PC301
0.1u/50V/X7R/0603

PR147
PC145
1u/6.3V/X7R/060310K_1%
PR144
PC139
1u/6.3V/X7R/060310K_1%

Modify in R:D

Modify in R:D

Name of Part

Add 210 in R:D


Project

+1.0V/+1.2V/+1.05V(OZ818)

S50IAx Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

31 / 50

UNIWILL COMPUTER CORP.


1

VIN

100 mils

+5VS

PD11
BAT54

VIN
C

PR74
D

Z3205

22R/0603
Z3204

PR171
PC71

PD9
1u/6.3V/X7R/0603

1u/10V/0603

PC65

*0.1u/50V/X7R/0603

4.7u/25V/X5R/1206

PC157
4.7u/25V/X5R/1206

4.7u/25V/X5R/1206

OZ_AGND

BAT54

Z3206

BAT54

PC66

PD10

1K/0603
PC166

PC67

PC81
0.01u/50V/0603

PC68

PC159

*0.1u/50V/X7R/0603

VIN

16

15
GNDP

BST2

VDDP

Z3202 18
1R/0603

VDDA

Z3201
PR66

OZ_AGND
PU4

13

BST1

Z3207
PR65

*4.7u/25V/X5R/N1206

Z3208
3.3R/0603

+1.0V/10A
+VGA_CORE

PC72
PC73
0.22u/25V/X7R/0603

PQ38A

HDR2

12

VGA_813_HDR1

LX1

11

VGA_813_LX1

LDR1

14

VGA_813_LDR1

400 mils

HDR1

VGA_813_HDR2

PQ40
SI4800BDY

OZ813
QFN24

19

1
2

0.22u/25V/X7R/0603

SP8K10S_FD5

0.6V ~ 2.1V = PWM ON


> 2.1V PWM + SKIP

+1.8VS_VGA

5
6
7
8

+1.8V/4A

PC70

*2200p/50V/X7R

*2200p/50V/X7R/0603

PR67

*0R

100K_1%

Z3213
PR166

PR71

VGA_813_CS2P 22

CS2P

CS1P

VGA_813_CS1P

VGA_813_CS2N 23

CS2N

CS1N

VGA_813_CS1N

VGA_813_VSET2 24

VSET2

VSET1

VGA_813_VSET1

110K_1%

PC69

3300p/50V/X7R/0603

51R_1%

PC206

PC160

OPEN_4A
+

*2200p/50V/X7R

PC64

PR64

Z3210
PC62

3
2
1

1u/6.3V/0603

52.3K_1%

PC158

PR68

LDR2

PQ39
RQA200N03

VGA_813_LDR2

*0R

220U/6.3V_OSC_6*6

1u/10V/0603

17

PR63
100K_1%

VGA_813_VOUT1

0.82UH_PCMC063T

220U/6.3V_OSC_6*6

LX2

PQ38B
SP8K10S_FD5

PR69

PC63

PJP6
PL11

PC156

20

PD8

VGA_813_LX2

PL10

SK34A

VGA_813_VOUT2

3
2
1

3.3UH_PCMC063T

5
6
7
8

OPEN
2

PJP1
1

6
5

160 mils

PC207

10u/10V/X5R/0805

10u/10V/X5R/0805

B
PR167
51R_1%

PC76
VGA_813_CS2N

PR77
VGA_813_VREF

VGA_813_CS2P
4.7n/X7R

PC162
VGA_813_CS1P
PR73

2.2n/X7R

174K_1% VGA_813_VREF
PC161

76.8K_1%

PC77

VGA_813_CS1N

PC75

22p/NPO

PR72
1000p

PR168

PC163

*0R

1000p

PC167

22p/NPO

21

*0R
PR79
147K_1%

1000p

10

PGD1

PGD2

PR80

PC78
1000p/X7R

PR81
100K_1%
1.3M_1%
OZ_AGND

PR76
750K_1%

OZ_AGND

OZ_AGND

Disable Skip
Z3214

OZ_AGND

Z3211

PC79

ON/SKIP2

ON/SKIP1

150K

PR70

Disable Skip
0R
Z3212

*0.1u

PR301
G

0R

Z3215

VGA_POW_SW 36

PR85
OZ_AGND
VGA_813_VREF 3
Z3203
4

PR86
100K

PQ41
2N7002

OZ_AGND

36 VGA_POW_SW

OZ_AGND

+VGA_CORE_ON 21

PC82

150K

25

GNDA
PQ43
2N7002

180K

PR82

*0.1u

PR300

PR78

VGA_813_ON1

21 +1.8_VGA_ON
B

VGA_813_ON2

OZ_AGND
PR75
180K

OZ_AGND

100K

OZ_AGND

VREF
TSET

PR170
24.9K_1%

Modify in R:B1

PC168
OZ_AGND
0.1u/10V/X7R

Modify in R:B1
OZ_AGND

PR169

PC80

66.5K_1%

22n/16V/X7R

OZ_AGND

+1.8VS_VGA

1.8V

+VGA_CORE=2.75*PR80/(PR73+PR80)

VIN_SW

+1.8VS_VGA=2.75*PR79/(PR79+PR77)

+1.8VS

POW_SW
PR400
10K

LOW

PR405
100K

HIGH

VGA_CORE_ON_HV
D

30,31 VGA_CORE_ON_HV

LOW

0.9V
Z3216

HIGH

PQ300
2N7002

G
S
PQ303
2N7002

Name of Part
G

+VGA_CORE_ON 21

Project

1.7V

POW_SW

1.0V

VGA_CORE(OZ813)

S50IAx Main Board


Sheet

Date: Thursday, October 12, 2006

Add 208 in R:D

3255
5

Rev

32

/ 50

UNIWILL COMPUTER CORP.


1

+5VA

8
7
6
5

AO4422a

JP1

1
2
3

PR162
10K

? mils
Z3301

PR158

10K

200 mils

1.8V_ON_HV

PR164
100K

8
7
6
5

VIN_SW

PR32
10K

D3

Z3313

PR31

5V_ON_HV

10K

PQ3
2N7002

1K

PQ4
2N3904
B Z3316
PR28

+1.8V_ON 21

+5V_ON

1K

21,35

PQ65
2N3904
B Z3303
PR157

Z3315

BAT54
PC17
0.1u/50V/X7R/0603

PR33
100K
D

PQ67
2N7002

VIN_SW

1
2
3

Z3302

PC155
0.1u/50V/X7R/0603

AO4422a

+5V
PQ7

VIN_SW

*OPEN_4A

S
D

+1.8VS_VGA

520 mils

+1.8V

PQ28

+1.8VS

+1.5V

PQ5
8
7
6
5

+3.3VA

AO4422a

180 mils

S
D
G
4

VIN_SW
Z3305

PR30

10K

8
7
6
5

AO4422a

1
2
3
S

D
G

1.8V_ON_HV
D9
C

PC21
0.1u/50V/X7R/0603

+3.3V
PQ21

1
2
3

BAT54
A

+1.5VS

220 mils

Z3321

PR47

5V_ON_HV

10K

5V_ON_HV

PC46
0.1u/50V/X7R/0603

+1.05VS

200 mils

+1.05V

PQ61
8
7
6
5

AO4422a

1
2
3

+5VA

VIN_SW

+5VS
PQ8

G
Z3309

PR149

10K

1.8V_ON_HV

200 mils

PC150
0.1u/50V/X7R/0603

8
7
6
5

AO4422a

1
2
3

PR34
10K

PR39
100K

PC27

D
G

Z3319
0R 3.3VS_ON_HV

PR38

0.1u
Z3317

PQ6
2N7002

PQ13
2N3904
Z3320
B
PR41

1K

+3.3VS_ON 21,35

0.1U
between
U25 Pin3
and Pin4
for +5VS
drop
issue

PC26
0.1u/50V/X7R/0603Add

+5VS
PQ25

+5VREF

SI2301BDS
S

D
+3.3VA

+3.3VS
PQ20

PR51
10K

Z3329

180 mils

1
2
3
S

G
G

Z3330 PR62

0R

+1.8V_ON 21

Z3325 PR46

3.3VS_ON_HV

56K

PQ27
2N7002

8
7
6
5

AO4422a

PC58
*0.1u/25V/X7R/0603

PC45
0.1u/50V/X7R/0603
Name of Part
Project

VCC SW/Discharger

S50IAx Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

33 / 50

UNIWILL COMPUTER CORP.


1

120mils
CHG_VCC

PF1
1206/3A/32V
Z3412

+DC_IN
594_VCC_5V
100K

C
E

3
2
1

A1
Z3414

5
6
7
8
PC86

10K_1%

1000p

VCHG
4.7UH_BCRH105/8A

PD5

PD4

PQ45
2N2907

PR96

PL7

DTC
Z3410
Z3411

+ PC128
100U_25V_ELE_DIP

PC105
0.1u
PR109
40mR/F/1W_2512
1
2

Z3407

21 SET_V

TL594

SK34A

PQ51
2N7002
G

"L"=16.84V

4
5
6

PQ46
2N3904

SK34A

Z3408

DTC
CT
RT

8
9
11
10

+ PC134
100U_25V_ELE_DIP

Z3415

SET_V :
"H"=12.71V

C1
E1
C2
E2

FB
2IN+
2IN-

PC31
0.1u/50V/X7R/0603
PQ16
SI4835BDY

VCC
REF
1IN+
1IN-

Z3409

7
13

PR18
300K_1%

Modify 25 in R:A1.

10K
16
Z3406 15

PC97

14
Z3401 1
Z3402 2
Z3403
10K
3

PR89
10K

PC8

Z3404
0.01u
PR106
Z3405
0.01u
PR103

PR88
4.7K

PR180
100K

PR91
4.7K

12

PU6

PR13
100K_1%

21 CHG_ON

PC92
0.1u

PC95
1u

PQ48
2N7002

GND
OUT-CTRL

PR99

DTC

4
PR29
576R_1%

PC104
470p/25V/X7R

PR121
220K_1%

20K_1%
PR120
16.2K_1%

CHG_I :

8
7
6
5

AO4422a

1
2
3
S

D
G

PR124
1K_1%

PC107
0.1u

21 CHG_I

PQ2
Z3416

A1
PR110

320mils

PR115
100K_1%

PR116
200K
Z3417

S50IA0

CHG_I

Iout

CHG_I

3.0V

3.5A

3.0V

2.071V

2.5A

1.747V

2.0A

1.33V

1.5A

1.33V

1.5A

0.867V

1.0A

0.867V

1.0A

0.362V

0.4A

0.362V

0.4A

VIN

3S2P

Iout

PQ49
2N7002

21 CHG_ON

PR119
560K

3S3P

3.5A
Fast Charge(Power Off)

VCHG

Slow Charge(Power On)

PL1
QT4532KL080HC_8A
CN7

+3.3VA

+DC_IN

VIN

CN1

PD16
C

VIN

SK34A
A

PR27
1M

VCHG

PR11
PR10

21 BAT_SMBCLK
21 BAT_SMBDAT

100R
100R

1
2
3
4
5
6
7
8
9
10
GND1
GND2

Z3418
Z3419
Z3420

D19
A
SK34A
D20
A
SK34A

L1

DC_CON

21 BATT_TEMP

PR26
*220K

D1
CHG_VCC_B

QT2012KL120HC_5A

+DC_IN

CHG_VCC

PR141

PC6

PC7

*220p

*220p

PC16
220p

330R Z3421

BATT_CON_BOT

1
2
3
4
5
6

PQ52 SI4835BDY
1
8
2
7
3
6
S
5
D
G

SK34A
PR142
D2

from 220P to 220P_OP for


use ATI VGA BD EC SMBUS
read fail issue

20K
C

*SK34A
Name of Part

Iin(Charge current) = 2A

Project

BATT IN / Charger

S50IAx Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

34 / 50

UNIWILL COMPUTER CORP.


1

+3.3VA
+5V

+1.5V

+1.05V

+2.5V

+1.8VS_VGA

+1.8V

+5V_LDO

+3.3V

R157

+5VS

R77
100R/0603
*100R/0603
Z3521

R66
R185

R71

R413

R159

R135

100R/0603

*100R/0603

100R/0603

100R/0603

*100R/0603

100R/0603

R361

100K
100R/0603

PQ60
2N7002

PQ22
2N7002

21,33 +5V_ON

PQ35
2N7002

D
PQ29
2N7002 VCC_SUS_OFF
G

VCC_OFF

VCC_OFF

PQ32
*2N7002

VCC_OFF G

PQ66
2N7002

Z3513

Z3512

PQ64
2N7002 VCC_OFF G

VCC_OFF

D
PQ37
*2N7002

Z3511

Z3510

PQ24
2N7002 VCC_OFF

G
S

VCC_OFF

Z3509

Z3508

VA_OFF

PQ26
*2N7002

Z3507

R73

Z3520

+5VA
+5V_LDO
+1.5VS

+1.05VS

+1.05VS

+VGA_CORE

+1.8VS

R166

+3.3VS

Modify in R:01.

+5V_LDO

R179

*100R/0603
Z3522

R395

R349

R171

R136

R383

R144
*100R/0603

*100R/0603

VA_OFF

*100R/0603

VCC_SUS_OFF
PQ30
*2N7002

VCC_SUS_OFF
G

PQ31
2N7002

G
S

21,33 +3.3VS_ON

PQ33
*2N7002

PQ34
2N7002

5,28 AUX_OFF#

PQ36
*2N7002
S

PQ59
*2N7002 VCC_OFF G

VCC_SUS_OFF
G

PQ62
*2N7002

VCC_SUS_OFF
G

Z3519

Z3518

PQ63
*2N7002
S

Z3516

PQ23
VCC_SUS_OFF
*2N7002
S

VCC_SUS_OFF

100K
Z3517

*100R/0603

*100R/0603
Z3515

*100R/0603
Z3514

100K
R72

VIN_SW

R530
100R/0603

Z3514

PQ100
2N7002

G
S

VCC_SUS_OFF

Modify 26 in R:A1

+3.3VA

ADAP_IN 21,28

R14

Modify by Steven
(0910)

Q21

Modify 202 in R:D

3LP01C

0R
VIN_SW

+DC_IN

VIN

Z3502

Z3501

Z3504

Q4
2N7002

100K

3LP01C VGS=+-10V

R180
100K

R12

R184

0R
R183
110K
Z3505
D

R13
100K

Z3503

R16
120R

Q20
A

0R

+3.3VS_ON 21,33

2N7002
G Z3506 R178

Del 88 in R:B1

Name of Part
Project

DC IN

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

35 / 50

UNIWILL COMPUTER CORP.


1

ATI_PEG_TXP0
ATI_PEG_TXN0
ATI_PEG_TXP1
ATI_PEG_TXN1
ATI_PEG_TXP2
ATI_PEG_TXN2
ATI_PEG_TXP3
ATI_PEG_TXN3
ATI_PEG_TXP4
ATI_PEG_TXN4
ATI_PEG_TXP5
ATI_PEG_TXN5
ATI_PEG_TXP6
ATI_PEG_TXN6
ATI_PEG_TXP7
ATI_PEG_TXN7
ATI_PEG_TXP8
ATI_PEG_TXN8
ATI_PEG_TXP9
ATI_PEG_TXN9
ATI_PEG_TXP10
ATI_PEG_TXN10
ATI_PEG_TXP11
ATI_PEG_TXN11
ATI_PEG_TXP12
ATI_PEG_TXN12
ATI_PEG_TXP13
ATI_PEG_TXN13
ATI_PEG_TXP14
ATI_PEG_TXN14
ATI_PEG_TXP15
ATI_PEG_TXN15

W21
V21
V22
U22
U23
T23
T21
R21
R22
P22
P23
N23
N21
M21
M22
L22
L23
K23
K21
J21
J22
H22
H23
G23
G21
F21
F22
E22
E23
D23
C22
B22

PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N

560R_1%Z3601 Y20
2K_1% Z3602 V19
1.47K_1%Z3603 W19

Modifi 65 in R:B

AA21
PWRGD_MASK

9,16,17,19,20,21,24 PLT_RST#
GND_A2VSSQ

715R_1%Z3605 AD17

R456

AE18
AF17
Z3612 AF18

25 DK_TVC_DACB_OUT
25 DK_TVY_DACC_OUT

R455

R457

R452

*150R

150R

150R

40 THERM_SCLK
40 THERM_SDAT

PCIE_CALRP
PCIE_CALRN
PCIE_CALI

C_R_PR
Y_G
COMP_B_PB

AE20
AF20

H2SYNC
V2SYNC

AC18
AC19

DDC3CLK
DDC3DATA

XTALIN
XTALOUT

0R
R435

Z3613 AD23
Z3606
E5
Z3607
E3
AB21

TESTEN
TEST_YCLK
TEST_MCLK
PLLTEST

Z3608 AD21

STEREOSYNC

*0R
OSCILLATOR CAN BE CONNECTED TO XTALIN OR XTALOUT

R423
1K

R202
1K

R214
1K

R450
10K

W4

VGA_POW_SW

40
D

ROM_ID4 40

VGA_POW_SW 32
OSC_SPREAD 40
R459

DVOMODE

10K

+1.8VS_VGA

R1218 as close to EXT.TMSD as possible


R458

DVOMODE=VSS 3.3V MODE


DVOMODE=VDDC to 1.8V 1.8V MODE

10K

ATI_LDDC_DATA 22
ATI_LDDC_CLK 22
MEM_ID3 40
MEM_ID2 40
MEM_ID0 40
MEM_ID1 40

Z3610

R237
C288

R234

0.1u

499R

Modify 27 in R:A1
C

499R

+3.3V

SSOUT
SSIN

AD20
AE19

TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP

AF9
AE9
AE10
AE11
AF11
AF12
AF8
AE8

DDC2CLK
DDC2DATA

AA9
AA10

R2SET

AF25

R226

VREFG

PWRGD_MASK
PWRGD

AF24

OSC_IN

AA2
AA3
AB2
AC1

SOUT
SIN
SCLK
ROM_ID1 40
ROM_ID2 40
ROM_ID3 40

ROM_ID1
ROM_ID2
ROM_ID3

PCIE_TEST

X2
*0R

DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCNTL_3

40
40
40
40
40
40
40

PCIE_REFCLKP
PCIE_REFCLKN

X1

R429

AA1
AA4
AB3
AC2
AF3
AD1
AB4
AC3
AE2
AC4
AF5
AB5
AD5
AE3
AE4
AD2
AD4
AB6
AE6
AD7
AC6
AE5
AD6
AB8

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6

R437

AF6

HPD

AF23
AE23
AE22

DK_CRT_RED
DK_CRT_GREEN
DK_CRT_BLUE

HSYNC
VSYNC

AE21
AF21

DK_CRT_HSYNC
DK_CRT_VSYNC

RSET

AD22

Z3611 R427

DDC1DATA
DDC1CLK

AC21
AB20

GPIO__AUXWIN

AB18

HPD1
R
G
B

R213

100K
DK_CRT_RED 27
DK_CRT_GREEN 27
DK_CRT_BLUE 27
DK_CRT_HSYNC 27
DK_CRT_VSYNC 27
510R

CRT1DDCDATA 27
CRT1DDCCLK 27

AB7
AA7

R451

R436

R442

150R

150R

150R

GND_AVSSN
+3.3V

4.7K

VGA_THERMDA 40
VGA_THERMDC 40

U5

TC Modify 0914

*74AHC14_1G

10K
216PQAKA11FG_2

+3.3V

Check Layout

AUXWIN
R167

DPLUS
DMINUS

Modify 66 in R:B

40

W20
Y21

DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6

OTEMP#

40

Name of Part
Project

R156
R163
R158

+PCIE_1.2V
B

AA22
Y22

7 CLK_PCIE_VGA
7 CLK_PCIE_VGA#

NC_DVOVMODE

AE7

DVO / EXT TMDS / GPIO

0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u

W6
V6
Y3
W5
Y4
V4
Y2
V5
W3
Y1
W2
V1
V3
U4
V2
U2
U1

SS

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_PWRCNTL
GPIO_MEMSSIN

Part 1 of 6

TMDS

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N

DAC1

C574
C573
C160
C161
C572
C571
C162
C163
C570
C569
C164
C165
C568
C567
C166
C167
C566
C565
C168
C169
C564
C563
C170
C171
C562
C561
C172
C173
C560
C559
C174
C175

AE26
AD26
AB26
AA26
AA25
Y25
W26
V26
V25
U25
T26
R26
R25
P25
N26
M26
M25
L25
K26
J26
J25
H25
G26
F26
F25
E25
D26
C26
C25
B25
B23
A23

THERM

All designs with M5x (M58, M56, M54, M52) must


populate the configuration pin strap on GPIO5.
That is - add a 10K resistor to 3.3V on GPIO5.
This pin strap sets the desired PCIE PLL
bandwidth for M5x parts.
The databooks and references schematics will
be updated with this change.

NB_PEG_RXP0
NB_PEG_RXN0
NB_PEG_RXP1
NB_PEG_RXN1
NB_PEG_RXP2
NB_PEG_RXN2
NB_PEG_RXP3
NB_PEG_RXN3
NB_PEG_RXP4
NB_PEG_RXN4
NB_PEG_RXP5
NB_PEG_RXN5
NB_PEG_RXP6
NB_PEG_RXN6
NB_PEG_RXP7
NB_PEG_RXN7
NB_PEG_RXP8
NB_PEG_RXN8
NB_PEG_RXP9
NB_PEG_RXN9
NB_PEG_RXP10
NB_PEG_RXN10
NB_PEG_RXP11
NB_PEG_RXN11
NB_PEG_RXP12
NB_PEG_RXN12
NB_PEG_RXP13
NB_PEG_RXN13
NB_PEG_RXP14
NB_PEG_RXN14
NB_PEG_RXP15
NB_PEG_RXN15

U15A
ATI_PEG_RXP0
ATI_PEG_RXN0
ATI_PEG_RXP1
ATI_PEG_RXN1
ATI_PEG_RXP2
ATI_PEG_RXN2
ATI_PEG_RXP3
ATI_PEG_RXN3
ATI_PEG_RXP4
ATI_PEG_RXN4
ATI_PEG_RXP5
ATI_PEG_RXN5
ATI_PEG_RXP6
ATI_PEG_RXN6
ATI_PEG_RXP7
ATI_PEG_RXN7
ATI_PEG_RXP8
ATI_PEG_RXN8
ATI_PEG_RXP9
ATI_PEG_RXN9
ATI_PEG_RXP10
ATI_PEG_RXN10
ATI_PEG_RXP11
ATI_PEG_RXN11
ATI_PEG_RXP12
ATI_PEG_RXN12
ATI_PEG_RXP13
ATI_PEG_RXN13
ATI_PEG_RXP14
ATI_PEG_RXN14
ATI_PEG_RXP15
ATI_PEG_RXN15

PCI Express

10
10
10
10

DAC2

NB_PEG_RXN[15..0]
NB_PEG_RXP[15..0]
ATI_PEG_RXN[15..0]
ATI_PEG_RXP[15..0]

CLK

VGA_ATI_M52-T(1/3)

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

36 / 50

UNIWILL COMPUTER CORP.


1

39

MDB[31:0]

MDB[31:0]

QSB[3:0]

QSB[3:0]

DQMB#[3:0]

39

DQMB#[3:0] 39

MAB[14:0]

MAB[14:0] 39

+VDD_PNLIO2.5

U15C

Z3701
QT1608RL600
C585
1u

GND_LPVSS

L63
Z3702
QT1608RL600

1u
GND_LPVSS

LPVDD

AD14

LPVSS

AA11
AB11

LVDDR_18_1
LVDDR_18_2

1u
GND_LPVSS

AA12
AA13

AB16
AB15

TXOUT_U3P
TXOUT_U3N

AC16
AC15

TXOUT_U2P
TXOUT_U2N

AA15
AA14

ATI_LVDSB_P2
ATI_LVDSB_N2

TXOUT_U1P
TXOUT_U1N

AE17
AE16

ATI_LVDSB_P1
ATI_LVDSB_N1

TXOUT_U0P
TXOUT_U0N

AE15
AE14

ATI_LVDSB_P0
ATI_LVDSB_N0

TXCLK_LP
TXCLK_LN

AC13
AC12

ATI_LVDSA_CLKP
ATI_LVDSA_CLKN

TXOUT_L3P
TXOUT_L3N

AF14
AF15

TXOUT_L2P
TXOUT_L2N

AB13
AB12

ATI_LVDSA_P2
ATI_LVDSA_N2

TXOUT_L1P
TXOUT_L1N

AE13
AE12

ATI_LVDSA_P1
ATI_LVDSA_N1

TXOUT_L0P
TXOUT_L0N

AD12
AD11

ATI_LVDSA_P0
ATI_LVDSA_N0

ATI_LVDSB_CLKP 22
ATI_LVDSB_CLKN 22

ATI_LVDSB_P2 22
ATI_LVDSB_N2 22
ATI_LVDSB_P1 22
ATI_LVDSB_N1 22
ATI_LVDSB_P0 22
ATI_LVDSB_N0 22

C588

LVDDR_25_1
LVDDR_25_2

L62
Z3703

AB14
AC11
AC14
AD13

QT1608RL600
C587

C586

1u

1u

LVSSR_1
LVSSR_2
LVSSR_3
LVSSR_4

MOBILE FUNCTION

C589

AD15

ATI_LVDSB_CLKP
ATI_LVDSB_CLKN

TXCLK_UP
TXCLK_UN

ATI_LVDSA_CLKP 22
ATI_LVDSA_CLKN 22

ATI_LVDSA_P2 22
ATI_LVDSA_N2 22
ATI_LVDSA_P1 22
ATI_LVDSA_N1 22
ATI_LVDSA_P0 22
ATI_LVDSA_N0 22

GND_LVSSR
GND_LPVSS

GND_LPVSS

DIGON
BLON

AC8
AA8

ATI_FPVDDEN 22
ATI_BL_EN 22

PD at s/w side
JP9
2

GND_LVSSR

JP14
2

GND_LPVSS
JP15
2

F16
E20
E16
E19
F19
E17
E15
F18
F14
F13
E14
E13
F10
E10
F11
E11
C20
B19
B20
C19
C16
C17
B16
B17
B12
C15
C11
B15
C14
B11
B14
C12
F5
G5
H6
H5
K6
K5
L6
L5
F2
G2
H2
G3
K2
L2
J3
K3
M5
M6
N6
N5
R6
U5
R5
T5
M2
M3
N2
N3
R2
R3
T2
T3

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

216PQAKA11FG_2
1

Part 3 of 6

INTERFACE

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31

Part 2 of 6

MEMORY

U15B

LPVDD : LVDS PLL (18mA)

L61

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14

D10
B8
E9
C8
B10
B7
C7
E7
G6
F9
E8
F8
C6
F7
H7

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14

DQMBb_0
DQMBb_1
DQMBb_2
DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
DQMBb_7

F17
F12
B18
B13
J5
J2
P5
P2

DQMB#0
DQMB#1
DQMB#2
DQMB#3

QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7

E18
E12
C18
C13
J6
H3
P6
P3

QSB0
QSB1
QSB2
QSB3

RASBb

C5

MEM_RASB#

CASBb

E6

MEM_CASB#

WEBb

C4

MEM_WEB#

CSBb_0

B5

MEM_CSB0#

CSBb_1

F6

MEM_CSB1#

B6

MEM_CKEB

CLKB0
CLKB0b

C9
B9

MEM_CLKB0
MEM_CLKB0#

CLKB1
CLKB1b

B4
A4

MEM_CLKB1
MEM_CLKB1#

MVREFD
MVREFS

C3
B3

Z3705
Z3706

CKEB

MEM_RASB# 39
MEM_CASB# 39

+1.8VS_VGA

MEM_WEB# 39
MEM_CSB0# 39

R233
100R

MEM_CKEB 39
MEM_CLKB0 39
MEM_CLKB0# 39

R223

C282

100R

1u

+1.8VS_VGA

ROMCSb

Y5

NC_MEMVMODE_0
NC_MEMVMODE_1

D3
D2

MEMTEST

E2

R236
Z3707
Z3708

MEMORY CHANNEL B

R195
R198

4.7K
4.7K

100R
+1.8VS_VGA

Z3709
R215

216PQAKA11FG_2
GND_LPVSS

243R

R194
4.7K

R231

C285

100R

1u

R207
4.7K

Modify 28 in R:A1
As close to ASIC as
possible

Modify 89 in R:B1

Name of Part
Project

VGA_ATI_M52-T(2/3)

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

37 / 50

UNIWILL COMPUTER CORP.


1

+2.5V

TMDSPLLVDD POWER
L24

HCB2012K-471T10

+VDD_DAC2.5

(200 MA 1.2V PCIE_VDD_12)


(1320 MA 1.2v
PCIE_VDDR_12)

+1.2VS

+1.8VS_VGA
U15D

(80MA 2.5V A2VDD)

C234

C233

C220

0.1u

1u

4.7u/10V/X5R/0805

HCB2012K-471T10

10u/6.3V/X5R/0805

+VDD_PNLIO2.5

C248

C262

4.7u/10V/X5R/0805

4.7u/10V/X5R/0805

0.1u

C243

C227

C261

C276

C253

C263

C244

C280

C213

22u/10V/X5R/0805

4.7u/10V/X5R/0805

L27
C226

C576

4.7u/10V/X5R/0805

C575
D

1u

1u

1u

1u

1u

1u

1u

(200MA 2.5V LVDR_25)

Modify in R:D

LVDSIOVDD POWER

At Least Should Be Placed

(1000 MA 1.8V/2.5V EXT MEM VDDQ,VDDR1)

JP11
2

1
GND_TPVSS
JP10

TPVDD : TMDS PLL (58mA)


L30

1
+VDD_PNLIO2.5

QT1608RL060

C270

C271

1u

0.1u

GND_TXVSSR

JP8
2

GND_TPVSS

1
L29
+VDD_PNLIO2.5
QT1608RL060

U15E

C257

C256

0.1u

0.1u

JP6
Part 5 of 6

Modify in R:D
GND_A2VSSQ
JP7
2

GND_AVSSN

V8
W7
W15
W17
W18
Y15
Y17

VDDR4_1
VDDR4_2
VDDR4_3
VDDR4_4

Y6
AA5
AA6
AD3

PCIE_VDDR_12_1
PCIE_VDDR_12_2
PCIE_VDDR_12_3
PCIE_VDDR_12_4
PCIE_VDDR_12_5
PCIE_VDDR_12_6
PCIE_VDDR_12_7
PCIE_VDDR_12_8
PCIE_VDDR_12_9
PCIE_VDDR_12_10
PCIE_VDDR_12_11
PCIE_VDDR_12_12
PCIE_VDDR_12_13
PCIE_VDDR_12_14

N20
P20
T20
U20
K20
J20
L19
L20
M19
N19
P19
K19
J19
R19

PCIE_PVDD_12_1
PCIE_PVDD_12_2
PCIE_PVDD_12_3
PCIE_PVDD_12_4

AA24
AB24
AB23
AC23

PCIE_VDD_12_15
PCIE_VDD_12_16
PCIE_VDD_12_17
PCIE_VDD_12_18

AE25
AC24
AC25
AD25

C259

C265

C228

C242

1u

1u

1u

1u

+3.3V

*BAT54
+VDD_PNLIO2.5

Level transiation Power

C236

C235

1u

1u

+3.3V
C272

C229

1u

1u

IO/GPIO Power

Imax check
L31

Z3808

+3.3V

C277

C274

C278 QT1608RL060

1u

1u

DVPDATA/Ext TMDS/GPIO Power

+PCIE_1.2V

C195

C221

C216

C523

C223

C225

C159

C528

1u

1u

1u

1u

1u

1u

1u
C

PVDD : PCIE PLL (92mA)


+PCIE_1.2V
C184

C224

C527

C522

1u

1u

1u

1u

C196

C189

C177

C193

1u

1u

1u

1u

+PCIE_1.2V

I/O POWER

Z3801

AD9

Z3802

AB9
AB10

GND_A2VSSN
L18
QT1608RL600

JP12
2

Modify in R:D
GND_MPVSS
L21
+VDD_PNLIO2.5

C209

C210

2.2u/X5R/0603

+VDD_PNLIO2.5

1u

GND_A2VSSQ

C217

C218

1u

1u

+VGA_CORE

B2

VDDC_24
VDDC_25

AC9
AC10
AD10

GND_TPVSS

J7

GND_TXVSSR

A2VSSN_1
A2VSSN_2

AC17
AD16

A2VSSQ

AC20

AVSSN

AD18

AVSSQ

Y18

VSS1DI

AA20

VSS2DI

AA17

PVSS

AE24

VDD1DI
VDD2DI
PVDD
MPVDD

MPVSS

GND_A2VSSN
B

GND_A2VSSQ
GND_AVSSN

GND_A2VSSN

C2
GND_PVSS

216PQAKA11FG_2
+PCIE_1.2V
VDD_PLL

W13 +PCIE_1.2V_VDDPLL

Modify in R:D

L70
L15

QT1608RL060
C630

+VDD_PNLIO2.5

1u

QT1608RL600

Modify in R:B

C201

C200

1u

1u

GND_MPVSS

+3.3V

ADD ASIC DECOUPLING FOR ALL POWER AS REQUIRED


PLACED CLOSE TO THE POWER/GND PINS
WITH AS MANY AS POSSIBLE PLACED UNDER THE ASIC

DIODE SUPPLIES POWER


TO VDDC RAIL
WHILE VDDC REGULATOR
STABALIZES DURING POWER ON

Y9
Y11

1u

AD8

D18

Modify 29

GND_PVSS

in R:A1
+VGA_CORE

Z3807

L32
QT1608RL060

Modify in R:D
VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4

L14
N16
P11
T13

*BAT54

MPVDD : Memory PLL (231mA)

C287

C283
1u

GND_MPVSS

+VGA_CORE
A

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22

2.2u/X5R/0603

L11
L12
L16
M11
M12
M13
M15
N12
N13
N14
P13
P14
P15
R12
R14
R15
R16
T11
T15
T16
W9
W11

C219

VSSRH1

A2VDD_1
A2VDD_2

AVDD

Z3806 AD24

GND_AVSSN

C245

TXVSSR_1
TXVSSR_2
TXVSSR_3

VDDRH1

Z3804 AD19

Z3805 AA19
AA18

TPVSS

TXVDDR_1
TXVDDR_2

NC_A2VDDQ

L26
QT1608RL060

TPVDD

Z3803 AB19

+VDD_PNLIO2.5
Part 6 of 6

AA16
AB17

QT1608RL600

Modify in R:B

U15F

L7

+1.8VS_VGA

VDDRH1 Memory clock Power

2.2u/X5R/0603

H20
G24
B26
C23
D22
G22
A25
W23
D25
H21
F23
L24
J24
Y24
C24
M24
H24
AA23
L21
J23
K25
B24
K22
AC22
G25
E24
M20
P21
N22
M23
P24
T22
F24
N24
R20
R23
R24
T24
D24
K24
U24
V20
U21
V23
V24
W22
Y23
N25
T25
AB25
W24
AB22
W25
AC26

GND_PVSS

C281

C252

C250

C251

C264

C249

C255

C231

C275

C279

C230

C247

C246

C237

C238

1u

1u

1u

1u

1u

1u

1u

1u

1u

1u

1u

1u

1u

1u
A

At Least Should Be Placed

Name of Part
216PQAKA11FG_2
Project

216PQAKA11FG_2

VGA_ATI_M52-T(3/3)

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006

Modify in R:A1

3255
5

for Core & I/O

JP5

CORE GND

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32
PCIE_VSS_33
PCIE_VSS_34
PCIE_VSS_35
PCIE_VSS_36
PCIE_VSS_37
PCIE_VSS_38
PCIE_VSS_39
PCIE_VSS_40
PCIE_VSS_41
PCIE_VSS_42
PCIE_VSS_43
PCIE_VSS_44
PCIE_VSS_45
PCIE_VSS_46
PCIE_VSS_47
PCIE_VSS_48
PCIE_VSS_49
PCIE_VSS_50
PCIE_VSS_51
PCIE_VSS_52
PCIE_VSS_53
PCIE_VSS_54

VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7

GND_TXVSSR

+VDD_DAC2.5

H11
H14
H19
K8
P8
T19
U8
W16

4.7u/10V/X5R/0805

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74

CENTER ARRAY

A2
A7
H10
A13
D20
B21
B1
G13
L3
G8
D14
D6
D9
D12
D18
A19
C21
E21
D4
T4
F1
F4
D16
G10
G19
D21
H4
A16
H13
H16
H17
J1
G16
A10
K4
L13
L15
M1
M7
M8
M14
M16
N11
N15
P1
P4
P7
P12
P16
R11
R13
T8
T12
T14
U3
U6
U7
W8
W10
W12
W14
Y8
Y12
Y14
AC5
AC7
AE1
AF2
D7
C10
M4
R4
F3
F15

C258
2.2u/X5R/0603

GND_A2VSSN

D16
VDD25_1
VDD25_2
VDD25_3
VDD25_4
VDD25_5
VDD25_6
VDD25_7
VDD25_8

4.7u/10V/X5R/0805

Part 4 of 6

VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_19
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_29
VDDR1_30
VDDR1_31
VDDR1_32
VDDR1_33
VDDR1_34
VDDR1_35
VDDR1_36
VDDR1_37
VDDR1_38
VDDR1_39
VDDR1_40

4.7u/10V/X5R/0805

A3
A6
A9
A12
A15
T6
D19
C1
D5
D8
D11
D13
A18
D17
A21
E1
H8
F20
E4
G9
G15
G18
H1
J8
D15
H9
H12
H15
H18
G4
L1
J4
G12
L8
L4
N8
R1
R7
R8
N4

+PCIE_1.2V

Rev

38 / 50

UNIWILL COMPUTER CORP.


1

37

QSB[3:0]

MDB[31:0]

MDB[31:0]

QSB[3:0]

DQMB#[3:0]

37

DQMB#[3:0] 37

MAB[14:0]

MAB[14:0] 37

CLOCK terminations
Modify 30 in R:A1

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB14

M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12

37 MEM_CSB0#

L8

CS#

37 MEM_RASB#

K7

RAS#

+1.8VS_VGA

37 MEM_CASB#

L7

CAS#

37 MEM_WEB#

K3

WE#

37 MEM_CLKB0

J8

37 MEM_CLKB0#

K8

CK#

K2

CKE

C267

R192

1u

499R_1%
37 MEM_CKEB

C266

R191

1u

499R_1%

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

VDD
VDD
VDD
VDD
VDD

A1
E1
J9
M9
R1

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

DDRVREFB0

J2

VREF

QSB3
QSB3#
QSB1
QSB1#

F7
E8
B7
A8

LDQS
NU/LDQS#
UDQS
NU/UDQS#

DQMB#3
DQMB#1

F3
B3
H8
H2
F8
F2
E7
D8
D2
B8
B2
A7

CK

P9
N1
J3
E3
A3

LDM
UDM
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

Change from 1:1 spacing to at least a


2.5:1 spacing between the pair

U12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

RFU
RFU
RFU
RFU

R8
R7
R3
L1

ODT

K9

MDB31
MDB30
MDB29
MDB25
MDB27
MDB26
MDB28
MDB24
MDB12
MDB11
MDB14
MDB9
MDB8
MDB13
MDB10
MDB15
+1.8VS_VGA

R128
R190
ODT

37 MEM_CSB0#

MAB12
MAB13

L2
L3

BA0
BA1

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB14

M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12

J1
J7

NC
NC

E2
A2

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

VDD
VDD
VDD
VDD
VDD

A1
E1
J9
M9
R1

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

MEM_CSB0#

L8

CS#

MEM_RASB#

K7

RAS#

MEM_CASB#

L7

CAS#

MEM_WEB#

K3

WE#

MEM_CLKB0

J8

CK

MEM_CLKB0#

K8

CK#

MEM_CKEB

K2

CKE

DDRVREFB1

J2

VREF

QSB2
QSB2#
QSB0
QSB0#

F7
E8
B7
A8

LDQS
NU/LDQS#
UDQS
NU/UDQS#

DQMB#2
DQMB#0

F3
B3

LDM
UDM

H8
H2
F8
F2
E7
D8
D2
B8
B2
A7

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

10K
*10K
+1.8VS_VGA

+1.8VS_VGA
VDDL
VSSDL

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

P9
N1
J3
E3
A3

VSS
VSS
VSS
VSS
VSS
DDR2_FBGA_16MX16

RFU
RFU
RFU
RFU

R8
R7
R3
L1

ODT

K9

VDDL
VSSDL

J1
J7

NC
NC

E2
A2

MDB21
MDB19
MDB22
MDB18
MDB16
MDB20
MDB17
MDB23
MDB0
MDB3
MDB5
MDB7
MDB4
MDB2
MDB1
MDB6

These resistors and caps must be placed to minimize any stubs. These
must also be placed after the memory
R187

56R

R186
MEM_CLKB0#

56R

MEM_CLKB0
C260
Z3901

0.01u

Close to VRAM (Disternation).

+1.8VS_VGA
C

MEM_CKEB

R106
10K

+1.8VS_VGA

C269

C134

C156

C239

C158

C268

1u

0.1u

0.1u

0.1u

0.1u

C910

C911

C912
2.2u/X5R/0603

BA0
BA1

2.2u/X5R/0603

L2
L3

2.2u/X5R/0603

U14
MAB12
MAB13

2.2u/X5R/0603

Modify 30 in R:A1

ODT

Add 211 in RD

+1.8VS_VGA
+1.8VS_VGA

VSS
VSS
VSS
VSS
VSS

C254

C135

C241

C240

C157

C136

1u

1u

0.1u

0.1u

0.1u

0.1u

DDR2_FBGA_16MX16
+1.8VS_VGA

R523

10R

R524

10R

R525

10R

QSB#_VREF
C118
1u

+1.8VS_VGA
QSB0#

R104
499R_1%

QSB1#
R527

DDRVREFB1

499R_1%

QSB2#
C119

R105

R526

QSB#_VREF

10R
QSB3#

1u

499R_1%
R528

C631

499R_1%

1u

Modify 31 in R:A1
Name of Part
Project

VGA_GDDR2

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

39 / 50

UNIWILL COMPUTER CORP.


1

FLASH ROM

36 OSC_SPREAD
36 OSC_IN
R228

R229

*80.5R

150R

R225

240R

R253

0R

R252

*240R Z4001

R227

*75R

CLK_GEN_27MHz 7
CLK_GEN_27MHz_SS 7

Z4002

Modify in R:B
+3.3V

Pin14 Refout is 1.8V level ,


M52T XTALIN is 1.2V level.
36 GPIO0

Add in R:B1

Z4003

+3.3V

Z4004

+3.3V
Y2

R230

*0R Z4005

R249

*0R

1
2
3
4

Xin
Xout
VSS
VDD
SRS
PD#
ModOut REF

8
7
6
5

Z4007

L34

36 GPIO1
36 GPIO2

U6

36 GPIO3

*QT1608RL060

36 GPIO4
C292

C293

*0.1u

*10u/6.3V/X5R/0805

36 GPIO5

*P1819B-08SR

36 GPIO6

27MHZ OR 14.318MHZ

36 ROM_ID1
*27MHz_SMT

R250

36 ROM_ID2

SS

1M

36 ROM_ID3

C298

36 ROM_ID4

C297
*39p/NPO

36 MEM_ID3

*20p/NPO

36 MEM_ID2
36 MEM_ID1
36 MEM_ID0

+3.3V
+3.3V

9/23
review

R217
*4.7K

R206
*4.7K

C286
0.1u

VGA_THERMDA

D+

THERM

D-

*0R

R205

*0R

ADATA

Z4013

R212

0R

SCLK

Z4014

R211

0R

ALERT

U16
36 VGA_THERMDA

VDD

R197

R196

10K

R193

10K

R219

*10K

R204

*10K

R210

*10K

R203

10K

R220

*10K

R218

10K

R209

10K

R208

*10K

R460

10K

R201

10K

R216

10K

R200

10K

R199

*10K

VRAM Type

MEM_ID[3,2,1,0]

DDR2 16MX16 HY5PS561621AFP-25 FBGA Hynix

[1,1,1,0]

DDR2 16MX16 84P K4N56163QG-ZC25 FBGA Samsung

[0,0,1,0]

DDR2 16MX16 84P K4N56163QF-ZC25 FGBA Samsung

[0,0,1,0]

DDR2 16MX16 HYB18T256161AFL-25 FBGA Infenion

[1,1,0,0]

THERM_SDAT 36
B

THERM_SCLK 36
VGA_SMBDAT 21

2200p
36 VGA_THERMDC

VGA_THERMDC

GND

C284
VGA_SMBCLK 21

STRAPS

PIN

DESCRIPTION OF RECOMMENDED SETTING

RECOMMENDED

ADM1032ARM

VGA_THERM# 5

Z4016

R232

R235

10K

10K

+3.3V

R224

*0R

R221

*0R

R222

0R

OTEMP#

36

STRAP_B_PRX_IDLE_MODE

PCI_TEST

PHY RECEIVER IDLE DETECTOR


- NORMAL

DO NOT INSTALL
10K RESISTOR

STRAP_B_PTX_PWRS _ENB

GPIO0

Full swing

10K RESISTOR

STRAP_B_PTX_DEEMPH_EN

GPIO1

TRANSMITTER DE-EMPHASIS ENABLE


- TX DE-EMPHASIS DISABLED FOR
MOBILE

DO NOT INSTALL
10K RESISTOR

STRAP_PCIE_MODE

GPIO(3:2)

PCI-EXPRESS 1.0A MODE

STRAP_B_PTX_IEXT

GPIO4

TRANSMITTER EXTRA CURRENT


- NORMAL MODE

STRAP_FORCE_COMPLIANCE

GPIO5

DO NOT FORCE COMPLIANCE STATE QUICKLY

STRAP_B_PPLL_BW

GPIO6

PLL BANDWIDTH
- FULL
BANDWIDTH

ROMIDCFG(3:0)

ROMID

SERIAL FLASH ROM TYPE SELECT


- SERIAL M25P10 ROM

1011

MEMORY TYPE AND SPEED SELECT


- HYNIX 128MB

1100

9/23
review

DO NOT INSTALL
10K RESISTORS
DO NOT INSTALL
10K RESISTOR

+3.3V

DO NOT INSTALL
10K RESISTORS
A

(4:1)

DO NOT INSTALL
10K RESISTORS
Name of Part
Project

MEM_TYPE

MEMID
(3:0)

VGA_SPRIC & ROM& STRAPS

S50IA Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

40 / 50

UNIWILL COMPUTER CORP.


1

Modify in R:A1 12/05

SCN10

SCN3

6
SW_ADAPTOR_I

4
SW_BOT_PWR_ON#

1K/S

SR2 SW_SW_PWR_ON#

SW_BOT_SILENT#

1K/S

SR5 SW_SILENT#

SW_BOT_BROWSER#

1K/S

SR6 SW_BROWSER#

*S40_DC_JACK

2
1
S/W_CON

wire to board
SH5
*HOLEC138D72

GND_P

SH6
*HOLEC138D72

Modify in R:C

SCN1
DC_IN_B
SF1
6125T/5A

S50_DC_JACK

SL1
QT2012KL120HC_5A_0805

DC_IN+

Z4101

SC2

SC1

SR3

SR4

1U_25V_0805

22p/S

12.1K/0603

12.1K/0603

DC_IN

Modify in R:C

GND_P

SR1
40mR/F/2W_2512A_5A

SC3

SH1
*HOLEC178B197D88

0.01u/S

SH2
*HOLEC178B197D88

SH4
*HOLEC178B197D88

SH3
*HOLEC256D162

Modify in R:01
GND_P
GND_P

GND_P

GND_P

GND_P

Rating botton Func. TEXT


GND_P

GND_P

*S40_BOW_BOT

*S40_SIL_BOT

GND_P

65 Watt 20V/3.25A , 40mV/A X1000/100 = 400 mV/A ,


400mV/A X (14/2+1) = 3.2 V/A , 3.2 V/A / 5.99 =
534.2mV/A

TOTAL POWER
Rsense=40m ohm

S40

Check ALL GND

SSW2
6

SSW4
6

SSW6

GND_P

*S40_PWR_BOT

GND_P

GND_P
SR7

SW_BOT_BROWSER#

SW_BOT_SILENT#

1M_0.1%/S

SW_BOT_PWR_ON#
GND_P

GND_P

S50

DC_IN
5

SSW1
5

SSW3
5

SSW5

GND_P
4

GND_P

DC_IN_B

SR8

100K_1%

Z4102 2

SR9

100K_1%

Z4103 3

SU1A
LM358/S

SU1B
LM358/S

Z4104

Z4105

175mV/A

SR10

1.05 V/A

S50_BOW_BOT

DC_IN_B

SR11

S50_SIL_BOT

SR12

1M_0.1%/S
14K_1%

S50_PWR_BOT

4.99K_1%

175.3 mV/A

Z4106

GND_P

SW_ADAPTOR_I

SR13

SC4

1K_1%/S

1000P_0603

SR14
GND_P

GND_P

GND_P

2K_1%/S

GND_P

GND_P

switch pin define


pin5
pin1
A

pin1

pin2

pin4

pin3

pin2
A

Name of Part
Project

pin4

pin6

pin3

Touch PAD Daughter BD

S50IA Touch PAD


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

41 / 50

UNIWILL COMPUTER CORP.


1

NEW
footprint(357-0000-1034-12P)

To TouchPAD Cable

To Motherboard Cable

TCN2
T/P_Finger_MB

T/P_Finger_TP
+5V_TP

TP_GND
7
1
2
3
4
5
6
8

TCN1

14

13
12
11
10
9
8
7
6
5
4
3
2
1
14

13

Modify in R:C
TP_GND

+5V_TP

Modify in R:C
TP_PS2_CLK
TP_PS2_DATA

Modify in R:A1 11/30

TP_GND

TP_GND

S50IA0 MB
footprint(GB1006X-X051-7F_87151)

switch pin define

Left Side BT

pin6

Right Side BT

pin4
pin4

pin3

pin2

pin1

pin3

TP_GND

TSW2

TSW1
TP_GND

TP_L_BTN

pin5

pin1

pin2

TP_R_BTN

L_BTN

R_BTN

TP_GND
TP_GND

TH1
*C218D107

TH2
*C218D107

TP_GND

Name of Part

TP_GND

Project

Touch PAD Daughter BD

S50IA Touch PAD


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

42 / 50

UNIWILL COMPUTER CORP.


1

S40 Moden RJ11 CONN


MMC4

150P_3KV_1808/M

MMDC_GND1

NEW
footprint(PJS-02FC3G000A)

MODEM_TX+

MMCN3
1
2

MMCN4
MMRV1

1
2

DSSAP3100SBRP

RJ11

NEW
footprint(307-0000-1066-02P)

MDC_MODEN_CON_2PIN

MODEM_RX+

PIN GND1=MDC_GND
PIN GND2=MDC_GND1
B

MMC5

150P_3KV_1808/M
MMDC_GND

MMH1
*HOLEC237D99

MMDC_GND

MMH2
*HOLEC178D87

MMDC_GND1

Name of Part
Project

Moden conn

S40II MDC Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

43 / 50

UNIWILL COMPUTER CORP.


1

MDC USB CONN

RE-Check ALL GND


+5VS_MDC

Modify in R:C

NEW
footprint(357-0000-1034-08P)

S50IA MB
footprint

10

10

1
2
3
4
5
6
7
8

ML2
M_USB_5V
+5VS_MDC
HCB2012K-301T07_1A_0805

ML1
M_USB_P5M_USB_P5+

M_USB_P5M_USB_P5+

4
1

R2I R2O
R1I R1O

M_USB5M_USB5+

3
2

MCN1

1
2
3
4

M_USB5M_USB5+

MC2
MC3
0.1u/M

33u/6.3V_NOJB

MDC_GND

0.1u/M

MCN2
9

MC1

ATCM3216-900T
MDC_GND

MDC_USB_CONN

MDC_GND

MDC_GND

MDC_USB_CABLE_CON
MDC_GND

MDC_GND

S50IA MB
footprint

Modifi in R:B

Modify in R:C

NEW
footprint(327-0000-1326)

MDC_GND
C

Moden RJ11 CONN


MC4

150P_3KV_1808/M

MDC_GND

NEW
footprint(PJS-02FC3G000A)

MMODEM_TX+

MCN3
1
2

MCN4
MRV1

1
2

DSSAP3100SBRP
MMODEM_RX+

RJ11

NEW
footprint(307-0000-1066-02P)

MDC_MODEN_CON_2PIN

PIN GND1=MDC_GND
PIN GND2=MDC_GND1
B

Modify in R:C

MC5

150P_3KV_1808/M
MDC_GND1

MH1

C197D83

MDC_GND

MH2

C197D83

MDC_GND1

Name of Part

Modify in R:C
Project

Moden & USB conn

S50IA MDC Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

44 / 50

UNIWILL COMPUTER CORP.


1

60 mils

POLY_SW/1206
AC1

0603-->0805 & move to near conn. in R:B


D

AL1
AU_USB_P0+
AU_USB_P0AU_USB_P1+
AU_USB_P1-

8
7
6
5

R2O
R1O
L2O
L1O

R2I
R1I
L2I
L1I

1
2
3
4

AU_USB_C_P0+
AU_USB_C_P0AU_USB_C_P1+
AU_USB_C_P1-

ACN1

Z0102
1
AU_USB_C_P0- 2
AU_USB_C_P0+ 3
4

AC3
0.1u/A

USB_CONN

GND1

FRC1394_SMALL(8PIN)
AS2

POLY_SW/1206

60 mils

0603-->0805 & move to near conn. in R:B

AC6
0.1u/A

49
49
49
49
49
48
49

AU_NUM
AU_SILENT_LED
AU_CAPS
AU_RFLED_ON
AU_PWRON_LED
AU_AMP_MUTE#
AU_IDE_LED

48
48
48
47

AU_CD_R
AU_CD_GND
AU_CD_L
AU_ACZ_SDATAIN1

47 AU_ACZ_SDATAOUT
47 AU_ACZ_RST#
47 AU_ACZ_SYNC

ACN3

Z0104
1
AU_USB_C_P1- 2
AU_USB_C_P1+ 3
4

47 AU_ACZ_BITCLK
GND2

33u/6.3V/NOJB

AC4

AU_CHG_R_LED
AU_SCROLL
AU_CHG_G_LED
AU_LID#
AU_NUM
AU_SILENT_LED
AU_CAPS
AU_RFLED_ON
AU_PWRON_LED
AU_AMP_MUTE#
AU_IDE_LED
AU_RF_SW#
AU_CD_R
AU_CD_GND
AU_CD_L
AU_ACZ_SDATAIN1
AU_ACZ_SDATAIN0
AU_ACZ_SDATAOUT
AU_ACZ_RST#
AU_ACZ_SYNC

49 AU_CHG_R_LED
49 AU_SCROLL
49 AU_CHG_G_LED

Modify in R:D
swap 1&2 7&8

+AU_5V

Modify in R:A1 12/07

ACN2

GND2

AS1

33u/6.3V/NOJB

+AU_5V

FROM MB BD CONN
GND1

TWO PORT CONN

AU_ACZ_BITCLK AL2

42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

AU_ACZ_BITCLK_C

0R/0603/A

+AU_VIN_SW
+AU_5V

USB_CONN

Del

AC7 in R:B

+AU_3.3VS
+AU_5V_AUX
+AU_3.3V
AU_USB_P0+
AU_USB_P0AU_PC_BEEP

47 AU_PC_BEEP
C

AU_USB_P1+
AU_USB_P1-

AUDIO_BD_CON

RF SW

SW Up-->pin1 & pin3 connection(RF ON).

LID SW

SW Down-->pin2 & pin3 connection(RF OFF).

ASW1
1
2

AR4
10K/A

0.1u/A

Modify in R:C

+AU_3.3V
B

RF_OFF# from low to high-->EC pin is input type.

AU_RF_SW#
AR3

RF_CONN

0R/A
Z0110

AU_LID#
3

in R:B & chage package for SMT issue


1

Modify

AC8

0.1u/A

RF_OFF# -->Default is low.


+AU_3.3V

AC9

ASW2

AC10
0.1u/A
2

MRSS22L

+AU_3.3VS

Azalia MDC

AR11
0R/0603/A

AC11
ACN4
AU_ACZ_SDATAOUTAR13

39R/A
39R/A

1
3
5
Z0106 7
9
Z0107 11
Z0105

4.7u/10V/0805/A

GND
SDO
GND
SYNC
SDI
RST#

RES1
RES2
3.3Vmain/aux
GND
GND
BCLK

13
14
15
16
17
18

AR15
AU_ACZ_SYNC
AU_ACZ_SDATAIN0
AU_ACZ_RST#
AR16

39R/A

GND1
GND2
GND3
GND4
GND5
GND6

R near connector

2
4
6
8
10
12

Z0108
Z0109 AR17

39R/A

AU_ACZ_BITCLK

Name of Part

MDC_CONN_Azalia
Project

R near connector

CODEC

S50IA AUDIO Board


for vista
Sheet

46 / 50

Date: Thursday, October 12, 2006


3255
5

UNIWILL COMPUTER CORP.


1

Rev

CODEC_GND

CODEC VDD

AUDIO CODEC

@Alc860 remove AR19 & AR20

CODEC_GND

AC12

AC313

*0.1u/A

*0.1u/A

Internal Mic

+AU_5V_AUX

18

Z0212 AC27

1u/10V/A

44

LFE

MIC2-R

17

Z0232 AC303

1u/10V/A

45

SIDERSURR-L

MIC2-L

16

Z0233 AC304

1u/10V/A

46

SIDERSURR-R

LINE2-R

15

Z0213 AC19

0.1u/A

47

SPDIFI/EAPD

LINE2-L

14

Z0214 AC20

0.1u/A

48

SPDIFO/MIDI-O

Sense A

13

CODEC_GND

CODEC_GND

CDR

48

CDGND

48

CDL

48

AR308
20K_1%
0/A

AR25
SENSE_PLUG#

INT_MIC1
CODEC_GND

5.1K_1%

SENSEA

AC30

1u/10V/A

Z0221

AR29

0R/A

10u/10V/0805/A

AR30

0R/A

AR31

22R/A

AR33

22R/A

0R/A

MIC_JD_SENSE

SENSEA

AR403

Z0222

AR27

AU_ACZ_RST# 46
AU_ACZ_SYNC

QT1608RL060/A

AU_PC_BEEP 46

Modify in R:B
of the Vista

AR500

46

AU_ACZ_SDATAIN1

46

0.1u/A

AR27 Change to 4.7K

AU_ACZ_BITCLK 46

AC34

Sense Plug

AC32

AR32

INT_MIC1 48

CODEC_GND

AR500 Change to 4.7K

AQ301
SENSE_PLUG#

INT_MIC1

PCBEEP

RESET#

10u/10V/0805/A

12

Z0220 11

SYNC

ALC861_VD/ALC883

Z0219 10

0.1u/A

25

26
AVSS1

AVDD1

27
VREF

28

CD-L

46 AU_ACZ_SDATAOUT

MIC1-VREF0-L

29
LINE1-VREF0

30
MIC2-VREFO

32

31
LINE2-VREFO

CENTER

*10K/A
48 HP_IN

AC15

10R/A Z0215

AC31
*1u/10V/A

AR309

33

43

1
AR28

MIC1-VREF0-R

1u/10V/A

CODEC_GND

+AU_3.3V

34

Z0211 AC23

AMP_GND

+5V_CODECVDD

DCVOL

19

DVDD1

AMP_GND
CODEC_GND

CD-GND

DVDD2

0
SPDIF_OUT

AVSS2

CODEC_GND

@Alc883 Change AR24 to


20K_1%

CODEC_GND
QT1608RL060/A

1u/10V/A

42

SDATA-IN

AL4

AMP_GND
AR44

*QT1608RL060/A

Z0210 AC22

Z0218 8

AL6

MIC-L

20

DVSS2

AMP_GND
CODEC_GND

21

CD-R

CODEC_GND

MIC1-L

SURR-R

BIT-CLK

JDREF/NC

41

Z0217 6

*QT1608RL060/A
AL17

40

Z0205

CODEC_GND
AL5

MIC-R

SURR-R

20K_1%/A

AR26

22

SDATA-OUT

48 SURR-R

MIC1-R

39

DVSS1

AR24

1u/10V/A

SURR-L

SURR-L

AC21
10u/10V/0805/A

1u/10V/A

Z0209 AC18

GPIO1/DMIC-L

48 SURR-L

4.7u/10V/0805/A

Z0208 AC17

23

0.1u/A

24

AVDD2

AC14

CODEC_GND

LINE1-L

VREFO-R

38

4.7K/A
AC13

LINE1-R

37
Z0204
AC26

35

FRONT-R

0R/0603/A

GPIO0/DMIC-CLK

+5V_CODECVDD
AL3
Z0202

Sense B

AU1
AR23

FRONT-L

36

+AU_3.3V

2N7002/A

FCM1608K-121T06
AC25

AR301
+5V_CODECVDD

10u/10V/0805/A

Z0207

MIC_VREFO_L

FRONT_R

Z0241

FRONT_L

+5V_CODECVDD

MIC2_VREFO

MIC_VREFO_R

DCVOL:4.4V

+AU_5V_AUX
AQ2

SI2301DS/A

Z0216 5

AR22
100K/A
Z0201

Z0206

MIC2_VREFO

AQ1

*22P/A

*2N7002/A

ERA/SPDIF JACK

External Mic

AL14

Z0227

2
1

75R/0603/A

100U_6.3V_ELE_DIP

CODEC_GND
AL10

CHANGE FOOT PRINT

QT1608RL060

AL301

MIC-R

MIC_JD_SENSE

0.1u/A
AC35

AC500

2
1
6
10

6
10

SPDIF_GND

4.7u/10V/0805/A

QT1608RL600/A

Z0235

AL11

QT1608RL600/A

5
4
3
6
2
1

0.1u/A
AC41
AC45

AR39

AR40

4.7K/A

4.7K/A

470p/A

470p/A
AL9
*QT1608RL600/A

AL204

AC50

*220p/A

*1000p

QT1608RL600/A

Modify in R:B to solve


the Mic noise

0R/A

Z0231

MIC_VREFO_L

AL19
QT1608RL600/A

Wait for EMI test


AL9

MIC_VREFO_R
AL21

AR401

QT1608RL600/A

AL16

QT1608RL600/A

AR203
AC49

MIC_JACK

Z0240
AC44

AL18
SPDIF_OUT
QT1608RL600/A

ACN9

Z0230

*470p

Z0229

AC48

*470p

AC47

Z0228

AR42
*22K/A

AL8

QT1608RL600/A
MIC_JD_IN
Z0239
Z0236
Z0237
Z0238

AC501
MIC-L

SPDIF_JACK
AR41
*22K/A

Z0234
4.7u/10V/0805/A

VCC

AC312

4
Z0226

Z0224

FRONT_L

Z0225
QT1608RL060/A

75R/0603/A

AL12

SENSE_PLUG#
100U_6.3V_ELE_DIP
AC307
Z0223
FRONT_R

MIC JACK

*QT1608RL060

ACN8

GND

AL7

GND2
GND1

AL500

in R:B

IN

Change Footprint

AL20
QT1608RL060/A

+AU_5V

*0/A

AC51
SPDIF_GND

*1000p
AR402

Name of Part

+5V_CODECVDD
0/A

CODEC

Project

Rev

S50IA AUDIO Board


for vista
Sheet

47 / 50

Date: Thursday, October 12, 2006


3255
5

UNIWILL COMPUTER CORP.


1

AMP_TPA6011A4

Close the AMP

+5V_AMP

AL202
*HCB2012KF-601T20_0805
AL201
HCB2012KF-601T20_0805

Z0301

150K/A

HCB2012KF-601T20_0805

AMP_GND

+5V_AMP

Modify
+

AC201
33u/6.3V/NOJB

AC101
100U/4V_POSCAP
AR52

47 SURR-R

+AU_VIN_SW

AR49

15K/A Z0303

AC60 4.7u/6.3V/0603/A
Z0306
AC61

0.047u

Z0307

AC62

0.047u

Z0308

AMP_GND
AR53

47 SURR-L

AC59

15K/A Z0304

Z0309
AC63 4.7u/6.3V/0603/A

46 AU_AMP_MUTE#

AU3

5
4
6

RLINEIN
RHPIN
RIN

8
10
9

LIN
LHPIN
LLINEIN

15
16
22

SHUTDOWN#
FADE#
HP/LINE#

AMP_GND
ROUT+
ROUTLOUTLOUT+

24
2
12
14

ACN5
SPKR1+
SPKR1SPKL1SPKL1+

AL23
AL24
AL25
AL26

OUT_SPKR1+
OUT_SPKR1OUT_SPKL1OUT_SPKL1+

QT1608RL060/A
QT1608RL060/A
QT1608RL060/A
QT1608RL060/A

1
2
3
4

1
2
3 NC
4 NC

NC1
NC2

INT_SPK_CON
AR310

1
13
18

1u/A

8.2K_1%/A Z0305

in R:A1

4.7u/10V/0805/A

Z0318

AL203
Z0302

VDD
VDD
VDD

0.1u/A

AO4422/A AU2
1
2
3
S
D
G

BYPASS

AC53

AC58

0.1u/A

SE/BTL#

23

HP_IN_1

HP_IN

47

*0/A
TPA6011A4

Z0310 17

AR48

AC57

3
7
11

4.7u/10V/0805/A

AR47
4.7K/A

21
19
20

AC52

in R:B

VOLUME
SEMAX
SEDIFF

8
7
6
5

+AU_5V_AUX

Modify

GND
GND
AGND

AR46
4.7K/A

Modify in R:A1
0402-->0805

AMP VDD

AR311
10K/A

AC68

Verify the Codec


can auto Detec
the Spk or Hp !

1u/10V/A

AMP Power
AMP_GND

AMP_GND

INT_MIC_1

ACN6
INT_MIC1

47 INT_MIC1

AR54

Z0311
Z0312

150R/A

1
2
INT_MIC_CON

AL302

AC71

AC72

330R/A

0.1u/A

0.1u/A

Modify in R:B
For Mic NOISE

InternalMic Array & Digital Mic


B

AH1
C237B197D87TB-UW

AH2
C237D83TB-UW

AH3
C237B197D87TB-UW

AH4
C197D60-UW

AH5
U197B197D63-UW

CD

46

AU_CD_R

AU_CD_R

AR56

Z0315

30.1K_1%

AU_CD_GND

47
AH6
HOLEC213D197

AR58

AH7
HOLEC127D111

22P/A
36K_1%

AU_CD_GND

CDR

AC69

Modify in R:B
For CD NOISE
46

AR57 0R/0603/A
CDR

AR59

30.1K 1%

Z0316

AR60 0R/0603/A
CDGND

Z0317

AR65 0R/0603/A
CDL

CDGND

47

CDL

47

AR61
AC70

AR62

22P/A

*100R/A

100R/A
AR63
36K_1%
46

AU_CD_L

AU_CD_L

AR64

30.1K_1%

CODEC_GND

Name of Part

AMP

Project

Rev

S50IA AUDIO Board


for vista
Sheet

48 / 50

Date: Thursday, October 12, 2006


3255
5

UNIWILL COMPUTER CORP.


1

Rating LED indicate


Func. silkscreen
LED
D

+AU_3.3V

AR6

*220R AU_PWR_LED_ON

AR204

220R

ALED1
A

KPT-1608
C

AU_PWRLED_ON#

AQ6

+AU_3.3VS

2N7002
G

AU_IDE_LED

46 AU_IDE_LED

ALED5
A

220R AU_IDE_C_LED

AR7

KPT-1608
C

46

AU_PWRON_LED

AR5

220R AU_RF_LED_ON

ALED2
A

KPT-1608
C

AU_RFLED_ON#

AQ5

+AU_3.3VS

+AU_3.3V

ALED6
A

220R AU_NUM_LED_ON

AR9

KPT-1608
C

AU_NUMLED_ON#
C

2N7002

AQ8

D
G

2N7002

46

AU_RFLED_ON

46

AU_NUM

AR10

220R AU_SILENT_LED_ON

ALED3
A

KPT-1608
C

AU_SILENTLED_ON#
AQ9

+AU_3.3VS

2N7002

+AU_3.3V

AR8

220R AU_CAPS_LED_ON

ALED7
A

KPT-1608
C

AU_CAPSLED_ON#
D

AU_SILENT_LED 46

AQ7

2N7002
G

46

AU_CAPS

+AU_3.3V

GREEN

46 AU_CHG_R_LED

AU_CHG_G_LED
AU_CHG_R_LED

AR14

130R AU_CHG_G_C_LED

AR18

130R AU_CHG_R_C_LED

ALED8
A

KPT-1608
C

AU_SCROLLLED_ON#

D-LED KPTB-1612ESGC

AQ10

2N7002
G

AU_SCROLL 46

46 AU_CHG_G_LED

220R AU_SCROLL_LED_ON

ALED4

AR12

RED
A

Name of Part

LED

Project

Rev

S50IA AUDIO BoardSheet


for vista

49 / 50

Date: Thursday, October 12, 2006


3255
5

UNIWILL COMPUTER CORP.


1

Chnage Note: R:A1 to R:B

Chnage Note: R:A to R:A1


Layout:
Layout:

1. page7 :Add R522 100ohm for CPU frequence Setting


2. page15:Change C438,C434 18P to 12P for RTC.
3. page16:Change Giga Lan PCI-E port in S/B, from port 4 to prot1.
4. page18:Add R533,R534 for OZ128TN core voltage 1.95V.
5. page19:Add 9 GND via under U8 body-pad for body GND.
6. page19:Add R520,R521 for U8 +1.5VS & +1.8VS.
7. page19:Reserve R539 for S3 wake-up on LAN.
8. page21:Add 3G_ON in EC for 3G module.
9. page21:Add BT_ON in EC for Bluetooth module.
10.page22: Add C642 for Invert can't tuon on.
11.page24:Excahnge CLK_PCIE_Mini_Card(#).
12.page24:Reserve PCI_RST# for Mini Card.
13.page24:Add R538 for RFLED_ON.
14.page24:Add Cn30,L71,C731 for Bluetooth Module.
15.page24:Add C635,C636 in CLK_PIE_Mini_Card(#) for EMI.
16.page24:Add R479,C619 for disable MiniCard_CLK_REQ#
17.page24:Change R531 power plane from +3.3VS_PCIE to +3.3VS.
18.page24:Del R302,R303.
19.page24:Add R535~R537,Q50~Q54 for New Card S3 issue.
20.page24:Add C639~C641,CN31 for 3G module.
21.page25:Exchange CN18 pin3,pin4 for pindefine error.
22.page25:Chamge CN19 from 40pin to 42pin.
23.page30:Change PU5 +3.3v to +5V for LDO Drop.
24.page31:Add PJP8 for +1.05VS.
25.page34:Add PR180 for CHG_ON floatong.
26.page35:Add R530,PQ100 for VIN_SW power off discharge.
27.page36:Exchange ATI_LDDC_DATA & CLK.
28.page37:Add JP14,JP15 for GND_LPVSS.
29.page38:Add L70,C630 for VDD_PLL.
30.page39:Change VRAM address pindefine.
31.page39:Add R523~R528,C631 for VRAM Vref.

BOM:

51.page 7:Add R600,R601 for PCI/CPU STOP# Pull high.


52.page14:Change C12,C13,C376 0402 to 0603.
53.page17:Add C700~C711 for S/B power Bypass C.
54.page18:Change U7 pin 65,66,68~70 from NC to GND.
55.page20:Reserve +3.3V on ODD con pin49.
56.page20:Modify HDD con package for SMT.
57:page21:Del R259 for NEW_CARD_PWR_ON#.
58.page24:Add R602,R603 for New Card S3 issue.
59.page25:Del R188,R189 for SMT.
60.page25:Modify CN17 package.
61.page25:Add L100 for S-Vedio quality.
62.page28:Add PR200,PC203 for EC Aux power reset issue.
63.page28:Add PR201 for 3/5V skip mode.
64.page29:Del PC60.
65.page36:Del R170.
66.page36:Change R427.
67.page38:Change L15,L18,L21 for TV quality.
68.page40:Del U17.

BOM:
1. page7 :Add R522 10K.
2. page14:Change C438,C434 18P to 12P for RTC.
3. page18:Add R534 0 ohm 0805.
4. page19:Add R520,R521 0_0805 for U8 +1.5VS & +1.8VS.
5. page22:Add C642 0.1U for Invert can't turn on.
6. page24:Add R538 0 ohm,Del C612,Q40.
7. page24:Add R479 10K,C619 0.1U for disable MINICARD_LK_REQ#
8. page24:DelR302,R303 0 ohm_0603 for CLK_PCIE_NEW_CARD(#).
9. page24:Add R535 100K,Q50 SI2302, Q51 2N7002 for New Card S3 issue.
10.page34:Add PR180 100K for CHG_ON floating.
11.page35:Add R530 100R_0603,PQ100 2N7002 for VIN_SW discharge.
12.page38:Add L70,C630 1U for VDD_PLL.
13.page39:Add R523~R526 10 ohm,R527~R528 499_1%,C631 1U for VRAM
Vref.

1. page 7:Add R601 10K/0603 for PCI STOP# pull-high.


2. page14:Change C12,C13,C376 0.1U_0402 to 0.1U_0603
3. page16:Change C56,C56,C60,C64,C71,C77 0.1u to 0.33u for WLan.
4. page17:Add C700~C711 0.1u for S/B bypass C.
5. page19:Change C328,C330 0.1u to 0.33u for Giga Lan.
6. page24:Add R603 0 ohm for New Card S3 issue.
7. page28:Add PR200 10K,PC203 4.7U_25V_0805 for AUX reset issue.
8. page28:Add PR201 0 ohm for 3/5V skip mode.
9. page36:Change R427 from 499 to 510 for EMI.
10.page38:Change L15,L18,L21 from QT1608RL060 to QT1608RL600 for TV quality.
11.page40:Del U17.

Chnage Note: R:B to R:B1


Layout:

Chnage Note: R:D to R:01

BOM:
71.page14:Add C803~C806 for N/B +1.8VS
72.page15:Change CN21 RTC Con package.
73.page18:Change U18 AGND to GND.
74.page18:Del R241,R258 for EMI.
75.page20:Modify HDD con package for SMT.
76.page20:Del C363.
77.page21:Modify T/P con package for SMT.
78.page21:Modify K/B con package for SMT.
79.page23:Add C800,801,Q60,R700,U30 for SmartPower.
80.page24:Add R701,R702 for BlueTooth SMB pull-up.
81.page24:AddR304~R306 PQ200,PQ201 for 3G power on.
82.page24:Modify CN6 pakage.
83.page25:Change all USB power from +5V to +5VS for S3 wake-up.
84.page25:Modify CN19 package.
85.page30:Add PR302,PR303 for Auto C4 adjust voltage.
86.page30:Change PU10 pindefined.
87.page32:Add PR300,PR301 for VGA power-play.
88.page35:Del D4,D21,R11.
89.page37:Change R215.

1. page14:Add C803~C806 0.1U


2. page14:Change C12,C13,C376 0.1U_0402 to 0.1U_0603
3. page18:Del L25.
4. page18:Del R241,R258 0 ohm.
5. page23:Add C800~C801 0.1U,Q60 2N7002,R700 10K,U30 74AHC1G32.
6. page24:Add R304 1K,R305 100K,R306 10K,PQ200 2N3904,PQ201 2N7002 for 3G power on.
7. page30:Add PR302~PR303 100K for Auto C4.
8. page32:Add PR300~PR301 0 ohm for VGA power-play.
9. page37:Change R215 from 47 to 243 for ATI recommend.
10.page40:Add R193 10K for VGA Lanes switch issue.
11.page16:Del R264,add R392 0 ohm for S3 resume issue.

BOM:
1.page35:Add R361 100,PQ60 2N7002 for power-off discahrge.

Chnage Note: R:B1 to R:C


Layout:

BOM:
1.page24:Add C900 0.1U for EMI.
2.page26:Add R708 470,C901 0.1U for power soft start.
3.page26:Add C322,C339 10P for EMI.
4.page27:Add R704~R705 0 ohm for Projector ghost issue.
5.page:Change PR181 from 10_0402 to 10_0805 for voltage
drop.

100.page24:Add R706,R707 for cost down.


101.page24:Add C900 for EMI.
102.page26:Add R708,C901 for CardReader power Soft start.
103.page27:Add R704,R705 for Projector ghost issue.
104.page30:Change PR181 package from 0402 to 0805 for
voltage drop.

Chnage Note: R:C to R:D


Layout:

BOM:

200.page25:Add R800 for D14 burned-out issue.


201.page27:Add R801,R802 for CDT signal.
202.page35:Del D14 for SMT.
203.page23:Add R803 for Smart Power.
204.page24:Del L41 for SMT.
205.page20:Modify CN16 package for SMT.
206.page20:Modify CN5 package for SMT.
207.page27:Modify CN6 package for SMT.
208.page32:Add PR400,PR405,PQ300,PQ303 for S3 power
209.page30:Add PR401,PR402,PC300,PQ301 for S3 power
210.page31:Add PR403,PR404,PC301,PQ302 for S3 power
211.page39:Add C268, C910~C912 for VRAM 1.8V bypass
212.page09:Add R804 for C4E function.
213.page09:Add R805~808 for N/B reserved function.

1. page25:Add R800 100K for D14 burned-out issue.


2. page26:Del C322,C339 10P for CardReader can't be detected issue.
3. page24:Change Q50 from SI2302 to SI2304 for Vgs issue.
4. page30:Change PR6 160K_1% for 1.5V level.
5. page30:Change PR92,PR97 180K for disable skip mode.
6. page31:Change PR101 180K for disable skip mode.
7. page32:Change PR75,PR78 180K for disable mode.
8. page30:Add PR402 10K,PC300 0.1U_0603,PQ301 SI2304 for S3 sequence.
9. page31:Add PR404 10K PC301 0.1U_0603,PQ302 SI2304 for S3 sequence.
10.page32:Add PR400 10K,PR405 100K,PQ300,PQ303 2N7002 for S3 sequence.
11.page05:Del R102 150 ohm for STPCLK#.
12.page16:Change R336 from 499 to 0 ohm for C4E.
13.page29:Change PR22 from 0 to 499 ohm for C4E.
14.page38:Change C209,C245,C258,C287 from 1u_0402 to 2.2U_0603_X5R for VGA PLL.
15.page07:Change C350,C351 to 0603 size,Add C357.
16.page14:Change C12,C13,C376 to 2.2U,C370,C383 to 22U for 3D restart issue.
17.page31:Add PC138,PC148 10U for 3D Blue Screen issue.
18.page38:Change C576 to 22U,C575 to 10U for 3D Blue Screen issue.
19.page15:Change R373 to 20K for RTC_RST# rise time.

sequence.
sequence.
sequence.
C.

Name of Part
Project

CHANGE NOTE

S50IAx Main Board


Sheet

Date: Thursday, October 12, 2006


3255
5

Rev

50 / 50

UNIWILL COMPUTER CORP.


1

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