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Code No: A7004 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD M.Tech I - Semester Supplementary Examinations September, 2010 VLSI ARCHITECTURE AND DESIGN METHODOLOGIES (ELECTRONICS AND COMMUNICATIONS) Time: 3hours Max. Marks: 60 Answer any five questions All questions carry equal marks --1. a. Explain the difference between custom and Semi-custom ASICS, standard CellBased ASICs with different blocks. Also show the Routing for cell based IC. b. Explain the Bit Slice approach. 2. a. Explain the different Advanced Microprocessors. What are the resources of these Processors? b. Explain the different blocks in Advanced Microprocessors. 3. a. Explain the different Inter connection methods for Multiprocessor Arrays. b. Explain the Architectural Design Multiprocessors. 4. a. Explain the Timing and clocking in Asynchronous versus Synchronous schemes. b. Explain Single and two phase clocking schemes. 5. a. Explain any FPGA Architecture. b. What are the specifications of FPGA and its essential characteristics? 6. a. Explain the difference between CPLD and FPGA. b. Explain the important features of CPLD. c. Explain a standard CPLD Die. 7. Explain the low Power estimation techniques for a CMOS circuits. 8. Write short notes on any two of the following a. VLSI Design approach for DSP application. b. VLSI Design approach for Real-Time computing technique. c. PLA Design.

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