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1

. .


-
, ,

2008

: .
, - . , . .. ;
,
- . ..

..
: . :
, 2008. 240 .

51. Atmel MCS-51.


,
AVR
Atmel Tiny Mega. AVR Studio, CVAVR VMLAB PROTEUS VSM
AVR .
.

.., 2008
, 2008

1. 51
.. 4
1.
.. 6
2.
51 ................................................................................. 11
3. 51
( 1) ... 16
4. 51
( 2) ... 37
5. ....................................... 51
6. .. 62
7. 51.... 76
8. 51.
81
9.
8- .. 88
10. 89 Atmel 97
11.
..... 102
.... 103


to control . , .
, , :
;
;
;
;
;

.

, , .

,

.

, , :
()
. , ..;
( ) , , , ,
/, , .

() :
;

( ), MCS-51 (Intel) AT89 (Atmel) 51 (
181651 183051), AVR (Atmel), PIC
(MicroChip), HC08 (Motorola);
MCS-96 (Intel) .
, ;
(i80186 i386EX).
:
ISC-
(Complicated Instruction Set Computer);
RISC- (Reduced Instruction Set Computer),
.
8- ISC- MCS-51,
Intel,
, ,
. Philips, Atmel, Siemens, Intel, Dallas . ,
RISC- AVR Atmel.
MCS-51
. .
AVR .

1

. , .

.
( 1) ,
. .
( 2) ,
. , , , .
( 3)
. ( , , ..).
,
.

, , .. .
, :
, , , , ;
, -

1 0
;

Y
X
, Z
- I

;

,
. 1.1 -
.

(. 1.1) ()
().
I, , Z.

Y
.
- .
() () ,

. .
, . ,
(). / .

. , ,
.
(, ..),
. .
, , , .
,
/ (. 1.2). , , , . , , , .
() . ()
()
(), .

. 1.2

() - (),
,
, . ()
().
(), (), (), () .
:
1) ();
2)
() ;
3)
, ;
4) ;
5) , .
. .
,
.

(), ,
/, .
:
1)
. .
.
,
. ,

10


;
2)

, ;
3) ()
. .
.

MCS-51.
MCS-51
.
. MCS-51 . c
,
( ). - ( Intel,
Dallas, Atmel, Philips ..)
.
MCS-51
: , , /, , ,
. 8- .
(
). 1816 1830, 51.

11

2
51
51 ,
(. 2.1). 1816 n-M , 1830
.
2.1

181651
181631
183051
183031

Intel
8051
8031
8051
8031

128
128
128
128

fmax,

12
12
12
12

I,

150
150
18
18


( ) :
8- (
, , );
8- / (0-3);
16- /;
;
;
;
.

64 , 64 .
( . 2.1 3).
BQ1 BQ2
, RST .
VPP ( ) .

12

0 (07), 2 (8-15). 3 .
BQ1
BQ2
RST
VPP
P0
P1
P2

SMC ALE
PME
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7



RxD
TxD
INT0 0
INT1 1
0 / 0
1 / 1
WR
RD

. 2.1

(PDIP, SOIC,
QFP), 40 . 51 +5.
. 2.1
. /
51 -
.
.
, 51
. :
, , , , , .
, . .
,

13

, .
F. 12/F 12
. -
,
- 0-3.
8-
.
.
(PCON) . ,
.
PCON.
n- ( 1816) PCON
,
SMOD, .
- (ALU)
, .
: TMP1 TMP2,
, , ( ), (ACC), (PSW).
,
.
.

14


- ,
.
, , , , .
B ,
.

.
, , - .

() - . : , , , , ,
, , , .
(Program Counter)
16- 8/16- .
16- ,
( 1).

, .
P0, P1, P2, P3
-
, 32
-.

15

(PSW)
.

().
, FLASH .
(DPTR) 16- .
(SP)
, (), .
.
. , ,
, , ,
16- ,
.

.
, , , .
1, 2 3
-. 0
.
, , , / 51
.

16

3
51 ( 1)
. ,

MCS-51.
51
C
(. 3.1). () , RS1 RS0
PSW, 128 ( 20H-2FH) 30H-7FH, .
,
. ,
, . SP
, . . ,
, . ( * , , 8).

16- - DPTR. ,
, -
. ,
DPTR ( ) .

17


7F

@Ri
30
2F
128

20
1F
18
17
10
0F
08
07
00

3
2
1
0



F0*
E0*
D0*
B8*
B0*
A8*
A0*
99
98*
90*
8D
8C
8B
8A
89
88*
87
83
82
81
80*

B
ACC
PSW
IP
P3 3
IE
P2 2
SBUF
SCON
P1 1
TH1 /1 ( )
TH0 /0 ( )
TL1 /1 ( )
TL0 /0 ( )
TMOD
TCON
PCON
DPH ( )
DPL ( )
SP
P0 0

FFFF

FFFF
MOVC
@A+DPTR
@A+PC

0023
001B
0013
000B
0003
0000

TI+RI
TF1
INT1
TF0
INT0
RESET

MOVX
@DPTR

FF

MOVX
@Ri

0000

. 3.1 MCS-51

18


,
()
PSW (. 3.2).

C AC F0 RS1 RS0 OV - P
0
0
1
1

0
1
0
1

0
1
POH2
POH3

PSW
(00-07)
(08-0FH)
(10H-17H)
(18H-1FH)

. 3.2. M51

PSW : , , OV
. OV , /

. OV , .
OV , 255.
0, .
, . .
16- (MOVX A,@DPTR) 8- (MOVX A,@Ri). 16 ( )
- P2.

.
, , , .

19


255 : ,
, ,
, .
-, - . 111 64 (1 12 ),
45 . .
51:

1)

2)

#d

ADDC A,#d

3)

ad

ANL A,ad

4)

bit

CLR bit

5)

rel

SJMP $+2+rel

6)

1098

A7 ... A0

7)

ad

#d

ORL ad,#d

8)

ad

rel

DJNZ ad, $+3+rel

SWAP A

AJMP ad11

9)

ads

add

MOV add,ads

10)

#d

rel

CJNE R0,#d, $+3+rel

11)

bit

rel

JB bit, $+3+rel

12)

ad16h

ad16l

LCALL ad16

13)

#d16h

#d16l

MOV DPTR,#d16


. .

20

ADD A, - [3].
() -, . 7 3 , .
,
255. OV ,
6 7,
7 6, OV . OV
,
.
.
-:
1) (
R0-R7);
ADD A,R6

; (A)=C3H, (R6)=AAH
; (A)=6DH, (R6)=AAH
; AC=0, C=1, OV=1

2) - (@ , - R0 R1);
ADD A,@R1

; (A)=95H, (R1)=31H, ((R1))=4CH


; (A)=E1H, ((R1))=4CH
; AC=1, C=0, OV=0

3) ( );
ADD A,90H

; (A)=77H, (90H)=FFH
; (A)=76H, (90H)=FFH
; AC=1, C=1, OV=0

21

4) (# ).
; (A)=09H
ADD A,#0D3H ; (A)=DCH
; C=0, OV=0, AC=0

LCALL ad16.
, . 3
16- (
, ), SP 2.
LCALL.
,
. 64 .
.

:
:
:

LCALL
<>
2
(PC):= (PC)+3
(SP):= (SP)+1
((SP)):= (PC[7-0])
(SP):= (SP)+1
((SP)):= (PC[15-8])
(PC):= <ad[15-0]>
:
; (SP) = 64H
; SUBBR 1234
; 0126 LCALL
LCALL SUBBR ; (SP):= 66H,
(PC)= 1234
; ([65H])=29H,
([66H])=01H

22

RET.
,
2.
, CALL
LCALL. .
:
:
:

RET
2
(PC[15-8]) := ((SP))
(SP):= (SP)-1
(PC[7-0]) := ((SP))
(SP):= (SP)-1
; (SP) = 66H, ([65H])=29H, ([66H])=01H
RET ; (SP) = 64H, (PC)= 0129

RETI.

,
2. ,
, .
PSW .
, ,
. RETI
, .
13
51 (
1, 2 3).

23

##########################################################################
# Micro Series 8051 Assembler V1.80/MD2
25/Apr/06 08:47:51 #
#
#
# Source = test.asm
#
# List
= test.lst
#
# Object
= test.r03
#
# Options =
#
#
(c) Copyright IAR Systems 1985
#
##########################################################################
1
2
; 13 MCS-51
3
4
;
5
6 0044
DATA
EQU
44H
; 8-
7 0077
SMALL
EQU
77H
;
8 00E0
BIT
EQU
ACC.0
;
9 FFFB
REL1
EQU
-5
;
10 0005
REL2
EQU
5
;
11 05FA
MIDL
EQU
5FAH
; 11-
12 0033
PRI
EQU
33H
;
13 0022
IST
EQU
22H
;
14 ABCD
BIG
EQU
0ABCDH
; 16-
15
16
;
17
18 0000 C4
SWAP
A
; 1
19 0001 3444
ADDC
A,#DATA
; 2
20 0003 5577
ANL
A,SMALL
; 3
21 0005 C2E0
CLR
BIT
; 4
22 0007 8005
SJMP
$+2+REL2
; 5
23 0009 A1FA
AJMP
MIDL
; 6
24 000B 437744
ORL
SMALL,#DATA
; 7
25 000E D577FB
DJNZ
SMALL,$+3+REL1
; 8
26 0011 852233
MOV
PRI,IST
; 9
27 0014 B84405
CJNE
R0,#DATA,$+3+REL2
; 10
28 0017 20E0FB
JB
BIT,$+3+REL1
; 11
29 001A 12ABCD
LCALL
BIG
; 12
30 001D 90ABCD
MOV
DPTR,#BIG
; 13
31 0020
END
Errors: None
Bytes: 32
CRC: 3790

########
# test #
########

24

51


MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV

A,Rn
A,ad
A,@Ri
A,#d
Rn,A
Rn,ad
Rn,#d
ad,A
ad,Rn
add,ads

MOV ad,@Ri
MOV ad,#d
MOV @Ri,A
MOV @Ri,ad
MOV @Ri,#d
MOV DPTR,#d16
MOVC A,@A+DPTR
MOVC A,@A+PC
MOVX A,@Ri
MOVX A,@DPTR
MOVX @Ri,A
MOVX @DPTR,A
PUSH ad
POP ad
XCH A, Rn
XCH A,ad
XCH A,@Ri
XCHD A,@Ri

(n=0-7)

(i=1,2)
























1
2
1
2
1
2
2
2
2
3

1
1
1
1
1
2
1
1
2
2

2
3
1
2
2
3
1
1
1
1
1
1
2
2
1
2
1
1

2
2
1
2
1
2
2
2
2
2
2
2
2
2
1
1
1
1

1
2
1
2
1
2
1
2
1
1
2

1
1
1
1
1
1
1
1
1
1
1


ADD A,Rn
ADD A,ad
ADD A,@Ri
ADD A,#d
ADDC A,Rn
ADDC A,ad
ADDC A,@Ri
ADDC A,#d
DA
A
SUBB A,Rn
SUBB A,ad

(n=0-7)

(i=0,1)







25

SUBB A,@Ri
SUBB A,#d
INC A
INC Rn
INC ad
INC @Ri
INC DPTR
DEC A
DEC Rn
DEC ad
DEC @Ri
MUL AB
DIV AB

1
2
1
1
2
1
1
1
1
2
1
1
1

1
1
1
1
1
1
2
1
1
1
1
4
4

1
2
1
2
2
3
1
2
1
2
2
3
1
2
1
2
2
3
1
1
1
1
1
1
1

1
1
1
1
1
2
1
1
1
1
1
2
1
1
1
1
1
2
1
1
1
1
1
1
1

1
2
1
2
1

1
1
1
1
1


ANL A,Rn
ANL A,ad
ANL A,@Ri
ANL A,#d
ANL ad,A
ANL ad,#d
ORL A,Rn
ORL A,ad
ORL A,@Ri
ORL A,#d
ORL ad,A
ORL ad,#d
XRL A,Rn
XRL A,ad
XRL A,@Ri
XRL A,#d
XRL ad,A
XRL ad,#d
CLR A
CPL A
RL A
RLC A
RR A
RRC A
SWAP A

CLR C
CLR bit
SETB C
SETB bit
CPL C

26

CPL bit
ANL C,bit
ANL C,/bit
ORL C,bit
ORL C,/bit
MOV C,bit
MOV bit,C

2
2
2
2
2
2
2

1
2
2
2
2
1
2

3
2
2
1
2
2
2
2
3
3
3

2
2
2
2
2
2
2
2
2
2
2

2
3

2
2

3
2

2
2

1
1

2
2


LJMP ad16
AJMP ad11
SJMP $+2+rel
JMP @A+DPTR
JZ $+2+rel
JNZ $+2+rel
JC $+2+rel
JNC $+2+rel
JB $+3+rel
JNB $+3+rel
JBC $+3+rel
DJNZ Rn,$+2+rel
DJNZ ad,$+3+rel
CJNE A,ad,$+3+rel
CJNE A,#d,$+3+rel
CJNE Rn,#d,$+3+rel
CJNE @Ri,#d,$+3+rel
LCALL ad16
ACALL ad11
RET
RETI
NOP


. 2


,
,
,
,
,
,
, ,
,
,

,
,
,

,

2


: ad 8- ,
; add 8- ; ads ; ad11 11- ; ad16 16- ; bit 8- ; #d
8-; #d16 16-; rel 8- ,
.

27

ADD A, < >

ADDC A, < >

ANL C, < a>


ANL C, </ a>
CJNE < >, < >,
<>
CLR C
CLR <bit>
CPL C
CPL <bit>
DA A
DIV AB
MOV < >, < >
MUL AB
ORL C, < a>
ORL C, </ a>
RLC A
RRC A
SETB C
SETB <bit>
SUBB A, < >

AC
C
OV
AC
C
OV
C
C
C
C
bit
C
bit
AC
C
C=0
OV
C
bit
C=0
OV
C
C

C
C
bit
AC
C
OV

PC, ACC, B,
PSW, DPTR, TMOD, TCON, T/C0, T/C1, IE, IP SCON, PCON , SP 07, 0-3 0FFH ( ). .

28




(-) , . ASCII (
). ()
, , . .
16- , .

. .
, .
.


.
, ,
. , ,
16- . ,
,
ASCII .

29

. , .
:
ORG ;
END ;
EQU , ;
DB ;
DW ( ).

ORG 800H
END
MASK EQU 0FH
DB 89,7FH,A
DW 1234H, 965

(,
Shift+F4 FAR). ,
.
.asm.
END.

-:
8051;
xlink.
.
TABLO.ASM
8051, :
sourse file [.msa/s03]=TABLO.ASM
list file [.lst]=TABLO
object file=<Enter>
options=<Enter>

TABLO.LST ( )
TABLO.R03 ( ).

30


TABLO.ASM:

;
MAIN:

MOV
MOV
MOV
LCALL
MOV
MOV
MOV
LCALL
SJMP

R0,#20H
DPTR,#20H
R7,#32
TEXT
R0,#20H
DPTR,#40H
R7,#32
TEXT
MAIN

;
;
;
; TEXT
;
;
;
;
;

;
TEXT:

CLR
MOVC
MOV
DJNZ
INC
INC
DJNZ
RET

A
A,@A+DPTR
@R0,
R6,$
R0
DPTR
R7,TEXT

;
;
;
;
;
;
;
;

;
ORG
DB
ORG
DB
END

20H
'DEARFRIEND!WELCOMETOTOMSK'
40H
''
; 32

31


, .
, :
xlink -c8051 TABLO -o TABLO.HEX
TABLO.HEX,
.


51 AVOSET SISTEMS
INC.
:
avsim51 -c1 a
:
Load Avoset
Enter filename: TABLO.HEX

: ( ) .
:
. Esc.

, . :
Load ( Avoset);
Patch -
;

32

Dump (1)
(2) Data Space.
( Abcolute);
Reset .
, (
,

);
Set . ;
Memory ;
Quit Exit.

Ctrl+C.

, ASCII .
().
:
INS , ;
+/ / , ;
;
Ctrl+A ;
Ctrl+ ;
Ctrl+ ;
Ctrl+I ;
Ctrl+P ;
Alt+P .
. :
F1 ;
F10 ;
F5 .

33


1.
51 . ( N=1 N=10), TEST.ASM:

1LABEL:

;
MASC
EQU
N
DB
11111111B,377Q,255,0FFH
DB
BEGIN
DB
RS1,PSW.4,0D0H.4,0D4H
DW
0,1234H,1000
ORG
30H
SJMP
$
ORL
A,#MASC
M1:
CJNE
A,P1,M1
STRT
CNT
MOV
TH1,#HIGH(NOT(10000)+1)
MOV
TL1,#LOW(NOT(10000)+1)
MOV
B,#(15*5-MASC)
:
JMP

END

(
TEST.LST). , , ?
? , ?
2. :

M1:

MOV
MOV
MOV
MOV
MOV
INC
DEC

R7,#16
R0,#20H
R1,#3FH
A,@R0
@R1,
R0
R1

34
DJNZ
SJMP
END

R7,M1
$

, 8
9 . , SJMP $ AJMP $ LJMP $?
,
20H 2FH
00,11,22,33,44,55,66,77,88,99,AA,BB,CC,DD,EE,FF.
3. TABLO.ASM. .
TABLO.HEX,
.
. , 20-2FH?
4. Path Code 16- (DPTR) 8-
( R0). 24- : R1
( ), R2 ( ), R3 ( ).
MOV
MOV
MUL
MOV
MOV
MOV
MOV
MUL
ADD
MOV
CLR
ADDC
MOV

A,DPL
B,R0
AB
R3,A
R7,B
A,DPH
B,R0
AB
A,R7
R2,A
A
A,B
R1,A

(, 10000=2710, 100=64, 1000000=0F4240H).

35

. .
5. 51 , ,
, ( ),

.
( ):
1) 2.0 , ,
1 ;
2) 1.7
,
;
3) 0.7 ,
;
4) 0.7
F=X Y, X Y ,
;
5) 20-27
64 . 0 , ;
6) 20-2FH
128 . 1.0 , 10;
7) DPTR
( 0 1) (
2);
8) , DPTR
5000 ( );
9) 1
;
10) , .

36


51 ?
MOV R5,7
MOV 5,#7?
JBC F0,$-7.
MUL AB?

, 1?

707FH?


( ),
.
.
, , , 5 6 . (
) 4.

37

4 M51
( 2)
. /
MCS-51
.
/ MCS-51
/ , .. 1
12 .
/
1 0
, 0 (3.4) 1 (3.5).
/
TMOD (. 4.1) TCON (. 4.1). 1 0
/0 /1.
T/C1
TMOD
(89H)

GATE

C/T

T/C0
M1 M0
0
0
1
1

1
0
0
1

0
1
0
1

GATE

C/T

M1

M0

13-
16-
8
8-

. 4.1

38

/1 0
OSC

:12

TL1 TH1
5 8

T1
TR1
GATE1

&

INT1

TF1


13
( 116 )

/1 2
OSC :12

T
TL1 8

TF1

T1
TR1
GATE1

&
&

INT1

TH1 8


/0 3
TR1
TF1
TH0 8

OSC

:12

TL0 8

TF0

T0
TR0
GATE0
INT0

&

8-

. 4.2

39

0. 13 .

TF. / , TR=1
GATE=0, INT=1.
1. 0 ,
16 .
2. TL 8-
/. , TL .
3. TL0 8- / /0. 0
8- , TR1
TF1. /1 0,1 2
.

. 4.1.
4.1

P3
PSW
TCON
IE
IP
SCON

7
RD
C
TF1
EA

SM0

6 5 4
WR
T1
T0
AC
F0
RS1
TR1
TF0 TR0

ES

PS
SM1 SM2 REN

3
INT1
RS0
IE1
ET1
PT1
TB8

2 1
INT0 TxD
OV

IT1
IE0
EX1 ET0
PX1
PT0
RB8
TI

0
RxD
P
IT0
EX0
PX0
RI

M51
. 4.3.
TCON, IE, IP, SCON.
INT0 INT1
(0), ( 1 0) 3.2, 3.3, IT0 IT1 TCON.
IE0 IE1.

40

,
.

INT 0

I 0

IE 0

0003

EXTI0

000B

TIMER0

0013

EXTI1

001B

TIMER1

TF 0
1

INT 1

I 1
1

TF1
TI

IE1

1
0023

SINT

RI
. 4.3

,
(IE)
(IP).
. =1 EX0, ET0, EX1, ET1,
ES. PX0, PT0, PX1, PT1, PS .
/ TF0 TF1.
. RI TI , .
IE0, IE1, TF0, TF1, RI TI ,
IE.

.

41

,

.
.
(PUSH) PSW, ACC, B, DPTR ().
RETI, .

. ,
,
.
, . , ,
, 1
(, MOV SP,#100).

1. , (avsim51 c1 a).
? ? ?
?
2.
, 1, DPTR:
MOV
MOV
DIV
MOV

A,P1
B,#100
AB
DPH,A

42
MOV
XCH
DIV
SWAP
ORL
MOV

A,#10
A,B
AB
A
A,B
DPL,A

Patch Code
(F10) .
? PSW
?
3. , SJMP 0 (80 FE),
.
/0 /1?
TR0=1, /0
( F5)
(TMOD.2=1). 0 (3.4) Insert.
TL0 TH0 T/C0 0? TF0?
/1 1. TR1=1
GATE1=1, INT1 (P3.3).
/0 2 (8-
/). (0)=0D5H,
/0 .
/0 3 (TL0 0
8- ). /1?
4. Patch Code ,
R0, R1, R2, R3, R4

, :

43

ORG 00H
INC A
SJMP 0
ORG 03H
INC R0
RETI
ORG 0BH
INC R1
RETI
ORG 13H
INC R2
RETI
ORG 1BH
INC R3
RETI
ORG 23H
INC R4
CLR SCON.0
CLR SCON.1
RETI

INT0,
=1 0=1.

IT0=0 IT0=1 ( 3.2).
INT1. IT0=IT1=0 INT0=INT1=0 .
INT1? , 1=1.
. TR0=TR1=IT0=
=IT1=1. . , .
SBUF? INT0 INT1.
.
(IE0, IE1, TF0, TF1, RI TI). -

44

. . IE0, IE1,
TF0, TF1(
RETI)? , PS=1.
. ,

?
TF0, TF1, RI TI?
5. ,
- ( ) INT0:

M1:

ORG
MOV
MOV
MOV
SJMP
ORG
ADD
DA
RETI
CLR
MOV
SETB
SJMP

00H
TH0,#156
TL0,#0
TMOD,#0AH
M1
0BH
A,#1
A
A
IE,#82H
TR0
$

; RESET
; /0
; /0 2
; /0
;
;
;
;
; /0
; /0
;

0 /0.
(.. 100 12 )
- ,
, .
, ,
, SJMP $.
/0 8-
1 INT0 ( 0). 0
100.

45

INT0 10
,
(HI). ?
6. , 183051 , . . .

; 00 00 00
ORG
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV

MAIN:

00H
P0,#0
P1,#0
P2,#0
R0,#100
R1,#100
TH1,#9CH
TMOD,#20H
IE,#88H

SETB TR1
SJMP MAIN

; C
; C
; C
;
;
;
; /1 2
;
; /1
; /1
;

;
ORG 1BH
DJNZ R0,EXIT
MOV R0,#100
DJNZ R1,EXIT
MOV R1,#100
JNB
T0,M1
JNB
T1,M2
MOV
A,P2
ADD
A,#1
DA
A
MOV
P2,A
CJNE A,#60H,EXIT
MOV
P2,#0

;
;
;

;
;
;

46

M2:

EXIT:

M1:
ADD
DA
MOV
CJNE
MOV
MOV
ADD
DA
MOV
CJNE
MOV
RETI
END

MOV
A,P1
A,#1
A
P1,A
A,#60H,EXIT
P1,#0
A,P0
A,#1
A
P0,A
A,#24H,EXIT
P0,#0

; /


. R0
R1 3, 100.

, ,
. / /1
2, TL1 8- , TH1 , TL1 . /1,
100
(100 12 ), 1. 10000 , R0 R1, .. , 2,
.
- c
1, 0.

. .
. 0 1 , . . 0 0 ,
.
.

.

47


?
?
JB F0,$+5.
CJNE A,#40,M1?

MOV SBUF,B?
/0 10000?

,
.
M51

ACALL
ACALL
ACALL
ACALL
ACALL
ACALL
ACALL
ACALL
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADDC
ADDC
ADDC
ADDC

0xxH
1xxH
2xxH
3xxH
4xxH
5xxH
6xxH
7xxH
A,ad
A,R0
A,R1
A,R2
A,R3
A,R4
A,R5
A,R6
A,R7
A,@R0
A,@R1
A,#d
A,ad
A,R0
A,R1
A,R2

11
31
51
71
91
B1
D1
F1
25
28
29
2A
2B
2C
2D
2E
2F
26
27
24
35
38
39
3A

ANL
AJMP
AJMP
AJMP
AJMP
AJMP
AJMP
AJMP
AJMP
CJNE
CJNE
CJNE
CJNE
CJNE
CJNE
CJNE
CJNE
CJNE
CJNE
CJNE
CJNE
CLR
CLR
CLR

C,/bit
0xxH
1xxH
2xxH
3xxH
4xxH
5xxH
6xxH
7xxH
A,ad,adr
A,#d,adr
R0,#d,adr
R1,#d,adr
R2,#d,adr
R3,#d,adr
R4,#d,adr
R5,#d,adr
R6,#d,adr
R7,#d,adr
@R0,#d,adr
@R1,#d,adr
A
bit
C

B0
01
21
41
61
81
A1
C1
E1
B5
B4
B8
B9
BA
BB
BC
BD
BE
BF
B6
B7
E4
C2
C3

48

ADDC
ADDC
ADDC
ADDC
ADDC
ADDC
ADDC
ADDC
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
ANL
DJNZ
DJNZ
DJNZ
INC
INC
INC
INC
INC
INC
INC
INC
INC
INC
INC
INC
INC
JB
JBC
JC
JMP
JNB
JNC
JNZ
JZ
LCALL
LJMP

A,R3
A,R4
A,R5
A,R6
A,R7
A,@R0
A,@R1
A,#d
A,ad
A,R0
A,R1
A,R2
A,R3
A,R4
A,R5
A,R6
A,R7
A,@R0
A,@R1
A,#d
ad,A
ad,#d
C,bit
R5,adr
R6,adr
R7,adr
A
ad
DPTR
R0
R1
R2
R3
R4
R5
R6
R7
@R0
@R1
bit,adr
bit,adr
adr
@A+DPTR
bit,adr
adr
adr
adr
ad16
ad16

3B
3C
3D
3E
3F
36
37
34
55
58
59
5A
5B
5C
5D
5E
5F
56
57
54
52
53
82
DD
DE
DF
04
05
A3
08
09
0A
0B
0C
0D
0E
0F
06
07
20
10
40
73
30
50
70
60
12
02

CPL
CPL
CPL
DA
DEC
DEC
DEC
DEC
DEC
DEC
DEC
DEC
DEC
DEC
DEC
DEC
DIV
DJNZ
DJNZ
DJNZ
DJNZ
DJNZ
DJNZ
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV

A
bit
C
A
A
ad
R0
R1
R2
R3
R4
R5
R6
R7
@R0
@R1
AB
ad,adr
R0,adr
R1,adr
R2,adr
R3,adr
R4,adr
add,ads
bit,C
C,bit
DPTR,#d16
R0,ad
R0,A
R0,#d
R1,A
R1,ad
R1,#d
R2,A
R2,ad
R2,#d
R3,A
R3,ad
R3,#d
R4,A
R4,ad
R4,#d
R5,A
R5,ad
R5,#d
R6,A
R6,ad
R6,#d
R7,A

F4
B2
B3
D4
14
15
18
19
1A
1B
1C
1D
1E
1F
16
17
84
D5
D8
D9
DA
DB
DC
85
92
A2
90
A8
F8
78
F9
A9
79
FA
AA
7A
FB
AB
7B
FC
AC
7C
FD
AD
7D
FE
AE
7E
FF

49

MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
ORL
ORL
ORL
ORL
ORL
ORL
ORL
ORL
ORL
ORL
POP
PUSH
RET
RETI
RL
RLC
RR
RRC
SETB
SETB
SJMP
SWAP
SUBB
SUBB
SUBB

A,ad
A,R0
A,R1
A,R2
A,R3
A,R4
A,R5
A,R6
A,R7
A,@R0
A,@R1
A,#d
ad,A
ad,R0
ad,R1
ad,R2
ad,R3
ad,R4
ad,R5
ad,R6
ad,R7
ad,@R0
ad,@R1
ad,#d
A,R5
A,R6
A,R7
A,@R0
A,@R1
A,#d
ad,A
ad,#d
C,bit
C,/bit
ad
ad

A
A
A
A
bit
C
adr
A
A,ad
A,R0
A,R1

E5
E8
E9
EA
EB
EC
ED
EE
EF
E6
E7
74
F5
88
89
8A
8B
8C
8D
8E
8F
86
87
75
4D
4E
4F
46
47
44
42
43
72
A0
D0
C0
22
32
23
33
03
13
D2
D3
80
C4
95
98
99

MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOVX
MOVX
MOVX
MOVX
MOVX
MOVX
MUL
NOP
ORL
ORL
ORL
ORL
ORL
ORL
SUBB
SUBB
SUBB
XCH
XCH
XCH
XCH
XCH
XCH
XCH
XCH
XCH
XCH
XCH
XCHD
XCHD
XRL
XRL
XRL
XRL
XRL
XRL
XRL
XRL
XRL

R7,ad
R7,#d
@R0,A
@R0,ad
@R0,#d
@R1,A
@R1,ad
@R1,#d
A,@A+DPTR
A,@A+PC
A,@DPTR
A,@R0
A,@R1
@DPTR,A
@R0,A
@R1,A
AB
A,ad
A,R0
A,R1
A,R2
A,R3
A,R4
A,@R0
A,@R1
A,#d
A,ad
A,R0
A,R1
A,R2
A,R3
A,R4
A,R5
A,R6
A,R7
A,@R0
A,@R1
A,@R0
A,@R1
A,ad
A,R0
A,R1
A,R2
A,R3
A,R4
A,R5
A,R6
A,R7

AF
7F
F6
A6
76
F7
A7
77
93
83
E0
E2
E3
F0
F2
F3
A4
00
45
48
49
4A
4B
4C
96
97
94
C5
C8
C9
CA
CB
CC
CD
CE
CF
C6
C7
D6
D7
65
68
69
6A
6B
6C
6D
6E
6F

50

SUBB
SUBB
SUBB
SUBB
SUBB
SUBB

A,R2
A,R3
A,R4
A,R5
A,R6
A,R7

9A
9B
9C
9D
9E
9F

XRL
XRL
XRL
XRL
XRL

A,@R0
A,@R1
A,#d
ad,A
ad,#d

66
67
64
62
63

. 4.4. , .

@A+DPTR, @A+PC

ad

@Ri

DPTR

#d16

@DPTR, @Ri

A
Rn

#d

bit

. 4.4 M51

, , .
( ) ( ) .
( R0 R1),
.
.

. .
- DPTR.

51

5
1.
?
.
0 , ALE. 2.
0 , PME.
2.
MOVX @R0,A?
.
256 ,
R0.
0 , ALE. 0 WR, 3.
3.
?
.
VPP. 0 2 , .
4. PSW
?
. .
. 9-
, , .
.
5. 3
MOV P3,#0?

52

. , . 3 , - 1.
, 3
0.
6. 51 ,
LCALL
BEGIN?
. LCALL BEGIN. SP
7. LCALL
3 16- (
0003) (03 , 00
). 2.

LCALL, .. BEGIN.
7. .
. , ,
. 5 , 00, .5, 05.
128 , 20-2FH, .
8.
PCON,
IDL ( )?
. , PCON . 11 21.

53

9. - ?
.
R0, R1
.
256 .
64 16- DPTR.
, DPTR
.
10.

18?
. (, ,
MOV 18H,#100), (MOV @R1,#100 R1 18) (MOV R0,#100
3 1 RS0 RS1 PSW).
11. ANL A,B.
. -
, , 3.
(55), (F0H).
12. CLR F0.
. F0 PSW.5. , 4. 2, D5H , 5
PSW D0H.
13. SJMP $.
. . $

54

( ). 5.
(rel) , . rel=
2=FEH (rel
128 +127).
14. AJMP 1000.
. 2 . 6. AJMP 3E8H,
8. AJMP 3xxH 61.
15. MOV B,P0.
. 9 ( MOV add,ads). 80
0 ( ads). F0H
( add).
16.
LCALL 1AB7H?
. 12,
, .
LCALL 3 16 ( ((SP+1)) , ((SP+2)) .
(1) (7) LCALL. , .
17.
CJNE A,#50,M1?

55

. 10.
,
(32)
1, .
( ),
(rel),
. 1,
. . . .
18. JBC T1,$+10?
. 11.
10. 5
1 (3.5). 07 ,
(rel=+7). , , .
JBC .
19. ADD
A,R6. ()=3, (R6)=AAH.
.
R6, : ()=C3H+AAH=
=6DH. : AC=0, C=1, OV=1.
=1 ( 255).
OV=1 , ( ).
20. DA A - ?
. , .

56

ADD ADDC , - .
,
MOV
MOV
ADD
DA

A,#37H
70,#48H
A,70
A

85,
- 85, 37 48,
- .
DA A
, 06, 60 66
SW ( ).
21. MUL AB?
. 8-
. 16 ,
. . OV , 255.
.
()=()=100=64. 10000=2710.
MUL AB 27,
10. =0, OV=1.
22. DIV AB?
. 8-
8- .
( ), . OV . 0 OV , .
.

57

251 (0FBH
11111011), 18 (12 00010010).
DIV AB 13
(0DH 00001101), 17 (11
00010001), .. 251=(13*18)+17. OV .
23. ,
1.
. ,
CPL P1.0 CPL P1.7.
XRL
P1,#10000001B.
- .
24. SUBB A,R0?
. R0 , .
(), 7 , . , 3. OV
, 6,
7, 7, 6.
OV , , ,
.
25. 51 12 .
74 05
83
D5 E0 FD
D5 F0 F9

ORG
MOV
MOVC
DJNZ
DJNZ

0
A,#5
A,@A+PC
ACC,$
B,2

;1
;2
;2
;2

58

.
, . .
05 5, 0 , F0
. FD (-3)
. F9 2, (-6).
, .
5, , .. 3. F9=249. 249 .
0. 256 . 255
.
D5=213.
.
1 .
t=1+2*256+(2*249+2*255*213)+2*256=110153 .
26. 51 12 .
0,1
2,3,4
5
6,7,8
9,10
11,12,13
14,15
16,17

ORG
MOV
MOV
MOVC
DJNZ
PUSH
DJNZ
MOV
ADD

0
A,#7
B,#5
A,@A+PC ; (A)=F8=248
ACC,$
ACC
B,6
; rel=F8
A,SP
A,10

. , ,
. 13 , .. F8=248 ( 14 6 ).

59

,
. PUSH ACC
( 8 , .. 7)
. DJNZ B,6 5 . 4
6 , 4 ,
. PUSH ACC 12.
.
: 1+2+2+(2*248+2*4*256)+2*5+2*5+1+1=2571 ,
=12=0CH
27.

12 .
ORG
MOV
PUSH
MOV
DIV
ACALL
MOVC
DIV
MUL
M1: DJNZ
DJNZ

0
A,#22H
ACC
B,SP
AB
1
@A+PC
AB
AB
ACC,$
B,M1

;1 ()=34
;2
;2 ()=8
;4 ()=4 ()=2
;2+2
;2
()=253
;253/2 ()=126 ()=1
;()=126 ()=0
;2*126+2*255*256
;2*256

. 22 RET. ACALL 1. MOVC


@A+PC
DJNZ ACC,$ (
1 (-3)=253). . DJNZ B,M1 256 , 0 . DJNZ ACC,$
126 , 255
256 .
: 1+2+2+4+4+2+4+4+252+130560+512=131347 .

60

28.

12

DELAY:

M1:

ORG
SJMP
DJNZ
MOV
RET
MOVC
PUSH
ACALL
POP
MUL

0
M1
ACC,$
A,SP
A,@A+PC
ACC
DELAY
B
AB

;2
;2*192
;1
(A)=10
;2
;2
(A)=0C0H=192
;2
;2
;2
(B)=192
;4
10*192=1920
; (B)=7 (A)=128=80H

.
. . , MOVC A,@A+PC
0 ,
. PUSH ACC 8,
DELAY
10. .
0=192.
, . , , 192 .
: 17+2*192=401 ,
(A)=128=80H
29. 51 12 .
C0 04
D5 81 FC
D5 E0 FA
04

ORG
PUSH
DJNZ
DJNZ
INC

0
4
SP,1
ACC,2
A

;2
;2
;2
;1

61

.
. 8 . 7
INC A (=04). SP=0.
=7.
( ),
256 , 255 INC
A,
(=5).
=3, =1,
.
: 2+8*2+7*1+3(2+256*2+255*1)+2+1=2335
30. 51 12 .

M1:

ORG
MOV
MOV
PUSH
DJNZ
ADD
DJNZ

0
B,SP
A,SP
ACC
B,M1
A,10
ACC,$

;2
;1
;2
;2
;1
;2

. 1 7 .
, , , 7, .. PUSH ACC .
13, 9.
21 .
: 2+(1+2+2)7+1+2(13+9)=82

62

6
1. 1100-110FH
1. , 100.
1
2
3
4
5
6
7
8

0100
0100
0103
0105
0107
0108
0109
010B

901100
7910
E590
F0
A3
D9FC

M1:

ORG
MOV
MOV
MOV
MOVX
INC
DJNZ
END

100H
DPTR,#1100H
R1,#16
A,P1
@DPTR,A
DPTR
R1,M1

DPTR. R1. 1.
, 1 (
4).
2. , -
, - . , .
1
2
3
4
5
6
7
8

0000 75F010 MOV


0003 84
DIV
0004 A4
MUL
0005 75F00A MOV
0008 84
DIV
0009 C4
SWAP
000A 45F0
ORL
000C
END

B,#10H
AB
AB
B,#10
AB
A
A,B

;
;
;
; 10.
; ,
;
;

16 ( , -

63

). , .
. 10 - .

.
3. 20-2FH , 40.
MOV
MOV
MOV
M1: MOV
MOV
INC
INC
DJNZ

R0,#20H
R1,#40H
R2,#16
A,@R0
@R1,A
R0
R1
R2,M1

;
;
;
;
;
;
;
;


,
R0 R1. .
END .
4. 8-
(20-2FH) 30.
MAX

M1:

M2:

EQU
MOV
MOV
MOV
MOV
CJNE
JC
MOV
INC
DJNZ

30H
;
R0,#20H
;
R1,#16
;
MAX,#0
;
A,@R0
;
A,MAX,$+3 ;
M2
; ,
MAX,A
; ,
R0
;
R1,M1
;

64

EQU
30 , ,
. ,
, .
.
, .
5. 100 :
=100, 1;
<100, 2;
>100, 3.

M3:

CJNE
A,#100,$+6
LJMP
M1
; , =100
JC
M2
; , <100
..
; >100

100, . <100 >100.


6. , , -
DPTR.
MOV
DIV
MOV
MOV
XCH
DIV
SWAP
ADD
MOV

B,#100
AB
DPH,A
A,#10
A,B
AB
A
A,B
DPL,A

; 100
;
;
; 10
;
;
;
;
;

65

7. , INT0.

MAIN:

SUBR:

ORG
SJMP
ORG
AJMP
MOV
SETB
SETB
SETB

0
MAIN
0003
SUBR
SP,#100
EA
EX0
IT0
............................
ORG
800H
PUSH
PSW
PUSH
ACC
PUSH
B
PUSH
DPL
PUSH
DPH
SETB
RS0
CLR
RS1
............................
POP
DPH
POP
DPL
POP
B
POP
ACC
POP
PSW
RETI

;
;
;
; /
;
;
; INT0
;
;
; /
;
;
;
;
;
;
;
;
;
;
;
;
; /


.

, , 1.

, PSW , . A, B DPTR.
. -

66

0003, .
RETI INT0 0,
,
IT0.
8. 1.0 1.3 X, Y, Z
V . 1.4 F=X(Y+Z)+V .
1 0090
2 0091
3 0092
4 0093
5 0094
6 0000 A291
7 0002 7292
8 0004 8290
9 0006 A093
10 0008 9294
11 000A

X
Y
Z
V
F

EQU
EQU
EQU
EQU
EQU
MOV
ORL
ANL
ORL
MOV
END

P1.0
P1.1
P1.2
P1.3
P1.4
C,Y
C,Z
C,X
C,/V
F,C

51
. 128 11 .
128
.
, (580,
48), , , .

51 .
,
,

67

.
:
SETB
SETB
SETB
SETB

RS0
PSW.3
0D0H.3
0D3H

;
;
;
;


(D3).
, , .
9. 50
183051 , .
1 000B
2 000B
3 000D
4 0100
5 0100
6 0102
7 0105
8 0108
9 010B
10 010D
11 010F
12 0112

ORG
C28C
CLR
32
RETI
ORG
D2AF
MAIN: SETB
758901
MOV
758AB0
MOV
758C3C
MOV
D28C
SETB
D2A9
SETB
758701
MOV
NEXT:
.............

000BH
TR0

;
; /0
; /
100H
;
EA
;
TMOD,#01H ; 1 /0
TL0,#LOW(NOT(50000)+1)
TH0,#HIGH(NOT(50000)+1)
TR0
; /0
IE.1 ;
PCON,#01H
;
;

1 ( 12 )
65536 . TR0
(TCON.4). 50 ,

50000. ,
TL0, 0, .

68

1830, , CON (IDL). ,


4 .
SP, PC, PSW, A .
( ) .
RETI , , .
PCON (PD) ( 2 , 50 ).
,
. (RST=1).
1816
PCON (SMOD). .
10. ,
1 (3.5) (10 ).
1000.
DPTR.
1 D8F0
2 1000
3 1000
4 1003
5 1004
6 1006
7 1008
8 100B
9 100E
10 1011
11 1014
12 1016
13 1019
14 101C

TIME
758951
E4
F58D
F58B
758CD8
758AF0
438850
108D02 M1:
80FB
858D83 M2:
858B82

EQU NOT(10000)+1
ORG 1000H
MOV TMOD,#01010001B
CLR
A
MOV TH1,A
MOV TL1,A
MOV TH0,#HIGH(TIME)
MOV TL0,#LOW(TIME)
ORL
TCON,#50H
JBC
TF0,M2
SJMP M1
MOV DPH,TH1
MOV DPL,TL1
END

69

/0 16- , /1 16- .
10000,
. /0 /1. /0, /1 DPTR. JBC TF0.
11. , INT0
(P3.2) 183031 (. 6.1).
BQ1 SMC

BQ2

P0

ALE
PME

+5

D ROM
D
RG
STB

CS

RST
10

P1

8.2

INT0

VPP

P2

P3.2

P3.0

9999

. 6.1

( 9999 )
2 ( ) 1 (
) - .
3.0.
ALE 0 RG ( 58082),
(
5565) 0.
, -

70

,
.
/0.
, , 12
,
INT0 1 . ( 10 )
0 L0.
;
;

M1:

CLR
MOV
MOV
MOV
SETB
JNB
JB
CLR
MOV
ADD
DA
MOV
CLR
ADDC
DA
MOV
MOV
CLR
SUBB
MOV
MOV
SUBB
MOV
ORL
JNZ
SETB
SJMP

P3.0
TMOD,#1001B
P1,#0
P2,#0
TR0
INT0,$
INT0,$
TR0
A,P1
A,#1
A
P1,A
A
A,P2
A
P2,A
A,TL0
C
A,#1
TL0,A
A,TH0
A,#0
TH0,A
A,TL0
M1
P3.0
$

;
; /0 1
;
; -
;
;
; /0
;
; -
;

;
;
;
;

71


- . -
1, 2,
TL0, TH0.
.
12. 183051
,
(. 6.2). 2. - , ,
0, 1 2, .
12

10
+5 B

BQ1 SMC

P0
23 59 59

BQ2
VPP
RST

8.2

P1
P2
T0
1
T1

S1
S2

. 6.2

13. WR 50 .
,
, (
12 1 ):
CLR
MOV
DJNZ
SE

WR
R7,#24
R7,$
WR

; 1
; 1
; 2
; 1

72

WR (P3.6)
50 , DJNZ 24 .
14. 10
, 181651, -
( ).
,
50 59. .
.

M1:

MOV
R0,#50
MOV
R7,#10
MOV
A,@R0
SWAP A
ANL
A,#0FH
MOV
B,#10
MUL
AB
MOV
B,A
MOV
A,@R0
ANL
A,#0FH
ADD
A,B
MOV
@R0,A
INC
R0
DJNZ
R7,M1

;
;
;
;
; 10

;
;
;
;
;

WR (P3.6)
50 , DJNZ 24 .
15. INT0 INT1
/ /1.
/1 .
.

1 IE, IP, TCON. .

73
MOV

IE,#10001101B

SETB

PT1

SETB
SETB
MOV

IT0
IT1
SP,#99

; EA, ET1, EX1, EX0


;
; /1
; IP.3
; INT0
; INT1
;

, . (
): INT0
03, INT1
13 / /1 1.
/1 . . TF1 1
. RETI (
,
RET ).
7. , ( )
( ).
16. , 1, .
1 (
80 , 1,6 ,
510 ).
(. . 8.2).

74


: 1
, ,
.
.
. 24
, .
.
M1:
DELAY:

MOV
MOV
DJNZ
DJNZ
RL
SJMP

A,#1
P1,A
R0,$
R1,DELAY
A
M1

;1
;2
;2
;2
;1
;2

(
12 1 ). R0 R1 . , DJNZ
R1,DELAY 256 , DJNZ R0,$ 2562 .
5+2(256+2562) =
= 131589 .
17.
, 20
( ). R7 .
. :

M1:
M2:

MOV
CLR
CJNE
SJMP
INC

R0,#20H
A
@R0,#.,M2
EXIT
R0

;
;
; 2
;
;

75

EXIT:

ADD
DA
SJMP
MOV

A,#1
A
M1
R7,A

;
;
;
; R7

. - .
massiv.lst, .
########################################################
#
#
# Micro Series 8051 Assembler V1.80/MD2 11/Oct/07 11:21:50 #
#
#
#
Source = massiv.asm
#
#
List = massiv.lst
#
#
Object = massiv.r03
#
#
Options =
#
#
#
#
(c) Copyright IAR Systems 1985
#
########################################################

1 0000 7820
2 0002 E4
3 0003 B62E02 m1:
4 0006 8006
5 0008 08
m2:
6 0009 2401
7 000B D4
8 000C 80F5
9 000E FF
exit:
10 000F
Errors: None
Bytes: 15
CRC: F3A2

mov
clr
cjne
sjmp
inc
add
da
sjmp
mov
end

##########
# massiv #
##########

r0,#20H
a
@r0,#'.',m2
exit
r0
a,#1
a
m1
r7,a

76

7 51

51 SBUF. SBUF , SBUF
.
SCON, (. 7.1):
SCON

SM0 SM1 SM2 REN


0
0
1
1

0
1
0
1

TB8

RB8 TI RI

0
1
2
3

. 7.1

.
0. ( ) RxD (P3.0). TxD (P3.1) ,
. 8 .
fBQ/12. ,
SBUF ,
RI ( REN=1).
1. ,
. 10 :
- (), - (). - /1.
2. 11 (. 7.2): -,
, -.
8.
8 SCON 1
0,

77

PSW
( ). RB8 SCON. fBQ/32 (SMOD=1)
fBQ/64 (SMOD=0). SMOD PCON
1 MOV PCON,#80H.
SMOD=1

:16

:16

. Rx

SMOD=0

fBQ/2 ( 2)
fOV ( 1,3)

:2

789

.
SBUF
TxD

0 1
-

7 TB8

7 RB8 -

TI

. R
RD

0 1
-

RI
-

. 7.2 ,
2 3:
; ;

3. 2,
( 1) /1
(2SMOD/32)fOV, fOV /1.

78

/1
( 2). fOV=fBQ/{12 [256
(TH1)]}. /1 .
,
SBUF . TxD : D0-D7 8.
TI. RxD 1 0.
7, 8 9 - RxD . RI.
1

SMOD
,
0, : 1
12
X
2, : 375
12
1
1,3: 62,5
12
1
19,2
11,059
1
9,6
11,059
0
4,8
11,059
0
2,4
11,059
0
1,2
11,059
0
137,5
11,059
0
110
6
0
110
12
0

C/T

X
X
0
0
0
0
0
0
0
0
0


/1

X
2
0FFH
2
0FDH
2
0FDH
2
0FAH
2
0F4H
2
0E8H
2
1DH
2
72H
1
0FEEBH

SCON:
REN ;
TI . 8- 0 . ;
RI . 8- 0 - SM2=0;

79

SM2 0 0. SM2=1
1 RI , -, 2 3 9- 0.
18. 110 (/)
6 , .
;
CLR
TR1
; 1
MOV
TH1,#72H
;
MOV
SCON,#11011100B
; 9-
MOV
TMOD,#00100000B
; /1
SETB
TR1
; 1
;
JNB
MOV
CLR

RI,$
A,SBUF
RI

;
;
;

;
JNB
CLR
MOV

TI,$
TI
SBUF,A

;
;
;

19. ( )
2400 (
).
.
.
.
1 (SM0=0,
SM1=1) (SM2=0,
REN=1). TI , SBUF . , SCON
01010010.

80

1 2 (8 ) .
2400 0F4H (
12) 11059 .

TMOD 00100000.
SETB TR1.
, ( ) :
CLR
MOV
MOV
MOV
SETB

TR1
TMOD,#00100000B
SCON,#01010010B
TH1,#0F4H
TR1

TBYTE. 7- ( ASCII) .
TBYTE:

MOV
CPL
MOV
JNB
CLR
MOV
RET

C,P
C
ACC.7,C
TI,$
TI
SBUF,A

;
;
;
;
;
;

RBYTE.
.
RBYTE:

JNB
CLR
MOV
MOV
CPL
ANL
RET

RI,$
RI
A,SBUF
C,P
C
A,#7FH

;
;
;
; =1
;
;

81

8 51.

1 (. 8.1).

D-, VT1VT3. VT1
. VT3
, 1
VT1 VT2. VT2
VT1, 100 .
+5

|---|

VT2

VT3

VT1

D T
C
2

. 8.1 1


1 . 2.
, VT1 , .. 1.
,
, , (ANL

82

P1,A; ORL P2,#d; JBC P1.1,M1). , (MOV A,P1).


1 ( 12 ) . 8.2. 1 80 .

.
.
+12

+12
SMC
1

P1.0

P1.3

P1.1

P1.4

5614
P1.5
P1.2

P1.6

470
+5

+5
. 8.2


1 (. 8.3), 2.
58086
D
BF
OE

X0-X7

P1

SMC

P2.0
X8-X15

D
BF
OE
P2.1

. 8.3

83

, 51 (. 8.4):
64 ;
;
10 ;
2 ( ).
+5 B

SMC
RST

40
8
8

P0
P1

RxD
TxD
T0
T1

DR RG
59
C

INT0
INT1

P3
P2

2
8

. 8.4 51

SBUF
, ( 0).

1 0.

8- ,
, . .
20. 64 20-27 28-2FH.
SCAN:

M1:

MOV
MOV
MOV
MOV
RR

R0,#20H
R1,#28H
A,#80H
P1,A
A

;
;
;
;
;

84
MOV
MOV
XCH
MOV
INC
INC
MOV
JNB
RET

R2,A
A,P0
A,@R0
@R1,A
R0
R1
A,R2
ACC.7,M1

; R2
;
;
;
;
;
;
; 8

21. 58079
51 ( S0-S9)
8- (. 8.5). 8-
( 20-27)
(HG0-HG7).
51
SMC
P0
P3.7
P3.6
P1.0
P1.1
ALE
RST

58079
DB CCD CNTL
RD
SHIFT
WR
RL
CS
3
A0
SL
IRQ
CLK
BD
RST
OB,OA

8
1 DC
2
4

S0-S9
8
R
D

2
8
A

HG0-HG7
. 8.5 51

58079 ()
.

,
IRQ,
51. ,
, ( 16 ).

85


: (0=0) (0=1).
0=1 51 ,
51 . 0=0 .
(),

.
( WR
RD) .
1.0 / (/). IRQ
. CLK
ALE (2 12 ).
. , ,
.
, , . , , , ,
. BD . .

:
0

000DDKKS

001

2 010IXAAA

/;

3 011IAAAA

4 100IAAAA

86

DD , , S , I , ,
.
CLK
100 . , 11111.
(DD):
00 8 ;
01 16 ;
10 8 ;
11 16 .
():
00 ;
01 N- ;
10 ;
11 .
S=0 4-
, S=1 (SL0-SL3). RL0-RL7 .
2-4 .
, :
CNTL SHIFT SL2 SL1 SL0 R2 R1 R0
RL7 RL6 RL5 RL4 RL3 RL2 RL1 RL0
:
SETB
MOV
MOVX
MOV
MOVX

P1.0
A,#00000000B
@R0,A
A,#(20H+20)
@R0,A

;
; 0 (8 , ,
; , )
; 1 (
; 20)

R0 ,

51.

87


: ,

. ,
.
,

, , .
.

51 .
ORG

CCD:

WAIT:

DB
MOV
MOV
MOV
MOV
JNB
SETB
MOV
MOVX
CLR
MOVX
MOV
MOVC
MOV
SETB
MOV
MOVX
CLR
MOV
MOVX
INC
INC
DJNZ
RET

300H

;
; 0 9
3FH,6,5BH,66H,4FH,6DH,7DH,7,7FH,6FH
R1,#20H
; 51
R2,#8
;
R3,#80H
; 4
DPTR,#300H
;
P1.1,WAIT
;
P1.0
;
A,#40H
; (2)
@R0,A
;
P1.0
;
A,@R0
;
@R1,A
; 51
A,@A+DPTR
;
R4,A
; R4
P1.0
;
A,R3
; (4)
@R0,A
;
P1.0
;
A,R4
;
@R0,A
;
R1
;
R3
;
R2,WAIT
;

88

9
8-


1. ( ).
2. .
3. .
4. (,
, , ).
8-
. ,
.
.
. . .
. .
.
. . .
.
( ),
.

89

.
. EEPROM FLASH .
.


.
.
.
.

. .
( ).

, , ,
.
:
;
, ;
;
,
, , .
:
;
;

90

( ,
/, , , ,
- );
;
.

,
:
, , , ;
,

, ;
,
, .

8-
: .
, ,
,

.
:
mask-ROM. , , ;

91

,
OTPROM (One-Time Programmable ROM). , ;
, , PROM (Erasable Programmable ROM).
.
;
, ,
PROM (Electrically Erasable Programmable ROM).
. ;
FLASH FLASH
ROM. . (8, 16 32 )
( 60 ). FLASH ROM .
.
PROM FLASH .

. (FLASH , PROM .
,

.
1 , .
, 10 (
DS5000 Dallas Semiconductor).

92



, ,
. .
.
.
.
,
.
,

:
,
. ;
;

;

;

;

.

93

, . ,
.
.

. , ,
, , .
8- 16 . TH TL.
. .
fbus, , . TF ,
. MCS-51.
,
. , =216.
, (Input Capture)
(Output Compare).
(. 9.1) , . 0 1
16- TIC .
. 1 TIC. ,
, .

94

RG

+1

TL

TICL

16

K
TH

TICH

TIC

. 9.1

(. 9.2)

, 16- TC .

2
+1 TL

TH

RG
TCL

16
16

TCH

==

TC

. 9.2

95

. 1
TC. , ,
.

. 16- /,
:
;
;
- .


. .
.
.

.
/
, /
:

: , .
RS-232
RS-485;

,

96

. SPI, I2C;
.
CAN.



.
, ,
.
.
510 .
.
, .
. .
:
5 10 %, ( 23 57 ),
( 1,8 3 ).
,
:
.
89 Atmel MCS-51 Intel.
MCS-51 51
1816/51 1830/51,
, .

97

10 89
Atmel
. 10.1 89,
,
, .

64

15

891051U 1K

64

15

IV

AC

DPTR

EEPROM

1K

IS

WDT

SRAM

891051

EM I/O SP T/

SPI

FLASH

10.1

892051

2K

128

15

894051

4K

128

15

8951
89LV51

4K

128

32

8952
89LV52

8K

256

32

8955
89LV55

20K

256

32

89S53
89LS53

12K

256

32

89S8252
89LS8252

8K

256

2K

32

89S4D12

4K

256

128K

(FLASH),
, (SRM),
. FLASH 1000
. SRAM
.

98

(EEPROM). EEPROM . EEPROM


MOVX. EEPROM
, EEPROM .
. 10.1 ( ).
(External Memory, EM).
<> .
- 0, 1, 2, 3, SP, - /0, /1, /2 .
,
-.
. 10.1 I/O.
- /2, - /1.
- /.
.
(Interrupt Source, IS)
(Interrupt Vector, IV)
. 10.1 IS IV .
(SPI), (WDT) (). <+>
SPI, WDT .
SPI . -

99

. SPI .
, 1.0 1.1. (. 10.1). 3.6,
. - DPTR0 DPTR1. - DPTR.
AT89 ,
.
(Vcc) (Fosc) . 10.2.
. . 10.2
(Icc) Fosc=12 .
10.2

Vcc ()

Fosc ()

Icc ()

891051

2,76,0

024

15

20

AT89C1051U

2,76,0

024

15

20

892051

2,76,0

024

15

20

894051

2,76,0

024

15

20

8951

4,06,0

024

20

40

89LV51

2,76,0

012

20

40

8952

4,06,0

024

25

40

89LV52

2,76,0

012

25

40

AT89C55

4,06,0

033

25

40

89LV55

2,76,0

012

25

40

89S53

4,06,0

033

25

40

89LS53

2,76,0

012

25

40

89S8252

4,06,0

033

25

40

89LS8252

2,76,0

012

25

40

89S4D12

3,3 (+10%)

1215

20

10

100


AT89.
AT89C4051
MCS-51.
4 Flash .
: 1000 / .
2,7 6 .
: 0 24 .
.
128 8 RAM.
15 I/O.
16- / .
6 .
UART.
.
.
(Idle)
(Power down).
.

. 10.1 AT89C4051

AT89S51
MCS-51.

101

4 -
(ISP).
4,05,5
: 0 33 .
.
1288.
32 -.
16- -.
.

UART.
: .

.
.
.
.
.
.

. 10.2 AT89S51

102
11

1.
( )
ORG
0
MOV
A,@A+PC
CLR
C
SUBB A,#100

2.
( )
MOV
MOV
ADD
DA
XRL

B,#27H
A,#100
A,B
A
A,#5

3. DPTR ( )
ORG
MOV
MOV
MUL
MOV
MOV

0
B,SP
A,#100
AB
DPH,B
DPL,A

4. CJNE A,#100,$-5
5. SJMP $+10
6. MOV C,P
7.
(f=12 )
MOV
DJNZ

A,#64H
ACC,$

8.
MOV
MOV

IE,#9FH
IP,#0AH

9. ( ) MUL AB
f=4

103

1. .. : . : , 2003. 166 .
2. .., .., .. . .: , 1990. 224 .
3. .., .. .
: . .: , 1994. 400 .
4. ..
: 05 08
Motorola / . .. .: , 2000.
272 .

104

2. AVR

1 AVR,
.
2
3 AVR Studio .
4 ATtiny15
( 3)
5 ATmega8
( 4)
6 .

7 .
8
9 AVR
VMLAB
( 5)
10 AVR
PROTEUS VSM ..
11
....

105
106
124
132
143
166
190
193
210

214
227
230
239

105


( 1997 ) AVR ( AT90S)
Atmel Corp. . 2001 8- AVR. . :
. , , 2002
AVR- . 0,35 ,
AT90S, 0,5
.
16 , 16 MIPS ( AVR- ).


.
, Atmel (
AVR Studio, CVAVR VMLAB).
( ATmega16
) c VMLAB Proteus VSM.

106

1
AVR,

AVR Tiny Mega.
Tiny . 8-
. ,
Mega.
AVR, , ,
Atmel. .
AVR 8- .
AVR . ,
. , AVR 8-
.
RISC- 1994
. 1995 (Alf-Egil
Bogen) (Vegard Wollen)
Atmel 8- RISC-
Flash-
. Atmel Corp. . 1996
(). , AVR (Alf-Egil Bogen + Vegard
Wollen + RISC). 90S1200
19961997 , 3 1997
Atmel
.

107

AVR 1,8 6,0 . , ,


AVR .

Atmel Corp. AVR (0...70)
(-40...+85).
AVR Flash- ,
, SPI-, (. 1.1). 1000.
3WIRE IN/OUT
FLASH

SERIAL
INTERFACE

EEPROM

PROGRAM
COUNTER

UART

INSTRUCTION
REGISTER
32 GENERAL
PURPOSE
REGISTERES

RAM

WATCHDOG
TIMER

ADC

ANALOG
COMP.

ALU

I/O
PORTS

INTERRUPTS

TIMER
COUNTERS

. 1.1 AVR

AVR EEPROM. , -

108


, , , , .. EEPROM
SPI-, . 100000. EEPROM .
AVR (. 1.2). 32- 1 - (ALU)
. , AVR 32 (, , MCS-51).
ALU . ,
, ,
. 16 X, Y Z, (AVR RAM
16- . 1.2
Z).
AVR
( , ,
RC-). AVR , ( ).
. -

109

.
AVR-
.1.3. , ,
( ) RAM. RAM
( /),
.
RAM Tiny,
AVR Mega. 64.

R0($00)
0

Rjmp start
Rjmp int0
Rjmp t0
Rjmp
acomp
FLASH

FLASH

LPM

328
OUT

$60

R31($1F)

IN

$00($20)

/
/
648
$3F($5F)

(N+1)16

(N+1)16

()

EEPROM

(M+1)8

$00
M

. 1.3 AVR-

, /
, -

110

32
/ , RAM ( ). 32 ($0 $1F) . 64 ($20 $5F) /. RAM $60 ( $
).
, / . IN, OUT, SBI, CBI, SBIC,
SBIS, /, ( ).
/
, AVR. ,
$20
/. , FLASH EEPROM
, .
AVR 16- , FLASH- 16- 512
128K .
FLASH-, ,
, . , ,
.. FLASH
LPM
(. ).
EEPROM-
AVR , . , ,
.. EEPROM-
, . -

111

EEPROM- .
EEPROM / EEAR ( ), EEDR ( )
EECR ( ).
(WATCHDOG) .
RC-, 1 .
.
WATCHDOG- , . WATCHDOG-

, .
.
AVR 1
4 / 8
16 , ,
. /
:
. / , ;
(.. , );
, . . ( ) ;

112


(, , ).
(RTC) Mega. / RTC
, , ( ). . , / RTC, 32,768 .
/ AVR
/ 3 53. .
20 ( )
40 , , , .
80 ( 5 ).
AVR. 10 ,
500
. , , 2,7 750 .
. ,
, ,
.
16 /, .
-

113

, .
- ()
/ ().
. /
, ,
. 10
+/ 2 . .
,
. - . ,
, ,
. , .
-
.
. AVR RAM
. . (. ) : , -, .
/ / 64 .
:
, (
/).

114

.
/ ,
.
SREG. $3F
(. 1.1), .
.
SREG , .
.
/ IN, OUT
(. ). /,
$00 $1F, .
SBI
CBI (. ). , / SREG, . - , /.
, AVR
/ .
, ,
,
, /,
,
(
.INCLUDE) /.
/ .inc. ATMEL
AVR. /.

115

1.1 SREG

.
1. RETI
.
BST BLD
. 1,
( 3-
4-)

. N V. 1,

. 1

.
1, (7 ) 1
. 1
. 1,

. $000 , . . , (
) -

116

RJMP . ,
AVR
. , /,
,
inc-.

,
,
( PUSH POP).
, , ,
,
AVR
,
. ,
RAM ( Tiny), .
AVR . 1.2.
:
Rd: ( )
;
Rr: ;
b: (3 ), ;
s: (3 ), ;
P: (5-6 ), ;
K6; (6 ), ;
K8: (8 ), ;
k: ( ),
;
q: (6 ), ;
Rdl: R24, R26, R28, R30. ADIW SBIW;
X,Y,Z: (X=R27:R26,
Y=R29:R28, Z=R31:R30).
.

117
1.2 AVR

ADD

Rd,Rr

Rd = Rd + Rr

Z,C,N,V,H,S

ADC

Rd,Rr

Rd = Rd + Rr +
Z,C,N,V,H,S
C

SUB

Rd,Rr

Rd = Rd - Rr

Z,C,N,V,H,S

SUBI

Rd,K8

Rd = Rd - K8

Z,C,N,V,H,S

SBC

Rd,Rr

Rd = Rd - Rr - C Z,C,N,V,H,S

SBCI

Rd,K8

Rd = Rd - K8 - C Z,C,N,V,H,S

AND

Rd,Rr

Rd = Rd Rr

Z,N,V,S

ANDI

Rd,K8

Rd = Rd K8

Z,N,V,S

OR

Rd,Rr

Rd = Rd V Rr

Z,N,V,S

ORI

Rd,K8

Rd = Rd V K8

Z,N,V,S

EOR

Rd,Rr

Rd = Rd EOR Rr Z,N,V,S

COM

Rd

Rd = $FF - Rd

Z,C,N,V,S

NEG

Rd

(. )

Rd = $00 - Rd

Z,C,N,V,H,S

SBR

Rd,K8

() Rd = Rd V K8

Z,C,N,V,S

CBR

Rd,K8

() - Rd = Rd ($FF Z,C,N,V,S

K8)

INC

Rd

Rd = Rd + 1

Z,N,V,S

DEC

Rd

Rd = Rd -1

Z,N,V,S

TST

Rd

Rd = Rd Rd

Z,C,N,V,S

CLR

Rd

Rd = 0

Z,C,N,V,S

SER

Rd

None

ADIW

Rdl,K6

Rd = $FF
Rdh:Rdl =
Rdh:Rdl + K6

Z,C,N,V,S

118

SBIW

. 1.2

Rdl,K6

Rdh:Rdl =
Rdh:Rdl - K 6

MUL

Rd,Rr

R1:R0 = Rd * Rr Z,C

MULS

Rd,Rr

R1:R0 = Rd * Rr Z,C

MULSU

Rd,Rr


R1:R0 = Rd * Rr Z,C

FMUL

Rd,Rr

R1:R0 = (Rd *

Rr) << 1

Z,C

FMULS

Rd,Rr

R1:R0 = (Rd

*Rr) << 1

Z,C

FMULSU

Rd,Rr

R1:R0 = (Rd *

Rr) << 1

Z,C

Z,C,N,V,S

RJMP

PC = PC + k +1

None

IJMP

(Z)

PC = Z

None

EIJMP


(Z)

STACK = PC+1, PC(15:0)


None
= Z, PC(21:16) = EIND

JMP

PC = k

None

RCALL k

- STACK = PC+1, PC = PC
None

+k+1

3/4*

ICALL

(Z)

STACK = PC+1, PC = Z

3/4*

EICALL


(Z)

STACK = PC+1, PC(15:0)


None
= Z, PC(21:16) =EIND

4*

CALL

STACK = PC+2, PC = k

None

4/5*

RET

PC = STACK

None

4/5*

RETI

PC = STACK

4/5*

None

119

CPSE

Rd,Rr

. 1.2

, if (Rd ==Rr) PC = PC 2 or
None

1/2/3

CP

Rd,Rr

Rd -Rr

Z,C,N,V,H,S 1

CPC

Rd,Rr

Rd - Rr - C

Z,C,N,V,H,S 1

CPI

Rd,K8

Rd - K

Z,C,N,V,H,S 1

SBRC

Rr,b

- if(Rr(b)==0) PC = PC + 2

or 3

None

1/2/3

SBRS

Rr,b

- if(Rr(b)==1) PC = PC + 2

or 3

None

1/2/3

SBIC

P,b

- if(I/O(P,b)==0) PC = PC +
None

2 or 3

1/2/3

SBIS

P,b

- if(I/O(P,b)==1) PC = PC +
None

2 or 3

1/2/3

BRBC

s,k

SREG if(SREG(s)==0) PC = PC +
None

k+1

1/2

BRBS

s,k

SREG if(SREG(s)==1) PC = PC +
None

k+1

1/2

BREQ

if(Z==1) PC = PC + k + 1

None

1/2

BRNE

if(Z==0) PC = PC + k + 1

None

1/2

BRCS

if(C==1) PC = PC + k + 1

None

1/2

BRCC

if(C==0) PC = PC + k + 1

None

1/2

BRSH

if(C==0) PC = PC + k + 1

None

1/2

BRLO

if(C==1) PC = PC + k + 1

None

1/2

BRMI

if(N==1) PC = PC + k + 1 None

1/2

BRPL

if(N==0) PC = PC + k + 1 None

1/2

BRGE


( )

if(S==0) PC = PC + k + 1

None

1/2

if(S==1) PC = PC + k + 1

None

1/2

BRLT

(
)

120

BRHS

. 1.2

if(H==1) PC = PC + k + 1 None

1/2

BRHC k

if(H==0) PC = PC + k + 1 None

1/2

BRTS

if(T==1) PC = PC + k + 1

None

1/2

BRTC

if(T==0) PC = PC + k + 1

None

1/2

BRVS

if(V==1) PC = PC + k + 1 None

1/2

BRVC k

if(V==0) PC = PC + k + 1 None

1/2

BRIE

if(I==1) PC = PC + k + 1

None

1/2

BRID

if(I==0) PC = PC + k + 1

None

1/2

* , . CALL, ICALL, EICALL, RCALL, RET RETI


PC, 16
(128KB ). 128KB
.

MOV

Rd,Rr

Rd = Rr

None 1

MOVW Rd,Rr

Rd+1:Rd = Rr+1:Rr None 1

LDI

Rd,K8

Rd = K

None 1

LDS

Rd,k

Rd = (k)

None 2*

LD

Rd,X

Rd = (X)

None 2*

LD

Rd,X+ -

Rd = (X), X=X+1

None 2*

121

. 1.2

LD

Rd,-X -

X=X-1, Rd = (X)

None 2*

LD

Rd,Y

Rd = (Y)

None 2*

LD

Rd,Y+ -

Rd = (Y), Y=Y+1

None 2*

LD

Rd,-Y -

Y=Y-1, Rd = (Y)

None 2*

LDD

Rd,Y+q

Rd = (Y+q)

None 2*

LD

Rd,Z

Rd = (Z)

None 2*

LD

Rd,Z+ -

Rd = (Z), Z=Z+1

None 2*

LD

Rd,-Z -

Z=Z-1, Rd = (Z)

None 2*

LDD

Rd,Z+q

Rd = (Z+q)

None 2*

STS

k,Rr

(k) = Rr

None 2*

ST

X,Rr

(X) = Rr

None 2*

ST

X+,Rr

(X) = Rr, X=X+1

None 2*

ST

-X,Rr

- X=X-1, (X)=Rr

None 2*

ST

Y,Rr

(Y) = Rr

None 2*

ST

Y+,Rr

(Y) = Rr, Y=Y+1

None 2

ST

-Y,Rr

- Y=Y-1, (Y) = Rr

None 2

ST

Y+q,Rr

(Y+q) = Rr

None 2

ST

Z,Rr

(Z) = Rr

None 2

ST

Z+,Rr

(Z) = Rr, Z=Z+1

None 2

ST

-Z,Rr

- Z=Z-1, (Z) = Rr

None 2

ST

Z+q,Rr

(Z+q) = Rr

None 2

LPM

R0 = (Z)

None 3

LPM

Rd,Z

Rd = (Z)

None 3

LPM

Rd,Z+

Rd = (Z), Z=Z+1

None 3

ELPM

R0 = (RAMPZ:Z)

None 3

ELPM Rd,Z

Rd = (RAMPZ:Z)

None 3

122

ELPM

. 1.2

Rd,Z+

Rd = (RAMPZ:Z), Z
None 3
= Z+1

(Z) = R1:R0

None -

ESPM

(RAMPZ:Z) =
R1:R0

None -

IN

Rd,P

Rd = P

None 1

OUT

P,Rr

P = Rr

None 1

PUSH Rr

STACK = Rr

None 2

POP

Rd = STACK

None 2

SPM

Rd

* , . LD, ST, LDD, STD, LDS, STS, PUSH POP


.

Rd

LSR

Rd

ROL

Rd

ROR

Rd

ASR

Rd

BSET s
BCLR s
SBI
P,b

Rd(n+1)=Rd(n), Rd(0)=0,
Z,C,N,V,H,S 1
C=Rd(7)
Rd(n)=Rd(n+1), Rd(7)=0,

Z,C,N,V,S 1
C=Rd(0)
- Rd(0)=C, Rd(n+1)=Rd(n),
Z,C,N,V,H,S 1
C
C=Rd(7)
- Rd(7)=C, Rd(n)=Rd(n+1),
Z,C,N,V,S 1
C
C=Rd(0)
Rd(n)=Rd(n+1), n=0,...,6
Z,C,N,V,S 1
Rd(3..0) = Rd(7..4), Rd(7..4) =

None
1
Rd(3..0)

SREG(s) = 1
SREG(s)
1

SREG(s) = 0
SREG(s)
1

I/O(P,b) = 1
None
2

LSL

SWAP Rd

123

CBI

P,b

BST

None

Rr,b T T = Rr(b)

BLD

Rd,b T

Rd(b) = T

None

SEC

C =1

CLC

C=0

SEN

N=1

CLN


N=0

SEZ

Z=1

CLZ

Z=0

SEI

I = 1

CLI

I=0

SES

S=1

CLS

S=0

SEV

V=1

CLV

V = 0

SET

T=1

CLT

T=0

SEH


H=1

CLH

H=0

NOP

None

None

None

SLEEP

( )

WDR

I/O(P,b) = 0

. 1.2

124

2
.
. , , ..
.
BYTE
BYTE .
,
BYTE .
, .
( CSEG DSEG).
.
:
: .BYTE
:
.DSEG
var1: .BYTE 1
table: .BYTE tab_size
.CSEG
ldi r30,low(var1)
ldi r31,high(var1)
ld r1,Z

; 1 var1
; tab_size
; Z
; Z
; VAR1 1

CSEG
CSEG .
,
.
.
, , .
ORG
. CSEG
.

125
:
.CSEG
:
.DSEG
vartab: .BYTE 4
.CSEG
const: .DW 2
mov r1,r0

;
; 4
;
; 0x0002
;

DB FLASH EEPROM
DB
EEPROM. , DB
. DB
.
(CSEG) EEPROM
(ESEG).
, , .
(128255), ,
,
.
, ( ), , , ,
DB.
:
: .DB _
:
.CSEG
consts: .DB 0, 255, 0b01010101, -128, 0xaa
.ESEG
const2: .DB 1,2,3

126

DEF
DEF .
.
.
.
:
.DEF _ =
:
.DEF temp=R16
.DEF ior=R0
.CSEG
ldi temp,0xf0 ; 0xf0 temp (R16)
in ior,0x3f
; SREG ior (R0)
eor temp,ior ; temp ior

DEVICE ,
DEVICE , . ,
, .
, , EEPROM , . ,
,
.
:
.DEVICE AT90S1200 |AT90S2313 | AT90S2323 | AT90S2333 | AT90S2343 |
AT90S4414 | AT90S4433 | AT90S4434 | AT90S8515 | AT90S8534 |
AT90S8535 | ATtiny11 | ATtiny12 | ATtiny22 | ATmega603 | ATmega103
:
.DEVICE AT90S1200 ; AT90S1200
.CSEG
push r30
;
; AT90S1200

127

DSEG
DSEG . ,
.
BYTE . . ORG .
.
:
.DSEG
:
.DSEG
var1: .BYTE 1
table: .BYTE tab_size
.CSEG
ldi r30,low(var1)
ldi r31,high(var1)
ld r1,Z

;
; 1 var1
; tab_size .
; Z
; Z
; var1 r1

DW FLASH EEPROM
DW
EEPROM. ,
DW . DW
. (CSEG)
EEPROM (ESEG).
, , .
(3276865535), , ,
.

128
:
:
.DW expressionlist
:
.CSEG
varlist:
.DW 0, 0xffff, 0b1001110001010101, -32768, 65535
.ESEG
eevarlst: .DW 0,0xffff,10

EQU
EQU . . , , .
:
.EQU =
:
.EQU io_offset = 0x23
.EQU porta = io_offset + 2
.CSEG
;
clr r2
; r2
out porta,r2
; A

ESEG EEPROM
ESEG EEPROM. EEPROM,
.
EEPROM DB, DW .
EEPROM . ORG
EEPROM. .
:
.ESEG
:
.DSEG
var1: .BYTE 1
table: .BYTE tab_size
.ESEG
eevar1: .DW 0xffff

;
; 1 var1
; tab_size .
; 1 EEPROM

129

EXIT
EXIT, . (. INCLUDE), , INCLUDE.
, .
:
.EXIT
:
.EXIT
;

INCLUDE
INCLUDE, , ,
EXIT, ,
INCLUDE.
INCLUDE.
:
.INCLUDE "_"
:
; iodefs.asm:
.EQU sreg = 0x3f
;
.EQU sphigh = 0x3e
;
.EQU splow = 0x3d
;
; incdemo.asm
.INCLUDE iodefs.asm ;
in r0,sreg
;

LIST
LIST
. , . , NOLIST
.

130
:
.LIST
:
.NOLIST
.INCLUDE "macro.inc"
.INCLUDE "const.def"
.LIST

;
;
;
;

NOLIST
NOLIST .
, . ,
. , LIST

:
.NOLIST
:
.NOLIST
;
.INCLUDE "macro.inc" ;
.INCLUDE "const.def" ;
.LIST
;

ORG
ORG
, . SRAM
(), ,
EEPROM EEPROM.
( ),
, . EEPROM ,
32 ( 0-31 ). , EEPROM
, .

131
:
.ORG
:
.DSEG
.ORG 0x37
variable: .BYTE 1
.CSEG
.ORG 0x10
mov r0,r1

;
; SRAM 0x37
; 0x37
; 0x10
; 0x10

SET
SET .
.
EQU SET.
:
.SET =
:
.SET io_offset = 0x23
.SET porta = io_offset + 2
.CSEG
;
clr r2
; 2
out porta,r2
; A


( ): 10, 255.
( ): 0x0a, $0a,
0xff, $ff .
: 0b00001010, 0b11111111.
( ): 010, 077.

132

3 AVR Studio
AVR , - (, , ) AVR.
AVR
Studio, Atmel.
AVR Studio (IDE) AVR
(AT90S, ATmega, ATtiny) Atmel.
IDE AVR Studio :
(Atmel AVR macroassembler);
(Debugger);

(In-System Programming, ISP).
AVR Studio AVR :
(In-Circuit Emulators) Atmel.
, .
AVR Studio Project New Project. (. 3.1), (Project name)
(Location). .
AVR Simulator.
. Finish
(. 3.2),
.

133

. 3.1

. 3.2



( Add Fail Project) (.3.3).
: Fail
Open Fail, .
.

134

. 3.3

( ) Assembler . , Assembler
, .
.
, , .
.include.


.
Assembler entry file.
Build ( F7)
Project. View Output -

135

.
, , (. 3.4).

. 3.4



.

,
, .
.
(
.eseg), .eep. EEPROM
, .
, .

Build and Run, (F7+Ctrl) .
Build and Run .
, ,
.
.
AVR Studio .
3.5.

136

. 3.5 AVR Studio

Build and run ( )


.
,
(. 3.6). ,
.

, ,
, .
, . .
AVR Studio
: Step Over Step Into. , Step Over . -

137

/,
. Auto Step Multi Step. ,

(Breakpoints). Go .

.

. 3.6

AVR Studio
Debug -> Toggle Breakpoint.
, (. 3.7).

. 3.7

138

.
Debug -> Run To Cursor (Ctrl+F10). , . , , , Debug
Option, .
, , ,
, . Run To
Cursor , .
Break (Ctrl+F5).
. ,
,

( ).
Debug -> Reset (Shift+F5)
. ,
.
.
, .
View.
AVR Work space ( I/O, . 3.8), Registers (. 3.9). - , .
, . /, .

139

. 3.8

. 3.9 I/O WorkSpace

I/O WorkSpace (. 3.10).

140

. 3.10 /

. 3.11 PORTA
EEPROM, JTAG, MISC

141

.
. , , (. 3.11).

, ( )
.
,
, SREG X, Y Z
Processor I/O WorkSpace (. 3.12).

. 3.12


.
, , EEPROM
/
Memory.

142

: Data, IO, Eeprom, Program Memory.



Memory .
,
ASII- (. 3.13).

. 3.13

.

. , .
Project -> Close.
. .
AVR Studio,
, AVR :
- ;
;
;
(
sleep nop).

143

4 ATtiny15L
( 3)
. AVR Tiny
.
ATtiny15L 8- , AVR RISC . , ATtiny15L
, 1 MIPS ,

. AVR (90 ). 32 - (),
.
10
CISC (. 4.1).

. 4.1 tiny15L

144

ATtiny15L : 1 Flash- (512


16- ), 64
EEPROM, 6 I/O , 32
, 8- /,
, , , , , 4- 10- , . Idle Mode CPU, , , / .
- CPU . Power
Down , , , ,
. ,
,
ATtiny15L ,

.
, Atmel. 8- RISC CPU Flash-
ATtiny15L, , , , , .
2,7 5,5 .
1,6 .
. 8 (.
4.2). . 4.1.

145

. 4.2 tiny15L
4.1

PB0

PB1

PB2

PB3
PB4
PB5


MOSI ( )
AREF ( )
AIN0 ( )
MISO ( )
OC1A ( / 1 )
AIN1 ( )
SCK ( )
INT0 ( )
ADC1 ( )
T0 ( / 0)
ADC2 ( )
ADC3 ( )
RESET ( )
ADC0 ( )


PORTB ( ), DDRB (
), PINB ( ). . 4.2.
4.2
7

DDB5
PINB5

4
3
2
1
0
PORTB4 PORTB3 PORTB2 PORTB1 PORTB0
DDB4
DDB3
DDB2
DDB1
DDB0
PINB4
PINB3
PINB2
PINB1
PINB0

40
20 , 5 12 . 5 -

146

, (
0).
DDBn 1 n-
, 0 . ,
, 35120 Vcc. PUD (6- MCUCR) 1, . PUD 1 PORTB
( 5 ).
/ tiny15L . 4.3. (. 4. 4).
4.3 / (, )
$3F
$3B
$3A
$39
$38
$35
$34
$33
$32
$31
$30
$2F
$2E
$2D
$2C
$21
$1E
$1D
$1C
$18
$17
$16
$08

SREG
GIMSK
GIFR
TIMSK
TIFR
MCUCR
MCUSR
TCCR0
TCNT0
OSCCAL
TCCR1
TCNT1
OCR1A
OCR1B
SFIOR
WDTCR
EEAR
EEDR
EECR
PORTB
DDRB
PINB
ACSR

Status Register
General Interrupt Mask Register
General Interrupt Flag Register
Timer/Counter Interrupt Mask Register
Timer/Counter Interrupt Flag Register
MCU Control Register
MCU Status Register
Timer/Counter0 Control Register
Timer/Counter0 (8-bit)
Oscillator Calibration Register
Timer/Counter1 Control Register
Timer/Counter1 (8-bit)
Timer/Counter1 Output Compare Register A
Timer/Counter1 Output Compare Register B
Special Function I/O Register
Watchdog Timer Control Register
EEPROM Address Register
EEPROM Data Register
EEPROM Control Register
Data Register, Port B
Data Direction Register, Port B
Input Pins, Port B
Analog Comparator Control and Status Register

147
. 4.3
$07
$06
$05
$04

ADMUX
ADCSR
ADCH
ADCL

ADC Multiplexer Select Register


ADC Control and Status Register
ADC Data Register High
ADC Data Register Low

4.4 (, )
$000

RESET

$001
$002
$003
$004
$005
$006
$007
$008

INT0
I/O Pins
TIMER1, COMPA
TIMER1, OVF
TIMER0, OVF
EE_RDY
ANA_COMP
ADC

External Reset, Power-on Reset,


Brown-out Reset, and Watchdog Reset
External Interrupt Request 0
Pin Change Interrupt
Timer/Counter1 Compare Match A
Timer/Counter1 Overflow
Timer/Counter0 Overflow
EEPROM Ready
Analog Comparator
ADC Conversion Complete

ATtiny15L
/ 0 ( TCNT0) (
) .
R0 (.
4.5). .
4.5 0
CS02
0
0
0
0
1
1
1

CS01
0
0
1
1
0
0
1

CS00
0
1
0
1
0
1
0


/
( )
/8
/64
/256
/1024
0,

0,

148

/ $FF $00 TOV0 (. 4.6)


.
1 TOIE0 (. 4.7) ,
I SREG 1.
4.6 TIFR
7

6
OCF1A

2
TOV1

1
TOV0

1
TOIE0

4.7 TIMSK
7

6
OCIE1A

2
TOIE1

/ 1 . TCNT1 OCR1A OCR1B. ,


- .
1 .
/
$00 ,
OCR1B,
.
OCR1A 1 (1)
11 10 R1 (. 4.9).
CS13CS10 (.
4.10), 1 PWM1
(. 4.8).
4.8 R1
7
CTC1

6
PWM1

5
4
11 10

3
CS13

2
CS12

1
CS11

0
CS10

149

4.9 1 (1)
11 10
1 (1)
0
0
/ 1
0
1
/ 1
1
0
0 TCNT1 OCR1A,
1 TCNT1=$00
1
1
1 TCNT1
OCR1A, 0 TCNT1=$00
4.10 1

CS13

R1
CS12
CS11

CS10

16

( )

/2

/4

/8

/16

/32

/64

/128

/256

/512

/1024

OCR1B
- (. 4.11),
OCR1 -.

150
4.11 -
/

2
4
4
8
8
8
8
8
16
16
16
16
16
16


OCR1B
159
159
213
159
255
213
181
159
141
255
231
213
195
181
169

-
()
10
20
30
40
50
60
70
80
90
100
110
120
130
140
150

/ 1 1, (.
TIFR TIMSK).
ATtiny15L , , 16 RC-.
RC- 1,6 ,
25,6 .
. .
, .
WDR.
WDTCR (. 4.12). . 4.13. -

151

WDR.
4.12 WDTCR
7

4
WDTOE

3
WDE

2
WDP2

1
0
WDP1 WDP0

4.13 WDTCR

75
4
3
20

WDTOE
WDE
WDP2WDP0

- WDP2WDP0 . 4.14. 1 Power Down.


4.14
WDP2
0
0
0
0
1
1
1
1

WDP1 WDP0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1


16
32
64
128
256
512
1024
2048

AVR Tiny
. , (9 ). , RCALL, -

152

. . .
,
. . .
EPROM
EEPROM ( 64 )
/: EEAR,
EEDR EECR (. 4.15
4.16).
4.15 EECR
7

3
2
1
EERIE EEMWE EEWE

0
EERE

4.16 EECR

74
3

EERIE

EEMWE

EEWE

EERE

, 0
EEPROM.
,
EEPROM. 1, ( I SREG
1).
EEMWE
EEPROM.
4
EEPROM.
1
EEPROM, EEMWE=1
EEPROM.

153

EEPROM :
EEPROM (
EEWE);
EEDR, EEAR;
1 EEMWE;
4- EEMWE
1 EEWE.

24 . 48 . EEPROM
.
EEAR 1 EERE. EEDR,
.

, 0 1.
,
. , , .
, . .
ACSR
(. 4.174.18). ACSR 0.
AIN0
1.220.05 .

154
4.17 ACSR

7
6

ACD
ACBG

5
4
3
2
1,0

ACO
ACI
ACIE
ACIS1:ACIS0

(1 )


(1 , 0 )
( )

4.18
ACIS1
0

ACIS0
0

0
1

1
0


1 0

0 1

-
:
;

.
ADCSR (. 4.19).

155
4.19 ADCSR

7
6

ADEN
ADSC

ADFR

4
3
20

ADIF
ADIE
ADPS2:ADPS0

(1 )

(1 )

(0 )


4.20
ADRS2
0
0
0
0
1
1
1
1

ADRS1
0
0
1
1
0
0
1
1

ADRS0
0
1
0
1
0
1
0
1


1
2
4
8
16
32
64
128

50200 . . ( , ) ADC Noise Reduction.



. . ,
.
10-,
, : ADCH
ADCL. ADCL, ADCH.

156

, ADCH.
( ,
) ADMUX (. 4.214.23). ADLAR
.
1,
16- , 0 .
4.21 ADMUX

7,6
5
4,3
20

REFS1:REFS0
ADLAR

MUX2:MUX0

4.22
REFS1
0
0

REFS0
0
1



,
0,
2,56 ,
0 (AREF)
2,56 ,
0 (AREF)

4.23
MUX2
0
0
0
0

MUX 1
0
0
1
1

MUX 0
0
1
0
1

ADC0 (PB5)
ADC1 (PB2)
ADC2 (PB3)
ADC3 (PB4)


1. AVR Studio 16- - . bin16BCD5 .
, 16-

157

( 0 65535). , 5 . , , 10000,
.
1000 ..
.
. , , .
, r16 r17
$NNNN, N , ( 1 9). I/O
Register 131, Processor, I/O ATTINY15
(CPU, WATCHDOG). SREG? . . AVR ? , ?
;***** bin16BCD5
.DEVICE ATtiny15
;
.INCLUDE
"C:\Program Files\Atmel\AVR Tools\AvrAssembler\Appnotes\tn15def.inc"
; \
;*****
.def fbinL =r16
; ,
.def fbinH =r17
; ,
.def tBCD0 =r17
; BCD , 1 0
.def tBCD1 =r18
; BCD , 3 2
.def tBCD2 =r19
; BCD , 4
; fbinH tBCD0
WDR
;
ldi r20,0b00001000
;
out WDTCR,r20
;
ldi tBCD2, -1
;

158
m1:
inc
subi
sbci
brsh
subi
sbci
ldi

tBCD2
fbinL, low(10000)
fbinH, high(10000)
m1
fbinL, low(-10000)
fbinH, high(-10000)
tBCD1, -0x11

subi
subi
sbci
brsh
subi
sbci

tBCD1, -0x10
fbinL, low(1000)
fbinH, high(1000)
m2
fbinL, low(-1000)
fbinH, high(-1000)

m2:

m3:
inc
subi
sbci
brsh
subi
ldi

tBCD1
fbinL, low(100)
fbinH, high(100)
m3
fbinL, -100
tBCD0, -0x10

m4:
subi
subi
brsh
subi
add

tBCD0, -0x10
fbinL, 10
m4
fbinL, -10
tBCD0, fbinL

m5: rjmp m5

;
;


? , ?
2. AVR Studio CLOK,
- r19.
0. .
100.
r16 ( ), r17 ( ) r18 ( -

159

). ,
0, 0 . - ,
0. , AVR
,
.
CLOK.asm . . I/O AVR Studio Register 131,
I/O ATTINY15 (CPU, TIMER_COUNTER_0).
;****** CLOK
.DEVICE ATtiny15
.INCLUDE
"C:\Program Files\Atmel\AVR Tools\AvrAssembler\Appnotes\tn15def.inc"

.org

m1:

m2:
m3:

rjmp
$005
inc
cpi
breq
rjmp
clr
subi
cpi
breq
rjmp
clr
mov
add
mov
reti

RESET:
clr
clr
clr
clr
ldi

RESET
r16
r16,$0A
m1
m3
r16
r17,-$10
r17,$A0
m2
m3
r17
r18,r17
r18,r16
r19,r18

r16
r17
r18
r19
r20,0b00000001

; T0
;

; -

; 0

160
out
ldi
out
sei
m4: rjmp

TCCR0,r20
r20,0b00000010 ;
TIMSK,r20
; T0
;
m4

0?
1024 ? SREG TIFR . .DEVICE. clok.map
Project.
,
10N, N .
.
3. 1 (1)
- 50 ( PWM1). 1
( OCR1B) ( OCR1). I/O Register 131, Processor, I/O ATTINY15
(PORTB, TIMER_COUNTER_1).
;****** PWM1
.DEVICE ATtiny15
.INCLUDE
"C:\Program Files\Atmel\AVR Tools\AvrAssembler\Appnotes\tn15def.inc"

m1:

sbi
ldi

DDRB,1
r16,0b01100010

out
ldi
out
ldi
out
rjmp

TCCR1,r16
r16,0xFF
OCR1B,r16
r16,0x80
OCR1A,r16
m1

;
; 1 (
; 12.8 , 1 ,
; 0 )
; 50
; 2

161

.
1 rjmp
m1? ? TIFR?
, 20 , 4 ( ).
4.
EEPROM ( EEPROM).
1631, / (CPU, EEPROM), EEPROM (Memory 3). . ? EEPROM , .
;****** EEPROM
.DEVICE ATtiny15
.INCLUDE
"C:\Program Files\Atmel\AVR Tools\AvrAssembler\Appnotes\tn15def.inc"
.cseg
;
.def AddrReg=r20
.def Data1Reg=r21
.def Data2Reg=r22
;
rjmp RESET
reti
reti
reti
reti
reti
rjmp EEPROM_READY ; EEPROM
reti
reti
EEPROM_READY:
inc r25
reti

;
; EEPROM

162
EEWrite:
sbic
rjmp
cli
out
out
sbi
sbi
sbi
sei
cbi
ret
EERead:
sbic
rjmp
rjmp
out
sbi
in
ret
RESET:
clr
clr
clr
ldi
ldi
rcall
rcall
m1: rjmp

; EEPROM
EECR,EEWE
; , EEWE
EEWRite
;
;
EEAR,AddrReg ;
EEDR,Data1Reg ;
EECR,EEMWE
EECR,EEWE
; EEPROM
EECR,EERIE
;
; EEPROM
EECR,EERIE
;
; EEPROM
;
; EEWE 0

EECR,EEWE
EERead
EEWRite
EEAR,AddrReg ;
EECR,EERE
; EEPROM
Data2Reg,EEDR ;

r25
r21
r22
AddrReg,$18
Data1Reg,$DD
EEWrite
EERead
m1

;
;

; EEPROM
; EEPROM

, N
EEPROM 100+N, rN,
N ( 1 9).

1. ?
ATtiny15 ?
ATtiny15 ? ATtiny15 ?

163

2. ATtiny15 .
3. FLASH ATtiny15?
4. ?
5.
sbi cbi?

WORD ( ) , , , , .
ATtiny15L

ADD
Rd, Rr
Add Two Registers
ADC
Rd, Rr
Add with Carry Two Registers
SUB
Rd, Rr
Subtract Two Registers
SUBI
Rd, K
Subtract Constant from Register
SBC
Rd, Rr
Subtract with Carry Two Registers
SBCI
Rd, K
Subtract with Carry Constant from Reg.
AND
Rd, Rr
Logical AND Registers
ANDI
Rd, K
Logical AND Register and Constant
OR
Rd, Rr
Logical OR Registers
ORI
Rd, K
Logical OR Register and Constant
EOR
Rd, Rr
Exclusive OR Registers
COM
Rd
Ones Complement
NEG
Rd
Twos Complement
SBR
Rd, K
Set Bit(s) in Register
CBR
Rd, K
Clear Bit(s) in Register
INC
Rd
Increment
DEC
Rd
Decrement
TST
Rd
Test for Zero or Minus
CLR
Rd
Clear Register
SER
Rd
Set Register

164

RJMP
k
Relative Jump
RCALL
k
Relative Subroutine Call
RET
Subroutine Return
RETI
Interrupt Return
CPSE
Rd, Rr
Compare, Skip if Equal )
CP
Rd, Rr
Compare
CPC
Rd, Rr
Compare with Carry
CPI
Rd, K
Compare Register with Immediate
SBRC
Rr, b
Skip if Bit in Register Cleared
SBRS
Rr, b
Skip if Bit in Register is Set
SBIC
P, b
Skip if Bit in I/O Register Cleared )
SBIS
P, b
Skip if Bit in I/O Register is Set
BRBS
s, k
Branch if Status Flag Set
BRBC
s, k
Branch if Status Flag Cleared
BREQ
k
Branch if Equal
BRNE
k
Branch if Not Equal
BRCS
k
Branch if Carry Set
BRCC
k
Branch if Carry Cleared
BRSH
k
Branch if Same or Higher
BRLO
k
Branch if Lower
BRMI
k
Branch if Minus
BRPL
k
Branch if Plus
BRGE
k
Branch if Greater or Equal, Signed
BRLTk
Branch if Less Than Zero, Signed
BRHS
k
Branch if Half-carry Flag Set
BRHC
k
Branch if Half-carry Flag Cleared
BRTS
k
Branch if T-flag Set
BRTC
k
Branch if T-flag Cleared
BRVS
k
Branch if Overflow Flag is Set
BRVC
k
Branch if Overflow Flag is Cleared
BRIE
k
Branch if Interrupt Enabled
BRID
k
Branch if Interrupt Disabled

LD
Rd, Z
Load Register Indirect
ST
Z, Rr
Store Register Indirect
MOV
Rd, Rr
Move between Registers
LDI
Rd, K
Load Immediate
IN
Rd, P
In Port
OUT
P, Rr
Out Port
LPM
Load Program Memory

165

SBI
P, b
Set Bit in I/O Register
CBI
P, b
Clear Bit in I/O Register
LSL
Rd
Logical Shift Left
LSR
Rd
Logical Shift Right
ROL
Rd
Rotate Left through Carry
ROR
Rd
Rotate Right through Carry
ASR
Rd
Arithmetic Shift Right
SWAP
Rd
Swap Nibbles
BSET
s
Flag Set
BCLR
s
Flag Clear
BST
Rr, b
Bit Store from Register to T
BLD
Rd, b
Bit Load from T to Register
SEC
Set Carry
CLC
Clear Carry
SEN
Set Negative Flag
CLN
Clear Negative Flag
SEZ
Set Zero Flag
CLZ
Clear Zero Flag
SEI
Global Interrupt Enable
CLI
Global Interrupt Disable
SES
Set Signed Test Flag
CLS
Clear Signed Test Flag
SEV
Set Twos Complement Overflow
CLV
Clear Twos Complement Overflow
SET
Set T in SREG
CLT
Clear T in SREG
SEH
Set Half-carry Flag in SREG
CLH
Clear Half-carry Flag in SREG
NOP
No Operation
SLEEP
Sleep
WDR
Watchdog Reset

166

5 ATmega8
( 4)
. AVR Mega
.
ATmega8
8- AVR .
RISC :
o 130 , .
o 32 8- .
.
16 MIPS ( 16 )
.
2- .
:
o 8 Flash .
o 1000 /.
o .
o 512 EEPROM.
o 100000 /.
o 1 SRAM.
o ,
.
:
o 8- / , .
o 16- / .
o .
o (PWM).

167

8- - ( TQFP MLF).
o 6 10- .
o 2 8- .
o 6- - ( PDIP).
o 4 10- .
o 2 8- .
o - 2-
.
o USART.
o SPI (/).
o
.
o .
:
o
.
o RC-.
o .
o : Idle, Powersave, Power-down, Standby ADC.
I/O :
o 23 /.
o 28- PDIP, 32- TQFP
(. 5.1).
:
o 2,7 5,5 (ATmega8L).
o 4,5 5,5 (ATmega8).
:
o 0 8 (ATmega8L).
o 0 16 (ATmega8).
o

168

. 5.1 mega8
5.1 ATmega8

PB0 (ICP)
PB1 (OC1A)
PB2 (SS/OC1B)
PB3 (MOSI/OC2)
PB4 (MISO)
PB5 (SCK)
PB6 (XTAL1/TOSC1)
PB7 (XTAL2/TOSC2)
PC0 (ADC0)
PC1 (ADC1)
PC2 (ADC2)
PC3 (ADC3)
PC4 (ADC4/SDA)
PC5 (ADC5/SCL)
PC6 (RESET)

0 ( / 1)
1 ( / 1)
2 ( Slave- SPI/
/ 1)
3 ( (Master) (Slave) SPI/ / 2)
4 ( (Master) (Slave) SPI
5 ( (Master) (Slave)
SPI
6 ( / / 2)
7 ( / / 2)
0 ( )
1 ( )
2 ( )
3 ( )
4 ( / TWI)
5 ( / TWI)
6 ( )

169
. 5.1

ADC6
ADC7
PD0 (RXD)
PD1 (TXD)
PD2 (INT0)
PD3 (INT1)
PD4 (T0/XCK)
PD5 (T1)
PD6 (AIN0)
PD7 (AIN1)
AREF
AGND
AVcc
GND
Vcc



D0 ( USART)
D1 ( USART)
D2 ( )
D3 ( )
D4 ( / 0/ USART)
D5 ( / 1)
D6 ( )
D7 ( )




5.2 / (, )
0x3F (0x5F)
0x3E (0x5E)
0x3D (0x5D)
0x3B (0x5B)
0x3A (0x5A)
0x39 (0x59)
0x38 (0x58)
0x37 (0x57)
0x36 (0x56)
0x35 (0x55)
0x34 (0x54)
0x33 (0x53)
0x32 (0x52)
0x31 (0x51)
0x30 (0x50)
0x2F (0x4F)
0x2E (0x4E)
0x2D (0x4D)
0x2C (0x4C)
0x2B (0x4B)

SREG
SPH
SPL
GICR
GIFR
TIMSK
TIFR
SPMCR
TWCR
MCUCR
MCUCSR
TCCR0
TCNT0
OSCCAL
SFIOR
TCCR1A
TCCR1B
TCNT1H
TCNT1L
OCR1AH


,
,


/
/

TWI


/ 0
/ 0


/ 1
/ 1
1,
1,
1,

170
. 5.2
0x2A (0x4A)
0x29 (0x49)
0x28 (0x48)
0x27 (0x47)
0x26 (0x46)
0x25 (0x45)
0x24 (0x44)
0x23 (0x43)
0x22 (0x42)
0x21 (0x41)
0x20 (0x40)
0x1F (0x3F)
0x1E (0x3E)
0x1D (0x3D)
0x1C (0x3C)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x0E (0x2E)
0x0D (0x2D)
0x0C (0x2C)
0x0B (0x2B)
0x0A (0x2A)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)

OCR1AL
OCR1BH
OCR1BL
ICR1H
ICR1L
TCCR2
TCNT2
OCR2
ASSR
WDTCR
UBRRH
EEARH
EEARL
EEDR
EECR
PORTB
DDRB
PINB
PORTC
DDRC
PINC
PORTD
DDRD
PIND
SPDR
SPSR
SPCR
UDR
UCSRA
UCSRB
UBRRL
ACSR
ADMUX
ADCSR
ADCH
ADCL
TWDR
TWAR
TWSR
TWBR

1,
1,
1,
1,
1,
/ 2
/ 2
/ 2


USART
EEPROM,
EEPROM,
EEPROM
EEPROM






D
D
D
SPI
SPI
SPI
USART
USART
USART
USART



,
,
TWI
TWI
TWI
TWI

171
5.3 (, , )
1 0x000

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

0x001
0x002
0x003
0x004
0x005
0x006
0x007
0x008
0x009
0x00A
0x00B
0x00C
0x00D
0x00E
0x00F
0x010
0x011
0x012

RESET

External Pin, Power-on Reset,


Brown-out Reset,
Watchdog Reset
INT0
External Interrupt Request 0
INT1
External Interrupt Request 1
TIMER2 COMP Timer/Counter2 Compare Match
TIMER2 OVF
Timer/Counter2 Overflow
TIMER1 CAPT Timer/Counter1 Capture Event
TIMER1 COMPA Timer/Counter1 Compare Match A
TIMER1 COMPB Timer/Counter1 Compare Match B
TIMER1 OVF
Timer/Counter1 Overflow
TIMER0 OVF
Timer/Counter0 Overflow
SPI, STC
Serial Transfer Complete
USART, RXC
USART, Rx Complete
USART, UDRE USART Data Register Empty
USART, TXC
USART, Tx Complete
ADC
ADC Conversion Complete
EE_RDY
EEPROM Ready
ANA_COMP
Analog Comparator
TWI
Two-wire Serial Interface
SPM_RDY
Store Program Memory Ready

-
- () AVR-
-- -.
, -
SBI CBI - .
(
) /
( ).

. ,

.

172

, .
. x , n .

. , PORTB3, 3 B,
PORTxn.
- - : PORTx,
DDRx PINx. ,
, ,
. , PUD
SFIOR .
- -.
. ,
-.
: DDxn, PORTxn
PINxn. DDxn DDRx - , , PORTxn
PORTx, PINxn PINx.
DDxn DDRx -. DDxn=1, Pxn . DDxn=0, Pxn .
DDxn
PINxn.
. 5.4 .

173
5.4
DDxn PORTxn

PUD ( SFIOR)
X


(Z-)
Pxn


(Z-)
. 0
( )
. 1
( )

16- - 1
16- - 1
, .
1
- (TCNT1), (OCR1A OCR1B), a (ICR1) 16- . , . 16- , , . 16- , ,
, .
TCCR1A TCCR1 (.
5.5 . 5.6) 8- , - . (TIFR). -

174

(TIMSK).
- ,
T1.
, -. ,
- .

.
(OCR1A OCR1B),
. OC1A
OC1.

(OCF1A OCF1), .
(
) ICP
. ( ) .
5.5 TCCR1A
7

COM1A1 COM1A0

COM1B1

COM1B0

FOC1A

FOC1B

WGM11 WGM10

5.6 TCCR1B
7
ICNC1

6
ICES1

4
3
WGM13 WGM12

2
CS12

1
CS11

0
CS10

:
COM1A1, COM1A0 ;
COM1B1, COM1B0 B;

175

WGM13, WGM12, WGM11, WGM10 / 1;


FOC1A, FOC1B 1
.
;
ICNC1 . 0 ICNC1 . /
, . 1 ICNC1
(/),
ICES1, ;
ICES1 .
0 ICES1 / ICR1.
1 ICES1 / ICR1
;
CS12, CS11, CS10 .
(
).
1
16-
, ,
(. 5.7) (. 5.9). COM1A ( COM1) /
- (..
). ,
: , .

176

WGM13

WGM12

WGM11

WGM10

5.7 / 1

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1

0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1

0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1

8-bit
9-bit
10-bit

8-bit
9-bit
10-bit



0xFFFF
0x00FF
0x01FF
0x03FF
OCR1A
0x00FF
0x01FF
0x03FF
ICR1A
OCR1A
ICR1A
OCR1A
ICR1A

ICR1A
OCR1A

- 1 ,
(. 5.8).
5.8 / 1
CS12
0
0
0
0
1
1

CS11
0
0
1
1
0
0

CS10
0
1
0
1
0
1


Stop /
CK
CK / 8
CK / 64
CK / 256
CK / 1024
T1,

T1,

177

COM10

COM11

5.9

0
0
1
1

0
1
0
1

0
0

0
1

0
0

0
1


/ 1
OC1
0
1

/ 1
15 OC1,
/ OC1
OC1 ,

OC1 ,


/ 1
9 11 OC1,
/ OC1
OC1
,
OC1
,

(Normal)
. . 16- (0xFFFF) (0x0000).
- TOV1
, TCNT1 .
.
.

178

()

OCR1A ICR1.
(TCNT1), OCR1A ( 4)
ICR1 ( 12).
. . 5.2. (TCNT1) ,
OCR1A ICR1, .

. 5.2

CTC OC1A

,
(COM1A1, COM1A0 = 0b01). OC1A , .

f clk
fOC1 A
, N
2 N (1 OCR1A)
(1, 8, 32, 64, 128, 256 1024).

179

(Fast PWM)
- ()
- .
. .
, TCNT1 OCR1 OC1 ,
.
, OC1 .

, .
, - . , , (, ),
.
8, 9 10 ICR1
OCR1A, 2 (ICR1 OCR1A = 0x0003)
16 (ICR1 OCR1A = 0xFFFF).

. 5.3

180

. 5.3. ,
OCR1A ICR1. TCNT1
. , -.
TCNT1, OCR1
TCNT1. .
- (TOV1)
, .
ICR1
, . OCR1A - OC1A.
( ), OCR1A
, .. .

(Phase Correct PWM)
- ( ) -
. .
(0x0000) ,
.
- , , , ,
,

.

(8, 9 10 ),
ICR1 OCR1A.

181

2- (ICR1 OCR1A = 0x0003),


16- (ICR1 OCR1A =0xFFFF).

. 5.4.
OCR1A ICR1 . TCNT1 .
, -.
TCNTn, OCRnx. .

. 5.4

- (TOVn) , .
OCRnA
ICRn, , OCnA ICFn
,
OCRnx ( ).
.
, -

182

( ).
,
.


OCR1 .
ICR1 OCR1A. . 5.5.

. 5.5

5.5 ,
, . , OCR1 ,
.
, , , .

183

/
/ / 0, 1, 2 TIMSK (. 5.10).
- 1
TIMSK , , I
SREG. / 0, 1, 2 TIFR (.
5.11).
5.10 TIMSK
7
OCIE2

6
TOIE2

5
TICIE1

4
OCIE1A

3
OCIE1B

2
TOIE1

0
TOIE0

OCIEnx ;
TICIE1 ;
TOIEn
.
5.11 / TIFR
7
OCF2

6
TOV2

5
ICF1

4
3
OCF1A OCF1B

2
TOV1

0
TOV0

OCFnx .;
ICF1 ;
TOVn .

1. ( N=1 N=9),
-
() ( decbin_to_bin).
Workspace r16 10N+N , .

184
;****** decbin_to_bin
mov

r17,r16

andi
swap
ldi
mul
mov
andi
add

r17,0xF0
r17
r18,10
r17,r18
r17,r16
r17,0x0F
r17,r0

; -
; r16
; ()
;
;
;
; ()
;
; . r17


r17, 0b11110000
(andi), .
10. r1:r0. ..
99, , .. r0. r17, , ,
r0, .
r17.

. Disassembler.
( ,
..)
View Output.
:
1. () .
2. ( 0 99) .
3. . ,
255, .
4. .

185

5. . ,
, .
6.
R9..R10 ( 32 000).
7. () .
8. - .
9. - .
2. 8- SRAM (
max_el_mass).
,
0x60. ,
r18.
8 Z-. r31:r30. r16,
( r27:r26). r16, , r16,
r16, . , .
r18 0,
.
r16, .
;****** max_el_mass
ldi r30,low($100)
ldi r31,high($100)
ldi r18,12
ld r16,z
mov r26,r30
mov r27,r31
dec r18

; Z
;
;
; r16
; X

186
m1:

inc r30
ld r17,z
cp r16,r17

m2:
m3:

brsh m2
mov r16,r17
mov r26,r30
mov r27,r31
dec r18
brbc 1,m1
jmp m3

; Z
;
;
; ( )
;
; r16 ,
; X
;
; , m1
;

:
1. SRAM.
2. 3, 1 2. .
3. 3, 1 2. ,
255, .
4. 1 2 R0.
5. 1,
R1, R0.
6. .
7. - ( 99) .
8. 2, 1.
9. .
3. fairy, 1 .
AVRStudio
. , -

187

SREG, PORT PIN


. DDR 0xFF? rol lsl asr?
;****** fairy
.INCLUDE "C:\Program Files\Atmel\AVR
Tools\AvrAssembler\Appnotes\m8def.inc"
;

m1:

ldi
out
sec
clr
rol
out
rjmp

r16,0xFF
DDRB,r16
r16
r16
PORTB,r16
m1

Delay , r17
.
: ,
sph:spl.
:
1. ( D
, , ).
2. .
3. 1 ( ,
, , ).
4. C ,
.

188

5. 2 ( ,
, ,
).
6. D , ,
.
7. B, .
8. D
B, .
9. D ,
, .
4. ( Generator).
;****** Generator
; =2n(1+X),
; OCR1A, n
.INCLUDE "C:\Program Files\Atmel\AVR
Tools\AvrAssembler\Appnotes\m8def.inc"
ldi
r16,0x02
; 1
out
DDRB,r16
;
ldi
r16,0b01000000 ; T1,
; 1
out
TCCR1A,r16
;
ldi
r16,0b00001001 ; T1
out
TCCR1B,r16
; (n=1)
ldi
r16,99
; =99
out
OCR1AL,r16
; =200
m1: rjmp
m1

, 1 N 16 (N ).
5. PWM2.
;****** PWM2

189
.INCLUDE "C:\Program Files\Atmel\AVR
Tools\AvrAssembler\Appnotes\m8def.inc"
ldi
r16,0x02
out DDRB,r16
ldi
r16,0x7F
out OCR1AL,r16
ldi
r16,0b11000001
out TCCR1A,r16
ldi
r16,0b00000010
out TCCR1B,r16
m1:
rjmp m1

AVR Studio
.
?
OC1A?
/?

?
.
?
Input capture (ICR)? , . .
0x01FF, WGMn3:1 0b0010? 0b0110?
OCnx?

/?


( ),
,
WORD, , .

190

6
,

, ,
, . . (, 3-5% ).
, , . , ,
( )
.hex "".
( AVR , , )
FLASH-
EEPROM.

.
.
,
, , , .hex
.. , , .
, ,
.
, .
.

191


() ""
.. ,
.
, :
- , ;
- ;
- , ;
- ;
- ;
- ;
- ,
;
- ;
- !

AVR CodeVisionAVR ( CVAVR).
AVR
CodeWizardAVR ( ).

. 6.1

192

, , , , .
.prj
.c , "". , .

, ,
"Program Preview"
, ,
.
CodeVisionAVR
(Fuse Bits - ) . , .
CodeVisionAVR. . CodeVisionAVR CVAVR\Examples.
. . ,
// , /*
*/ .

AVR
CodeVisionAVR - . , , ,
, . , . , ,
!
AVR VMLAB. VMLAB -

193

- .
: Tutorial AVR_demo. VMLAB CodeVisionAVR. C:\VMLAB\AVR_demo\codevisi.prj .
, , , .
VMLAB . -
( .hex), , ,
, , . , , . .
7
: main(){}.
,
main .
.
,
ATMEL AVR
Data Sheets ()
.
( ),
. = ( ""). . =
,
, . , .

194

PORTB = PINB + 57; /* (, )


() PINB, 57
PORTB */
PORTB&=0x5; /* PORTB,
" () "
0x5
PORTB */
PORTB = 0x23; /* PORTB
0x23 */
& ""
: | "", ^ " ", ~ "
" : + - * / %.
! () (& | ^ ~ ) ,
"", ,
"", .
:
- : 1234;
- 0b: 0b101001;
- 0x: 0x5;
- 0: 0775.
:

x = x + 1;
x = x - 1;
x = x + y;
x = x - y;
x = x * y;
x = x / y;
x = x % y;
x--;
x++;

1
1
y
y
y
y

1
1

x++; ++x;
x--; --x;
x += y;
x -= y;
x *= y;
x /= y;
x %= y;
x -= 1;
x += 1;

195

, :
PORTA++; /* PORTA, 1 PORTA
PORTA */
PORTC--; /* PORTC */

-. ,
. , ,
.
, , + (
):
=4;
=7;
=++; /* , , 1 . 7, 8 */
=4;
=7;
=++; /* ,
1
. 8 8 */
:
x+y
//
x-y
//
x*y
//
x/y
/* . ,
! ..
6.23411
6.94, 6. , float double

196

,
*/
x%y
//
:
5/2
5%2
75 / 29
75 % 29

// 2
// 1
// 2
// 17

( )
, () :
x<y
// x y
x>y
//
x <= y
//
x >= y
//
x == y
//
x != y
//
: "" "1"
( " "), "" "0". , ( ) , !
:
||
// ""
&&
// ""
!
// ""
!() // ""
!() // ""
,
"" "". && ||
, "" "", .
"" 1, "" 0.

197

( CVAVR "Code Templates"


.
):
if(){}else{}; , - :
if () { /* ,
"" .. */
}
else { /* , "" ..
*/
};
} else { :
if () { /* ,
"" .. */
};
while(){}; ,
,
(, , ) :
while () { /* , "" .. .
, . while,
*/
};
while do while,
{
} :
do { /* , ,
"" ..
, , "" */
}
while ();

198

for(;;){}; :
char i; /* for. , ,
*/
for (i=5;i<20;i+=4) { /* for. i=5 . 5 , ,
i, 0 255.
i<20 . , , - "" "", .. . i+=4 . i++, .. 1 "" .
, , -
, ! .
for i=5, i+=4 i 9.
i<20 9<20 for
. ,
"". "" for . */
};

, . ,
. ,
.
for(;;) while() :
while(1);
for (;;);
/* :
, .
, ( )
*/

199

switch(){}; ,
.
switch () {
case 7:
/* , 7. switch
*/
break;
case -28:
/* , -28. switch */
break;
case 'G':
/* , , G
ASCII. switch */
break;
default:
/* , 7, -28, 'G'.
, break.
switch */
};
/* switch - */
case , . , !
default - . .
break; - , , ,
case.
goto () .
mesto_5: /* goto mesto_5 */
goto mesto_1; /* ,
mesto_1: */

200

goto mesto_5; /* ,
mesto_5: */
mesto_1: /* goto mesto_1 */
goto
. ! :
- goto, , .. I SREG,
""
.

:
1) ;
2) ;
3) ;
4) (
- , ..
{, , , );
5) - ;
6) , ;
7) main ( ).
{ "" } .
, , . ;
.
main(),
main() ,
main() , .
main(){
... ...
_1; // _1

201

; //
... ...
}
main(), . , .

( ).
, .
/* 1.
, :
- , , ;
- ;
- ;
- , .
*/
// !
// 2.
#include <mega16.h> /* ,

() mega16.h -
, ATmega16, .
, CVAVR\inc\mega16.h */
//delay functions
#include <delay.h>
/* ,
"" delay.h - .
:
delay_us(N); // N ()
delay_ms(x); // x

202

x - 0 65535
( unsigned int), , delay_ms(peremennaya)*/
// 3.
// AD7896 control signals PORTB bit allocation
#define ADC_BUSY PINB.0
#define NCONVST PORTB.1
/* , ,
ADC_BUSY
PINB.0 NCONVST PORTB.1. , , , AD7896
PB0,
ADC_BUSY - " ", PB1 ( PORTB.1)
"" - NCONVST - "
"
#define , . */

4.

, .. , .
:
[<storage modifier>] <type definition> <identifier>;
[<storage modifier>] ,
:
extern , , delay.h, ;
volatile , ,
.

203

:
volatile unsigned char x;
static , ..
.
eeprom EEPROM.
.
:
eeprom unsigned int x;
EEPROM, 1 EEPROM, 2. , EEPROM 8500 .

. .
, .. { .
, !
<type definition> - , .
:
unsigned char - 0 255 ();
unsigned int - 0 65535 ( == 2 );
unsigned long int - 0 4294967295
( == 4 ).
unsigned char char,
char .
, :
signed char imya_peremennoi;
<identifier> -
,

204

. : imya_peremennoi.

, . ,
, ,
, ( main ) .
, : moya_peremennaya , __vasha_funkziya.
, static - 0,
(, =)
.
:
unsigned char my_peremen = 34;
unsigned int big_peremen = 34034;
, .
char mas[3]={11,22,33};
0, ..
mas[0], mas[1], mas[2] 11, 22 33.
- : mas[1] = 120;
mas[1] 120.
,
.
.
,
.
char stroka[6]="Hello"; /* () 5 , 6. , 0.
'0', 48
ASCII, */

205

:
stroka[1] 101,
ASCII 'e'.
stroka[4] 111, 'o'.
stroka[5] 0, 'NUL', '\0'.
"" USART MK : printf("%s\n", stroka);
flash const , , flash- .
.
, .
:
flash int integer_constant=1234+5;
flash char char_constant=a;
flash long long_int_constant1=99L;
flash long long_int_constant2=0x10000000;
flash int integer_array1[ ]={1,2,3};
flash int integer_array2[10]={1,2};
flash char string_constant1[ ]=This is a string constant;
const char string_constant2[ ]=This is also a string constant.
// 5. -
/*
- .
: ADC_INT - " " */
interrupt [ADC_INT] void adc_isr(void)
{
PORTB=(unsigned char) ~(ADCW>>2);
/* ,

206

+ 560 B,
8 - .
127 ,
*/
delay_ms(127);
/* !
*/
//
ADCSRA|=0x40;
} //


, , main. adc_isr. interrupt[ADC_INT]. - interrupt - ,
, (, ,
, ) ADC_INT -
("") ""
- mega16.h - , ADC_INT.
:
PORTB = (unsigned char) ~(ADCW>>2);

, . ,
PORTB. ADCW ( -

207

mega16.h, CodeVisionAVR
10- , 9_0 ( 9-
0-), .. .
VMLAB 8
8 - .. 9_2.
ADCW 2 :
ADCW >> 2. 8 7_0 (LowByte - LB) ADCW.
>> n

n .
2 n.
<< n n .
2 n.
( "1") "0" , PORTB
, "1" "0" . .
~(ADCW>>2) 8
,
ADCW. , . PORTB ,
ADCW , ( = ) ( - word
- ) ADCW .
...(unsigned char) ~(ADCW>>2).
PORTB.
DDRB "1" .. _B , 8 .
:
ADCSRA|=0x40; /*
01000000 DCSRA, ..
6.
! */

208

// 6. ,
/* , .
, main .
,
.
, !*/
(void)__init_mk(void) {
/* , , */
/* void - . - void
, .
,
. */
// Port_B
DDRB=0xFF; //
PORTB=0xFF; // "1"
/* ADCSRA.
:
- ;
-
3.69 .
64 - 57.656 ;
- .
ADCSRA
1000 1110 08E */
// ADC initialization w Oscillator=3.69MHz
// ADC Clock frequency: 57.656 kHz
// ADC Interrupts: On
ADCSRA=0x8E;
/* ADC0 ( PA0)
( , -

209

1023) AREF. ,
( )
ADMUX */
// 0 ( )
ADMUX=0;
/* , . , -
. */
#asm("sei")
} // __init_mk()
:
#asm(" ").
. , :
#asm("sei") //
#asm("cli") //
#asm("nop") // 1
#asm("wdr") //

/* 7. main() - !
*/
void main(void){
/* ( )
*/
__init_mk(); /* , . ,
*/
//
ADCSRA|=0x40;
//
while(1);}

210

/* , , while,
1 - !*/
// main
.
adc_isr().
.
adc_isr()

,
while(1). 8-
PA0.
8
, CodeVisionAVR
( " "),
AVR.
- .hex ( EEPROM )
("") . AVR , . ISP.
6 , 6- ISP.

. 8.1

211

2 ,
,
, ISP AVR. "5 "
.
5 . , , 5 . ISP
.
,
CodeVisionAVR, .
CodeVisionAVR
"Project -> Configure -> After Make" "Program the chip", .
"Settings -> Programmer"
.

"Program" - - .. .hex . "" ( RESET
. 0, "1")
( ) .
, SPI.
, , ! ISP
RC- .
ATmega RC-
1 ( ).

.
1, 0.

212

: ATmega16
3 8 (
. 12 ) "System Clock". 2

. ,

KSEL 0001 SUT 10
CKOPT 1
4 : 3 8
12 22
:
KSEL 1111 SUT 10
CKOPT 1
CVAVR
. "Program Fuse Bit(s)" c !

. 8.2

213

"Program All".
ATmega16 8 , CKOPT
"0". .. :
KSEL 1111 SUT 10
CKOPT 0
"5-" ( ) CodeVision. "" , 10-15 .

. 8.3 AVR

help.
help CVAVR VMLAB
,
AVR. , .
[9], [59]
.

214

9
AVR VMLAB
( 5)
.
AVR CVAVR VMLAB.

1. C:\CVAVR
CodeVisionAVR. C:\CVAVR z1 ( 1) .
. : -> -> -> -> No
- z1
" ": z1
- "" -
- " compiler"
- MK (Chip) ATmega16
- (Clock) 4.0
- .
Project
Notes - z1.prj,
.

- .
- :
-> New -> Source ->
untitled.c
- :
-
- " ": z1.c .
z1.c
- : Project ->
Configure.

215

, "Files" "Add". "z1.c"


"". .
- :
- () - z1.c
, ..
. 1,
: ATmega16, 8- , 0 1. 4 5.5 .
4
. 8 A
.
65 .
#include <mega16.h> /*
mega16.h, */
#define PA_OUT DDRA = 0xFF
/*
PA_OUT
DDRA = 0xFF */
// ++++ ++++
void initialization(void){
PA_OUT;// PORTA
TCCR0 = 0x05;/* , 1024 XTAL1 */
}
Char per=0;
// ++++ ++++
void main (void){
initialization(); /* ..
*/
//
while (1){ //

216

PORTA=~(per++);
while (!(TIFR&0x01));
// timer0
TIFR = 0x01;
// timer0
}; //
} // main()
( )
. : -> Save All.
"Make the
project".

- z1. . :
z1.hex
- - "" ;
z1__. - z1.c ;
z1.cof
- , z1__.
z1.hex. VMLAB
.
VMLAB.
.
, AVR
: z1.asm, z1.lst, z1.vec, z1.inc. .
2. VMLAB :
Project -> Open Project File
1 C:\CVAVR\z1\ z1_vm.prj VMLAB. ,
, VMLAB ,
. .

217

; - z1_vm.prj 1.
; VMLAB
;
; "" - z1.hex.
; 0
; 255 ...
; _
.MICRO "ATmega16" ;
.TOOLCHAIN "GENERIC"
.TARGET "z1.hex" ; ""
.COFF "z1.cof"
.SOURCE "z1__.c"
.POWER VDD=5 VSS=0 ; +5
; VSS GND - ""
;
.CLOCK 4meg ; 4
;
; 1
; 8
: 560 33 40
; R1 D1_NODE PA0
; +5 . 7
;
D1 VDD D1_NODE
R1 D1_NODE PA0 560
D2 VDD D2_NODE
R2 D2_NODE PA1 560

218

D3 VDD D3_NODE
R3 D3_NODE PA2 560
D4 VDD D4_NODE
R4 D4_NODE PA3 560
D5 VDD D5_NODE
R5 D5_NODE PA4 560
D6 VDD D6_NODE
R6 D6_NODE PA5 560
D7 VDD D7_NODE
R7 D7_NODE PA6 560
D8 VDD D8_NODE
R8 D8_NODE PA7 560
; PA0 PA1 PA2
; - "Scope"
.PLOT V(PA0) V(PA1) V(PA2)
;
Project Re-Build all ...
View : SCOPE
Control
Panel , , .
Window (
) Code
.
Messages
.
Messages (Success! All ready to run). , -

219

,
.
"1"
RESET , .
Scope ,
. 2
, 50 .
ode
.
Control Panel
, .
"" .
Messages . "".
, " " - , . ""
, .
, ,
. Control Panel ?
SCOPE Code . Code , .
,
.

? , 2 . ?
SCOPE VMLAB 1 2
Cursor delta time .

220


, .
, .
, "0" RESET !
PORTA=~(per++); ?
.
3. .
.
2 .
CodeVisionAVR (VMLAB !) , . VMLAB, Re-buid
all. ! . ,
, . z1.c z1_vm.prj .
4.
LCD (- ). . 9.1 ( , ).
CodeVisionAVR, "CodeWizardAVR" -
... ATmega16
4 . LCD PORTA 16 .
-> Generate, Save and Exit,
C:\CVAVR z2 ( 2)
. , z2, z2.c, z2.prj

221

z2.cwp.
z2.c. LCD ? ,
, ?

. 9.1 LCD


lcd_init(16); // LCD 16
:
lcd_gotoxy(5,0); // 6-
lcd_putsf("Hello!"); // !
(File -> Save All) .
, VMLAB. Open
Project File z2_vm
z2_vm.prj.
Re-build all ...
, .
Control Panel , ,
. LCD

222

( LCD
). ?

; z2_vm.prj
.MICRO "ATmega16"
.TOOLCHAIN "GENERIC"
.TARGET "z2.hex"
.COFF "z2.cof"
.CLOCK 4meg
Xdisp LCD(16 2 250K) PA0 PA1 PA2 PA7 PA6 PA5 PA4 nc3 nc2 nc1 nc0

VMLAB CVAVR.
#include <mega16.h>
#include <delay.h> //
lcd_putsf("Hello!"); :
delay_ms(200);
lcd_clear(); // LCD
delay_ms(200);
lcd_gotoxy(5,1);
lcd_putsf("FINISH!");
// Place
your code here #asm("wdr") .
VMLAB. Re-build all ...
? ?
5. .
C:\CVAVR \z3
3 z3.c,
( 7).

223

// z3.c
#include <mega16.h>
#include <delay.h>
interrupt [ADC_INT] void adc_isr(void) {
PORTB=(char)~(ADCW>>2);
delay_ms(20);
ADCSRA|=0x40; }
void main(void) {
PORTB=0xFF;
DDRB=0xFF;
ADCSRA=0x8E;
asm("sei")
ADMUX=0;
ADCSRA|=0x40;
while (1); }

Z3_vm.prj.
; Z3_vm.prj
.MICRO "ATmega16"
.TOOLCHAIN "GENERIC"
.TARGET "z3.hex" ;
.COFF "z3.cof" ;
; [.hex] [__.c]
.SOURCE "z3__.c" ; ,
[.cof].
; CodeVision '__'
.TRACE ;
; SCOPE - (. HELP )
.CLOCK 4meg ;
; ,
;"" : RESET, AREF, PA0-PA7, PB0-PB7,
PC0-PC7, PD0-PD7, ACO, TIM1OVF

224

;
AREF - 5 . VMLAB
; . 1 .
R1 VDD AREF 1 ; R1
; VDD AREF 1
; Vref 5 ; 5
; : 1111111111 ( 10- )
; 0 ( PA0 )
;
; (Slider 1 "Control Panel") ; .
V1 PA0 VSS SLIDER_1(0 5)
; 0 5
; 8 ; B
D1 VDD PB0
D2 VDD PB1
D3 VDD PB2
D4 VDD PB3
D5 VDD PB4
D6 VDD PB5
D7 VDD PB6
D8 VDD PB7
;
; -
; 430-910
; !
.PLOT V(PA0) ; ( "SCOPE")
;

225

, , . ? Peripherals S1.
ADCH
ADCL.
. ?

- ?
6. ,
z4 ( 4). ATmega16.
SCOPE ( ) ,
- vmlab.prj.
TXD (PD1) USART,
COM RS232 TTY Control Panel. (PWM) , PD5. SCOPE
,
. PD4
.
vmlab.prj PD5 () - ,
SCOPE ( DAC).
8N1 (
).
"-" . "0" TXD USART
+5...+15 COM . TXD
8 , . . "-" . "1" TXD
USART -5...-15 COM .
MAX232.

226

7. , . , .
#include <mega16.h>
#include <delay.h>
void main(void){
DDRB=0xFF;
#asm ("ldi r20,1")
while(1){
delay_ms(10);
#asm ("lsl r20")
#asm ("out 0x18,r20")
if (PORTB==0){
PORTB++;
#asm ("ldi r20,1")};
};}

AVR.
AVR
?
: 245/37 245%37.

AVR ?
PORTA=~(per++);
mnogo,
.

ADCSRA|=0x40;


, ,
WORD, SCOPE , Control Panel
.. , .

227

10
AVR PROTEUS VSM
Proteus VSM -
. : PIC, 8051, AVR, HC11
. PROTEUS
: 6000
. PROTEUS VSM
,
.
PROTEUS VSM
CodeVisionAVR.
Proteus VSM .
,
.
, , , , ,
, Proteus VSM .
Proteus VSM :
ISIS ARES. ARES .
ISIS,
ARES .

(.10.1). . ,
. (- --).
. 10.1
ATmega16
DALLAS SEMICONDUCTOR
LCD-. DS18S20 9- . DS18S20
1- ,
( ) -

228

. -55C +125C 0.5C -10C +85C.


DS18S20
( +100.0 -32.0 ).
.hex,
CVAVR.

10.1

C Proteus .
( 1-Wire) 10.2 10.3
. (.1 - , .0 , - ).
.

229

10.2

10.3

230

11
. . (, 51.7), .. . 20 99 .
1 .

10 .
.
f = 1/T. , . .
. ,
.
.
50 T 20000 . 16- , 1 ,
65 , 17 . 99 10101 , .. (
0,01%).
6
f 10 1000000 .

231

f 10 T 5 10

f
. , =20500

108
4878
T

108

5 4883 . T

48.8 .
ATmega16 8
( 1/8 ).
.9. .
(, - ).
,
, INT0 (
PD). /
1 ,
INT0:
1
(TCNT1L+TCNT1H*256)
1
1


, 10
.

232

ATmega16
MOSI
MISO
SCK
RESET
GND

PB5
PB6
PB7
RESET
GND
AGND
XTAL1
XTAL2
INT0

PD2

SMC

DV 16210
PA0
PA1
PA2
PA4
PA5
PA6
PA7
Vcc
AREF
AVcc

+5

RS LCD VDD
RW
E

D4
D5
D6
D7
VSS
+5B

11.1


( z10):
1. :
FileNewSelect Project
2. CodeWizardAVR:
Use the CodeWizard?Yes
3. CodeWizardAVR
:
ChipChip: ATmega16Clock: 8MHz
4. LCD-: LCDPORTA16
5. Timer1: TimersTimer1
Clock Value: 1000kHzInterrupt off: Timer1 OverflowVal:
0xFFFF
6. : External IRQINT0 EnabledRising Edge
7. C source, C project CodeWizardAVR
project :
File|Generate, Save and Exit
Create new directory: C:\cvavr\z10

233

Save: z10.cSave: z10.prj Save: z10.cwp


8. C source (
)
9. ProjectConfigureAfter MakeProgram the Chip
10. :
ProjectMake
11. ATmega16 STK500:
Apply powerInformationProgram.
. LCD-
void putchar(char
c). .
/*****************************************************
This program was produced by the
CodeWizardAVR V1.25.7 beta 5 Standard
Automatic Program Generator
Copyright 1998-2007 Pavel Haiduc, HP InfoTech s.r.l.
http://www.hpinfotech.com
Project :
Version :
Date
:
Author :
Company :
Comments:


17 99
10.11.2008
..

Chip type
: ATmega16
Program type
: Application
Clock frequency
: 1,000000 MHz
Memory model
: Small
External SRAM size : 0
Data Stack size
: 256
*****************************************************/

#include <mega16.h>
// Alphanumeric LCD Module functions

#asm
.equ __lcd_port=0x1B ;PORTA
#endasm
#include <lcd.h>

234
#include <stdio.h>
flash char Decode2Rus[255-192+1]= {
0x41,0xA0,0x42,0xA1,0xE0,0x45,0xA3,0xA4,
0xA5,0xA6,0x4B,0xA7,0x4D,0x48,0x4F,0xA8,
0x50,0x43,0x54,0xA9,0xAA,0x58,0xE1,0xAB,
0xAC,0xE2,0xAD,0xAE,0xAD,0xAF,0xB0,0xB1,
0x61,0xB2,0xB3,0xB4,0xE3,0x65,0xB6,0xB7,
0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0x6F,0xBE,
0x70,0x63,0xBF,0x79,0xE4,0x78,0xE5,0xC0,
0xC1,0xE6,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7
};
#define _ALTERNATE_PUTCHAR_
void putchar(char c)
{
if(c>=192) lcd_putchar(Decode2Rus[c-192]); else
lcd_putchar(c);
}
// Declare your global variables here

unsigned int period=20000;


unsigned int f=500;
char lcd_buffer[33];// LCD-
// External Interrupt 0 service routine

interrupt [EXT_INT0] void ext_int0_isr(void)


{
// Place your code here

TCCR1B=0; //
period=TCNT1L+256*TCNT1H;//
TCNT1H=0;//
TCNT1L=0;
TCCR1B=0x02;//
f=(100000000/period+5)/10;//
sprintf(lcd_buffer," power circuit frequency
%u.%uHz",f/10,f%10);// LCD-
lcd_gotoxy(1,0);// 1
lcd_puts(lcd_buffer);
}

235
void main(void)
{
// Declare your local variables here
//
//
//
//
//
//
//
//
//
//
//
//

Timer/Counter 1 initialization
Clock source: System Clock
Clock value: 1000,000 kHz
Mode: Normal top=FFFFh
OC1A output: Discon.
OC1B output: Discon.
Noise Canceler: Off
Input Capture on Falling Edge
Timer 1 Overflow Interrupt: Off
Input Capture Interrupt: Off
Compare A Match Interrupt: Off
Compare B Match Interrupt: Off

TCCR1A=0x00;
TCCR1B=0x02;
TCNT1H=0x00;
TCNT1L=0x00;
ICR1H=0x00;
ICR1L=0x00;
OCR1AH=0x00;
OCR1AL=0x00;
OCR1BH=0x00;
OCR1BL=0x00;
//
//
//
//
//

External Interrupt(s) initialization


INT0: On
INT0 Mode: Falling Edge
INT1: Off
INT2: Off

GICR|=0x40;
MCUCR=0x02;
MCUCSR=0x00;
GIFR=0x40;
// LCD module initialization

lcd_init(16);
// Global enable interrupts

#asm("sei")
while (1)
{
// Place your code here

};}

236

VMLAB
. INT0 ,
. LCD ( 16 ).
; z10_vm.prj
.MICRO "ATmega16"
.TOOLCHAIN "GENERIC"
.TARGET "z.hex"
.COFF "z.cof"
.SOURCE "z__.c"
.CLOCK 8meg
.POWER VDD = 5 VSS = 0
;V[inst_name] node VSS PULSE(v_initial v_final t_delay t_rise
;t_fall t_width ;t_period)
V1 PD2 VSS PULSE(0 5 0 0 0 5m 21m)
;X[inst_name] LCD(chars lines oscil_freq) RS RW E D7 D6 D5 D4 D3 D2 D1D0
Xdisp LCD(16 2 250K) PA0 PA1 PA2 PA7 PA6 PA5 PA4 nc3 nc2 nc1 nc0

,
. : Peripherals (
, 1), I/O Ports
( /,
PD2), Control Panel ( ).
Z10.hex, , ,
(
47.6 ).

237

11.2 VMLAB

Code ( )
, ( ),
Messages . 3,81 ,
. .
Program Memory

.
, .

238


PROTEUS VSM
INT0
, ( 5 ). ,
17-120 LCD-. LCD-.

11.3 Proteus VSM

Z10.hex, , ,
(power circuit
frequency 49.0 Hz).

239

1. .. : . - : , 2003. - 166 .
2. ..
Atmel Corp. // . - 2002. - 5. - . 6973.
3. .. - // . - 1999.
4. .. 89
Atmel // . - 2000.
5. .. VR
Atmel. - .: , 2002.
6. ..
AVR // . - 1999.
7. www.atmel.com.
8. .. AVR Tiny
Mega ATMEL. - .: -I,
2005. -560 .
9. http://avr123.nm.ru. .
AVR. " ".

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