Toshiba Satellite A135-S2686 Compal LA-3391P Laptop Schematics

A
IAYAA
LA-3391P REV 0.3 Schematic

3
UFC-PGA Yonah/ RC410MD(ME)/ SB450

2006-10-05 Rev. 0.3
Deciphered Date
2007/05/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Compal Electronics, Inc.
Title
Black Diagram
Size
B
Date:
Document Number
IAYAA (LA-3391P)
Wednesday,October 11, 2006
ai
2006/05/18
Issued Date
he
x
Compal Secret Data
Security Classification
nf
@
ho
tm
ai
l.c
om
Sheet
E
of
48
Rev
0.3
IVYAA
LA-3391P FUNCTION BLOCK

Mobile Yonah
uFCPGA-478 Pin
DIAGRAM
4
Thermal Sensor
ADM1032ARM
PAGE 4,5,6
FSB
CRT Conn.
page 14
Clock Generator
ICS951413CGT
PAGE 5
CPU VID
PAGE 11
PAGE 5
533/667 MHz
FANController
PAGE 33
RTC Battery
PAGE 15
DC/DC Interface
PAGE 34
Power Buttom
LCD Conn
ATI-RC410MD/ME
page 13
PAGE 31
533/667MHz
(1.8V)
SO-DIMM x 2(DDRII)
Memory Bus
LVDS & TV-OUT Conn.

page 13
PCI-E X1
BANK 0,1,2,3
PAGE 10,11
VGA M10P Embeded

707 pin BGA
DCIN&DETECTOR
PAGE 35
BATT CONN/OTP
PAGE 36
CHARGER
PAGE 37
3V/5V/
PAGE 38
DDR_1.8V/0.9VEP
PAGE 39
1.8VCORE
PAGE 39
1.5V/PROCHOT
PAGE 40
CPU_CORE
PAGE 41
PAGE 7,8,9
PAGE 24
A-Link Express x 4
2.5GHz(1.2V)
Bandwidth 500MB
Mini Card
FOR WLAN
480MHz(5V)
USB 2.0 Port *5

0,1,2,4,6 PAGE 28
Primary SATA
3.3V,5V 1.5GHz(150MB/s)
SATA HDD0
PAGE 17
ATI-SB450
PCI BUS
33MHz (3.3V)
Primary SATA
3.3V,5V 1.5GHz(150MB/s)
SATA HDD1
PAGE 17
564 pin BGA

2
CARDBUS
VIA6311S
CB1410
PAGE 23
PAGE 21
Secondary
ATA-100 (5V)
PAGE 15,16,17,18,19
LAN
RTL8100CL
IDE ODD
PAGE 27
PAGE 20
LPC BUS 33MHz (3.3V)
CARD BUS
SOCKET
1394-Port
RJ-45
PAGE 23
PAGE 20
Embedded
Controller
AZALIA
24MHz(3.3V)
PAGE 25
ENE KB910
PAGE 22
Audio Amplifier
APA2056 PAGE 26
HD CODEC
ALC 861
PAGE 29
MDC
PAGE 27
BIOS(1M)
& I/O PORT
PAGE 30
Scan KB
PAGE 32
Compal Secret Data
2006/05/18
Issued Date
Deciphered Date
2007/05/18
A
Title

Black Diagram
Size Document Number

CustomIAYAA (LA-3391P)
Date:
Thursday, October 05, 2006
Rev
0.3
Sheet
E
of
48
Voltage Rails
SIGNAL
STATE
Power Plane
Description
S1
S3
S5
VIN
Adapter power supply (19V)
ON
ON
ON
B+
AC or battery power rail for power circuit.
ON
ON
ON
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
+CPUVID
1.2V switched power rail for CPU AGTL Bus
ON
OFF
OFF
+VGA_CORE
1.0V/1.2V switched power rail for VGA chip
ON
OFF
OFF
+1.2VS
1.2VS for PCI-Express
ON
OFF
OFF
+0.9VS
0.9V switched power rail
ON
OFF
OFF
+1.5VS
DOTHAN B
ON
OFF
OFF
+1.8VS
1.8VS switched power rail
ON
OFF
OFF
SLP_S3# SLP_S5#
Full ON
+VALW
+V
+VS
Clock
HIGH
HIGH
ON
ON
ON
ON
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
ON
OFF
OFF
OFF
S1(Power On Suspend)
Board ID Table for AD channel
+1.8VALW
1.8V always on power rail
ON
ON
ON*
+1.8V
1.8V power rail
ON
ON
OFF
Vcc
Ra
+3VALW
3.3V always on power rail
ON
ON
ON*
Board ID
+3VS
3.3V switched power rail
ON
OFF
OFF
+5VALW
5V always on power rail
ON
ON
ON*
+5VS
5V switched power rail
ON
OFF
OFF
+12VALW
12V always on power rail
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
0
1
2
3
4
5
6
7
3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
External PCI Devices

Device
IDSEL#
Card B us
AD20
REQ#/GNT#
2
Interrupts
LAN
A D22
PIRQG
1394
AD16
PIRQA
Board ID
0
1
2
3
4
5
6
7
PIRQB
EC SM Bus1 address
EC SM Bus2 address
Device
Address
Device
Address
Smart Battery
0001 011X b
ADM1032
1001 100X b
SKU ID
0
1
2
3
4
5
6
7
SB450 SM Bus address

Device
Address
Clock Generator
(ICS951413CGLFT)
1101 001Xb
DDR DIMM0
1010 0100b
DDR DIMM1
1010 0110b
PCB Revision
0.1
0.2
0.3
1.0
BTO
WIRELESS
1394
MIC
Second HDD
NB Chipset
MDC
BOM STURCTURE
WLAN@
1394@
MIC@, 45 MIC@
2H@
MD@, ME@
MDC@
3
BTN_ID
1 Buttons
SKU_ID
WW
0
1
2
3
4
5
6
7
7 Buttons
JP
Deciphered Date
2007/05/18
B
Title
Notes List
Size
B
Date:
Document Number
IAYAA (LA-3391P)
ai
2006/05/18
Issued Date
Compal Secret Data
he
x
A4
A6
nf
@
ho
tm
ai
l.c
om
Sheet
E
of
48
Rev
0.3
H_A#[3..31]
H_D#[0..63] 7
JCPU1A
+3VS
7
7
7
7
7
7
7
7
7
7,15
7
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_RESET#
H_RS#[0..2]
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H _DRDY#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#
H1
E2
G5
F1
H5
F21
G6
E4
D20
H4
B1
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
H_TRDY#
C
15 H_PWRGOOD
15 H_CPUSLP#
@ R482
2
2
1K_0402_5%
1
1
R484
51_0402_5%
H_THERMDA, H_THERMDC routing together.

Trace width / Spacing = 10 / 10 mil
PROCHOT#
C20
E1
B5
E5
D24
AC2
AC1
D21
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#
H_PWRGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#
D6
D7
AC5
AA6
AB3
C26
D25
AB5
AB6
PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#
H_THERMDA
H_THERMDC
A24
A25
C7
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
MISC
H23
M24
W24
AD23
G22
N25
Y25
AE24
Q53
2SC2411K_SC59
1
2
R466
56_0402_5%
+1.05VS
THERMAL
DIODE
STPCLK#
SMI#
D5
A3
H_STPCLK#
H_SMI#
LEGACY CPU
THERMDA
THERMDC
THERMTRIP#
THERM#
GND
SCLK
29 EC_SMB_DA2
SDATA
ADM1032ARM_RM8
H_THERMTRIP#
+3VALW
H_DPRSTP# 2
R471
1
R469
75_0402_5%
R467
330_0402_5%
R468
470_0402_5%
R470
@ 56_0402_5%
1
0_0402_5%
H_PROCHOT# 16
Q54
MMBT3904_SOT23
@
Q55
MMBT3904_SOT23
1
R472
2
470_0402_5%
DPRSLPVR 15,41
PROCHOT#
+1.05VS
7
7
7
7
H_DSTBP#[0..3] 7
H_A20M# 15
H_FERR# 15
H_IGNNE# 15
H_INIT# 15
H_INTR
15
H_NMI
15
H_STPCLK# 15
H_SMI#
15
FOX_PZ47903-2741-42_YONAH
2@ 180P_0402_50V8J
H_INIT#
R480 1
2 @ 390_0402_5%
C667 1
2@ 180P_0402_50V8J
H_A20M#
R481 1
2 @ 390_0402_5%
C668 1
2@ 180P_0402_50V8J
H_CPUSLP#
R485 1
2 200_0402_5%
C669 1
2@ 180P_0402_50V8J
H_INTR
R486 1
2 @ 390_0402_5%
C670 1
2@ 180P_0402_50V8J
H_NMI
R487 1
C671 1
2@ 180P_0402_50V8J
H_SMI#
R489 1
C672 1
2@ 180P_0402_50V8J
H_STPCLK#
R491 1
C673 1
2@ 180P_0402_50V8J
H_IGNNE#
R492 1
2 @ 390_0402_5%
C674 1
2@ 180P_0402_50V8J
H_PWRGOOD
R493 2
C675 1
2@ 180P_0402_50V8J
H_FERR#
R494 2
1 56_0402_5%
H_DPSLP#
R495 1
2 200_0402_5%
1 @ 56_0402_5%
R474 2
1 @ 54.9_0402_1%
ITP_TMS
R475 2
54.9_0402_1%
ITP_TDI
R476 2
54.9_0402_1%
ITP_TDO
R477 2
1 @ 54.9_0402_1%
H_BR0#
R478 1
2 200_0402_5%
H_IERR#
R479 2
2006/05/18
ITP_DBRESET#
R483
150_0402_5%
2 @ 390_0402_5%
ITP_TRST#
R488
680_0402_5%
2 @ 390_0402_5%
ITP_TCK
R490 2
54.9_0402_1%
390_0402_5%
200_0402_5%
2007/05/18
Deciphered Date
2
56_0402_5%
+3VALW
Compal Secret Data
R473 2
H_RESET#
+1.05VS
C666 1
For B-0 stepping engineering samples (ES) of Celeron M

processor need to pop this 51 ohm resistor.
Issued Date
H_DPRSTP#
H_DSTBN#[0..3] 7
H_THERMTRIP#
ALERT#
+1.05VS
VDD1
D-
29 EC_SMB_CK2
Place Caps Close to CPU Socket

H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI
D+
H_THERMDC 3
+1.05VS
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
A6
A5
C4
B3
C6
B4
THERM# PU to +3VS
No reserve longer
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1
U26
H_THERMDA 2
J26
M26
V23
AC20
RS0#
RS1#
RS2#
TRDY#
DINV0#
DINV1#
DINV2#
DINV3#
CONTROL
BPM0#
BPM1#
BPM2#
BPM3#
ITP_DBRESET#
H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#
H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#
ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#
HOST CLK
AD4
AD3
AD1
AC4
7
15
41
7
F3
F4
G3
G2
BCLK0
BCLK1
A22
A21
2200P_0402_50V7K
C663
0.1U_0402_16V4Z
CLK_BCLK
CLK_BCLK#
C664
C
2
B
ADSTB0#
ADSTB1#
L2
V4
MAINPWON 16,35,36,38
H_ADSTB#0
H_ADSTB#1
47K_0402_5%
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
DATA GROUP
1
R464
PU to 1.05V,
No reserve
longer
CLK_BCLK
CLK_BCLK#
K3
H2
K2
J3
L5
ADDR GROUP
+CPU_CORE
12
12
H_ADSTB#0
H_ADSTB#1
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
YONAH
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
7
7
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
7 H_REQ#[0..4]
J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
Title

Yonah(1/2)-GTLITP

Date:
Sheet
1
R ev
0.3
4
of
48
Length match within 25 mils

Layout close CPU
VCCSENSE
VSSSENSE
R496 1
R497 1
+CPU_CORE
2 100_0402_1%
2 100_0402_1%
AF7
AE7
VCCSENSE
VSSSENSE
B26
VCCA
K6
J6
M6
N6
T6
R6
K21
J21
M21
N21
T21
R21
V21
W21
V6
G21
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
PSI#
AE6
PSI#
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
AD6
AF5
AE5
AF4
AE3
AF2
AE2
VID0
VID1
VID2
VID3
VID4
VID5
VID6
20mils
D
+1.5VS
C676
C677
0.01U_0402_16V7K
+1.05VS
1
+1.05VS
1
10U_0805_10V4Z
R_A
R498
1K_0402_1%
+GTL_REF0
R_B
R499
2K_0402_1%
41
Layout close CPU PIN AD26

0.5 inch (max)
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
AD26
+GTL_REF0
12
8,12
12
R500
R501
R502
R503
1
1
1
1
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
27.4_0402_1%
54.9_0402_1%
27.4_0402_1%
54.9_0402_1%
2
2
2
2
B22
B23
C21
BSEL0
BSEL1
BSEL2
COMP0
COMP1
COMP2
COMP3
R26
U26
U1
V1
COMP0
COMP1
COMP2
COMP3
+CPU_CORE
TRACE CLOSELY CPU < 0.5'
COMP0, COMP2 layout : Width 25mils and Space 25mils

COMP1, COMP3 layout : Space 25mils
CPU_BSEL
CPU_BSEL0
CPU_BSEL1
133
166
GTLREF
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
CPU_BSEL2
E7
AB20
AA20
AF20
AE20
AB18
AB17
AA18
AA17
AD18
AD17
AC18
AC17
AF18
AF17
D2
F6
D3
C1
AF1
D22
C23
C24
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
T22
B25
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
YONAH
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
AE18
AE17
AB15
AA15
AD15
AC15
AF15
AE15
AB14
AA13
AD14
AC13
AF14
AE13
AB12
AA12
AD12
AC12
AF12
AE12
AB10
AB9
AA10
AA9
AD10
AD9
AC10
AC9
AF10
AF9
AE10
AE9
AB7
AA7
AD7
AC7
B20
A20
F20
E20
B18
B17
A18
A17
D18
D17
C18
C17
F18
F17
E18
E17
B15
A15
D15
C15
F15
E15
B14
A13
D14
C13
F14
E13
B12
A12
D12
C12
F12
E12
B10
B9
A10
A9
D10
D9
C10
C9
F10
F9
E10
E9
B7
A7
F7
AB26
AA25
AD25
AE26
AB23
AC24
AF24
AE23
AA22
AD22
AC21
AF21
AB19
AA19
AD19
AC19
AF19
AE19
AB16
AA16
AD16
AC16
AF16
AE16
AB13
AA14
AD13
AC14
AF13
AE14
AB11
AA11
AD11
AC11
AF11
AE11
AB8
AA8
AD8
AC8
AF8
AE8
AA5
AD5
AC6
AF6
AB4
AC3
AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
YONAH
POWER, GROUND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21
Compal Secret Data
Issued Date
2006/05/18
Deciphered Date
2007/05/18
5
Title

Yonah(2/2)-PWR/GND

Date:
ai
nf
@
ho
tm
ai
l.c
he
x
PSI#
41
41
41
41
41
41
41
JCPU1C
JCPU1B
om
VCCSENSE
VSSSENSE
POWER, GROUNG, RESERVED SIGNALS AND NC
41
41
+CPU_CORE
Sheet
1
of
48
Re v
0.3
+CPU_CORE
Place these inside

socket cavity on L8
(North side
Secondary)
1
C678
10U_0805_6.3V6M
1
C679
10U_0805_6.3V6M
1
C680
10U_0805_6.3V6M
1
C681
10U_0805_6.3V6M
1
C682
10U_0805_6.3V6M
1
C683
10U_0805_6.3V6M
1
C684
10U_0805_6.3V6M
1
C685
10U_0805_6.3V6M
1
C686
10U_0805_6.3V6M
C687
10U_0805_6.3V6M
+CPU_CORE
Place these inside 1

socket cavity on L8
(Sorth side
Secondary)
2
1
C688
10U_0805_6.3V6M
1
C689
10U_0805_6.3V6M
1
C690
10U_0805_6.3V6M
1
C691
10U_0805_6.3V6M
1
C692
10U_0805_6.3V6M
1
C693
10U_0805_6.3V6M
1
C694
10U_0805_6.3V6M
1
C695
10U_0805_6.3V6M
1
C696
10U_0805_6.3V6M
C697
10U_0805_6.3V6M
+CPU_CORE

socket cavity on L8
(North side
Primary)
2
1
C698
10U_0805_6.3V6M
1
C699
10U_0805_6.3V6M
1
C700
10U_0805_6.3V6M
1
C701
10U_0805_6.3V6M
1
C702
10U_0805_6.3V6M
C703
10U_0805_6.3V6M
+CPU_CORE

socket cavity on L8
(Sorth side
Primary)
2
1
C704
10U_0805_6.3V6M
1
C705
10U_0805_6.3V6M
1
C706
10U_0805_6.3V6M
1
C707
10U_0805_6.3V6M
22uF 0805 X5R -> 85 degree C
1
C708
10U_0805_6.3V6M
C709
10U_0805_6.3V6M
High Frequence Decoupling
+1.05VS
C716
330U_D2E_2.5VM_R9
Near VCORE regulator.

South Side Secondary
North Side Secondary
+CPU_CORE
9mOhm
7343
PS CAP
9mOhm
7343
PS CAP
+
2
1
+
C713
1
C714
+
2
1
C717
0.1U_0402_10V7K
1
C718
0.1U_0402_10V7K
1
C719
0.1U_0402_10V7K
1
C720
0.1U_0402_10V7K
1
C721
0.1U_0402_10V7K
C722
0.1U_0402_10V7K
Place these inside

socket cavity on L8
(North side
Secondary)
+
2
9mOhm 9mOhm
7343
7343
PS CAP PS CAP
9mOhm
7343
PS CAP
9mOhm
7343
PS CAP
ESR <= 1.5m ohm

Capacitor > 1980uF
5
1
C715
330U_D_2VM
1
C712
330U_D_2VM
330U_D_2VM
C711
330U_D_2VM
330U_D_2VM
330U_D_2VM
1
C710
Compal Secret Data
Issued Date
2006/05/18
Deciphered Date
2007/05/18
4
Title
Size
B
Date:
Yonah Bypass
Document Number
IAYAA (LA-3391P)
Rev
0.3
Sheet
1
of
48
H_D#[0..63] 4
H_DINV#[0..3] 4
H_DSTBN#[0..3] 4
H_DSTBP#[0..3] 4
H_A#[3..31]
H_REQ#[0..4]
H_RS#[0..2]
H_LOCK#
E27
CPU_LOCK#
4,15
H_RESET#
4
4
4
F22
D26
E24
H_TRDY#
H_HIT#
H_HITM#
CPU_CPURSET#
CPU_RS2#
CPU_RS1#
CPU_RS0#
CPU_TRDY#
CPU_HIT#
CPU_HITM#
E16 H_D#48
D16 H_D#49
C14 H_D#50
B14 H_D#51
E15 H_D#52
D15 H_D#53
C13 H_D#54
E14 H_D#55
F13 H_D#56
B13 H_D#57
A12 H_D#58
C12 H_D#59
E12 H_D#60
D13 H_D#61
D12 H_D#62
B12 H_D#63
E13 H_DINV#3
F15 H_DSTBN#3
G15 H_DSTBP#3
+1.05VS
+CPU_VREF
1
C123
220P_0402_50V7K
H22
D25
E11
G22
Place C close
to Ball H22
CPU_VREF
RESERVED0
RESERVED1
CPU_DPWR#
216DCP4ALA12FG-RC410MD
H_BR0#
H_DPWR#
H_BR0#
H_DPWR#
GFX_TX4N
GFX_TX4P
V1
V2
P5
P6
GFX_RX5N
GFX_RX5P
GFX_TX5N
GFX_TX5P
W2
W1
R4
R5
GFX_RX6N
GFX_RX6P
GFX_TX6N
GFX_TX6P
AA2
Y2
GFX_TX7N
GFX_TX7P
AB1
AA1
GFX_TX8N
GFX_TX8P
AC2
AB2
GFX_TX9N
GFX_TX9P
AD1
AD2
GFX_TX10N
GFX_TX10P
AE2
AE1
GFX_TX11N
GFX_TX11P
AG2
AF2
GFX_TX12N
GFX_TX12P
AH1
AG1
GFX_TX13N
GFX_TX13P
AJ2
AH2
GFX_TX14N
GFX_TX14P
AJ4
AJ3
GFX_TX15N
GFX_TX15P
AJ5
AK4
GFX_CLKN
GFX_CLKP
M1
M2
T3
T4
GFX_RX7N
GFX_RX7P
U5
U6
GFX_RX8N
GFX_RX8P
V4
V5
GFX_RX9N
GFX_RX9P
W3
W4
GFX_RX10N
GFX_RX10P
Y5
Y6
GFX_RX11N
GFX_RX11P
AA4
AA5
GFX_RX12N
GFX_RX12P
AB3
AB4
GFX_RX13N
GFX_RX13P
AC5
AC6
GFX_RX14N
GFX_RX14P
AD4
AD5
GFX_RX15N
GFX_RX15P
10
10
10
10
mils
mils
mils
mils
AJ12
AK13
AG12
AH12
PCE_ISET
PCE_TXISET
PCE_NCAL
PCE_PCAL
NB_A_TXN0
2
2 0.1U_0402_10V6K NB_A_TXP0
2 0.1U_0402_10V6K NB_A_TXN1
2 0.1U_0402_10V6K NB_A_TXP1
0.1U_0402_10V6K
AJ11
AJ10
AK10
AK9
SB_TX0N
SB_TX0P
SB_TX1N
SB_TX1P
NB_A_RXN0
NB_A_RXP0
NB_A_RXN1
NB_A_RXP1
AG10
AG9
AF10
AE9
SB_RX0N
SB_RX0P
SB_RX1N
SB_RX1P
L2
K2
12 CLK_NB_ALINK#
12 CLK_NB_ALINK
GPP_TX0N/SB_TX2N
GPP_TX0P/SB_TX2P
GPP_TX1N/SB_TX3N
GPP_TX1P/SB_TX3P
GPP_TX2N
GPP_TX2P
GPP_TX3N
GPP_TX3P
GPP_RX0N/SB_RX2N
GPP_RX0P/SB_RX2P
GPP_RX1N/SB_RX3N
GPP_RX1P/SB_RX3P
GPP_RX2N
GPP_RX2P
GPP_RX3N
GPP_RX3P
SB_CLKN
SB_CLKP
AJ9
AJ8
AF6
AE6
AK6
AJ6
AF4
AE4
AG8
AF8
AG7
AG6
AJ7
AK7
AH4
AG4
PCIE_WLAN_TX_N1
PCIE_WLAN_TX_P1
PCIE_WLAN_C_RX_N1
PCIE_WLAN_C_RX_P1
PCIE_WLAN_C_RX_N1 24
PCIE_WLAN_C_RX_P1 24
SB_A_RXN[0..1]
SB_A_RXP[0..1]
SB_A_RXN[0..1] 15
SB_A_RXP[0..1] 15
NB_A_RXN[0..1]
NB_A_RXP[0..1]
NB_A_RXN[0..1] 15
NB_A_RXP[0..1] 15
PCIE_WLAN_TX_N1
C723 1
0.1U_0402_10V7K
PCIE_WLAN_C_TX_N1
PCIE_WLAN_TX_P1
C724 1
0.1U_0402_10V7K
PCIE_WLAN_C_TX_P1
PCIE_WLAN_C_TX_N1 24
PCIE_WLAN_C_TX_P1 24
To SB A-PCIE Link
+1.05VS
CPU_VREF
Trace=12Mil
Space=15Mil
R38
49.9_0402_1%
+CPU_VREF
***
1
C121
GFX_RX4N
GFX_RX4P
4
4
GFX_RX3N
GFX_RX3P
CPU_COMP_P
1
C432 1
C430 1
C429 1
C427
PCE_RXISET
PCE_TXISET
PCE_NCAL
PCE_PCAL
GFX_TX3N
GFX_TX3P
U2
T2
CPU_COMP_N
R37
100_0402_1%
HSCOMP D11
HRCOMP B11
DATA GROUP
3
2
1R30
24.9_0402_1%
2
1R234
49.9_0402_1%
MISC.
***
SB_A_RXN0
SB_A_RXP0
SB_A_RXN1
SB_A_RXP1
R29
R34
R33
R28
T1
R1
P4
N4
PCI EXPRESS I/F
CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#
CPU_DBI3#
CPU_DSTBN3#
CPU_DSTBP3#
+1.2VS
1
1
1
1
GFX_TX2N
GFX_TX2P
M4
M5
Place R
Close to Ball
10K_0402_5% 2
8.25K_0402_1% 2
82.5_0402_1% 2
150_0402_1% 2
PART 3 OF 6
DATA GROUP 0
PART 1 OF 6
DATA GROUP 1
C18 H_D#32
F19 H_D#33
E19 H_D#34
A18 H_D#35
D19 H_D#36
B18 H_D#37
C17 H_D#38
B17 H_D#39
E17 H_D#40
B16 H_D#41
C15 H_D#42
A15 H_D#43
B15 H_D#44
F16 H_D#45
G18 H_D#46
F18 H_D#47
C16 H_DINV#2
D18 H_DSTBN#2
E18 H_DSTBP#2
1U_0402_6.3V4Z
C11
H_RS#2 D23
H_RS#1 G23
H_RS#0 E26
CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#
CPU_DBI2#
CPU_DSTBN2#
CPU_DSTBP2#
GFX_RX2N
GFX_RX2P
R2
P2
om
CPU_ADS#
CPU_BNR#
CPU_BPRI#
CPU_DEFER#
CPU_DRDY#
CPU_DBSY#
L5
L6
GFX_TX1N
GFX_TX1P
l.c
F25
F24
E23
E25
G24
F23
PA_RS4X0F5
PCE_ISET=10K
PCE_XISET=8.25K
PCE_NCAL=82.5
PCE_PCAL=150
GFX_RX1N
GFX_RX1P
N2
N1
ai
H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
C19
C23
C20
C22
B22
B23
C21
B24
E21
B21
B20
G19
F21
B19
E20
D21
A21
D22
E22
L4
K4
GFX_TX0N
GFX_TX0P
Compal Secret Data
2006/05/18
Issued Date
Deciphered Date
2007/05/18
C
Title
Size
B
Date:
nf
@
ho
tm
4
4
4
4
4
4
CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#
CPU_DBI1#
CPU_DSTBN1#
CPU_DSTBP1#
GFX_RX0N
GFX_RX0P
RC410MD-FSB, PCIE,A-PCIE
Document Number
IAYAA (LA-3391P)
ai
H_ADSTB#1
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DINV#1
H_DSTBN#1
H_DSTBP#1
J4
J5
he
x
CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_ADSTB1#
H_D#0
E28
H_D#1
D28
H_D#2
D29
H_D#3
C29
H_D#4
D30
H_D#5
C30
H_D#6
B29
H_D#7
C28
H_D#8
C26
H_D#9
B25
B27 H_D#10
H_D#11
C25
A27 H_D#12
C24 H_D#13
A24 H_D#14
B26 H_D#15
C27 H_DINV#0
A28 H_DSTBN#0
B28 H_DSTBP#0
CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#
CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#
CPU_DBI0#
CPU_DSTBN0#
CPU_DSTBP0#
RC410MD PCI EXPRESS I/F
M28
K29
K30
J26
L28
L29
M30
K27
M29
K26
N28
L26
N25
L25
N24
L27
DATA GROUP 2
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
RC410MD CPU I/F
H_ADSTB#0
U21C
ADDR. GROUP
1
CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#
CPU_ADSTB0#
CONTROL
G28
H26
G27
G30
G29
G26
H28
J28
H25
K28
H29
J29
K24
K25
F29
G25
F26
F28
E29
H27
ADDR. GROUP
0
U21A
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
A-LINK EXPRESS I/F
4
4
4
Sheet
E
of
48
Rev
0.3
U21B
MEM_CK3N
MEM_CK3P
11 DDR_CLK4#
11 DDR_CLK4
AG17
AF17
MEM_CK4N
MEM_CK4P
C174
10
10,11
10
10,11
DDR_SCKE0
DDR_SCKE1
DDR_SCKE2
DDR_SCKE3
10
10
10,11
10,11
DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3
DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3
+1.8V
MEM_VMODE: 1.8V: DDR2
10mil
10mil
20mil
61.9_0603_1%
2
1
61.9_0603_1%
2
1
+1.8V
R43 2
1
1K_0402_5%
MEM_COMPP
MEM_COMPN
+DDR_VREF
R237
Place these R and C

close to relative Ball.
MEM_CK5N
MEM_CK5P
MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3
AH29
AG29
AH28
AF29
AG30
AE28
AC30
Y30
AD28
AJ14
N30
AJ15
AE29
AB27
MEM_CS#0
MEM_CS#1
MEM_CS#2
MEM_CS#3
MEM_ODT0
MEM_ODT1
MEM_ODT2/RSV2
MEM_ODT3/RSV3
MEM_VMODE
MEM_CAP1
MEM_CAP2
MEM_COMPP
MEM_COMPN
MEM_VREF
DDR_DQS#0
DDR_DQS0
AH17
AJ18
MEM_DQS0N
MEM_DQS0P
DDR_DQS#1
DDR_DQS1
AF15
AE14
MEM_DQS1N
MEM_DQS1P
DDR_DQS#2
DDR_DQS2
AE22
AF22
MEM_DQS2N
MEM_DQS2P
R242
MEM_COMPN
MEM_COMPP
W29
W28
AH20
AJ20
AE24
AE21
NB_CRT_G
E10
GREEN
14
NB_CRT_B
D10
BLUE
14 NB_CRT_HSYNC
14 NB_CRT_VSYNC
C3
B3
RSET
1
2
R232 715_0402_1%
14 NB_DDC_CLK
14 NB_DDC_DATA
B10
15mil
NB_DDC_CLK
NB_DDC_DATA
1C422
@ 15P_0402_50V8D
2
1 R218
10_0402_5%
DACHSYNC
DACVSYNC
RSET
B2
C2
DACSCL
DACSDA
G1
OSCIN
F1
OSCOUT
12 CLK_NB_14M
1
R217
12 CLK_NB_BCLK
12 CLK_NB_BCLK#
NB_EDID_CLK
NB_EDID_DATA
NB_DVI_DDCDATA
STRP_DATA
TESTMODE
13 NB_EDID_CLK
13 NB_EDID_DATA
R230
G2
2
10K_0402_5% TVCLKIN
J1 CPU_CLKP
K1 CPU_CLKN
D2
C1
H3
D1
C4
AH13
AJ13
G3
E2
F2
DDR_DQS#3
DDR_DQS3
AF26
AE25
MEM_DQS3N
MEM_DQS3P
DDR_DQS#4
DDR_DQS4
W26
W27
MEM_DQS4N
MEM_DQS4P
DDR_DQS#5
DDR_DQS5
AB30
AB29
MEM_DQS5N
MEM_DQS5P
DDR_DQS#6
DDR_DQS6
R25
P25
MEM_DQS6N
MEM_DQS6P
DDR_DQS#7
DDR_DQS7
R30
R29
MEM_DQS7N
MEM_DQS7P
BM_REQ#
R222 1
MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7
AJ17
AG15
AE20
AF25
Y27
AB28
R26
R28
BMREQ#
H2
BM_REQ#
TMDS_HPD
J2
BM_REQ# 15
+1.8V
Low: Normal Mode(Fixed)

High: Test Mode
1 R219
2
4.7K_0402_5%
+3VS
NB_EDID_CLK
R236
220K_0402_5%
D21
NB_EDID_DATA
1 R226
2
4.7K_0402_5%
SUS_STAT#
NB_DVI_DDCDATA
1 R22
2
4.7K_0402_5%
NB_SUS_STAT# 16
CH751H-40_SC76
D20
1
NB_RST#
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7
R225 2
1
4.7K_0402_5%
STRP_DATA: DEBUG STRAP

DEFAULT: 1
0: MEMORY CHANNEL STRAPING
1: E2PROM STRAPING
+3VS
NB_DDC_CLK
R11 2
1
2K_0402_5%
ENBKL
29
SN74LVC08APW_TSSOP14
***
+3VALW
SB_PWRGD# 17
LVDS_ENVDD
A
B
U5B
O
NB_PWRGD
NB_DDC_CLK: CPU VCC SEL

DEFAULT: 0 1: DESKTOP CPU 0: MOBILE CPU
Q5
0.1U_0402_16V4Z
U5A
7
STRP_DATA
CPU_BSEL1 PU to +3VS
No reserve longer
12
2
1
4.7K_0402_5%
2 2 R229
1
4.7K_0402_5%
+1.05VS
Compal Secret Data
Issued Date
2006/05/18
2007/05/18
Deciphered Date
Title
Q35
MMBT3904_SOT23
CPU_BSEL1
NB_PWRGD 17
NB_ENVDD 13
4
R227
4.7K_0402_5%
R20
NB_CRT_HSYNC
NB_RST# 15
R216
10K_0402_5%
C128
2 4.7K_0402_5%
R228 2
1
4.7K_0402_5%
2 @ 4.7K_0402_5%
2 @ 4.7K_0402_5%
LVDS_ENBKL
MMBT3904_SOT23
NB_CRT_VSYNC
NB_TXCLK- 13
NB_TXCLK+ 13
LVDS_ENBKL 1 R21
LVDS_ENVDD 1
R224
NB_RST#
SUS_STAT#
NB_PWRGD
13
13
13
13
13
13
+3VALW
BM_REQ# NB_CRT_HSYNC NB_CRT_VSYNC
NB_TXOUT0NB_TXOUT0+
NB_TXOUT1NB_TXOUT1+
NB_TXOUT2NB_TXOUT2+
NB_TXCLKNB_TXCLK+
A3
AH14
E3
SYSRESET#
SUS_STAT#
POWERGOOD
NB STRAPING PINS
0
NB_TXOUT0NB_TXOUT0+
NB_TXOUT1NB_TXOUT1+
NB_TXOUT2NB_TXOUT2+
CH751H-40_SC76
+3VS
4
LVDS_BLON
LVDS_DIGON
LVDS_BLEN
133MHZ
E5
F5
D5
C5
E6
D6
E7
E8
G6
F6
14
166MHZ
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
I2C_CLK
I2C_DATA
DDC_DATA
STRP_DATA
TESTMODE
THERMALDIODE_P
THERMALDIODE_N
FSB SPEED
LVDS
RED
14
PART 4 OF 6
F10
CRT & TV
I/F
NB_CRT_R
14
+DDR_VREF
14
11 DDR_CLK3#
11 DDR_CLK3
COMP
NB_COMPS
2
75_0402_1%
B4
A4
B5
C6
B6
A6
B7
A7
F7
F8
MEM_CK2N
MEM_CK2P
E9
1
R27
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
C172
V29
V30
AC24
AC23
D9
MEM_CK1N
MEM_CK1P
NB_CRMA
RC410MD
AF16
AE16
13
CLK. GEN.
10 DDR_CLK1#
10 DDR_CLK1
F9
MEM_CK0N
MEM_CK0P
NB_LUMA
R46
AC26
AC25
13
0.1U_0402_10V6K
1K_0402_1%
2
1
R42
10 DDR_CLK0#
10 DDR_CLK0
DDR_DQ0
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ5
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63
0.1U_0402_10V6K
1K_0402_1%
2
1
+1.8V
MEM_RAS#
MEM_CAS#
MEM_WE#
AJ16
AH16
AJ19
AH19
AH15
AK16
AH18
AK19
AF13
AF14
AE19
AF19
AE13
AG13
AF18
AE17
AF20
AF21
AG23
AF24
AG19
AG20
AG22
AF23
AD25
AG25
AE27
AD27
AE23
AD24
AE26
AD26
AA25
Y26
W24
U25
AA26
Y25
V26
W25
AC28
AC29
AA29
Y29
AD30
AD29
AA30
Y28
U27
T27
N26
M27
U26
T26
P27
P26
U29
T29
P29
N29
U28
T28
P28
N27
10,11 DDR_SRAS#
10,11 DDR_SCAS#
10,11 DDR_SWE#
AJ29
AG28
AH30
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63
1.8K_0402_5%
DATA
DDR_SMA[0..17] 10,11
PART 2 OF
6
DDR_SMA[0..17]
U21D
RC410MD MEMORY I/F
DDR_DM[0..7] 10,11
MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15
MEM_A16
MEM_A17
ADDRESS
DDR_DM[0..7]
AK27
AJ27
AH26
AJ26
AH25
AJ25
AH24
AH23
AJ24
AJ23
AH27
AH22
AJ22
AF28
AJ21
AG27
AJ28
AH21
CLK
DDR_DQS#[0..7] 10,11
DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12
DDR_SMA13
DDR_SMA14
DDR_SMA15
DDR_SMA16
DDR_SMA17
MISC
DDR_DQ[0..63] 10,11
DDR_DQS[0..7] 10,11
DDR_DQS#[0..7]
DATA
DDR_DQ[0..63]
DDR_DQS[0..7]
CPU_BSEL1 5,12
C

RC410MD-DDR/DISP/MISC

Custom
IAYAA (LA-3391P)
Date:
Sheet
E
R ev
0.3
of
48
+1.2VS
+AVDDI
AVDDQ
AVDDDI
+CPVDD
+MPVDD
H21
AB26
CPVDD
MPVDD
2.25A
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
AB8
AC10
AC9
AD10
AE11
AF11
AG11
U7
U8
Y7
Y8
C56
C68
C63
C62
C51
C45
G4
G5
J8
C7
H7
H8
H10
+VDDQ
+LPVDD
0.1U_0402_16V4Z
+AVDD
0.1U_0402_16V4Z
1
1
22U_0805_6.3V6M
1
1
C650
C985
2
C44
C29
2
CHB2012U170_0805
C84
1
1
1
C102
1
C41
1
C42
1
C78
1
C40
1
C414
1
C15
20mils
20mils
+PLLVDD
20mils
+3VS
10U_0805_10V4Z 2
10U_0805_10V4Z
C30
1
2
CHB2012U170_0805
2
CHB2012U170_0805
C37
0.1U_0402_16V4Z
PART 6 OF 6
Place L close to Ball AB26

Place C between Ball AB26,AA27
+MPVDD
L6
1
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C43
AVSSN
AVSSQ
AVSSDI
LPVSS
LVSSR
LVSSR
LVSSR
PLLVSS
CPVSS
MPVSS
C10
B9
C8
J7
G7
G8
G9
H9
H20
AA27
+1.8VS
+1.8VS
+1.8VS
+PLLVDD
L12
+1.8VS
C47
+CPVDD
C32
+LPVDD
C85
+3VS
L5
1
1U_0402_6.3V4Z
2
2
2
22U_0805_6.3V6M
C25
L37
2
@ 220U_Y_4VM
C54
C22
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
10U_0805_10V4Z
+VDDQ
ATI recommend 2.2uF

1U_0402_6.3V4Z
C70
+1.8VS
C725
C48
AA3
AA7
AA8
AB5
AB6
AC3
AD3
AD7
AD8
AE8
AF3
AF5
AF7
AF9
AG5
AH10
AH3
AH5
AH6
AH7
AH8
AH9
K5
L3
M3
N5
N6
N7
N8
P3
R3
R7
R8
T5
T6
U3
V3
V7
V8
W5
W6
Y3
C137
1
C138
2
L11
2
CHB1608U301_0603 1
C158
C114
0.1U_0402_16V4Z
2
2
1
1
C641
1U_0402_6.3V4Z
2
C175
2
CHB1608U301_0603
C60
C159
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
2
C81
1
2
CHB1608U301_0603 1
C82
C116
10U_0805_10V4Z
2
10U_0805_10V4Z
2
4
1U_0402_6.3V4Z
C289
470U_D2_2.5VM
2
Compal Secret Data
2006/05/18
Issued Date
2007/05/18
Deciphered Date
B
10U_0805_10V4Z
+1.8VS
C33
L10
om
C417
1
2
CHB1608U301_0603
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
l.c
C418
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
470U_D2_2.5VM
2
@470U_D2_2.5VM
R13
R15
R17
R19
R23
R24
R27
T12
T14
T16
T18
T30
U13
U15
U17
U19
U23
U24
V12
V14
V16
V18
V27
V28
W13
W15
W17
W19
W23
W30
ai
C61
L7
C648
+1.2VS
C23
0.1A
VDDR3
VDDR3
LPVDD
LVDDR18D
LVDDR18A
LVDDR18A
PLLVDD
+1.8VS
C66
0.75A
+AVDDI
C46
1
C134
1
C135
1
C58
1
C67
1
C31
1
C28
+1.2VS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Title

RC410MD PWR/GND

Date:
nf
@
ho
tm
AVDD
B8
D8
AB7
AC7
AC8
AD9
H4
H5
J6
K6
L7
L8
M7
M8
P7
P8
T7
T8
W7
W8
L4
1
2
CHB1608U301_0603
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
10U_0805_10V4Z
2
10U_0805_10V4Z
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Sheet
E
ai
C9
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
AB22
AB9
J22
J9
A13
A16
A19
A2
A22
A25
A29
A9
AA23
AA24
AA28
AC11
AC12
AC14
AC15
AC17
AC18
AC20
AC27
AD11
AD12
AD14
AD15
AD17
AD18
AD20
AE30
AF12
AF27
AG14
AG16
AG18
AG21
AG24
AG26
AH11
AJ1
AJ30
AK12
AK15
AK18
AK2
AK22
AK25
AK29
B1
B30
D14
D17
D20
D24
D27
D3
D4
F27
F3
F30
F4
G10
H15
H18
J23
J24
J27
J3
J30
K23
K8
M12
M14
M16
M18
M23
M24
M26
N13
N15
N17
N19
P12
P14
P16
P18
he
x
1U_0402_6.3V4Z
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
+AVDD
VDD_18
VDD_18
VDD_18
VDD_18
1U_0402_6.3V4Z
10U_0805_10V4Z
A10
F11
F12
F17
G11
G12
G13
G14
G16
G17
G20
H11
H12
H13
H14
H16
H17
H19
H23
H24
L23
L24
N23
P23
P24
2A
U21F
RC410MD GOUND
5A
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
0.1A
+1.05VS
+AVDDQ
L8
1
2
CHB1608U301_0603 1
1
C53
C57
+1.8VS
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
M13
M15
M17
M19
N12
N14
N16
N18
P13
P15
P17
P19
R12
R14
R16
R18
T13
T15
T17
T19
U12
U14
U16
U18
V13
V15
V17
V19
W12
W14
W16
W18
AB23
AB24
AC13
AC16
AC19
AC21
AC22
AD13
AD16
AD19
AD21
AD22
AD23
AK21
AK24
AK28
T23
T24
V23
V24
Y23
Y24
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
+1.8VS
3
1
C115
1
C72
1
C119
1
C93
1
C166
1
C76
1
C124
1
C152
1
C132
1
C117
1
C122
1
C139
1
C110
1
C86
1
C77
1
C130
1
C129
1
C141
1
C140
U21E
1U_0402_6.3V4Z
C79
1
C118
1
C80
1
C100
1
C131
1
C91
1
C69
1
C133
1
C150
1
C151
1
C92
1
C95
1
C99
1
C144
1
C59
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
+1.8V
+1.2VS
5A
+1.05VS
1
1
C103
1
C149
10U_0805_10V4Z
1
C107
1
C88
1
C90
1
C104
1
C73
1
C74
1
C105
1
C36
1
C55
1
C89
1
C71
1
C106
1
C49
1
C50
C87
MEM I/F PWR
+1.8V
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
CPU I/F
PWR
PART 5 OF
6
C75
RC410MD POWER
C64
CORE PWR
C65
of
R ev
0.3
48
+1.8V
Trace=20mil
+1.8V
Layout Note:
Place near JDIM1
DDR_DQ9
DDR_DQ13
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C644
C643
C642
C145
C113
+0.9VS
DDR_DQ30
DDR_DQ31
C177
C176
C147
C108
C120
C136
C83
C94
DDR_SCKE0
C156
DDR_SMA14
2
22U_0805_6.3V6M
+0.9VS
DDR_SRAS# 8,11
DDR_SCS#0 8
DDR_SCKE2 8
RP11
RP1
DDR_SCKE1
8,11 DDR_SCKE1
DDR_SMA14
DDR_SMA17
DDR_DQ37
DDR_DQ33
1
2
3
4
8
7
6
5
5
6
7
8
56_1206_8P4R_5%
RP2
DDR_DQ39
DDR_DQ34
DDR_SMA7
DDR_SMA9
DDR_SMA2
DDR_SMA5
DDR_DQ44
DDR_DQ41
1
2
3
4
8
7
6
5
5
6
7
8
56_1206_8P4R_5%
DDR_DQS#5
DDR_DQS5
DDR_DQ42
DDR_DQ47
DDR_DQ53
DDR_DQ49
1
2
3
4
8
7
6
5
DDR_DM6
DDR_DQ55
DDR_DQ51
1
2
3
4
8
7
6
5
DDR_SCKE3 1
2
R12
180_0402_5%
DDR_DQS#7
DDR_DQS7
4
3
2
1
5
6
7
8
56_1206_8P4R_5%
DDR_DQ60
DDR_DQ57
Layout Note:
Place these resistor
closely JDIM2,all
trace length<750 mil
DDR_SMA6
DDR_SMA8
DDR_SMA4
DDR_SMA3
DDR_SMA10
DDR_SMA1
DDR_SMA16
DDR_SWE#
Layout Note:
Place these resistor
closely JDIM2,all
trace length Max=1.3"
56_1206_8P4R_5%
RP14
RP4
DDR_SCS#2
DDR_SMA13
DDR_SCS#1
8,11 DDR_SCS#2
4
3
2
1
5
6
7
8
56_1206_8P4R_5%
DDR_CLK0 8
DDR_CLK0# 8
DDR_SCKE0
DDR_SMA11
DDR_SMA12
56_1206_8P4R_5%
RP13
RP3
DDR_SMA15
DDR_SMA0
DDR_SRAS#
DDR_SCAS#
4
3
2
1
56_1206_8P4R_5%
RP12
DDR_DM4
DDR_CLK0
DDR_CLK0#
22U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_SCKE2
DDR_SMA13
0.1U_0402_16V4Z
DDR_SMA16
DDR_SRAS#
DDR_SCS#0
0.1U_0402_16V4Z
DDR_SMA4
DDR_SMA2
DDR_SMA0
0.1U_0402_16V4Z
DDR_SMA11
DDR_SMA7
DDR_SMA6
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_DQS#3
DDR_DQS3
4
3
2
1
DDR_SCS#0
DDR_SCKE2
DDR_SCKE3
DDR_SCS#3
DDR_SCKE3 8,11
DDR_SCS#3 8,11
56_1206_8P4R_5%
R17
Layout Note:
Place R12, R17 betweem
JP15 and RP14
DDR_SCKE2
180_0402_5%
DDR_DQ63
DDR_DQ59
4
+3VS
P-TWO_A5692B-A0G16-P
C185
2.2U_0805_10V6K
0.1U_0402_16V4Z
C187
DDR_DQ29
DDR_DQ24
0.1U_0402_16V4Z
+3VS
DDR_DQ22
DDR_DQ18
C161
11,12,16,24 SB_SMDATA
11,12,16,24 SB_SMCLK
0.1U_0402_16V4Z
C96
DDR_DQ62
DDR_DQ58
0.1U_0402_16V4Z
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to V_DDR_MCH_REF
DDR_DM2
0.1U_0402_16V4Z
DDR_DM7
C436
DDR_DQ56
DDR_DQ61
C18
DDR_DQ17
DDR_DQ21
0.1U_0402_16V4Z
DDR_DQ50
DDR_DQ54
C437
DDR_DQS#6
DDR_DQS6
0.1U_0402_16V4Z
DDR_DQ52
DDR_DQ48
C163
DDR_DQ46
DDR_DQ43
0.1U_0402_16V4Z
DDR_DM5
C438
DDR_DQ45
DDR_DQ40
0.1U_0402_16V4Z
DDR_DQ38
DDR_DQ35
C162
0.1U_0402_16V4Z
DDR_DQS#4
DDR_DQS4
C439
DDR_DQ32
DDR_DQ36
0.1U_0402_16V4Z
DDR_SCAS#
DDR_SCS#1
8,11 DDR_SCAS#
8 DDR_SCS#1
0.1U_0402_16V4Z
DDR_SMA10
DDR_SMA15
DDR_SWE#
8,11 DDR_SWE#
DDR_DQ6
DDR_DQ7
0.1U_0402_16V4Z
DDR_SMA5
DDR_SMA3
DDR_SMA1
DDR_CLK1 8
DDR_CLK1# 8
0.1U_0402_16V4Z
DDR_SMA12
DDR_SMA9
DDR_SMA8
DDR_CLK1
DDR_CLK1#
+
C148
220U_Y_4VM
C443
DDR_SMA17
DDR_DM0
C444
DDR_SCKE0
DDR_SMA[0..17] 8,11
R14
1K_0402_1%
DDR_DM[0..7] 8,11
C445
DDR_SCKE0
DDR_DM[0..7]
DDR_SMA[0..17]
0.1U_0402_16V4Z
DDR_DQ26
DDR_DQ27
+1.8V
DDR_DQS#[0..7] 8,11
C101
DDR_DM3
DDR_DQS[0..7] 8,11
0.1U_0402_16V4Z
DDR_DQ28
DDR_DQ25
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDR_DQS#[0..7]
C19
0.1U_0402_16V4Z
1
+DDR_VREF1
C154
DDR_DQ23
DDR_DQ19
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
DDR_DQ8
DDR_DQ11
DDR_DQ[0..63] 8,11
0.1U_0402_16V4Z
DDR_DQS#2
DDR_DQS2
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
DDR_DQS[0..7]
C447
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_DQ16
DDR_DQ20
DDR_DM1
C111
DDR_DQ3
DDR_DQ2
DDR_DQ[0..63]
DDR_DQ4
DDR_DQ5
R13
1K_0402_1%
DDR_DQ15
DDR_DQ12
0.1U_0402_16V4Z
DDR_DQS#0
DDR_DQS0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
C143
DDR_DQ1
DDR_DQ0
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
DDR_DQS#1
DDR_DQS1
1
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
GND2
GND1
JP16
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DDR_DQ10
DDR_DQ14
202
201
+DDR_VREF1
+1.8V
Compal Secret Data
DIMMA
Reverse
2006/05/18
Issued Date
2007/05/18
Deciphered Date
C
Title
DDRII-SODIMM0

Date:
G
R ev
0.3
Sheet
10
H
of
48
+1.8V
+1.8V
+DDR_VREF2
Trace=20mil
JP15
DDR_DQ45
DDR_DQ40
DDR_DM5
DDR_DQ46
DDR_DQ43
DDR_DQ52
DDR_DQ48
DDR_DQS#6
DDR_DQS6
DDR_DQ50
DDR_DQ54
DDR_DQ56
DDR_DQ61
DDR_DM7
DDR_DQ62
DDR_DQ58
10,12,16,24 SB_SMDATA
10,12,16,24 SB_SMCLK
+3VS
DDR_DQ22
DDR_DQ18
+1.8V
DDR_DQ29
DDR_DQ24
DDR_DQS#3
DDR_DQS3
C21
0.1U_0402_16V4Z
2
DDR_SCKE1
DDR_SMA14
R16
1K_0402_1%
DDR_SMA11
DDR_SMA7
DDR_SMA6
C20
0.1U_0402_16V4Z
DDR_SMA4
DDR_SMA2
DDR_SMA0
DDR_SMA16
DDR_SRAS#
DDR_SCS#2
DDR_SCKE3
DDR_SMA13
DDR_SRAS# 8,10
DDR_SCS#2 8,10
DDR_SCKE3 8,10
DDR_DQ37
DDR_DQ33
DDR_DM4
DDR_DQ39
DDR_DQ34
3
DDR_DQ44
DDR_DQ41
DDR_DQS#5
DDR_DQS5
DDR_DQ42
DDR_DQ47
DDR_DQ53
DDR_DQ49
DDR_CLK3
DDR_CLK3#
DDR_CLK3 8
DDR_CLK3# 8
DDR_DM6
DDR_DQ55
DDR_DQ51
DDR_DQ60
DDR_DQ57
DDR_DQS#7
DDR_DQS7
DDR_DQ63
DDR_DQ59
+3VS
4
PTI_A5652D-A0G16-P
om
Issued Date
2006/05/18
2007/05/18
Deciphered Date
Title

DDR-II SODIMM1

Date:
Sheet
l.c
Compal Secret Data
ai
DIMMB
Reverse
A
R15
1K_0402_1%
+DDR_VREF2
DDR_DQ30
DDR_DQ31
nf
@
ho
tm
DDR_DM2
ai
DDR_DQ17
DDR_DQ21
C184
C186
2.2U_0805_10V6K
0.1U_0402_16V4Z
he
x
0.1U_0402_16V4Z
C647
DDR_DQ38
DDR_DQ35
0.1U_0402_16V4Z
DDR_DQS#4
DDR_DQS4
C646
DDR_DQ32
DDR_DQ36
0.1U_0402_16V4Z
8,10 DDR_SCAS#
8,10 DDR_SCS#3
C645
DDR_SCAS#
DDR_SCS#3
0.1U_0402_16V4Z
DDR_SMA10
DDR_SMA15
DDR_SWE#
8,10 DDR_SWE#
C164
DDR_SMA5
DDR_SMA3
DDR_SMA1
0.1U_0402_16V4Z
DDR_SMA12
DDR_SMA9
DDR_SMA8
C109
DDR_SMA17
0.1U_0402_16V4Z
DDR_SCKE1
8,10 DDR_SCKE1
C142
0.1U_0402_16V4Z
DDR_DQ26
DDR_DQ27
C155
DDR_DM3
0.1U_0402_16V4Z
DDR_DQ28
DDR_DQ25
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
C98
DDR_DQ23
DDR_DQ19
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
DDR_DQ6
DDR_DQ7
0.1U_0402_16V4Z
DDR_DQS#2
DDR_DQS2
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
C52
220U_Y_4VM
DDR_CLK4 8
DDR_CLK4# 8
0.1U_0402_16V4Z
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_DQ16
DDR_DQ20
DDR_CLK4
DDR_CLK4#
0.1U_0402_16V4Z
DDR_DQ3
DDR_DQ2
0.1U_0402_16V4Z
DDR_DQS#0
DDR_DQS0
DDR_DM0
0.1U_0402_16V4Z
DDR_SMA[0..17]
DDR_DQ4
DDR_DQ5
C125
8,10 DDR_DM[0..7]
8,10 DDR_SMA[0..17]
+1.8V
DDR_DQ8
DDR_DQ11
C157
DDR_DQ1
DDR_DQ0
DDR_DM[0..7]
DDR_DM1
C165
DDR_DQS#[0..7]
8,10 DDR_DQS#[0..7]
Layout Note:
Place near JDIM1
DDR_DQ15
DDR_DQ12
DDR_DQ9
DDR_DQ13
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDR_DQS[0..7]
8,10 DDR_DQS[0..7]
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
C97
DDR_DQS#1
DDR_DQS1
DDR_DQ[0..63]
8,10 DDR_DQ[0..63]
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DDR_DQ10
DDR_DQ14
C112
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
11
R ev
0.3
of
48
Clock Generator
1- PLACE ALL THE SERIES TERMINATION

RESISTORS AS CLOSE TO CLOCK GEN AS POSSIBLE
2- ROUTE ALL CPUCLK/#, NBCLK/#, ITPCLK/#
AND SCR/# ,AS DIFFERENT PAIR RULE
C456
2
+3VS
C190
1
L13
+CLKVDDA
CHB1608U301_0603
0.1U_0402_16V4Z
2
C484
0.1U_0402_16V4Z
C457
22P_0402_50V8J
1
C501
0.1U_0402_16V4Z
10U_0805_10V4Z
C182
XTALIN_CLK
C497
4.7U_0805_10V4Z
+VDD48
1
1
2
CHB1608U301_0603
+3VS
Y3
SRCCLKT0
SRCCLKC0
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
SRCCLKT3
SRCCLKC3
SRCCLKT4
SRCCLKC4
SRCCLKT5
SRCCLKC5
SRCCLKT6
SRCCLKC6
SRCCLKT7
SRCCLKC7
34
33
30
29
27
28
24
25
22
23
18
19
16
17
12
13
SRCCLKT0
SRCCLKC0
CLKREQA#
CLKREQB#
10
11
CK410#/PCICLK0
VTT_PWRGD#/PD
CPU_STOP#
USB_48MHZ
50
FS_C
FS_B/REF1
FS_A/REF0
TEST_SEL/REF2
9
53
54
52
VDDCPU
VDDPCI
VDDATI
VDDSRC
VDDSRC
VDDSRC
VDD48
VDDREF
VDDA
44
49
31
36
26
20
15
5
55
38
L33
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
GNDCPU
GNDPCI
GNDATI
GNDSRC
GNDSRC
GNDSRC
GNDSRC
GND
GND
GNDA
XIN
XOUT
R277
R270
R271
R272
R273
1
1
1
1
2
2
2
2
R261
R263
R285
R278
1
1
1
1
2
2
2
2
R708 1
R709 1
SRCCLKT3
SRCCLKC3
R259
1
2
49.9_0402_1%
R258
1
2
49.9_0402_1%
R257
1
2
49.9_0402_1%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
CLK_NB_BCLK 8
CLK_NB_BCLK# 8
CLK_BCLK 4
CLK_BCLK# 4
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
CLK_SB_ALINK 15
CLK_SB_ALINK# 15
CLK_NB_ALINK 7
CLK_NB_ALINK# 7
2 33_0402_5%
2 33_0402_5%
SRCCLKT5
SRCCLKC5
CLK_PCIE_MCARD 24
CLK_PCIE_MCARD# 24
R262
2
1
49.9_0402_1%
C189
2
2
0.1U_0402_16V4Z
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
CPUCLKT2_ITP
CPUCLKC2_ITP
47
46
43
42
41
40
R264
2
1
49.9_0402_1%
10U_0805_10V4Z
2
45
51
32
35
14
21
3
56
39
R286
2
1
49.9_0402_1%
1
2
CHB1608U301_0603
+3VS
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
+VDDPCI
1
1
C203 0.1U_0402_16V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
1
C458
C485
R279
2
1
49.9_0402_1%
L14
U23
0.1U_0402_16V4Z
1
1
C188
C486
R711
2
1
49.9_0402_1%
+CLK_VDD1
L16
1
2
+3VS
KC FBM-L11-201209-221LMAT_0805 1
C221
R710
2
1
49.9_0402_1%
R256
1
2
49.9_0402_1%
3- PUT DECOUPLING CAPS CLOSE TO CLOCK GEN

POWER PIN
@ 1M_0402_5%
1
C500
XTALOUT_CLK
2
14.31818MHZ_20P_6X1430004201
15
CPU_STP#
@ 2N7002_SOT23
PA_RS4X0F5
For C4 support
R255=4.7K, C83=33P
SCLK
SDATA
37
1
C831
@ 33P_0402_50V8J
7
8
10,11,16,24 SB_SMCLK
10,11,16,24 SB_SMDATA
R260
R283 2
R284 2
R254 1
1 10K_0402_5%
1 10K_0402_5%
+CLK_VDD1
MINI_CLKREQ# 24
2 4.7K_0402_5%
R255 1 0_0402_5%
475_0402_1%
Q40
6
48
2
1
R269 @ 4.7K_0402_5%
+CLK_VDD1
2
G
CLK_OK
16,17
1 R281
2
@ 10K_0402_5%
22P_0402_50V8J
+CLK_VDD1
CLK_ENABLE#
41 CLK_ENABLE#
FS_C
FS_B/REF1
FS_A/REF0
TEST_SEL/REF2
R282 1
R253 1
R251 1
2 4.7K_0402_5%
2 4.7K_0402_5%
2 4.7K_0402_5%
CPU_BSEL2 5
CPU_BSEL1 5,8
CPU_BSEL0 5
R266 1
R252 1
R267 1
2 33_0402_5%
2 @ 33_0402_5%
2 33_0402_5%
CLK_SB_14M 16
CLK_14M_SIO 30
CLK_NB_14M 8
IREF
ICS951413CGLFT_TSSOP56
ICS951413
SRC
PCI
REF
USB
FS_C FS_B FS_A CPU
1 100.00100.0033.33 14.31848.000
1
0
0
0
1 133.33100.0033.33 14.31848.000
0
1
1 166.66100.0033.33 14.31848.000
Compal Secret Data
2006/05/18
Issued Date
Deciphered Date
2007/05/18
A
Title
Size
B
Date:

ClockGen ICS 951411
Document Number
IAYAA (LA-3391P)
Sheet
E
Rev
0.3
12
of
48
TV-OUT CONNECTOR
D7
1.
2.
3.
4.
D8
Reduce LUMA_1 and CRMA_1 length

As short as possible
Y
C
Y
C
PANEL +LCDVDD CTRL CKT
ground
ground
(luminance+sync)
(crominance)
@ 22P_0402_50V8J
C204 1
2
Q2
2
+LCDVDD
C213
1
C202
2
82P_0402_50V8J
1
82P_0402_50V8J
ALLTO_C10877-104A1-L_4P
R7
100_0402_5%
Q3
2
2N7002_SOT23
G
2
82P_0402_50V8J
80mil
1
100K_0402_5%
C200
C223
1
470_0805_5%
Q34
2
2
3
5
6
C411
4.7U_0805_10V4Z
82P_0402_50V8J
C13
R8
100K_0402_5%
2
FBMA-L11-160808-121LMT
5
6
SI2301BDS_SOT23
R9
LUMA_2
CRMA_2
1
2
3
4
R10
75_0402_1%
1
2
3
4
L17
+3VS
1
R57
75_0402_1%
JP18
@ 22P_0402_50V8J
C224 1
2
R59
NB_CRMA
NB_CRMA
@ DAN217_SC59
SI2301BDS_SOT23
+LCDVDD
@ DAN217_SC59
2
FBMA-L11-160808-121LMT
NB_LUMA
NB_LUMA
NB_ENVDD
NB_ENVDD
+3VS
+3VALW
L15
+3VS
29
1
R209
+LCDVDD Width: 40mils
2
4.7K_0402_5%
1
BKOFF#
80mil
2
C410
DISPOFF#
D19 CH751H-40_SC76
C404
4.7U_0805_10V4Z
C405
0.1U_0402_16V4Z
0.047U_0402_16V7K
220P_0402_50V7K
LCD/PANEL BD. Conn.

C406
+3VS
1
8 NB_EDID_CLK
8 NB_EDID_DATA
29 DAC_BRIG
29 INVT_PWM
0.1U_0402_16V4Z
JP1
0.1U_0402_16V4Z
2
L42
+LCD_VDD
1
2
KC FBM-L11-201209-221LMAT_0805
+LCDVDD
C407
DISPOFF#
C810
220P_0402_50V7K
2
C811
L43
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
NB_TXCLKNB_TXCLK+
NB_TXOUT0NB_TXOUT0+
NB_TXOUT2NB_TXOUT2+
NB_TXOUT1NB_TXOUT1+
NB_TXCLK- 8
NB_TXCLK+ 8
NB_TXOUT0- 8
NB_TXOUT0+ 8
NB_TXOUT2- 8
NB_TXOUT2+ 8
NB_TXOUT1- 8
NB_TXOUT1+ 8
1
2
B+
KC FBM-L11-201209-221LMAT_0805
220P_0402_50V7K
ACES_88242-3000
2
C939
47P_0402_50V8J
1
NB_EDID_CLK
1
C408
2
47P_0402_50V8J
NB_EDID_DATA
1
C409
2
47P_0402_50V8J
Deciphered Date
2007/05/18
A
Title
Size
B
Date:
TV-OUT, LVDS CONNECTOR
Document Number
IAYAA (LA-3391P)
ai
2006/05/18
Issued Date
he
x
Compal Secret Data
nf
@
ho
tm
ai
l.c
om
Sheet
E
13
of
48
Rev
0.3
CRT CONNECTOR
D3
+5VS
CRT Conn.
CH491D_SC59
1
1A_6VDC_MINISMDC110 C400
0.1U_0402_16V4Z
+CRT_VCC
F1
2
+3VS
+R_CRT_VCC
D4
D1
D2
@ DAN217_SC59
@ DAN217_SC59
@ DAN217_SC59
2
JP14
1
C10
C402
C4
1
C6
2
6P_0402_50V8D
2
6P_0402_50V8D
17
R204
R207
2
6P_0402_50V8D
R205
+3VS
R206
R208
SUYIN _070546FR015S233CR
C7
Q32 1
2N7002_SOT23
C8
C5
R3
75_0402_1%
6P_0402_50V8D
6P_0402_50V8D
2
2
2
75_0402_1% 6P_0402_50V8D
R2
R1
75_0402_1%
1
2
FBMA-L11-160808-700LMT 0603
NB_CRT_B
16
+3VS
220P_0402_50V7K
C398
NB_DDC_DATA 8
Q33 1
2N7002_SOT23
NB_DDC_CLK 8
L3
+3VS
4.7K_0402_5%
1
2
CRT_OUT_B
+CRT_VCC
4.7K_0402_5%
1
2
L2
1
2
FBMA-L11-160808-700LMT 0603
+CRT_VCC
NB_CRT_G
CRT_OUT_G
2
G
1
2
FBMA-L11-160808-700LMT 0603
NB_CRT_R
2.2K_0402_5%
2
1
2
G
4.7K_0402_5%
1
2
CRT_OUT_R
L1
4.7K_0402_5%
1
2
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
C9
68P_0402_50V8J 68P_0402_50V8J
C12
R843
2
Y
C11
P
OE#
0.1U_0402_16V4Z
2 A
Y U24
SN74AHCT1G125GW_SOT353-5
CRT_OUT_VSYNC
1
C403
C401
@ 68P_0402_50V8K @ 68P_0402_50V8K
2
2
8 NB_CRT_VSYNC
R4
1K_0402_5%
U3
SN74AHCT1G125GW_SOT353-5
+CRT_VCC
8 NB_CRT_HSYNC
CRT_OUT_HSYNC
1
2
10_0402_5%
R844
1
2
10_0402_5%
5
1
0.1U_0402_16V4Z
P
OE#
5
1
+CRT_VCC
Compal Secret Data
2006/05/18
Issued Date
Deciphered Date
2007/05/18
5
Title
Size
B
Date:

CRT CONNECTOR
Document Number
IAYAA (LA-3391P)
Sheet
1
Rev
0.3
14
of
48
C288
2
1
2
+
@ 470U_D2_2.5VM
L22
CHB2012U170_0805
+PCIE_VDDR
1
C285
C291
C552
C550
C537
C562
C559
C561
C558
C541
C531
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
20 PCI_PIRQG#
12P_0402_50V8J
OUT
R102
20M_0603_5%
C287
4
4
4
4
4
4
4
4
4
4
H_PWRGOOD
H_INTR
H_NMI
H_INIT#
H_SMI#
H_CPUSLP#
H_IGNNE#
H_A20M#
H_FERR#
H_STPCLK#
***
CPU_STP#/DPSLP_3V#
DPSLP_OD#/GPIO37
INTA#
INTB#
INTC#
INTD#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
SB_32KHI
B2
X1
SB_32KH0
B1
X2
C29
A28
C28
B29
D29
E4
B30
F28
E28
2 0_0402_5% SB_STPCLK# E29
R336 2
D25
1
10K_0402_5%
E27
SB_BMREQ#
D27
D28
CPU_PG
INTR/LINT0
NMI/LINT1
INIT#
SMI#
SLP#/LDT_STP#
IGNNE#
A20M#
FERR#
STPCLK#/ALLOW_LDTSTP
LDT_PG/SSMUXSEL/GPIO0
DPRSLPVR
BMREQ#
LDT_RST#
AG25
AH25
AJ25
AH24
AG24
AH26
AG26
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ0#
LPC_DRQ1#
SERIRQ
AK27
SERIRQ
C2
F3
32.768KHZ_12.5P_1TJS125DJ2A073
VBAT
RTC_GND
A2
A1
SB450
3
5
2
@ U49
74LVC1G14GW_SOT353-5
2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
2
2
2
2
R879
R880
R881
R882
1
1
1
1
PM_CLKRUN# R151 1
100K_0402_5%
100K_0402_5%
100K_0402_5%
100K_0402_5%
2 4.7K_0402_5%
RTC Battery
LPC_AD0 29,30,33
LPC_AD1 29,30,33
LPC_AD2 29,30,33
LPC_AD3 29,30,33
LPC_FRAME# 19,29,30,33
BATT1
2
+RTCBATT
+RTCBATT
LPC_DRQ1# 30,33
SERIRQ
21,29,30,33
45@ ML1220T13RE
Place JOPEN1 close

to DDR-SODIMM
RTC_CLK 19
AUTO_ON# 19
+SB_VBAT
+SB_VBAT
Consider
--connect
RTC_CLK to EC
2 10K_0402_5%
R87 2
1
470_0805_5%
C278
2 SB_BMREQ#
CH751H-40_SC76 1
D12
BAS40-04_SOT23
+RTCVCC
R88 2
1
470_0805_5%
W=20mils
No short
JOPEN1
@ JUMP_43X39
+CHGRTC
1
C274
0.1U_0402_16V4Z
A
C972
15P_0402_50V8D
Compal Secret Data
Y
2 8.2K_0402_5%
RTC_CLK
2N7002_SOT23
Q66 @
P
@
MMBT3904_SOT23
D28
R136 1
LPC_DRQ1# R876 1
LPC_DRQ0# R877 1
SERIRQ
R878 1
ai
+3VS
2
G
BM_REQ#
PCI_PAR
2006/05/18
Issued Date
2007/05/18
Deciphered Date
Title
1
C833
CH751H-40_SC76
@
@
1 330P_0402_50V7K
1
2
R901 10K_0402_5%
@
@
SB_STPCLK#
1
2
D29
CH751H-40_SC76
R_STP
C973
330P_0402_50V7K
1 @
Q6
R_STPCLK# 2
R927 @
10K_0402_5%
2
D42
2
@
2
Q1 @
2N7002_SOT23
PA_RS4X0F5
For C4 support
U36
1
R899
8
P
A
2 R802
1 CPU_STP#
150K_0402_5%
R900 @
10K_0402_5%
@ 0.1U_0402_16V4Z
@
1
3
Q62
4
2
G
@ 2N7002_SOT23
+3VS
CLK_PCI_SIO
+3VS
C832
1
1 R744
2
22_0402_5%
PM_CLKRUN# 20,21,29
+3VS
H_DPSLP#
CLK_PCI_LPC
2 22_0402_5%
21394@ 22_0402_5% CLK_PCI_1394
CLK_PCI_CB
2 22_0402_5%
+3VS
PCI_GNT#0 23
PCI_GNT#1 20
PCI_GNT#2 21
+3VALW
H_STPCLK#
1 R869
1 R745
1 R870
S S% Deviation
1
0.5%
0
0.25%
PCI_C/BE#0 20,21,23
PCI_C/BE#1 20,21,23
PCI_C/BE#2 20,21,23
PCI_C/BE#3 20,21,23
PCI_FRAME# 20,21,23
PCI_DEVSEL# 20,21,23
PCI_IRDY# 20,21,23
PCI_TRDY# 20,21,23
PCI_PAR 20,21,23
PCI_STOP# 20,21,23
PCI_PERR# 20,21,23
PCI_SERR# 20,21
PCI_REQ#0 23
PCI_REQ#1 20
PCI_REQ#2 21
PCI_FRAME#
PCI_DEVSEL#
PCI _IRDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_REQ#5
PCI_REQ#6
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PCI_GNT#5
PCI_GNT#6
PM_CLKRUN#
LOCK#
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#
RTCCLK
RTC_IRQ#/ACPWR_STRAP
RTC
1 R902
4,41 DPRSLPVR
NC
C286
IN
SB_32KHI
NC
12P_0402_50V8J
1
Y1
CPU_STP#1 R167
2 0_0402_5%AJ8
H_DPSLP#1 R713
2 0_0402_5%AK7
PCI_PIRQA#
AG5
PCI_PIRQB#
AH5
PCI_PIRQC#
AJ5
PCI_PIRQD#
AH6
PCI_PIRQE#
AJ6
PCI_PIRQF#
AK6
PCI_PIRQG#
AG7
PCI_PIRQH#
AH7
Pull-high on CPU side
1 R103
2
20M_0603_5%
SB_32KH0
12 CPU_STP#
4 H_DPSLP#
23 PCI_PIRQA#
21 PCI_PIRQB#
22P_0402_50V8J
U32
8 DLY CNTRL CLKOUT1 2
PCI_CLK7
1 CLKIN
CLKOUT2 6
+SS_VDD
3 VDD
CLKOUT3 7
13 VDD
CLKOUT4 10
9 SSON
1 R746
2 10K_0402_5%
CLKOUT5 11
4 SS%
1 R741
2
CLKOUT6 14
@ 10K_0402_5%
5 GND
CLKOUT7 15
12 GND
1
2
2
CLKOUT8 16
C777
C815 C816
R759
R750
ASM3P623S00EF-16-TR_TSSOP16
1U_0402_6.3V4Z
100P_0402_25V8K @ 10K_0402_5% 10K_0402_5%
2
1
1
100P_0402_25V8K
2
om
+1.8VS
PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
C807
l.c
2 8.2K_0402_5%PCI_REQ#6
2 8.2K_0402_5%PCI_GNT#6
R3821
R1621
H28
F29
H29
H26
F27
G29
L29
J26
L28
J27
N27
M26
K27
P29
P30
+3VS
3
Size
Date:

PCI_EXP/LPC/RTC
Document Number
IAYAA (LA-3391P)
nf
@
ho
tm
8.2K_0402_5%PCI_GNT#5
8.2K_0402_5%PCI_GNT#4
8.2K_0402_5%PCI_GNT#3
8.2K_0402_5%PCI_GNT#2
Spread Spectrum
L41
1
2 +SS_VDD
FBM-L11-160808-800LMT_0603
ai
2
2
2
2
20,21,23,24,27,29,30,33
R165
8.2K_0402_5%
Sheet
1
he
x
0.1U_0402_10V6K
R8951
R8961
R8971
R8981
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDR_9
2 C563
@ 100P_0402_50V8J
F26
R29
G26
P26
K26
L26
P28
N26
P27
10U_0805_10V4Z
C312 1
2
8.2K_1206_8P4R_5%
PCIE_PVDD
PCIRST#
CLK_PCI_CB 21
CLK_PCI_SIO 30,33
CLK_PCI_1394 23
CLK_PCI_LPC 29
CLK_PCI_LAN 20
PCI_CLK4_R 19
PCI_CLK7_R 19
50mil trace lenght
PCIE_CALI
PCI_CLK8_R 19
1
+PCIE_VDDR
PCIE_CALRP
PCIE_CALRN
PCI_CLK7
2
39_0402_5%
R363 1
2
39_0402_5%
PCI_CLK5_R 19
PCI_CLK6_R 19
C314 1
G27
2
1
R1082 150_0402_1%
H27
1
+PCIE_VDDR
R110 150_0402_1%
G28
1
2
R343
4.12K_0603_1%
80mA
PCIE_PVDD
R30
PCIRST#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
R742 1
CLK_PCI_CB
CLK_PCI_SIO
CLK_PCI_1394
CLK_PCI_LPC
CLK_PCI_LAN
PCI_CLK4_R
PCI_CLK7_R
PCI_CLK2_R 19
PCI_CLK3_R 19
1U_0402_6.3V4Z
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
AJ7
W3
Y2
W4
Y3
V1
Y4
V2
W2
AA4
V4
AA3
U1
AA2
U2
AA1
U3
T4
AC1
R2
AD4
R3
AD3
R4
AD2
P2
AE3
P3
AE2
P4
AF2
N1
AF1
V3
AB4
AC2
AE4
T3
AC4
AC3
T2
U4
T1
AB2
AB3
AF4
AF3
AG2
AG3
AH1
AH2
AH3
AJ2
AK2
AJ3
AK3
AG4
AH4
AJ4
AG1
AB1
CLK_PCI_LAN
PCI_SERR#
PCI_PERR#
LOCK#
PCI_DEVSEL#
8
7
6
5
PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/PDMA_REQ0#
REQ4#/PLL_BP33/PDMA_REQ1#
REQ5#/GPIO13
REQ6#/GPIO31
GNT0#
GNT1#
GNT2#
GNT3#/PLL_BP66/PDMA_GNT0#
GNT4#/PLL_BP50/PDMA_GNT1#
GNT5#/GPIO14
GNT6#/GPIO32
CLKRUN#
LOCK#
R354 1
2
39_0402_5%
C313 1
1
2
3
4
M29
N29
M28
N28
J29
K29
J28
K28
SB_A_RXP0
SB_A_RXN0
SB_A_RXP1
SB_A_RXN1
L24
RP9
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCI_CLK2_R
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R
PCI_CLK6_R
PCI_CLK7_R
PCI_CLK8_R
PCICLK9_R
PCICLKFB
8.2K_0402_5%PCI_STOP#
8.2K_0402_5%PCI_TRDY#
8.2K_0402_5%PCI_FRAME#
8.2K_0402_5%PCI _IRDY#
SB_A_TXP0 M30
2
2 0.01U_0402_16V7KSB_A_TXN0 N30
2 0.01U_0402_16V7KSB_A_TXP1 K30
2 0.01U_0402_16V7KSB_A_TXN1 L30
0.01U_0402_16V7K
H30
J30
F30
G30
L4
L3
L2
L1
M4
M3
M2
M1
N4
N3
N2
2
2
2
2
7
7
7
7
PCIE_RCLKP
PCIE_RCLKN
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK8
PCICLK9
PCICLK_FB
1
2
CHB2012U170_0805
+1.8VS
RP10
R8461
R8471
R8481
R8491
1
C300 1
C305 1
C295 1
C298
NB_A_RXP0
NB_A_RXN0
NB_A_RXP1
NB_A_RXN1
Part 1 of 4
1U_0402_6.3V4Z
7
7
7
7
A_RST#
L27
M27
8.2K_0402_5%PCI_PIRQG#
8.2K_0402_5%PCI_PIRQH#
8.2K_0402_5%PCI_PIRQE#
8.2K_0402_5%PCI_PIRQF#
8.2K_0402_5%PCI_REQ#3
8.2K_0402_5%PCI_REQ#0
8.2K_0402_5%PCI_REQ#2
8.2K_0402_5%PCI_REQ#1
SB450 SB
AH8
12 CLK_SB_ALINK
12 CLK_SB_ALINK#
8.2K_1206_8P4R_5%
4 PCI_REQ#4
3 PCI_REQ#5
2 PCI_GNT#0
1 PCI_GNT#1
5
6
7
8
NB_RST#
2 8.2K_0402_5%
U9A
NB_RST#
PCI CLKS
2
2
2
2
2
2
2
2
R163 1
PCI_PIRQD#
PCI_PIRQC#
PCI_PIRQB#
PCI_PIRQA#
PCI INTERFACE
R8871
R8881
R8891
R8901
R8911
R8921
R8931
R8941
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
PCI EXPRESS INTERFACE
2
2
2
2
PCI_AD[0..31]
CPU
R8831
R8841
R8851
R8861
19,20,21,23 PCI_AD[0..31]
XTAL
+3VS
PA_IXP400AC16
C300, C305, C295, C298=10nF
A_RST#, PCIRST# 8.2K Pull down
BMREQ# add diode and RC
L PC
15
of
48
Rev
0.3
+3VALW
U9B
1
1
1
1
2
2
2
2
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
EXTEVENT0#
PCIE_PME#
EC_FLASH#
PM_SLP_S5#
R96
R99
R94
1
1
1
2 4.7K_0402_5%
2 4.7K_0402_5%
2 10K_0402_5%
EC_SWI#
PM_SLP_S3#
PBTN_OUT#
29
29
GATEA20
KBRST#
4 H_PROCHOT#
EC_RSMRST#
+3VS
12
R90
R98 1
R325 1
2 10K_0402_5%
SIO_SMI#
2 1.5K_0402_5%
2 1.5K_0402_5%
SB_SMCLK
SB_SMDATA
1 R326
2
10K_0402_5%
GPIO5
R858
R859
R860
R861
2 10K_0402_5%
GPIO8
1 R337
2
10K_0402_5%
AGP_STP#
1
1
1
1
2
2
2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
R7931
R7941
R7951
R7961
2
2
2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
A23
C279
@ 15P_0402_50V8D
2
B23
AK24
SB_INT_FLASH_SEL
AGP_STP#
GPIO5
GPIO_M
SPKR
SB_SMCLK
SB_SMDATA
GPIO8
GPIO11
GPIO12
AC_BITCLK
AC_SDIN1
AC_SDIN2
AZ_SDIN1_MD
GPIO12
GPIO46
GPIO11
GPIO40
C981 1
25 AZ_BITCLK_HD
R714 1
2 33_0402_5%
25 AZ_SDOUT_HD
27 AZ_SYNC_MD
R715 1
R716 1
2 33_0402_5%
2 33_0402_5% MDC@
27 AZ_BITCLK_MD
27 AZ_SDOUT_MD
25 AZ_SDIN3_HD
25 AZ_SYNC_HD
25 AZ_RST_HD#
27 AZ_RST_MD#
R717 1
R718 1
2 33_0402_5% MDC@
2 33_0402_5% MDC@
R719 1
R720 1
R871 1
2 33_0402_5%
2 33_0402_5%
2 33_0402_5% MDC@
19 AC_SDOUT
27 AZ_SDIN1_MD
+3VALW
19
R760 2
1
10K_0402_5%
26
SPKR
10,11,12,24 SB_SMCLK
10,11,12,24 SB_SMDATA
GPIO_M
R758 2
1
10K_0402_5%
R97 1
0_0402_5%
30 SB_INT_FLASH_SEL
27
SIDERST#
12,17
CLK_OK
R751 1
CLK_SB_14M
D1
MAINPWON_R
D11
1
CH751H-40_SC76
SPDIF_OUT
B25
C25
C23
D24
D23
A27
C24
A26
B26
B27
C26
C27
D26
USB INTERFACE
R854
R855
R856
R857
29 PM_SLP_S3#
29 PM_SLP_S5#
29
PBTN_OUT#
17 SB_PWRGD
8 NB_SUS_STAT#
RSMRST#
14M_X1/OSC
14M_X2
SIO_CLK
ROM_CS#/GPIO1
GHI#/GPIO6
VGATE/GPIO7
GPIO4
GPIO5
FANOUT0/GPIO3
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
DDC2_SCL/GPIO11
DDC2_SDA/GPIO12
AZ_BITCLK
AZ_SDOUT
AZ_SDIN3_HD
A Z_SYNC
AZ_RST
GPIO46
AC_BITCLK
AC_SDOUT
AZ_SDIN1_MD
AC_SDIN1
AC_SDIN2
GPIO40
AC_RST#
SPDIF_OUT
J2
J3
D5
K2
A6
K3
G1
G2
H4
G3
G4
H1
H3
H2
AZ_BITCLK
AZ_SDOUT
BLINK/AZ_SDIN3/GPM6#
AZ_SYNC
USB_OC5#/AZ_RST#/GPM5#
48M_AZ/GPIO46
AC_BITCLK/GPIO38
AC_SDOUT/GPIO39
ACZ_SDIN0/GPIO42
ACZ_SDIN1/GPIO43
ACZ_SDIN2/GPIO44
AC_SYNC/GPIO40
AC_RST#/GPIO45
SPDIF_OUT/GPIO41
MAINPWON 4,35,36,38
OSCLIN
A15
48M_OUT
B15
C15 USB_RCOMPR318 1
D16
C16
D15
EC_SCI#
B8
EC_FLASH#
C8
USB_OC2#
C7
EC_LID_OUT#
B7
USB_OC4#
B6
USB_OC6#
B5
EC_SMI#
A5
2 11.3K_0603_1%
EC_SCI# 29
EC_FLASH# 30
EC_LID_OUT# 29
EC_SMI#
29
A11
B11
A10
B10
USB_HSDP5+
USB_HSDM5-
A14
B14
USB_HSDP4+
USB_HSDM4-
A13
B13
USB_HSDP3+
USB_HSDM3-
A18
B18
USBP6+
USBP6-
USBP6+
USBP6-
28
28
USBP4+
USBP4-
USBP4+
USBP4-
28
28
+3VALW
10K_1206_8P4R_5%
USB_OC4#
USB_OC2#
USB_OC6#
USB_HSDP2+
USB_HSDM2-
A17
B17
USBP2+
USBP2-
USB_HSDP1+
USB_HSDM1-
A21
B21
USBP1+
USBP1-
USB_HSDP0+
USB_HSDM0-
A20
B20
USBP0+
USBP0-
AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
C21
C18
D13
D10
D20
D17
C14
C11
+AVDD_USB
AVDDC
A16
+AVDDC
AVSSC
B16
AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
A9
A12
A19
A22
B9
B12
B19
B22
C9
C10
C12
C13
C17
C19
C20
C22
D9
D11
D12
D14
D18
D19
D21
D22
10P_0402_50V8K
2
@
USB PWR
LPC_PME#
C6
C4
D3
B4
E3
B3
C3
R3081
D4
2 0_0402_5%
R3191
F2
2 10K_0402_5%
R3141
2 10K_0402_5% E2
GATEA20
AJ26
KBRST#
AJ27
MAINPWON_R
D6
LPC_PME#
C5
SIO_SMI#
A25
D8
MASTER_RST#
D7
PCIE_PME#
D2
AZALIA
2 10K_0402_5%
EC_THRM#
EC_SWI#
EXTEVENT0#
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
EC_THRM#
EC_SWI#
ACPI / WAKE UP EVENTS
R918 1
Part 4 of 4
48M_X1/USBCLK
48M_X2
TALERT#/TEMP_ALERT#/GPIO10
USB_RCOMP
PCI_PME#/GEVENT4#
USB_VREFOUT
RI#/EXTEVNT0#
USB_ATEST1
SLP_S3#
USB_ATEST0
SLP_S5#
USB_OC0#/GPM0#
PWR_BTN#
USB_OC1#/GPM1#
PWR_GOOD
USB_OC2#/FANOUT1/LLB#/GPM2#
SUS_STAT#
USB_OC3#/GPM3#
TEST1
USB_OC4#/GPM4#
TEST0
USB_OC6#/FAN_ALERT#/GEVENT6#
GA20IN
USB_OC7#/CASE_ALERT#/GEVENT7#
KBRST#
SMBALERT#/THRMTRIP#/GEVENT2#
LPC_PME#/GEVENT3#
USB_HSDP7+
LPC_SMI#/EXTEVNT1#
USB_HSDP7+
VOLT_ALERT#/S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
USB_HSDP6+
WAKE#/GEVENT8#
USB_HSDM6-
SB450 SB
29
29
GPIO
MASTER_RST#
EC_THRM#
AC_RST#
A C97
2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
CLK / RST
R850 1
R851 1
R853 1
USBP2+
USBP2-
28
28
USBP1+
USBP1-
28
28
USBP0+
USBP0-
24
24
EC_SMI#
5
6
EC_LID_OUT# 7
EC_SCI#
8
4
3
2
1
RP5
40mil
L18
+AVDD_USB
FBM-10-201209-260-T_0805
2
1
C268 1
2 10U_0805_10V4Z
C281 1
2 1U_0402_6.3V4Z
C512 1
C513 1
C514 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
C270 1
2 10U_0805_10V4Z
C283 1
2 1U_0402_6.3V4Z
C521 1
C510 1
C511 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
L21
+AVDDC
SB450
+3VALW
KC FBM-L11-201209-221LMAT_0805
2
+3VALW
C277 1
2 10U_0805_10V4Z
C276 1
2 1U_0402_6.3V4Z
C504 1
2 0.1U_0402_16V4Z
EC_RSMRST#
29 EC_RSMRST#
+3VALW
R137
L46
47K_0402_5%
A
R74
10K_0402_5%
X1
FBMA-L11-160808-121LMT
Control by EC
Delay 50ms after +3VALW ready
4
1
1
48MHZ_4P_FN4800002
OSC_48MHZ
OUT 3
VDD
OE
C267
0.1U_0402_10V6K
GND
1 R912
2
30_0402_5%
OSCLIN
Compal Secret Data
2006/05/18
Issued Date
C975
12P_0402_50V8J
Deciphered Date
2007/05/18
3
Title

SB450 USB/ACPI/AC97/GPIO

Date:
Sheet
1
16
of
Rev
0.3
48
10U_0805_10V4Z 10U_0805_10V4Z
2
2
C731
0.1U_0402_16V4Z
C732
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
+3VS
@ 0.1U_0402_16V4Z
C735
C736
C737
C738
@ 0.1U_0402_16V4Z
SATA_TX0+
SATA_TX0-
AK22
AJ22
SATA_TX0+
SATA_TX0-
SATA_RX0-_C
SATA_RX0+_C
C728 1
C733 1
2 0.01U_0402_25V4Z
2 0.01U_0402_25V4Z
SATA_RX0SATA_RX0+
AK21
AJ21
SATA_RX0SATA_RX0+
SATA_TX1+_C
SATA_TX1-_C
C884 1
C885 1
22H@ 0.01U_0402_25V4Z
22H@ 0.01U_0402_25V4Z
SATA_TX1+
SATA_TX1-
AK19
AJ19
SATA_TX1+
SATA_TX1-
SATA_RX1-_C
SATA_RX1+_C
C886 1
C887 1
22H@ 0.01U_0402_25V4Z
22H@ 0.01U_0402_25V4Z
SATA_RX1SATA_RX1+
AK18
AJ18
SATA_RX1SATA_RX1+
AK14
AJ14
SATA_TX2+
SATA_TX2-
AK13
AJ13
SATA_RX2SATA_RX2+
AK11
AJ11
SATA_TX3+
SATA_TX3-
AK10
AJ10
SATA_RX3SATA_RX3+
AJ15
SATA_CAL
SATA_X1
AJ16
SATA_X1
SATA_X2
AK16
SATA_X2
PHDD_LED#
AK8
2
0.1U_0402_16V4Z
@ 10U_0805_10V4Z
2 0.01U_0402_25V4Z
2 0.01U_0402_25V4Z
@ 0.1U_0402_16V4Z
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3VS
Place SATA CAP & RES very close to SB

+5VS
C734 2
R721 2
1 @ 0.01U_0402_16V7K
1 1K_0402_1%
SUYIN_127072FR022G210ZR_RV
Place closely JP38 SATA CONN.

+3VS
0.1U_0402_16V4Z
C879
C880
C881
10U_0805_10V4Z 10U_0805_10V4Z
2
2
C882
0.1U_0402_16V4Z
SATA HDD CONNECTOR

1
C969
@ 10U_0805_10V4Z
2
+PLLVDD_SATA
JP38
GND
A+
AGND
BB+
GND
0.1U_0402_16V4Z
VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
VCC12
+PLLVDD_SATA
C739
0.1U_0402_16V4Z
1U_0402_6.3V4Z
SATA Accessed
1
2
3
4
5
6
7
SATA_TX1+_C
SATA_TX1-_C
SATA_RX1-_C
SATA_RX1+_C
C740
Port 0
Primary Slave
Port 2
Secondary Master
Port 1
Secondary Slave
Port 3
C741
10U_0805_10V4Z
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+1.8VS
+5VS
Y4
C743
1
25MHZ_20P
SATA HDD CONNECTOR
1U_0402_6.3V4Z
R723
2
1
10M_0402_5%
1
C745
27P_0402_50V8J
+XTLVDD_SATA
C742
0.1U_0402_16V4Z
+1.8_SATA
+3VS
SUYIN_127043FB022G208ZR_22P_RV
2H@
L39
2
1
CHB1608U301_0603
1
+XTLVDD_SATA
Port
Primary Master
C970
@ 0.1U_0402_16V4Z
+1.8VS
L38
2
1
CHB1608U301_0603
1
PHDD_LED#
C883
+3VS
29
SATA_X1
1 R722
2
10K_0402_5%
SATA_X2
+5VS
C746
27P_0402_50V8J
C744
10U_0805_10V4Z
SB450 SB
Part 2 of 4
PLLVDD_SATA
AH16
XTLVDD_SATA
AG10
AG14
AH12
AG12
AG18
AG21
AH18
AG20
AVDD_SATA_1
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_4
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
AVDD_SATA_8
AG9
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AH9
AG11
AG15
AG17
AG19
AG22
AG23
AF9
AH17
AH23
AH13
AH20
AK9
AJ12
AK17
AK23
AH10
AJ23
AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
AVSS_SATA_21
AVSS_SATA_22
AVSS_SATA_23
AVSS_SATA_24
AVSS_SATA_25
AVSS_SATA_26
AVSS_SATA_27
AVSS_SATA_28
AVSS_SATA_29
AVSS_SATA_30
AVSS_SATA_31
AVSS_SATA_32
AD30
AE28
AD27
AC27
AD28
AD29
AE27
AE30
AE29
AC28
AC29
PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15
AF29
AF27
AG29
AH30
AH28
AK29
AK28
AH27
AG27
AJ28
AJ29
AH29
AG28
AG30
AF30
AF28
IDE_PDDACK#
IDE_ SDIORDY
INT_IRQ15
IDE_SDA0
IDE_SDA1
IDE_SDA2
IDE_SDDACK#
IDE_SDDREQ
IDE_SDIOR#
IDE_SDIOW#
IDE_SDCS1#
IDE_SDCS3#
SIDE_D0/GPIO15
SIDE_D1/GPIO16
SIDE_D2/GPIO17
SIDE_D3/GPIO18
SIDE_D4/GPIO19
SIDE_D5/GPIO20
SIDE_D6/GPIO21
SIDE_D7/GPIO22
SIDE_D8/GPIO23
SIDE_D9/GPIO24
SIDE_D10/GPIO25
SIDE_D11/GPIO26
SIDE_D12/GPIO27
SIDE_D13/GPIO28
SIDE_D14/GPIO29
SIDE_D15/GPIO30
V28
W28
Y30
AA30
Y28
AA28
AB28
AB27
AB29
AA27
Y27
AA29
W27
Y29
V27
U27
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
AVSS_SATA_33
AVSS_SATA_34
AVSS_SATA_35
AVSS_SATA_36
AVSS_SATA_37
AVSS_SATA_38
AVSS_SATA_39
AVSS_SATA_40
AVSS_SATA_41
AVSS_SATA_42
AVSS_SATA_43
AVSS_SATA_44
AVSS_SATA_45
AG13
AH22
AK12
AH11
AJ17
AH14
AH19
AJ20
AH21
AJ9
AG16
AK15
AK20
SIDE_IORDY
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DACK#
SIDE_DRQ
SIDE_IOR#
SIDE_IOW#
SIDE_CS1#
SIDE_CS3#
IDE_PDDACK# 19
V29
T27
T28
U29
T29
V30
U28
W29
W30
R27
R28
SATA_ACT#
AH15
PIDE_IORDY
PIDE_IRQ
PIDE_A0
PIDE_A1
PIDE_A2
PIDE_DACK#
PIDE_DRQ
PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#
PRIMARY ATA 66/100
C730
C726 1
C727 1
SECONDARY ATA 66/100
C729
SATA_TX0+_C
SATA_TX0-_C
SERIAL ATA
C812
1
2
3
4
5
6
7
SERIAL ATA POWER
GND
A+
AGND
BB+
GND
0.1U_0402_16V4Z
U9C
+5VS
JP32
Place closely JP32 SATA CONN.
IDE_SDIORDY 27
INT_IRQ15 27
IDE_SDA0 27
IDE_SDA1 27
IDE_SDA2 27
IDE_SDDACK# 27
IDE_SDDREQ 27
IDE_SDIOR# 27
IDE_SDIOW# 27
IDE_SDCS1# 27
IDE_SDCS3# 27
IDE_SDD[0..15] 27
SB450
+1.8VS
+1.8_SATA
L40
2
1
CHB1608U301_0603
1
C747
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C749
1
C750
0.1U_0402_16V4Z
1U_0402_6.3V4Z
1
C748
C751
C752
0.1U_0402_16V4Z
C753
22U_0805_6.3V6M
1U_0402_6.3V4Z
U7-->please close to SB450(U9)

D38
1N4148_SOT23
C308
0.1U_0402_10V6K
1M_0402_5%
SN74LVC14APWLE_TSSOP14
U7C
11
1
2
330K_0402_5%
D39
C293
10
13
U7E
1N4148_SOT23
12
SB_PWRGD 16
U7F
NB_PWRGD 8
SB_PWRGD# 8
A
om
0.47U_0603_10V7K
2
2
SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14
P
O
U7D
R111
O
U7B
R128
1
2
330K_0402_5%
U7A
VGATE
41
R130
+3VALW
+3VALW
14
+3VALW
14
0.1U_0402_16V4Z
14
14
10K_0402_5%
+3VALW
+3VALW
C127
14
+3VALW
R129
14
+3VS
2006/05/18
2007/05/18
Deciphered Date
5
Title

SB450 IDE/SATA

Date:
Re v
0.3
he
x
Issued Date
ai
Compal Secret Data
nf
@
ho
tm
ai
l.c
CLK_OK 12,16
Sheet

1
17
of
48
+3VS
U9D
2 10U_0805_10V4Z
2 10U_0805_10V4Z
2 10U_0805_10V4Z
C520
C543
C522
C542
C564
C579
C584
C568
C576
C565
C586
C581
C594
C519
C598
C596
C597
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A30
D30
E24
E25
J5
K1
K5
N5
P5
R1
U5
U26
U30
V5
V26
Y1
Y26
AA5
AA26
AB5
AC30
AD5
AD26
AE1
AE5
AE26
AF6
AF7
AF24
AF25
AK1
AK4
AK26
AK30
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VS
C566 1
C553 1
2 10U_0805_10V4Z
2 10U_0805_10V4Z
C656
C570
C569
C547
C571
C556
C554
C572
C578
C557
C577
C555
C546
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C266
C275
C508
C507
C523
C525
C535
1
1
1
1
1
1
1
2
2
2
2
2
2
2
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
220mA
M12
M13
M18
M19
N12
N13
N18
N19
V12
V13
V18
V19
W12
W13
W18
W19
+3VALW
+1.8VALW
C651
C657
C526
C530
C524
1
1
1
1
1
2
2
2
2
2
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C534
C532
C540
C533
1
1
1
1
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C516 1
2
+1.05VS
D14
+3VS
+AVDD_CK
+V5_VREF
CH751H-40_SC76
+1.8VS
C337
R154 2
1K_0402_5%
C589
0.1U_0402_16V4Z
R86
0_0805_5%
+5VS
1U_0402_6.3V4Z
C269 1
2 10U_0805_10V4Z
C282 1
2 1U_0402_6.3V4Z
C280 1
2 0.1U_0402_16V4Z
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28
VDDQ_29
VDDQ_30
VDDQ_31
VDDQ_32
VDDQ_33
VDDQ_34
SB450 SB
Part 3 of 4
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
A3
A7
E6
E7
E1
F5
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
E9
E10
E20
E21
S5_1.8V_1
S5_1.8V_2
S5_1.8V_3
S5_1.8V_4
E13
E14
E16
E17
USB_PHY_1.8V_1
USB_PHY_1.8V_2
USB_PHY_1.8V_3
USB_PHY_1.8V_4
C30
CPU_PWR
AG6
V5_VREF
A24
B24
AVDDCK
AVSSCK
A4
A8
A29
B28
C1
E5
E8
E11
E12
E15
E18
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
POWER
C660 1
C585 1
C652 1
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
E19
E22
E23
E26
E30
F1
F4
G5
H5
J1
J4
K4
L5
M5
P1
R5
R26
T5
T26
T30
W1
W5
W26
Y5
AB26
AB30
AC5
AC26
AD1
AF5
AF8
AF23
AF26
AG8
AJ1
AJ24
AJ30
AK5
AK25
M14
M15
M16
M17
N14
N15
N16
N17
P12
P13
P14
P15
P16
P17
P18
P19
R12
R13
R14
R15
R16
R17
R18
R19
T12
T13
T14
T15
T16
T17
T18
T19
U12
U13
U14
U15
U16
U17
U18
U19
V14
V15
V16
V17
W14
W15
W16
W17
SB450
Compal Secret Data
Issued Date
2006/05/18
Deciphered Date
2007/05/18
Title
Size
B
Date:

SB450/POWER/GND
Document Number
IAYAA (LA-3391P)
Sheet
Rev
0.3
18
of
48
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
R122
R367
R724
10K_0402_5% @ 10K_0402_5% 10K_0402_5%
R335
AUTO_ON#
AC_SDOUT
RTC_CLK
SPDIF_OUT
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R
PCI_CLK6_R
PCI_CLK7_R
PCI_CLK8_R
LPC_FRAME#
R351
10K_0402_5% @ 10K_0402_5%
R345
10K_0402_5%
@
R321
R341
@ 10K_0402_5% 10K_0402_5%
2
R309
10K_0402_5%
R355
R329
@ 10K_0402_5%
@ 10K_0402_5%
PCI_CLK2_R
Selects type of 48MHz

clock pad
15 PCI_CLK2_R
+3VS
15
16
15
16
15
15
15
15
15
15
15,29,30,33
+3VALW
1
2
R315
10K_0402_5%
+3VS
+3VALW
R334
R123
R366
@ 10K_0402_5% 10K_0402_5%
R725
10K_0402_5%
2
@ 10K_0402_5%
R346
R350
10K_0402_5% 10K_0402_5%
@
2
R356
10K_0402_5%
2
R342
10K_0402_5%
@
R320
10K_0402_5%
R328
10K_0402_5%
ACPWRON
AUTO_ON# AC97_SDOUT
REQUIRED STRAPS
DE FAULT
SPDIF_OUT
CLK_PCI3
INTERNAL
RTC
SIO 24MHz
USB PHY
PWRDOWN
DISABLE
CLK_PCI_LAN CLK_PCI_LPC PCI_CLK6
Internal PLL
DE FAULT
PCIE CM_SET
low
PCI_CLK7
PCI_CLK8
ROM TYPE
CPU I/F = K8
PCI_CLK2_R
Crytsal Pad
H,H = PCI ROM
LFRAME#
THERMTIP#
ENABLE
C
DE FAULT
H,L = LPC ROM I
+3VS
PCIE CM_SET
HIGH
DE FAULT
CPU I/F = P4
THERMTIP#
DISENABLE
DE FAULT
DE FAULT
+3VS
Clock input buffer
L,H = LPC ROM II
DE FAULT
L,L = FWH ROM
+3VS
+3VS
+3VS
+3VS
DE FAULT
External
Clock
+3VS
+3VS
+3VS
USB PHY
PWRDOWN
ENABLE
SIO 48MHZ
DE FAULT
EXTERNAL
RTC (NOT
SUPPORTED
W/ IT8712 )
IGNORE
DEBUG
STRAPS
AUTO
PWR
ON
PULL
LOW
USE
DEBUG
STRAPS
MANUAL
PWR ON
PULL
HIGH
RTC_CLK
R132
R142
R149
R127
R146
R373
R141
R369
R381
10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5%
17 IDE_PDDACK#
15,20,21,23 PCI_AD31
15,20,21,23 PCI_AD30
15,20,21,23 PCI_AD29
15,20,21,23 PCI_AD28
15,20,21,23 PCI_AD27
15,20,21,23 PCI_AD26
15,20,21,23 PCI_AD25
15,20,21,23 PCI_AD24
1
R131
10K_0402_5%
2
R380
10K_0402_5%
2
R370
10K_0402_5%
2
1
2
R143
R148
R126
R147
R374
R140
@ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% 10K_0402_5%
2
Pop R634 when debug .
DEBUG STRAPS
IDE_PDDACK# PCI_AD31
PULL
HIGH
USE
LONG
RESET
Res erved
PCI_AD30
Res erved
PCI_AD29
Res erved
PCI_AD28
PCI_AD27
Res erved
PCI_AD26
PCI_AD25
PCI_AD24
BYPASS
PCI PLL
BYPASS
ACPI
BCLK
BYPASS IDE
PLL
USE EEPROM
PCIE STRAPS
USE PCI
PLL
USE
ACPI
BCLK
USE IDE
PLL
USE DEFAULT
PCIE STRAPS
DE FAULT
DE FAULT
DE FAULT
DE FAULT
AD23 strapping
No reserve longer
DE FAULT
PULL
LOW
USE
SHORT
RESET
2007/05/18
Deciphered Date
5
Title

HARDWARE TRAP

Date:
ai
2006/05/18
Issued Date
Sheet
1
he
x
Compal Secret Data
nf
@
ho
tm
ai
l.c
om
19
of
48
Rev
0.3
PCI_AD[0..31]
JP12
R215 2
1 3.6K_0402_5%
+3VALW
12
+3VALW
ACTIVITY#
U20
1
C433
18P_0402_50V8J
CLK
CLKRUN#
35
52
80
100
RTT3/CRTL18
125
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
26
41
56
71
84
94
107
GND/VSS
GND/VSS
GND/VSS
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND
GND
GND
GND
+3VS
R201
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
AVDD25/HSDAC-
Green LED+
TYCO_3-440470-4
75_0402_5%
C391
1
2
RJ45_PR
0.1U_0402_16V4Z
LANGND
1
1
1000P_1206_2KV7K
C1
+3VALW
Termination plane should be coupled to chassis ground
C2
4.7U_0805_10V4Z
+LAN_DVDD
CTRL25
Q8
2SB1197K_SOT23
2
B
40mil
+2.5V_LAN
CTRL25
2
C35
0.1U_0402_16V4Z
Y2
2
LAN_X1
1
+3VALW
C416
27P_0402_50V8J
C976
0.1U_0402_16V4Z
@
R913
49.9_0402_1%
@
C34
10U_0805_10V4Z
40mil 1
32
54
78
99
C428
0.1U_0402_16V4Z
C425
25MHZ_20P
0.1U_0402_16V4Z
C415
27P_0402_50V8J
R210
49.9_0402_1%
LAN_RD+
LAN_RDR211
49.9_0402_1%
24
45
64
110
116
C421
C431
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
2
+3VALW
KC FBM-L11-201209-221LMAT_0805
C423
0.1U_0402_16V4Z
+LAN_DVDD
40mil 2
L31
1
2
KC FBM-L11-201209-221LMAT_0805
C440
20mil
RTL8100CL_LQFP128
+2.5V_LAN_VDD
1
1
C39
0.1U_0402_16V4Z 2
L9
2
1
CHB2012U170_0805
TD+
TDCT
NC
NC
CT
RD+
RD-
TX+
TXCT
NC
NC
CT
RX+
RX-
R213
49.9_0402_1%
0.1U_0402_16V4Z
Closed to RTL8100CL
RJ45_TX+
RJ45_TX-
16
14
15
13
12
10
11
9
RJ45_RX+
RJ45_RX-
0.5u_TS6121C
49.9_0402_1%
C412
C413
R5
75_0402_5%
C14
R6
75_0402_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RJ45_PR
Closed to Transformer
+2.5V_LAN
+3VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
12
U18
1
3
2
4
5
7
6
8
Layout Note
TS6121 pls close to
conn.
LAN_X2
+LAN_AVDDL
3
7
20
16
R914
49.9_0402_1%
@
LAN_TD+
LAN_TD-
R212
2
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
13
R202
75_0402_5%
R221
14
SHLD1
Green LED-
1
2
1
1K_0402_5% R231
1 15K_0402_5%
1 5.6K_0603_1%
L32
AVDD33/AVDDL
AVDD33/AVDDL
AVDD33/AVDDL
NC/AVDDL
10
SHLD2
RST#
28
65
21
38
51
66
81
91
101
119
PME#
27
4
17
128
CTRL25
1 R203
2
300_0402_5%
15 CLK_PCI_LAN
15,21,29 PM_CLKRUN#
22
48
62
73
112
118
PR1+
15
15,21,23,24,27,29,30,33 PCIRST#
R233
2
2
9
13
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
10mil
NC/VSS
NC/VSS
PR1-
RJ45_TX+
16
SHLD1
31
EC_PME#
11
123
124
126
+3VALW
29
NC/HSDAC+
GND
GND
NC/LV2
PR2+
RJ45_TX-
SHLD2
INTA#
PCI_PIRQG#
10
120
LAN_X1
LAN_X2
105
23 10mil
127
72 10mil
74
NC/AVDDH
NC/HV
PR3+
RJ45_RX+
25
15
PCI_PIRQG#
LINK_10_100#
121
122
88
PR3-
REQ#
GNT#
PCI_REQ#1
PCI_GNT#1
14
15
18
19
NC/M66EN
PR2-
30
29
15
15
LAN_TD+
LAN_TDLAN_RD+
LAN_RD-
1
2
5
6
RJ45_RX-
PERR#
SERR#
AT93C46-10SI-2.7_SO8
PR4+
70
75
+3VALW
C17 1
0.1U_0402_16V4Z
15,21,23 PCI_PERR#
15,21 PCI_SERR#
PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
5
6
7
8
GND
NC
NC
VCC
76
61
63
67
68
69
2
100_0402_5%
ACTIVITY#
LINK_10_100#
DO
DI
SK
CS
11
2
300_0402_5% Amber LED8 PR4-
1
R200
15,21,23 PCI_PAR
15,21,23 PCI_FRAME#
15,21,23 PCI_IRDY#
15,21,23 PCI_TRDY#
15,21,23 PCI_DEVSEL#
15,21,23 PCI_STOP#
1
R238
117
115
114
113
4
3
2
1
IDSEL
PCI_AD22
LED0
LED1
LED2
NC/LED3
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
LAN I/F
46
EEDO
EEDI
EESK
EECS
X1
X2
C/BE#0
C/BE#1
C/BE#2
C/BE#3
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
108
109
111
106
NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-
92
77
60
44
15,21,23
15,21,23
15,21,23
15,21,23
EEDO
AUX/EEDI
EESK
EECS
TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-
Power
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
U4
PCI I/F
104
103
102
98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33
Amber LED+
10mil
15,19,21,23 PCI_AD[0..31]
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
C419
+2.5V_LAN
C426
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C442
C424
2
2
0.1U_0402_16V4Z
1
C441
2
2
0.1U_0402_16V4Z
C434
0.1U_0402_16V4Z
C38
2 0.1U_0402_16V4Z
Compal Secret Data
Issued Date
2006/05/18
2007/05/18
Deciphered Date
A
Title
Size
B
Date:

RTL8100CL
Document Number
IAYAA (LA-3391P)

G
Rev
0.3
Sheet
of
20
H
48
R407
@10_0402_5%
C612 @
18P_0402_50V8J
15,20,23
15,20,23
15,20,23
15,20,23
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
PCIRST#
15,20,23,24,27,29,30,33 PCIRST#
15,20,23 PCI_FRAME#
15,20,23 PCI_IRDY#
15,20,23 PCI_TRDY#
15,20,23 PCI_STOP#
15,20,23 PCI_PERR#
15,20 PCI_SERR#
15,20,23 PCI_PAR
15 PCI_REQ#2
15 PCI_GNT#2
15 CLK_PCI_CB
+3VS
IDSEL:
PCI_AD20
15
B
PCI_PIRQB#
15,29,30,33 SERIRQ
15,20,29 PM_CLKRUN#
CLK_PCI_CB
23V_PCM_SUSP
10K_0402_5%
2 PCM_ID
100_0402_5%
1
R159
PCI_AD20
1
R406
PCI_PIRQB#
@ 10K_0402_5%
@ 10K_0402_5%
@ 10K_0402_5%
1
1
1
R161
CBE3#
CBE2#
CBE1#
CBE0#
G4
J4
K1
K3
L1
L2
L3
M1
M2
A1
B1
H1
PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK
L8
L11
RIOUT#_PME#
SUSPEND#
F4
K8
N9
K9
N10
L10
2 R171
N11
2 R168
M11
2
0_0402_5%
J9
B4
C8
D12
H11
L9
L6
N4
K2
G1
F3
1
S1_A[0..25]
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
A7
G13
+3VS
CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3
B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#
B7
A11
E11
H13
S1_REG#
S1_A12
S1_A8
S1_CE1#
CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16
B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7
GRST#
C354
0.1U_0402_16V4Z
1
C343
0.1U_0402_16V4Z
1
C347
0.1U_0402_16V4Z
1
C359
0.1U_0402_16V4Z
C358
0.1U_0402_16V4Z
+S1_VCC
S1_IOWR# 22
S1_IORD# 22
S1_OE#
S1_CE2#
22
22
1
C351
0.1U_0402_16V4Z
1
C334
0.1U_0402_16V4Z
1
C340
0.1U_0402_16V4Z
S1_CD1#
C336
10P_0402_50V8J
S1_REG# 22
C5
D5
S1_A19
CINT#/READY_IREQ#
D6
S1_RDY#
SPKROUT
CAUDIO/BVD2_SPKR#
M9
B5
PCM_SPK#
S1_BVD2
A4
L12
D9
C6
A2
E10
J13
S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14
CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1
CRSV3/D2
CRSV2/A18
CRSV1/D14
2
C348
0.1U_0402_16V4Z
+3VS
D11
CBLOCK#/A19
1
C355
0.1U_0402_16V4Z
S1_D[0..15] 22
S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
A16_CLK
1
R160
S1_BVD1
S1_WP
CSTSCHG/BVD1_STSCHG#
CCLKRUN#/WP_IOIS16#
IDSEL
S1_A[0..25] 22
S1_D[0..15]
1
C345
0.1U_0402_16V4Z
S1_CE1#
22
S1_RST
22
C349
0.1U_0402_16V4Z
S1_CD2#
C357
10P_0402_50V8J
Closed to Pin L12
Closed to Pin A4
Close chip termenal
S1_WAIT# 22
+S1_VCC
S1_INPACK# 22
S1_WE# 22
S1_A16
2
33_0402_5%
S1_BVD1 22
S1_WP
22
R180
@ 43K_0402_5%
S1_RDY# 22
S1_WP
PCM_SPK# 26
S1_BVD2 22
S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
22
22
22
22
D3
H2
L4
M8
K11
F12
C10
B6
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
M10
VCCA2
VCCA1
M12
N12
E1
J3
N1
N5
2 R174
PCIRST#
VPPD1
VPPD0
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CLK_PCI_CB
C2
C1
D4
D2
D1
E4
E3
E2
F2
F1
G2
G3
H3
H4
J1
J2
N2
M3
N3
K4
M4
K5
L5
M5
K6
M6
N6
M7
N7
L7
K7
N8
CARDBUS
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI Interface
PCI_AD[0..31]
VCCD1#
VCCD0#
U29
15,19,20,23 PCI_AD[0..31]
+S1_VCC
+3VS
VPPD0
VPPD1
VCCD0#
VCCD1#
M13
N13
22
22
22
22
PCI1410AGGU_PBGA144
Deciphered Date
2007/05/18
5
Title
Size
B
Date:

ENE-CB1410
Document Number
IAYAA (LA-3391P)
ai
2006/05/18
Issued Date
he
x
Compal Secret Data
nf
@
ho
tm
ai
l.c
om
Sheet
1
21
of
48
Rev
0.3
PCMCIA Power Controller
+S1_VCC
40mil
1
U10
9
D
VCC
VCC
VCC
12V
13
12
11
W=40mil
C325
C331
0.1U_0402_16V4Z
2
2
5V
5V
VCCD0
VCCD1
VPPD0
VPPD1
3.3V
3.3V
C326
1
2
15
14
1
C304
VCCD0#
VCCD1#
VPPD0
VPPD1
C321
4.7U_0805_10V4Z
CardBus Socket
VCCD0# 21
VCCD1# 21
VPPD0 21
VPPD1 21
JP7
TPS2211AIDBR_SSOP16
R135
10K_0402_5%
OC
SHDN
16
0.1U_0402_16V4Z
3
4
GND
W=40mil
10
0.1U_0402_16V4Z
+3VS
1
C329
10U_0805_10V4Z
5
6
CardBus Socket
21
S1_A[0..25]
21
S1_D[0..15]
S1_A[0..25]
S1_D[0..15]
Close to
CardBus Conn.
C316
10U_0805_10V4Z
+S1_VCC
+S1_VCC
C319
0.1U_0402_16V4Z
2
+S1_VPP
C318
C322
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+S1_VPP
B
1
C320
4.7U_0805_10V4Z
1
C323
0.01U_0402_25V4Z
Reserve for Debug.

S1_WP
2
43K_0402_5%
S1_OE#
2
47K_0402_5%
S1_RST
2
47K_0402_5%
S1_CE1#
2
47K_0402_5%
S1_CE2#
2
47K_0402_5%
S1_D[0..15]
21 S1_D[0..15]
1
VPP
1
0.1U_0402_16V4Z
10U_0805_10V4Z
S1_A[0..25]
21 S1_A[0..25]
+S1_VPP
40mil
+5VS
C335
C317
C303
4.7U_0805_10V4Z
0.1U_0402_16V4Z
+S1_VCC
69
70
1
R173
1
R332
1
R153
1
R316
1
R324
GND
GND
DATA3
CD1#
DATA4
DATA11
DATA5
DATA12
DATA6
DATA13
DATA7
DATA14
CE1#
DATA15
ADD10
CE2#
OE#
VS1#
ADD11
IORD#
ADD9
IOWR#
ADD8
ADD17
ADD13
ADD18
ADD14
ADD19
WE#
ADD20
READY
ADD21
VCC
VCC
VPP
VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24
ADD7
ADD25
ADD6
VS2#
ADD5
RESET
ADD4
WAIT#
ADD3
INPACK#
ADD2
REG#
ADD1
BVD2
ADD0
BVD1
DATA0
DATA8
DATA1
GND DATA9
GND DATA2
DATA10
WP
CD2#
GND
GND
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68
S1_D3
S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21
S1_CD1# 21
S1_CE1#
21
S1_CE2#
S1_OE#
S1_VS1
21
21
21
S1_IORD# 21
S1_IOWR# 21
S1_WE#
21
S1_RDY# 21
+S1_VCC
+S1_VPP
S1_A16
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7
S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#
S1_A3
S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#
S1_VS2
21
S1_RST
21
S1_WAIT# 21
S1_INPACK# 21
S1_REG# 21
S1_BVD2 21
S1_BVD1 21
S1_WP
21
S1_CD2# 21
SANTA_130606-1_LT
Compal Secret Data
2006/05/18
Issued Date
Deciphered Date
2007/05/18
5
Title
Size
B
Date:

CARD BUS SOCKET
Document Number
IAYAA (LA-3391P)
Sheet
1
Rev
0.3
22
of
48
C785
+2.5VS_1394
+3VS
C786
C787
C788
C805
C789
C790
C791
C792
+3VS
C806
U33
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

2
2
2
1394@
1394@
1394@
1394@
1394@
2 10U_0805_10V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

2
2
2
1394@
1394@
1394@
1394@
10U_0805_10V4Z
2 1394@
1
2
3
4
A0
A1
A2
GND
VCC
WP
SCL
SDA
8
7
6
5
1394_EECK
1394_EEDI
R763
@ AT24C02N-10SU-2.7_SO8
30mils
87
86
73
72
62
59
1394_XI
1394_XO
XTPB0M
XTPB0P
XTPA0M
XTPA0P
XTPBIAS0
67
68
69
70
71
TPB0TPB0+
TPA0TPA0+
TPBIAS0
XTPB1M
XTPB1P
XTPA1M
XTPA1P
XTPBIAS1
74
75
76
77
78
NC17
NC16
NC15
NC14
NC13
NC12
NC11
NC10
NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
NC0
83
82
64
54
53
52
51
50
49
48
45
44
42
41
40
39
37
35
66
65
80
79
118
112
108
100
91
61
56
47
38
33
31
23
22
6
13
126
+2.5VS_1394
40mil
When use external BJT

Populate Q58, R765
C801
1394@ 10P_0402_50V8K
15mils
TPBIAS0
TPA0+
TPA0TPB0+
TPB0-
1
R772
54.9_0402_1%
1394@
C802
L48
1394@ 0.33U_0603_10V7K
4 4
3TPA0+_R
2TPA0-_R
R771
54.9_0402_1%
1394@
JP22
4
3
2
1
L49
1394@ WCM2012F2S-900T04_0805
TPB0+_R
1 1
2 2
R773
54.9_0402_1%
1394@
G
G
G
G
7
6
5
8
1394@ TYCO_1470383-2
R774
1394@ 54.9_0402_1%
3TPB0-_R
1394@ WCM2012F2S-900T04_0805
C803
270P_0402_50V7K
1394@
4
3
2
1
D40
D41
@ PSOT24C_SOT23
@ PSOT24C_SOT23
R775
1394@ 4.99K_0402_1%
1394@ VT6311S_LQFP128
R776
@ 10_0402_5%
REG_FB
PHY PORT1
Y6
1394@
24.576MHZ_16P_X8A024576FG1H
@ 2SB1197K_SOT23
PHY PORT0
2 1394@ 1K_0402_5%
2 1394@ 6.19K_0603_1%
2 1394@ 47P_0402_50V8J
57
58
R768 1
R769 1
C800 1
XI
CLK_PCI_1394
XREXT
10mils
XO
OSCILLATOR
60
63
2
B
15,20,21 PCI_IRDY#
15,20,21 PCI_TRDY#
15,20,21 PCI_FRAME#
XCPS
XREXT
E Q58
REG_OUT
C799
1394@ 10P_0402_50V8K
1
2
P CI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_FRAME#
REG_OUT
+3VS
CLK_PCI_1394
PCI_GNT#0
PCI_REQ#0
1394_IDSEL
REG_FB
85
+3VS
PCI_STOP#
PCI_PERR#
PCI_PAR
PCI_PIRQA#
84
2 1394@ 1U_0402_6.3V4Z
2 @ 4.7K_0402_5%
2 @ 4.7K_0402_5%
2 1394@ 4.7K_0402_5%
2 1394@ 0.1U_0402_16V4Z
15,20,21 PCI_C/BE#3
15,20,21 PCI_C/BE#2
15,20,21 PCI_C/BE#1
15,20,21 PCI_C/BE#0
15,20,21 PCI_STOP#
15,20,21 PCI_PERR#
15,20,21 PCI_PAR
15 PCI_PIRQA#
15,20,21,24,27,29,30,33 PCIRST#
15 CLK_PCI_1394
15
PCI_GNT#0
15
PCI_REQ#0
REG_FB
REG_OUT
C797
1
R765 1
R766 1
R767 1
C798 1
2 1394_IDSEL
1394@ 100_0402_5%
I2CEEN
1
R770
55
81
43
32
1394_EEDI
1394_EECK
PCI_AD16
PCI I/F
others
PHYRST#
BJT_CTL
I2CEN
PWRDET
1 R764
2
1394@ 4.7K_0402_5%
IDSEL:PCI_AD16
EEPROM
26
27
28
29
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE3#
CBE2#
CBE1#
CBE0#
STOP#
PERR#
PAR
INTA#
PCIRST#
PCICLK
GNT#
REQ#
IDSEL
PME#
IRDY#
TRDY#
DEVSEL#
FRAME#
1394@ 10U_0805_10V4Z
15,19,20,21 PCI_AD[0..31]
94
95
96
97
98
101
102
103
106
107
109
113
114
115
116
117
2
3
4
7
8
9
10
11
14
15
16
18
19
20
24
25
104
119
1
12
125
127
128
88
89
90
92
93
105
34
121
123
124
120
When use external EEPROM

Populate U33, R763, R766
Un-populate R764
+3VS
1394_EECS
EECS
EEDO
SDA/EEDI
SCL/EECK
GNDATX1
GNDARX1
GNDATX2
GNDARX2
GND19
GND18
GND17
GND16
GND15
GND10
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
GND0
PCI_AD[0..31]
1394@ MBK1608301YZF_0603
1
2
+3VS
L44
VT6311S
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
2
2
2
1394@ 0.1U_0402_16V4Z
EECK and EEDI is pull high internal

External pull high circuit is unnecessary
PVA5
PVA4
PVA3
PVA2
PVA1
PVA0
VDD4
VDD3
VDD2
VDD1
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
46
30
21
111
99
36
17
5
122
110
+1394_PLLVDD 1394@ 0.1U_0402_16V4Z 1394@ 0.1U_0402_16V4Z

1
1
1
1
C793
C794
C795
C796
U34
+3VS
+2.5VS_1394
@ 510_0402_5%
C804
@ 10P_0402_50V8K
Deciphered Date
2007/05/18
5
Title
Size
B
Date:

IEEE1394 VIA VT6311S
Document Number
IAYAA (LA-3391P)
ai
2006/05/18
Issued Date
he
x
Compal Secret Data
nf
@
ho
tm
ai
l.c
om
Sheet
1
23
of
48
Rev
0.3
+3VS
C754
WLAN@
0.01U_0402_16V7K
C755
WLAN@
0.1U_0402_16V4Z
C756
WLAN@
4.7U_0805_10V4Z
+1.5VS
C757
WLAN@
0.01U_0402_16V7K
C758
WLAN@
0.1U_0402_16V4Z
+3VALW
C759
WLAN@
4.7U_0805_10V4Z
+3VALW
C760
WLAN@
0.1U_0402_16V4Z
C126
KILL_SW#
WL_OFF#
29,31
XMIT_OFF#
WLAN@ CH751H-40_SC76
29
WLAN@ 0.1U_0402_16V4Z
U30
D30
B
1
2
Y 4
WLAN@ TC7SH08FU_SSOP5
+3VALW
R757 1
2
WLAN@ 10K_0402_5%
+1.5VS +3VS
JP33
29
MINI_WAKE#
12 MINI_CLKREQ#
12 CLK_PCIE_MCARD#
12 CLK_PCIE_MCARD
7 PCIE_WLAN_C_RX_N1
7 PCIE_WLAN_C_RX_P1
7 PCIE_WLAN_C_TX_N1
7 PCIE_WLAN_C_TX_P1
MINI_WAKE#
MINI_CLKREQ#
CLK_PCIE_MCARD#
CLK_PCIE_MCARD
PCIE_WLAN_C_RX_N1
PCIE_WLAN_C_RX_P1
PCIE_WLAN_C_TX_N1
PCIE_WLAN_C_TX_P1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
XMIT_OFF#
PCIRST#
+3VALW
15,20,21,23,27,29,30,33
SB_SMCLK 10,11,12,16
SB_SMDATA 10,11,12,16
USBP0USBP0+
USBP0USBP0+
16
16
WLAN@ FOX_AS0B226-S40N-7F~D
Mini-Express Card
Compal Secret Data
Issued Date
2006/05/18
Deciphered Date
2007/05/18
Title
Size
B
Date:

MINI PCI SLOT
Document Number
IAYAA (LA-3391P)
Rev
0.3
Sheet
24
of
48
HD Audio Codec
Adjustable Output
+5VALW
+VDDA
VIN
VOUT
DELAY SENSE or ADJ
ERROR
CNOISE
GND
+VDDA
0_0402_5%
2
1
C964
MIC@ 220P_0402_50V7K
45 MIC@ WM-64PCY_2P
26
MIC1_L
26
MIC1_R
1
C961
1
C962
1
C963
1
C965
MIC1_L
MIC1_R
MIC_SENSE
26,29 NBA_PLUG
26,29
EAPD
1U_0402_6.3V4Z
1
2
C850
1
DVDD1
FRONT_OUT_L
35
FRONT_OUT_R
36
AMP_RIGHT
SURR_OUT_L
39
SURR_OUT_R
41
LINE1_L
SIDESURR_OUT_L
45
LINE1_R
SIDESURR_OUT_R
46
LINE2_L
LINE2_R
16
MIC2_L
17
MIC2_R
23
24
CD_L
CEN_OUT
43
20
2
100P_0402_50V8J
C852 100P_0402_50V8J
19
1
2
MIC1_C_L
21
1
2
C616
1U_0402_6.3V4Z
MIC1_C_R
22
1
2
C619 1
1U_0402_6.3V4Z
2
C853
100P_0402_50V8J
12
CD_R
LFE_OUT
44
BIT_CLK
SDATA_IN
10
16 AZ_SDOUT_HD
SPK_SEL
R740
2
1
@ 39.2K_0603_1%
R785
1
2
20K_0402_1%
SENSE_A
SENSE_B
2
3
13
34
R925
2
1
39.2K_0603_1%
R926
1
2
@ 20K_0402_1%
EAPD
AMP_LEFT 26
SPK output to AMP
MIC1_R
PCBEEP
NC
37
NC
29
LINE2_VREFO
31
RESET#
SYNC
MIC1_VREFO_L
28
MIC1_VREFO_R
32
MIC2_VREFO
30
VREF
27
JDREF
40
NC
33
AVSS1
AVSS2
26
42
SDATA_OUT
GPIO0
GPIO1
SENSE A
SENSE B
47
EAPD
48
SPDIFO
4
7
DVSS1
DVSS2
Codec Signals
39.2K
PORT-A (PIN 39, 41)
20K
PORT-B (PIN 21, 22)
10K
PORT-C (PIN 23, 24)
5.1K
PORT-D (PIN 35, 36)
39.2K
PORT-E (PIN 14, 15)
5.1K
PORT-H (PIN 45, 46)
20K
PORT-F (PIN 16, 17)

C
HP output to AMP
AMP_RIGHT_HP 26
R426 1
2 27P_0402_50V8J
AZ_BITCLK_HD 16
2 33_0402_5%
+MIC1_VREFO_R
C363
10mil
10mil
10mil
+MIC1_VREFO_L
AZ_SDIN3_HD 16
C763
0.1U_0402_16V4Z
ALC861-VD-GR_LQFP48
DGND
SENSE B
C634
@1000P_0402_50V7K
MIC1_L
MONO_IN
11
AMP_LEFT_HP 26
C630 1
CD_GND
SENSE A
+3VS
AMP_RIGHT 26
0.1U_0402_16V4Z
+MIC1_VREFO_L
+MIC1_VREFO_R
+MIC2_VREFO
C765 10U_0805_10V4Z
1
2
1
2
C855 100P_0402_50V8J
26
C851
680P_0402_50V7K
1
C635
@ 1000P_0402_50V7K
2
AMP_LEFT
15
16 AZ_SYNC_HD
29
26,29 NBA_PLUG
14
2
100P_0402_50V8J
MIC2_L
2
1U_0402_6.3V4Z
MIC2_R
2
MIC@ 1U_0402_6.3V4Z
2
100P_0402_50V8J
Impedance
C848
C383
C761
C632
10U_1206_16V4Z
2 100P_0402_50V8J
2
2
0.1U_0402_16V4Z
18
26 MONO_IN
16 AZ_RST_HD#
U38
DGND To AGND Bypass
R707
20K_0402_1%
INT_MIC
MIC1
1
2
LIN_R
LIN_R
1 R837
2
MIC@ 4.7K_0402_5%
+MIC2_VREFO
LIN_L
LIN_L
26
2
0.1U_0402_16V4Z
C849
100P_0402_50V8J
AVDD1
26
C762
C388
38
C389
10U_1206_16V4Z
2
680P_0402_50V7K
+3V_DVDD
L45 1
2
1 FBM-L11-160808-800LMT_0603
20mil
AVDD2
25
4.7U_0805_10V4Z
Sense Pin
40mil
L28 1
2
FBM-L11-160808-800LMT_0603
C367
1
R729
R404
24K _0402_1%
DVDD2
2@ 0_0402_5%
C606
R7281
SD
SI9182DH-AD_MSOP8
R405
69.8K_0603_1%
C362
0.1U_0402_16V4Z
C369
+AVDD_HD
+VDDA
4.75v
0.1U_0402_16V4Z
4.7U_0805_10V4Z
29,31,34 SYSON
U14
29,30,34,39,40 SUSP#
1 R198
2
0_0603_5%
AGND
1 R187
2
0_0603_5%
1 R441
2
0_0603_5%
DGND
AGND
om
Deciphered Date
2007/05/18
5
Title
Size
B
Date:

HD CODEC ALC861D
Document Number
IAYAA (LA-3391P)
ai
2006/05/18
Issued Date
he
x
Compal Secret Data
nf
@
ho
tm
ai
l.c
H9
@ H_S315D118
Sheet
1
25
of
48
Rev
0.3
+3VS
COM
3
5
1
C977
1
C978
2
2.2U_0603_6.3V6K
2
2.2U_0603_6.3V6K
25
25
LIN_L
LIN_R
R862 2 24K_0402_5%
4
6
R863 2 24K_0402_5%
EC_EAPD#
C979
AMP_BEEP
1
2
1U_0402_6.3V4Z
AMP_CP+
AMP_CP2
1
C957
2.2U_0603_6.3V6K
AMP_BIAS
2
1
C959
2.2U_0603_6.3V6K
C971
1
2
Gain HP 0dB
SPK 10dB
26
GND2
5
1
VDD
19
20
10
17
18
HP_R
HP_L
HP_R
HP_L
INR_H
INL_H
/SD
CVSS
28
BEEP
12
14
CP+
CP-
25
BIAS
15
VSS
16
GND
PGND
PGND
CGND
2
23
7
13
R35
R36
1
1
2 0_0603_5%
2 0_0603_5%
SPK_L+
SPK_L-
SPKR+
SPKR-
R25
R26
1
1
2 0_0603_5%
2 0_0603_5%
SPK_R+
SPK_R-
CVSS
@ PSOT24C_SOT23
C958
2.2U_0603_6.3V6K
D5
C385
1U_0402_6.3V4Z
2
R197
560_0402_5%
R431
10K_0402_5%
1
R430
10K_0402_5%
2
Q30
MMBT3904_SOT23
C381
2
MONO_IN
MONO_IN 25
JP34
2
2
HP_L
2
R865 @
39K_0402_5%
3
3
2 20_0402_5%
R929 1
2 20_0402_5%
4
8
3
6
2
1
R864 @
39K_0402_5%
7
SINGA_2SJ-T8201ND3
C843
10P_0402_25V8K
Compal Secret Data
Q65
MMBT3904_SOT23
2
B
R928 1
C844
10P_0402_25V8K
AGND
1
R811 1
2
2.2K_0402_5%
L52 1
2
FBMA-L11-160808-121LMT
L53 1
2
FBMA-L11-160808-121LMT
Q64
2N7002_SOT23
2
G
+S1_VCC
NBA_PLUG
25,29 NBA_PLUG
NSE_DPR
AGND
PJ16
JUMP_43X39
@
NSE_DPR1
29
PJ15
JUMP_43X39
@
1U_0402_6.3V4Z
HP_R
7
SINGA_2SJ-T8201ND3
R189
2.4K_0402_5%
D34
CH751H-40_SC76
R440
10K_0402_5%
C840
220P_0402_50V7K
2 BEEP1#
R196
560_0402_5%
1
1
1U_0402_6.3V4Z
SPKR
16
2
1
C384
1
2
C386 @
1U_0402_6.3V4Z
8
3
6
2
1
R199
2
560_0402_5%
MIC1_L1
1
C839
220P_0402_50V7K
C387
2NSE_DPR11
1U_0402_6.3V4Z
C390
1 0.01U_0402_16V7K
PCI Beep
MIC1_L
MIC1_R1
21
25
L50 1
2
FBMA-L11-160808-121LMT
L51 1
2
FBMA-L11-160808-121LMT
PCM_SPK#
MIC1_R
21
25
CardBus Beep
R813
4.7K_0402_5%
25 MIC_SENSE
R812
MICROPHONE
IN JACK
JP35
4.7K_0402_5%
@ PSOT24C_SOT23
+MIC1_VREFO_R
2
+VDDA
BEEP#
1
2
ACES_85204-0200
D6
1
29
1
2
ACES_85204-0200
JP2
+MIC1_VREFO_L
JP40
SPKL+
SPKL-
APA2056_TSSOP28
0.1U_0402_16V4Z
EC Beep
Speaker Conn.
30mil
2 @ AMP_RHPIN
2.2U_0603_6.3V6K
2 @ AMP_LHPIN
2.2U_0603_6.3V6K
ENCODER_DIR 29
ENCODER_PULSE 29
1
C955
SPKL+
SPKL-
HP EN
C953
74LCX74MTC_TSSOP14
C9541
25 AMP_LEFT_HP
8
9
/AMP EN
24
14
13
12
11
10
09
08
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
25 AMP_RIGHT_HP
LOUT+
LOUT-
27
HP_EN
1
C952
SPKR+
SPKR-
22
21
AMP_EN#
1
C951
CD1#
D1
CP1
SD1#
Q1
Q1#
GND
SHI00002T00
ROUT+
ROUT-
2 100K_0402_5%
U48
1
2
3
4
5
6
7
R590 1
+5VS
U46
1
2
R833 10K_0402_5%
U47
INR_A
INL_A
2 100K_0402_5%
AMPR
AMPL
AMP_LEFT
2
0.22U_0402_6.3V6K
2
0.22U_0402_6.3V6K
R589 1
+3VS
0.1U_0402_16V4Z
C946
25
1
C948
1
C950
AMP_RIGHT
0.1U_0402_16V4Z
25
1
2
R831 10K_0402_5%
SW_XRE094_3P
PVDD
PVDD
11
C944
CVDD
HVDD
C943
10U_0805_10V4Z
1U_0402_6.3V4Z
C942
0.1U_0402_16V4Z
W=40mil
5
A
+5VS
+3VS
R829
10K_0402_5%
R828
10K_0402_5%
0.1U_0402_16V4Z
SW10
C980
@
0.01U_0402_16V7K
EC_EAPD#
0.01U_0402_16V7K
R827
100K_0402_5%
C945
1
1 0_0402_5%
R835
29 EC_EAPD_R#
EC_EAPD#
GND1
+3VS
C984
@
0.01U_0402_16V7K
Q67
2N7002_SOT23
HP_EN
2
G
R834
100K_0402_5%
1 0_0402_5%
0.01U_0402_16V7K
R924
+5VS
2006/05/18
Issued Date
Deciphered Date
2007/05/18
C
Title
Size
B
Date:

AMP&Audio Jack/MDC
Document Number
IAYAA (LA-3391P)
Sheet
E
Rev
0.3
26
of
48
SIDERST#
SIDERST#
PCIRST#
10
U5C
O
B
15,20,21,23,24,29,30,33 PCIRST#
SIDE_RST#
16
14
+3VALW
17 IDE_SDD[0..15]
JP21
SIDE_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0
+3VS
17
R302
4.7K_0402_5%
17
IDE_SDA1
17
IDE_SDA0
17 IDE_SDCS1#
1
2
R293 100K_0402_5%
IDE_SDIOW#
IDE_SDIORDY
INT_IRQ15
IDE_SDA1
IDE_SDA0
IDE_SDCS1#
SHDD_LED#
IDE_SDIOW#
17 IDE_SDIORDY
17
INT_IRQ15
MDC 1.5 Conn.
+5VS
R300
+3VALW
TYCO_1-1775149-2~D
29
8.2K_0402_5%
GND
GND
GND
GND
GND
GND
2
@ 0_0603_5%
IDE_SDDREQ 17
IDE_SDIOR# 17
IDE_SDDACK#
IDE_SDDACK# 17
R2961
2100K_0402_5%
+5VS
IDE_SDA2
IDE_SDA2 17
IDE_SDCS3#
IDE_SDCS3# 17
W=80mils
+5VS
1
2
C476
0.1U_0402_10V6K
OCTEK_CDR-50JD1
C867
1 1
@ 10_0402_5%
2
@ 10P_0402_50V8K
+5VS
Placea caps. near ODD CONN.
MDC@
Connector for MDC Rev1.5

C373
+3VALW
1000P_0402_50V7K
1
C372
10U_0805_10V4Z
1
C366
10U_0805_10V4Z
C374
C368
1U_0402_6.3V4Z
0.1U_0402_16V4Z
Compal Secret Data
Issued Date
2006/05/18
Deciphered Date
2007/05/18
Title
Size
B
Date:
ai
l.c
om
C864 MDC@
C865 MDC@
C866
@
1000P_0402_50V7K
0.1U_0402_16V4Z
4.7U_0805_10V4Z
2
2
2

TPM/ ODD CONNECTORS
Document Number
IAYAA (LA-3391P)
nf
@
ho
tm
IDE_SSD7, IDE_SDDREQ Pull down

No reserve longer
AZ_BITCLK_MD 16
R826
1 C982
22P_0402_50V8J
@
1 C983
22P_0402_50V8J
@
1 R276
2 SEC_CSEL
470_0805_5%
13
14
15
16
17
18
2
4
6
8
10
12
1
IDE_SDD8
R733
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDDREQ
IDE_SDIOR#
ai
R866 1
2
MDC@33_0402_5%
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
54
Sheet
he
x
16 AZ_SDOUT_MD
16 AZ_SYNC_MD
16 AZ_SDIN1_MD
16 AZ_RST_MD#
1
3
5
7
9
11
+5VS
SHDD_LED#
JP36
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
53
27
of
48
Rev
0.3
Keep 20 mils minimum spacing between

USB signals and others signals
2
R922 1 @
0_0402_5%
Left USB CONNECTOR

+USB_AS
L34
16
16
USBP2USBP2+
USBP2USBP2+
JP23
1
2
3
4
5
6
7
8
C_USB2C_USB2+
WCM2012F2S-900T04_0805
1.4A
+5VALW
80 mils
291
USB_EN#
USB_EN#
+USB_AS=80 mils
+USB_AS
U6
1
2
3
4
R923 1 @
0_0402_5%
R920 1 @
0_0402_5%
SUYIN_020167MR004S511ZR
+USB_AS
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
1
+
C506
G528_SO8
C294
0.1U_0402_16V4Z
VBUS
DD+
GND
GND
GND
GND
GND
0.1U_0402_16V4Z
1
C399
+
C505
150U_D_6.3VM
2
150U_D_6.3VM
2
+USB_AS
Back side USB Conn.
L35
16
16
USBP1USBP1+
USBP1USBP1+
JP13
C_USB1C_USB1+
WCM2012F2S-900T04_0805
80 mils
+USB_CS
+5VALW
80 mils
U45
USB_EN#
C933
0.1U_0402_16V4Z
1
2
3
4
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
R921 1 @
0_0402_5%
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
SUYIN_020173MR004G565ZR
C932
0.1U_0402_16V4Z
G528_SO8
USB SW Board
JP39
2
16
16
USBP6+
USBP6-
16
16
USBP4+
USBP4-
USBP6+
USBP6USBP4+
USBP4-
+USB_CS
12
11
10
9
8
7
6
5
4
3
2
1
ACES_85201-1205
H1
@ H_S315D118
H2
@ H_S315D118
H5
@ H_S315D118
H6
@ H_S315D118
H7
@ H_S315D118
H8
@ H_S315D118
H21
@ H_C256D126
H22
@ H_C256D126
M1
M2
M3
@ H_O268X169D268X169N @ H_O142X118D142X118N @ H_C122D122N
1
H26
@ H_C256D158
H24
H25
@ H_C118D118N @ H_C244D158
H19
@ H_C217D128
H23
@ H_C256D126
H18
@ H_C217D128
H28
@ H_S228D158
H27
@ H_S228D158
M11
@ H_C71D71N
M4
M5
M6
M7
M8
@ H_C165D165N @ H_C165D165N@ H_C165D165N@ H_C165D165N @ H_C169D169N
H20
@ H_C236D118
H15
@ H_C197D91
FD7
@ FIDUCAL
H14
@ H_C197D91
FD3
@ FIDUCAL
H13
@ H_C197D91
FD6
@ FIDUCAL
H12
@ H_S315D118
FD1
@ FIDUCAL
FD4
@ FIDUCAL
FD5
@ FIDUCAL
H10
H11
@ H_C118D118N @ H_S315D118
CF5
@ SMD40M80
CF3
@ SMD40M80
FD2
@ FIDUCAL
M10
@ H_C315D315N
2006/05/18
Deciphered Date
2007/05/18
Title
Size
B
Date:
Compal Secret Data
Issued Date
FD8
@ FIDUCAL
H4
@ H_S315D118
CF1
@ SMD40M80
CF13
SMD40M80
CF16
@ SMD40M80 @
CF15
@ SMD40M80
1
CF2
@ SMD40M80
H3
@ H_C118D118N
CF7
@ SMD40M80
CF4
@ SMD40M80
CF6
@ SMD40M80
CF8
@ SMD40M80
CF12
@ SMD40M80
CF9
@ SMD40M80
CF14
@ SMD40M80

USB Conn.
Document Number
IAYAA (LA-3391P)
Rev
0.3
Sheet
28
of
48
+3VALW
KBA[0..19] 30
+3VALW
1
C290
16
+5VALW
1
R375
1
R371
EC_SMB_CK1
2
4.7K_0402_5%
EC_SMB_DA1
2
4.7K_0402_5%
1
R156
1
R157
EC_SMB_CK2
2
4.7K_0402_5%
EC_SMB_DA2
2
4.7K_0402_5%
C333
**
@ 100P_0402_50V8J
C332
@ 100P_0402_50V8J
16
1
R112
C301
2
2 ENBKL
100K_0402_5%
MINI_WAKE#
ENBKL
BKOFF#
FSTCHG
EC_SMI#
0.1U_0402_16V4Z
32
1
32
17
2
1
R119
47K_0402_5%
32
16
16
NBA_PLUG
EAPD
LID_SW#
MODE#
VR_ON
PBTN_OUT#
PBTN_OUT#
PADS_LED#
CAPS_LED#
NUM_LED#
PADS_LED#
CAPS_LED#
NUM_LED#
PHDD_LED#
GATEA20
KBRST#
55
54
23
41
19
5
6
31
DAC_BRIG
Digital To Analog
99
100
101
102
1
42
47
174
85
86
91
92
93
94
97
98
PWR_LED#
GPIO
FnLock#/GPIO12 *
CapLock#/GPIO011 *
NumLock#/GPIO0A *
ScrollLock#/GPIO0F *
MISC
ECRST#
GA20/GPIO02
KBRST#/GPIO03
ECSCI#
* GPIO18/XIO8CS#
* GPIO19/XIO9CS#
*GPIO1A/XIOACS#
* GPIO1B/XIOBCS#
Expanded I/O * GPIO1C/XIOCCS#
* GPIO1D/XIODCS#
* GPIO1E/XIOECS#
* GPIO1F/XIOFCS#
D13
1 R150
2 C RY2
C RY1 @ 20M_0402_5%
KILL_SW# 24,31
PM_SLP_S3# 16
PM_SLP_S5# 16
ACIN
31,35
CH751H-40_SC76
ALI/MH#
SKU_ID
AD_BID0
BTN_ID 31
BATT_OVP 37
POUT
41
ALI/MH# 36,37
HDD_LED#
BATT_LOW_LED#
BATT_CHGI_LED#
CB_PWR_OK
BATT_TEMPA 36
+3VALW
R93
IR EF
EN_DFAN1#
C338
ECAGND
2
1
C272 0.01U_0402_16V7K
X2
DAC_BRIG 13
2
100K_0402_5%
1
2
C271 0.22U_0603_16V4Z
1
C342
32.768KHZ_12.5P_1TJS125DJ2A073
IREF
37
EN_DFAN1 33
Analog Board ID definition,

Please see page 3.
PWR_LED# 31
WL_BT_LED# 31
HDD_LED# 31
BATT_LOW_LED# 31
BATT_CHGI_LED# 31
NSE_DPR 26
GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
FANTEST_TP/GPIO05/FAN3PWM
FAN_SPEED1
FAN_SPEED1 33
1
2
R133
4.7K_0402_5%
Timer PinTOUT2/GPIO2F
175
EC_THRM#
E51IT0/GPIO00
E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT
3
4
106
107
E51_RXD
E51_TXD
XCLKI
XCLKO
158
160
C RY2
C RY1
+3VALW
R310 1
2
10K_0402_5%
+S1_VCC
R92
100K_0402_5%
Ra
SPK_SEL 25
EC_THRM# 16
R761
4.7K_0402_5%
EC_RSMRST# 16
SHDD_LED# 27
E51_RXD 33
E51_TXD 33
AD_BID0
1
C284
R101
Rb
KB910Q B4_LQFP176
A
ai
l.c
om
31
171
12
11
17
35
46
122
137
167
+3VALW
EC_SCI#
24 MINI_WAKE#
8
ENBKL
13
BKOFF#
37
FSTCHG
16
EC_SMI#
26 ENCODER_DIR
24
WL_OFF#
16
EC_SWI#
25,26 NBA_PLUG
25,26
EAPD
31
LID_SW#
31
MODE#
25,31,34 SYSON
25,30,34,39,40 SUSP#
41
VR_ON
GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7
SMBus
GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D
Analog To Digital
R116
100K_0402_5%
8
20
21
22
27
28
48
62
63
69
70
75
109
118
119
148
149
155
156
162
168
EC_SCI#
BATT_TEMPA
BTN_ID
BATT_OVP
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
Compal Secret Data
Issued Date
2006/05/18
2007/05/18
Deciphered Date
5
nf
@
ho
tm
2
100K_0402_5%
2
100K_0402_5%
2
100K_0402_5%
2
100K_0402_5%
KBA5
SCL1
SDA1
SCL2
SDA2
KBA4
+3VALW
INVT_PWM 13
BEEP#
26
PWR_SUSP_LED 31
ACOFF
37
USB_EN# 28
EC_ON
31
EC_LID_OUT# 16
EC_EAPD_R# 26
ENCODER_PULSE 26
81
82
83
84
87
88
89
90
1
R372
1
R376
1
R377
IN
163
164
169
170
+3VALW
KBA1
EC_PME#
GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7
2
4.7K_0402_5%
2
4.7K_0402_5%
OUT
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
1
R357
TP_DATA 1
R358
10P_0402_50V8J
TP_CLK
TP_DATA
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
+5VS
TP_CLK
Title
ENE-KB910

Date:
ai
1
R838
1
R839
1
R840
1
R841
MODE#
FR D#
SELIO#
FSEL#
BTN_ID
NC
32
32
30,36
30,36
4
4
+3VALW
Interface
R460
10K_0402_5%
NC
PSCLK1
PSDAT1
PSCLK2
PSDAT2PS2
PSCLK3
PSDAT3
R91
100K_0402_5%
EC_PLAYBTN# 31,32
EC_STOPBTN# 31,32
EC_REVBTN# 31,32
EC_FRDBTN# 31,32
KSI4
32
KSI5
32
KSI6
32
KSI7
32
ON/OFF
KILL_SW#
110
111
114
115
116
117
2
26
29
30
44
76
172
176
SKU_ID
8 PSCLK1
7 PSDATA1
6 PSCLK2
5 PSDATA2
4.7K_1206_8P4R_5%
GPWU0
GPWU1
GPWU2
GPWU3
Pin
GPWU4
GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7
INVT_PWM
BEEP#
PW R_SUSP_LED
ACOFF
USB_EN#
EC_ON
EC_LID_OUT#
31
+3VALW
he
x
1
2
3
4
32
33
36
37
38
39
40
43
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO17
R459
@10K_0402_5%
RP18
GPOW0/PWM0
GPOW1/PWM1
FAN2PWM/GPOW2/PWM2
GPOW3/PWM3
Width GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6
FAN1PWM/GPOW7/PWM7
Wake Up
KSO[0..15] 32
0.1U_0402_16V4Z
IE_BTN#
2
+3VALW
R114
71
72
73
74
77
78
79
80
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
18K_0402_5%
31
+5VS
GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7
KSO17
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
10P_0402_50V8J
EC_PME#
EC_PME#
Pulse
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154
31,32
20
KSO[0..15]
+3VALW
GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8
GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17
2
1
R152
10K_0402_5%
X-BUS Interface
+3VALW
C
KSI[0..7]
RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN
1U_0402_6.3V4Z
FRD#
FWR#
FSEL#
C339
30
30
30
150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105
15,21,30,33 SERIRQ
15,20,21 PM_CLKRUN#
1
@10_0402_5%
ENE-KB910-B4
1
2
R125
C306
@22P_0402_50V8J
KSI[0..7]
GND
GND
GND
GND
GND
GND
0.1U_0402_16V4Z
FR D#
FWR#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
IE_BTN#
1
@ 100K_0402_5%
PSCLK1
PSDATA1
PSCLK2
PSDATA2
TP_CLK
TP_DATA
15 CLK_PCI_LPC
0.1U_0402_16V4Z
LAD0
LAD1
LAD2
LAD3
LFRAME# LPC Interface
LRST#/GPIO2C
LCLK
SERIRQ
CLKRUN#/GPIO0C *
LPCPD#/GPIO0B *
VCC
VCC
VCC
VCC
VCC
VCC
VCC
15
14
13
10
9
165
18
7
25
24
95
U8
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
15,30,33 LPC_AD0
15,30,33 LPC_AD1
15,30,33 LPC_AD2
15,30,33 LPC_AD3
15,19,30,33 LPC_FRAME#
15,20,21,23,24,27,30,33 PCIRST#
VCCA
16
34
45
123
136
157
166
C327
C330
1000P_0402_50V7K
159
C315
1000P_0402_50V7K
1
1
BATGND
C273
2
2
0.1U_0402_16V4Z
Internal Keyboard
2
2
0.1U_0402_16V4Z
ECAGND
ECAGND
2 0_0603_5%
96
C328
L20
161
ADB[0..7] 30
0.1U_0402_16V4Z
1
2
VCCBAT
0.1U_0402_16V4Z
1
1 C292
1
C309
AGND
ADB[0..7]
KBA[0..19]
Sheet
1
29
of
48
Rev
0.3
+3VALW
+5VALW
C341
1
R145
VCC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
INT_FLASH_EN#
FSEL#
R176
100K_0402_5%
2
FSEL#
29
22_0402_5%
29,36 EC_SMB_CK1
29,36 EC_SMB_DA1
INT_FSEL# 1
U11
R178
100K_0402_5%
8
7
6
5
0.1U_0402_16V4Z
C324
2 0.1U_0402_16V4Z
14
+5VALW
U12A
AT24C16AN-10SI-2.7_SO8
LPC Debug Port
R158
+3VS
100K_0402_5%
JP30
+3VALW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
R170
100K_0402_5%
SUSP#
25,29,34,39,40
U12B
EC_FLASH# 16
P
6
29
KBA[0..19]
ADB[0..7]
KBA[0..19]
CLK_PCI_SIO 15,33
SERIRQ 15,21,29,33
SERIRQ
29
1MB Flash ROM
ADB[0..7]
+3VALW
1MB ROM Socket
U13
29
CLK_14M_SIO 12
LPC_AD0 15,29,33
LPC_AD1 15,29,33
LPC_AD2 15,29,33
LPC_AD3 15,29,33
LPC_FRAME# 15,19,29,33
LPC_DRQ1# 15,33
PCIRST# 15,20,21,23,24,27,29,33
@ ACES_85201-2005
FWR#
29
CLK_14M_SIO
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ1#
PCIRST#
1 R458
2 @ 0_0402_5%
Q28
2N7002_SOT23
FWE#
14
2
G
+3VALW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
FRD#
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
INT_FSEL#
FR D#
FWE#
22
24
9
CE#
OE#
WE#
VCC0
VCC1
31
30
D0
D1
D2
D3
D4
D5
D6
D7
25
26
27
28
32
33
34
35
RP#
NC
READY/BUSY#
NC0
NC1
10
11
12
29
38
GND0
GND1
23
39
1
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
RESET#
C352
JP8
0.1U_0402_16V4Z
SB_INT_FLASH_SEL tie to ATI SB

GPIO1 and pull down
1
2
R179
100K_0402_5%
+3VALW
16 SB_INT_FLASH_SEL
KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
SB_INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
KBA17
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4
+3VALW
ADB3
ADB2
ADB1
ADB0
FR D#
FSEL#
KBA0
@ SUYIN_80065AR-040G2T
SST39VF080-70_TSOP40
Compal Secret Data
Issued Date
2006/05/18
Deciphered Date
2007/05/18
Title
Size
B
Date:

BIOS& I/O PORT
Document Number
IAYAA (LA-3391P)
Rev
0.3
Sheet
30
of
48
Switch Board Conn.

JP3
KSO17
29,32 EC_PLAYBTN#
29,32 EC_STOPBTN#
29,32 EC_FRDBTN#
29,32 EC_REVBTN#
29
BTN_ID
1
2
3
4
5
6
7
8
9
10
11
12
KSO17
ON/OFFBTN#
PWR_LED_1#
PWR_SUSPLED#
IEBTN#
MODEBTN#
EC_REVBTN#
EC_FRDBTN#
EC_PLAYBTN#
EC_STOPBTN#
C173 1
2 220P_0402_50V7K
C179 1
2 220P_0402_50V7K
C168 1
2 220P_0402_50V7K
C153 1
2 220P_0402_50V7K
C160 1
2 220P_0402_50V7K
C178 1
2 220P_0402_50V7K
C181 1
2 220P_0402_50V7K
C169 1
2 220P_0402_50V7K
C146 1
2 220P_0402_50V7K
C167 1
2 220P_0402_50V7K
LID Switch
+3VALW
D
29
PWR_LED_1#
PWR_SUSPLED#
ON/OFFBTN#
IEBTN#
KSO17
MODEBTN#
EC_PLAYBTN#
EC_STOPBTN#
EC_FRDBTN#
EC_REVBTN#
BTN_ID
R814
47K_0402_5%
U39
A3212EEH_MLP6
2
ACES_85201-1205
5
LID_SW# 29
1
NC
NC
GND
C846
10P_0402_25V8K
C845
0.1U_0402_16V4Z
LID_SW#
VDD OUTPUT
+3VALW
+3VALW
PWR_SUSP_LED
PWR_SUSP_LED 29
SYSON 25,29,34
2
G
10K
Q14
2N7002_SOT23
1
PWR_LED#
PWR_LED# 29
2
G
47K
10K
SYSON
SYSON
Q13
2N7002_SOT23
47K
+3VALW
R48
PWR_SUSPLED#
PWR_SUSPLED1#
R49
Change from 120 to 300

1
2
120_0402_5%
1
PWR_LED_0#
SW6
D26
PWR_LED_1#
2
120_0402_5%
ON/OFFBTN#
51_ON#
51_ON#
51_ON# 35
D24
RLZ20A_LL34
2
2N7002_SOT23
4.7K_0402_5%
29
C455
Q38
2
3
MODE#
2
G
+3VALW
2
1
35
1
1
EC_ON
EC_ON
R247
MODEBTN#
29
51_ON#
1000P_0402_50V7K
SMT1-05_4P
29
ON/OFF
CHN202U_SC70
6
5
2
120_0402_5%
R244
100K_0402_5%
R47
R50
Change from 300 to 120

1
2
120_0402_5%
Power Button
SUSPLEDS#
Q11
DTA114YKA_SC59
PWR_LEDS
Q12
DTA114YKA_SC59
D25
DAN202U_SC70
R246
100K_0402_5%
WL&BT LED
1
B
IEBTN#
1
3
IE_BTN# 29
POWER/ON LED
51_ON#
D27
DAN202U_SC70
+3VALW
D16
PWR_SUSPLED1#
D43
R446 1
2
WLAN@ 120_0402_5%
WLAN@
AC IN LED
+3VALW
WL_BT_LED#
WL_BT_LED# 29
PWR_LED_0#
HT-191UD_AMBER_0603
HT-191UD_AMBER_0603
D35
2
1
HT-191UYG-DT_GRN_0603
D15
2
+3VALW
ACIN
Kill SWITCH
D
Q50
2
G
3
29,35
120_0402_5% HT-191UYG-DT_GRN_0603
R194 2
S 2N7002_SOT23
R447
100K_0402_5%
SW7
BATTERY CHG
KILL_SW#
HDD LED
+3VS
D18
KILL_SW# 24,29
1 R195
2
120_0402_5%
HDD_LED# 29
WLAN@ 1BS003-1211L_3P
BATT_CHGI_LED#
BATT_CHGI_LED# 29
om
Compal Secret Data
2006/05/18
Issued Date
2007/05/18
Deciphered Date
5
Title

Kill SW/ Sub Conn./LEDS

Date:
Sheet
1
he
x
1 R193
2
120_0402_5%
nf
@
ho
tm
ai
BATT_LOW_LED# 29
D36
ai
BATT_LOW_LED#
1
HT-191UD_AMBER_0603
1 R192
2
2
120_0402_5% D17
+3VALW
l.c
31
of
R ev
0.3
48
KSI[0..7]
KSI[0..7]
KSO[0..15]
29,31
KSO[0..15] 29
INT_KBD CONN.
JP5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
TP Conn.
C938
0.1U_0402_16V4Z
2
ACES_85201-0605
+5VS
29
29
TP_DATA
TP_CLK
SW_R
1
2
3
4
5
6
JP41
SW_R
SW_L
TP_DATA
TP_CLK
C934 100P_0402_25V8K
SW_L
C935 100P_0402_25V8K
TP_DATA
C936 100P_0402_25V8K
TP_CLK
C937 100P_0402_25V8K
KSO15
KSO14
KSO10
KSO11
KSO8
KSO9
KSO13
KSI7
KSO3
KSO7
KSO12
KSI4
KSI6
KSI5
KSO6
KSO5
KSI3
KSI0
KSO0
KSO1
KSI1
KSI2
KSO2
KSO4
NUM_LED# 29
PADS_LED# 29
CAPS_LED# 29
1
2
300_0402_5%
R297
+3VS
1
300_0402_5%
1
300_0402_5%
+3VS
R298
+3VS
R299
ACES_88170-3400
T/P Button
SW9
SW8
SW_R
4
SMT1-05_4P
6
5
SMT1-05_4P
6
5
SW_L
D50
PSOT24C_SOT23
@
1
KSO7
C241
100P_0402_25V8K
KSO15
C250
100P_0402_25V8K
KSO6
C236
100P_0402_25V8K
KSO14
C249
100P_0402_25V8K
KSO5
C235
100P_0402_25V8K
KSO13
C244
100P_0402_25V8K
KSO4
C227
100P_0402_25V8K
KSO12
C240
100P_0402_25V8K
KSO3
C242
100P_0402_25V8K
KSI0
C233
100P_0402_25V8K
KSI4
C239
100P_0402_25V8K
KSO11
C247
100P_0402_25V8K
KSO2
C228
100P_0402_25V8K
KSO10
C248
100P_0402_25V8K
KSO1
C231
100P_0402_25V8K
KSI1
C230
100P_0402_25V8K
KSO0
C232
100P_0402_25V8K
KSI2
C229
100P_0402_25V8K
KSI5
C237
100P_0402_25V8K
KSO9
C245
100P_0402_25V8K
KSI6
C238
100P_0402_25V8K
KSI3
C234
100P_0402_25V8K
KSI7
C243
100P_0402_25V8K
PADS_LED# C252
100P_0402_25V8K
KSO8
C246
100P_0402_25V8K
NUM_LED#
C253
100P_0402_25V8K
CAPS_LED# C251
100P_0402_25V8K
Compal Secret Data
2006/05/18
Issued Date
2007/05/18
Deciphered Date
5
Title

KB/Touch Pad& hibernation

Date:
Sheet
1
32
of
Rev
0.3
48
FAN Conn
+3VALW
2
B
LM358DT_SO8
14
12
13
FAN1_ON
10
2 R874
1
100_0402_5%
D22
1SS355_SOD323
U12C
R875
FAN1
JP17
3
2
1
D23
1N4148_SOT23
1
+
+3VS
14
1
2
R240
8.2K_0402_5%
+3VALW
ACES_85205-0300
C449
2 22U_B_10VM
1 R41
2
10K_0402_5%
C171
@ 1000P_0402_50V7K
11
12
13
O
7
29 FAN_SPEED1
10K_0402_5%
@
Q36
FMMT619_SOT23
8
5
2
1
0_0402_5%
2 R239
1
10K_0402_5%
EN_DFAN1
29 EN_DFAN1
11
U5D
PU5B
R836
14
+3VALW
+5VS
VS
2
C170
@ 1000P_0402_50V7K
U12D
29
+3VALW
R780
@ 0_0402_5%
1
2
E51_RXD
E51_RXD
SERIRQ
15,21,29,30 SERIRQ
1
R782
0_0402_5%
15,29,30 LPC_AD3
15,29,30 LPC_AD1
R779
@ 0_0402_5%
2
1
2
R781
0_0402_5%
PCIRST#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
LPC_FRAME# 10
LPC_DRQ1#
E51_TXD 29
LPC_DRQ1# 15,30
PCIRST# 15,20,21,23,24,27,29,30
LPC_AD2 15,29,30
LPC_AD0 15,29,30
CLK_PCI_SIO
E51_TXD
CLK_PCI_SIO 15,30
15,19,29,30 LPC_FRAME#
H36
R823
22_0402_5%
@ DEBUG_PAD
BOM
ZZZ1
PJP1 45@
U21
C857
22P_0402_50V8J
ME@
LPC Debug card

PCB ZHH LA-3391P REV0 M/B
DCJACK-MB
216ECP4ALA13FG-RC410ME
Deciphered Date
2007/05/18
A
Title
Size
B
Date:

FAN & MDC
Document Number
IAYAA (LA-3391P)
ai
2006/05/18
Issued Date
he
x
Compal Secret Data
nf
@
ho
tm
ai
l.c
om
Sheet
E
33
of
48
Rev
0.3
+1.8V TO +1.8VS
+5VALW TO +5VS
+1.8VS
+5VALW
C607
R418
1U_0402_6.3V4Z
1 R417
2
22K_0402_5%
+VSB
C618
S
SUSP
2
G
Q45
2N7002_SOT23
2
G
Q47
470_0805_5%
2
1
2
S
2N7002_SOT23
2
G
Q17
SI4800BDY_SO8
1
C624
2
G
Q18
2N7002_SOT23
1
2
3
4
S
S
S
G
SUSP
470_0805_5%
+VSB
D
D
D
D
C222
100K_0402_5%
C625
0.1U_0402_16V7K
1U_0402_6.3V4Z R58
1
8
7
6
5
4.7U_0805_10V4Z
Q46
2N7002_SOT23
C208
SI4800BDY_SO8
1
4.7U_0805_10V4Z
C225
10U_0805_10V4Z
R52
1
2
3
4
S
S
S
G
4.7U_0805_10V4Z
D
D
D
D
0.1U_0402_16V7K
8
7
6
5
+5VS
C226
Q19
+1.8V
+1.8VALW TO +1.8V
+5VALW
+5VALW
+1.8V
C26
S
SYSON#
2
G
Q7
2N7002_SOT23
2
G
Q9
Q16
2N7002_SOT23
S
25,29,31
SYSON
SYSON#
2
G
25,29,30,39,40 SUSP#
SUSP
SUSP
Q15
2N7002_SOT23
2
G
R53
R54
10K_0402_5%
10K_0402_5%
1U_0402_6.3V4Z
1 R18
2
+VSB
100K_0402_5%
40
R24
R56
10K_0402_5%
470_0805_5%
C16
R55
10K_0402_5%
4.7U_0805_10V4Z
SI4800BDY_SO8
1
S
S
S
G
C24
D
D
D
D
1
2
3
4
0.1U_0402_16V7K
4.7U_0805_10V4Z
8
7
6
5
C27
2N7002_SOT23
Q4
+1.8VALW
+3VALW TO +3VS
+1.2VS
C611
S
SUSP
2
G
Q51
2N7002_SOT23
2
G
Q49
2
G
Q10
SUSP
@ 470_0805_5%
1
1
2
470_0805_5%
1
D
R109
2N7002_SOT23
+VSB
R415
1U_0402_6.3V4Z
1 R416
2
68K_0402_1%
R39
1
4.7U_0805_10V4Z
2
C610
C622
SI4800BDY_SO8
1
1
2
3
4
2N7002_SOT23
C608
S
S
S
G
0.1U_0402_16V7K
4.7U_0805_10V4Z
D
D
D
D
470_0805_5%
Q48
8
7
6
5
+0.9VS
+3VS
2N7002_SOT23
+3VALW
2 SUSP
G
Q25
Compal Secret Data
2006/05/18
Issued Date
Deciphered Date
2007/05/18
A
Title
Size
B
Date:

DC-DC INTERFACE
Document Number
IAYAA (LA-3391P)
Sheet
E
Rev
0.3
34
of
48
VS
VIN
1
PR2
5.6K_0402_5%
2
3
LM393DG_SO8
PC6
0.1U_0402_16V7K
2
0.068U_0402_10V6K
1
PR8
10K_0402_1%
VIN
High 18.384 17.901 17.430

Low 17.728 17.257 16.976
1
N1
1
2
PR11
1K_1206_5%
PR12
200_0603_5%
1
2
VS
PD4
2
VIN
PC8
0.1U_0603_25V7K
N3
RLS4148_LLDS2
1
2
PR13
1K_1206_5%
B+
PC7
0.22U_1206_25V7K
PR14
100K_0402_1%
2
PR15
22K_0402_1%
51_ON#
PR10
68_1206_5%
2
PR9
68_1206_5%
PQ1
TP0610K-T1-E3_SOT23
31
37,38
Vin Detector
RTCVREF
3.3V
PD2
RLS4148_LLDS2
1
RLS4148_LLDS2
CHGRTCP
PACIN
PD3
2
BATT+
29,31
PR7
10K_0402_1%
PD1
RLZ4.3B_LL34
PC5
PACIN
1
1
PR6
20K_0402_1%
ACIN
PU1A
@ SINGA_2DW-0005-B03
PR4
10K_0402_1%
1
2
PC4
100P_0402_50V8J
PC3
1000P_0402_50V7K
PR5
22K_0402_1%
1
2
PC2
100P_0402_50V8J
PC1
1000P_0402_50V7K
VS
PR3
84.5K_0402_1%
1
1
DC_IN_S2
7A_24VDC_429007.WRML
DC_IN_S1
PJP1
DC301000F00
PR1
1M_0402_1%
1
2
VIN
PL1
FBMA-L18-453215-900LMA90T_1812
1
2
PF1
1
2
PR16
1K_1206_5%
LM393DG_SO8
2
6
PC13
1000P_0402_50V7K
1 VL
PR23
34K_0402_1%
PR25
66.5K_0402_1%
PC12
1000P_0402_50V7K
PR24
499K_0402_1%
PR26
191K_0402_1%
RB715F_SOT323
PC11
1000P_0402_50V7K
ACON
37
PU1B
4,16,36,38 MAINPWON
PD6
PD5
RLZ16B_LL34
PC10
1U_0805_25V4Z
1
2
1
2
GND
PC9
10U_0805_10V4Z
PR20
499K_0402_1%
N2
IN
OUT
PR19
2.2M_0402_5%
2
1
3.3V
PR18
100K_0402_1%
1
2
VL
PR17
200_0603_5%
PU2
G920AT24U_SOT89
2
PR22
560_0603_5%
1
2
+CHGRTC
PR21
560_0603_5%
1
2
RTCVREF
PJ1
2
+1.8VALWP
+3VALW
PJ3
2
@
+1.8VALW
PQ2 D
(8A,320mils ,Via NO.= 16)

+5VALWP
@ JUMP_43X118
Precharge detector
15.97V/14.84V FOR
ADAPTOR
PJ4
+5VALW
+1.2VSP
JUMP_43X118
+1.2VS
@ JUMP_43X118
PR27
47K_0402_1%
2
2
1
RHU002N06_SOT323
G
PQ3
DTC115EUA_SC70

2
PJ5
2
+0.9VSP
@ JUMP_43X39
+5VALWP
PJ6
+VSB
+0.9VS
3
+VSBP
PACIN
JUMP_43X118
PJ2
2
+3VALWP
@ JUMP_43X79
(120mA,40mils ,Via NO.= 2)
PJ7
PJ8
+1.05VSP
+1.5VSP
1
+1.05VS
+1.5VS
@ JUMP_43X39
@ JUMP_43X79
(0.35A,40mils ,Via NO.=2)
om
Deciphered Date
2007/05/18
A
Title
DCIN & DETECTOR

Size
Date:
Document Number
ai
2006/05/18
R ev
0.1
he
x
Issued Date
Compal Secret Data
nf
@
ho
tm
ai
l.c

D
Sheet
35
of
48
PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 45 degree C
VL
PR33
1K_0402_1%
PC15
1000P_0402_50V7K
PR32
13.7K_0402_1%
1
2
PC16
0.01U_0402_25V7K
TM_REF1
PQ4
DTC115EUA_SC70
VL
PR37
100K_0402_1%
1
PD7
1SS355_SOD323
LM393DG_SO8
PR39
100K_0402_1%
2
+3VALW
PC18
1000P_0402_50V7K
PR36
22K_0402_1%
PR38
6.49K_0402_1%
2
1
ALI/MH# 29,37
PR34
100_0402_5%
PC17
0.22U_0805_16V7K
PR35
100_0402_5%
PU3A
O
@ SUYIN_250005MR007G132ZR
MAINPWON 4,16,35,38
+3VALW
PR28
47K_0402_1%
PR31
47K_0402_1%
1
2
ALI/NIMH#
AB/I
TS_A
EC_SMDA
EC_SMCA
PC14
0.1U_0603_25V7K
2
3
4
5
6
7
PH1
100K_0603_1%_TH11-4H104FT
2
ID
B/I
TS
SMD
SMC
GND
PL2
FBMA-L18-453215-900LMA90T_1812
1
2
BATT+
BATT_S1
BATT+
PJP2
VS
VMB
560P_0402_50V7K
2
PF2
12A_65VDC_451012
1
2
PR29
1K_0402_1%
1
2
1
2
PR30
47K_0402_1%
VL
PC128
1
PR40
1K_0402_1%
PH2 near main Battery CONN :

BAT. thermal protection at 79 degree C
Recovery at 45 degree C
BATT_TEMPA 29
EC_SMB_DA1 29,30
EC_SMB_CK1 29,30
VL
VL
PR42
47K_0402_1%
1
2
PR48
0_0402_5%
2
S PQ6
RHU002N06_SOT323
O
4
PR44
22K_0402_1%
PU3B
1
3
LM393DG_SO8
PD8
1SS355_SOD323
PC19
0.22U_0805_16V7K
1
2
2
1
2
PC20
0.22U_1206_25V7K
2
G
POK
PC22
0.1U_0402_16V7K
1
2
PR47
100K_0402_1%
38,39
2
1
PR45
100K_0402_1%
PR46
22K_0402_1%
1
2
VL
+VSBP
1
PC21
0.1U_0603_25V7K
B+
TM_REF1
PR43
10.7K_0402_1%
1
2
PQ5
TP0610K-T1-E3_SOT23
PR41
47K_0402_1%
PH2
100K_0603_1%_TH11-4H104FT
Issued Date
Compal Secret Data
2006/05/18
Deciphered Date
2007/05/18
A
Title
BATTERY CONN / OTP

Size
Date:
Document Number
R ev
0.1

D
Sheet
36
of
48
Fosc=14100/Rt=14100/47=300KHz
Iadp=0~3.125A
OUT
20
VREF
VH
19
ACIN XACOK
18
-INE1
RT
17
+INE1
4
2
PR54
10K_0402_1%
PC27
2200P_0402_50V7K
1
2
PC26
0.1U_0603_25V7K
PC25
4.7U_1206_25V6K
3
2
1
5
6
7
8
14
-INC1
+INC1
13
LXCHRG
3
2
BATT+
BATT+
PR67
1
VL
100K_0402_1%
PC40
10P_0402_50V8J
1
2
CTL
PR60
0.02_2512_1%
1
4
2
SEL
12
PC35
1500P_0603_50V7K
21
2
PD9
EC31QS04
11
PR66
33K_0402_1%
MB39A126 1
PD14
EC31QS04
1
15
PL3
16UH_LF919AS-160M=P3_3.7A_20%
1
2
ACOFF 29
PQ12
DTC115EUA_SC70
OUTC1 FB123
16
1
PR63
47K_0402_5%
-INE3
10
VIN
PR62
47K_0402_1%
1
2
PC39
0.01U_0402_25V7K
PC32
0.1U_0603_25V7K
1
2
ACOFF
PC130
560P_0402_50V7K
VCC
ACOK
PC38
4.7U_1206_25V6K
2
1
-INE2
CS
ACOFF#
22
21
+INE2
PQ11
AO4407_SO8
PC37
4.7U_1206_25V6K
2
1
CS
PC29
0.22U_0603_16V7K
1
2
PC30
0.1U_0603_25V7K
1
2
VIN
23
PC36
4.7U_1206_25V6K
GND
ALI/MH#
PQ16
DTC115EUA_SC70
PC41
47P_0402_50V8J
1
2
VMB
LI-3S :13.5V----BATT-OVP=1.5V
LI-4S :18V----BATT-OVP=2V
BATT-OVP=0.111*BATT+
om
LM358DT_SO8
1.25V/(20*0.02)=3.125A
0
G
PU5A
+ 3
5V*(10K/(30k+10k))=1.25V
1
2
8
P
PQ18
DTC115EUA_SC70
CP Point=3.125A
PC43
0.01U_0402_25V7K
PQ17
DTC115EUA_SC70
1.2/(20*0.02)=3A
1
2
1
PR73
PR72
499K_0402_1% 340K_0402_1%
VS
29 BATT_OVP
(100K/(100K+162K))*3.144V=1.2V
Charge voltage
3S CC-CV MODE : 12.6V (SEL=L , ALI/MH#=3.3V)
4S CC-CV MODE : 16.8V (SEL=H , ALI/MH#=0V)
1
PR74
105K_0402_1%
1
PR71
47K_0402_5%
CC=3A , IREF=3.144V
CS
FSTCHG
PR52
47K_0402_1%
1
2
1
OUTC2
29
+3VALW
8
7
6
5
1
PR69
47K_0402_5%
PC33
0.22U_0603_16V7K
1
29,36
IREF=0.932*Icharge
IREF=0.466~3.1V
ACON
PC42
0.01U_0402_25V7K
35
PACIN
1
PR57
10K_0402_1%
2
1
PR58
30K_0402_1%
2
S PQ15
RHU002N06_SOT323
1
PR68
100K_0402_1%
1
3
35,38
PR61
PC34
1K_0402_1% 2200P_0402_50V7K
2
1
2
PR65
10K_0402_1%
2
1
PD10
RLS4148_LLDS2
2
PR70
22K_0402_1%
1
2
MB39A1261
PR64
162K_0402_1%
29
1
2
2
G
PR56
100K_0402_1%
2
1
PU4
MB39A126PFV-ER_SSOP24
1 -INC2 +INC2 24
1
2
PC31
0.01U_0402_25V7K
1
PR59
150K_0402_1%
2
PQ14
RHU002N06_SOT323
IREF
ACOFF#
PC28
4700P_0402_25V7K
1
2
2
G
P2
PQ13
DTC115EUA_SC70
JUMP_43X118
2
PR55
10K_0402_1%
1
2
47K
1
3
1
3
1
2
3
CHG_B+
PJ9
560P_0402_50V7K
3
2
PC129
MB39A126
1
PR53
0_0603_5%
PQ7
AO4407_SO8
PQ10
DTA144EUA_SC70
47K
8
7
6
5
1
PR51
47K_0402_5%
1
2
3
PC23
0.1U_0603_25V7K
2
1
PR50
200K_0402_1%
VIN
P3
PQ9
AO4407_SO8
1
2
3
Charger
B+
PR49
0.02_2512_1%
P2
PQ8
AO4407_SO8
8
7
6
5
PC24
4.7U_1206_25V6K
Deciphered Date
2007/05/18
A
Title
CHARGER
Size
Date:
ai
2006/05/18
Document Number
R ev
0.1
he
x
Issued Date
Compal Secret Data
nf
@
ho
tm
ai
l.c

D
Sheet
37
of
48
+3.3VALWP/+5VALWP
BST_3V
BST_5V
PD11
DAP202U_SOT323
B+++
5
6
7
8
D
D
D
D
D
D
D
D
4
3
2
1
1
2
1
2
PR80
200K_0402_1%
PL5
4.7U_LF919AS-4R7M-P3_5.2A_20%
DL_3V
LX_3V
FB3
36,39
POK
PR89
6.81K_0402_1%
+3VALWP
1
2
MAX8734AEEI+_QSOP28
PR93
0_0402_5%
+
PR92
10K_0402_1%
7
2
BST_3V-1 2 PR85
1
DH_3V-1 0_0603_5%
PC56
0.1U_0603_25V7K
2
1
28
26
24
27
22
1
PC61
1
4
3
2
1
5
6
7
8
BST3
DH3
DL3
LX3
OUT3
PR84
0_0603_5%
ILIM5
PR83
340K_0402_1%
11
2
ILIM5
PR79
200K_0402_1%
1
2
ILIM3
FB3
PGOOD
PC45
4.7U_1206_25V6K
2
1
PC44
4.7U_1206_25V6K
2
1
1
2
5
PR82
340K_0402_1%
2
1
17
VCC
TON
PC54
1U_0603_6.3V6M
PR75
47_0402_5%
PC52
0.1U_0603_25V7K 1
PR77
10_1206_5%
2
1
2
13
20
V+
ILIM3
PQ21
SI4810BDY-T1-E3_SO8
PC59
150U_V_6.3VM_R18
PC62
0.047U_0603_16V7K
PR94
VL
PR95
0_0402_5%
2
1
REF
DH_3V
2VREF_8734
PRO#
SKIP#
4.7U_0805_6.3V6K
1
2 10
12
2VREF_8734
PC60
2
1
18
SHDN#
ON5
ON3
PQ19
SI4800BDY-T1-E3_SO8
4,16,35,36 MAINPWON
6
4
3
8
PR173
0_0402_5%
LX5
DL5
OUT5
FB5
N.C.
23
2
2
PR88
1
2
@ 10K_0402_1%
PACIN
1
PR90
100K_0402_1%
35,37
47K_0402_1%
RLZ5.1B_LL34
806K_0603_1%
PC58
2.2U_0805_25V6K
2
2
PR91
6.81K_0402_1%
150U_V_6.3VM_R18
PC57
PR87
10.5K_0402_1%
FB5
PR86
15
19
21
9
1
LDO3
DL_5V
VS
PC49
0.1U_0402_16V7K
DH5
25
LX_5V
PD12
BST5
LD05
PR81 1 BST_5V-1
14
0_0603_5%
16
+5VALWP
PU6
GND
S
S
S
G
1
2
3
4
PC55
0.1U_0603_25V7K
2
1
PL4
4.7U_LF919AS-4R7M-P3_5.2A_20%
0.22U_0603_10V7K
D
D
D
D
PQ22
SI4810BDY-T1-E3_SO8
DH_5V-1
PC50
2.2U_0805_25V6K
2
1
PC53
4.7U_0805_6.3V6K
2
1
VL
8
7
6
5
1
2
3
4
PR78
0_0603_5%
DH_5V 1
2
PC51
PR76
2.2U_0805_25V6K
10_1206_5%
2
1
2
1
PQ20
SI4800BDY-T1-E3_SO8
S
S
S
G
D
D
D
D
8
7
6
5
PC48
2200P_0402_50V7K
2
1
PC47
4.7U_1206_25V6K
2
1
PC46
4.7U_1206_25V6K
2
1
B+++
@ JUMP_43X118
G
S
S
S
G
S
S
S
B+
B+++
VL
PJ10
Compal Secret Data
2006/05/18
Issued Date
Deciphered Date
2007/05/18
+5V/+3V
5
Title

Custom
IAYAA (LA-3391P)
Date:
Sheet
1
Rev
0.1
38
of
48
PJ11
1
2
PC66
4.7U_1206_25V6K
2
1
PC69
2.2U_0805_10V6K
PR97
2.2_0603_5%
ISEN1
ISEN2
22
LGATE2
ISE_1.8V
LX_1.8V
PR106
2K_0402_1%
1
2
PQ26
SI4810BDY-T1-E3_SO8
27
PR104
@ 4.7_1206_5%
PR108
0_0402_5%
PC79
@ 680P_0603_50V8J
VOUT2
VSEN2
EN2
PG2/REF
20
19
21
16
11
OCSET1
OCSET2
18
DL_1.8V
1
2
0_0402_5%
1
1
2
13
PR117
2
PR110 @ 0_0402_5%
PR112
2
ISL6227CAZ-T_SSOP28
PR118
100K_0402_1%
PC80
@ 0.1U_0402_16V7K
PR109
PC77
220U_6.3V_M_R13
2
10.2K_0402_1%
VSE_1.8V
1
+3VALW
VOUT1
VSEN1
EN1
PG1
PC78
0.01U_0402_25V7K
9
10
8
15
2
PR116
@ 0_0402_5%
PR113
6.49K_0402_1%
26
1
+
POK
36,38
PR114
@ 0_0402_5%
PC81
@ 0.1U_0402_16V7K
PR115
10K_0402_1%
0_0402_5%
PGND2
DDR
VSE_1.2V
2
PR111
PGND1
GND
SUSP#
25,29,30,34,40
+1.8VALWP
4
3
2
1
LGATE1
PR102
0_0603_5%
+1.8VALWP
PL7
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2
25
DH_1.8V-2
PHASE2
PHASE1
UGATE2
5
6
7
8
D
D
D
D
28
VCC
14
UGATE1
24
PQ24
SI4800BDY-T1-E3_SO8
DL_1.2V
PR107
0_0402_5%
DH_1.8V-1
PC73
0.1U_0402_16V7K
2
1
ISE_1.2V
BST_1.8V-2
1
PR99
0_0603_5%
PR101
0_0603_5%
PQ25
SI4810BDY-T1-E3_SO8
PR105
2K_0402_1%
1
2
DH_1.2V-1
23
2 1
BOOT2
G
S
S
S
PR98
0_0603_5%
BOOT1
4
3
2
1
SOFT2
PC71
0.01U_0402_25V7K
1
17 2
5
6
7
8
2BST_1.2V-2 6
VIN
BST_1.2V-1
PC70
0.01U_0402_25V7K PU7
2
1
12 SOFT1
D
D
D
D
S
S
S
G
1
2
3
4
2
2
PC76
@ 680P_0603_50V8J
PC75
0.01U_0402_25V7K
PR103
2.21K_0402_1%
B+
G
S
S
S
PR100
@ 4.7_1206_5%
8
7
6
5
PC74
220U_6.3V_M_R13
8
7
6
5
D
D
D
D
S
S
S
G
PC72
0.1U_0402_16V7K
2
1
D
D
D
D
DH_1.2V-2
1
2
3
4
PL6
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2 LX_1.2V
JUMP_43X118
BST_1.8V-1
PQ23
SI4800BDY-T1-E3_SO8
+1.2VSP
PC65
4.7U_1206_25V6K
+5VALWP
1
2
PC68
0.1U_0603_25V7K
PD13
DAP202U_SOT323
+1.2V
PR96
0_1206_5%
PC67
4.7U_0805_6.3V6K
1
2
PC64
4.7U_1206_25V6K
PC63
4.7U_1206_25V6K
100K_0402_1%
om
Deciphered Date
2007/05/18
A
Title
1.8V / 1.2V
Size
Date:
ai
2006/05/18
Document Number
R ev
0.1
he
x
Issued Date
Compal Secret Data
nf
@
ho
tm
ai
l.c

D
Sheet
39
of
48
+1.2VS
2
1
VIN
+1.05VSP
PC86
2
316_0402_1%
1
1
PC85
@ 150U_D_6.3VM
PR121
1K_0402_1%
D
PQ27
2
G
@ RHU002N06_SOT323
PC88
@ 0.01U_0402_25V7K
0.01U_0402_25V7K
PR122
@ 0_0402_5%
1
2
SUSP
34
PC84
2
PR120
APL5912-KAC-TRL_SO8
FB
EN
GND
PC87
@ 0.01U_0402_25V7K
VOUT
PC83
22U_1206_6.3V6M
0_0402_5%
1
2
5
4
22U_1206_6.3V6M
PR119
SUSP#
VIN
VOUT
POK
VCNTL
PU8
7
PJ12
@ JUMP_43X79
D
1U_0603_6.3V6M
PC82
+5VS
+1.8V
C
PJ13
@ JUMP_43X79
NC
VREF
NC
VOUT
NC
TP
+3VALW
1
VCNTL
GND
PR123
1K_0402_1%
PC89
10U_1206_6.3V7K
VIN
2
1
PU9
1
PC90
1U_0603_6.3V6M
+0.9VSP
1
PC91
PR124
1K_0402_1%
S PQ28
PC92
10U_1206_6.3V7K
PC93
@ 0.1U_0402_16V7K
2
G
PR125
0_0402_5%
1
2
SUSP
34
APL5331KAC-TRL_SO8
RHU002N06_SOT323
0.1U_0402_16V7K
PJ14
1
PU10
2
2
PC94
1U_0603_6.3V6M
@ JUMP_43X118
IN
GND
SHDN
OUT
BYP
+1.5VSP
+3VALWP
PC95
1U_0603_6.3V6M
G914GF_SOT23-5
1
PR126
0_0402_5%
25,29,30,34,39 SUSP#
PC96
0.33U_0603_10V7K
PC97
@ 0.1U_0402_16V7K
2006/05/18
Issued Date
Compal Secret Data
2007/05/18
Deciphered Date
5
Title
1.05V / 0.9V / 1.5V

Size
Date:
Document Number
R ev
0.1
Sheet
1
40
of
48
+5VS
CPU_B+
B+
PC131
3300P_0402_50V7K
+
2
PC123
680P_0603_50V7K
PC103
2200P_0402_50V7K
2
1
PC102
0.1U_0603_25V7K
2
1
PC101
10U_1206_25VAK
2
1
PC100
10U_1206_25VAK
2
1
PC99
10U_1206_25VAK
2
1
1
2
200K_0402_5%
2 PR129 1
PC106
1U_0603_6.3V6M
PR130
13K_0402_5%
2
2
PC105
2.2U_0603_6.3V6K
PC98
0.01U_0402_25V7K
0_1206_5%
PR128
10_0402_5%
PL8
FBMA-L18-453215-900LMA90T_1812
1
2
PC104
220U_25V_M~N
PR127
5VS12
PQ29
D1
DH1
29
DH1__CPU-1
CPU_VID2
33
D2
LX1
28
LX1__CPU
CPU_VID3
34
D3
DL1
26
DL1__CPU
CPU_VID4
35
D4
PGND1
27
CPU_VID5
36
D5
GND
18
CPU_VID6
37
D6
CSP1
17
71.5K_0402_1%
1
7
TIME
CSN1
16
CSN1_CPU
CCV
FB
12
FB_CPU
REF
CCI
10
C CI_CPU
DPRSLPVR
DH2
21
DH2_CPU-1
BST2
20
BST2_CPU
LX2
22
LX2_CPU
DL2
24
DL2__CPU
PGND2
23
CLKEN
PR152
GNDS
@ 180P_0402_50V8J PR151
PC112
1
3.32K_0402_1%
2
BSTM2_CPU
1
2
2
2
41
MAX8770GTL+_TQFN40
+3VS
@ 180P_0402_50V8J
4700P_0402_25V7K
PR165
56_0402_5%
PR163
@ 10K_0402_1%
PR164
100_0402_5%
B
VSSSENSE
VSSSENSE
PR168
10_0402_5%
PR156
100_0402_5%
PC113
4700P_0402_25V7K
PC114
470P_0402_50V8J
PR161
20K_0402_1%
CPU_B+
29.6
DH2_CPU-2
PQ32
SI7840DP-T1-E3_SO8
PC120
0.1U_0402_16V7K
3
2
1
PR167 10K_0402_1%
2
PQ33
IRF8113PBF_SO8
3
2
1
3
2
1
DL2__CPU
PQ34
IRF8113PBF_SO8
PL10
P_0.36H_ETQP4LR36WFC_24A_20%
5
6
7
8
5
6
7
8
POUT
2
PR159
3K_0603_1%
1_0603_5%
PR166
1
2
@ 0.022U_0402_16V7K
CPU_VCC_SENSE
2
180P_0402_50V8J
PC116
2
1
NTC PR158
@ 3K_0603_1%
PC115
PR162
0_0402_5%
POUT
29
@ 3K_0603_1%
1
2
PR155
1
CSN2__CPU
15
13
VR_ON
14
CSN2
TP
2
0_0402_5%
PR160
1
2
1
CSP2
VRHOT
PR171
3.48K_0402_1%
1
2
NTC
1
1
PR172 0_0402_5%
1
2
PC122
0.22U_0603_16V7K
om
Deciphered Date
2007/05/18
5
Title
+CPU_CORE
Custom
Date:
Sheet

1
ai
2006/05/18
Issued Date
Compal Secret Data
nf
@
ho
tm
ai
l.c
PH4
2
10KB_0603_5%_ERTJ1VR103J
he
x
29
1
12 CLK_ENABLE#
SHDN
CSP2_CPU
PC126
VGATE
38
PR154
10K_0402_1%
PR148
0_0402_5%
PR150 0_0402_5%
1
2
PC127
17
2
PR153
10K_0402_1%
PR157
0_0402_5%
PWRGD
@ 180P_0402_50V8J
DPRSTP
PC119
10U_1206_25VAK
2
1
PSI
0.22U_0603_16V7K
PC118
10U_1206_25VAK
2
1
H_DPRSTP#
PSI#
+3VS
PH3 NTC
2
10KB_0603_5%_ERTJ1VR103J
1
2
PC117
10U_1206_25VAK
2
1
4
5
+CPU_CORE
PR170
2.1K_0402_1%
0_0402_5%
40
3.48K_0402_1%
PR144
2
1
PC110
PR169
6.8_1206_5%
0_0402_5%
PR149
PR147
0.22U_0603_16V7K 39
PQ31
IRF8113PBF_SO8
PC121
680P_0603_50V7K
499_0402_1%
PC111
PR146
4,15 DPRSLPVR
9
11
1
PC109
2
CSP1__CPU
PC125
47P_0402_50V8J
1
PQ30
IRF8113PBF_SO8
PC124
PR1452
+CPU_CORE
PL9
P_0.36H_ETQP4LR36WFC_24A_20%
2
1
32
VCCSENSE
10_0402_5%
1
PR143
2
CPU_VID1
PC108
680P_0603_50V7K 2.1K_0402_1%
PR140
1
2
0.22U_0603_16V7K
PC107
BSTM1_CPU 1
2
PR138
6.8_1206_5%
2
1
BST1_CPU 1
30
3
2
1
BST1
5
6
7
8
0_0402_5%
D0
THRM
3
2
1
PR142
31
0_0402_5%
DL1__CPU
0_0402_5%
PR141
SI7840DP-T1-E3_SO8
5
6
7
8
PR139
CPU_VID0
3
2
1
0_0402_5%
0_0603_5%
PR134
2
TON
0_0402_5%
PR137
25
PR136
VDD
0_0402_5%
Vcc
PR135
19
1_0603_5%
PR131
1
2DH1_CPU-2
4
0_0603_5%
0_0402_5%
V CC
0.22U_0603_16V7K
PR133
PU11
NTC
100K_0402_5%
PR132
1
2
41
of
R ev
0.1
48
HW4 Product Improvement Record (P.I.R.)

Phase: A to B
D
Page# Action Plan

(add; del; change)
8
Net connection
Date: 2006/07/29
Location or
Net_List
U21.AG30 (MEM_ODT0)
U21.AE28 (MEM_ODT1)
U21.AC30 (MEM_ODT2)
U21.Y30 (MEM_ODT3)
10
11
Net connection
Net connection
10
Net connection
JP16.80 (DIMMA_CKE1)
JP15.79 (DIMMB_CKE0)
JP15.79 (DIMMB_CKE1)
JP16.114 (DIMMA_ODT0)
JP16.119 (DIMMA_ODT1)
JP15.114 (DIMMB_ODT0)
JP16.119 (DIMMB_ODT1)
RP1.4 (CKE3 PU)
RP1.1 (CKE2 PU)

RP4.4 (ODT3 PU)
RP14.3 (ODT0 PU)
RP14.2 (ODT1 PU)
Del part
Add part
R40 (ODT2 PU)
Before value
(Attached file)
DDR_ODT0
DDR_ODT1
DDR_ODT2
DDR_ODT3
DDR_SCKE1
DDR_SCKE2
DDR_SCKE3
DDR_ODT0
DDR_ODT2
DDR_ODT1
DDR_ODT3
DDR_SCKE3
DDR_SCKE2
DDR_ODT3
DDR_ODT0
DDR_ODT1
56_0402_5%
R12 (CKE2 PD)
Change part
C70, C68, C63,

C62, C51
15
Change part
16
Net connection
After value
(Attached file)
Detail Discretion and Root Cause
NC
NC
NC
NC
DDR_SCKE0
DDR_SCKE1
DDR_SCKE1
DDR_SCKE2
GND
DDR_SCKE3
GND
NC
NC
NC
DDR_SCKE2
DDR_SCKE3
Rev. DL/DM Check
DDR 667 workaround, ATI recommend (PA_RS400R2)
0.2
180_0402_5%
180_0402_5%
R17 (CKE3 PD)
Writer: Gino Lu
0.1U_0402_6.3V4Z
1U_0402_6.3V4Z
VDDA_18 decoupling, ATI recommend
0.2
C295, C298, C300, 0.1U_0402_6.3V4Z

C305
0.01U_0402_16V7K
ALINK coupling cap for differential signal,

ATI recommend
0.2
U9.A21(USB_HSDP1+)
USBP1USBP1+
USBP1+
USBP1-
Fix USB function fail
0.2
U9.B21(USB_HSDM1-)
+3VALW
For SB mainpwron (Gevent) is S5 power pin
0.2
16
Net connection
R760.1 (MAINPWONR PU)
+3VS
25
Net connection
R740.2 (PH sensor)
0.2
Change part
R872, R873
R786, R842
Q59, Q67
JP34, JP35
NBA_PLUG
N17081292
For audio jack change to normal open
N16810569
MIC_SENSE
0_0402_5%(@)
100K_0402_5%
2N7002_SOT23
FOX_JA6033L-B5S3-7F FOX_JA6333L-B3T0-7F
26
Net connection
U47.16 (VSS)
GND
CVSS
Fix audio left channel no function
0.2
29
Change part
R116
10K_0402_5%
100K_0402_5%
Fix BATT charge LED always light, for power

workaround
R785 (Mic sensor)
Del part
0.2
Compal Secret Data
2006/05/18
Issued Date
Deciphered Date
2007/05/18
5
Title
PIR
Size
Date:
Document Number
Rev
0.3
Sheet
1
42
of
48

Phase: A to B
D
Page# Action Plan

(add; del; change)
15
15
Before value
(Attached file)
D28
R899
C972
Net connection
U9.D27 (SB BMREQ#)
BM_REQ#
Change part
U36
R802
R900, R901
C973
D29
Q6
Q1
R902
TC7SH00FU_SSOP5
200K_0402_5%(@)
U9.E29 (SB STPCLK#)
H_STPCLK#
@
Net connection
BOM Structure
Change part
BOM Structure
Q62, U36, C832,

C833, D42
R255
C831
Change part
9
10
11
12
Writer: Gino Lu
After value
(Attached file)
CH751H-40_SC76
10K_0402_5%
15P_0402_50V8D
SB_BM_REQ#
Rev. DL/DM Check
For C3 pop-up and C1e HW rework. ATI recommend

(PA_IXP400AC16)
0.2
4.7K_0402_5%
U21
216CPP4AKA21HK
RC410ME
216DCP4ALA12FG
RC410MD
For Product spec
Change part
C650
C148
C52
220U_D_6.3VM(@)
220U_D2_4VM
220U_D2_4VM
220U_Y_4VM(@)
220U_Y_4VM
220U_Y_4VM
For height limit, change to 2mm
17
BOM Structure
C884, C885,
C886, C887
2H@
For 2 HDD configuration
26
Change part
SW10
EVQWA4001_6P
XRE094 2
For new digital VR
26
Add part
BOM Structure
Net connection
C977, C978
C954, C955
Reserve for ALC861D/ ALC268 HP out, for Vista

integrate driver
U38.15 (LINE2_R)
NC
NC
1U_0402_6.3V4Z
@
LIN_L
LIN_R
R463
R465
R762
R23
R138, R139
47K_0402_5%(@)
10K_0402_5%(@)
4.7K_0402_5%
4.7K_0402_5%(@)
10K_0402_5%(@)
25
4
8
19
DEL PART
DEL PART
DEL PART
U38.14 (LINE2_L)
0.2
74LVC1G14GW_SOT353-5 C4 timing on Yonah-M platforms workaround,

ATI recommend (PA_IXP400BR4)
150K_0402_5%
10K_0402_5%
330P_0402_50V7J
CH751H-40_SC76
MMBT3904_SOT23
2N7002_SOT23
0_0402_5%
SB_STPCLK#
0_0402_5%
@
7,8,9
Location or
Net_List
Add part
Add part
Date: 2006/07/29
0.2
0.2
0.2
0.2
B
0.2
0.2
Remove useless parts
Compal Secret Data

Deciphered Date
2007/05/18
5
Title
PIR
Size
Date:
Document Number
ai
2006/05/18
Issued Date
he
x
nf
@
ho
tm
ai
l.c
om
Sheet
1
43
of
48
Rev
0.3

Phase: A to B
D
Page# Action Plan

(add; del; change)
Date: 2006/07/29
Location or
Net_List
Delete part
R305
R304
C665
R268
10K_0402_5%(@)
5.6K_0603_1%(@)
0.1U_0402_16V4Z(@)
4.7K_0402_5%(@)
14
Net rename
DVI_R
DVI_G
DVI_B
DVI_HSYNC
DVI_VSYNC
DVI_R
DVI_G
DVI_B
DVI_HSYNC
DVI_VSYNC
29
Net connection
X2.1(X'tal X1)
CRY1
CRY2
27
4
12
X2.2(X'tal X2)
C
Before value
(Attached file)
16
Add part
BOM structure
16
Net connection
Y7
C974, C975
R910
R911, R912
L46, R74, C267,
X1, R335
R334
R326.1 (GPIO5 PU)
R751.1 (GPIO_M PD)
Writer: Gino Lu
After value
(Attached file)

Remove useless parts
0.2
CRT_OUT_R
CRT_OUT_G
CRT_OUT_B
CRT_OUT_HSYNC
CRT_OUT_VSYNC
For designer check
0.2
CRY2
CRY1
For layout smooth
0.2
48MHZ 20PF
X6G048000FK3H-H
20P_0402_50V8J
1M_0402_5%
0_0402_5%
@
Chnage USB clock from osciallor to crystal
0.2
+3VS
GND
For ATi requirement
0.2
EMI solution for LVDS
0.2
EMI solution for CRT
0.2
GND
+3VS
BOM structure
C406, C407,
C810, C811
14
Change Part
BOM structure
L1, L2, L3
C1, C2, C3
FCM2012C-800_0805
@
14
Change Part
JP23
SUYIN
SUYIN
020133MR004S529ZL~N 020167MR004S511ZR
20
Add part
R913, R914
C976
Change part
R475,
R476
R490
29
Change part
23
Net rename
BK1608LL121-T 0603
0.2
49.9_0402_1%(@)
0.1U_0402_16V4Z(@)
For LAN reverse
0.2
40.2_0402_1%
150_0402_5%
27.4_0402_1%
54.9_0402_1%
54.9_0402_1%
54.9_0402_1%
For CPU ITP
0.2
L20, L23
FBM-L11
160808-800LMT_0603
0_0603_5%
Change EC power sorce and gnd source
0.2
U34.26(EECS)
EECS
EEDI
EECK
1394_EECS
1394_EEDI
1394_EECK
Name Name duplication
0.2
U34.29(EECK)
Compal Secret Data
2006/05/18
Issued Date
Deciphered Date
2007/05/18
5
ME change
U34.28(EEDI)
A
13
Rev. DL/DM Check
Title
PIR
Size
Date:
Document Number
Rev
0.3
Sheet
1
44
of
48

Phase: A to B
D
Page# Action Plan

(add; del; change)
29
Date: 2006/07/29
Location or
Net_List
Writer: Gino Lu
Before value
(Attached file)
Del part
Add part
Net Rename
Q66
C980
EC_EAPD
2N7002
29
Add part
C979
Q67
R915
R916
R917
R919
16
Del part
R384(GATE20 PU)
R385(KBRST# PU)
10_0402_5%
10_0402_5%
16
Net connection
Add part
U9.D6(LPC_PME#)
EC_PME#
EC_EAPD
After value
(Attached file)
0.01U_0402_16V7K(@)
EC_EAPD_R#
1U_0402_6.3V4Z(@)
2N7002_SOT23(@)
8.2K_0402_5%(@)
20K_0402_5%(@)
2.4K_0402_5%(@)
1K_0402_5%(@)
Rev. DL/DM Check
For Audio EAPD
0.2
For POST BEEP no sound issue
0.2
No need external
0.2
pull up
LPC_PEM#
10K_0402_5%
Disconnect SB PME# to EC PME#
0.2
R918
10P_0402_50V8K(@)
22P_0402_50V8J(@)
For EMI reserve
0.2
For mini card clock request
0.2
Transion test pass
0.2
74LVC1G14GW
SOT353-5
Change package for logic IC standard
0.2
Azalia signal, no need two serial reisistor
0.2
16
27
Add part
C981
C982, C983
12
Del part
Net connector
R712
28
BOM Structure
C712, C715
29
Change part
U46
29
Del part
Net connection
R714.2 (BITCLK to HD)
U23.11 (Clock REQ B)
0_0402_5%(@)
N19175427
NC7SZ14M5X_SOT23-5
0_0402_5%
N52707434
R715.2 (BITCLK to MDC) N52707448
MINI_CLKREQ#
R867, R868
AZ_BITCLK_HD
AZ_BITCLK_MD
28
Add part
R920, R921,
R922, R923
0_0402_5%(@)
26
Add part
R924
C984
0_0402_5% (@)
Reserve function for EC control HP_EN
0.01U_0402_16V7K(@)
26
BOM Structure
C406, C407,
C810, C811
29
Change part
R101
0_0402_5%
25
Add part
R925
26
BOM Sturcture
C977, C978
C954, C955
Reserve resistor for USB signal
0.2
0.2
For LVDS EMI solution
0.2
8.2K_0402_5%
Board ID change to 1 for Rev0.2
0.2
39.2K_0603_5%
For ALC861 +Vista driver
0.3
For Vista intergated driver
0.3
@
@
Compal Secret Data

Deciphered Date
2007/05/18
5
Title
PIR
Size
Date:
Document Number
ai
2006/05/18
Issued Date
he
x
nf
@
ho
tm
ai
l.c
om
Sheet
1
45
of
48
Rev
0.3

Phase: A to B
D
Page# Action Plan

(add; del; change)
R919
R916
R917
Q67
1K_0402_5%(@)
20K_0402_5%(@)
2.4K_0402_5%(@)
2N7002_SOT23(@)
29
Change part
R101
8.2_0402_5%
4
15
BOM Sturcture
R491
R167
R713
R334
R335
Del part
Change part
R235
C433
10_0402_5%(@)
22P_0402_50V8J(@)
15
BOM Structure
12
Change part
BOM Structure
Add part
C832, C833,
C973, D29, D42,
Q1, Q6, Q62,
R802, R900,
R901, U36
R713, R902
R255
C831
Q66
U49
R927
20
BOM Sturcture
Rev. DL/DM Check
Remove POST BEEP no sound issue
0.3
PCB revision ID
0.3
For C4 timing
0.3
48M oscillator select
0.3
LAN PCI clock for EMI
0.3
No need C4 support
0.3
20K_0402_1%(@)
Internal MIC sensor
0.3
12P_0402_50v8J
RTC timing
0.3
Component reduce (EC A-power)
0.3
18_0402_5%
@
4.7K_0402_5%
0_0402_5%
@
2N7002_SOT23(@)
74LVC1G14GW_SOT353-5(@)
10K_0402_5%(@)
20
Change part
C286, C287
18P_0402_50v8D
20
Del part
L23
0__0603_5%
15
Del part
R317
0__0402_5%(@)
15
Change part
R318
11.8K_0603_1%
16
BOM Sturcture
R716,
R718,
R886,
C865,
R717,
R871
C864,
JP36
R928, R929
R862, R863
18P_0402_50V8J(@)
@
R926
Add part
Change part
Add part
26
After value
(Attached file)
20
27
Writer: Gino Lu
Before value
(Attached file)
Del part
15
Location or
Net_List
26
19
Date: 2006/07/29
Layout reduce (SB H_RESET#)
0.3
11.3K_0603_1%
USB adjust and EMI
0.3
MDC@
MDC option
0.3
HP serial resistor for AP2056 noise when use mono HP

gain adjust
0.3
MDC@
39K_0402_5%
20_0402_5%
24K_0402_5%
Compal Secret Data
2006/05/18
Issued Date
Deciphered Date
2007/05/18
5
Title
PIR
Size
Date:
Document Number
Rev
0.3
Sheet
1
46
of
48

Phase: B to C
D
Page# Action Plan

(add; del; change)
16
Del part
Change part
Net connect
BOM Structure
Date: 2006/09/29
Location or
Net_List
Before value
(Attached file)
C974
Y7
R910
R911
C975
R912
20P_0402_50V8J
48MHZ_20PF_
1M_0402_5%
0_0402_5%
20P_0402_50V8J
0_0402_5%
R912.1 (48MHz source) 48M_XTAL1
X1.3 (48MHz source)
48M_XTAL1
C975.2 (48MHz source) 48M_XTAL1
L46, R74, C267,
@
X1
26
Add part
Q67
26
Change part
Change part
C954,
C977,
C957
R830,
C947,
C948,
33
Change part
C449
13
Net connect
33
Net connect
Writer: Gino Lu
After value
(Attached file)
Rev. DL/DM Check
For USB logo and EMI
0.3
De- Bo noise
0.3
12P_0402_50V8J
30_0402_5%
OSC_48MHZ
OSC_48MHZ
OSC_48MHZ
2N7002_SOT23
Del part
Change part
B
BOM Structure
C955
C978
R832
C949
C950
1U_0603_6.3V4Z(@)
1U_0603_6.3V4Z
1U_0603_16V6K
1.5K_0402_5%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2.2U_0603_6.3V6K(@) Audio precision

2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
10U 10V M A NOJ H1.6
22U 10V M B NOJ H1.9
For De-fan noise
0.3
B+
For dual lamp LCD
0.3
Update FAN control circuit
0.3
0.22U_0402_6.3V6K
PU5.5 (OP+)
N19688420 (FAN FB)
N19688478 (EC_FANCTRL)
PU5.6 (OP-)
N19688478 (EC_FANCTRL)
N19688420 (FAN FB)
R240.2
FAN1
10K_0402_5%
5.1K_0402_5%
5.1K_0402_5%
@
N19688714 (FAN FB)
R836
R240
R874
R875, C449
0.3
0_0402_5%
8.2K_0402_5%
100_0402_5%
Compal Secret Data

Deciphered Date
2007/05/18
5
Title
PIR
Size
Date:
Document Number
Wednesday, October 11, 2006
ai
2006/05/18
Issued Date
he
x
nf
@
ho
tm
ai
l.c
om
Sheet
1
47
of
48
Rev
0.3
IAYAA POWER Product Improvement Record (P.I.R.)

D
NO
DATE
PAGE
MODIFICATION LIST
PURPOSE
------------------------------------------------------------------------------------------------------------1. 0807
P.39
Change net susp# to pok and pok to susp#
reserve for in-phase issue
2. 0807
P.41
Add PC124,PC125,PC126,PC127
For EMI solve 200MHz-300MHz Broad band
3. 0929
P.36,37
Add PC128,PC129,PC130
4. 0929
P.41
Add PC131
For EMI solve 80MHz-100MHz Broad band
Compal Secret Data
2006/05/18
Issued Date
Deciphered Date
2007/05/18
5
Title
PIR
Size
Date:
Document Number
Rev
0.1
Sheet
1
48
of
48

Toshiba Satellite A135-S2686 Compal LA-3391P Laptop Schematics

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Toshiba Satellite A135-S2686 Compal LA-3391P Laptop Schematics

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A

LA-3391P REV 0.3 Schematic

UFC-PGA Yonah/ RC410MD(ME)/ SB450

Compal Electronics, Inc.

Compal Secret Data

LA-3391P FUNCTION BLOCK

LVDS & TV-OUT Conn.

VGA M10P Embeded

USB 2.0 Port *5

564 pin BGA

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Thursday, October 05, 2006

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

1.2V switched power rail for CPU AGTL Bus

1.0V/1.2V switched power rail for VGA chip

1.2VS for PCI-Express

0.9V switched power rail

1.8VS switched power rail

Board ID Table for AD channel

1.8V always on power rail

1.8V power rail

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

12V always on power rail

External PCI Devices

SB450 SM Bus address

Compal Electronics, Inc.

Compal Secret Data

H_THERMDA, H_THERMDC routing together.

Compal Secret Data

For B-0 stepping engineering samples (ES) of Celeron M

Place Caps Close to CPU Socket

Compal Electronics, Inc.

Size Document Number

Thursday, October 05, 2006

Length match within 25 mils

Layout close CPU PIN AD26

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 25mils and Space 25mils

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Thursday, October 05, 2006

POWER, GROUNG, RESERVED SIGNALS AND NC

Place these inside

Place these inside 1

Place these inside 1

Place these inside 1

22uF 0805 X5R -> 85 degree C

High Frequence Decoupling

Near VCORE regulator.

Place these inside

ESR <= 1.5m ohm

Compal Secret Data

Compal Electronics, Inc.

Thursday, October 05, 2006

PCI EXPRESS I/F