Вы находитесь на странице: 1из 59

MVS

(Day 1)
Copyright 2005, Infosys
Technologies Ltd
2
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Objectives
To introduce mainframes
Hardware and Software
To introduce internas of MVS
To introduce VS!M and non"VS!M data sets
To introduce job mana#ement in MVS
To introduce various subsystems and faciities
To introduce TSO and $S%&
Copyright 2005, Infosys
Technologies Ltd
!
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
%rere'uisites
(nowed#e about basic com)uter arc*itecture
+asic ,nowed#e in O)eratin# System conce)ts
(nowed#e about $-O and communications
Copyright 2005, Infosys
Technologies Ltd
&
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
.vauation Strate#y
Day /
(! to)ics)
100 Modue Test
Day 1
(Day 1 and Day 2 to)ics)
3ot
.vauated
Moc, 4ui5
(Option'l)
Sc*edue Mar,s 6om)onent
Copyright 2005, Infosys
Technologies Ltd
5
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
7eferences
18 7obert8 H8 9o*nson: MVS Concepts and Facilities: Mc;raw"Hi +oo,
6om)any: 1<=<8
Dou# >owe: MVS 96> " Mike Murach & Associates: 1<</8
MVS/DFP - IBM Manual
/8 Dou# >owe : MVS TS PA!T" C#C$PTS A#D ISPF: Mi,e Murac* ?
!ssociates: 1<<18
@8 9ay 7anade: Hirday 7anade: VSAM Concepts% Pro&ra''in&% and Desi&n "
Mc;raw"Hi
A( IBM n-line Manuals - I))*+",,% I))*-",, and I))*V.,,( n MVS(
Copyright 2005, Infosys
Technologies Ltd
(
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
6ourse %an
Day 1
$ntroduction to Mainframes
Hardware ? Software .voution
Distin#uis*in# c*aracteristics of a mainframe OS
+asic Mainframe !rc*itecture
!ddress s)aces
Mec*anisms in Muti)e Virtua Stora#e
Day 2
Data set mana#ement
Describe t*e or#ani5ation of data sets
VS!M and 3on"VS!M
9ob Mana#ement
How does 96> s)ecify its )rocessin# re'uirements B
9ob .ntry Subsystem
%*ases of a job
Day 1
Various subsystems ? faciities most commony found on a ty)ica Mainframe system
System #eneration ? initiai5ation
TSO-$S%&
Copyright 2005, Infosys
Technologies Ltd
)
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
!#enda Day1
$ntroduction
6om)arison of com)uter ty)es
%ersona: Mini ? Mainframes
.voution of Mainframe *ardware and software
Distin#uis*in# c*aracteristics of a mainframe OS
+asic Mainframe arc*itecture
$-O device structure
6once)ts ? terminoo#y
$dea of address s)aces
Mec*anisms in Muti)e Virtua Stora#e
MVS address s)ace or#ani5ations
( Memory ma)s )
Copyright 2005, Infosys
Technologies Ltd
*
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
+asic 6om)onents of 6om)uter Systems
Copyright 2005, Infosys
Technologies Ltd
+
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
6assification of com)uters
%ersona 6om)uter
Mainframe 6om)uter
Su)er 6om)uter Mini 6om)uter
Copyright 2005, Infosys
Technologies Ltd
0
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
%ersona 6om)uters
Copyright 2005, Infosys
Technologies Ltd

ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Minicom)uter
Copyright 2005, Infosys
Technologies Ltd
2
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Mainframe
Copyright 2005, Infosys
Technologies Ltd
!
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Su)er 6om)uters
8 Hi#* %rocessin# ca)acity
CsesD
8 Scientific com)utations
8 Miitary a))ications
Copyright 2005, Infosys
Technologies Ltd
&
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Mainframe Hardware .voution
Copyright 2005, Infosys
Technologies Ltd
5
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Mainframe System Software .voution E
DOS-VS.
OS-1A0
%6%
OS-M&T
Copyright 2005, Infosys
Technologies Ltd
(
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Mainframe System Software .voution
OS-MVT
OS-VS1 and SVS
MVS
F-OS
Copyright 2005, Infosys
Technologies Ltd
)
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Mainframe OS " c*aracteristics
Virtua stora#e
Muti)ro#rammin#
S)ooin#
+atc* )rocessin#
Time s*arin#
Copyright 2005, Infosys
Technologies Ltd
*
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Virtua stora#e
Tec*ni'ue t*at ets a )rocessor simuate a ar#e amount of main stora#e from
a smaer instaed rea stora#e8
Cses dis, stora#e as an eGtension of rea stora#e8
!t any #iven moment ony one )ro#ram and its data need be in rea stora#e8
Copyright 2005, Infosys
Technologies Ltd
+
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Muti)ro#rammin#
More t*an one )ro#ram eGecutin# at t*e same time8
(ey D $-O waits ta,e a on# time com)ared to 6%C o)erations8
Ony a simuation a#ain8
Copyright 2005, Infosys
Technologies Ltd
20
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
S)ooin#
$nterce)ts and redirects )rinter out)ut to a dis, fie8
.ac* )ro#ramsH out)ut stored se)aratey8
&aciitates effective s*arin# of $-O devices and better system t*rou#*)ut8
Copyright 2005, Infosys
Technologies Ltd
2
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
+atc* )rocessin#
+atc* )rocessin# is "
3on interactive
Off ine
96> describes a batc* job " )ro#rams: data and resources re'uired8
9ob sc*eduer D submits jobs for eGecution based on sc*eduin# a#orit*m8
Copyright 2005, Infosys
Technologies Ltd
22
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Time s*arin#
Time s*arin# ma,es on"ine: interactive )rocessin# )ossibe8
.ac* user *as access to t*e system and a #ets a time sice re)eatedy8
TSO used to o#in: create: maintain and store 96>s8
%rocessin# is #eneray as a batc* job in bac,#round8
Copyright 2005, Infosys
Technologies Ltd
2!
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
+asic Mainframe arc*itecture E
! famiy of )rocessors from $+M
channel 0
channel 1
channel 2
channel 3
channel 4
channel 5
channel 6
channel 7
CPU
Main
storage
%rocessor
Copyright 2005, Infosys
Technologies Ltd
2&
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
+asic Mainframe arc*itecture 888
%rocessor"6%CsIMain storeIc*annes
cac*e
eG)anded stora#e
Muti)rocessin# (more t*an one 6%C)
%7-SM " %rocessor resource - systems mana#er
Copyright 2005, Infosys
Technologies Ltd
25
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
+asic Mainframe arc*itecture 888
6*annes "
)rovides a )at* between a )rocessor and an $-O device8 ( /8@ M+-sec: /00"foot )
.ac* c*anne can connect to u)to = contro units eac* of w*ic* is connected to an
$-O device8
! c*anne is intei#ent ( a 6%C in itsef )
.S6O3 " .nter)rise System 6onnection " based on fiber o)tics ( 1J M+-sec:2A
mies )
Copyright 2005, Infosys
Technologies Ltd
2(
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
$-O Devices
Cnit record devices
card devices ? )rinters
Ma#netic ta)e devices
se'uentia access ony
Direct access devices
dis, drive: D!SD: auGiiary: 8secondary stora#e
random access )ossibe
Copyright 2005, Infosys
Technologies Ltd
2)
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Ma#netic Ta)es
$t is one of t*e commony used $-O8
6oated wit* a ma#netic materia on bot* sides of t*e ta)e8
Data is stored by Ma#neti5in# t*e ferrite coatin#8
Se'uentia access of records8
Csed for bu, stora#e and easy trans)ortation8
Copyright 2005, Infosys
Technologies Ltd
2*
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Direct !ccess Stora#e Device (D!SD)
! D!SD consists of many dis,
)ac,s or voumesD
Data on bot* sides
%atters
Copyright 2005, Infosys
Technologies Ltd
2+
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
D!SD " Trac,s ? 6yinders
TRACK 000
TRACK 807
Copyright 2005, Infosys
Technologies Ltd
!0
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
D!SD " !ctuator
REA!"R#TE $EA%
Copyright 2005, Infosys
Technologies Ltd
!
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
D!SDD Data format E
T*ere are two ty)es of Data &ormatsD
&iGed boc, data format
6ount (ey data format (6(D format)
Copyright 2005, Infosys
Technologies Ltd
!2
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
D!SD " Data format
6(D ( count",ey"data) devices "
Store data in variabe"en#t* boc,s
.ac* data boc, )receded by a count area and a ,ey area ( w*ic* s*oud be met
before data in dir of rotation )
;a)s to se)arate count: ,ey and data areas8
Copyright 2005, Infosys
Technologies Ltd
!!
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
D!SD " contro units E
.ac* ty)e of D!SD re'uires two ty)es of contro units to connect to a c*anne D
Strin# controer D
attac*es a #rou) of D!SDs of same ty)e ( a strin# )
Stora#e contro D
connects u)to = D!SD strin#s to a c*anne
6ac*e between )rocessor ? drive8
Su))ort for more t*an one c*anne connection to )rocessor8
Copyright 2005, Infosys
Technologies Ltd
!&
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
D!SD " 6ontro units
Copyright 2005, Infosys
Technologies Ltd
!5
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Data communications e'ui)ment E
>ets oca ? remote terminas access a system D
*ost system
communications controer
modems
teecommunication ines
termina systems
Copyright 2005, Infosys
Technologies Ltd
!(
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Data communications e'ui)ment
Copyright 2005, Infosys
Technologies Ltd
!)
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Terminas
12J0 terminas are t*e standard8
$t is a subsystem of many terminas: )rinters and controers
Terminas can be emuated on %6s w*ic* accesses t*e mainframe over wide
area in,s8
Copyright 2005, Infosys
Technologies Ltd
!*
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
6once)ts ? terminoo#ies
Copyright 2005, Infosys
Technologies Ltd
!+
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
!ddress s)ace
K*at is an !ddress S)aceB
!n address s)ace is a com)ete ran#e of addresses t*at can be accessed by a
)rocessor8
Copyright 2005, Infosys
Technologies Ltd
&0
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
!ddressabiity of different Systems
De)ends on number of bits used for addressin# D
System 1J0 D 2/ bit addressin#: 1A M+ maG
1J0 L!: .S! 1J0:1<0 D 11 bit addressin#: 2;+ maG8
F series A/ bit addressin#
1A .+
2/ bit
!ddressin#
(MVS)
11"bit
!ddressin#
(MVS-L!)
1A M+ M >ineN
2 ;+ M+arN
A/ bit
!ddressin#
(5-OS)
Copyright 2005, Infosys
Technologies Ltd
&
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Muti)e Virtua Stora#e E
MVS simuates severa address s)aces: eac* inde)endent of t*e ot*er and
re)resentin# an user: job or a OS subsystem8
Mec*anisms used to su))ort MVS D
%a#in#
Swa))in#
Copyright 2005, Infosys
Technologies Ltd
&2
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Muti)e Virtua Stora#e 888
Copyright 2005, Infosys
Technologies Ltd
&!
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
%a#in# E
%a#es are /( sections on virtua store
( D!SD )8
%a#e frames are /( sections in rea store ( main memory )8
%a#e tabe ma)s )a#es to )a#e frames8
%a#e faut w*en )ro#ram refers to data in a stora#e ocation not in rea store8
Copyright 2005, Infosys
Technologies Ltd
&&
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
%a#in#
%a#e"in w*en MVS oads a new )a#e into a )a#e frame
%a#e"out w*en data in a )a#e"frame is written bac, to D!SD8
OS code res)onsibe for )a#in# cannot be )a#ed out8
Copyright 2005, Infosys
Technologies Ltd
&5
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
.G)anded Stora#eD
!cts as ar#e buffer between rea stora#e and )a#e data sets ( virtua store )8
$m)roves efficiency of virtua stora#e o)erations8
Copyright 2005, Infosys
Technologies Ltd
&(
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Swa))in# E
Transfer of entire address s)aces in and out of virtua store8
Swa))in# is i,e )a#in#: ony at a *i#*er eve and across address s)aces8
Copyright 2005, Infosys
Technologies Ltd
&)
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Swa))in#
Copyright 2005, Infosys
Technologies Ltd
&*
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
%ro#ram modes
7ea mode
not )a#eabe or swa))abe
OS )art res)onsibe for im)ementin# virtua memory: aways resident
Virtua mode
Ot*er )rocesses t*at can be )a#ed or swa))ed
Copyright 2005, Infosys
Technologies Ltd
&+
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
MVS-1J0"Memory ma) E
System area
OS )ro#rams ? data: common to a address s)aces: nuceus: rea mode
%rivate area
Cser re#ion I unaocated
6ommon area
OS )ro#rams ? data: common to a address s)aces
S4!: %>%! and 6S!
Copyright 2005, Infosys
Technologies Ltd
50
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
MVS-1J0 " Memory ma) 888
Copyright 2005, Infosys
Technologies Ltd
5
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
MVS-1J0 " Memory ma)
Copyright 2005, Infosys
Technologies Ltd
52
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Stora#e ma) in an !ddress S)ace
System area
OS )ro#rams ? data: common to a address s)aces: nuceus: rea mode
%rivate area
Cser re#ion I unaocated
6ommon area
OS )ro#rams ? data: common to a address s)aces
Copyright 2005, Infosys
Technologies Ltd
5!
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Memory ma) " L! and .S!
11 bit addresses OP 2 ;+ tota
&irst 1A M+ can be addressed usin# eit*er 2/ or 11 bit addressin#
address s)ace o#icay divided at 1A M+ ine
3o system area
MVS nuceus combined wit* ot*er OS data in common area
Copyright 2005, Infosys
Technologies Ltd
5&
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
MVS-.S! " Datas)ace
.S! ets a job or user create one or more 2;+ address s)aces t*at can be
used to *od ar#e amounts of data
6ontents of datas)aces mana#ed directy by user )ro#rams
Datas)aces reside in norma virtua store subject to )a#in# and swa))in#8
Copyright 2005, Infosys
Technologies Ltd
55
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Difference between Address space and Data space
A&&ress s'ace ata s'ace
Contains instruction and data. Can contain only data. Even if program
is loaded in data space, it is considered
as data
Common areas and nucleus is mapped None of common areas and nucleus is
on Address space. mapped on data space.

An application can have only one An application can have access upto 7999
address space. data space, each the sie of !"#.
Copyright 2005, Infosys
Technologies Ltd
5(
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
MVS-.S! " Hi)ers)ace
Simiar to datas)aces
6ontents of *i)ers)aces mana#ed by MVS-.S! and made avaiabe to
user )ro#rams in /(+ units
Hi)ers)aces reside ony in eG)anded stora#e and are never in rea store
&aciitates *i)erbatc* to im)rove )erformance of certain ty)es of
batc*es
*i)erbatc* trans)arent to 96> t*at invo,es t*em
Copyright 2005, Infosys
Technologies Ltd
5)
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
ata %'ace $i'ers'ace
Access Access $egisters %&' 'ystem 'ervices
A&&ressa(ilit) #yte ( )b #loc*s
%torage Central, E+panded,
E+panded, Au+iliary
Au+iliary

*ang+age Assembler Assembler and
%+''ort ,igh -evel

.he differences between data spaces and ,iperspaces
Copyright 2005, Infosys
Technologies Ltd
5*
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
Summary
$ntroduction
6om)arison of com)uter ty)es
%ersona: Mini ? Mainframes
.voution of Mainframe *ardware and software
Distin#uis*in# c*aracteristics of a mainframe OS
+asic Mainframe arc*itecture
$-O device structure
6once)ts ? terminoo#y
$dea of address s)aces
Mec*anisms in Muti)e Virtua Stora#e
MVS address s)ace or#ani5ations
( Memory ma)s )
Copyright 2005, Infosys
Technologies Ltd
5+
ER/CORP/CRS/OS0/00!
"ersion #o$ %0
.han* /ou0

Вам также может понравиться