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THE GOAL
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OUTLINE
Background
Current Sheet Approach
Accurate Inductance Expressions
Optimization of Inductor Circuits
Transformer Modeling
Contributions
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
Broadband circuits
{ Shunt-peaking to enhance bandwidth
Attribute
Bond wire
Inductance
Q
Parasitics
Fluctuations
Large
Planar Spiral
Small
LATERAL PARAMETERS
w
dout
din
din
dout
s
Square
Hexagonal
s
din
dout
Octagonal
din
dout
Circular
LATERAL PARAMETERS
1. Shape: square, hexagonal, octagonal, . . .
2. Number of turns, n
3. Conductor width, w
4. Conductor spacing, s
d
VERTICAL PARAMETERS
w
dout
din
tM
tox,M1M2
tM,u
tox
underpass
contact
oxide
substrate
MODELING APPROACHES
SEGMENTED MODELS
port 1
Rs
L
Cox
Rsi
port 2
Cox
Csi
Csi
Rsi
substrate
GREENHOUSE APPROACH
Find self inductance of, and mutual inductance between
every segment of spiral:
Mgen,i,j
L1
M1,2
. . . M1,(n1)
M1,n
M1,2
L
.
.
.
M
M
2
2,n
2,(n1)
=
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M1,(n1) M2,(n1) . . . L(n1) Mn,(n1)
M1,n
M2,n
. . . Mn,(n1)
Ln
n
LT =
Li +
i=1
Mi,j
i=1 j=1,j=i
Voorman :
Dill :
Bryan :
Ronkanien :
Crols :
Lvoo
Ldil
Lbry
Lron
Lcro
=
=
=
=
=
103 n2 davg
8.5 104 n5/3 davg
2.41 103 n5/3 davg log(4/)
1.50 n2 e3.7(n1)(w+s)/dout
1.3 104 (d3out /w2 )a5/3 w1/4
Empirical expressions
Significant mean offset errors
Even when corrected, errors > 15 20%
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
d1 d2
1
[ln(d1 ) + ln(d2 )]
ln(GMD) =
2
For n distances:
1
ln(GMD) = [ln(d1 ) + ln(d2 ) + ln(dn )]
n
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
ln(r) dx dx
w
(d x1 x2 )
x2
1
ln(GMD) =
w2
0.5w
0.5w
0.5w
0.5w
ln |d x1 x2 |dx1 dx2
w2
w4
ln(d)
...
2
4
12d
60d
Basis for mutual inductance calculations in
Greenhouse method
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
w
2
x1
1
ln(GMD) =
w2
1
AMD =
w2
AMSD2
1
=
w2
0.5w
x2
0.5w
0.5w
0.5w
0.5w
0.5w
0.5w
0.5w
0.5w
w
|x1 + x2 |dx1 dx2 =
3
0.5w
0.5w
2
w
|x1 + x2 |2 dx1 dx2 =
6
0.5w
l
R R2
M
ln(2l) ln(R) 1 + 2
2
l
4l
for
R
l
R
l
l
R R2
M =
ln(2l) ln(R) 1 + 2
2
l
4l
Ls
l
AMD AMSD2
=
ln(2l) ln(GMD) 1 +
2
l
4l2
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
w
2
w
w
< x 1 , x2 <
2
2
l
ln
L=
2
2l
w
w
w2
+ 0.5 +
3l 24l2
x1 x2
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
(n1)
...
I
w s w
w s w
n2 l
2
L=
ln
2
nI
l = nw + (n 1)s
2
+ 0.5 +
3 24
davg
nI
s
davg
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
Ls
1
2
(n1)
davg
...
I
wsw
davg
nI
wsw
davg = nw + (n 1)s
Mopp
davg
nI
davg
davg
90o
90o
nI
davg
nI
davg
90o
nI
90o
nI
Lsq = 4(Ls + Mopp )
2.067
2n2 davg
ln
=
nI
davg
+ 0.178 + 0.1252
2 ... n
davg = nw+(n1)s
w
w w
n2 davg
1
L
ln
2
+ 0.9 + 0.22
nI
Lcursh
n2 davg c1
2
=
ln(c2 /) + c3 + c4
2
Layout
c1
c2
c3
c4
Square
1.27
2.07
0.18
0.13
Hexagonal
1.09
2.23
0.00
0.17
Octagonal
1.07
2.29
0.00
0.19
Circle
1.00
2.46
0.00
0.20
Monomial Expression :
Lmon =
1
2 3 4 5
dout w davg n s
n2 davg
= K1 0
1 + K2
100
Crols
Voorman
Bryan
Ron
Dill
80
60
Min
L(nH)
OD(m)
n
s/w
40
Max
0.1
70
100 400
1
20
0.02
3
0.03 0.95
20
20
60
40
% Absolute error
80
100
Current Sheet
Monomial Fit
Modified Wheeler
80
Min
L(nH)
OD(m)
n
s/w
60
40
Max
0.1
70
100 400
1
20
0.02
3
0.03 0.95
20
6
8
% Absolute error
10
12
EXPERIMENTAL SET-UP
S parameters
HP8720B
network analyzer
Coplanar GSG probes
DUT
port 1
port 2
50 environment
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
100
Crols
Voorman
Bryan
Ron
Dill
80
60
40
20
0
20
60
40
% Absolute error
80
100
ASITIC
Current Sheet
Modified Wheeler
Monomial Fit
80
60
40
20
0
8
12
% Absolute error
16
20
PARAMETERS OF INTEREST
Inductor quality factor (QL )
QL = 2
= 8nH
6
5
QL
4
3
Square
Hexagonal
Octagonal
Circular
2
1
0
2
3
Frequency (GHz)
Shunt-peaked Amplifier
Vdd
Vdd
L
R
vin
vout
C
vin
vout
C
Rs is not an issue
CL
Rs
(R Rs )
vout
vin
Cd
Cg
Cload
L determined by
R, Cload , CL and Cd
CL
Rs
Cascode stage
(R Rs )
vout
Cd
Rf
iin
Cin
Cload
On-chip shunt-peaking
Feedback
Cg
DESIGN METHODOLOGY
1. Design and optimize transimpedance stage
without shunt peaking
2. Transistor current determines conductor width, w
3. Lithography sets spacing, s
4. Choose n and AD to realize desired L
while minimizing parasitic capacitance and area
5. Maximize transimpedance resistance, Rf
TRANSFORMER
+
v1
+
M
i1
v2
L1
i2
L2
v1 = L1 it1 + M it2
v2 = L2 it2 + M it1
Mutual coupling coefficient, k =
M
L1 L2
|k| 1
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
NON-IDEAL TRANSFORMER
L1
R1
k=
M
L1 L2
L2
M
R2
< 1.
Series resistance.
Port-to-port & port-to-substrate capacitances
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
TAPPED TRANSFORMER
advantages:
{ High L1 , L2
{ Top metal layer
Inner
spiral
{ Low port-to-port
capacitance
disadvantages:
{ Asymmetric
Outer spiral
{ Low k(
0.3 0.5)
INTERLEAVED TRANSFORMER
advantages:
{ Medium k
( 0.7 0.8)
{ Symmetric
{ Top metal layer
disadvantages:
{ Medium port-to-port
capacitance
Primary
Secondary
{ Low L1 , L2
STACKED TRANSFORMER
Top View
advantages:
{ High k( 0.9)
{ High L1 , L2
{ Area efficient
disadvantages:
{ Multiple metal layers
Side View
top spiral
bottom spiral
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
Top spiral
ys
xs
ds
xs
Area
type
Coupling
Self-
Self-resonant
coefficient, k
inductance
frequency
Tapped
High
Low
Mid
High
Interleaved
High
Mid
Low
High
Stacked
Low
High
High
Low
Port1
Ls,i
(inner)
Rs,o
Cox,o
Cov,o
Ls,o
Ls,i
Rs,i
Port2
Cox,i
Ls,o (outer)
Tapped transformer.
L1
(inner)
LT
L2 (outer)
Interleaved transformer.
LT = L1 + L2 + 2M
L1 (primary)
L2 (secondary)
Rs,t
Cox,t
Ls,t
ys
xs
Cov
Ls,b
Coxm
Rs,b
Port2
Cox,b
Use inductance
expression for Ls,t , Ls,b
Calculate M
ys
ds
xs
ys
ds
xs
Ls,b
k (0.9 dnorm )
(for k > 0.2)
Ls,t
0.6
0.4
0.2
0.0
predicted k
measured k
0.2
ys
ds
xs
0.4
0.6
M =k
(Ls,t Ls,b )
xs 2 +ys 2
ds
dnorm = AD = AD
Metal and oxide thicknesses have only 2nd order effects on k
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University
EXPERIMENTAL SET-UP
port 1
port 2
S parameters
L1
HP8720B
network analyzer
L2
port 3
port 3
DUT
port 1
port 2
L1
L2
port 3
50 environment
port 2
0.5
S11
ODo = 290m,
no = 2.5
ODi = 190m,
ni = 4.25
w = 13m, s = 7m
-0.5
-1.0
0.8
1.0
S22
S21
1.2
1.6
2.0
Frequency (GHz)
2.4
0.5
0.0
-1.0
0.8
real(S11) meas
imag(S11) meas
real(S11) calc
imag(S11) calc
1.0
0.5
-0.5
0.0
real(S21) meas
imag(S21) meas
real(S21) calc
imag(S21) calc
1.2
1.6
2.0
Frequency (GHz)
0.0
-0.5
2.4
-1.0
0.8
real(S22) meas
imag(S22) meas
real(S22) calc
imag(S22) calc
1.2
1.6
2.0
Frequency (GHz)
2.4
0.5
S11
0.0
-0.5
-1.0
0.0
real(S11) meas
imag(S11) meas
real(S11) calc
imag(S11) calc
0.5
1.0
Frequency (GHz)
1.5
1.0
1.0
0.5
0.0
S22
S21
0.5
-0.5
-1.0
0.0
real(S21) meas
imag(S21) meas
real(S21) calc
imag(S21) calc
0.5
1.0
Frequency (GHz)
0.0
-0.5
1.5
-1.0
0.0
real(S22) meas
imag(S22) meas
real(S22) calc
imag(S22) calc
0.5
1.0
Frequency (GHz)
1.5
FUTURE WORK
CONTRIBUTIONS
SO WHAT ?
Design
{ Scalable, analytical models for
synthesis and optimization
Verification
{ Field solvers
S. S. Mohan, PhD Oral Exam, June 9, 1999, CIS, Stanford University