Quanta Zri, Zqi Ra1a Schematics PDF

5
ZRI/ZQI Block Diagram

PCB STACK UP
VRAM
Channel A(1600 MHZ)
DDRIII-SODIMM
APU
DDR
Mars XT(25W)
Channel B
PEG0~8(PCI-E x 8)
GFX
P12
DRAM
GPU
Channel A
eDP PANEL
DP2
LAYER 3 : IN1
P25
X'TAL
27.0MHz
27mm X 31mm
P3, 4, 5, 6
LAYER 5 : SVCC
LAYER 6 : IN3
LAYER 6 : GND
HDMI CONN
DP1
FP2 827pin BGA
P13,14
LAYER 4 : IN2
VRAM DDR3-128MB*8 = 1GB

VRAM DDR3-256MB*8 = 2GB
P14~21
Channel B
LAYER 2 : GND
29mm X 29mm
Richland APU
(35W)
256Mb*16*8pcs/8 = 4GB
LAYER 1 : TOP
P22, 23
LAYER 8 : BOT
P26
TXP/N,0/1
DP0
UMI
TXP/N,2/3
TXP/N,2/3
SW
HD3SS2521
USB3-1
UMI LINK
USB2-11
2.5GT /s
USB3
MINI DP CONN
USB2
P25
P25
UMI(x4)
SATA - HDD
SATA0
USB3-0
P31
USB3.0
USB2-10
SATA
SATA - SSD
USB3.0 Con.
(charger) P34
SATA1
P31
USB2-7
USB Con.
USB2-0
P33
D/B
USB Con.
P30
Charger (BQ24737RGRR)
P38
Bolton M3
USB2.0
LAN & CR
QCA8175
10/100/1G
PCIE-1
24.5mm X 24.5mm
USB2-6
P26
B
P28
X'TAL
P8
25MHz
RTC
Touch Panel
MINI CARD
WLAN+BT
PCIE
USB2-3
P33
CCD
PCIE-0
FCH
RJ45 Conn.
SYSTEM 5V/3V (TPS51225RUKR)
P28
P39
Card Reader Conn.

+1.5VSUS(TPS51216)
P29
P40
X'TAL
25MHz
USB2-8
+1.2V(TPS51211) / +2.5V
BATTERY
P26
X'TAL
32.768KHz P8
P8
P41
1.1V_DUAL(TPS51211)
P7, 8, 9, 10, 11
HDAUDIO
LPC
P42
BIOSROM
SPIROM
P9
+VDD_CORE (ISL62771)
P43
+VGPU_CORE(TPS51728)
P44
Audio Codec
ALC3225
+PCIE_VDDC_GFX(TPS51211)
EC 985L
P45
P32
P37
+1.8V_GFX(TPS54318RTER)
P46
INT. MIC
P32
HP/MIC
P32
AMP
ALC1001
APU FAN
P35
P32
GPU FAN
HALL Sensor
P33
P35
K/B
Touch Pad
P35
P35
Discharge /Thermal
TPM Conn.
P47
P31
D/B
Quanta Computer Inc.

Seaker Conn.
PROJECT :ZRI/ZQI
P32
Size
Document Number
Rev
A1A
BLOCK DIAGRAM
Date:
5
Wednesday, April 24, 2013
Sheet
1
of
50
BOM Option
ITEM
MARK
LVDS Panel Sku
Hudson M3
SMBUS
LVDS@
eDP Panel Sku
eDP@
VGA Sku
EV@
3V/5VPCU
FCH SMBUS
VGA Thames Sku
EV_T@
VGA Mars Sku
EV_M@
VGA Sku for Thames and Mars stuff

different value parts
DNBSWON#
EV_SP@
RSMRST#
GPU 128bit Sku
EV_128@
GPU 128bit Sku of Special part

value change
EV_128SP@
10
USB Charge Functions Sku
CH@
No USB Charge Functions Sku
NCH@
11
USB3.0 Re-Driver Sku
RD@
12
No USB3.0 Re-Driver Sku
NRD@
PCLK_SMB
AD26
SMBUS Function Define
PDAT_SMB
AD25
DDR / WLAN
(+3V)
S5_ON/S5
Pin NO.
NBSWON#
Power Sequence
DESCRIPTION
AC IN
1
SCLK1
T7
SDATA1
R7
Touch Pad
(+3V_S5)
PCIE_WAKE#
SMB_EC_CLK (SCLK2)
H19
SMB_EC_DAT (SDATA2)
G19
EC
(+3V_S5)
SUSC
SUSB
SCLK3
G22
SDATA3
G21
Not used
(+3VPCU)
SUSON
MAINON
SCL4
J19
SDATA4
K19
Not used
(+3V_S5)
13
Always connect functions Sku
AC@
14
No Always connect functions Sku
NAC@
VR_ON
15
Special part value change or modify

for different BOM sku
SP@
CPU_CORE
16
Key Board Back light Sku
KBL@
VRM_PWRGD
17
SSD Sku
SSD@
18
Touch panel Sku
TP@
EC
SMBUS
Pin NO.
KBC SMBUS
SMBUS Function Define
HWPG
ECPWROK
MBCLK
70
MBDATA
69
Battery, FCH
(+3VPCU)
Page 9 GPIO strap pin
SB_PWRGD_IN
ITEM
CPU RESET
DESCRIPTION
MARK
APU_SIC_EC
67
APU_SID_EC
68
APU
(+3V_S5)
Synaptics touch pad
SYNP@
ELAN touch pad
ELAN@
For UMA Sku
UMA@
ELPIDA on board DRAM
ELP@
HYNIX on board DRAM
HYN@
CPU POWER OK
GPUT_CLK
119
GPUT_DATA
120
GPU
(+3V_GFX)
TPCLK
72
TPDATA
71
Touch Pad
(+3V)
EC
I2Ce_1(M)
Device
FCH
I2Cf_2(M)
I2Ce_2(M)
Charger
I2C_Device(S)
Battery
ALL/S5
ALL
APU
I2Ce_3(M)
I2Cf_3(M)
S5
APU
S5
I2Cf_1(M)
I2Cf_0(M)
DDR
WLAN/3G
Image Sensor
S0
EC will Conflict with FCH.

Do not mount

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
SYSTEM INFORMATION
Date:
5
Sheet
1
of
50
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
UMI_RXP0
UMI_RXN0
UMI_RXP1
UMI_RXN1
UMI_RXP2
UMI_RXN2
UMI_RXP3
UMI_RXN3
+1.2V_VDDP
R576
196/F_6
P_ZVDDP
AH5
AH6
AG5
AG6
AE6
AE5
AD6
AD5
P_GPP_RXP[0]
P_GPP_RXN[0]
P_GPP_RXP[1]
P_GPP_RXN[1]
P_GPP_RXP[2]
P_GPP_RXN[2]
P_GPP_RXP[3]
P_GPP_RXN[3]
AM10
AN10
AN8
AM8
AP8
AR8
AR7
AP7
P_UMI_RXP[0]
P_UMI_RXN[0]
P_UMI_RXP[1]
P_UMI_RXN[1]
P_UMI_RXP[2]
P_UMI_RXN[2]
P_UMI_RXP[3]
P_UMI_RXN[3]
AR11
P_ZVDDP
GPP
P_GFX_RXP[0]
P_GFX_RXN[0]
P_GFX_RXP[1]
P_GFX_RXN[1]
P_GFX_RXP[2]
P_GFX_RXN[2]
P_GFX_RXP[3]
P_GFX_RXN[3]
P_GFX_RXP[4]
P_GFX_RXN[4]
P_GFX_RXP[5]
P_GFX_RXN[5]
P_GFX_RXP[6]
P_GFX_RXN[6]
P_GFX_RXP[7]
P_GFX_RXN[7]
P_GFX_RXP[8]
P_GFX_RXN[8]
P_GFX_RXP[9]
P_GFX_RXN[9]
P_GFX_RXP[10]
P_GFX_RXN[10]
P_GFX_RXP[11]
P_GFX_RXN[11]
P_GFX_RXP[12]
P_GFX_RXN[12]
P_GFX_RXP[13]
P_GFX_RXN[13]
P_GFX_RXP[14]
P_GFX_RXN[14]
P_GFX_RXP[15]
P_GFX_RXN[15]
UMI
FP2 only support PEG X 8
AP1
AP2
AM1
AM2
AK3
AK4
AJ1
AJ2
AH4
AH3
AF2
AF1
AD1
AD2
AB3
AB4
AA1
AA2
Y4
Y3
V2
V1
T1
T2
P3
P4
N1
N2
M4
M3
K2
K1
P_GFX_TXP[0]
P_GFX_TXN[0]
P_GFX_TXP[1]
P_GFX_TXN[1]
P_GFX_TXP[2]
P_GFX_TXN[2]
P_GFX_TXP[3]
P_GFX_TXN[3]
P_GFX_TXP[4]
P_GFX_TXN[4]
P_GFX_TXP[5]
P_GFX_TXN[5]
P_GFX_TXP[6]
P_GFX_TXN[6]
P_GFX_TXP[7]
P_GFX_TXN[7]
P_GFX_TXP[8]
P_GFX_TXN[8]
P_GFX_TXP[9]
P_GFX_TXN[9]
P_GFX_TXP[10]
P_GFX_TXN[10]
P_GFX_TXP[11]
P_GFX_TXN[11]
P_GFX_TXP[12]
P_GFX_TXN[12]
P_GFX_TXP[13]
P_GFX_TXN[13]
P_GFX_TXP[14]
P_GFX_TXN[14]
P_GFX_TXP[15]
P_GFX_TXN[15]
AN1
AN2
AM4
AM3
AK2
AK1
AH1
AH2
AF3
AF4
AE1
AE2
AD4
AD3
AB2
AB1
Y1
Y2
V3
V4
U1
U2
T4
T3
P2
P1
M1
M2
K3
K4
J1
J2
P_GPP_TXP[0]
P_GPP_TXN[0]
P_GPP_TXP[1]
P_GPP_TXN[1]
P_GPP_TXP[2]
P_GPP_TXN[2]
P_GPP_TXP[3]
P_GPP_TXN[3]
AG7
AG8
AE7
AE8
AD7
AD8
AB6
AB5
P_UMI_TXP[0]
P_UMI_TXN[0]
P_UMI_TXP[1]
P_UMI_TXN[1]
P_UMI_TXP[2]
P_UMI_TXN[2]
P_UMI_TXP[3]
P_UMI_TXN[3]
AN6
AM6
AP6
AR6
AP4
AR4
AP3
AR3
P_ZVSS
PEG_TXP0_C
PEG_TXN0_C
PEG_TXP1_C
PEG_TXN1_C
PEG_TXP2_C
PEG_TXN2_C
PEG_TXP3_C
PEG_TXN3_C
PEG_TXP4_C
PEG_TXN4_C
PEG_TXP5_C
PEG_TXN5_C
PEG_TXP6_C
PEG_TXN6_C
PEG_TXP7_C
PEG_TXN7_C
AP11
C695
EV@0.1u/10V_4
C693
EV@0.1u/10V_4
C692
EV@0.1u/10V_4
C690
EV@0.1u/10V_4
C688
EV@0.1u/10V_4
C686
EV@0.1u/10V_4
C683
EV@0.1u/10V_4
C681
C696
EV@0.1u/10V_4
C694
EV@0.1u/10V_4
C691
EV@0.1u/10V_4
C689
EV@0.1u/10V_4
C687
EV@0.1u/10V_4
C685
EV@0.1u/10V_4
C684
EV@0.1u/10V_4
C682
EV@0.1u/10V_4
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
EV@0.1u/10V_4
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
PEG X 8
PEG X 8
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
GRAPHICS
U48A
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
FP2 only support PEG X 8
A10
AJ05757RT01
A8
AJ05557UT01
A6
AJ053578T01
UMI_TXP0_C
UMI_TXN0_C
UMI_TXP1_C
UMI_TXN1_C
UMI_TXP2_C
UMI_TXN2_C
UMI_TXP3_C
UMI_TXN3_C
C709
0.1u/10V_4
C710
0.1u/10V_4
C705
0.1u/10V_4
C702
0.1u/10V_4
C708
0.1u/10V_4
C713
0.1u/10V_4
C707
0.1u/10V_4
C704
0.1u/10V_4
UMI_TXP0
UMI_TXN0
UMI_TXP1
UMI_TXN1
UMI_TXP2
UMI_TXN2
UMI_TXP3
UMI_TXN3
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
P_ZVSS
RICHLAND_APU_BGA813
R570
196/F_6
HDT+ Connector for Debug only

+1.5V
R545
*1K_4
+1.5VSUS
R552
*1K_4
J1
U44
APU_TRST#
[5] APU_TRST#
R549
R540
R530
*10K_4
*10K_4
*10K_4
1
3
5
7
9
11
13
15
17
19
CPU_VDDIO1
GND1
GND2
GND3
CPU_TRST_L
CPU_DBRDY3
CPU_DBRDY2
CPU_DBRDY1
GND4
CPU_VDDIO2
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TDO
CPU_PWROK_BUF
CPU_RST_L_BUF
CPU_DBRDY0
CPU_DBREQ_L
CPU_PLLTEST0
CPU_PLLTEST1
APU_TCK
APU_TMS
APU_TDI
APU_TDO
APU_PWROK_BUF
APU_RST_L_BUF
2
4
6
8
10
12
14
16
18
20
APU_TCK [5]
APU_TMS [5]
APU_TDI [5]
APU_TDO [5]
[5,8] APU_RST#
[5,8] APU_PWRGD_R
APU_DBRDY [5]
APU_DBREQ# [5]
APU_TEST19_PLLTEST0 [5]
APU_DBREQ#
C703
A1
GND
A2
Y1
VCC
Y2
APU_RST_L_BUF
+3V
APU_PWROK_BUF
*74LVC2G07
*0.1u/10V_4
*HDT+ HEADER
A
Close by HDT+ Conector

APU_TDI
APU_TCK
APU_TMS
APU_TRST#
APU_DBREQ#
R558
R565
R563
R551
R533
+1.5VSUS
1K_4
1K_4
1K_4
1K_4
1K_4
PROJECT : ZRI/ZQI
Size
Document Number
APU 1/4(PCIE/UMI/GPP/HDT)
Date:
5
Sheet
1
of
Rev
A1A
50
Soldermask openings for all bottom side vias/TPs under FS1

M_B_DQ[0..63]
M_A_DQ[0..63]
U48B
[12] M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
AA28
R29
T30
R28
R26
P26
P27
P30
P29
M28
AB26
M26
M29
AE27
L26
L27
MA_ADD[0]
MA_ADD[1]
MA_ADD[2]
MA_ADD[3]
MA_ADD[4]
MA_ADD[5]
MA_ADD[6]
MA_ADD[7]
MA_ADD[8]
MA_ADD[9]
MA_ADD[10]
MA_ADD[11]
MA_ADD[12]
MA_ADD[13]
MA_ADD[14]
MA_ADD[15]
M_A_BS#0
M_A_BS#1
M_A_BS#2
AB27
AA29
M30
MA_BANK[0]
MA_BANK[1]
MA_BANK[2]
D16
D20
E25
F30
AK29
AL25
AM20
AM16
MA_DM[0]
MA_DM[1]
MA_DM[2]
MA_DM[3]
MA_DM[4]
MA_DM[5]
MA_DM[6]
MA_DM[7]
M_A_DQSP0
M_A_DQSN0
M_A_DQSP1
M_A_DQSN1
M_A_DQSP2
M_A_DQSN2
M_A_DQSP3
M_A_DQSN3
M_A_DQSP4
M_A_DQSN4
M_A_DQSP5
M_A_DQSN5
M_A_DQSP6
M_A_DQSN6
M_A_DQSP7
M_A_DQSN7
G17
H17
F22
G22
E26
F26
H30
G30
AL29
AL30
AH25
AJ25
AK20
AL20
AK15
AL15
MA_DQS_H[0]
MA_DQS_L[0]
MA_DQS_H[1]
MA_DQS_L[1]
MA_DQS_H[2]
MA_DQS_L[2]
MA_DQS_H[3]
MA_DQS_L[3]
MA_DQS_H[4]
MA_DQS_L[4]
MA_DQS_H[5]
MA_DQS_L[5]
MA_DQS_H[6]
MA_DQS_L[6]
MA_DQS_H[7]
MA_DQS_L[7]
M_A_CLKP0
M_A_CLKN0
M_A_CLKP1
M_A_CLKN1
W29
Y30
W26
W27
U29
V30
U26
U27
MA_CLK_H[0]
MA_CLK_L[0]
MA_CLK_H[1]
MA_CLK_L[1]
MA_CLK_H[2]
MA_CLK_L[2]
MA_CLK_H[3]
MA_CLK_L[3]
[12] M_A_CKE0
[12] M_A_CKE1
L29
K30
MA_CKE[0]
MA_CKE[1]
[12] M_A_ODT0
[12] M_A_ODT1
AD30
AG28
AE26
AG29
MA0_ODT[0]
MA0_ODT[1]
MA1_ODT[0]
MA1_ODT[1]
[12] M_A_CS#0
[12] M_A_CS#1
AD26
AE29
AB30
AF30
MA0_CS_L[0]
MA0_CS_L[1]
MA1_CS_L[0]
MA1_CS_L[1]
[12] M_A_RAS#
[12] M_A_CAS#
[12] M_A_WE#
AB29
AD29
AD28
MA_RAS_L
MA_CAS_L
MA_WE_L
[12] M_A_RST#
[12] M_A_EVENT#
J28
AA26
MA_RESET_L
MA_EVENT_L
[12] M_A_BS#[2..0]
[12] M_A_DM[7..0]
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
G32
+MEMVREF_CPU
+1.5VSUS
R594
39.2/F_4 +M_ZVDDIO
Place close to APU within 1"
AJ32
MA_DATA[0]
MA_DATA[1]
MA_DATA[2]
MA_DATA[3]
MA_DATA[4]
MA_DATA[5]
MA_DATA[6]
MA_DATA[7]
F15
E15
H19
F19
E14
H15
E17
D18
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
MA_DATA[8]
MA_DATA[9]
MA_DATA[10]
MA_DATA[11]
MA_DATA[12]
MA_DATA[13]
MA_DATA[14]
MA_DATA[15]
G20
E20
H23
G23
E19
H20
E22
D22
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
MA_DATA[16]
MA_DATA[17]
MA_DATA[18]
MA_DATA[19]
MA_DATA[20]
MA_DATA[21]
MA_DATA[22]
MA_DATA[23]
H25
F25
D28
D29
E23
D24
D26
D27
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
MA_DATA[24]
MA_DATA[25]
MA_DATA[26]
MA_DATA[27]
MA_DATA[28]
MA_DATA[29]
MA_DATA[30]
MA_DATA[31]
G28
G29
H27
J29
E28
F27
H29
H28
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
MA_DATA[32]
MA_DATA[33]
MA_DATA[34]
MA_DATA[35]
MA_DATA[36]
MA_DATA[37]
MA_DATA[38]
MA_DATA[39]
AH29 M_A_DQ32
AJ30 M_A_DQ33
AM28 M_A_DQ34
AM27 M_A_DQ35
AH27 M_A_DQ36
AH28 M_A_DQ37
AJ29 M_A_DQ38
AK27 M_A_DQ39
MA_DATA[40]
MA_DATA[41]
MA_DATA[42]
MA_DATA[43]
MA_DATA[44]
MA_DATA[45]
MA_DATA[46]
MA_DATA[47]
AK26 M_A_DQ40
AJ26 M_A_DQ41
AK23 M_A_DQ42
AJ23 M_A_DQ43
AM26 M_A_DQ44
AL26 M_A_DQ45
AM24 M_A_DQ46
AL23 M_A_DQ47
MA_DATA[48]
MA_DATA[49]
MA_DATA[50]
MA_DATA[51]
MA_DATA[52]
MA_DATA[53]
MA_DATA[54]
MA_DATA[55]
AK22 M_A_DQ48
AH22 M_A_DQ49
AK19 M_A_DQ50
AH19 M_A_DQ51
AM22 M_A_DQ52
AL22 M_A_DQ53
AJ20 M_A_DQ54
AL19 M_A_DQ55
MA_DATA[56]
MA_DATA[57]
MA_DATA[58]
MA_DATA[59]
MA_DATA[60]
MA_DATA[61]
MA_DATA[62]
MA_DATA[63]
AK17 M_A_DQ56
AJ17 M_A_DQ57
AK14 M_A_DQ58
AH14 M_A_DQ59
AM18 M_A_DQ60
AL17 M_A_DQ61
AH15 M_A_DQ62
AL14 M_A_DQ63
[12]
[13,14] M_B_A[15:0]
Y33
R32
T31
P33
P32
P31
N32
M33
M32
L32
AB31
M31
K32
AF33
K33
J32
MB_ADD[0]
MB_ADD[1]
MB_ADD[2]
MB_ADD[3]
MB_ADD[4]
MB_ADD[5]
MB_ADD[6]
MB_ADD[7]
MB_ADD[8]
MB_ADD[9]
MB_ADD[10]
MB_ADD[11]
MB_ADD[12]
MB_ADD[13]
MB_ADD[14]
MB_ADD[15]
M_B_BS#0
M_B_BS#1
M_B_BS#2
AB33
AA32
K31
MB_BANK[0]
MB_BANK[1]
MB_BANK[2]
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
C18
B23
C28
D31
AM31
AN30
AR24
AN18
MB_DM[0]
MB_DM[1]
MB_DM[2]
MB_DM[3]
MB_DM[4]
MB_DM[5]
MB_DM[6]
MB_DM[7]
M_B_DQSP0
M_B_DQSN0
M_B_DQSP1
M_B_DQSN1
M_B_DQSP2
M_B_DQSN2
M_B_DQSP3
M_B_DQSN3
M_B_DQSP4
M_B_DQSN4
M_B_DQSP5
M_B_DQSN5
M_B_DQSP6
M_B_DQSN6
M_B_DQSP7
M_B_DQSN7
B18
A18
B24
A24
B30
B29
D32
D33
AM32
AM33
AN28
AP29
AP23
AP24
AR18
AP18
MB_DQS_H[0]
MB_DQS_L[0]
MB_DQS_H[1]
MB_DQS_L[1]
MB_DQS_H[2]
MB_DQS_L[2]
MB_DQS_H[3]
MB_DQS_L[3]
MB_DQS_H[4]
MB_DQS_L[4]
MB_DQS_H[5]
MB_DQS_L[5]
MB_DQS_H[6]
MB_DQS_L[6]
MB_DQS_H[7]
MB_DQS_L[7]
M_B_CLKP0
M_B_CLKN0
M_B_CLKP1
M_B_CLKN1
W32
Y32
V33
V32
U32
V31
T33
T32
MB_CLK_H[0]
MB_CLK_L[0]
MB_CLK_H[1]
MB_CLK_L[1]
MB_CLK_H[2]
MB_CLK_L[2]
MB_CLK_H[3]
MB_CLK_L[3]
[13] M_B_CKE0
[14] M_B_CKE1
H32
H33
MB_CKE[0]
MB_CKE[1]
[13] M_B_ODT0
[14] M_B_ODT1
AF31
AH31
AE32
AH33
MB0_ODT[0]
MB0_ODT[1]
MB1_ODT[0]
MB1_ODT[1]
[13] M_B_CS#0
[14] M_B_CS#1
AD31
AF32
AC32
AG32
MB0_CS_L[0]
MB0_CS_L[1]
MB1_CS_L[0]
MB1_CS_L[1]
[13,14] M_B_RAS#
[13,14] M_B_CAS#
[13,14] M_B_WE#
AB32
AD32
AD33
MB_RAS_L
MB_CAS_L
MB_WE_L
[13,14] M_B_BS#[2..0]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13,14]
[13]
[13]
[14]
[14]
[13,14]
U48C
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
H31
Y31
[13,14] M_B_RST#
TP34
MB_DATA[0]
MB_DATA[1]
MB_DATA[2]
MB_DATA[3]
MB_DATA[4]
MB_DATA[5]
MB_DATA[6]
MB_DATA[7]
C16
B17
B20
C20
A16
B16
B19
A20
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
MB_DATA[8]
MB_DATA[9]
MB_DATA[10]
MB_DATA[11]
MB_DATA[12]
MB_DATA[13]
MB_DATA[14]
MB_DATA[15]
B22
C22
A26
B26
B21
A22
C24
B25
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
MB_DATA[16]
MB_DATA[17]
MB_DATA[18]
MB_DATA[19]
MB_DATA[20]
MB_DATA[21]
MB_DATA[22]
MB_DATA[23]
A28
B28
B31
A32
C26
B27
A30
C30
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
MB_DATA[24]
MB_DATA[25]
MB_DATA[26]
MB_DATA[27]
MB_DATA[28]
MB_DATA[29]
MB_DATA[30]
MB_DATA[31]
B33
C32
F33
F32
B32
C31
E32
F31
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
MB_DATA[32]
MB_DATA[33]
MB_DATA[34]
MB_DATA[35]
MB_DATA[36]
MB_DATA[37]
MB_DATA[38]
MB_DATA[39]
AK32
AL32
AP32
AN31
AK31
AK33
AN32
AP33
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
MB_DATA[40]
MB_DATA[41]
MB_DATA[42]
MB_DATA[43]
MB_DATA[44]
MB_DATA[45]
MB_DATA[46]
MB_DATA[47]
AP30
AR30
AP27
AN26
AR32
AP31
AR28
AP28
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
MB_DATA[48]
MB_DATA[49]
MB_DATA[50]
MB_DATA[51]
MB_DATA[52]
MB_DATA[53]
MB_DATA[54]
MB_DATA[55]
AP25
AN24
AR22
AP21
AP26
AR26
AN22
AP22
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
MB_DATA[56]
MB_DATA[57]
MB_DATA[58]
MB_DATA[59]
MB_DATA[60]
MB_DATA[61]
MB_DATA[62]
MB_DATA[63]
AR20
AP19
AP16
AR16
AN20
AP20
AP17
AN16
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
MB_RESET_L
MB_EVENT_L
RICHLAND_APU_BGA813
M_VREF
M_ZVDDIO
RICHLAND_APU_BGA813
+1.5VSUS
R227
A10
AJ05757RT01
A8
AJ05557UT01
A6
AJ053578T01
+MEMVREF_CPU
1K/F_4
A
R222
*short_4
R225
1K/F_4
C333
0.47u/6.3V_4
C330
0.1u/10V_4
C327
1000p/50V_4

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
APU 2/4(DDR3 MEM I/F)

Date:
5
Sheet

1
of
50
U48D
C678 0.1u/10V_4
C677 0.1u/10V_4
INT_HDMI_TXDP1_C D4
INT_HDMI_TXDN1_C D3
DP1_TXP[1]
DP1_TXN[1]
C676 0.1u/10V_4
C675 0.1u/10V_4
INT_HDMI_TXDP0_C D1
INT_HDMI_TXDN0_C D2
DP1_TXP[2]
DP1_TXN[2]
C674 0.1u/10V_4
C673 0.1u/10V_4
INT_HDMI_TXCP_C C1
INT_HDMI_TXCN_C C2
DP1_TXP[3]
DP1_TXN[3]
C711 0.1u/10V_4
C714 0.1u/10V_4
INT_EDP_TXP0_C
INT_EDP_TXN0_C
B2
A2
DP2_TXP[0]
DP2_TXN[0]
C715 0.1u/10V_4
C717 0.1u/10V_4
INT_EDP_TXP1_C
INT_EDP_TXN1_C
B3
A3
DP2_TXP[1]
DP2_TXN[1]
[26] EDP_TXP2
[26] EDP_TXN2
[26] EDP_TXP3
[26] EDP_TXN3
C718 0.1u/10V_4
C724 0.1u/10V_4
INT_EDP_TXP2_C
INT_EDP_TXN2_C
B4
A4
DP2_TXP[2]
DP2_TXN[2]
C725 0.1u/10V_4
C727 0.1u/10V_4
INT_EDP_TXP3_C
INT_EDP_TXN3_C
B5
A5
DP2_TXP[3]
DP2_TXN[3]
Note: CLK_APU_HCLKP/N is 100MHZ SSC
[8] CLK_APU_HCLKP
[8] CLK_APU_HCLKN
AL9
AK9
CLKIN_H
CLKIN_L
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC
[8] CLK_DP_NSSCP
[8] CLK_DP_NSSCN
AL7
AK7
DISP_CLKIN_H
DISP_CLKIN_L
APU_SVT
+1.5V
EC
FCH
300_4
C190 150P/50V_4
300_4
1K_4
C178 150P/50V_4
[8,37] H_PROCHOT#
R181
[43] CORE_PWM_PROCHOT#
Q22
H_PROCHOT#
APU_THERMTRIP#_C
APU_ALERT
*short_4
[3]
[3]
[3]
[3]
[3]
[3]
[3]
R211
2
10K_4
APU_SVT_R
APU_SIC
APU_SID
R163
+1.5VSUS
+1.5VSUS
+1.5V
*short_4
*1K_4
APU_PWRGD_R
R155
R180
+1.5VSUS
[3,8] APU_RST#
[3,8] APU_PWRGD_R
R546
R534
3
METR3904-G_200MA
SVC
SVD
SVT
AJ11
AH11
SIC
SID
AK11
AH9
RESET_L
PWROK
E11
G11
H12
F11
H11
E8
E7
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#
G6
H6
H5
G7
G5
H7
[43] APU_VDD_RUN_FB_L
APU Core Power
E5
E6
D6
AL12
AK5
AR10
TP17
[43] APU_VDDNB_RUN_FB_H
TP18
[43] APU_VDD_RUN_FB_H
TP20
U5
U6
DP0_HPD
DP1_HPD
DP2_HPD
DP3_HPD
DP4_HPD
DP5_HPD
M7
L7
J7
P7
R7
U7
DP_BLON
DP_DIGON
DP_VARY_BL
C6
D7
A6
DP_AUX_ZVSS
B6
PROCHOT_L
THERMTRIP_L
ALERT_L
TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L
DISPLAY PORT 0
DISPLAY PORT 1
DISPLAY PORT MISC.
TEST6
TEST9
TEST10
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST20
TEST24
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST30_H
TEST30_L
TEST31
TEST32_H
TEST32_L
TEST35
AL6
Y23
V23
G9
F9
E9
G8
F12
E12
F14
G12
AJ8
AH8
G14
H14
V25
Y25
AH32
R25
T25
AL5
DMAACTIVE_L
AP10
TEST4
TEST5
RSVD
RSVD
RSVD
RSVD
RSVD
T23
R23
1.8K_4
1.8K_4
AJ053578T01
eDP
D
+3V
R146
eDP@10K_4
INT_MINI_HPD_Q [25]
INT_HDMI_HPD [27]
INT_eDP_HPD [26]
R569
R143
eDP@10K_4
100K_4
eDP_BL_EN
APU_DIGON
eDP_BL_EN [26]
R573
150/F_4
To AMD HDT
APU_VARY_BL
APU_TEST9
APU_TEST10
APU_TEST14_BP0
APU_TEST15_BP1
APU_TEST16_BP2
APU_TEST17_BP3
APU_TEST18_PLLTEST1
APU_TEST19_PLLTEST0
APU_TEST20_SCANCLK2
APU_TEST24_SCANCLK1
APU_TEST25_H
APU_TEST25_L
TP28
TP29
TP26
TP27
TP25
TP23
R204
R202
R210
R207
R174
R177
EDP_BRIGHT [26]
Q15
eDP@2N7002D
APU_VARY_BL
DP_AUX_ZVSS
1K_4
1K_4
R123
*eDP@100K_4
2
Q10
eDP@PDTC143TT
1K_4
1K_4
510/F_4
510/F_4
+1.2V_VDDP
C
APU_TEST30_H
APU_TEST30_L
M_TEST
APU_TEST32_H
APU_TEST32_L
APU_TEST35
R577
TP36
TP32
DMAACTIVE_L controls
entry and exit from the
sleep and power states
TP33
TP35
1K_4
+3V
+1.5VSUS
DMAACTIVE_L [8]
CPU_THERMDA
CPU_THERMDC
TP30
TP31
R145
eDP@10K_4
R133
eDP@10K_4
L8
P8
AH12
AJ12
AK12
VSS_SENSE
VDDP_SENSE
VDDNB_SENSE
VDDIO_SENSE
VDD_SENSE
VDDR_SENSE
+1.5VSUS
eDP_DIGON [26]
Q16
eDP@2N7002D
+1.5VSUS
SENSE
SVC
SVD
[43]
DP5_AUXP
DP5_AUXN
eDP_AUXP [26]
eDP_AUXN [26]
R171
R175
[26] EDP_TXP1
[26] EDP_TXN1
DISPLAY PORT 2
DP2
eDP
R5
R6
TEST
[26] EDP_TXP0
[26] EDP_TXN0
CLK
[27] INT_HDMI_TXCP
[27] INT_HDMI_TXCN
DP4_AUXP
DP4_AUXN
SER.
[27] INT_HDMI_TXDP0
[27] INT_HDMI_TXDN0
CTRL
[27] INT_HDMI_TXDP1
[27] INT_HDMI_TXDN1
DP1
HDMI
P5
P6
INT_EDP_AUXP_C
INT_EDP_AUXN_C
DP1_TXP[0]
DP1_TXN[0]
DP3_AUXP
DP3_AUXN
INT_HDMI_AUXP [27]
INT_HDMI_AUXN [27]
C157 0.1u/10V_4
C169 0.1u/10V_4
INT_HDMI_TXDP2_C E2
INT_HDMI_TXDN2_C E1
INT_EDP_AUXP_C
INT_EDP_AUXN_C
C680 0.1u/10V_4
C679 0.1u/10V_4
[27] INT_HDMI_TXDP2
[27] INT_HDMI_TXDN2
DP2_AUXP
DP2_AUXN
J5
J6
AJ05557UT01
A6
DP0_TXP[3]
DP0_TXN[3]
DP0_TXP[1]
DP0_TXN[1]
MINI_DP_AUXP [25]
MINI_DP_AUXN [25]
F1
F2
INT_HDMI_AUXP
INT_HDMI_AUXN
AJ05757RT01
A8
DP0_TXP[2]
DP0_TXN[2]
[25] MINI_DP_TXP3
[25] MINI_DP_TXN3
DP1_AUXP
DP1_AUXN
L5
L6
A10
APU_DIGON
R593
*39.2/F_4
RICHLAND_APU_BGA813
R149
300_4
M_TEST
R136
eDP@100K_4
2
Q14
eDP@PDTC143TT
[25] MINI_DP_TXP2
[25] MINI_DP_TXN2
F4
F3
DP0_AUXP
DP0_AUXN
DP0_TXP[0]
DP0_TXN[0]
JTAG
[25] MINI_DP_TXP1
[25] MINI_DP_TXN1
H3
H4
M5
M6
RSVD
DP0
MINI DP
[25] MINI_DP_TXP0
[25] MINI_DP_TXN0
H2
H1
APU_TEST35
+1.5VSUS
M_TEST CONNECTION TBD
7/8 For Comal.
R592
39.2/F_4
R153
*300_4
Q19
TEST35 PU FOR INTERNAL
TEST35 PD FOR CUSTOMER
[7,11] FCH_PWRGD
+1.5VSUS
FDV301N_200MA
3
METR3904-G_200MA
[7] APU_THERMTRIP#
APU_THERMTRIP#_C
Q18
+1.5VSUS
R164
2K/F_4
R169
1K_4
R168
1K_4
BOOT VOLTAGE
Q17
METR3904-G_200MA
SYS_SHDN#
SVC
SVD
1.1
1.1
1.0
1.2
0.9
1.0
0.8
0.8
SYS_SHDN# [16,37,39,44,47]
+1.5VSUS
1K_4
APU_ALERT
2
3
VFIX_+VDD
=OPEN
R529
*1K_4
R528
*1K_4
R150
*2.2K_4
SVC
R548
Rd
*short_4
APU_SVC
APU_SVC [43]
SVD
R547
Re
*short_4
APU_SVD
APU_SVD [43]
APU_PWRGD_R
R156
*short_4
APU_PWRGD_SVID_REG
APU_PWRGD_SVID_REG
APU_SIC
1
FDV301N_200MA
Q21
[37] APU_SID_EC
VFIX_+VDD
=VCC/GND
+1.5V
R571
2
[37] APU_SIC_EC
100K_4
+1.5VSUS
R165
2K/F_4
R157
R151
1K_4
R148
1K_4
R152
10K_4
Rf
R536
*220_4
R535
*220_4
R154
*220_4
Ra
Rb
Rc
C136
*0.1u/10V_4
APU_SID
[43]
for normal operation

open Ra , Rb,Rc

PROJECT : ZRI/ZQI
FDV301N_200MA
Q20
Size
Rev
A1A
APU 3/4(Display/Misc)
Date:
Document Number
Sheet

1
of
50
U48F
+VDD_CORE
U48E
22A
Maximum IDDNBspike 33A
J12
J14
J15
J17
J19
J20
J22
M11
M12
M14
M15
M17
M19
M20
M22
R8
R9
R11
R12
R14
R15
R17
R19
R20
R22
U8
V9
V11
V12
V14
V15
+VDDNB_CORE
C198
22u/6.3V_8
C197
22u/6.3V_8
C731
0.22u/10V_4
C235
22u/6.3V_8
C739
0.22u/10V_4
C236
22u/6.3V_8
C741
39p/50V_4
C730
39p/50V_4
C740
180p/50V_4
For EMI
+VDDNB_CAP
+VDDNB_CORE
C209
180p/50V_4
C165
22u/6.3V_8
C166
22u/6.3V_8
C203
22u/6.3V_8
A7
A8
A9
A10
A11
A12
A13
A14
A15
B7
B8
B9
B10
C204
22u/6.3V_8
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
2.3A Up to DDR3-1333 @ 1.5V VDDIO

C305
0.22u/10V_4
C320
0.22u/10V_4
C411
0.22u/10V_4
C322
0.22u/10V_4
C395
0.22u/10V_4
+1.2V
R578
C737
22u/6.3V_8
C729
180p/50V_4
C226
180p/50V_4
C221
22u/6.3V_8
W33
AA23
AA25
AA27
AA30
AA33
AB28
AC30
AC33
AD23
AD25
AD27
AE28
AE30
AE33
AG23
AG25
AG27
AG30
AG33
AM12
AN12
AP12
AP13
AR12
AR13
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDR
VDDR
VDDR
VDDR
VDDR
AN14
AP14
AP15
AR14
AR15
C326
0.22u/10V_4
C736
39p/50V_4
C185
1000p/50V_4
C201
0.22u/10V_4
C215
0.22u/10V_4
AA6
AA7
+VDDP_CAP
AM13
AM14
C152
*22u/6.3V_8
+2.5V_VDDA
+2.5V
VDDA
VDDA
VDDA= 0.75A
C186
3300p/50V_4
AJ05757RT01
A8
AJ05557UT01
A6
AJ053578T01
C184
22u/6.3V_8
C167
22u/6.3V_8
C205
22u/6.3V_8
C238
*22u/6.3V_8
C257
*22u/6.3V_8
C194
*22u/6.3V_8
C321
*22u/6.3V_8
C202
0.22u/10V_4
C225
0.22u/10V_4
C177
*0.22u/10V_4
C163
39p/50V_4
C249
*0.01u/25V_4
C278
0.01u/25V_4
C208
*180p/50V_4
C256
180p/50V_4
C223
180p/50V_4
C182
180p/50V_4
For EMI
C224
22u/6.3V_8
C162
22u/6.3V_8
C279
*22u/6.3V_8
C181
39p/50V_4
C227
0.01u/25V_4
C244
0.01u/25V_4
+VDDNB_CORE
APU POWER TABLE
+VDDNB_CAP
PIN NAME
NET NAME
VDD
+VDD_CORE
1.0V ~ 1.3V
VDDNB
+VDDNB_CORE
1.05V ~ 1.325V
VDDIO
+1.5VSUS
VDDP
+1.2V_VDDP
+1.2V
VDDR
+1.2V_VDDR
+1.2V
VDDA
+2.5V_VDDA
VOLTAGE
1.5V
+2.5V
+1.5VSUS
C401
22u/6.3V_8
C299
22u/6.3V_8
C281
4.7u/6.3V_6
C275
4.7u/6.3V_6
C300
4.7u/6.3V_6
C277
180p/50V_4
C301
180p/50V_4
C280
180p/50V_4
C284
180p/50V_4
For EMI
C297
4.7u/6.3V_6
+1.2V_VDDR
VDDR = 3.2A ( Up to DDR3-1333 @ 1.5V )
+1.2V
R581
C274
0.22u/10V_4
C252
0.22u/10V_4
C251
180p/50V_4
C250
180p/50V_4
C743
1000p/50V_4
C273
39p/50V_4
C745
180p/50V_4
C747
4.7u/6.3V_6
*short_8
C748
180p/50V_4
Across VDDIO and VSS split
C188
39p/50V_4
C404
4.7u/6.3V_6
A10
C161
22u/6.3V_8
C242
22u/6.3V_8
+1.5VSUS
C187
0.22u/10V_4
C218
22u/6.3V_8
DECOUPLING between PROCESSOR and DIMMs
L19
HCB1608KF-221T20_2A
C206
4.7u/6.3V_6
C239
22u/6.3V_8
VDDP_CAP
VDDP_CAP
RICHLAND_APU_BGA813
C151
22u/6.3V_8
C258
22u/6.3V_8
M9
N9
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
C328
0.22u/10V_4
C220
*22u/6.3V_8
B11
B12
B13
B14
B15
C8
C10
C12
C14
D8
D10
D12
D14
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDP = 3.5A
*short_8
V17
V19
V20
V22
W8
AA8
AA9
AA11
AA12
AA14
AA15
AA17
AA19
AA20
AA22
AD9
AD11
AD12
AD14
AD15
AD17
AD19
AD20
AD22
AG12
AG14
AG15
AG17
AG19
AG20
AG22
J33
K23
K25
L28
L30
L33
M27
N23
N25
N30
N33
P28
R27
R30
R33
U28
U30
U33
W28
W30
+1.2V_VDDP
B
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB_CAP
VDDNB_CAP
+1.5VSUS
C319
0.22u/10V_4
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
A17
A19
A21
A23
A25
A27
A29
A31
B1
C3
C4
C33
D5
D9
D11
D13
D15
D17
D19
D21
D23
D25
D30
E4
E27
E29
E30
E33
F5
F6
F7
F8
F17
F20
F23
F28
F29
G1
G2
G4
G15
G19
G25
G26
G27
G33
H8
H9
H22
H26
J4
J8
J9
J11
J23
J25
J26
J27
J30
K9
K11
K12
K14
K15
K17
K19
K20
K22
L1
L2
L4
M8
M23
M25
N4
N11
N12
N14
N15
N17
N19
N20
N22
R1
R2
R4
T9
T11
T12
T14
T15
T17
T19
T20
T22
U4
W1
W2
W4
W5
W6
W7
Y9
22A
Maximum IDDspike 35A
+VDD_CORE
C304
4.7u/6.3V_6
C405
4.7u/6.3V_6
C396
4.7u/6.3V_6
C397
0.22u/10V_4
C318
0.22u/10V_4
C325
0.22u/10V_4
C398
0.22u/10V_4
C324
39p/50V_4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y11
Y12
Y14
Y15
Y17
Y19
Y20
Y22
AA4
AA5
AB7
AB8
AC1
AC2
AC4
AC9
AC11
AC12
AC14
AC15
AC17
AC19
AC20
AC22
AC23
AC25
AE4
AF9
AF11
AF12
AF14
AF15
AF17
AF19
AF20
AF22
AF23
AF25
AG1
AG2
AG4
AG9
AG11
AG26
AH7
AH17
AH20
AH23
AH26
AH30
AJ4
AJ5
AJ6
AJ7
AJ9
AJ14
AJ15
AJ19
AJ22
AJ27
AJ28
AJ33
AK6
AK8
AK25
AK28
AK30
AL1
AL2
AL4
AL8
AL11
AL27
AL28
AL33
AM5
AM7
AM9
AM11
AM15
AM17
AM19
AM21
AM23
AM25
AM29
AM30
AN3
AN4
AN33
AP5
AP9
AR2
AR5
AR9
AR17
AR19
AR21
AR23
AR25
AR27
AR29
AR31
RICHLAND_APU_BGA813
C399
39p/50V_4
If the VSS plane is cut to create a VDDIO plane,

ceramic capacitors are connected across
the VDDIO and VSS plane split as follows
PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
APU 4/4(POWER/GND)
Date:
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Sheet

1
of
50
+3V_S5
NC,no install by default

R388
*2.2K_4
C830
150p/50V_4
FCH_TEST0
[28,30,37] FCH_PCIE_RST#
33_4
SUSB#
[37]
SUSC#
[37] DNBSWON#
[5,11] FCH_PWRGD
remove pull hi ( chip internal have pull hi )
R717
*short_4
PWR_BTN#
FCH_TEST0
FCH_TEST1
FCH_TEST2
+3V
R287
2.2K_4
PCLK_SMB
R293
2.2K_4
PDAT_SMB
R292
*10K_4
GPIO65
[37]
[37]
[37]
[37]
[31]
+3V_S5
SIO_A20GATE
SIO_RCIN#
SIO_EXT_SCI#
SIO_EXT_SMI#
FCH_LPC_PD#
T9
T10
V9
AE22
AG19
R9
C26
T5
U4
K1
GEVENT20# V7
R10
WD_PWRGD
AF19
SYS_RST#
PCIE_WAKE#
[28] PCIE_WAKE#
R428
22K/F_4
TP52
[5] APU_THERMTRIP#
+3V
+3V_S5
APU_THERMTRIP#
R302
10K/F_4
RSMRST#
R427
2.2K_4
SCLK1
R426
2.2K_4
SDATA1
R689
*10K_4
R688
C582
2.2u/10V_4
[28] PCIE_REQ_LAN#
[9] BOARD_ID8
[9,26] BOARD_ID9
1
D23
2
RB500V-40_100MA
+3V_S5
R425
R381
R423
*10K_4
SYS_RST#
[37] PCH_RSMRST#
*10K_4
10K_4
10K_4
[32]
SPKR
[12,13,25] PCLK_SMB
[12,13,25] PDAT_SMB
[30,35] SCLK1
[30,35] SDATA1
PCLK_SMB
PDAT_SMB
SCLK1
SDATA1
[30] PCIE_REQ_WLAN#
APU_THERMTRIP#
OC_1#
OC_0#
TP41
VGA_PD
TP51
[9] SPI_HOLD#
R291
[16] PCIE_REQ_GPU#
*EV@0_4
TP68
R703
R715
R716
R285
*10K_4
10K_4
10K_4
*10K_4
FCH_PCIE_RST#
PCIE_WAKE#
PWR_BTN#
PCIE_REQ_LAN#
[33]
[34]
OC_1#
OC_0#
FCH_JTAG_TDO
FCH_JTAG_TCK
FCH_JTAG_TDI
FCH_JTAG_RST#
TP55
TP54
*short_4
*short_4
R375
R424
GEVENT12# ~18#
are +3V_S5
ACZ_BCLK_R
ACZ_SDOUT_R
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDIN3
ACZ_SYNC_R
ACZ_RST#_R
Note:LLB#, WAKE# and PWR_BTN need pull up to +3VPCU only if S5+ mode is supported
HDaudio
interface
are
+3V_S5
5
4
3
2
1
To Azalia
ACZ_SDOUT_R
ACZ_SYNC_R
ACZ_BCLK_R
R704
R702
R687
ACZ_SDOUT
33_4
ACZ_SYNC
33_4
ACZ_BITCLK
C836
ACZ_SDOUT_AUDIO
ACZ_SYNC_AUDIO
ACZ_BITCLK_AUDIO
R685
33_4
*10KX8
TP45
TP46
[32]
R628
*EV@10K_4
[32]
R630
*EV@10K_4
[15] DGPU_RST_L
*33P/50V_4
ACZ_RST#
ACZ_RESET#_AUDIO
ACZ_SDIN0
[32]
+3V
[32]
Q53
[44,45,46] DGPU_PWREN
3
EV@2N7002K
+3V_S5
R636
*10K_4
AG24
AE24
AE26
AF22
AH17
AG18
AF24
AD26
AD25
T7
R7
AG25
AG22
J2
AG26
V8
W8
Y6
V10
AA8
AF25
M7
R8
T1
P6
F5
P5
J7
T8
HUDSON-M3
Part 4 of 5
TEST0
TEST1/TMS
TEST2
GA20IN/GEVENT0#
KBRST#/GEVENT1#
PME#/GEVENT3#
LPC_SMI#/GEVENT23#
LPC_PD#/GEVENT5#
SYS_RESET#/GEVENT19#
WAKE#/GEVENT8#
IR_RX1/GEVENT20#
THRMTRIP#/SMBALERT#/GEVENT2#
WD_PWRGD
USBCLK/14M_25M_48M_OSC
G8
USB_RCOMP
B9
USB_FSD1P/GPIO186
USB_FSD1N
H1
H3
TP73
TP72
USB_FSD0P/GPIO185
USB_FSD0N
H6
H5
TP74
TP70
RSMRST#
CLK_REQ4#/SATA_IS0#/GPIO64
SMARTVOLT1/SATA_IS2#/GPIO50
SATA_IS4#/FANOUT3/GPIO55
SATA_IS5#/FANIN3/GPIO59
SPKR/GPIO66
SCL0/GPIO43
SDA0/GPIO47
SCL1/GPIO227
SDA1/GPIO228
CLK_REQ2#/FANIN4/GPIO62
CLK_REQ1#/FANOUT4/GPIO61
IR_LED#/LLB#/GPIO184
SMARTVOLT2/SHUTDOWN#/GPIO51
DDR3_RST#/GEVENT7#/VGA_PD
GBE_LED0/GPIO183
SPI_HOLD#/GBE_LED1/GEVENT9#
GBE_LED2/GEVENT10#
GBE_STAT0/GEVENT11#
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
BLINK/USB_OC7#/GEVENT18#
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GEVENT17#
USB_OC4#/IR_RX0/GEVENT16#
USB_OC3#/AC_PRES/TDO/GEVENT15#
USB_OC2#/TCK/GEVENT14#
USB_OC1#/TDI/GEVENT13#
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
AB3
AB1
AA2
Y5
Y3
Y1
AD6
AE4
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST#
K19
J19
J21
PS2_DAT/SDA4/GPIO187
PS2_CLK/CEC/SCL4/GPIO188
SPI_CS2#/GBE_STAT2/GPIO166
D21
C20
D23
C22
PS2KB_DAT/GPIO189
PS2KB_CLK/GPIO190
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192
F21
E20
F20
A22
E18
A20
J18
H18
G18
B21
K18
D19
A18
C18
B19
B17
A24
D17
KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/XDB0/GPIO223
KSO_15/XDB1/GPIO224
KSO_16/XDB2/GPIO225
KSO_17/XDB3/GPIO226
2
*RB500V-40_100MA
ACZ_SDIN0
1
D6
SUSB#
U2
PCIE_RST2#/GEVENT4#
RI#/GEVENT22#
SPI_CS3#/GBE_STAT1/GEVENT21#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
+3V_S5
[32]
[37]
ACZ_RST#_R
6
7
8
9
10
R711
33_4
GPIO65
FCH_BLINK
SMBALERT#_R
GEVENT17#
TP53
+3V_S5
U53A
AB6
R2
W7
T3
W2
J4
N7
USB
MISC
PCIE_RST2#
[37] EC_WLAN_WAKE#
USB
2.0
R686
2
RB500V-40_100MA
1
D24
PLTRST#
USB_RCOMP_SB
R652
11.8K/F_6
D
USB_HSD13P
USB_HSD13N
H10
G10
USB_HSD12P
USB_HSD12N
K10
J12
USB_HSD11P
USB_HSD11N
G12
F12
USBP11+ [25]
USBP11- [25]
USB_HSD10P
USB_HSD10N
K12
K13
USBP10+ [34]
USBP10- [34]
USB2.0 co-lay USB3.0 port
USB_HSD9P
USB_HSD9N
B11
D11
USB_HSD8P
USB_HSD8N
E10
F10
USBP8+ [26]
USBP8- [26]
Touch Panel
USB_HSD7P
USB_HSD7N
C10
A10
USBP7+ [30]
USBP7- [30]
WLAN
USB_HSD6P
USB_HSD6N
H9
G9
USBP6+ [26]
USBP6- [26]
CCD on eDP
USB_HSD5P
USB_HSD5N
A8
C8
USB_HSD4P
USB_HSD4N
F8
E8
USB_HSD3P
USB_HSD3N
C6
A6
USB_HSD2P
USB_HSD2N
C5
A5
USB_HSD1P
USB_HSD1N
C1
C3
USB_HSD0P
USB_HSD0N
USB
3.0
[8,30,31,37]
ACPI / WAKE UP
EVENTS
USB
1.1
FCH_TEST2
GPIO
FCH_TEST1
*2.2K_4
USB
OC
*2.2K_4
R389
USBSS_CALRP
USBSS_CALRN
USB_SS_TX3P
USB_SS_TX3N
A14
C14
USB_SS_RX3P
USB_SS_RX3N
C12
A12
USB_SS_TX2P
USB_SS_TX2N
D15
B15
USB_SS_RX2P
USB_SS_RX2N
E14
F14
USBP3+ [33]
USBP3- [33]
USB2.0 D/B
HUB1
USBP0+
USBP0USBSS_CALRP
USBSS_CALRN
R644
R640
[33]
[33]
1K/F_4
1K/F_4
USB2.0
+FCH_VDD_11_SSUSB_S
F15
G15
USB3_TXP1 [33]
USB3_TXN1 [33]
USB_SS_RX1P
USB_SS_RX1N
H13
G13
USB3_RXP1 [33]
USB3_RXN1 [33]
USB_SS_TX0P
USB_SS_TX0N
J16
H16
USB3_TXP0 [34]
USB3_TXN0 [34]
USB_SS_RX0P
USB_SS_RX0N
J15
K15
USB3_RXP0 [34]
USB3_RXN0 [34]
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
H19
G19
G22
G21
E22
H22
J22
H21
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
K21
K22
F22
F24
E24
B23
C24
F18
EMBEDDED
CTRL
HUB2
C
E1
E3
C16
A16
HUB3
MINI DP
USB_SS_TX1P
USB_SS_TX1N
HD
AUDIO
R387
SMB_EC_CLK
SMB_EC_DAT
MINI DP
USB3.0
GPIO193 ~196 are +3V_S5
EC_PWM2 [11]
R633
*10K_4
Q50
SMB_EC_CLK
SMB_EC_DAT
Q32
[35] SMBALERT#
MBCLK
MBCLK
[37,38]
2
2
R421
*10K_4
BOLTON-M3
+3V
MBDATA

MBDATA [37,38]
PROJECT : ZRI/ZQI
SMBALERT#_R
Size
*2N7002DW
*2N7002K
Rev
A1A
FCH 1/5(GPIO/USB/AZ)
Date:
Document Number
Sheet
1
of
50
U53E
150p/50V_4
PCIE_FCH_TXP0_C
PCIE_FCH_TXN0_C
PCIE_FCH_TXP1_C
PCIE_FCH_TXN1_C
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
[28] PCIE_FCH_RXP0_LAN
[28] PCIE_FCH_RXN0_LAN
[30] PCIE_FCH_RXP1_WLAN
[30] PCIE_FCH_RXN1_WLAN
R294
+1.1V_CKVDD
CLK_DP_NSSCP/N is 100MHZ non-SSC
[5] CLK_APU_HCLKP
[5] CLK_APU_HCLKN
CLK_PCIE_VGAP/N is 100MHZ SSC
[15] CLK_PCIE_VGAP
[15] CLK_PCIE_VGAN
GPP_CLK1P/N is 100MHZ SSC capable
GPP_CLK3P/N is 100MHZ SSC capable
4
2
[5] CLK_DP_NSSCP
[5] CLK_DP_NSSCN
CLK_APU_HCLKP/N is 100MHZ SSC
2K/F_4
3
1
RP3
2
4
1
3
4
2
3
1
RP5
RP2
4
2
[30] CLK_PCIE_WLANP
[30] CLK_PCIE_WLANN
3
1
RP4
4
2
[28] CLK_PCIE_LANP
[28] CLK_PCIE_LANN
3
1
RP1
CLK_CALRN
INT_CLK_DP_NSSCP
INT_CLK_DP_NSSCN
*shortX2
INT_CLK_APU_HCLKP
INT_CLK_APU_HCLKN
*shortX2
INT_CLK_PCIE_VGAP
INT_CLK_PCIE_VGAN
*shortX2
INT_CLK_PCIE_WLANP
INT_CLK_PCIE_WLANN
*shortX2
INT_CLK_PCIE_LANP
INT_CLK_PCIE_LANN
*shortX2
V33
V31
W30
W32
AB26
AB27
AA24
AA23
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
AA27
AA26
W27
V27
V26
W26
W24
W23
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
F27
CLK_CALRN
G30
G28
PCIE_RCLKP
PCIE_RCLKN
R26
T26
DISP_CLKP
DISP_CLKN
H33
H31
DISP2_CLKP
DISP2_CLKN
T24
T23
APU_CLKP
APU_CLKN
J30
K29
SLT_GFX_CLKP
SLT_GFX_CLKN
H27
H28
GPP_CLK0P
GPP_CLK0N
J27
K26
GPP_CLK1P
GPP_CLK1N
F33
F31
GPP_CLK2P
GPP_CLK2N
E33
E31
GPP_CLK3P
GPP_CLK3N
M23
M24
GPP_CLK4P
GPP_CLK4N
M27
M26
GPP_CLK5P
GPP_CLK5N
TP44
GPP_CLK6P
GPP_CLK6N
R23
R24
GPP_CLK7P
GPP_CLK7N
N27
R27
GPP_CLK8P
GPP_CLK8N
J26
14M_25M_48M_OSC
AJ3
AL5
AG4
AL6
AH3
AJ5
AL1
AN5
AN6
AJ1
AL8
AL3
AM7
AJ6
AK7
AN8
AG9
AM11
AJ10
AL12
AK11
AN12
AG12
AE12
AC12
AE13
AF13
AH13
AH14
AD15
AC15
AE16
AN3
AJ8
AN10
AD12
AG10
AK9
AL10
AF10
AE10
AH1
AM9
AH8
AG15
AG13
AF15
AM17
AD16
AD13
AD21
AK17
AD19
AH9
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
AF18
AE18
AC16
AD18
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/CLK_REQ6#/GPIO49
SERIRQ/GPIO48
B25
D25
D27
C28
A26
A29
A31
B27
AE27
AE19
C31
25M_X1
25M_X2
C33
25M_X2
R400
C775
S5
PLUS
2
1
1M/F_4
*SHORT_6
+3VPCU
D17
+3V_RTC
+VCCRTC_2
BAT54C-7-F_200MA
20MIL
R378
+3VRTC
510/F_4
C555
20MIL
20MIL
1u/10V_4
R394
HUDSON_MEMHOT#
R332
*2.2K_4
1K/F_4
PCI_AD23 [11]
PCI_AD24 [11]
PCI_AD25 [11]
PCI_AD26 [11]
PCI_AD27 [11]
PE_PWRGD [44]
+5V_S5
4.7K/J_4
R671
VCCRTC_3
4.7K/J_4
R670
VCCRTC_2
Q51
MMBT3904-7-F_200MA
+3V
R677
68.1K/F_4
Net
GPIO
I/O Power Well
DOS
PE_PWRGD
GPIO51
DGPU_PWRGD
+3.3V
"0->1"
PE_GPIO0
GPIO191
DGPU_RST#
+3.3V
"0->1"
PE_GPIO1
GPIO192
DGPU_PWREN
+3.3V
"0->1"
20MIL
R678
150K/F_4
CN21
RTC_ML2032
TP65
TP_INT_FCH [26]
CLKRUN# [31,37]
LPC_CLK0_R
LPC_CLK1_R
R616
22_4
R621
R618
22_4
22_4
LDRQ#0
LDRQ#1
CLK_PCI_EC [11,37]
PCLK_DEBUG [30]
For EMI
LPC_CLK0 [11,37]
LPC_CLK1 [11,31]
LPC_LAD0 [30,31,37]
LPC_LAD1 [30,31,37]
LPC_LAD2 [30,31,37]
LPC_LAD3 [30,31,37]
LPC_LFRAME# [30,31,37]
LPC_CLK1
C786
*15p/50V_4
CLK_PCI_EC
C788
*15p/50V_4
TP61
TP43
IRQ_SERIRQ [31,37]
C831
18p/50V_4
G25
E28
E26
G26
F26
APU_RST#
32K_X1
G2
32K_X1
32K_X2
32K_X2
G4
32K_X2
USE GROUND GUARD FOR 32K_X1 AND 32K_X2
S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
H7
F1
F3
E6
S5_CORE_EN
DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#
DMAACTIVE_L [5]
H_PROCHOT# [5,37]
APU_PWRGD_R [3,5]
INTRUDER_ALERT#
*0.1u/10V_4
TP71
R386
*1M/F_4
20MIL
10p/50V_4
R679
20M_4
APU_RST# [3,5]
C428
R612
Y3
25MHz_XTAL
RTC Circuitry(RTC)
32K_X1
10p/50V_4
25M_X1
SYS_COM_REQ [25]
4
3
C776
N25
N26
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT0#
GNT1#/GPO44
GNT2#/SD_LED/GPO45
GNT3#/CLK_REQ7#/GPIO46
CLKRUN#
LOCK#
PCI_CLK3 [11]
PCI_CLK4 [11]
TP69
+VBAT
C769
C770
C420
C400
PCIE_FCH_TXP0_LAN
PCIE_FCH_TXN0_LAN
PCIE_FCH_TXP1_WLAN
PCIE_FCH_TXN1_WLAN
AB5
PCIE_CALRP
PCIE_CALRN
PCIRST#
PCI_CLK1 [11]
AF29
AF31
590/F_4 PCIE_CALRP
2K/F_4 PCIE_CALRN
R271
R272
AF3
AF1
AF5
AG2
AF6
UMI_RX0P
UMI_RX0N
UMI_RX1P
UMI_RX1N
UMI_RX2P
UMI_RX2N
UMI_RX3P
UMI_RX3N
PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
TO WLAN
AB33
AB31
AB28
AB29
Y33
Y31
Y28
Y29
Part 1 of 5
R366
33_4
1
BOLTON-M3
RTC_CLK [11]
+3V_RTC
C556
0.1u/10V_4
Y4
32.768KHZ
2
TO LAN
[28]
[28]
[30]
[30]
UMI_TX0P
UMI_TX0N
UMI_TX1P
UMI_TX1N
UMI_TX2P
UMI_TX2N
UMI_TX3P
UMI_TX3N
HUDSON-M3
PCI
INTERFACE
TO WLAN
AE30
AE32
AD33
AD31
AD28
AD29
AC30
AC32
UMI_TXP0
UMI_TXN0
UMI_TXP1
UMI_TXN1
UMI_TXP2
UMI_TXN2
UMI_TXP3
UMI_TXN3
+1.1V_PCIE_VDDR
TO LAN
PCIE_RST#
A_RST#
UMI_RXP0_C
UMI_RXN0_C
UMI_RXP1_C
UMI_RXN1_C
UMI_RXP2_C
UMI_RXN2_C
UMI_RXP3_C
UMI_RXN3_C
LPC
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
UMI_RXP0
UMI_RXN0
UMI_RXP1
UMI_RXN1
UMI_RXP2
UMI_RXN2
UMI_RXP3
UMI_RXN3
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
AE2
AD5
APU
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
C762
C761
C764
C763
C766
C765
C768
C767
PCIE_RST#_R
A_RST#_R
PCI
CLKS
33_4
PCI EXPRESS
INTERFACES
R684
CLOCK
GENERATOR
C835
[15] PCIE_RST#
C832
18p/50V_4
S5_CORE_EN is necessary to connect enable pin of

+3VPCU/+5VPCU regulator for S5+ mode implementation
INTRUDER_ALERT# Left not connected
(FCH has 50-kohm internal pull-up to
VBAT).
G2
+3V_S5
C839
[7,30,31,37] PLTRST#
R701
33_4
A_RST#
*SHORT_PAD
*0.1u/10V_4
A
U55
*TC7SH08FU
A_RST#_R
2
4
1
3
C838
150p/50V_4
R683
*short_4
PROJECT :ZRI/ZQI
Size
Document Number
Rev
A1A
FCH 2/5(ACPI/PCI/CLK)
Date:
5

1
Sheet
of
50
U53B
SATA0 HDD
[31] SATA_TXP0_C
[31] SATA_TXN0_C
AK19
AM19
SATA_TX0P
SATA_TX0N
[31] SATA_RXN0_R
[31] SATA_RXP0_R
AL20
AN20
SATA_RX0N
SATA_RX0P
[31] SATA_TXP1
[31] SATA_TXN1
AN22
AL22
SATA_TX1P
SATA_TX1N
[31] SATA_RXN1
[31] SATA_RXP1
AH20
AJ20
SATA_RX1N
SATA_RX1P
HUDSON-M3
Part 2 of 5
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
SD_CD#/GPIO75
SD_WP/GPIO76
SD_DATA0/SDATI_2/GPIO77
SD_DATA1/SDATO_2/GPIO78
SD_DATA2/GPIO79
SD_DATA3/GPIO80
R278
R284
+1.1V_AVDD_SATA
1K/F_4
931/F_4
+3V
R303
*10K_4
SATA_RX3N
SATA_RX3P
AL26
AN26
SATA_TX4P
SATA_TX4N
AJ26
AH26
SATA_RX4N
SATA_RX4P
AN29
AL28
SATA_TX5P
SATA_TX5N
AK27
AM27
SATA_RX5N
SATA_RX5P
GBE
LAN
SATA_TX3P
SATA_TX3N
AN24
AL24
SERIAL
ATA
SATA_RX2N
SATA_RX2P
AH24
AJ24
SPI
ROM
SATA_TX2P
SATA_TX2N
SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
ROM_RST#/SPI_WP#/GPIO161
NC8
NC9
VGA_GREEN
L32
AH33
AH31
NC10
NC11
VGA_BLUE
M29
AJ33
AJ31
NC12
NC13
VGA_HSYNC/GPO68
VGA_VSYNC/GPO69
M28
N30
SATA_CALRP
SATA_CALRN
VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71
M33
N32
AF28
AF27
SATA_CALRP
SATA_CALRN
VGA_DAC_RSET
K31
SATA_LED#
AD22
SATA_ACT#/GPIO67
AUX_VGA_CH_P
AUX_VGA_CH_N
V28
V29
AUXCAL
U28
ML_VGA_L0P
ML_VGA_L0N
ML_VGA_L1P
ML_VGA_L1N
ML_VGA_L2P
ML_VGA_L2N
ML_VGA_L3P
ML_VGA_L3N
T31
T33
T29
T28
R32
R30
P29
P28
VGA_RED
SATA_X1
AG21
SATA_X2
AH16
AM15
AJ16
FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54
Remove Zero Power ODD funciton

BOARD_ID1
FCH_PROCHOT#_C
BOARD_ID2
BOARD_ID3
BOARD_ID4
AK15
AN16
AL16
BOARD_ID5
BOARD_ID6
BOARD_ID7
TEMPIN3
K6
K5
K3
M6
Initial BIOS set internal pull down

R651
R661
R641
R635
R282
R299
+3V
CH@1K_4
1K_4
EV@1K_4
AC@1K_4
ELP16@1K_4
1K_4
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID8
BOARD_ID9
R649
R654
R638
R632
R283
R298
*NCH@10K_4
*10K_4
UMA@10K_4
NAC@10K_4
ELP13@10K_4
*10K_4
R708
R710
R709
FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58
HW
MONITOR
TEMPIN0/GPIO171
TEMPIN1/GPIO172
TEMPIN2/GPIO173
TEMPIN3/TALERT#/GPIO174
ML_VGA_HPD/GPIO229
VIN0/GPIO175
VIN1/GPIO176
VIN2/SDATI_1/GPIO177
VIN3/SDATO_1/GPIO178
VIN4/SLOAD_1/GPIO179
VIN5/SCLK_1/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182
NC1
NC2
NC3
NC4
NC5
+3V_S5
GBE_PHY_INTR
R361
10K_4
R391
10K_4
+3V_S5
FCH_SPI_SI
FCH_SPI_SO
FCH_SPI_CLK
FCH_SPI_CS0#
FCH_SPI_WP
U31
FCH_SPI_CS0#
FCH_SPI_CLK
FCH_SPI_SO
FCH_SPI_SI
[37]
[37]
[37]
[37]
L30
R377
R403
R417
R405
*short_4
*short_4
*short_4
*short_4
R401
33_4
1
6
5
FCH_SPI1_SI_R 2
+3V_S5
SPI_CS
SPI_SCK
SPI_SDO
SPI_SDI
3
C574
*22p/50V_4
CE#
SCK
SI
SO
VDD
HOLD#
WP#
VSS
R397
10K_4
SPI_HOLD# [7]
W25Q32BVSSIG(SOIC)
C559
0.1u/10V_4
R409
10K_4
FCH_SPI_WP
C29
N2
M3
L2
N4
P1
P3
M1
M5
+3V_S5
TP60
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
R706
R713
R714
R712
R705
R690
R707
R691
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
AG16
AH10
A28
G27
L4
R692
10K_4
BOLTON-M3
[7] BOARD_ID8
[7,26] BOARD_ID9
+3V_S5
VGA
MAINLINK
+3V
V6
V5
V3
T6
V1
NC6
NC7
Integrated Clock Mode: SATA_X1, SATA_X2 leave unconnected.
[35] BOARD_ID2
AC4
AD3
AD9
W10
AB8
AH7
AF7
AE7
AD7
AG8
AD1
AB7
AF9
AG6
AE8
AD8
AB9
AC2
AA7
W9
AL31
AL33
AF21
R646
*10K_4
GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
AL29
AN31
PLACE SATA_CAL RES VERY

CLOSE TO BALL OF
HUDSON-M2/M3
AJ22
AH22
AM23
AK23
VGA
DAC
SATA1 SSD
SD
CARD
AL14
AN14
AJ12
AH12
AK13
AM13
AH15
AJ14
EV@1K_4
*1K_4
ELP@10K_4
BOARD_ID5
BOARD_ID6
BOARD_ID7
R693
R695
R694
*EV@10K_4
10K_4
HYN16@10K_4
BOARD ID SETTING
Board ID
ID1
USB Charge
No USB Charge
H
L
Reserved
ID2
ID4
ID5
ID9
OnBorad RAM SETTING

H
VGA SKU
UMA SKU
H
L
AC
No AC
A
ID3
H
L
VRAM 2G
VRAM 4G
ID7
ID8
HYNIX DDR3L 1600 4GB H5TC4G63AFR-PBA
ELPIDA DDR3L 1333 4GB EDJ4216EBBG-DJ-F
ELPIDA DDR3L 1600 4GB EDJ4216EFBG-GNL-F
Disable OnBorad RAM
H
L
Non Touch Panel

Touch Panel
ID6
0
H
L
<= PD by cable

PROJECT :ZRI/ZQI
Size
Document Number
FCH 3/5(SATA/VGA/GND/SPI)
Date:
5

1
Sheet
of
Rev
A1A
50
PLACE ALL THE DECOUPLING CAPS ON

THIS SHEET CLOSE TO SB AS POSSIBLE.
U53D
+3.3V_FCH_R
+FCH_VDDPL_33_PCIE
+FCH_VDDPL_33_SATA
47mA
20mA
12mA
200mA
11mA
14mA
11mA
12mA
H24
V22
U22
T22
L18
D7
AH29
AG28
VDDPL_33_SYS
VDDPL_33_DAC
VDDPL_33_ML
VDDAN_33_DAC
VDDPL_33_SSUSB_S
VDDPL_33_USB_S
VDDPL_33_PCIE
VDDPL_33_SATA
R605
C771
LDO_CAP
M31
LDO_CAP
7mA
226mA
V21
VDDPL_11_DAC
C490
0.1u/10V_4
C482
0.1u/10V_4
TRACE WIDTH >=15mil

C406
2.2u/6.3V_4
C426
*0.1u/10V_4
+VDDPL_3.3V
L29
HCB1608KF-221T20_2A
TRACE WIDTH >=15mil

C427
2.2u/6.3V_4
+FCH_VDDPL_33_SSUSB_S
+FCH_VDDPL_33_SUSB_S
C407
*0.1u/10V_4
+1.5V
*0_4
*2.2u/6.3V_6
Y22
V23
V24
V25
VDDIO_33_GBE_S
GBE
LAN
AB10
VDDAN_11_ML_1
VDDAN_11_ML_2
VDDAN_11_ML_3
VDDAN_11_ML_4
+3V_S5
+FCH_VDDPL_33_SSUSB_S
+FCH_VDDPL_33_SUSB_S
L38
HCB1608KF-221T20_2A
AB11
AA11
VDDCR_11_GBE_S_1
VDDCR_11_GBE_S_2
AA9
AA10
VDDIO_GBE_S_1
VDDIO_GBE_S_2
L43
HCB1608KF-221T20_2A
C460
2.2u/6.3V_6
C459
0.1u/10V_4
C535
2.2u/6.3V_6
C545
1u/10V_4
Part 3 of 5
VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9
T14
T17
T20
U16
U18
V14
V17
V20
Y17
VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8
H26
J25
K24
L22
M22
N21
N22
P22
CORE
S0
L28
HCB1608KF-221T20_2A
C488
0.1u/10V_4
PCI/GPIO I/O
+3V
VDDIO_33_PCIGP_1
VDDIO_33_PCIGP_2
VDDIO_33_PCIGP_3
VDDIO_33_PCIGP_4
VDDIO_33_PCIGP_5
VDDIO_33_PCIGP_6
VDDIO_33_PCIGP_7
VDDIO_33_PCIGP_8
VDDIO_33_PCIGP_9
VDDIO_33_PCIGP_10
CLKGEN
I/O
C521
22u/6.3V_8
+1.1V_VCC_FCH_R
HUDSON-M3
AB17
AB18
AE9
AD10
AG7
AC13
AB12
AB13
AB14
AB16
MAIN
LINK
PCI
EXPRESS
U53C
102mA
*short_8
SERIAL
ATA
VDDQ--3.3V I/O power

R353
+3V
1007mA
VDD-- S/B CORE power
TRACE WIDTH >=100mil

R336
C480
0.1u/10V_4
C465
0.1u/10V_4
C481
1u/10V_4
C487
1u/10V_4
*short_8
+1.1V
C495
10u/6.3V_8
+1.1V_CKVDD
340mA
CKVDD_1.1V-- Internal
clock Generator I/O
power
TRACE WIDTH >=30mil

L35
HCB1608KF-181T15_1.5A
C439
0.1u/10V_4
C438
0.1u/10V_4
C453
1u/10V_4
C454
1u/10V_4
C441
22u/6.3V_8
+1.1V
Check +1.1V_CKVDD leakage issues
+1.1V_PCIE_VDDR
VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8
AB24
Y21
AE25
AD24
AB23
AA22
AF26
AG27
VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
VDDAN_11_SATA_8
VDDAN_11_SATA_9
VDDAN_11_SATA_10
AA21
Y20
AB21
AB22
AC22
AC21
AA20
AA18
AB20
AC19
1088mA
TRACE WIDTH >=100mil
PCIE_VDDR--PCIE I/O power

L34
HCB1608KF-181T15_1.5A
C444
*0.1u/10V_4
C451
0.1u/10V_4
C434
1u/10V_4
C440
*1u/10V_4
+1.1V
C433
22u/6.3V_8
+1.1V_AVDD_SATA
1337mA
TRACE WIDTH >=50mil
AVDD_SATA--SATA phy power

L37
HCB1608KF-181T15_1.5A
C469
*0.1u/10V_4
C467
0.1u/10V_4
C468
1u/10V_4
C456
1u/10V_4
+1.1V
C457
22u/6.3V_8
TRACE WIDTH >=50mil
470mA
L44
HCB1608KF-221T20_2A
C515
10u/6.3V_8
C518
1u/10V_4
C531
1u/10V_4
C508
0.1u/10V_4
EMI
+FCH_VDDAN_11_USB_S
C523
2.2u/6.3V_6
C522
0.1u/10V_4
C506
0.1u/10V_4
L42
HCB1608KF-221T20_2A
+1.1V_DUAL
+1.1V_DUAL
C507
0.1u/10V_4
+FCH_VDD_11_SSUSB_S
L40
HCB1608KF-221T20_2A
C513
0.1u/10V_4
*short_8
+FCH_VDDAN_11_SSUSB_S
R320
*short_8
+FCH_VDDCR_11_SSUSB_S
C471
10u/6.3V_8
C501
1u/10V_4
C491
0.1u/10V_4
C489
0.1u/10V_4
C470
1u/10V_4
N20
M20
VDDCR_11_S_1
VDDCR_11_S_2
T12
T13
VDDCR_11_USB_S_1
VDDCR_11_USB_S_2
VDDPL_11_SYS_S
J24
VDDAN_33_HWM_S
M8
C499
10u/6.3V_8
R333
G24
VDDAN_11_USB_S_1
VDDAN_11_USB_S_2
TRACE WIDTH >=15mil
VDDXL_33_S
TRACE WIDTH >=20mil U12

U13
140mA
+FCH_VDDCR_11_USB_S
L41
HCB1608KF-221T20_2A
VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8
N18
L19
M18
V12
V13
Y12
Y13
W11
42mA
282mA
424mA
C476
0.1u/10V_4
P16
M14
N14
P13
P14
VDDAN_11_SSUSB_S_1
VDDAN_11_SSUSB_S_2
VDDAN_11_SSUSB_S_3
VDDAN_11_SSUSB_S_4
VDDAN_11_SSUSB_S_5
N16
N17
P17
M17
VDDCR_11_SSUSB_S_1
VDDCR_11_SSUSB_S_2
VDDCR_11_SSUSB_S_3
VDDCR_11_SSUSB_S_4
VDDIO_AZ_S
59mA
+VDDIO_33_S
TRACE WIDTH >=20mil
S5_3.3--3.3v standby power

R355
*SHORT_6
C503
1u/10V_4
C504
1u/10V_4
+3V_S5
C519
2.2u/6.3V_6
+VDDXL_3.3V
5mA
113mA
TRACE WIDTH >=15mil

L58
HCB1608KF-221T20_2A
+VDDCR_1.1V
TRACE WIDTH >=15mil
R319
C484
1u/10V_4
12mA
C791
*0.1u/10V_4
+1.1V_DUAL
*SHORT_6
70mA
C792
2.2u/6.3V_6
+3V_S5
N8
C483
1u/10V_4
S5_1.1V--1.1V standby power

AA4
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
HUDSON-M3
Part 5 of 5
VSSAN_HWM
K25
VSSXL
H25
VSSPL_SYS
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSSPL_DAC
VSSAN_DAC
VSSANQ_DAC
VSSIO_DAC
EFUSE
26mA
T25
T27
U6
U14
U17
U20
U21
U30
U32
V11
V16
V18
W4
W6
W25
W28
Y14
Y16
Y18
AA6
AA12
AA13
AA14
AA16
AA17
AA25
AA28
AA30
AA32
AB25
AC6
AC18
AC28
AD27
AE6
AE15
AE21
AE28
AF8
AF12
AF16
AF33
AG30
AG32
AH5
AH11
AH18
AH19
AH21
AH23
AH25
AH27
AJ18
AJ28
AJ29
AK21
AK25
AL18
AM21
AM25
AN1
AN18
AN28
AN33
T21
L28
K33
N28
R6
Trace width >=20 mil

+VDDPL_1.1V
USB
SS
C514
10u/6.3V_8
VDDAN_33_USB_S_1
VDDAN_33_USB_S_2
VDDAN_33_USB_S_3
VDDAN_33_USB_S_4
VDDAN_33_USB_S_5
VDDAN_33_USB_S_6
VDDAN_33_USB_S_7
VDDAN_33_USB_S_8
VDDAN_33_USB_S_9
VDDAN_33_USB_S_10
VDDAN_33_USB_S_11
VDDAN_33_USB_S_12
USB
+3V_AVDD_USB
+3V_S5
3.3V_S5 I/O
S5 plus mode
G7
H8
J8
K8
K9
M9
M10
N9
N10
M12
N12
M11
A3
A33
B7
B13
D9
D13
E5
E12
E16
E29
F7
F9
F11
F13
F16
F17
F19
F23
F25
F29
G6
G16
G32
H12
H15
H29
J6
J9
J10
J13
J28
J32
K7
K16
K27
K28
L6
L12
L13
L15
L16
L21
M13
M16
M21
M25
N6
N11
N13
N23
N24
P12
P18
P20
P21
P31
P33
R4
R11
R25
R28
T11
T16
T18
GROUND
BOLTON-M3
+1.1V_DUAL
L39
HCB1608KF-221T20_2A
C477
0.1u/10V_4
C461
0.1u/10V_4
C462
2.2u/6.3V_6
POWER
+VDDAN_3.3V_HWM
+3V_S5
BOLTON-M3
L45
HCB1608KF-221T20_2A
+3V
C542
0.1u/10V_4
+VDDPL_3.3V
C543
2.2u/6.3V_6
L36
HCB1608KF-221T20
C448
2.2u/6.3V_6
+VDDIO_AZ
C445
0.1u/10V_4
Check to connect +3.3V A-test

R369
*0_8
R368
*short_8 +3V
R367
*0_8
C546
*0.1u/10V_4
C544
2.2u/6.3V_6
+3V_S5
+1.5V

PROJECT :ZRI/ZQI
Size
Document Number
Rev
A1A
FCH 4/5(POWER)
Date:
5

1
Sheet
10
of
50
OVERLAP COMMON PADS WHERE

POSSIBLE FOR DUAL-OP RESISTORS.
+3V
+3V
+3V
+3V_S5
+3V_S5
+3V_S5
+3V_S5
STRAPS PINS
D
R700
10K_4
PCI_CLK1
[8] PCI_CLK3
PCI_CLK3
[8] PCI_CLK4
PCI_CLK4
[8,37] LPC_CLK0
LPC_CLK0
[8,31] LPC_CLK1
LPC_CLK1
[7] EC_PWM2
EC_PWM2
[8] RTC_CLK
RTC_CLK
R699
*10K_4
R624
*10K_4
R619
10K_4
R625
*10K_4
R672
10K_4
FCH PWRGD CKT

+3V
+3V
R399
10K_4
C576
*0.1u/10V_4
5
[8] PCI_CLK1
R698
*10K_4
[43] VRM_PWRGD
1
D20
2
RB500V-40_100MA
4
*SN74LVC1G17DCKR
C564
*2.2u/6.3V_6
R680
10K_4
R681
10K_4
R622
10K_4
R620
*10K_4
R626
2.2K_4
R669
*2.2K_4
EC_PWM2-->
SPI ROM: 2.2-K 5% pull-down
LPC ROM: Pull-up to 3.3V_S5.
External pull-up resistor is not required as FCH has
integrated 10-K pull-up to 3.3V_S5.
[37] PWROK_EC
1
D21
2
RB500V-40_100MA
R422
*0_4
FCH_PWRGD [5,7]
R682
*10K_4
U32
R411
0_4
Remove PCI_CLK2 function
--------
REQUIRED
STRAPS
PULL
HIGH
PULL
LOW
--------
--------
PCI_CLK1
ALLOW
PCIE Gen2
DEFAULT
FORCE
PCIE Gen1
PCI_CLK2
--------
--------
PCI_CLK3
PCI_CLK4
LPC_CLK0
LPC_CLK1
EC_PWM2
EC
ENABLED
CLKGEN
ENABLED
LPC ROM
USE
DEBUG
STRAP
non_Fusion
CLOCK MODE
IGNORE
DEBUG
STRAP
FUSION
CLOCK MODE
EC
DISABLED
DEFAULT
DEFAULT
DEFAULT
CLKGEN
DISABLED
RTC_CLK
S5 PLUS MODE
DISABLED
DEFAULT
SPI ROM
S5 PLUS MODE
ENABLED
DEFAULT
DEFAULT
DEBUG STRAPS
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]
[8]
PCI_AD27
[8]
PCI_AD26
[8]
PCI_AD25
[8]
PCI_AD24
[8]
PCI_AD23
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PULL
HIGH
PCI_AD23
R348
*2.2K_4
R349
*2.2K_4
R342
*2.2K_4
R341
*2.2K_4
R662
*2.2K_4
PULL
LOW
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
USE PCI
PLL
DISABLE ILA
AUTORUN
USE FC
PLL
USE DEFAULT
PCIE STRAPS
DISABLE PCI
MEM BOOT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
BYPASS
PCI PLL
ENABLE ILA
AUTORUN
BYPASS FC
PLL
USE EEPROM
PCIE STRAPS
ENABLE PCI
MEM BOOT

PROJECT :ZRI/ZQI
Size
Document Number
Rev
A1A
FCH 5/5(STRAP & PWRGD)

Date:
5

1
Sheet
11
of
50
DDR3 DIMM-A
+1.5VSUS [3,4,5,6,13,14,40,46]
+0.75V_DDR_VTT [13,14,40,47]
+3V
[3,5,7,8,9,10,11,13,25,26,27,30,31,32,33,35,36,37,39,40,41,42,43,44,45,46,47]
[4] M_A_BS#[2:0]
R238
R241
M_A_CS#0
M_A_CS#1
M_A_CLKP0
M_A_CLKN0
M_A_CLKP1
M_A_CLKN1
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#
10K_4
10K_4
[7,13,25] PCLK_SMB
[7,13,25] PDAT_SMB
[4]
[4]
[4]
M_A_ODT0
M_A_ODT1
M_A_DM[7:0]
[4] M_A_DQSP[7:0]
[4] M_A_DQSN[7:0]
SM_MEM BUS ADDRESS

C
SO-DIMM0
1010 000
SO-DIMM1
1010 001
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CS#0
M_A_CS#1
M_A_CLKP0
M_A_CLKN0
M_A_CLKP1
M_A_CLKN1
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#
DIMM0_SA0
DIMM0_SA1
PCLK_SMB
PDAT_SMB
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
M_A_ODT0
M_A_ODT1
116
120
ODT0
ODT1
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
11
28
46
63
136
153
170
187
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ5
M_A_DQ4
M_A_DQ3
M_A_DQ2
M_A_DQ1
M_A_DQ0
M_A_DQ7
M_A_DQ6
M_A_DQ13
M_A_DQ8
M_A_DQ14
M_A_DQ15
M_A_DQ12
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ20
M_A_DQ16
M_A_DQ22
M_A_DQ23
M_A_DQ21
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ28
M_A_DQ26
M_A_DQ25
M_A_DQ31
M_A_DQ29
M_A_DQ24
M_A_DQ30
M_A_DQ27
M_A_DQ37
M_A_DQ32
M_A_DQ39
M_A_DQ38
M_A_DQ36
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ45
M_A_DQ40
M_A_DQ47
M_A_DQ46
M_A_DQ41
M_A_DQ44
M_A_DQ43
M_A_DQ42
M_A_DQ52
M_A_DQ49
M_A_DQ54
M_A_DQ51
M_A_DQ53
M_A_DQ48
M_A_DQ55
M_A_DQ50
M_A_DQ56
M_A_DQ57
M_A_DQ59
M_A_DQ62
M_A_DQ60
M_A_DQ61
M_A_DQ63
M_A_DQ58
+1.5VSUS
CN11B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
+1.5VSUS
R602
+3V
*short_8
R268
1K_4
[4] M_A_EVENT#
[4]
M_A_RST#
+DDR_VREF2
+DDR_VREF
C368
C364
C387
C386
0.1u/10V_4
1000p/50V_4
0.1u/10V_4
1000p/50V_4
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
+3V_JM9000 199
VDDSPD
77
122
125
NC1
NC2
NCTEST
198
30
EVENT#
RESET#
1
126
VREF_DQ
VREF_CA
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
PC2100 DDR3 SDRAM SO-DIMM

(204P)
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
M_A_DQ[63:0] [4]
CN11A
M_A_A[15:0]
PC2100 DDR3 SDRAM SO-DIMM

(204P)
[4]
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
VTT1
VTT2
203
204
GND
GND
205
206
600mA
+0.75V_DDR_VTT_A
R269
*short_8
C388
C371
C367
4.7u/6.3V_6
4.7u/6.3V_6
0.1u/10V_4
+0.75V_DDR_VTT
DDR3-DIMMA_H=5.2_STD
+1.5VSUS
C
R266
1K/F_4
DDR3-DIMMA_H=5.2_STD
Place these Caps near So-Dimm A
R267
+SMDDR_VREF
*0_6
+DDR_VREF
3mA
+1.5VSUS
R265
1K/F_4
+1.5VSUS
C346
C376
C350
C349
C384
C380
C345
C385
C351
C355
C377
C352
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
4.7u/6.3V_6
4.7u/6.3V_6
2.2u/6.3V_6
2.2u/6.3V_6
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
+1.5VSUS
R258
1K/F_4
R263
+DDR_VREF2
*0_6
3mA
+1.5VSUS
R257
1K/F_4
+1.5VSUS
D
C348
C381
C379
C383
C353
C347
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
C378
180P/50V_4
C382
C354
0.1u/10V_4
0.1u/10V_4

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
DDR3 SO-DIMM A
Date:
1

7
Sheet
12
8
of
50
M_B_BS#0
M_B_BS#1
M_B_BS#2
M2
N8
M3
BA0
BA1
BA2
M_B_CLKP0
M_B_CLKN0
M_B_CKE0
J7
K7
K9
CK
CK
CKE
M_B_ODT0
M_B_CS#0
M_B_RAS#
M_B_CAS#
M_B_WE#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
F3
C7
DQSL
DQSU
[4,14] M_B_BS#[2:0]
[4]
[4]
[4,14]
[4,14]
[4,14]
M_B_DQSP0
M_B_DQSP1
[4,14] M_B_DM0
[4,14] M_B_DM1
M_B_DQSN0
M_B_DQSN1
E7
D3
DML
DMU
G3
B7
DQSL
DQSU
T2
RESET
L8
ZQ
[4,14] M_B_RST#
M_B_ZQ1
D7
C3
C8
C2
A7
A2
B8
A3
M_B_DQ11
M_B_DQ8
M_B_DQ10
M_B_DQ12
M_B_DQ14
M_B_DQ9
M_B_DQ15
M_B_DQ13
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
R357
243/F_4
J1
L1
J9
L9
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_B_BS#0
M_B_BS#1
M_B_BS#2
M2
N8
M3
BA0
BA1
BA2
M_B_CLKP0
M_B_CLKN0
M_B_CKE0
J7
K7
K9
CK
CK
CKE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_B_ODT0
M_B_CS#0
M_B_RAS#
M_B_CAS#
M_B_WE#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
M_B_DQSP2
M_B_DQSP3
F3
C7
DQSL
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
NC#J1
NC#L1
NC#J9
NC#L9
E7
D3
DML
DMU
M_B_DQSN2
M_B_DQSN3
G3
B7
DQSL
DQSU
M_B_RST#
T2
RESET
M_B_ZQ2
L8
ZQ
[4,14] M_B_DM2
[4,14] M_B_DM3
Should be 243
Ohms +-1%
R321
243/F_4
J1
L1
J9
L9
100-BALL
SDRAM DDR3
RAM_DDR3
M_B_DQ20
M_B_DQ18
M_B_DQ16
M_B_DQ19
M_B_DQ21
M_B_DQ23
M_B_DQ17
M_B_DQ22
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
M_B_DQ30
M_B_DQ29
M_B_DQ27
M_B_DQ24
M_B_DQ31
M_B_DQ28
M_B_DQ26
M_B_DQ25
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VREFCA
VREFDQ
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
+1.5VSUS
Should be 243
Ohms +-1%
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
NC#J1
NC#L1
NC#J9
NC#L9
AKD5JGST400
1600
AKD5JGST407
BYTE6_48-55
BYTE5_40-47
BYTE7_56-63
U26
+SMDDR_VREF_DIMM M8
SMDDR_VREF_DQ1
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_B_BS#0
M_B_BS#1
M_B_BS#2
M2
N8
M3
BA0
BA1
BA2
M_B_CLKP0
M_B_CLKN0
M_B_CKE0
J7
K7
K9
CK
CK
CKE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_B_ODT0
M_B_CS#0
M_B_RAS#
M_B_CAS#
M_B_WE#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
M_B_DQSP5
M_B_DQSP4
F3
C7
DQSL
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5VSUS
E7
D3
DML
DMU
M_B_DQSN5
M_B_DQSN4
G3
B7
DQSL
DQSU
M_B_RST#
T2
RESET
M_B_ZQ3
L8
ZQ
[4,14] M_B_DM5
[4,14] M_B_DM4
Should be 243
Ohms +-1%
R273
243/F_4
J1
L1
J9
L9
U27
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
M_B_DQ40
M_B_DQ44
M_B_DQ41
M_B_DQ45
M_B_DQ46
M_B_DQ42
M_B_DQ47
M_B_DQ43
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
M_B_DQ39
M_B_DQ36
M_B_DQ35
M_B_DQ33
M_B_DQ34
M_B_DQ37
M_B_DQ38
M_B_DQ32
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VREFCA
VREFDQ
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
100-BALL
SDRAM DDR3
RAM_DDR3
1333
NC#J1
NC#L1
NC#J9
NC#L9
+SMDDR_VREF_DIMM M8
SMDDR_VREF_DQ1 H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_B_BS#0
M_B_BS#1
M_B_BS#2
M2
N8
M3
BA0
BA1
BA2
M_B_CLKP0
M_B_CLKN0
M_B_CKE0
J7
K7
K9
CK
CK
CKE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_B_ODT0
M_B_CS#0
M_B_RAS#
M_B_CAS#
M_B_WE#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
M_B_DQSP7
M_B_DQSP6
F3
C7
DQSL
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
E7
D3
DML
DMU
M_B_DQSN7
M_B_DQSN6
G3
B7
DQSL
DQSU
M_B_RST#
T2
RESET
M_B_ZQ4
L8
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5VSUS
[4,14] M_B_DM7
[4,14] M_B_DM6
Should be 243
Ohms +-1%
100-BALL
SDRAM DDR3
RAM_DDR3
M_B_DQ56
M_B_DQ61
M_B_DQ57
M_B_DQ60
M_B_DQ62
M_B_DQ63
M_B_DQ59
M_B_DQ58
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
M_B_DQ50
M_B_DQ49
M_B_DQ54
M_B_DQ48
M_B_DQ55
M_B_DQ52
M_B_DQ51
M_B_DQ53
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5VSUS
R329
243/F_4
J1
L1
J9
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VREFCA
VREFDQ
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
SO-DIMMB SPD Address is 0XA4

SO-DIMMB TS Address is 0X34
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
VREFCA
VREFDQ
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
+SMDDR_VREF_DIMM M8
SMDDR_VREF_DQ1
H1
[4,14] M_B_A[15:0]
M_B_DQ0
M_B_DQ2
M_B_DQ1
M_B_DQ3
M_B_DQ5
M_B_DQ6
M_B_DQ4
M_B_DQ7
BYTE4_32-39
BYTE3_24-31
U25
E3
F7
F2
F8
H3
H8
G2
H7
U24
+SMDDR_VREF_DIMM M8
SMDDR_VREF_DQ1
H1
[4]
[4]
[4]
BYTE2_16-23
BYTE1_8-15
+SMDDR_VREF_DIMM
SMDDR_VREF_DQ1
[14] +SMDDR_VREF_DIMM
[14] SMDDR_VREF_DQ1
BYTE0_0-7
[4,14] M_B_DQSP[7:0]
[4,14] M_B_DQSN[7:0]
[4,14] M_B_DQ[63:0]
<DDR>
NC#J1
NC#L1
NC#J9
NC#L9
100-BALL
SDRAM DDR3
RAM_DDR3
+3V
U54
PCLK_SMB
PDAT_SMB
[7,12,25] PCLK_SMB
[7,12,25] PDAT_SMB
6
5
7
SCL
SDA
WP
A0
A1
A2
1
2
3
VCC
GND
8
4
C824
*0.1u/10V_4
*M24C02-WMN6TP
C
address:A2
WP =1 : WRITE DISABLE
Place these Caps near Memory Down

+0.75V_DDR_VTT
+1.5VSUS
C540
0.22u/10V_4
+1.5VSUS
C541
0.22u/10V_4
C413
0.22u/10V_4
C412
0.22u/10V_4
C536
0.22u/10V_4
C410
0.22u/10V_4
+1.5VSUS
C502
0.22u/10V_4
C512
0.22u/10V_4
C520
0.22u/10V_4
C524
0.22u/10V_4
C533
0.22u/10V_4
+0.75V_DDR_VTT
+1.5VSUS
C529
0.22u/10V_4
+0.75V_DDR_VTT
C415
0.22u/10V_4
C414
0.22u/10V_4
C538
0.22u/10V_4
C409
0.22u/10V_4
C528
0.22u/10V_4
C547
0.22u/10V_4
C553
0.22u/10V_4
C548
0.22u/10V_4
C549
0.22u/10V_4
+1.5VSUS
C550
0.22u/10V_4
M_B_WE#
M_B_CAS#
M_B_RAS#
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CKE0
M_B_ODT0
M_B_CS#0
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
R343
R338
R337
R650
R359
R347
R323
R316
R330
R354
R659
R653
R371
R372
R667
R666
R374
R373
R370
R645
R663
R352
R665
R664
R648
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
36/F_4
R322
1K/F_4
+SMDDR_VREF
+SMDDR_VREF_DIMM
R657
1K/F_4
C805
0.1u/10V_4
C794
0.1u/10V_4
C807
0.1u/10V_4
C526
0.22u/10V_4
C539
0.22u/10V_4
C417
0.22u/10V_4
C416
0.22u/10V_4
C525
0.22u/10V_4
M_B_CLKP0
R309
36/F_4
M_B_CLKN0
R311
36/F_4
*0_6
C479
0.1u/10V_4
+1.5VSUS
D
R629
1K/F_4
+SMDDR_VREF
SMDDR_VREF_DQ1
C530
0.22u/10V_4
R312
R358
1K/F_4
C455
0.1u/10V_4
C446
0.1u/10V_4
C464
0.1u/10V_4
C534
0.1u/10V_4
R310
*0_6
C450
0.1u/10V_4
+1.5VSUS
PROJECT : ZRI/ZQI
Size
Document Number
Date:
Rev
A1A
DDR3 MEMORY DOWNx16 B-1

1
Sheet
8
13
of
50
<DDR>
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
[4]
[4]
[4]
[4]
[4]
[4,13]
[4,13]
[4,13]
M_B_BS#0
M_B_BS#1
M_B_BS#2
M2
N8
M3
BA0
BA1
BA2
M_B_CLKP1
M_B_CLKN1
M_B_CKE1
J7
K7
K9
CK
CK
CKE
M_B_ODT1
M_B_CS#1
M_B_RAS#
M_B_CAS#
M_B_WE#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
F3
C7
DQSL
DQSU
M_B_DQSP0
M_B_DQSP1
E7
D3
DML
DMU
G3
B7
DQSL
DQSU
T2
RESET
L8
ZQ
[4,13] M_B_DM0
[4,13] M_B_DM1
M_B_DQSN0
M_B_DQSN1
[4,13] M_B_RST#
M_B_ZQ5
Should be 243
Ohms +-1%
R305
243/F_4
J1
L1
J9
L9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
M_B_DQ8
M_B_DQ11
M_B_DQ12
M_B_DQ10
M_B_DQ13
M_B_DQ15
M_B_DQ9
M_B_DQ14
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
NC#J1
NC#L1
NC#J9
NC#L9
+SMDDR_VREF_DIMM M8
SMDDR_VREF_DQ1
H1
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_B_BS#0
M_B_BS#1
M_B_BS#2
M2
N8
M3
BA0
BA1
BA2
M_B_CLKP1
M_B_CLKN1
M_B_CKE1
J7
K7
K9
CK
CK
CKE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_B_ODT1
M_B_CS#1
M_B_RAS#
M_B_CAS#
M_B_WE#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
M_B_DQSP2
M_B_DQSP3
F3
C7
DQSL
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
+1.5VSUS
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E7
D3
DML
DMU
M_B_DQSN2
M_B_DQSN3
G3
B7
DQSL
DQSU
M_B_RST#
T2
RESET
M_B_ZQ6
L8
ZQ
[4,13] M_B_DM2
[4,13] M_B_DM3
Should be 243
Ohms +-1%
B1
B9
D1
D8
E2
E8
F9
G1
G9
R658
243/F_4
J1
L1
J9
L9
100-BALL
SDRAM DDR3
RAM_DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
M_B_DQ18
M_B_DQ20
M_B_DQ19
M_B_DQ16
M_B_DQ22
M_B_DQ17
M_B_DQ23
M_B_DQ21
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
M_B_DQ29
M_B_DQ30
M_B_DQ24
M_B_DQ27
M_B_DQ25
M_B_DQ26
M_B_DQ28
M_B_DQ31
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VREFCA
VREFDQ
NC#J1
NC#L1
NC#J9
NC#L9
+SMDDR_VREF_DIMM M8
SMDDR_VREF_DQ1
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_B_BS#0
M_B_BS#1
M_B_BS#2
M2
N8
M3
BA0
BA1
BA2
M_B_CLKP1
M_B_CLKN1
M_B_CKE1
J7
K7
K9
CK
CK
CKE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_B_ODT1
M_B_CS#1
M_B_RAS#
M_B_CAS#
M_B_WE#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
M_B_DQSP5
M_B_DQSP4
F3
C7
DQSL
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
+1.5VSUS
B1
B9
D1
D8
E2
E8
F9
G1
G9
E7
D3
DML
DMU
M_B_DQSN5
M_B_DQSN4
G3
B7
DQSL
DQSU
M_B_RST#
T2
RESET
M_B_ZQ7
L8
ZQ
[4,13] M_B_DM5
[4,13] M_B_DM4
Should be 243
Ohms +-1%
R631
243/F_4
J1
L1
J9
L9
100-BALL
SDRAM DDR3
RAM_DDR3
1333
AKD5JGST400
1600
AKD5JGST407
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
M_B_DQ44
M_B_DQ40
M_B_DQ45
M_B_DQ41
M_B_DQ43
M_B_DQ47
M_B_DQ42
M_B_DQ46
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
M_B_DQ36
M_B_DQ39
M_B_DQ33
M_B_DQ35
M_B_DQ32
M_B_DQ38
M_B_DQ37
M_B_DQ34
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VREFCA
VREFDQ
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
BYTE6_48-55
U52
NC#J1
NC#L1
NC#J9
NC#L9
+SMDDR_VREF_DIMM M8
SMDDR_VREF_DQ1 H1
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_B_BS#0
M_B_BS#1
M_B_BS#2
M2
N8
M3
BA0
BA1
BA2
M_B_CLKP1
M_B_CLKN1
M_B_CKE1
J7
K7
K9
CK
CK
CKE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_B_ODT1
M_B_CS#1
M_B_RAS#
M_B_CAS#
M_B_WE#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
M_B_DQSP7
M_B_DQSP6
F3
C7
DQSL
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
E7
D3
DML
DMU
M_B_DQSN7
M_B_DQSN6
G3
B7
DQSL
DQSU
M_B_RST#
T2
RESET
M_B_ZQ8
L8
ZQ
+1.5VSUS
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
[4,13] M_B_DM7
[4,13] M_B_DM6
Should be 243
Ohms +-1%
B1
B9
D1
D8
E2
E8
F9
G1
G9
R660
243/F_4
100-BALL
SDRAM DDR3
RAM_DDR3
J1
L1
J9
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
M_B_DQ61
M_B_DQ56
M_B_DQ60
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ63
M_B_DQ62
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
M_B_DQ49
M_B_DQ50
M_B_DQ48
M_B_DQ54
M_B_DQ53
M_B_DQ51
M_B_DQ52
M_B_DQ55
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
[4,13] M_B_BS#[2:0]
M_B_DQ2
M_B_DQ0
M_B_DQ3
M_B_DQ1
M_B_DQ7
M_B_DQ4
M_B_DQ6
M_B_DQ5
U51
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
SO-DIMMB SPD Address is 0XA4

SO-DIMMB TS Address is 0X34
E3
F7
F2
F8
H3
H8
G2
H7
[4,13] M_B_A[15:0]
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
VREFCA
VREFDQ
BYTE7_56-63
BYTE4_32-39
BYTE3_24-31
U50
+SMDDR_VREF_DIMM M8
SMDDR_VREF_DQ1
H1
BYTE5_40-47
BYTE2_16-23
BYTE1_8-15
U49
BYTE0_0-7
+SMDDR_VREF_DIMM
SMDDR_VREF_DQ1
[13] +SMDDR_VREF_DIMM
[13] SMDDR_VREF_DQ1
[4,13] M_B_DQSP[7:0]
[4,13] M_B_DQSN[7:0]
[4,13] M_B_DQ[63:0]
NC#J1
NC#L1
NC#J9
NC#L9
+1.5VSUS
100-BALL
SDRAM DDR3
RAM_DDR3
Place these Caps near Memory Down
+0.75V_DDR_VTT
+1.5VSUS
+1.5VSUS
M_B_CKE1
M_B_ODT1
M_B_CS#1
C781
0.22u/10V_4
C782
0.22u/10V_4
C803
0.22u/10V_4
C809
0.22u/10V_4
C784
0.22u/10V_4
C783
0.22u/10V_4
C796
0.22u/10V_4
C795
0.22u/10V_4
C806
0.22u/10V_4
C798
0.22u/10V_4
R324
R315
R331
36/F_4
36/F_4
36/F_4
C799
0.22u/10V_4
+0.75V_DDR_VTT
+1.5VSUS
+1.5VSUS
+0.75V_DDR_VTT
C431
0.1u/10V_4
C780
0.22u/10V_4
C779
0.22u/10V_4
C801
0.22u/10V_4
C811
0.22u/10V_4
C802
0.22u/10V_4
C804
0.22u/10V_4
C818
0.22u/10V_4
C817
0.22u/10V_4
C816
0.22u/10V_4
C815
0.22u/10V_4
C823
0.22u/10V_4
M_B_CLKP1
R290
36/F_4
M_B_CLKN1
R296
36/F_4
+1.5VSUS
C778
0.22u/10V_4
C777
0.22u/10V_4
C808
0.22u/10V_4
C813
0.22u/10V_4
C810
0.22u/10V_4
C537
0.22u/10V_4

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
DDR3 MEMORY DOWNx16 B-2

Date:
1
Sheet
8
14
of
50
U45A
PART 1 0F 9
[3]
[3]
PEG_TXP0
PEG_TXN0
AA38
Y37
PCIE_RX0P
PCIE_TX0P
PCIE_RX0N
PCIE_TX0N
[3]
[3]
PEG_TXP1
PEG_TXN1
Y35
W36
PCIE_RX1P
PCIE_TX1P
PCIE_RX1N
PCIE_TX1N
[3]
[3]
PEG_TXP2
PEG_TXN2
W38
V37
PCIE_RX2P
PCIE_TX2P
PCIE_RX2N
PCIE_TX2N
[3]
[3]
PEG_TXP3
PEG_TXN3
V35
U36
PCIE_RX3P
PCIE_TX3P
PCIE_RX3N
PCIE_TX3N
[3]
[3]
PEG_TXP4
PEG_TXN4
U38
T37
PCIE_RX4P
PCIE_TX4P
PCIE_RX4N
PCIE_TX4N
PEG_TXP5
PEG_TXN5
T35
R36
PCIE_RX5P
PCIE_TX5P
PCIE_RX5N
PCIE_TX5N
PEG_TXP6
PEG_TXN6
R38
P37
PCIE_RX6P
PCIE_TX6P
PCIE_RX6N
PCIE_TX6N
[3]
[3]
PEG_TXP7
PEG_TXN7
P35
N36
PCIE_RX7P
PCIE_TX7P
PCIE_RX7N
PCIE_TX7N
N38
M37
PCIE_RX8P
PCIE_TX8P
PCIE_RX8N
PCIE_TX8N
M35
L36
PCIE_RX9P
L38
K37
PCIE_RX10P
K35
J36
PCIE_RX11P
PCIE_TX11P
PCIE_RX11N
PCIE_TX11N
J38
H37
PCIE_RX12P
PCIE_TX12P
PCIE_RX12N
PCIE_TX12N
PCIE_RX9N
PCIE_RX10N
PCI EXPRESS INTERFACE
[3]
[3]
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
C266
C265
EV@0.1u/10V_4
EV@0.1u/10V_4
W33 PEG_RXP1_C
W32 PEG_RXN1_C
C294
C293
EV@0.1u/10V_4
EV@0.1u/10V_4
U33 PEG_RXP2_C
U32 PEG_RXN2_C
C264
C263
EV@0.1u/10V_4
EV@0.1u/10V_4
U30 PEG_RXP3_C
U29 PEG_RXN3_C
C291
C292
EV@0.1u/10V_4
EV@0.1u/10V_4
T33
T32
PEG_RXP4_C
PEG_RXN4_C
C260
C259
EV@0.1u/10V_4
EV@0.1u/10V_4
T30
T29
PEG_RXP5_C
PEG_RXN5_C
C261
C262
EV@0.1u/10V_4
EV@0.1u/10V_4
P33 PEG_RXP6_C
P32 PEG_RXN6_C
C290
C289
EV@0.1u/10V_4
EV@0.1u/10V_4
P30 PEG_RXP7_C
P29 PEG_RXN7_C
C288
C287
EV@0.1u/10V_4
EV@0.1u/10V_4
PEG_RXP0 [3]
PEG_RXN0 [3]
Thames(Pro,XT) and Mars Power-on sequence

PX5.0(no BACO)
PEG_RXP1 [3]
PEG_RXN1 [3]
PEG_RXP2 [3]
PEG_RXN2 [3]
DGPU_PWREN
VDDC/VDDCI/1.8V_IO
MVDDQ/+PCIE_VDDC
VDDR3
PEG_RXP3 [3]
PEG_RXN3 [3]
PEG_RXP4 [3]
PEG_RXN4 [3]
20ms max
PE_PWRGD
PEG_RXP5 [3]
PEG_RXN5 [3]
PEG_RXP6 [3]
PEG_RXN6 [3]
PWRGOOD
100ms
PEG_RXP7 [3]
PEG_RXN7 [3]
PCIE_RST#
N33
N32
PCIE Clock
N30
N29
L33
L32
+3V_GFX
L30
L29
C723
K33
K32
[3]
[3]
Y33 PEG_RXP0_C
Y32 PEG_RXN0_C
PCIE_TX13P
PCIE_RX13N
PCIE_TX13N
G38
F37
PCIE_RX14P
PCIE_TX14P
PCIE_RX14N
PCIE_TX14N
F35
E37
PCIE_RX15P
PCIE_TX15P
PCIE_RX15N
PCIE_TX15N
J33
J32
[8]
PERST#_BUF
PCIE_RST#
PCIE_RX13P
U46
[7] DGPU_RST_L
H35
G36
EV@0.1u/10V_4
EV@TC7SH08FU(F)
R574
*EV@100K_4
K30
K29
H33
H32
CLOCK
AB35
AA36
[8] CLK_PCIE_VGAP
[8] CLK_PCIE_VGAN
PCIE_REFCLKP
PCIE_REFCLKN
CALIBRATION
R142
EV@1K_4
TEST_PG AH16
PERST#_BUF
AA30
TEST_PG
PCIE_CALR_TX
Y30 PCIE_CALR_TX
R183
EV@1.69K/F_4
PCIE_CALR_RX
Y29 PCIE_CALR_RX
R179
EV@1K/F_4
+PCIE_VDDC_GFX
PERSTB
PROJECT : ZRI/ZQI
EV@GPU_M2
Size
Document Number
Rev
A1A
Thames_M2/ PEG*16
Date:
Sheet
15
of
50
U45B
PART 2 0F 9
MUTI GFX
GENLK_CLK
GENLK_VSYNC
TP19
TP21
AD29
AC29
GENLK_CLK
TXCAP_DPA3P
GENLK_VSYNC
TXCAM_DPA3N
TX0P_DPA2P
AJ21
AK21
SWAPLOCKA
TX0M_DPA2N
DPA
SWAPLOCKB
TX1P_DPA1P
TX1M_DPA1N
AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12
1.8V GPIO
DVPCNTL_MVP_0
TX2P_DPA0P
DVPCNTL_MVP_1
TX2M_DPA0N
DVPCNTL_1
TXCBP_DPB3P
DVPCNTL_2
TXCBM_DPB3N
TX3P_DPB2P
DVPDATA_1
TX3M_DPB2N
DPB
DVPDATA_2
DVPDATA_3
TX4P_DPB1P
DVPDATA_4
*EV@100_4
EV@4.7K_4
GPU_SMBCLK
R162
EV@4.7K_4
GPU_SMBDAT
AT27
AR26
AR30
AT29
TX4M_DPB1N
AV31
AU30
AR32
AT31
Mars Thermal
DVPDATA_5
DVPDATA_6
TX5P_DPB0P
DVPDATA_7
TX5M_DPB0N
AT33
AU32
+3V_GFX
DVPDATA_8
DVPDATA_9
TXCCP_DPC3P
DVPDATA_10
TXCCM_DPC3N
+3V_GFX
AU14
AV13
DVPDATA_11
DVPDATA_12
TX0P_DPC2P
DVPDATA_13
TX0M_DPC2N
DVPDATA_14
DPC
DVPDATA_15
TX1P_DPC1P
DVPDATA_16
TX1M_DPC1N
R568
EV@10K_4
AT15
AR14
AU16
AV15
C143
EV@0.1u/10V_4
U15
DVPDATA_17
DVPDATA_18
TX2P_DPC0P
DVPDATA_19
TX2M_DPC0N
AT17
AR16
DVPDATA_20
DVPDATA_21
TXCDP_DPD3P
DVPDATA_22
TXCDM_DPD3N
AU20
AT19
[37] GPUT_CLK
GPUT_CLK
SCLK
VCC
[37] GPUT_DATA
GPUT_DATA
SDA
DXP
ALT#_GPIO17
PCIE_REQ_GPU#
GPU_SMBCLK
GPU_SMBDAT
AJ23
AH23
SMBCLK
GPU_SCL
GPU_SDA
AK26
AJ26
SCL
DPD
TX4P_DPD1P
SMBus
SMBDATA
TX4M_DPD1N
AT21
AR20
GPU_D+
C175
ALERT#
DXN
OVERT#
GND
DVPDATA_23
TX3P_DPD2P
R537
R161
AU26
AV25
DVPCLK
DVPDATA_0
TX3M_DPD2N
*EV@10K_4
AT25
AR24
DVPCNTL_0
+3V_GFX
R538
+3V_GFX
AU24
AV23
EV@2200p/50V_4
GPU_D-
EV@G780P81U
AU22
AV21
2/5 add
TX5P_DPD0P
TX5M_DPD0N
R166
R167
+3V_GFX
+3V_GFX
*EV@4.7K_4
*EV@4.7K_4
R147
[44] GPU_DPRSLPVR
R228
EV@10K_4
*EV@0_4
R
GENERAL PURPOSE I/O
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
TP12
TP13
TP10
AH20
AH18
AN16
AVSSN#1
[37] DGPU_AC_DC#
R144
EV@2N7002K
Q54
SYS_SHDN#
[44] PWRCNTRL0
[44] PWRCNTRL2
37,39,44,47]
TP6
TP11
TP7
TP8
TP9
[44] PWRCNTRL5
*EV@10K_4
GPU_GPIO8
GPU_GPIO9
GPU_GPIO10
GPU_GPIO11
GPU_GPIO12
PWRCNTRL5
TP5
R141
*short_4
ALT#_GPIO17
Q4
GPIO_19_CTF
2
*EV@ME2N7002E_200MA
1
R555
*EV@10K_4
[44] PWRCNTRL1
TP3
TP4
[7] PCIE_REQ_GPU#
GPU_GPIO21
GPU_GPIO22
PCIE_REQ_GPU#
GPIO_1
GPIO_2
AVSSN#2
AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13
GPIO_5_AC_BATT
AG32
AG33
GPIO_29
NC#7
GPIO_30
NC#8
GPIO_6
GPIO_7_BLON
AVSSN#3
DAC1
GPIO_8_ROMSO
GPU_GENERICC
TP14
AC36
AC38
RSET
AB34
R122
EV@499/F_4
Place close to Chip
+1.8V_AVDD
DAC1 Analog Power : 1.8V@18mA
GPIO_13
AVDD
GPIO_14_HPD2
AVSSQ
L23
EV@BLM15BD121SN1D_300MA
AD34
AE34
GPIO_15_PWRCNTL_0
GPIO_16
VDD1DI
GPIO_17_THERMAL_INT
VSS1DI
C229
EV@0.1u/10V_4
AC33
AC34
C222
EV@1u/6.3V_4
GPIO_19_CTF
NC#9
V13
U13
AC31
AD30
AC32
AD32
AF32
AA29
AG21
NC_TSVSSQ
AF33
GPIO_20_PWRCNTL_1
NC#1
GPIO_21
NC#2
GPIO_22_ROMCSB
NC#3
CLKREQB
NC#4
GENERICA
AC30
CEC_1
AH13
+1.8V_VDD1DI
DAC1 Digital Power : 1.8V@117mA
C200
EV@0.1u/10V_4
L26
C295
EV@1u/6.3V_4
GENERICC
GENERICD
GENERICE_HPD4
GENERICF_HPD5
GENERICG_HPD6
HPD1
MLPS
PS_1
AM34
R191
PS_0
*short_4
VDDC_CT
PS_1
AD31
R_pu
VREFG
PS_2
AG31
VDDC_CT
R193
EV@8.45K/F_4
R_pu
PS_3
AD33
Ca
AL21
PX_EN
AD28
TESTEN
PS_3
EV@0.1u/10V_4
DDC/AUX
DDC1CLK
DDC1DATA
R190
EV@1K_4
R200
*EV@5.11K/F_4
TESTEN
R158
R564
R160
R159
AUX1N
*EV@10K_4
*EV@10K_4
*EV@10K_4
*EV@10K_4
TP16
AM23
AN23
AK23
AL24
AM24
JTAG_TRSTB
DDC2CLK
JTAG_TDI
DDC2DATA
AUX2P
JTAG_TDO
AUX2N
DDCCLK_AUX3P
DDCDATA_AUX3N
THERMAL
GPU_D+
GPU_D-
AF29
AG29
DDCCLK_AUX4P
DPLUS
DDCDATA_AUX4N
DDCDATA_AUX5N
PU:Disable MLPS
PD:Enable MLPS
R184
AK32
GPIO_28_FDO
AL31
TS_A
DDCCLK_AUX6P
on-die thermal sensor power : 1.8V@8mA
L21
C267
EV@10u/6.3V_6
GPU_GPIO28
EV@10K_4
DDCDATA_AUX6N
DDCVGACLK
+1.8V_TSVDD
C270
C269
EV@1u/6.3V_4
EV@0.1u/10V_4
AJ32
AJ33
TSVDD
DDCVGADATA
TSVSS
EV@GPU_M2
R_pd
C237
EV@82n/16V_4
R192
EV@2K/F_4
Ca
R_pd
C298
*EV@0.1u/10V_4
R208
EV@4.75K/F_4
R_pd
C213
EV@680n/6.3V_4
Ca
R185
EV@4.75K/F_4
[18]
Bits [3:1]
Ra
P/N
Bits [5:1]
Ca
Bits [5:4]
P/N
NC
R_pd
4.75K
000
2K
CS22002FB19
MLPS Bit
PS_0
01001
680nF
00
CH4681K9B00
8.45K
2K
001
3.24K
CS23242FB09
PS_1
11000
82nF
01
CH3823K1B00
4.53K
2K
010
3.4K
CS23402FB08
PS_2
00000
10nF
10
CH31003KB11
6.98K
4.99K
011
4.53K
CS24532FB08
PS_3
00XXX
NC
11
4.53K
4.99K
100
4.75K
CS24752FB12
3.24K
5.62K
101
4.99K
CS24992FB26
3.4K
1M
110
5.62K
CS25622FB18
4.75K
NC
111
6.98K
CS26982FB01
8.45K
CS28452FB12
1M
CS51002FB11
AM19
AL19
AN20
AM20
AL30
AM30
AL29
AM29
DMINUS
DDCCLK_AUX5P
R186
*EV@0_4
R_pu
PS_2
AM27
AL27
JTAG_TCK
JTAG_TMS
PS_1
MLPS
R_pu
AUX1P
+3V_GFX
AM26
AN26
VDDC_CT
R209
*EV@0_4
PS_2
BACO
*EV@4.7K_4
C302
EV@10u/6.3V_6
GENERICB
C657
R559
C245
EV@10u/6.3V_6
GPIO_18_HPD3
DEBUG
+1.8V_GFX
Check need or not
EV@499/F_4
PS_0
GPU_VREFG
R518
EV@249/F_4
R583
GPIO_12
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24
AK24
[18]
[18]
+1.8V_GFX
GPIO_11
PS_0
TP15
GPU_HSYNC_COM
GPU_VSYNC_COM
GPIO_10_ROMSCK
+1.8V_GFX
TP24
AF37
AE38
GPIO_9_ROMSI
NC#6
*short_4
*short_4
AE36
AD35
VSYNC
HSYNC
NC#5
R587
R586
[44] PWRCNTRL3
[44] PWRCNTRL4
AD39
AD37
GPIO_0
GPU_AC_DC#
AT23
AR22
I2C
SDA
AN21
AM21
AK30
AK29
AJ30
AJ31

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
02_Thames_M2/ GPIO_DP_CRT_I2C
Date:
Sheet
16
of
50
+1.8V_GFX
L20
EV@PBY160808T-501Y-N_1.2A
237mA
DPLL_PVDD
C211
C231
EV@10u/6.3V_6
U45G
C212
EV@1u/6.3V_4
U45I
EV@0.1u/10V_4
PART 7 0F 9
VARY_BL
PART 9 0F 9
280mA
DPLL_VDDC
C191
C195
EV@10u/6.3V_6
AM32
DPLL_PVDD
AN31
DPLL_VDDC
AN32
DPLL_PVSS
XTALIN
AV33
C214
GPU_XTALIN
R188
EV@1M/F_4
C192
EV@1u/6.3V_4
EV@0.1u/10V_4
DIGON
EV@8.2p/50V_4
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
3
4
EV@PBY160808T-501Y-N_1.2A
Y1
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
EV@27MHz_XTAL
XTALOUT
AU34
GPU_XTALOUT
1
2
L18
+PCIE_VDDC_GFX
LVDS CONTROL
C232
TXOUT_U1P_DPF1P
EV@8.2p/50V_4
TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
L3
150mA
EV@PBY160808T-501Y-N_1.2A
C31
EV@10u/6.3V_6
MPLL_PVDD
TXOUT_U3P
MPLL_PVDD
C71
C29
EV@1u/6.3V_4
EV@0.1u/10V_4
AM10
SPLL_PVDD
AN9
SPLL_VDDC
PLLS/XTAL
+1.8V_GFX
XO_IN
AW34
TP57
XO_IN2
AW35
TP56
TXOUT_U3N
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
AN10
SPLL_PVSS
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
+1.8V_GFX
L13
75mA
SPLL_PVDD
TXOUT_L2P_DPE0P
CLKTESTA
C95
EV@10u/6.3V_6
C100
C101
EV@1u/6.3V_4
EV@0.1u/10V_4
AF30
AF31
*EV@10K_4
*EV@10K_4
AK35
AL36
AJ38
AK37
AH35
AJ36
AG38
AH37
MPLL_PVDD
LVTMDP
H7
H8
AK27 R170
AJ27 R178
NC_XTAL_PVDD
CLKTESTB
AK10
AL10
CLKTESTA
CLKTESTB
TXOUT_L2N_DPE0N
NC_XTAL_PVSS
TXOUT_L3P
TXOUT_L3N
C73
*EV@0.1u/10V_4
AF35
AG36
AP34
AR34
AW37
AU35
AR37
AU39
AP35
AR35
AN36
AP37
C85
*EV@0.1u/10V_4
EV@GPU_M2
EV@GPU_M2
+PCIE_VDDC_GFX
L9
EV@PBY160808T-501Y-N_1.2A
C64
EV@10u/6.3V_6
100mA
R118
*EV@51.1/F_4
SPLL_VDDC
C69
C68
EV@1u/6.3V_4
EV@0.1u/10V_4
DPLL_PVDD
R189
*EV@0_4
R187
*EV@0_4
R124
*EV@51.1/F_4

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
Thames_M2/ XTAL_LVDS
Date:
Sheet
17
of
50
Mars USE
Vendor
Hynix
Micron
Vendor P/N
STN B/S P/N
Size
MLPS
H5TQ2G63DFR-11C
(128M*16)
AKD5MGWTW17 * 8
2GB
000
H5TC2G63FFR-11C
(128M*16)
AKD5MZDTW05 * 8
2GB
001
MT41K256M16HA-107G
AKD5PGSTL05
(256M*16)
*8
4GB
CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
011
MLPS
GPIO PIN
DESCRIPTION OF DEFAULT SETTINGS
MLPS_DISABLE
NA
GPIO_28_FDO
Enable MLPS, NA for Thames/Whistler/Seymour

0: Enable MLPS, disable GPIO PINSTRAP
1: Disable MLPS, enable GPIO PINSTRAP
TX_PWRS_ENB
PS_1[4]
GPIO0
Transmitter Power Savings Enable

0: 50% Tx output swing
1: Full Tx output swing
TX_DEEMPH_EN
PS_1[5]
GPIO1
PCIE Transmitter De-emphasis Enable

0: Tx de-emphasis disabled
1: Tx de-emphasis enabled
BIF_GEN3_EN_A
PS_1[1]
GPIO2
PCIE Gen3 Enable

(NOTE: RESERVED for Thames/Whistler/Seymour)
0: GEN3 not supported at power-on
1: GEN3 supported at power-on
BIF_VGA DIS
PS_2[4]
GPIO9
VGA Control
0: VGA controller capacity enabled
1: VGA controller capacity disabled (for multi-GPU)
ROMIDCFG[2:0]
PS_0[3..1]
GPIO[13:11]
Serial ROM type or Memory Aperture Size Select
BIOS_ROM_EN
PS_2[3]
AUD[1]
AUD[0]
SP : Mars DDR3 Memory TYPE Set
NA
NA
R_pu
Ca
R_pd
C254
EV@680n/6.3V_4
MLPS Bit
PS_3
R201
EV_SP@0_4
XXX
GPIO22
Enable external BIOS ROM device

0: Disabled
1: Enabled
HSYNC
VSYNC
00 - No audio function
01 - Audio for DP only
10 - Audio for DP and HDMI if dongle is detected
11 - Audio for both DP and HDMI
HDMI must only be enabled on systems that are legally entitled. It is the
responsibility of the system designer to ensure that the system is entitled to
support this feature.
XX
Enable CEC function. Reserved for Thames/Whistler/Seymour

0: Disabled
1: Enabled
CEC_DIS
PS_0[4]
GENLK_VSYNC
RESERVED
RESERVED
RESERVED
RESERVED
PS_1[3]
PS_1[2]
NA
NA
GENLK_CLK
GPIO8
GPIO21
GENERICC
R203
EV_SP@0_4
PS_3
If GPIO22 = 0, defines memory aperture size

If GPIO22 = 1, defines ROM type
100 - 512Kbit M25P05A
(ST)
101 - 1Mbit M25P10A
(ST)
101 - 2Mbit M25P20
(ST)
101 - 4Mbit M25P40
(ST)
101 - 8Mbit M25P80
(ST)
100 - 512Kbit Pm25LV512 (Chingis)
101 - 1Mbit Pm25LV010 (Chingis)
VDDC_CT
[16]
Default Setting
STRAPS
NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR
IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET
AUD_PORT_CONN_PINSTRAP[2]
PS_3[5]
PS_3[4]
PS_0[5]
NA
NA
NA
Bits [5:1]
00XXX
0
0
0
0
Reserved
Reserved
Reserved
Reserved (for Thames/Whistler/Seymour only)
XXX
STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS

111 = 0 usable endpoints
000 = all endpoints are usable
System Memory Aperture size
MLPS
R_pu
Ra
P/N
Ca
Bits [5:4]
P/N
NC
R_pd
4.75K
Bits [3:1]
D
000
2K
CS22002FB19
680nF
00
CH4681K9B00
8.45K
2K
001
3.24K
CS23242FB09
82nF
01
CH3823K1B00
4.53K
2K
010
3.4K
CS23402FB08
10nF
10
CH31003KB11
6.98K
4.99K
011
4.53K
CS24532FB08
NC
11
4.53K
4.99K
100
4.75K
CS24752FB12
3.24K
5.62K
101
4.99K
CS24992FB26
GPIO9
GPIO11 GPIO12
GPIO13
BIOSROM
ROMIDCFG0 ROMIDCFG1
ROMIDCFG2
0
0
0
0
128M
256M
64M
32M
0
1
0
1
0
0
1
1
0
0
0
0
+3V_GFX
[16] GPU_HSYNC_COM
[16] GPU_VSYNC_COM
3.4K
1M
110
4.75K
NC
111
5.62K
CS25622FB18
6.98K
CS26982FB01
8.45K
CS28452FB12
1M
CS51002FB11
R589
*EV@10K_4
R582
*EV@10K_4

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
Thames_M2/ STRAPS_Thermal
Date:
Sheet
18
of
50
U45E
+1.8V_GFX
PART 5 0F 9
+1.5V_GFX
(2.2A)
C77
EV@1u/6.3V_4
C89
EV@0.1u/10V_4
C40
EV@4.7u/6.3V_6
C140
EV@1u/6.3V_4
C121
EV@4.7u/6.3V_6
C80
EV@1u/6.3V_4
C98
EV@0.1u/10V_4
C16
EV@10u/6.3V_6
C75
EV@1u/6.3V_4
C76
EV@0.1u/10V_4
C62
EV@1u/6.3V_4
C24
EV@10u/6.3V_6
C164
EV@1u/6.3V_4
C96
EV@1u/6.3V_4
C78
EV@0.1u/10V_4
+
C67
EV@0.1u/10V_4
C97
EV@0.1u/10V_4
C90
EV@0.1u/10V_4
C189
EV@0.1u/10V_4
C138
EV@100u/6.3V_3528
NC_PCIE_VDDR
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
PCIE_VDDC
VDDR1
BACO
VDDR1
(17mA)
C255
EV@4.7u/6.3V_6
C248
EV@1u/6.3V_4
VDDC_CT
C174
EV@1u/6.3V_4
C173
EV@0.1u/10V_4
AF26
AF27
AG26
AG27
BIF_VDDC
BIF_VDDC
VDDR1
CORE
VDDR1
VDDC
VDDC
VDDR1
VDDC
VDDR1
VDDC
VDDR1
VDDC
VDDR1
VDDC
LEVEL
TRANSLATION
VDDC
VDD_CT
VDDC
VDD_CT
VDDC
VDD_CT
VDDC
VDD_CT
VDDC
VDDC
VDDC
VDDC
I/O power for 3.3-V pins, such as GPIOs.

L17
EV@FCM1005KF-221T03_300MA
C150
EV@4.7u/6.3V_6
C149
*EV@4.7u/6.3V_6
VDDR3
C154
EV@1u/6.3V_4
C153
EV@1u/6.3V_4
(300mA)
L53
EV@FCM1005KF-221T03_300MA
C668
EV@4.7u/6.3V_6
C94
EV@1u/6.3V_4
VDDC
VDDR3
VDDC
VDDR3
VDDC
VDDR3
VDDC
VDDR3
VDDC
VDDC
DVP
AD12
AF11
AF12
AF13
Power for all DVP pins; DVPDATA_[23:0]DVO or GPIO.

+1.8V_GFX
AF23
AF24
AG23
AG24
VDDC
VDDR4
VDDC
VDDR4
VDDC
VDDR4
VDDC
VDDC
VDDR4
VDDC
AF15
AG11
AG13
AG15
C108
EV@0.1u/10V_4
VDDR4
VDDC
VDDR4
VDDC
VDDR4
VDDC
VDDR4
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
C667
EV@4.7u/6.3V_6
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
GPUVDDC/GPUVSS route a differtial pair.

[44] GPUVDDC_SENSE
R585
VDDCI
VOLTAGE
SENESE
*short_4
TP22
AF28
FB_VDDC
AG28
FB_VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
[44] GPUVSS_SENSE
R584
*short_4
AH29
C271
EV@4.7u/6.3V_6
+PCIE_VDDC_GFX
C171
EV@1u/6.3V_4
C170
EV@1u/6.3V_4
C172
EV@1u/6.3V_4
C193
EV@1u/6.3V_4
C168
EV@1u/6.3V_4
C285
EV@4.7u/6.3V_6
C296
EV@4.7u/6.3V_6
R206
N27
T27
C286
EV@1u/6.3V_4
AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
C155
EV@4.7u/6.3V_6
*short_8
+PCIE_VDDC_GFX
C156
*EV@4.7u/6.3V_6
+VGPU_CORE
(30A)
C132
EV@1u/6.3V_4
C126
EV@1u/6.3V_4
C179
EV@1u/6.3V_4
C128
EV@1u/6.3V_4
C124
EV@1u/6.3V_4
C135
EV@1u/6.3V_4
C148
EV@1u/6.3V_4
C123
EV@1u/6.3V_4
C159
EV@1u/6.3V_4
C125
EV@1u/6.3V_4
C146
EV@1u/6.3V_4
C130
EV@1u/6.3V_4
C133
EV@1u/6.3V_4
C142
EV@1u/6.3V_4
C131
EV@1u/6.3V_4
C158
EV@1u/6.3V_4
C129
EV@1u/6.3V_4
C176
EV@10u/6.3V_6
C137
EV@10u/6.3V_6
C145
EV@10u/6.3V_6
C122
EV@10u/6.3V_6
C144
EV@4.7u/6.3V_6
C116
EV@4.7u/6.3V_6
C120
EV@4.7u/6.3V_6
C139
EV@4.7u/6.3V_6
C141
EV@4.7u/6.3V_6
C147
EV@4.7u/6.3V_6
VDDR4
ISOLATED
CORE I/O
+3V_GFX
I/O
(60mA)
C233
EV@1u/6.3V_4
(1.88A)
VDDR1
VDDC
VDDC_CT
C199
EV@1u/6.3V_4
VDDR1
VDDC
L25
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28
C247
EV@0.1u/10V_4
EV@HCB1608KF-181T15_1.5A
VDDR1
VDDC
+1.8V_GFX
C207
EV@0.1u/10V_4
L22
VDDR1
VDDC
Level translation between core and I/O,

excluding memory receivers.
PCIE_VDDR
AA31
NC_PCIE_VDDR AA32
NC_PCIE_VDDR AA33
NC_PCIE_VDDR AA34
NC_PCIE_VDDR W30
NC_PCIE_VDDR Y31
NC_BIF_VDDC V28
NC_BIF_VDDC W29
PCIE_PVDD AB37
VDDR1
PCIE
C752
EV@4.7u/6.3V_6
(440mA)
MEM I/O
AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7
FB_GND
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
AH22
AH27
AH28
M26
N24
R18
R21
R23
R26
T17
T20
T22
T24
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13
SP: Thames XT stuff L21,L26 for +VGPU_CORE

Thames Pro and Mars stuff L3,L4 for +VDDCI_GFX
L15
L16
VDDCI
EV@HCB1608KF-121T30_3A
EV@HCB1608KF-121T30_3A
+VGPU_CORE
(8.8A)
C110
EV@1u/6.3V_4
C115
EV@1u/6.3V_4
C112
EV@4.7u/6.3V_6
C127
EV@4.7u/6.3V_6
C107
EV@1u/6.3V_4
C106
EV@1u/6.3V_4

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
Thames_M2/ MainPower
EV@GPU_M2
Date:
Sheet
19
of
50
U45H
PART 8 0F 9
DP_VDDR
DP_VDDC
DP_VDDC
DP_VDDC
DP_VDDC
AN24
AP24
AP25
AP26
AU28
AV29
DP_VDDR
AP20
AP21
AP22
AP23
AU18
AV19
DP_VDDR
DP_VDDC
DP_VDDR
DP_VDDC
AH34
AJ34
AF34
AG34
AM37
AL38
DP_VDDR
DP_VSSR
DP_VDDR
DP_VSSR
DP_VDDR
DP_VSSR
DP_VDDR
DP_VSSR
DP_VDDR
DP_VSSR
DP_VDDR
DP_VSSR
DP_VDDR
DP_VDDC
DP_VDDR
DP_VDDC
DP_VDDR
DP_VDDC
DP_VDDR
DP_VDDC
DP_VDDC
L24
EV@PBY160808T-501Y-N_1.2A
DPEF_VDD18
DP_VDDR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
CALIBRATION
DP_VSSR
DP_VSSR
DP_VSSR
DPAB_CALR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
AW18
DPCD_CALR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
R588
EV@150/F_4
AM39
EV@4.7u/6.3V_6
EV@1u/6.3V_4
EV@0.1u/10V_4
(330mA)
DPCD_VDD10
+PCIE_VDDC_GFX
L14
EV@PBY160808T-501Y-N_1.2A
C111
C113
C114
AL33
AM33
AK33
AK34
EV@4.7u/6.3V_6
EV@1u/6.3V_4
EV@0.1u/10V_4
DP GND
C246
EV@0.1u/10V_4
AW28
C721
DP_VDDR
DP_VSSR
C230
EV@1u/6.3V_4
C720
DP_VDDR
DP_VSSR
C272
EV@4.7u/6.3V_6
AP13
AT13
AP14
AP15
L54
EV@PBY160808T-501Y-N_1.2A
C719
DP_VDDR
DP_VSSR
(330mA)
AP31
AP32
AN33
AP33
DP_VDDR
DP_VDDC
+1.8V_GFX
(330mA)
DPAB_VDD10
DP_VDDC
DPEF_CALR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
AN27
AP27
AP28
AW24
AW26
AN29
AP29
AP30
AW30
AW32
AN17
AP16
AP17
AW14
AW16
AN19
AP18
AP19
AW20
AW22
AN34
AP39
AR39
AU37
AF39
AH39
AK39
AL34
AV27
AR28
AV17
AR18
AN38
AM35
EV@GPU_M2

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
Thames_M2/ DP_Powers
Date:
Sheet
20
of
50
<VGA>
U45F
PART 6 0F 9
AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
PCIE_VSS
GND
GND
GND
GND
GND
GND
GND
GND
F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VSS_MECH
GND
VSS_MECH
GND
VSS_MECH
A39
AW1
AW39
EV@GPU_M2

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
Thames_M2/ GND
Date:
Sheet
21
of
50
<VGA>
[24] VMB_DM[7..0]
U45C
[24] VMB_RDQS[7..0]
PART 3 0F 9
[23] VMA_DM[7..0]
[23] VMA_RDQS[7..0]
[23] VMA_WDQS[7..0]
[23] VMA_MA[15..0]
[23]
[23]
[23]
VMA_DQ[63..0]
GDDR5/DDR3
VMA_DM[7..0]
VMA_RDQS[7..0]
VMA_WDQS[7..0]
VMA_MA[15..0]
VMA_BA0
VMA_BA1
VMA_BA2
VMA_BA0
VMA_BA1
VMA_BA2
Place MVREF dividers and Caps close to ASIC

+1.5V_GFX
(0.7*VDDR1)
R199
EV@40.2/F_4
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5
MVREFDA
MVREFSA
L18
L20
DQA0_0
MAA0_0/MAA_0
DQA0_1
MAA0_1/MAA_1
DQA0_2
MAA0_2/MAA_2
DQA0_3
MAA0_3/MAA_3
DQA0_4
MAA0_4/MAA_4
DQA0_5
MAA0_5/MAA_5
DQA0_6
MAA0_6/MAA_6
DQA0_7
MAA0_7/MAA_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
MEMORY INTERFACE A
[23] VMA_DQ[63..0]
[24] VMB_WDQS[7..0]
MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_BA2
MAA1_6/MAA_BA0
MAA1_7/MAA_BA1
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_BA2
VMA_BA0
VMA_BA1
A32
C32
D23
E22
C14
A14
E10
D9
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
[24] VMB_MA[15..0]
[24]
[24]
[24]
VMB_DQ[63..0]
VMB_DM[7..0]
U45D
VMB_RDQS[7..0]
PART 4 0F 9
VMB_WDQS[7..0]
VMB_MA[15..0]
VMB_BA0
VMB_BA1
VMB_BA2
VMB_BA0
VMB_BA1
VMB_BA2
DQA0_16
DQA0_17
WCKA0_0/DQMA_0
DQA0_18
WCKA0B_0/DQMA_1
DQA0_19
WCKA0_1/DQMA_2
DQA0_20
WCKA0B_1/DQMA_3
DQA0_21
WCKA1_0/DQMA_4
DQA0_22
WCKA1B_0/DQMA_5
DQA0_23
WCKA1_1/DQMA_6
DQA0_24
WCKA1B_1/DQMA_7
DQA0_25
DQA0_26
EDCA0_0/QSA_0
DQA0_27
EDCA0_1/QSA_1
DQA0_28
EDCA0_2/QSA_2
DQA0_29
EDCA0_3/QSA_3
DQA0_30
EDCA1_0/QSA_4
DQA0_31
EDCA1_1/QSA_5
DQA1_0
EDCA1_2/QSA_6
DQA1_1
EDCA1_3/QSA_7
C34
D29
D25
E20
E16
E12
J10
D7
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
DQA1_2
DQA1_3
DDBIA0_0/QSA_0B
DQA1_4
DDBIA0_1/QSA_1B
DQA1_5
DDBIA0_2/QSA_2B
DQA1_6
DDBIA0_3/QSA_3B
DQA1_7
DDBIA1_0/QSA_4B
DQA1_8
DDBIA1_1/QSA_5B
DQA1_9
DDBIA1_2/QSA_6B
DQA1_10
DDBIA1_3/QSA_7B
A34
E30
E26
C20
C16
C12
J11
F8
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
DQA1_11
DQA1_12
ADBIA0/ODTA0
DQA1_13
ADBIA1/ODTA1
J21
G19
DQA1_14
DQA1_15
CLKA0
DQA1_16
CLKA0B
H27 VMA_CLK0
G27 VMA_CLK0#
DQA1_17
DQA1_18
CLKA1
DQA1_19
CLKA1B
J14 VMA_CLK1
H14 VMA_CLK1#
VMA_ODT0 [23]
VMA_ODT1 [23]
VMA_CLK0 [23]
VMA_CLK0# [23]
VMA_CLK1 [23]
VMA_CLK1# [23]
DQA1_20
DQA1_21
RASA0B
DQA1_22
RASA1B
K23 VMA_RAS0#
K19 VMA_RAS1#
VMA_RAS0# [23]
VMA_RAS1# [23]
K20 VMA_CAS0#
K17 VMA_CAS1#
VMA_CAS0# [23]
VMA_CAS1# [23]
DQA1_23
DQA1_24
CASA0B
DQA1_25
CASA1B
SP : Thames Pro 64bit sku not stuff

+1.5V_GFX
DQA1_26
DQA1_27
CSA0B_0
DQA1_28
CSA0B_1
K24 VMA_CS0#
K27
(0.7*VDDR1)
VMA_CS0# [23]
DQA1_29
DQA1_30
CSA1B_0
DQA1_31
CSA1B_1
M13 VMA_CS1#
K16
VMA_CS1# [23]
R74
EV_128@40.2/F_4
VMB_DQ0
VMB_DQ1
VMB_DQ2
VMB_DQ3
VMB_DQ4
VMB_DQ5
VMB_DQ6
VMB_DQ7
VMB_DQ8
VMB_DQ9
VMB_DQ10
VMB_DQ11
VMB_DQ12
VMB_DQ13
VMB_DQ14
VMB_DQ15
VMB_DQ16
VMB_DQ17
VMB_DQ18
VMB_DQ19
VMB_DQ20
VMB_DQ21
VMB_DQ22
VMB_DQ23
VMB_DQ24
VMB_DQ25
VMB_DQ26
VMB_DQ27
VMB_DQ28
VMB_DQ29
VMB_DQ30
VMB_DQ31
VMB_DQ32
VMB_DQ33
VMB_DQ34
VMB_DQ35
VMB_DQ36
VMB_DQ37
VMB_DQ38
VMB_DQ39
VMB_DQ40
VMB_DQ41
VMB_DQ42
VMB_DQ43
VMB_DQ44
VMB_DQ45
VMB_DQ46
VMB_DQ47
VMB_DQ48
VMB_DQ49
VMB_DQ50
VMB_DQ51
VMB_DQ52
VMB_DQ53
VMB_DQ54
VMB_DQ55
VMB_DQ56
VMB_DQ57
VMB_DQ58
VMB_DQ59
VMB_DQ60
VMB_DQ61
VMB_DQ62
VMB_DQ63
C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5
DQB0_0
GDDR5/DDR3
MAB0_0/MAB_0
DQB0_1
MAB0_1/MAB_1
DQB0_2
MAB0_2/MAB_2
DQB0_3
MAB0_3/MAB_3
DQB0_4
MAB0_4/MAB_4
DQB0_5
MAB0_5/MAB_5
DQB0_6
MAB0_6/MAB_6
DQB0_7
MAB0_7/MAB_7
DQB0_8
MAB1_0/MAB_8
DQB0_9
MAB1_1/MAB_9
DQB0_10
MAB1_2/MAB_10
DQB0_11
MAB1_3/MAB_11
DQB0_12
MAB1_4/MAB_12
DQB0_13
MAB1_5/BA2
DQB0_14
MAB1_6/BA0
DQB0_15
MAB1_7/BA1
DQB0_16
MEMORY INTERFACE B
[24] VMB_DQ[63..0]
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7
CKEA0
MVREFSA
CKEA1
K21 VMA_CKE0
J20 VMA_CKE1
VMA_CKE0 [23]
VMA_CKE1 [23]
K26 VMA_WE0#
L15 VMA_WE1#
VMA_WE0# [23]
VMA_WE1# [23]
MVREFDB
MVREFSB
Y12
AA12
DQB0_26
EDCB0_0/QSB_0
DQB0_27
EDCB0_1/QSB_1
DQB0_28
EDCB0_2/QSB_2
DQB0_29
EDCB0_3/QSB_3
DQB0_30
EDCB1_0/QSB_4
DQB0_31
EDCB1_1/QSB_5
DQB1_0
EDCB1_2/QSB_6
DQB1_1
R197
EV@100/F_4
C241
EV@1u/6.3V_4
NC_MEM_CALRN0
M12
M27
AH12
NC_MEM_CALRP1
MAA0_8/MAA_13
MEM_CALRP0
MAA1_8/MAA_14
MEM_CALRP2
MAA0_9/MAA_15
WEA0B
NC_MEM_CALRN1
WEA1B
NC_MEM_CALRN2
EDCB1_3/QSB_7
DQB1_3
DDBIB0_0/QSB_0B
DQB1_4
DDBIB0_1/QSB_1B
DQB1_5
DDBIB0_2/QSB_2B
DQB1_6
DDBIB0_3/QSB_3B
DQB1_7
DDBIB1_0/QSB_4B
DQB1_8
DDBIB1_1/QSB_5B
DQB1_9
DDBIB1_2/QSB_6B
DQB1_10
DDBIB1_3/QSB_7B
DQB1_12
ADBIB0/ODTB0
DQB1_13
EV_SP@120/F_4
MAA1_9/RSVD
+1.5V_GFX
ADBIB1/ODTB1
DQB1_15
CLKB0
DQB1_16
VMB_RDQS0
VMB_RDQS1
VMB_RDQS2
VMB_RDQS3
VMB_RDQS4
VMB_RDQS5
VMB_RDQS6
VMB_RDQS7
G7
K1
P1
W4
AC4
AH3
AJ8
AM3
VMB_WDQS0
VMB_WDQS1
VMB_WDQS2
VMB_WDQS3
VMB_WDQS4
VMB_WDQS5
VMB_WDQS6
VMB_WDQS7
T7
W7
CLKB0B
L9
L8
VMB_ODT0 [24]
VMB_ODT1 [24]
VMB_CLK0
VMB_CLK0#
VMB_CLK0 [24]
VMB_CLK0# [24]
DQB1_17
DQB1_18
CLKB1
DQB1_19
CLKB1B
AD8 VMB_CLK1
AD7 VMB_CLK1#
VMB_CLK1 [24]
VMB_CLK1# [24]
T10 VMB_RAS0#
Y10 VMB_RAS1#
VMB_RAS0# [24]
VMB_RAS1# [24]
W10 VMB_CAS0#
AA10 VMB_CAS1#
VMB_CAS0# [24]
VMB_CAS1# [24]
P10 VMB_CS0#
L10
VMB_CS0# [24]
AD10 VMB_CS1#
AC10
VMB_CS1# [24]
DQB1_20
DQB1_21
RASB0B
DQB1_22
RASB1B
DQB1_23
DQB1_24
CASB0B
DQB1_25
CASB1B
DQB1_26
DQB1_27
CSB0B_0
DQB1_28
CSB0B_1
DQB1_29
DQB1_30
CSB1B_0
DQB1_31
CSB1B_1
MVREFDB
CKEB1
U10 VMB_CKE0
AA11 VMB_CKE1
VMB_CKE0 [24]
VMB_CKE1 [24]
N10 VMB_WE0#
AB11 VMB_WE1#
VMB_WE0# [24]
VMB_WE1# [24]
MVREFSB
C105
EV_128@1u/6.3V_4
H23 VMA_MA13
J19 VMA_MA14
M21 VMA_MA15
M20
VMB_MA13
T8
W8 VMB_MA14
U12 VMB_MA15
V12
MAB1_8/MAB_14
MAB0_9/MAB_15
MAB1_9/RSVD
+1.5V_GFX
(0.7*VDDR1)
F6
K3
P3
V5
AB5
AH1
AJ9
AM5
DQB1_14
MAB0_8/MAB_13
R182
VMB_DM0
VMB_DM1
VMB_DM2
VMB_DM3
VMB_DM4
VMB_DM5
VMB_DM6
VMB_DM7
DQB1_11
WEB1B
R86
EV_128@100/F_4
H3
H1
T3
T5
AE4
AF5
AK6
AK5
DQB1_2
WEB0B
L27
N12
AG12
VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_BA2
VMB_BA0
VMB_BA1
DQB0_25
CKEB0
MVREFDA
P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9
AH11 GPU_DRAM_RST
DRAM_RST
(0.7*VDDR1)
EV@GPU_M2
R198
EV@40.2/F_4
EV@GPU_M2
R80
EV_128@40.2/F_4
SP : Thames Pro,XT R=240ohm(CS12402FB03)

Mars R=120ohm(CS11202FB11)
R196
EV@100/F_4
C240
EV@1u/6.3V_4
Ball Name
Thames
Mars
MEM_CALRN0
240ohm
MEM_CALRN1
MEM_CALRN2
240ohm
MEM_CALRP0
R98
EV_128@100/F_4
C104
EV_128@1u/6.3V_4
25mm (max)
GPU_DRAM_RST
240ohm
5mm (max)
25mm (max)
Place MVREF dividers and Caps close to ASIC

R96
EV@10/F_4
R97
EV@51/F_4
MEM_RST# [23,24]
120ohm
C56
MEM_CALRP1
MEM_CALRP2
240ohm
R95
EV@4.99K/F_4
EV@120p/50V_4
Place all these componets very close to GPU (within 25mm)

and keep all components close to each other
** This basic topology should be used for DRAM_RAT for DDR3/GDDR5
These Capacitors and Resistor values arre an example only
The series R and || cap values will depend on the DRAM loads
and will have to be calculated for differrent Memory, DRAM loads and board
to pass Reset Signal Spec

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
Thames_M2/ MEM Interface

Date:
Sheet
22
of
50
VMA_DM[7..0]
[22] VMA_DM[7..0]
[22] VMA_RDQS[7..0]
[22] VMA_WDQS[7..0]
VMA_RDQS[7..0]
QSA[7..0]
VMA_WDQS[7..0]
QSA#[7..0]
U16
VREFC_VMA1 M8
VREFD_VMA1 H1
U41
VMA_MA[15..0]
[22] VMA_MA[15..0]
CHANNEL A: 512MB DDR3 (64M*16*4pcs)
VMA_DQ[63..0]
[22] VMA_DQ[63..0]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_MA15
[22]
[22]
[22]
VMA_BA0
VMA_BA1
VMA_BA2
[22]
[22]
[22]
VMA_CLK0
VMA_CLK0#
VMA_CKE0
[22]
[22]
[22]
[22]
[22]
VMA_ODT0
VMA_CS0#
VMA_RAS0#
VMA_CAS0#
VMA_WE0#
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_MA15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
VMA_BA0
VMA_BA1
VMA_BA2
M2
N8
M3
BA0
BA1
BA2
VMA_CLK0
VMA_CLK0#
VMA_CKE0
J7
K7
K9
CK
CK
CKE
VMA_ODT0
VMA_CS0#
VMA_RAS0#
VMA_CAS0#
VMA_WE0#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMA_RDQS1
VMA_RDQS3
F3
C7
DQSL
DQSU
VMA_DM1
VMA_DM3
[22,24] MEM_RST#
E7
D3
G3
B7
DQSL
DQSU
MEM_RST#
T2
RESET
L8
ZQ
VMA_ZQ1
VMA_DQ14
VMA_DQ10
VMA_DQ13
VMA_DQ8
VMA_DQ12
VMA_DQ9
VMA_DQ15
VMA_DQ11
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMA_DQ24
VMA_DQ29
VMA_DQ26
VMA_DQ31
VMA_DQ25
VMA_DQ30
VMA_DQ27
VMA_DQ28
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
R176
EV@243/F_4
J1
L1
J9
L9
E3
F7
F2
F8
H3
H8
G2
H7
VREFC_VMA2
VREFD_VMA2
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
VMA_BA0
VMA_BA1
VMA_BA2
M2
N8
M3
BA0
BA1
BA2
VMA_CLK0
VMA_CLK0#
VMA_CKE0
J7
K7
K9
CK
CK
CKE
NC#J1
NC#L1
NC#J9
NC#L9
+1.5V_GFX
VMA_ODT0
VMA_CS0#
VMA_RAS0#
VMA_CAS0#
VMA_WE0#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMA_RDQS0
VMA_RDQS2
F3
C7
DQSL
DQSU
VMA_DM0
VMA_DM2
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
E7
D3
DML
DMU
VMA_WDQS0
VMA_WDQS2
G3
B7
DQSL
DQSU
MEM_RST#
T2
RESET
L8
ZQ
VMA_ZQ2
B1
B9
D1
D8
E2
E8
F9
G1
G9
R557
EV@243/F_4
J1
L1
J9
L9
100-BALL
SDRAM DDR3
EV@VRAM _DDR3
AKD5MGWTW17
AKD5MZDTW05
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMA_DQ3
VMA_DQ5
VMA_DQ2
VMA_DQ7
VMA_DQ1
VMA_DQ4
VMA_DQ0
VMA_DQ6
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMA_DQ20
VMA_DQ19
VMA_DQ23
VMA_DQ17
VMA_DQ22
VMA_DQ16
VMA_DQ21
VMA_DQ18
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VREFCA
VREFDQ
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_MA15
+1.5V_GFX
DML
DMU
VMA_WDQS1
VMA_WDQS3
U11
U47
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
VREFCA
VREFDQ
NC#J1
NC#L1
NC#J9
NC#L9
VREFC_VMA3
VREFD_VMA3
M8
H1
VREFCA
VREFDQ
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_MA15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
VMA_BA0
VMA_BA1
VMA_BA2
M2
N8
M3
BA0
BA1
BA2
VMA_CLK1
VMA_CLK1#
VMA_CKE1
J7
K7
K9
CK
CK
CKE
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMA_DQ49
VMA_DQ53
VMA_DQ51
VMA_DQ55
VMA_DQ50
VMA_DQ54
VMA_DQ48
VMA_DQ52
VREFC_VMA4
VREFD_VMA4
M8
H1
VREFCA
VREFDQ
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_MA15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMA_DQ37
VMA_DQ32
VMA_DQ39
VMA_DQ34
VMA_DQ36
VMA_DQ33
VMA_DQ38
VMA_DQ35
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VMA_BA0
VMA_BA1
VMA_BA2
M2
N8
M3
BA0
BA1
BA2
VMA_CLK1
VMA_CLK1#
VMA_CKE1
J7
K7
K9
CK
CK
CKE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VMA_ODT1
VMA_CS1#
VMA_RAS1#
VMA_CAS1#
VMA_WE1#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMA_RDQS7
VMA_RDQS5
F3
C7
DQSL
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VMA_DM7
VMA_DM5
E7
D3
DML
DMU
VMA_WDQS7
VMA_WDQS5
G3
B7
DQSL
DQSU
MEM_RST#
T2
RESET
L8
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_GFX
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMA_DQ60
VMA_DQ56
VMA_DQ63
VMA_DQ59
VMA_DQ62
VMA_DQ57
VMA_DQ61
VMA_DQ58
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMA_DQ40
VMA_DQ46
VMA_DQ42
VMA_DQ44
VMA_DQ43
VMA_DQ45
VMA_DQ41
VMA_DQ47
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_GFX
+1.5V_GFX
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
[22]
[22]
[22]
VMA_CLK1
VMA_CLK1#
VMA_CKE1
[22]
[22]
[22]
[22]
[22]
VMA_ODT1
VMA_CS1#
VMA_RAS1#
VMA_CAS1#
VMA_WE1#
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VMA_ODT1
VMA_CS1#
VMA_RAS1#
VMA_CAS1#
VMA_WE1#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMA_RDQS6
VMA_RDQS4
F3
C7
DQSL
DQSU
VMA_DM6
VMA_DM4
E7
D3
DML
DMU
VMA_WDQS6
VMA_WDQS4
G3
B7
DQSL
DQSU
MEM_RST#
T2
RESET
L8
ZQ
VMA_ZQ3
B1
B9
D1
D8
E2
E8
F9
G1
G9
R523
EV@243/F_4
J1
L1
J9
L9
NC#J1
NC#L1
NC#J9
NC#L9
VMA_ZQ4
R539
EV@243/F_4
J1
L1
J9
L9
100-BALL
SDRAM DDR3
EV@VRAM _DDR3
100-BALL
SDRAM DDR3
EV@VRAM _DDR3
Group-A0 VREF
NC#J1
NC#L1
NC#J9
NC#L9
100-BALL
SDRAM DDR3
EV@VRAM _DDR3
AKD5MGWTW17
AKD5MZDTW05
Group-A1 VREF
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
R172
EV@4.99K/F_4
R566
EV@4.99K/F_4
VREFC_VMA1
R561
EV@4.99K/F_4
VREFD_VMA1
R579
EV@4.99K/F_4
VREFC_VMA2
R526
EV@4.99K/F_4
R560
EV@4.99K/F_4
R130
EV@4.99K/F_4
VREFD_VMA2
VREFC_VMA3
R173
C160
R567
C712
R562
C706
R580
C734
EV@4.99K/F_4
EV@0.1u/10V_4
EV@4.99K/F_4
EV@0.1u/10V_4
EV@4.99K/F_4
EV@0.1u/10V_4
EV@4.99K/F_4
EV@0.1u/10V_4
Group-A0 decoupling CAP
MEM_A0 CLK
R553
EV@4.99K/F_4
VREFD_VMA3
VREFC_VMA4
VREFD_VMA4
R527
C670
R556
C700
R554
C701
R128
C79
EV@4.99K/F_4
EV@0.1u/10V_4
EV@4.99K/F_4
EV@0.1u/10V_4
EV@4.99K/F_4
EV@0.1u/10V_4
EV@4.99K/F_4
EV@0.1u/10V_4
Group-A1 decoupling CAP

MEM_A1 CLK
+1.5V_GFX
+1.5V_GFX
VMA_CLK0
VMA_CLK1
VMA_CLK0#
VMA_CLK1#
C726
EV@1u/6.3V_4
R572
EV@40.2/F_4
C243
EV@1u/6.3V_4
C654
EV@1u/6.3V_4
C228
EV@1u/6.3V_4
C219
EV@1u/6.3V_4
C744
EV@1u/6.3V_4
C751
EV@1u/6.3V_4
C742
EV@1u/6.3V_4
C643
EV@1u/6.3V_4
C699
EV@1u/6.3V_4
C117
EV@1u/6.3V_4
C53
EV@1u/6.3V_4
C42
EV@1u/6.3V_4
C72
EV@1u/6.3V_4
C630
EV@1u/6.3V_4
C639
EV@1u/6.3V_4
R575
EV@40.2/F_4
R520
EV@40.2/F_4
+1.5V_GFX
C728
EV@0.01u/25V_4
C722
EV@1u/6.3V_4
C210
EV@1u/6.3V_4
C738
EV@1u/6.3V_4
C183
EV@1u/6.3V_4
C653
EV@1u/6.3V_4
C750
EV@1u/6.3V_4
C253
EV@1u/6.3V_4
C196
EV@1u/6.3V_4
C633
EV@1u/6.3V_4
+1.5V_GFX
C636
EV@1u/6.3V_4
C697
EV@1u/6.3V_4
C46
EV@1u/6.3V_4
C268
EV@1u/6.3V_4
C118
EV@1u/6.3V_4
C70
EV@1u/6.3V_4
C635
EV@1u/6.3V_4
C662
EV@0.01u/25V_4
+1.5V_GFX
C746
EV@4.7u/6.3V_6
C282
EV@4.7u/6.3V_6
C671
EV@4.7u/6.3V_6
C749
EV@4.7u/6.3V_6
C651
EV@4.7u/6.3V_6
EV_SP@ : Thames Pro,XT R=56ohm(CS05602FB15)

Mars R=40.2ohm(CS04022FB28)
EV_SP@ : Thames Pro,XT R=56ohm(CS05602FB15)

C716
EV@4.7u/6.3V_6
R517
EV@40.2/F_4
+1.5V_GFX
C645
EV@4.7u/6.3V_6
C640
EV@4.7u/6.3V_6
C60
EV@4.7u/6.3V_6
C51
EV@4.7u/6.3V_6

PROJECT : ZRI/ZQI
Size
Document Number
Date:
Rev
A1A
Thames_M2/VRAM_A
5
Sheet
23
of
50
[22] VMB_RDQS[7..0]
[22] VMB_WDQS[7..0]
CHANNEL B: 512MB DDR3 (64M*16*4pcs)
VMB_RDQS[7..0]
QSA[7..0]
VMB_WDQS[7..0]
QSA#[7..0]
EV_128@ and EV_128SP@ : Thames Pro(64bit) sku not stuff

U33
U1
U2
U34
VMB_MA[15..0]
[22] VMB_MA[15..0]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]
VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13
VMB_MA14
VMB_MA15
[22]
[22]
[22]
VMB_BA0
VMB_BA1
VMB_BA2
[22] VMB_CLK0
[22] VMB_CLK0#
[22] VMB_CKE0
VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#
[22,23] MEM_RST#
VREFC_VMB1
VREFD_VMB1
M8
H1
VREFCA
VREFDQ
VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13
VMB_MA14
VMB_MA15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
VMB_BA0
VMB_BA1
VMB_BA2
M2
N8
M3
BA0
BA1
BA2
VMB_CLK0
VMB_CLK0#
VMB_CKE0
J7
K7
K9
CK
CK
CKE
VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMB_RDQS0
VMB_RDQS2
F3
C7
DQSL
DQSU
VMB_DM0
VMB_DM2
E7
D3
DML
DMU
VMB_WDQS0
VMB_WDQS2
G3
B7
DQSL
DQSU
MEM_RST#
T2
RESET
L8
ZQ
VMB_ZQ1
J1
L1
J9
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMB_DQ3
VMB_DQ5
VMB_DQ1
VMB_DQ4
VMB_DQ2
VMB_DQ6
VMB_DQ0
VMB_DQ7
VREFC_VMB2
VREFD_VMB2
M8
H1
VREFCA
VREFDQ
VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13
VMB_MA14
VMB_MA15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMB_DQ22
VMB_DQ18
VMB_DQ23
VMB_DQ19
VMB_DQ20
VMB_DQ17
VMB_DQ21
VMB_DQ16
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VMB_BA0
VMB_BA1
VMB_BA2
M2
N8
M3
BA0
BA1
BA2
VMB_CLK0
VMB_CLK0#
VMB_CKE0
J7
K7
K9
CK
CK
CKE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMB_RDQS1
VMB_RDQS3
F3
C7
DQSL
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VMB_DM1
VMB_DM3
E7
D3
DML
DMU
VMB_WDQS1
VMB_WDQS3
G3
B7
DQSL
DQSU
MEM_RST#
T2
RESET
L8
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_GFX
R446
EV_128@243/F_4
NC#J1
NC#L1
NC#J9
NC#L9
+1.5V_GFX
VMB_ZQ2
J1
L1
J9
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMB_DQ11
VMB_DQ12
VMB_DQ15
VMB_DQ8
VMB_DQ14
VMB_DQ9
VMB_DQ13
VMB_DQ10
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMB_DQ28
VMB_DQ30
VMB_DQ25
VMB_DQ29
VMB_DQ31
VMB_DQ27
VMB_DQ24
VMB_DQ26
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VREFC_VMB3
VREFD_VMB3
M8
H1
VREFCA
VREFDQ
VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13
VMB_MA14
VMB_MA15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
VMB_BA0
VMB_BA1
VMB_BA2
M2
N8
M3
BA0
BA1
BA2
VMB_CLK1
VMB_CLK1#
VMB_CKE1
J7
K7
K9
CK
CK
CKE
+1.5V_GFX
R1
EV_128@243/F_4
100-BALL
SDRAM DDR3
EV_128@VRAM _DDR3
NC#J1
NC#L1
NC#J9
NC#L9
[22] VMB_CLK1
[22] VMB_CLK1#
[22] VMB_CKE1
+1.5V_GFX
[22]
[22]
[22]
[22]
[22]
VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#
VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMB_RDQS6
VMB_RDQS5
F3
C7
DQSL
DQSU
VMB_DM6
VMB_DM5
E7
D3
DML
DMU
VMB_WDQS6
VMB_WDQS5
G3
B7
DQSL
DQSU
MEM_RST#
T2
RESET
L8
ZQ
VMB_ZQ3
J1
L1
J9
L9
AKD5MGWTW17
AKD5MZDTW05
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMB_DQ53
VMB_DQ49
VMB_DQ54
VMB_DQ50
VMB_DQ55
VMB_DQ51
VMB_DQ52
VMB_DQ48
VREFC_VMB4
VREFD_VMB4
M8
H1
VREFCA
VREFDQ
VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13
VMB_MA14
VMB_MA15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMB_DQ42
VMB_DQ46
VMB_DQ43
VMB_DQ44
VMB_DQ40
VMB_DQ45
VMB_DQ41
VMB_DQ47
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VMB_BA0
VMB_BA1
VMB_BA2
M2
N8
M3
BA0
BA1
BA2
VMB_CLK1
VMB_CLK1#
VMB_CKE1
J7
K7
K9
CK
CK
CKE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMB_RDQS7
VMB_RDQS4
F3
C7
DQSL
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VMB_DM7
VMB_DM4
E7
D3
DML
DMU
VMB_WDQS7
VMB_WDQS4
G3
B7
DQSL
DQSU
MEM_RST#
T2
RESET
L8
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_GFX
R69
EV_128@243/F_4
100-BALL
SDRAM DDR3
EV_128@VRAM _DDR3
BOT Down
NC#J1
NC#L1
NC#J9
NC#L9
+1.5V_GFX
VMB_ZQ4
J1
L1
J9
L9
TOP Down
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMB_DQ59
VMB_DQ61
VMB_DQ58
VMB_DQ60
VMB_DQ57
VMB_DQ63
VMB_DQ56
VMB_DQ62
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMB_DQ38
VMB_DQ32
VMB_DQ36
VMB_DQ33
VMB_DQ37
VMB_DQ35
VMB_DQ39
VMB_DQ34
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_GFX
R449
EV_128@243/F_4
100-BALL
SDRAM DDR3
EV_128@VRAM _DDR3
NC#J1
NC#L1
NC#J9
NC#L9
+1.5V_GFX
100-BALL
SDRAM DDR3
EV_128@VRAM _DDR3
TOP Up
AKD5MGWTW17
AKD5MZDTW05
BOT Up
Group-B1 VREF
Group-B0 VREF
+1.5V_GFX
VMB_DM[7..0]
[22] VMB_DM[7..0]
[22]
[22]
[22]
[22]
[22]
VMB_DQ[63..0]
[22] VMB_DQ[63..0]
+1.5V_GFX
+1.5V_GFX
R68
EV_128@4.99K/F_4
+1.5V_GFX
R442
EV_128@4.99K/F_4
+1.5V_GFX
R2
EV_128@4.99K/F_4
R9
EV_128@4.99K/F_4
R4
EV_128@4.99K/F_4
R11
EV_128@4.99K/F_4
VREFC_VMB3
VREFC_VMB1
VREFD_VMB1
VREFC_VMB2
+1.5V_GFX
R447
EV_128@4.99K/F_4
VREFD_VMB3
R7
EV_128@4.99K/F_4
VREFC_VMB4
VREFD_VMB4
VREFD_VMB2
R8
R70
C41
R443
C598
R3
C2
R5
C4
EV_128@4.99K/F_4
EV_128@0.1u/10V_4
EV_128@4.99K/F_4
EV_128@0.1u/10V_4
EV_128@4.99K/F_4
EV_128@0.1u/10V_4
EV_128@4.99K/F_4
EV_128@0.1u/10V_4
C9
R10
EV_128@4.99K/F_4EV_128@0.1u/10V_4
Group-B0 decoupling CAP
MEM_B0 CLK
+1.5V_GFX
+1.5V_GFX
C11
R448
EV_128@4.99K/F_4EV_128@0.1u/10V_4
C606
R6
EV_128@4.99K/F_4EV_128@0.1u/10V_4
Group-B1 decoupling CAP
+1.5V_GFX
C7
EV_128@4.99K/F_4EV_128@0.1u/10V_4
MEM_B1 CLK
+1.5V_GFX
VMB_CLK1
VMB_CLK0
C600
C8
C21
C1
C603
C30
C601
C14
VMB_CLK0#
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4EV_128@1u/6.3V_4 EV_128@1u/6.3V_4EV_128@1u/6.3V_4EV_128@1u/6.3V_4 EV_128@1u/6.3V_4EV_128@1u/6.3V_4 EV_128@1u/6.3V_4
C3
C616
C617
C10
C12
C609
VMB_CLK1#
C614
R450
EV_128@40.2/F_4
R445
EV_128@40.2/F_4
R444
EV_128@40.2/F_4
C599
EV_128@0.01u/25V_4
+1.5V_GFX
C20
C620
C6
C109
C623
C604
C22
C597
C5
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4
EV_128@1u/6.3V_4EV_128@1u/6.3V_4 EV_128@1u/6.3V_4EV_128@1u/6.3V_4EV_128@1u/6.3V_4 EV_128@1u/6.3V_4EV_128@1u/6.3V_4
+1.5V_GFX
EV_128SP@ : Thames Pro,XT R=56ohm(CS05602FB15)

R451
EV_128@40.2/F_4
+1.5V_GFX
C13
C605
C611
C608
C610
C602
C607
EV_128@0.01u/25V_4
EV_128SP@ : Thames Pro,XT R=56ohm(CS05602FB15)

+1.5V_GFX
C15
C63
C618
C615
C625
C613
C17
C18
C612
C621
EV_128@4.7u/6.3V_6
EV_128@4.7u/6.3V_6
EV_128@4.7u/6.3V_6
EV_128@4.7u/6.3V_6
EV_128@4.7u/6.3V_6
EV_128@4.7u/6.3V_6
EV_128@4.7u/6.3V_6
EV_128@4.7u/6.3V_6
EV_128@4.7u/6.3V_6
EV_128@4.7u/6.3V_6

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
Thames_M2/VRAM_B
Date:
5
Sheet
1
24
of
50
mini DP ML (DPP)
LayoutNotes:
PlacenearPin13andPin14
+5V
+3V
R99
SEL/OE# polarity Control
R65
R82
Q12
SW@10K/J_4
C66
SW@0.1u/10V_4
C47
SW@0.1u/10V_4
USB2_SEL
5
CONFIG_1P
4
+3V
2
R521
[7,12,13] PDAT_SMB
*short_4 6
R64
R81
*100K/F_4
SW@10K/J_4
[5] MINI_DP_TXP2
[5] MINI_DP_TXN2
USB3_SEL
[33] USB3_TXP1_2
[33] USB3_TXN1_2
SYS_COM_REQ
C666
C665
0.1u/10V_4
0.1u/10V_4
DP_TXP2_C
DP_TXN2_C
48
47
B0P
B0N
C93
C92
SW@0.1u/10V_4
SW@0.1u/10V_4
USB30_TX3+_C
USB30_TX3-_C
44
43
C0P
C0N
C664
C663
0.1u/10V_4
0.1u/10V_4
DP_TXP3_C
DP_TXN3_C
46
45
B1P
B1N
C647
SW@0.1u/10V_4
C91
SW@0.1u/10V_4
C646
SW@0.1u/10V_4
C650
SW@0.1u/10V_4
C52
SW@0.1u/10V_4
U10
D
DP HPD (DPP)
+5V
A0P
A0N
2
3
INT_DPTX2P
INT_DPTX2N
A1P
A1N
5
6
INT_DPTX3P
INT_DPTX3N
ADM
ADP
10
11
MODE_LED
HPD_IN
15
16
DP_HPD_C
AUX_N
18
DP_AUXN_R R23
SW@100K/J_4
HS_SEL_OUT
SS_SEL_OUT
19
20
USB2_SEL
USB3_SEL
Connect to HS_SEL_IN(pin12)
Connect to SS_SEL_IN(pin7)
CONFIG_2
CONFIG_1
28
29
CONFIG_2P
CONFIG_1P
VCC
VCC
R516
*100K/F_4
SW@10K/J_4
52
40
4
1
C61
SW@10u/6.3V_6
+3V
VCC
VCC
VCC/NC
VCC/NC
R481
SW@1M/J_4
14
13
R480
SW@1M/J_4
*SHORT_6
SW@2N7002DW
SW@5.1M/J_4
+3V
2
R506
[7,12,13] PCLK_SMB
*short_4
[7]
[7]
R131
R132
USBP11+
USBP11-
*short_4
*short_4
R501
SW@100K/F_4
10
9
INT_DPTX2N
INT_DPTX2P
7
6
7
6
INT_DPTX3P
INT_DPTX3N
37
38
CDP
CDM
12
HS_SEL_IN
SS_SEL
DP_HPD_D
+3V
HS_SEL
NSW@1K_4
TP1
R66
[5] INT_MINI_HPD_Q
DP_HPD_OUT
*short_4
9
8
HS_OE#_IN
SS_OE#_IN/NC
32
34
HS_OE#_OUT
SS_OE#_OUT
21
22
23
CHRG_OFF
CHRG_DELAY
SLEEP
R83
SW@10K/J_4
17
DP_HPD_D
R479
57
5
NSW@10K/F_4
3
R514
R513
CONFIG_1_PU
CONFIG_2_PU
26
27
CONFIG_PU
Dongle_POWEREN#
SYS_COM_REQ
25
R111
DP_AUXN
RST
TEST
30
31
SW@3.3K/J_4
SW@3.3K/J_4
+3V
Q48
SW@AO3409
CONFIG_PU
*short_4
SYS_COM_REQ [8]
HPD_OUT
Q55
+3V
CONFIG_2CNN
CONFIG_1CNN
R73
100K/J_4
+3V
PAD
NC6
NC5
NC4
NC3
NC2
NC1
NC0
INT_DPTX3P
INT_DPTX3N
10
9
FCH_USB2_P0_R
FCH_USB2_N0_R
LB_CHARGE_OFF
*short_4 LB_CHG_DELAY1#
R100
R46
+3V
U3
1
2
GND_3/8
4
5
BDP
BDM
CONFIG_PU
ESD Protect (EMC)

1
2
3
4
5
SS_SEL_IN
35
36
USB2_MUX_DIS
USB3_MUX_DIS
INT_DPTX2N
INT_DPTX2P
C1P
C1N
CONFIG_1P
CONFIG_2P
USB2_SEL
SW@2N7002DW
Q8
SW@2N7002DW
*100K/F_4 USB3_MUX_DIS
SW@10K/J_4
R89
R88
*short_4DP_HPD
R67
Q45
SW@BSS138P
2
1
R87
*0/J_4
R718
GND
GND
GND
R91
SW@100K/F_4
USB3_SEL
5
CONFIG_2P
42
41
[33] USB3_RXP1_2
[33] USB3_RXN1_2
56
55
54
51
50
49
24
*RClamp0524P
2
53
39
33
SW@10K/J_4
*100K/F_4 USB2_MUX_DIS
SW@10K/J_4
R77
R76
Q9
R490
[5] MINI_DP_TXP3
[5] MINI_DP_TXN3
+3V
R524
SW@100K/F_4
C644
SW@1u/6.3V_4
R92
SW@10K/J_4
R134
SW@47K/J_4
Q47
SW@AO3409
+3V
TP2
C87
SW@2200p/50V_4
SW@(X)HD3SS2521_NB
MINI DP connector (DPP)

CN4
add 3/25
INT_MINI_HPD_Q
U36
DP_AUXN
DP_AUXP
1
2
3
4
5
CONFIG_2CNN
CONFIG_1CNN
1
2
GND_3/8
4
5
10
9
10
9
7
6
7
6
DP_AUXN
DP_AUXP
NSW@2N7002DW
CONFIG_2CNN
CONFIG_1CNN
R17
*short_4
CONFIG_1P
R84
NSW@0_4
CONFIG_1CNN
CONFIG_2CNN
R85
NSW@5.1M/J_4
LB_PWR_RTN
R37
NSW@1M/J_4
*RClamp0524P
LB_PWR_CNN
Del 3/27
INT_DPTX0N
INT_DPTX0P
INT_DPTX0N_R
INT_DPTX0P_R
+3V
INT_DPTX1P_R
INT_DPTX3P
INT_DPTX1N_R
INT_DPTX3N
U5
[5] MINI_DP_TXP0
[5] MINI_DP_TXN0
[5] MINI_DP_TXP1
[5] MINI_DP_TXN1
C36
C37
0.1u/10V_4 INT_DPTX0P
0.1u/10V_4 INT_DPTX0N
C38
C39
0.1u/10V_4 INT_DPTX1P
0.1u/10V_4 INT_DPTX1N
1
2
3
4
5
1
2
GND_3/8
4
5
10
9
10
9
INT_DPTX0P
INT_DPTX0N
R16
*short_4
DP_TXP2_C
DP_TXN2_C
R512
R511
NSW@0_4
NSW@0_4
DP_TXP2_CR
DP_TXN2_CR
R488
R487
NSW@0_4 INT_DPTX2P
NSW@0_4 INT_DPTX2N
7
6
7
6
INT_DPTX1P
INT_DPTX1N
R19
*short_4
DP_TXP3_C
DP_TXN3_C
R510
R509
NSW@0_4
NSW@0_4
DP_TXP3_CR
DP_TXN3_CR
R486
R485
NSW@0_4 INT_DPTX3P
NSW@0_4 INT_DPTX3N
Q52
*RClamp0524P
LayoutNotes:
PlacedecouplingCAPsclosetoConnector
INT_DPTX2P
DP_AUXP
INT_DPTX2N
DP_AUXN
R719
NSW@0_6
Close to DP connector
INT_DPTX1N
INT_DPTX1P
INT_DPTX1N_R
INT_DPTX1P_R
R18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
DP_HPD
INT_DPTX0P_R
CONFIG_1CNN
INT_DPTX0N_R
CONFIG_2CNN
FCH_USB2_N0_R
C656 SW@2200p/50V_4
CONFIG_2CNN_C
C649 SW@2200p/50V_4
CONFIG_2CNN
FCH_USB2_P0_R
C655 SW@2200p/50V_4
CONFIG_1CNN_C
C648 SW@2200p/50V_4
CONFIG_1CNN
IN
LB_PWR_RTN
LB_PWR_CNN_Q
1A/30V
OUT
GND
1
2
AP2331SA-7
C627
0.1u/10V_4
C632
10u/6.3V_6
C23
C25
SW@10u/6.3V_6
GND
HPD
LANE0_P
CONFIG1
LANE0_N
CONFIG2
GND
GND
LANE1_P
LANE3_P
LANE1_N
LANE3_N
GND
GND
LANE2_P
AUX_CH_P
LANE2_N
AUX_CH_N
GND
DP_PWR
SHELL1
SHELL2
SHELL3
SHELL4
21
22
23
24
mDP
*short_4
SW@0.1u/10V_4
mDP AUX (DPP)

LB_PWR_CNN
Q5
1
2
3
CONFIG_1P
6
Q6
SW@FDMC4435BZ
R120
6
C33
R469
1M/F_4
2
0.1u/10V_4
DP_AUXN
R36
2N7002DW
+3V
5
R500
SW@20K/F_4
R489
SW@10K/F_4
+3V
LB_CHARGE_OFF
R117
SW@2K/F_4
Q39
C669
SW@0.1u/10V_4
2
0.1u/10V_4
6
Behavior
Low
DP signal (AC couple)
High
TMDS signal (DC couple)
Q11
SW@ME2N7002E
5
2
4
1
*100K/F_4
2N7002DW
R116
SW@100K/F_4
DP_CAD
C32
C102 SW@0.1u/10V_4
U42
R35
+3V
R109
SW@20K/J_4
R508
SW@2K/F_4
Q46
SW@ME2N7002E
2N7002DW
*100K/F_4
DP_AUXP
*SW@100K/F_4
+3V
LB_PWR_CNN_M
SW@2N7002DW
LB_PWR_RTN_M
Q44
SW@FDMC4435BZ
Q43
SW@FDMC4435BZ
Q7
SW@FDMC4435BZ
0.1u/10V_4
3
3
2
1
C641
DP_AUX_EN_O
D1
SW@SMAJ20A
1
2
3
DP_AUX_EN_O
R458
SW@100K/J_4
2N7002DW
Q40
LB_PWR_RTN
DP_AUX_EN
D28
SW@SMAJ20A
5
3
Q42
R476
10K/F_4
R477
10K/F_4
Q13
Dongle_POWEREN#
+5V
2
1.8K_4
+3V
LB_PWR_RTN
R60
3
2
1
[5] MINI_DP_AUXP
+5V
5
1.8K_4
R61
DP_AUX_EN
[5] MINI_DP_AUXN
4
LB_CHARGE_OFF
1
2
3
R127
SW@100K/F_4
Dongle_POWEREN#
SW@SN74LVC1G04DBVR
U13
SW@TC7SH08FU
PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
Mini DP
Date:
5

1
Sheet
25
of
50
eDP(LDS)
LCD PW(LDS)
+3V
CCD_PWR
TP_PWR
VIN
C283
1u/6.3V_4
C312
C315
C316
C313
C309
C308
*10p/50V_4
1000p/50V_4
*10p/50V_4
1000p/50V_4
4.7u/25V_8
1000p/50V_4
LCDVCC
U19
[5] eDP_DIGON
LCDVCC_R
R212
40mil
*short_8
IN
OUT
IN
GND
C306
C311
C314
C303
ON/OFF
GND
1u/6.3V_4
*0.1u/10V_4
0.01u/16V_4
10u/6.3V_8
IC(5P)-G5243T11U
BL_ON
[5] INT_eDP_HPD
eDP
[5]
[5]
EDP_TXP3
EDP_TXN3
[5]
[5]
EDP_TXP2
EDP_TXN2
[5]
[5]
EDP_TXP1
EDP_TXN1
[5]
[5]
EDP_TXP0
EDP_TXN0
[5]
[5]
eDP_AUXP
eDP_AUXN
USBP6+_R
USBP6-_R
R596
[7]
CCD [7]
*short_4
USBP8+_R
USBP8-_R
TP_GND
TP_INT
USBP6+
USBP6R597
*short_4
R218
*SHORT_6
Backlight Control(LDS)
+3V
+3VPCU
1
EDP_BRIGHT
G_4
R194
R213
10K_4
10K_4
BL_ON
R216
*100K_4
D5
CCD_PWR
*SHORT_6
TP_PWR
*SHORT_6
LID591# [33,37]
RB500V-40
R215
G_1
BL#
PDTC143TT
Q23
2N7002K
EC_FPBACK# [37]
Q25
DTC144EUA
+5V
+3V
R214
*100K_4
LCDVCC
LCDVCC
[5] EDP_BRIGHT
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
*SHORT_6LCD_VIN
*SHORT_6
[5] eDP_BL_EN
Q24
R195
R219
R217
G_0
VIN
R205
G_5
CN8
100K_4
LVDS CONN
[7]
Touch Panel [7]

C
R598
*short_4
R599
*short_4
USBP8+
USBP8[7,9] BOARD_ID9
Add for leakage

+3V_S5
+3V
R595
*TP@10K_4
R601
*TP@10K_4
+3V
[8] TP_INT_FCH
Q49
*TP@BSN20
R600
0_4
TP_INT

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
LVDS&CCD&CRT DB&LID
Date:
1

7
Sheet
26
8
of
50
HDMI
INT_HDMI_TXDP2 C365
INT_HDMI_TXDN2 C366
INT_HDMI_TXDP1 C437
INT_HDMI_TXDN1 C447
INT_HDMI_TXDP0 C452
INT_HDMI_TXDN0 C458
INT_HDMI_TXCP C466
INT_HDMI_TXCN C756
ESD1
1
2
3
4
5
[5] INT_HDMI_TXDP2
[5] INT_HDMI_TXDN2
D
[5] INT_HDMI_TXDP1
[5] INT_HDMI_TXDN1
1
2
GND_3/8
4
5
10
9
10
9
INT_HDMI_TXDP2
INT_HDMI_TXDN2
7
6
7
6
INT_HDMI_TXDP1
INT_HDMI_TXDN1
10
9
10
9
INT_HDMI_TXDP0
INT_HDMI_TXDN0
7
6
7
6
INT_HDMI_TXCP
INT_HDMI_TXCN
10
9
10
9
HDMI_DDCCLK
HDMI_DDCDATA
7
6
7
6
HDMI_DET
+5V_HDMI
1.6p/50V_4
1.6p/50V_4
1.6p/50V_4
1.6p/50V_4
1.6p/50V_4
1.6p/50V_4
1.6p/50V_4
1.6p/50V_4
CN2
INT_HDMI_TXDP2
INT_HDMI_TXDN2
INT_HDMI_TXDP1
*HM@RClamp0524P
ESD2
1
2
3
4
5
[5] INT_HDMI_TXDP0
[5] INT_HDMI_TXDN0
ESD
[5] INT_HDMI_TXCP
[5] INT_HDMI_TXCN
1
2
GND_3/8
4
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
INT_HDMI_TXDN1
INT_HDMI_TXDP0
INT_HDMI_TXDN0
INT_HDMI_TXCP
INT_HDMI_TXCN
*HM@RClamp0524P
ESD3
HDMI_DET
+5V_HDMI
1
2
GND_3/8
4
5
HDMI_DDCCLK
HDMI_DDCDATA
+5V
+5V_HDMI
HDMI_DET
1
1
2
3
4
5
Q37
*HM@RClamp0524P
3
IN
OUT
GND
RV1
*EGA_4
1
2
AP2331SA-7
HDMI_PL_MOS
+5V
Q1
2N7002K
2
R20
R38
604/F_4
INT_HDMI_TXDP2
R39
604/F_4
INT_HDMI_TXDN2
R40
604/F_4
INT_HDMI_TXDP1
R41
604/F_4
INT_HDMI_TXDN1
R42
604/F_4
INT_HDMI_TXDP0
R43
604/F_4
INT_HDMI_TXDN0
R44
604/F_4
INT_HDMI_TXCP
R45
604/F_4
INT_HDMI_TXCN
20
22
23
21
ABA-HDM-022-P05
HDMI_DDCCLK
HDMI_DDCDATA
SHELL1
SHELL3
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL4
SHELL2
C626
*220p/50V_4
D25
*EGA_4
C19
C624
*1000p/50V_4
*1000p/50V_4
EMI reserve for HDMI(EMC)
100K_4
Close connector
B
HDMI HPD SENSE
HDMI SDVO I2C Control
INT_HDMI_TXDP2
+5V
+3V
R24
*100/F_4
INT_HDMI_TXDN2
D26
RB501V-40
+3V
R72
10K_4
INT_HDMI_TXDP1
R25
*100/F_4
Q38
BSN20
[5] INT_HDMI_AUXP
INT_HDMI_TXDN1
R456
2.2K_4
+3V
R26
*100/F_4
HDMI_DDCCLK
INT_HDMI_TXDN0
INT_HDMI_TXCP
R34
100K_4
R27
*100/F_4
[5] INT_HDMI_HPD
INT_HDMI_TXCN
D29
RB501V-40
+3V
Q3
2N7002K
1
2
+3V
HDMI_DET
R75
1K_4
+5V
INT_HDMI_TXDP0
R454
2.2K_4
+3V
[5] INT_HDMI_AUXN
BSN20
3
R459
2.2K_4
[37]
Q2
2N7002K
Q41
R460
2.2K_4
HDMI_HPD_EC#
HDMI_DDCDATA
PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
HDMI
Date:
5
Sheet
1
27
of
50
LAN/Card reader (LAN)
VDD33
+3V_S5
VDD33
VDD33
R226
*short_8
Below power trace should be > 30 mils

VDD33
AVDD33
VDD_CR
Pin LX to L1
AVDD33
*SHORT_6
R260
C335
C391
C337
C336
C338
10u/6.3V_6
10u/6.3V_6
1u/10V_4
0.1u/10V_4
*1n/50V_4
U9
Below power trace should be > 20 mils

AVDDH
VDDIO_CR
AVDDL
DVDDL
DVDDL
Transformer (LAN)
MDI3+
1 TD1+
MX1+
24
RJ45-TX3+
MDI3-
2 TD1-
MX1-
23
RJ45-TX3-
3 TCT1
MCT1
22
MCT2
21
RJ45-TX1+
AVDDVCO
TD2+
MX2+
20
MDI1-
TD2-
MX2-
19
RJ45-TX1-
MDI0+
TD3+
MX3+
18
RJ45-TX0+
MDI0-
TD3-
MX3-
17
RJ45-TX0-
16
For SWR mode
TCT3
MCT3
C359
C370
C372
C390
0.1u/10V_4
*1u/6.3V_4
*4.7u/6.3V_6
TCT2
MDI1+
0.1u/10V_4
L33
4.7uH/1A_2X2
C363
C358
C429
*1n/50V_4
0.1u/10V_4
10u/6.3V_8
LX
Place connect to Pin47
10
TCT4
MCT4
MDI2+
11
TD4+
MX4+
14
MDI2-
12
MX4-
13
TD4-
15
RJ45-TX2+
RJ45-TX2-
DVDDL
TERM0
R232
10K_4
L30
DVDDL
PCIE_RXP0_C
PCIE_RXN0_C
BLM18AG601SN1D
AVDDH
R231
10K_4 CRIO14/SPI_CS
R230
10K_4 CRIO7/SPI_DO
R229
10K_4
C758
0.1u/10V_4
xD_CEn
AVDDL
LAN_XTAL1
LAN_XTAL2
AVDDH
RBIAS
1
2
3
4
5
6
7
8
9
10
11
12
13
0.1u/10V_4
0.1u/10V_4
R55
75/F_8
PCIE_FCH_RXP0_LAN [8]
PCIE_FCH_RXN0_LAN [8]
AVDDVCO
LayoutNotes:
PlacedecouplingCAPsclosetoLANChip
VDDIO_CR
2
TERM9
VDD33
LX
LED[1]/PPS
LED[2]/PPS
LED[0]/PPS
DVDDL_REG
RX_N
RX_P
AVDDL
REFCLK_P
REFCLK_N
TX_P
TX_N
53
GND
U21
C419
C418
52
51
50
49
48
47
46
45
44
43
42
41
40
VDD33
LX
[7,30,37] FCH_PCIE_RST#
[7] PCIE_WAKE#
[7] PCIE_REQ_LAN#
AVDDH
C35
0.01u/25V_4
CRIO14/SPI_CS
CRIO13/SPI_CLK/PPS
CRIO7/SPI_DO
xD_CDn/SPI_DI
PERSTn
WAKEn
CLKREQn
xD_CEn
AVDDL_REG
XTLO
XTLI
AVDDH_REG
RBIAS
QCA8175
C403
0.1u/10V_4
1u/10V_4
CRIO6
CRIO12
CRIO4
CRIO0
CRIO1
CRIO2
CRIO3
VDDIO_CR_REG
CRIO5
CRIO8
CRIO9
CRIO10
CRIO11
Atheros
C423
39
38
37
36
35
34
33
32
31
30
29
28
27
CRIO4_R R277
CRIO0_R R280
CRIO1_R R279
CRIO2_R R276
CRIO3_R R275
VDDIO_CR
CRIO5_R R274
22_4
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
MDI3+
MDI3MDI2+
MDI2MDI1+
MDI1MDI0+
MDI0-
R465
D2
C631
*SUG@BS201N
*SUG@1M_8
RJ45 CONNECTOR (LAN)
SD_CLK [29]
C430
10p/50V_4
CN1
AVDDH
R603
2.37K/F_4
C356
1u/10V_4
0.1u/10V_4
TRXP0
TRXN0
TRXP1
TRXN1
AVDD33
TRXP2
TRXN2
AVDDL
TRXP3
TRXN3
VDD33
VDD_CR
LED[3]
C357
RJ45-TX0+
RJ45-TX0RJ45-TX1+
RJ45-TX2+
RJ45-TX2RJ45-TX1RJ45-TX3+
RJ45-TX3-
MDI0+
MDI0MDI1+
MDI1AVDD33
MDI2+
MDI2AVDDL
MDI3+
MDI3VDD33
+VDD_CR
52PIN-QFN
14
15
16
17
18
19
20
21
22
23
24
25
26
C342
15P/50_4
C343
15P/50_4
1
2
3
4
5
6
7
8
10
10
0+
01+
2+
213+
3-
11
11
12
12
RJ45
4
3
LAN_XTAL2
220p/3KV_1808
Reserver for EMI
SD_WP [29]
SD_CD# [29]
SD_CMD [29]
SD_DATA0 [29]
SD_DATA1 [29]
SD_DATA2 [29]
SD_DATA3 [29]
22_4
22_4
22_4
22_4
22_4
C659
C658
C661
C660
C82
C81
C84
C83
AVDDL
BLM18AG601SN1D
LED_ACTn
DVDDL
AVDDVCO
NA69R LF
PCIE_FCH_TXN0_LAN [8]
PCIE_FCH_TXP0_LAN [8]
CLK_PCIE_LANP [8]
CLK_PCIE_LANN [8]
L32
2
1
Y2
25MHz_XTAL
LAN_XTAL1
AVDD33
AVDDL
VDD33
SURGE (LAN)
+VDD_CR
U14
C755
C754
C344
C341
C374
C375
C392
C422
0.1u/10V_4
1u/10V_4
0.1u/10V_4
1u/10V_4
0.1u/10V_4
1u/10V_4
0.1u/10V_4
10u/6.3V_8
MDI1MDI1+
MDI3MDI3+
1
2
3
4
1
2
3
4
8
7
6
5
U4
RJ45-TX1RJ45-TX1+
RJ45-TX0RJ45-TX0+
8
7
6
5
*SUG@UCLAMP2512T.TCT
1
2
3
4
1
2
3
4
8
7
6
5
8
7
6
5
U43
MDI0+
MDI0MDI2+
MDI2-
1
2
3
4
1
2
3
4
8
7
6
5
U35
RJ45-TX3RJ45-TX3+
RJ45-TX2RJ45-TX2+
8
7
6
5
1
2
3
4
1
2
3
4
8
7
6
5
8
7
6
5

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
LAN-RTL8411/CARD READER
Date:
5

1
Sheet
28
of
50
CARD READER CONNECTOR (MMC)

SD/MMC CARD READER (MMC)
4
*short_4 SD_CMD_R
*short_4 SD_DATA3_R
+VDDCR
SD-CARD
GND
R224
R223
GND
SD_CMD
SD_DATA3
*short_4 SD_CLK_R
15
[28]
[28]
R610
14
SD_CLK
CARD/DET
W/P
DATA2
DATA1
DATA0
VSS2
CLK
VDD
VSS1
CMD
CD/DATA3
13
[28]
11
10
9
8
7
6
5
4
3
2
1
GND
SD_CD#
SD_WP
SD_DATA2
SD_DATA1
SD_DATA0
SD_CD#_R
SD_WP_R
SD_DATA2_R
SD_DATA1_R
SD_DATA0_R
12
[28]
[28]
[28]
[28]
[28]
*short_4
*short_4
*short_4
*short_4
*short_4
GND
CN13
R220
R623
R221
R617
R615
EMI
SD_CMD_R
SD_DATA0_R
SD_DATA1_R
SD_DATA2_R
SD_DATA3_R
C334
C785
C787
C331
C332
*56P/50V_4
*56P/50V_4
*56P/50V_4
*56P/50V_4
*56P/50V_4
+VDDCR
+VDD_CR
R609
*SHORT_6
VDD33
R606
*0_6
C772
Place close to connector
1u/10V_4
PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
CARD READER CONNECTOR

Date:
A

D
Sheet
29
of
E
50
MINI-CARD WLAN&BT(MPC)
+3V
+WL_VDD
R325
+3.3V: 1000mA
+3.3Vaux:330mA
+1.5V:500mA
NAC@0_8
C485
10u/10V_8
C511
0.1u/10V_4
C759
*0.1u/10V_4
C442
*0.1u/10V_4
+3VPCU
Q31
A
3
AC@AO3413
+WL_1.5V
2
R307
[37] IOAC_LANPWR#
AC@10K_4
+1.5V
R242
*0_6
C463
C790
*1000p/50V_4
AC@1000p/50V_4
C497
*0.1u/10V_4
C369
*10u/6.3V_8
+WL_VDD
R642
+WL_VDD
[8] PCIE_FCH_TXP1_WLAN
[8] PCIE_FCH_TXN1_WLAN
[8] PCIE_FCH_RXP1_WLAN
[8] PCIE_FCH_RXN1_WLAN
[8] CLK_PCIE_WLANP
[8] CLK_PCIE_WLANN
PCIE_REQ_WLAN#_R
PCIE_WAKE#_WLAN_R
15
13
11
9
7
5
3
1
GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#
53
MINI-CARD1
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V
16
14
12
10
8
6
4
2
+WL_VDD
*AC@4.7K_4
R637
WLAN_OFF_R
AC@0_4
WLAN_OFF [37]
TP67
B
USBP7+ [7]
USBP7- [7]
+WL_VDD
WL_SMDATA
WL_SMCLK
+WL_1.5V
U22
+WL_VDD
FCH_PCIE_RST#_R
RF_EN
DEBUG_LFRAME#
DEBUG_LAD3
DEBUG_LAD2
DEBUG_LAD1
DEBUG_LAD0
R614
R613
R611
R608
R607
PLTRST#_R
PCLK_DEBUG_R
Reserved
Reserved
Reserved
Reserved
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8
*AC@TC7SH08FU
2
FCH_PCIE_RST# [7,28,37]
4
1
[37]
IOAC_RST# [37]
0_4
0_4
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
GND
R639
R634
*short_4BT_POWERON_R
*short_4
*short_4
*short_4
*short_4
*short_4
LPC_LFRAME# [8,31,37]
LPC_LAD3 [8,31,37]
LPC_LAD2 [8,31,37]
LPC_LAD1 [8,31,37]
LPC_LAD0 [8,31,37]
Debug
R300
R288
*AC@0_4
0_4
+WL_1.5V
+WL_VDD
54
[7,8,31,37] PLTRST#
[8] PCLK_DEBUG
R643
GND
CN14
[37] BT_POWERON
Leakage circuit (MPC)
+WL_VDD
+WL_VDD
R239
AC@4.7K_4
EC: +3VPCU
+3VPCU
AC@4.7K_4
R264
Q28
3
[37] PCIE_WAKE#_WLAN
[7,35] SDATA1
PCIE_WAKE#_WLAN_R
R313
AC@4.7K_4
WL_SMDATA
WL_SMCLK
AC@ME2N7002E_200MA
[7,35] SCLK1
+3V
R297
AC@4.7K_4
Q30
5
+WL_VDD
AC@2N7002DW
[7] PCIE_REQ_WLAN#
R262
AC@4.7K_4
Q26
FCH: +3V
PCIE_REQ_WLAN#_R
AC@ME2N7002E_200MA
PROJECT : ZRI/ZQI
R235
Size
NAC@0_4
Document Number
Rev
A1A
MINI PCIE(WLAN/BT)
Date:
1

7
Sheet
of
30
8
50
SATA HDD
TPM
CN12
19
+5V
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CN18
120mil
+5V_HDD
R270
C361
C425
C402
[8,37] CLKRUN#
[7,8,30,37] PLTRST#
*short_8
*0.1u/16V_4
10u/6.3V_6
*short_4
CLKRUN#_R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
C424
+
*100u/6.3V_3528
R668
+3V_S5
+3V
0.01u/25V_4
SATA_RXP0_C
SATA_RXN0_C
C362
C360
0.01u/16V_4
0.01u/16V_4
SATA_RXP0_R
SATA_RXN0_R
SATA_TXN0_R
SATA_TXP0_R
C340
C339
0.01u/16V_4
0.01u/16V_4
SATA_TXN0_C
SATA_TXP0_C
[8,37] IRQ_SERIRQ
[7] FCH_LPC_PD#
[8,30,37] LPC_LAD0
[8,30,37] LPC_LAD1
[8,30,37] LPC_LFRAME#
[8,11] LPC_CLK1
SATA_RXP0_R [9]
SATA_RXN0_R [9]
SATA_TXN0_C [9]
SATA_TXP0_C [9]
C819
R437
R436
R435
C587
TPM@0.1u/10V_4
*short_4
*short_4
SERIRQ_R
LPCPD#_R
*short_4
PCLK_TPM_C
TPM@10p/50V_4
[8,30,37] LPC_LAD2
[8,30,37] LPC_LAD3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
TPM@TPM_CONN
SATA_HDD
SATA Re-driver
MINI-CARD SSD
+3V_SATA
H=4.95mm
[9]
[9]
SATA_RXN1
SATA_RXP1
C594
C590
SSD@0.01u/16V_4
SSD@0.01u/16V_4
SATA_TXP1_C
SATA_TXN1_C
C591
C589
SSD@0.01u/16V_4
SSD@0.01u/16V_4
SATA_RXN1_C
SATA_RXP1_C
+3V
+3V_SATA
D
R441
C592
C595
C593
*SSD@0.1u/10V_4
SSD@0.1u/10V_4
SSD@10u/10V_8
15
13
11
9
7
5
3
1
GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#
SSD@MINI-CARD1
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V
16
14
12
10
8
6
4
2
GND
SATA_TXP1
SATA_TXN1
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
54
[9]
[9]
53
Reserved
Reserved
Reserved
Reserved
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8
GND
CN23
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
*short_8
D

PROJECT : ZRI/ZQI
rating = 1000mA @ 128G
Size
Rev
A1A
SATA(HDD/SSD/TPM)
Date:
Document Number
Sheet

4
31
of
50
+5VA
R362
*10K/J_4
*10K_4
HP
HP-L
EAPD#
20120910: ALC3225 has a internal MOSFET
HP-R
COMBO_MICJD
22K/F_4
C494
10u/6.3V_6
C557
Need check AMP

PD PIN level
C568
2.2u/6.3V_6
MIC2-VREFO
C567
0.1u/10V_4
R351
2.2K/J_4
*10u/6.3V_6
+3VCPVDD
*SHORT_6
C505
MIC2-L
2.2u/6.3V_6
C517
MIC2_MIC
R346
ADOGND
COMBO_MIC
1K/J_4
ADOGND
C571
R385
+1.5V
2.2u/6.3V_6
2.2u/6.3V_6
MIC2-R
Place next to pin 28
C820
+3V R656
R344
MIC2-VREFO
R360
*10K_4
R393
10u/6.3V_6
R345
22K/F_4
ADOGND
close to pin 27
+5VA
*0/J_4
ANALOG
0/J_4
D7
*14V/38V/100P_4
20121009: FAE Vic request to change 1K ohm from 0 ohm
C527
C812
0.1u/10V_4
R363
HEADPHONE/Mic combo (AMP)
Codec (ADO)
+3V
ADOGND
Combo Jack
ADOGND
+
2.2u/6.3V_6
MIC2-R
17
MIC2-L
45
SPK-R+
MONO-OUT
16
JDREF
15
Sense B
14
Sense A
13
R413
C821
10u/6.3V_6
*SHORT_6
C800
0.1u/10V_4
EXT MIC
20K/F_4
SENSEA
ALC3225
R412
Internal Speaker (AMP)
ADOGND
R_SPK2
1u/35V_6 BEEP_1
R365
47K/F_4 BEEP_2
D10
RB500V-40
D11
RB500V-40
R392
4.7K/J_4
C532
0.1u/10V_4
C551
10u/6.3V_6
U30
SPKR
C579
1u/16V_6
R419
1K/F_6
C572
1u/16V_6
C573
1u/16V_6
R410
1K/F_6
C566
1u/16V_6 10
INPUT-R
INPUT-L
Place next to pin 1
R418
1.6K/F_6
*100p/50V_4
R402
1.6K/F_6
BYP
+5V
ADOGND
R420
ACZ_SYNC_AUDIO
R655
*SHORT_6
C822
C814
0.1u/10V_4
10u/6.3V_6
33/J_4
*22K/F_4
Layout Note:
Place very close to U5001
11dB
NC
NC
14dB
NC
NC
19dB
NC
NC
25dB
Gain (Differential)
OUT-LN
OUT-LP
6
5
2
1
R_SPK2+
R_SPK2-
R2
R1
L_SPK2L_SPK2+
G1
G2
R396
*0/J_4
R384
*0/J_4
R395
0/J_4
R383
0/J_4
G1
G2
G1
G2
11
12
R4
R3
[7]
Layout Note:
Place very close to U5001
ADOGND
20120928Follow ME & PDC pin define
+3V
R_SPK2+
R_SPK2L_SPK2L_SPK2+
Place next to pin 9

ACZ_SDIN0_R R380
R4
ADOGND
R429
+3VDVDDIO
R3
NC
C580
2.2u/6.3V_6
*20K/F_4
2
5.5V/25V/410P_4
DMIC_DATA
R2
NC
[7]
PCBEEP_EC [37]
ACZ_RESET#_AUDIO [7]
1
D18
R1
+5VA
OUT-RP
OUT-RN
PD#
ALC1001-CGT
C560
C552
Output Gain Table
EAPD#
L_SPK2
C554
DMIC_CLK
ADOGND
ADOGND
+5V_AMP
*SHORT_6
R376
close to U5001
PCBEEP dont coupling any signals if possible

8/17 separate PCBEEP to Digital from Realtek suggestion
C561
ADOGND
HPOUT_JD
39.2K/F_4
100p/50V_4
DMIC
7
SIT_2SJ3052-005111F
D19
*14V/38V/100P_4
+5V
Pin1 - Pin6: DGND

Pin7 - Pin12: AGND
Thermal Pad: DGND
1.6Vrms
D22
*14V/38V/100P_4
1
D16
*14V/38V/100P_4
HPOUT_JD
close to pin 13
PCBEEP
2
5
6
*SHORT_6
ANALOG
close to pin 7
C797
10u/6.3V_6
HPR_SYS
R434
GND
+3VDVDD
R647
HP-R-1
SPK-2
close to pin 15
DIGITAL
+3V
56/F_4
PVDD1
PVDD2
SYNC
RESET#
12
11
Spilt by DGND
10
GND
SDATA-IN
49
SPDIFO/GPIO2
DIGITAL
PDB
48
PCBEEP
18
MIC2-L
47
R415
26
27
25
AVSS1
AVDD1
LDO1-CAP
29
28
VREF
MIC2-VREFO
MIC2-R
SPK-R-
COMBO_MICJD
MIC1-VREFO-R
SPK-L-
44
R_SPK+
DVDD-IO
43
R_SPK-
LDO3-CAP
L_SPK-
0.1u/10V_4
32
MIC1-L
PVDD2
HPL_SYS
R356
ADOGND
SPK-L+
BIT-CLK
C509
10u/6.3V_6
31
20
19
PD#
C492
30
21
MIC1-R
SDATA-OUT
C475
10u/6.3V_6 0.1u/10V_4
HP-OUT-L
LINE1-R
PVDD1
42
*SHORT_6
C474
35
AVDD2
41
DVSS
+5V
33
40
46
HP-L-1
INT MIC
L_SPK+
+5VPVDD2
R334
R_SPK2
23
L_SPK2
22
SPK-1
24
LINE1-L
GPIO1/DMIC-CLK
0.1u/10V_4
LINE2-L
LINE2-R
10u/6.3V_6
56/F_4
*SHORT_6
HP-R
LDO2-CAP
GPIO0/DMIC-DATA
C510
R364
ADOGND
AVSS2
DVDD
10u/6.3V_6 0.1u/10V_4
C493
10u/6.3V_6
39
*SHORT_6
C472
0.1u/10V_4
4
3
1
13
+5VPVDD1
R335
C473
C577
HP-L
ADOGND
38
ANALOG
+5V
CBP
C581
3
4
ADOGND
HP-OUT-R
37
C516
10u/6.3V_6
MIC1-VREFO-L
ADOGND
C496
0.1u/10V_4
ADOGND
CPVDD
+1.5VAVDD2
C486
10u/6.3V_6
CPVEE
36
U29
34
CN15
DIGITAL
CBN
Layout Note:
Place close to Codec
R314
*SHORT_6
R414
R408
R398
R390
40milforeachsignal
*SHORT_6
*SHORT_6
*SHORT_6
*SHORT_6
R_SPK+
R_SPKL_SPKL_SPK+
C578
C570
C565
C558
*68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4
ACZ_SDIN0 [7]
22p/50V_4
R676
R675
R674
R673
*SHORT_6
*SHORT_6
*SHORT_6
*SHORT_6
CN22
R_SPK+_2
R_SPK-_2
L_SPK-_2
L_SPK+_2
R_SPK+_1
R_SPK-_1
L_SPK-_1
L_SPK+_1
L_SPK+_2
L_SPK-_2
L_SPK+_1
L_SPK-_1
R_SPK-_2
R_SPK+_2
R_SPK-_1
R_SPK+_1
1
2
3
4
5
6
7
8
9
10
SPK CN
C829
C828
C827
C826
*68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4
ACZ_BITCLK_AUDIO [7]
ACZ_SDOUT_AUDIO [7]
Mono MIC
INT DIP AMIC(Reserve Stereo) (AMP)
N.C
stuff
R6
N.C
stuff
R5
stuff
N.C
Mute(ADO)
L48
UPB201209T-310Y-N/6A/31ohm_8
+3V
CN17
R350
*10K/J_4
ADOGND
DGND plane
AGND plane
4
3
62
51
+3V
PD#
0V : Power down Class D SPK amplifer

3.3V : Power up Class D SPK amplifer
AMP_MUTE#
D9
RB500V-40
D8
RB500V-40 ACZ_RESET#_AUDIO
Tied at one point only under

the codec or near the codec
AMIC
AMIC1_INTL1_R
R696
D31
TVS/6pF_4
*short_4 DMIC_DATA
C586 *0.1u/10V_4
C833
*short_4
*0/J_4
*short_4
*short_4
*1000p/50V_4
*1000p/50V_4
22p/50V_4
A
+5VA
*0/J_4
R433
R327
R382
R326
C596
C588
ADOGND
cap place close to MIC-connector
AMP_MUTE# [37]
AMIC1_INTL2_R
R697
+5V
R379
D32
TVS/6pF_4
*short_4 DMIC_CLK
C834
22p/50V_4
Power(ADO)
Stereo MIC
CN1
PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
REALTEK ALC3225
Date:
5

1
Sheet
32
of
50
INT & EXT USB2.0
mDP USB3.0 re-driver IC
Active Low:
1st: AL007534000 (Promate)
2nd: AL000547005 (GMT)
3rd: AL002501000 (DDS)
+5V_S5
U12
C276
1u/6.3V_4
CN6
U17
[37]
USBON#
IN1
IN2
4
1
EN#
GND
OUT3
OUT2
OUT1
8
7
6
OC#
USBP0
USBP0-_R
USBP0+_R
2
3
C180
C103
C735
470p/50V_4 0.1u/10V_4
1
2
3
4
100u/6.3V_3528
VDD
DD+
GND1
GND6
GND5
6
5
GND7
GND8
7
8
[7]
[7]
USB3_TXN1
USB3_TXP1
[7]
[7]
USB3_RXN1
USB3_RXP1
USB3_TXN1
USB3_TXP1
C99
C88
REM@0.1U/10V_4
REM@0.1U/10V_4
USB3_TXN1_1
USB3_TXP1_1
8
9
USB3_RXN1
USB3_RXP1
C86
C74
REM@0.1U/10V_4
REM@0.1U/10V_4
USB3_RXN1_1
USB3_RXP1_1
11
12
TX2TX2+
1
13
2
VCC
VCC
EQ1
+mDP_USB_RE_PWR
EQ3
USB2.0
EQ4
UP7534BRA8-15
OC_1#
R126
USBP0USBP0+
[7]
[7]
*short_4
D4
*5V/30V/0.2p_4
*short_4
2
C234
[37]
USBON#
USB3_TXN1_1R
USB3_TXP1_1R
R135
R129
REM@0/J_4
REM@0/J_4
USB3_TXN1_2
USB3_TXP1_2
RX2RX2+
20
19
USB3_RXN1_1R
USB3_RXP1_1R
R125
R119
REM@0/J_4
REM@0/J_4
USB3_RXN1_2
USB3_RXP1_2
EN_RXD
EQ2
DE3
DE1
DE4
16
DE2
OS3
OS1
OS4
15
OS2
5
14
NC1
NC2
7
24
GND
GND
GND
GND
6
10
18
21
R140
R544
*REM_AS@4.99K/F_4
REM_TI@4.99K/F_4
R495
R104
*REM@4.99K/F_4
REM@4.7K/F_4
+mDP_USB_RE_PWR
*REM_AS@4.7K_4
R532 +USB_RE_PWR
*REM_AS@4.7K_4
R491 +USB_RE_PWR
R507
REM_TI@0/J_4
REM@SN65LVPE502ARGER
R550
USB3_TXN1_2 [25]
USB3_TXP1_2 [25]
USB3_RXN1_2 [25]
USB3_RXP1_2 [25]
R531
REM_TI@0/J_4
+mDP_USB_RE_PWR
*SHORT_6
1u/6.3V_4
U18
23
22
CM
17
+3V
D3
*5V/30V/0.2p_4
R121
+5V_S5
TX1TX1+
[7]
RX1RX1+
2
3
IN1
IN2
4
1
EN#
GND
CN7
8
7
6
OUT3
OUT2
OUT1
USBP3
C307
OC#
0.1u/10V_4
USBP3-_R
USBP3+_R
UP7534BRA8-15
OC_1#
[37]
NBSWON#
[26,37] LID591#
+3VPCU
1
2
3
4
5
6
7
8
9
10
11
12
1 13
2 14
3
4
5
6
7
8
9
10
11
12
13
14
USB3_RXP1
USB3_RXN1
USB3_TXN1
USB3_TXP1
R515
R519
R525
R522
NREM@0/J_4
NREM@0/J_4
NREM@0/J_4
NREM@0/J_4
USB3_RXP1_2
USB3_RXN1_2
USB3_TXN1_2
USB3_TXP1_2
EN_RXD
1(default)
0
Control pins setting

CM
Device function
Device function
Normal Operation
0(default) Normal Operation
Sleep Mode
1
Compliance Test Mode
USB/B CONN
+mDP_USB_RE_PWR
L55
[7]
[7]
4
1
USBP3USBP3+
4
1
3
2
3
2
USBP3-_R
USBP3+_R
DLW21HN900SQ2L_C
C652
C65
C698
C672
REM@1U/6.3V_4
REM@0.1U/16V_4
REM@2.2U/6.3V_6
REM@470P/50V_4
+mDP_USB_RE_PWR
B
R494
R543
R493
R542
R492
R541
REM@0_4
REM@0_4
*REM@4.99K/F_4
*REM@4.99K/F_4
*REM@4.99K/F_4
*REM@4.99K/F_4
EQ3
EQ4
DE3
DE4
OS3
OS4
R103
R139
R102
R138
R101
R137
*REM@4.99K/F_4
*REM@4.99K/F_4
*REM@75K/F_4
*REM@75K/F_4
REM@4.99K/F_4
REM@4.99K/F_4

PROJECT : ZRI/ZQI
Size
Document Number
Date:
Rev
A1A
INT&EXT USB
5
Sheet
1
33
of
50
USB3.0/2.0
2012-06-15
Active High:
1st: AL007534001 (Promate)
2nd: AL000547006 (GMT)
3rd: AL002511002 (DDS)
+5VPCU
USB3.0 re-driver IC
C629 1u/6.3V_4
U37
IN1
IN2
4
1
EN
GND
OUT3
OUT2
OUT1
8
7
6
OC#
C628
C634
UP7534ARA8-15
[7]
USBPWR1
1
USB_BC_EN
2
3
1000p/50V_4
100u/6.3V_3528
OC_0#
R59
*short_4
USBP10-_C
USBP10+_C
USB 3.0 Connector

CN3
USB3.0_CONN
R58
11/15 add cap for RF suggest
USB3_RXN0_R
USB3_RXP0_R
USB3_TXN0
USB3_TXP0
USB3_TXN0
USB3_TXP0
C49
C50
C44
*1.6P/50V_4
R57
*short_4
R62
*short_4
R63
*short_4
USB3_TXN0_R
USB3_TXP0_R
VBUS
DD+
GND
SSRXSSRX+
GND
SSTXSSTX+
1
2
3
4
5
6
7
8
9
13
12
11
10
C45
*1.6P/50V_4
[7]
[7]
*short_4
USB3_RXN0
USB3_RXP0
USB3_RXN0
USB3_RXP0
1
2
3
4
5
6
7
8
9
USBP10-_R
USBP10+_R
13
12
11
10
[7]
[7]
R56
*short_4
0.1u/10V_4 USB3_TXN0_C
0.1u/10V_4 USB3_TXP0_C
C28
*1.6P/50V_4
C27
*1.6P/50V_4
11/15 add cap for RF suggest
USB Charger to 3.0

CB
B
SELCDP
Funcion
DCP autodetect with mouse/keyboard wakeup
S0 charging with SDP only
USBP10-_R
RV7 1
2 *EGA_4
USBP10+_R
RV6 1
2 *EGA_4
USB3_RXN0_R RV4 1
2 *EGA_4
USB3_RXP0_R RV5 1
2 *EGA_4
USB3_TXN0_R RV2 1
2 *EGA_4
USB3_TXP0_R RV3 1
2 *EGA_4
S0 charging with CDP or SDP only (depending on external device)
U6
BC_CEN
USBP10-_C
USBP10+_C
1
2
3
4
CEN
CB1
DM
TDM
DP
TDP
SELCDP VDD
Thermal Pad
8
7
6
5
9
R93
R78
C59
CH@0_4
*CH@0_4
CH@0.1u/10V_4
USB_CHARGE_ON [37]
MAINON [37,40,41,47]
USBP10- [7]
USBP10+ [7]
CH@SLG55584A
R482
CH@10K_4
R472
R471
+5VPCU
+3VPCU
CEN:SLG55584A----pull up
SLG55584----pull low
NCH@0_4
NCH@0_4
CH@47K_4
C642
*CH@0.1u/10V_4
R478
BC_CEN
A
2
USB_BC_ON
USB_BC_EN
1
3
[37] USB_BC_ON
R466
U38
CH@TC7SH08FU
NCH@0_4
PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
INT&EXT USB
Date:
5
Sheet

1
34
of
50
7
5
3
1
CP6
7
5
3
1
CP5
7
5
3
1
CP1
7
5
3
1
CP2
7
5
3
1
CP3
7
5
3
1
CP4
C583
C584
K/B(KBC)
CN19
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
28
27
20121005 SWAP keyboard pin-define
+3VPCU
RP6
10
MX4 9
MX5 8
MX6 7
MX7 6
10K_10P8R
1 MX3
2 MX2
3 MX1
4 MX0
5
KB_CONN
8
6
4
2
*100p/50Vx4
8
6
4
2
*100p/50Vx4
8
6
4
2
*100p/50Vx4
8
6
4
2
*100p/50Vx4
8
6
4
2
*100p/50Vx4
8
6
4
2
*100p/50Vx4
*100p/50V_4
*100p/50V_4
MX2
MX3
MX4
MX5
TOUCHPAD BOARD CONN(TPD)

+3V
MX6
MX7
MY17
MY16
MY3
MY2
MY1
MY0
R406
2.2K_4
Q33
R416
2.2K_4
5
3
[7,30] SDATA1
MY7
MY6
MY5
MY4
SDATA1_TP
SCLK1_TP
2
6
[7,30] SCLK1
MY11
MY10
MY9
MY8
2N7002DW
MY15
MY14
MY13
MY12
R407
*0_4
R430
*0_4
MX1
MX0
KB_BL LED
+5V
+5V
C585
R439
+5V
R440
0_4
+3V
+5V
*0_4
R431
R432
10K_4
10K_4
L59
L60
0_6
*0_6
C825
0.1u/10V_4
*KBL@2.2u/10V_6
R438
+3V
50mil
Q34
KBL@AO3413
[37]
[37]
L47
L46
TPCLK
TPDATA
2
Q35
KBL@DTC144EUA
+5V_KB
R404
C575
1
[37] KB_BL_LED
*short_4
+5V_KB_R
C569
KBL@4.7u/6.3V_6
KBL@0.01u/25V_4
4
3
2
1
*short_6
*short_6
C562
*0.01u/16V_4
CN20
CN16
+TPVDD
TPCLK_R
TPDATA_R
KBL@10K_4
1
2
3
4
5
6
7
8
SDATA1_TP
SCLK1_TP
C563
*0.01u/16V_4
[7]
[9]
SMBALERT#
BOARD_ID2
6
5
TP_CN
LOW=ELAN
HIGH=SYNAPTICS
KBL@KB_backlight
9
10
If need to support XT(25) GPU, need check with thermal
CPU FAN(THM)
+5V
+3V
FAN1 For CPU
+5V
+3V
FAN2 For GPU

+5V
+3V
R453
1K/J_4
R240
10K/J_4
R261
10K/J_4
R452
10K/J_4
R604
*short_8
[37]
R455
10K/J_4
FANSIG1
[37]
[37]
CPUFAN1
3
Q27
MMBT3904-7-F_200MA
FAN_PWM_CN1
30mil
R457
*short_8
CN5
FANSIG2
+5V_FAN2
R237
1K/J_4
+5V
+3V
4
3
2
1
CN10
+5V_FAN1
4
3
2
1
6
5
[37]
CPUFAN2
FAN_PWM_CN2
3
Q36
MMBT3904-7-F_200MA
6
5
FAN2
30mil
FAN1

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
KB/TP/FAN
Date:
5
Sheet
1
35
of
50
LED(UIF)
HOLE(OTH)
Power
HOLE21
MBZRQ002010
+3V_S5
1M_4
Blue
PWRLED#
[37]
HOLE2
*hg-c236d118p2
7
6
8
5
9
4
SUSLED#
R12
300_4
R21
680_4
2
LED1
Battery
+3VPCU
R28
1M_4
R29
1M_4
Blue
BATT Enable short pad

C
HOLE15
* H-C236D165P2
HOLE18
*h-te236x236bc236d158p2
LED_B/R
SW1
TP75
3
4
2
1
[37]
BATLED0#
[37]
BATLED1#
R15
300_4
R14
680_4
+3VPCU
C
TP66
LED2
Amber
Lid Switch
+3V_S5
Amber
1
2
3
1
2
3
HOLE9
*hg-c236d118p2
7
6
8
5
9
4
1
2
3
HOLE5
*hg-te382x675bc236d118p2
7
6
8
5
9
4
1
2
3
1
2
3
HOLE4
*hg-c236d118p2
7
6
8
5
9
4
1M_4
R13
LED_B/R
[37]
HOLE16
SSD@MBZRQ002010
7
6
8
5
9
4
R22
HOLE20
*hg-c236d118p2
7
6
8
5
9
4
1
2
3
1
2
3
HOLE13
*hg-c236d118p2
7
6
8
5
9
4
1
2
3
HOLE1
*hg-c236d118p2
7
6
8
5
9
4
BATT_EN# [38]
EE RETURN-PATH CAPACITORS(EMC)
HOLE8
*HG-C236D118P2
7
6
8
5
9
4
+3V
+3V
C638
*1000p/50V_4
HOLE6
HOLE10
EV@MBZRQ001010 EV@MBZRQ001010
HOLE12
HOLE7
*h-tc150bc256d150p2 *h-tc150bc256d150p2
+1.1V
VIN
+5V_S5
C216
*1000p/50V_4
HOLE22
*SPAD-RE140X72NP
C637
*0.1u/25V_4
C753
*1000p/50V_4
C323
*0.1u/25V_4
C449
*0.1u/25V_4
C432
*1000p/50V_4
C394
0.1u/25V_4
+VDDNB_CORE +VDDNB_CORE
VIN
VIN
VIN
VIN
+1.1V
HOLE11
*h-tc150bc256d150p2
+5V_S5
PAD1
52ZRKMATN00
+VGPU_CORE +VGPU_CORE
1
2
3
1
2
3
HOLE14
*hg-c276d118p2
7
6
8
5
9
4
1
2
3
HOLE3
*hg-c276d118p2
7
6
8
5
9
4
HOLE23
*SPAD-RE300X94NP
PAD2
*spad-zri-np
PAD3
*spad-zri-np
C217
*0.1u/25V_4
C732
*1000p/50V_4
C733
*0.1u/25V_4
C134
0.1u/25V_4
C310
0.1u/25V_4
C329
0.1u/25V_4
C622
0.1u/25V_4
PAD4
PAD5
*spad-zri-1np *spad-zri-1np
1
2
3
4
5
6
PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
LAN DB/ LED/ EMI/ Hole

Date:
5
Sheet
1
36
of
50
EC(KBC)
L31
PBY160808T-250Y-N/3A/25ohm_6
+A3VPCU
+3V
30mil
+3VPCU
R295
1
C408
C421
0.1u/10V_4
10u/6.3V_6
E775AGND
0.03A(30mils)
0.1u/10V_4
39p/50V_4
0.1u/10V_4
U23
[8,30,31] LPC_LFRAME#
[8,30,31] LPC_LAD0
[8,30,31] LPC_LAD1
[8,30,31] LPC_LAD2
[8,30,31] LPC_LAD3
[8,11] CLK_PCI_EC
[8,31]
R317
*22_4
C478
*10p/50V_4
3
126
127
128
1
2
LFRAME/GPIOF6
LAD0/GPIOF1
LAD1/GPIOF2
LAD2/GPIOF3
LAD3/GPIOF4
LCLK/GPIOF5
GPIO11/CLKRUN
CLKRUN#
[7] SIO_A20GATE
121
GPIO85/GA20
[7]
122
KBRST/GPIO86
[7] SIO_EXT_SCI#
29
ECSCI/GPIO54
[26] EC_FPBACK#
SIO_RCIN#
[32] AMP_MUTE#
124
GPIO10/LPCPD
LREST/GPIOF7
EMI reserve
[30]
123
RF_EN
[8,31] IRQ_SERIRQ
125
[7] SIO_EXT_SMI#
GPIO67/PWUREQ
SERIRQ/GPIOF0
GPIO65/SMI
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
54
55
56
57
58
59
60
61
KBSIN0/GPIOA0
KBSIN1/GPIOA1
KBSIN2/GPIOA2
KBSIN3/GPIOA3
KBSIN4/GPIOA4
KBSIN5/GPIOA5
KBSIN6/GPIOA6
KBSIN7/GPIOA7
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
[35]
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33
KBSOUT0/JENK/GPIOB0
KBSOUT1/TCK/GPIOB1
KBSOUT2/TMS/GPIOB2
KBSOUT3/TDI/GPIOB3
KB
KBSOUT4/JEN0/GPIOB4
KBSOUT5/TDO//GPIOB5
KBSOUT6/RDY/GPIOB6
KBSOUT7/GPIOB7
KBSOUT8/GPIOC0
KBSOUT9/SDP_VIS
KBSOUT10/P80_CLK
KBSOUT11/P80_DAT
KBSOUT12/GPIO64/TEST
KBSOUT13/GPIO63/TRIST
KBSOUT14/GPIO62/XORTR
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17
MBCLK
MBDATA
APU_SIC_EC
APU_SID_EC
GPUT_CLK
GPUT_DATA
[7,38]
MBCLK
[7,38]
MBDATA
[5] APU_SIC_EC
[5] APU_SID_EC
[16]
GPUT_CLK
[16] GPUT_DATA
70
69
67
68
119
120
GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2
GPIO23/SCL3
GPIO31/SDA3
C393
GPIO94/DA0
GPI95/DA1
GPI96/DA2
101
105
106
GPIO01/TB2
GPIO02/SPI_CS
GPIO03/AD6
GPIO04/AD5
GPIO05/AD4
GPIO06/IOX_DOUT/RTS1
GPIO07/AD7/VD_IN2
GPIO16
GPIO30/F_WP
GPIO36
GPIO41
GPIO42/SCL3B/TCK
GPIO43/SDA3B/TMS
GPIO44/TDI
GPIO
GPO47/SCL4
GPIO50/PSCLK3/TDO
GPIO51
GPIO52/PSDAT3/RDY
GPIO53/SDA4
GPIO70
GPIO71
GPIO72
GPIO75/SPI_SCK
GPO76/SPI_MOSI
GPIO77/SPI_MISO
GPIO80/VD_IN1
GPO82/IOX_LDSH/VD_OUT1
GPO84/IOX_SCLK/VD_OUT2
GPIO97/DA3
64
79
95
96
108
93
94
114
109
15
80
17
20
21
24
25
26
27
28
73
74
75
82
83
84
104
110
112
107
GPIO56/TA1
GPIO20/TA2/IOX_DIN_DIO
GPIO14/TB1
31
117
63
FANSIG2 [35]
SUSON [40]
FANSIG1 [35]
32
118
62
65
22
16
81
66
CPUFAN2 [35]
PCBEEP_EC [32]
PWRLED# [36]
BATLED0# [36]
CPUFAN1 [35]
SUSLED# [36]
WLAN_OFF [30]
BATLED1# [36]
TIMER
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO32/D_PWM
GPIO45/E_PWM
GPIO40/F_PWM/1_WIRE
GPIO66/G_PWM
GPIO33/H_PWM/VD1_EN
TEMP_MBAT [38]
PCIE_WAKE#_WLAN
TP58
R250
VCC_POR#
85
VCC_POR
12
13
TP64
VTT
PECI
SMB
GPIO87/SIN_CR
GPIO34
GPIO46/TRST
GPO83/SOUT_CR
IR
113
14
23
111
F_SDO/F_SDIO0
F_SDI/F_SDIO1
GPIO81/F_SDIO2/F_WP
GPIO00/32KCLKIN/F_SDIO3
F_CS0
F_SCK
87
86
91
77
90
92
GPIO55/CLKOUT/IOX_DIN_DIO
30
PS/2 FIU
5
18
45
78
89
116
NPCE985L
EC_WLAN_WAKE# [7]
ACIN
BC_EN
NBSWON#_R
TP39
R243
+3VPCU
*Short_4
APU_SIC_EC
APU_SID_EC
R256
R255
1K_4
1K_4
GPUT_CLK
GPUT_DATA
R304
R308
EV@1K_4
EV@1K_4
+3V_GFX
KB_BL_LED [35]
+1.1V_DUAL_EN [42]
DGPU_AC_DC# [16]
TP38
SUSB# [7]
TP48
D/C#
[38]
S5_ON [39,47]
HDMI_HPD_EC#
[27]
+3V_S5
TP49
PCIE_RST#_EC
R251
SUSC# [7]
PWROK_EC [11]
PCH_RSMRST# [7]
MAINON [34,40,41,47]
FCH_PCIE_RST# [7,28,30]
*AC@0_4
R252
GPU_ID
R244
SPI_SDI_UR
R247
R248
R249
33_4
*short_4
100K/F_4
SPI_CS0#_UR
SPI_SCK_UR_R
R246
R245
33_4
33_4
EV@4.7K_4
H_PROCHOT# [5,8]
Q29
PROCHOT_EC
USB_BC_ON [34]
+1.1V_EN [42]
IOAC_LANPWR# [30]
PROCHOT_EC
*8.2K_4
GPU_ID : H = Mars
L = Thames
USBON# [33]
USB_CHARGE_ON [34]
SUSLED#
PCH_RSMRST#
+3VPCU
DNBSWON# [7]
TP62
100K_4
2N7002K
SPI_SDO [9]
SPI_SDI [9]
SPI_CS [9]
SPI_SCK [9]
+3V
HWPG(KBC)
TP50
R339
10K/J_4
SM BUS ARRANGEMENT TABLE

L27
10K_4
4.7K_4
4.7K_4
+3V_S5
IOAC_RST# [30]
LID591# [26,33]
VRON
HWPG
R627
R253
R254
[38]
NBSWON# [33]
TP40
GPU_ID
S5_ON
MBCLK
MBDATA
AGND
47K/F_4
GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO26/PSCLK2
GPIO27PSDAT2
AC@0_4
[30]
[38]
103
[30] BT_POWERON
+3VPCU
72
71
10
11
ICM
R286
GND1
GND2
GND3
GND4
GND5
GND6
TP63
ICM
TP59
TP42
R281
SPI_SDO_UR_R
TPCLK
TPDATA
SM BUS PU(KBC)
0.01u/16V_4
97
98
99
100
[35]
[35]
ICM
10u/6.3V_6
GPIO90/AD0
GPIO91/AD1
GPIO92/AD2
GPIO93/AD3
D/A
LPC
E775AGND
C389
A/D
GPIO24
[7,8,30,31] PLTRST#
0.1u/10V_4
*0.1u/16V_4
0.1u/10V_4
C498
4.7u/6.3V_6
4.7u/6.3V_6
C500
1u/6.3V_4
VDD
C793
44
C436
VCORF
C774
102
C773
AVCC
C435
CLK_PCI_EC
R340
*short_6
C443
C789
19
46
76
88
115
+3VPCU_EC
VCC1
VCC2
VCC3
VCC4
VCC5
2.2_6
2
PBY160808T-250Y-N/3A/25ohm_6
SM Bus 1
Battery, FCH
SM Bus 2
APU
SM Bus 3
GPU
[40] HWPG_VDDR
[41] HWPG_1.2V
[42] HWPG_1.1V_DUAL
[39] SYS_HWPG
D13
RB500V-40
D15
RB500V-40
D14
RB500V-40
D12
RB500V-40
HWPG
E775AGND
3/5VPCU reset switch (CLG)
Placement for EC of VIN power plan

A
VIN
TP77
G1
2
4
SYS_SHDN# [5,16,39,44,47]
TP76
0.1u/25V_4
C837
0.1u/16V_4
D33
*14V/38V/100P_4
C119
0.1u/25V_4
C373
0.1u/25V_4
C619
0.1u/25V_4
C317
SW2
3/5V_SW
3
1
NBSWON#
*SHORT_PAD
PROJECT : ZRI/ZQI
Size
Document Number
Date:
Rev
A1A
NPCE885/FLASH
5
Sheet
1
37
of
50
VA2
VA1
PQ7
AOL1413
CN9
1
2
3
PD1
SBR1045SP5-13
1
5
PC48
0.1u/50V_6
PR57
*Short_4
24737_ACN
PD6
SMAJ20A
2
PC150
0.1u/50V_6
PR43
220K_4
1
2
3
PC148
0.1u/50V_6
Power conn
PQ23
AOL1413
VIN
1
2
3
4
PR37
0.01/F_0612
PC38
0.1u/50V_6
PC37
PR139
2200p/50V_6 33K/F_4
24737_ACP
PC39
2200p/50V_6
PD7
1N4148WS
PR44
220K_4
recommend 200mA at least.
PR56
*Short_4
C-Test
C-Test
D/C#
PR135
10K_4
[37]
PR63
*Short_4
3
PQ9
IMD2AT108
24737_ACP
PQ19
2N7002K
PR102
*Short_6
PC85
0.1u/50V_6
PC88
0.1u/50V_6
24737_ACN
C-Test
PC84
0.1u/50V_6
24737_VCC
PR111
100K_4
PR106
20_1206
20
REGN
16
24737_REGN
C
C-Test
VCC
BTST
C-Test
MBDATA
SDA
+3VPCU
SCL
24737_BM#
PC192
*100p/50V_4
24737_CMPOUT
BAT-V
24737_ILIM
PJ1
PR128
316K/F_4
PR136
100_4
TEMP_MBAT
PR120
*100K_4
+3VPCU
PR138
*0_4
PR118
100_4
1/23 Don't mount

PR138 by Weiting.
(MT)
[7,37]
24737_BM# 2
TEMP_MBAT
VN
CH2
14
3
2
1
BAT-V
4
PC107
0.1u/25V_4
SRP
13
24737_SRP
SRN
12
24737_SRN
R-Test
PR142
*Short_4
PQ18
MDV1528
24737_SRP
PC104
0.1u/25V_4
CMPIN
PR130
7.5_6
For battery reverse
PR141
*Short_4
B
C-Test
PC114
PC185
2200p/50V_6 4.7u/25V_8
24737_SRN
PC179
10u/25V_1206
3/25 PC184 change

to 0805 size by ME.
require (MT)
1/23 Del PR140,PC110

by ME require. (MT)
PC106
0.1u/25V_4
PC98
0.01u/25V_4
[37]
[7,37]
MBDATA
CH1
PGND
24737_DL
ICM
ICM
PQ17
*2N7002K
PU9
IP4223-CZ6
15
PR122
100_4
MBCLK
PR124
100K/F_4
LCDRV
ILIM
PR115
*100K_4
PR147
0.01/F_0612
PL13
6.8uH_7X7X3
CMPOUT
TEMP_MBAT [37]
PR134
1M_4
24707_LX
PR131
10/F_6
GND
GND
GND
GND
GND
BATT_EN#
10
24737_CMPIN 4
19
BM#
IOUT
8
7
6
5
4
3
2
10 1
PHASE
PQ20
MDV1528
21
22
23
24
25
11
50458-00801-V01
PR112
*10K_4
24737_DH
PR117
*Short_4
PR129
10K_4
18
PU7
BQ24737RGRR
PR116
*Short_4
PC115
0.1u/50V_6
HIDRV
ACOK#
3
2
1
MBCLK
PC100
4.7u/25V_8
PC95
47n/50V_6
PQ15
2N7002K
BATT_EN#
PC99
2200p/50V_6
17 24737_BST
ACIN
[36] BATT_EN#
PD4
RB500V-40
PR123
*Short_6
PC94
0.47u/25V_6
[37]
PR110
100K_4
ACDET
24737_ACDET 6
VIN
PC97
1u/16V_6
ACN
+3VPCU
ACP
+3VPCU
PR114
10K/F_4
PR113
63.4K/F_4
CH4
VP
CH3
PC89
100p/50V_4
MBDATA
+3VPCU
MBCLK

PROJECT : ZRI/ZQI
Pin10 ILIM=0.793V
Rsr = 0.01ohm
Add ESD diode base on EC FAE suggestion
REGN MAX voltage 6.5V

V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
=0.793V for 3.965A current limit
Size
Document Number
Date:
Rev
A1A
Charger(BQ24737RGRR)
2
Sheet
1
38
of
50
MAIND
MAIND
SYS_SHDN#
[40,47]
SYS_SHDN#
[5,16,37,44,47]
C-Test
PR105
*Short_6
VL
+3VPCU
3V_LDO
[37] SYS_HWPG
C-Test
PR233
10K/F_4
C-Test
51225_SW1
18
SW1
51225_DL1
15
DRVL1
51225_FB1
GND
21
VO1
GND
22
+15V
3
2
1
PC81
*680p/50V_6
+
PC158
220u/6.3V_6X4.2
PR108
10K/F_4
L(ripple current)
=(9-3.3)*3.3/(2.2u*0.355M*9)
~2.676A
Iocp=9-(2.676/2)=7.66A
Vth=(7.66A*14mOhm)+1mV=108.27mV
R(Ilim)=(108.27mV*8)/10uA
=86.614K
PR100
*Short_6
+5VPCU
+5VPCU
+3VPCU
PR156
*1M_6
PQ13
MDV1528Q
MAIND 4
S5D
PQ11
MDV1528Q
2
A
PQ59
AO3404
3
2
1
PQ14
AO3404
3
2
1
MAIND
2
+5V_S5
PQ29
2N7002K
PC113
*2.2n/50V_4
PQ30
2N7002K
TDC : 1.5A
PEAK : 2A
Width : 60mil
+5V
TDC : 2.5A
PEAK : 3.4A
Width : 100mil
+3V
TDC : 2.35A
PEAK : 3.2A
Width : 100mil
+3V_S5
TDC : 1.5A
PEAK : 2A
Width : 60mil

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
SYSTEM 5V/3V (TPS51225)

Date:
PR104
6.49K/F_4
PR99
*4.7_6
PC72
0.1u/50V_6
3
2
1
GND
GND
PQ52
MDV1595S
23
24
25
PL8
2.2uH_7X7X3
C-Test
PR107
PR101
VIN
PR150
1M_6
3
2
PQ31
2N7002K
0.1u/50V_6
+3VPCU
PR148
22_8
1/F_6
OCP:9A
10/16 change
PC87
0.1u/50V_6
PC170
PC188
0.1u/50V_6
+5V_S5
PR149
22_8
PR151
1M_6
26
CS1
5
51225_CS2
86.6K/F_4
C-Test
GND
51225_FB2
VFB1
GND
51225_DL2
CS2
11
VFB2
DRVL2
PR241
C-Test
+15V_ALWP
PU12
TPS51225RUKR
VCLK
1
2
3
S5D
PQ32
DTC144EU
5
51225_SW2
PR236
*Short_6
PR157
1M_6
+3VPCU
+3VPCU
3.3 Volt +/- 5%
TDC : 5.8A
PEAK : 7.7A
OCP : 9A
Width : 240mil
+3V_S5
4.7u/6.3V_6
SW2
PD3
1PS302
VIN
PC83
VBST1
PC86
0.1u/50V_6
PR254
22_8
S5_ON
0.1u/25V_4
17
+15V
[37,47]
PC93
51225_VBST1
PC82
0.1u/50V_6
PD2
1PS302
L(ripple current)
=(9-5)*5/(2.2u*0.3M*9)
=3.367A
Iocp=10-(3.367/2)=8.32A
Vth=(8.32A*14mOhm)+1mV=117.43mV
R(Ilim)=(117.43mV*8)/10uA
=93.994K
51225_VBST2
1/23 Del PR240,PC171

by ME require. (MT)
OCP:9A
VREG3
51225_DH2
PR103
10K/F_4
51225_VIN
10
VBST2
14
VIN
DRVH2
DRVH1
PC167
0.1u/50V_6
VREG5
EN1
PQ54
MDV1595S
16
19
1/F_6
EN2
SYS_SHDN#
20
51225_CS1
0.1u/50V_6
PR109
15K/F_4
+
PC168
4.7u/25V_8
PQ51
MDV1528
51225_DH1
PR242
51225_VCLK
PC172
PGOOD
97.6K/F_4
51225_EN1
PL10
2.2uH_7X7X3
12
13
4
7
PC166
2200p/50V_6
PQ16
MDV1528
C-Test
PC165
220u/6.3V_6X4.2
PR237
*100K/F_4
+5VPCU
5 Volt +/- 5%
TDC : 6.6A
PEAK : 8.8A
OCP : 10A
Width : 280mil
PR235
*Short_4
1
2
3
+5VPCU
PR234
*Short_4
PC91
2200p/50V_6
10u/6.3V_8
C-Test
PC181
SYS_SHDN#
PC92
4.7u/25V_8
VIN
VIN
Sheet
1
39
of
50
TDC : 0.75A
PEAK : 1A
Width : 40mil
TDC : 0.38A
PEAK : 0.5A
Width : 20mil
+0.75V_DDR_VTT
PC180
10u/6.3V_8
D
PC96
10u/6.3V_8
D
+SMDDR_VREF
Close to IC
Greater than or equal 40mil
PC184
0.22u/10V_4
+5V_S5
S3
51216_S5
16
51216_S3
PR249
*0_4
PC186
51216_S5 0.1u/10V_4
14
VBST
15
51216_DRVH
PR133
2_6
51216_VBST
SW
13
51216_SW
DRVL
11
PGND
10
+1.5VSUS
1.5 Volt +/- 5%
TDC : 11.3A
PEAK : 15A
OCP : 18A
Width : 480mil
VTT
VTTSNS
VTTGND
VTTREF
VLDOIN
DRVH
PC112
4.7u/25V_8
4
PC105
0.1u/50V_6
PC109
2200p/50V_4
PC111
4.7u/25V_8
C-Test
+1.5VSUS
PL12
0.68uH_7X7X3
51216_DRVL
PR137
*4.7_6
4
PQ58
RJK03K5DPA
+
PC108
*680p/50V_6
GND
12
PC175
0.1u/50V_6
PC174
330u/2.5V_6X4.2
C-Test
51216_REFIN
VREF=1.8V
PAD
PAD
23
26
PAD
TRIP
24
18
PAD
51216_TRIP
MODE
REF
PR250
53.6K/F_4
51216_MODE 19
PU10
TPS51216RUKR
25
PR247
200K/F_4
S5
VDDQSNS
*Short_4
PR253
*Short_4
SUSON
[37]
V5IN
1
2
3
17
PQ21
RJK03J6DPA
51216_S3
REFIN
[34,37,41,47] MAINON
C-Test
PC103
1u/10V_4
1
2
3
PGOOD
PAD
PAD
20
C-Test
PR252
PC176
10u/6.3V_8
VIN
[37] HWPG_VDDR
C
PR126
100K/F_4
21
22
+3V
PR246
*Short_6
RDSon=4.3mohm
+1.5VSUS
PR248
10K/F_4
Close to output cap
[39,47]
PC187
0.01u/25V_4
OCP=18A
L ripple current
=(19-1.5)*1.5/(0.68u*400k*19)
=5.079A
Vtrip=18-(5.079/2)*4.3mohm
=0.06647V
Rlimit=0.06647/10uA*8=53.183Kohm
Mode
Frequency
Discharge mode
1
PR251
51K/F_4
200K
400K
Tracking Discharge
100K
300K
Tracking Discharge
S3
S5
S0
S3 (mainon off)
S4/S5
TDC : 0.38A
PEAK : 0.5A
Width : 20mil
+1.5VSUS
REF
VTT
ON
ON
ON
ON
ON
OFF
OFF

PROJECT : ZRI/ZQI
OFF
OFF
Document Number
Rev
A1A
DDR 1.5V(TPS51216)
Date:
PQ60
AO3404
+1.5V
Size
MAIND
Sheet
1
40
of
50
C-Test
VIN
D
+5V_S5
+3V
7
PU1
TRIP TPS51211DSCR SW
51211V_SW
TST
DRVL
51211V_DRVL
GND
11
51211V_TRIP
86.6K/F_4
51211V_TST
464K/F_4
14
13
PR5
7.15K/F_4
FB
GND
GND
GND
12
+
PC1
0.1u/50V_6
3
2
1
51211V_FB
PQ2
MDV1595S
+1.2V
C-Test
PL1
2.2uH_7X7X3
GND
PR2
51211V_VBST
16
PR4
VBST
10
EN
*Short_4
PR3
*100K/F_4
GND
PR159
PR1
PC4
*Short_6 0.1u/50V_6
DRVH
PGOOD
51211V_EN
15
VDDA_PWRGD
3
2
1
[37] HWPG_1.2V
51211V_DRVH
PC117
4.7u/25V_8
PQ1
MDV1528
C-Test
V5IN
C-Test
PC3
2200p/50V_6
PC119
1u/10V_4
PR160
100K/F_4
PC2
330u/2V_7343
PR6
10K/F_4
OCP=8.5A
L ripple current
=(19-1.2)*1.05/(2.2u*290k*19)
=1.762A
Vtrip=8.5-(1.762/2)*14mohm
=0.10666V
Rlimit=0.10666/10uA*8=85.322Kohm
+1.2V
1.2 Volt +/- 5%
TDC : 5.25A
PEAK : 7A
OCP : 8.5A
Width : 220mil
MAINON
PR11
+5VPCU
+3V
PU2
G9661-25ADJF12U
4 VPP PGOOD 1
*Short_4
+3VPCU
VEN
3
8
9
VIN
GND
GND
PR10
100K_4
ADJ
[34,37,40,47]
PC5
1u/16V_6
VO
NC
VDDA_PWRGD
R1
0.8V
PC6
10u/6.3V_8
PC8
0.1u/50V_6
PC9
*0.1u/50V_6
VDDA_PWRGD
[43]
+2.5V
PR7
73.2K/F_4
C-Test
PR9
100K_4
R2
+2.5V
2.5 Volt +/- 5%
TDC : 0.6A
PEAK : 0.75A
Width : 40mil
PC7
10u/6.3V_8
PR8
34K/F_4
Vout =0.8(1+R1/R2)
=2.5V

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
+1.2V(TPS51211)/+2.5V
Date:
5
Sheet
1
41
of
50
C-Test
VIN
+5V_S5
+3V
DUAL_SW
TST
DRVL
DUAL_DRVL
12
GND
GND
11
PC74
0.1u/50V_6
C-Test
5
FB
PR85
*4.7_6
PR87
5.76K/F_4
+
PC80
0.1u/50V_6
DUAL_FB
+5V_S5
PR256
10K/F_4
PR81
10K/F_4
+15V
+1.1V
PR255
22_8
PR244
1M_4
+1.1V
TDC : 2.8A
PEAK : 3.8A
Width : 120mil
3
2
1
2
PC169
*0.1u/10V_4
PQ57
2N7002K
PQ56
2N7002K
1
PQ55
2N7002K
PR238
*0_4
PQ53
MDV1528Q
3
2
+3V
+1.1V_EN
[37]
C-Test
[3,5,7,8,9,10,11,12,13,25,26,27,30,31,32,33,35,36,37,39,40,41,43,44,45,46,47]
+1.1DUAL
1.1 Volt +/- 5%
TDC : 3.75A
PEAK : 5A
OCP : 6A
Width : 150mil
+1.1V_DUAL
4
PR239
*Short_4
PC164
330u/2.5V_6X4.2
OCP=6A
L ripple current
=(19-1.1)*1.1/(2.2u*290k*19)
=1.624A
Vtrip=6-(1.624/2)*14mohm
=0.0726V
Rlimit=0.0726/10uA*8=58.103Kohm
PC73
*680p/50V_6
3
2
1
PQ49
MDV1595S
+1.1V_DUAL
PL9
2.2uH_7X7X3
C
GND
GND
16
13
GND
PR74
GND
PR97
*100K/F_4
VBST
PU6
TRIP TPS51211DSCR SW
EN
DUAL_TRIP
60.4K/F_4
DUAL_TST
464K/F_4
*Short_4
PR94
DUAL_VBST
15
PR98
9
10
PC154
4.7u/25V_8
PQ50
MDV1528
C-Test
PR93
*Short_6
DRVH
PGOOD
DUAL_EN
14
[37] +1.1V_DUAL_EN
C
DUAL_DRVH
3
2
1
[37] HWPG_1.1V_DUAL
V5IN
C-Test
PC156
2200p/50V_6
PC71
1u/10V_4
PR92
*100K/F_4
+1.1V
PC183
*2200p/50V_4

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
+1.1V_DUAL(TPS51211)
Date:
5
Sheet
1
42
of
50
+VDDNB_CORE
PC138
330p/50V_4
PR52
10_4
C-Test
Load line setting

PR48
2.2/F_6
+5V_S5
1
2
PC62
4.7u/25V_8
PC147
2200p/50V_4
1
2
1
2
PC66
4.7u/25V_8
2
DCR=1.1mOhm
+VDDNB_CORE
OCP
1
2
3
PQ48
AON6752
PC50
0.1u/10V_4
+
PC47
10u/6.3V_8
PC51
0.1u/10V_4
LGATE_NB
VSUMG-
5
PR198
2.61K/F_4
39
32
UGATE_NB
PR190
*Short_4
VR_HOT_L
BOOT_NB
31
BOOT_NB
PC60
330u/2V_7343
PHASE2
28
PHASE_2
ENABLE
LGATE2
27
LGATE_2
PR32
*Short_4 62771_PWROK
PWROK
LGATE1
24
LGATE_1
NTC_NB
PHASE1
23
PHASE_1
NTC
UGATE1
22
UGATE_1
LGATE_2
EP
41
ISEN2
ISEN1
13
12
ISUMP
14
PR24
10K/F_4
VSUM-
PR178
1/F_4
+VDDNB_CORE
PR33
2.2/F_6
PC25
0.22u/25V_6
ISEN1
1
2
3
4
PQ37
AON6414AL
PHASE_1
Load line setting
PR30
590/F_4
[5] APU_VDD_RUN_FB_H
PR21
2.2_6
3
5
LGATE_1
Close with
phase1 inductor
1
2
3
PR169
10K_6_NTC
PQ38
AON6752
VSUM-
OCP
C-Test
[5] APU_VDD_RUN_FB_L
PC131
0.1u/10V_4
RC time
constant
PR17
*Short_4
PL2
0.36uH
1
PR174
2.61K/F_4
PR177
11K/F_4
PR29
2.37K/F_4
PC128
0.1u/10V_4
PC129
0.22u/10V_4
PR23
499/F_4
PR15
10_4
PR14
*Short_4
+VDD_CORE
VIN
BOOT_1
VSUM+ PR176
3.65K/F_6
ISEN1
PR171
10K/F_4
VSUM-
PR175
1/F_4
+
PC143
*330u/2V_7343
PC141
*330u/2V_7343
DCR=1.1mOhm
+VDD_CORE
+
PC16
10u/6.3V_8
VSUM-
PC130
0.22u/25V_6
PR180
2K/F_4
PC136
330p/50V_4
ISEN1
C-Test
PC19
0.22u/25V_6
VSUM+
+VDD_CORE
3.65K/F_6
ISEN2
PR28
267K/F_4
PC15
100p/50V_4
PC133
2200p/50V_4
2
PR25
ISEN2
+VDD_CORE
TDC : 37.5A
PEAK : 50A
OCP : 62A
Width : 2000mil
Load Line = 2.1mV/A
PC27
330u/2V_7343
PR179
*10K/F_4
UGATE_1
PC134
680p/50V_4
VSUM+
+VDD_CORE
PC122
2200p/50V_4
ISUMN
15
VSEN
RTN
17
16
Add 9 GND VIAs

for thermal pad
DCR=1.1mOhm
PC20
0.1u/10V_4
PC17
150p/50V_4
BOOT_1
PQ41
AON6752
PC126
47u/25V_6X4.5
4
1
2
3
PC23
47p/50V_4
PR182
*0_4
21
ISUMN
62771_COMP
62771_RTN
19
62771_FB
Place NTC close to the

VDDCORE Hot-Spot.
BOOT1
IMON
62771_VSEN
10
IMON_NB
FB
PC137
0.1u/10V_4
PR184
133K/F_4
PR194
133K/F_4
PC140
0.1u/10V_4
IMON
COMP
IMON_NB
18
27.4K/F_4
PR13
PR12
9.76K/F_4
PR168
470K_4_NTC
27.4K/F_4
PR71
PR69
9.76K/F_4
11
PR35
2.2_6
3
NTC_NB
NTC
Place NTC close to the

VDDNB Hot-Spot.
PL4
0.36uH
1
PC21
1000p/50V_6
62771_EN
PQ42
AON6414AL
PHASE_2
C-Test
PC24
10u/6.3V_8
*Short_4 62771_EN
PC32
0.1u/10V_4
PR185
PC144
4.7u/25V_8
PC35
0.22u/25V_6
UGATE_2
PU3
ISL62771HRZ-T
VIN
BOOT_2
PC124
4.7u/25V_8
SVT
UGATE_2
BOOT_2
29
*Short_4 62771_SVT
30
PR26
BOOT2
UGATE2
VDDIO
SVD
PC12
1000p/50V_6
*Short_4 62771_VDDIO
*Short_4 62771_SVD
PR186
PR31
C-Test
PR40
2.2/F_6
PC36
4.7u/25V_8
40
ISUMP_NB
ISUMN_NB
VDDP
PHASE_NB
UGATE_NB
[5] APU_PWRGD_SVID_REG
VDD
33
SVC
1/F_4
PC123
4.7u/25V_8
[41] VDDA_PWRGD
38
PHASE_NB
PR200
PC132
0.1u/50V_6
APU_SVT
VSEN_NB
PGOOD
*Short_4 62771_SVC
VSUMG-
PC10
0.1u/50V_6
[5]
LGATE_NB
3.65K/F_6
+1.5V
34
PR199
1
2
3
APU_SVD
20
LGATE_NB
VSUMG+
[5]
+
PC11
330u/2V_7343
PC14
330u/2V_7343
PR22
*10K/F_4
PR16
10_4
Parallel
PC146
4.7u/25V_8
PL7
0.36uH
1
[5] CORE_PWM_PROCHOT#
PGOOD_NB
37
36
VRM_PWRGD
APU_SVC
PR208
470K_4_NTC
PQ44
AON6414AL
PHASE_NB
PR41
634/F_4
PR27
[11] VRM_PWRGD
[5]
35
FB_NB
COMP_NB
C-Test
PR34
10K/F_4
PR47
*Short_4
PC149
47u/25V_6X4.5
+3V
PR188
1K_4
PR189
*100K/F_4
+
2
1
2
3
PR207
10K_6_NTC
PR196
11K/F_4
PC45
47n/16V_4
PC41
0.15u/10V_4
PR38
*Short_6
PC53
PR55
1000p/50V_6 2.2_6
3
62771_COMP_NB
+1.5V
UGATE_NB
PC31
62771_FB_NB
62771_VDDP
62771_VSEN_NB
PC42
47p/50V_4
26
PR49
267K/F_4
VSUMG+
1u/10V_4
PR36
1/F_6
PC49
150p/50V_4
1u/10V_4
PR197
2K/F_4
PC26
PC139
680p/50V_4
VIN
BOOT_NB
PC46
0.22u/25V_6
C-Test
62771_VDD
PR193
*0_4
PR51
499/F_4
25
PC52
100p/50V_4
Close with
PHASE_NB inductor
RC time
constant
PC57
0.1u/50V_6
PR58
3.01K/F_4
ISUMN_NB
PR61
*Short_4
Close to the
CPU side.
C-Test
[5] APU_VDDNB_RUN_FB_H
ISEN2
PC135
0.01u/16V_4
Close to the
CPU side.

PROJECT : ZRI/ZQI
Size
Document Number
Rev
VDD / VDDNB CORE (ISL62771)

Date:
5
Sheet

1
43
of
A1A
50
+3V_GFX
Default 0.85V
H_VID0
PR209
*EV@10K/F_4
PR216
*EV@10K/F_4
PR219
EV@10K/F_4
PR224
*EV@10K/F_4
PR226
EV@10K/F_4
H_VID1
H_VID2
H_VID3
C-Test
H_VID4
PR67
EV@2.2/F_6
26
DRVH1
21
51728_DRVH1
VID2
VBST1
22
51728_VBST1
H_VID3
17
VID3
LL1
23
51728_LL1
H_VID4
16
VID4
DRVL1
24
51728_DRVL1
H_VID5
15
VID5
CSP1
51728_CSP1
14
VID6
CSN1
51728_CSN1
PGND
25
PR218
*EV@0_4
PR221
*Short_4
PR220
51728_SLEW 37
EV@316K/F_4
SLEW
THRM
OSRSEL
32 51728_OSRSEL
PR72
*Short_4
PwPd
IMON
41
11
GFB
V5FILT
VFB
+VGPU_CORE
31 51728_TRIPSEL
PU
THRM=0.75V/60uA=12.5K
TRIPSEL
PC153
EV@0.22u/25V_6
51728_DRVH1
1
38 51728_V5FILT
PC157
EV@2.2u/10V_6
PR204
*EV@10K/F_4
PQ46
EV@AON6414AL
51728_LL1
51728_DRVL1
PQ47
EV@AON6752
51728_CSP1
PR183
EV@100_4
51728_IMON
PR228
51728_VFB
[19] GPUVSS_SENSE
51728_GFB
Parallel
*Short_6
PC162
*EV@0.1u/25V_4
Close to the
VR side.
PR232
*Short_4
PC43
[19] GPUVDDC_SENSE
PR91
PC75
EV@16.5K/F_4 EV@3300p/50V_4
PR181
EV@100_4
PC161
*EV@0.1u/25V_4
EV@0.015u/16V_4
PR229
*Short_4
A
PC58
EV@2200p/50V_4
PC55
EV@4.7u/25V_8
4
PR195
EV@86.6K/F_4
PC69
EV@2200p/50V_4
PR225
*EV@0_4
PR202
PR95
EV@100K/F_4_3540NTC
EV@4.02K/F_4
51728_TONSEL
36 51728_TONSEL
VREF
PR211
*EV@0_4
VIN
51728_VBST1
TONSEL
PL6
EV@0.24uH_7X7X3
2
1/31 Delet PC151 for

SMT open issue
DCR=1.1mOhm
+VGPU_CORE
+
PC40
EV@10u/6.3V_8
PC163
EV@0.22u/10V_6
DROOP
PR68
EV@2.2/F_6
PC68
EV@4.7u/25V_8
+3V
51728_V5FILT
C-Test
PR205
*Short_4
PC18
EV@0.1u/10V_4
PC76
PR86
EV@1200p/50V_4 EV@8.2K/F_4
51728_VREF 40
+3V
PR42
39
PU5
EV@TPS51728RHAR
51728_DROOP
EV@68p/50V_4
PR187
EV@100K/F_4_3540NTC
PC64
EV@4.7u/25V_8
PC77
VID1
18
3
EV@24.9K/F_4
4
*Short_4
*Short_4
19
H_VID2
PR50
PR80
H_VID1
51728_CSN2
PC160
*EV@0.1u/25V_4
PC70
EV@1000p/50V_6
*Short_4
[16] PWRCNTRL5
51728_CSN2
VID0
+
PC127
PC33
EV@330u/2.5V_6X4.2
EV@330u/2V_7343
+VGPU_CORE
Countinue current:30A
Peak current:40.5A
OCP minimum 50A
Loadline=0mV/A
PR45
EV@86.6K/F_4
*Short_4
PR84
THAL
20
PR231
EV@29.4K/F_4
PR82
[16] PWRCNTRL0
CSN2
10
H_VID0
Close to the
VR side.
PC63
EV@0.1u/50V_6
[16] PWRCNTRL1
51728_CSP2
PR75
EV@2.2_6
*Short_4
PR78
51728_DRVL2
CSP2
1
2
3
*Short_4
[16] PWRCNTRL2
27
EN
PR70
*Short_4
PR76
SLP
35
*EV@0_4
PR73
[16] PWRCNTRL3
DRVL2
12
THAL_GPU_VR
[16] PWRCNTRL4
28
PCNT
PC28
EV@330u/2V_7343
51728_CSP2
PC159
*EV@0.1u/25V_4
1
2
3
51728_EN
LL2
51728_LL2
*EV@0_4
EV@100K/F_4
*Short_4
51728_VBST2
TPAD1
TPAD2
TPAD3
TPAD4
TPAD5
TPAD6
TPAD7
TPAD8
TPAD9
TPAD10
TPAD11
TPAD12
TPAD13
TPAD14
TPAD15
TPAD16
PR83
51728_DRVH2
29
GND
PR217
Check EN level
30
VBST2
PR206
51728_PCNT 13
DRVH2
PR230
EV@29.4K/F_4
PG
PC142
PGD
EV@0.015u/16V_4
33
34
*EV@0_4
EV@2.2K_4
PR212
*EV@100K/F_4
PR227
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
PR88
V5IN
[16] GPU_DPRSLPVR
PC29
EV@10u/6.3V_8
PQ43
EV@AON6752
+VGPU_CORE
+
PC22
EV@0.1u/10V_4
1
2
3
PC155
EV@2.2u/10V_6
[8] PE_PWRGD
*Short_4
51728_CSN1
Close to the
GPU side.
PC78
EV@1n/50V_4
PL3
EV@0.24uH_7X7X3
DCR=1.1mOhm
2
PR191
51728_DRVL2
PC44
PR46
EV@1000p/50V_6 EV@2.2_6
EV@24.9K/F_4
1
2
3
PQ45
EV@AON6414AL
51728_LL2
+5V_S5
PR192
4
PR203
*EV@10K/F_4
PC56
EV@4.7u/25V_8
PC67
EV@0.1u/50V_6
EV@10K/F_4
PC152
EV@0.22u/25V_6
PR213
PR214
PR215
EV@100K/F_4
PR89
PR223
EV@200_4
PR96
PR222
EV@10K/F_4
EV@100K/F_4
[5,16,37,39,47]
PR77
SYS_SHDN#
PR79
2
1
VIN
51728_VBST2
51728_DRVH2
PQ12
*EV@PDTC143TT
THAL_GPU_VR
EV@10K/F_4
+3V
PR90
*EV@100K_4
EV@10K/F_4
+3V
EV@10K/F_4
*EV@10K/F_4
PR210
*EV@10K/F_4
H_VID5
PR201
EV@100K/F_4_3540NTC
PC79
EV@1n/50V_4
PROJECT : ZRI/ZQI
Size
Document Number
Date:
Rev
A1A
+VGPU CORE(TPS51728)
5
Sheet
1
44
of
50
C-Test
VIN
+5V_S5
+3V
7
EN
PU4
TRIP EV@TPS51211DSCR
SW
TST
12
GND
0.95V_VBST
0.95V_SW
DRVL
0.95V_DRVL
GND
11
C-Test
PL5
EV@2.2uH_7X7X3
FB
PR39
*EV@4.7_6
+0.95V
0.95 Volt +/- 5%
TDC : 3.2A
PEAK : 4.3A
OCP : 5.2A
Width : 130mil
PR54
EV@3.57K/F_4
+
GND
GND
GND
16
13
10
8
+PCIE_VDDC_GFX
PC59
EV@0.1u/50V_6
0.95V_TRIP
EV@51K/F_4
0.95V_TST
EV@464K/F_4
PR64
*Short_6
3
2
1
VBST
0.95V_EN
GND
PR53
DRVH
15
PR66
0.95V_DRVH
PGOOD
14
PC61
PC65
EV@2200p/50V_6 EV@4.7u/25V_8
PQ10
EV@MDV1528
V5IN
HWPG_PCIE
TP37
PR62
*Short_4
PR60
*EV@100K/F_4
PC54
EV@1u/10V_4
PR65
*EV@100K/F_4
PC30
EV@0.1u/50V_6
0.95V_FB
3
2
1
VFB=0.7V
PQ8
EV@MDV1595S
PC34
*EV@680p/50V_6
PC145
EV@330u/2.5V_6X4.2
PR59
EV@10K/F_4
OCP=5.2A
L ripple current
=(19-0.95)*0.95/(2.2u*290k*19)
=1.415A
Vtrip=5.2-(1.415/2)*14mohm
=0.06289V
Rlimit=0.06289/10uA*8=50.318Kohm

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
+1.05V(TPS51211)
Date:
5
Sheet
1
45
of
50
+3VPCU
C-Test
+3V
PC90
EV@0.1u/25V_6
PU8
PR121
EV@100K/F_4
16
VIN
VIN
2
HWPG_+1.8GFX
TP47
PR243
*Short_4
PC182
EV@1000p/50V_4
PR245
EV@10K/F_4
PR132
EV@121K/F_4
PH
11
PH
12
14
PWRGD
BOOT
13
15
EN
VIN
VSNS
COMP
GND
RT/CLK
GND
SS
AGND
PL11
EV@1uH_7X7X3
PC101
EV@0.1u/50V_6
R1
C-Test
PR125
EV@100K/F_4
PC189
PC191
PC190
EV@10u/6.3V_8
EV@0.1u/10V_4
EV@10u/6.3V_8
1.8V_VSNS
R2
V0=0.8*(R1+R2)/R2
PC178
PC177
EV@1200p/50V_4
*EV@100p/50V_4
+1.8V_GFX
C-Test
PR127
*Short_6
22
21
20
19
18
17
EV@TPS54318RTER
PH 10
PAD
PAD
PAD
PAD
PAD
PAD
PC173
EV@10u/6.3V_8
PR119
EV@78.7K/F_4
+1.8V_GFX
1.8 Volt +/- 5%
TDC : 0.8A
PEAK : 1.1A
Width : 40mil
PC102
EV@0.01u/25V_4
1/23 PQ5 change

to 2N7002 by
Weiting require.
1/23 PC13 no
use by Weiting
require.
3
2
1
2
PQ6
EV@2N7002K
PQ40
EV@2N7002K
PQ39
EV@2N7002K
PX_MODE_D 2
+1.5V_GFX
PQ4
EV@AO3404
+3V_GFX
PC125
*EV@2.2n/50V_4
+3V
PQ3
EV@MDV1595S
3
PR19
EV@1M_4
2
PQ5
EV@2N7002K
PC13
*EV@1u/10V_4
PR173
EV@1M_4
PX_MODE_D
DGPU_PWREN
PR172
EV@22_8
PR170
EV@22_8
+1.5VSUS
+15V
PR20
EV@1M_4
+3V_GFX
+1.5V_GFX
VIN
TDC : 0.02A
PEAK : 0.025A
Width : 10mil
TDC : 3A
PEAK : 4A
Width : 120mil
1/23 Del PR18, function

same with PR217.
(MT)

PROJECT : ZRI/ZQI
Size
Document Number
Rev
A1A
GPU_POWER/+1.8V_GPU
Date:
5
Sheet
1
46
of
50
VIN
+3V
+0.75V_DDR_VTT
+5V
+1.5V
+15V
VIN
PR154
1M_4
PR155
22_8
PR146
22_8
PR143
*22_8
PR145
22_8
PR152
1M_4
[39,40]
MAIND
PQ26
2N7002K
PQ22
*2N7002K
PQ25
2N7002K
PC116
*2200p/50V_4
PQ27
2N7002K
2
PQ28
2N7002K
PR153
1M_4
PQ24
DTC144EUA
PR144
*100K/F_6
PR167
1M_6
MAINON
[34,37,40,41] MAINON
Thermal protection
MAIND
MAINON_G
PD5
DA2J10100L
PQ35
AO3409
[37,39]
S5_ON 2
S5_ON
PR161
*Short_6
PQ36
DTC144EUA
VL
VL
SYS_SHDN# [5,16,37,39,44]
PR162
200K_6
2.469V
PQ33
2N7002K
PC121
0.1u/50V_6
PR164
200K/F_4
PQ34
2N7002K
PU11A
BA10393F
4
S5_ON
PC120
0.1u/50V_6
PR165
10K_6_NTC
PR163
200K/F_4
PR166
887/F_4
7
PU11B
BA10393F

PROJECT : ZRI/ZQI
For EC control thermal protection (output 3.3V)

Size
Document Number
Rev
A1A
Discharge/Thermal
Date:
5
Sheet
1
47
of
50
45
ZRP Power On Sequence: S5 > S0

+3V_RTC
VIN
+5VPCU/+3VPCU/+15V
ACIN
D
AC not present equal to LOW; AC present equal to High
S5_ON active by pull up 10k to +3VPCU
APU Power on sequence required:
EC FW download
Llano APU:
1.Group A ( +1.5VSUS, +2.5V_VDDA ) ramp before Group B
( +VDD_CORE, +VDDNB_CORE, +1.2V_VDDPR )
EC SPI signals
Power button from switch to EC
NBSWON#
HUDSON-M3:
1.+3V_S5 ramp before +1.1V_DUAL
2.+3V ramp before +1.1V
3.+3V_S5,+3V ramping down time > 300us
4.100uS <= +3V_S5,+3V <= 40mS
5.100uS <= All power rails except +3V_S5,+3V <= 40mS
S5_ON
+3V_S5/+5V_S5
+1.1V_DUAL_EN
+1.1V_DUAL
+1.1V_DUAL_PG
RSMRST#
20ms delay at least
50ms Max
RTCLK
>16ms Min
Power button from EC to FCH
DNBSWON#
C
SUSC
SUSON
+1.5VSUS
APU GROUP A power
+0.75V_DDR_VTT only will be shut down in S3 mode and for DDR3 SODIMM only
+0.75V_DDR_VTT
HWPG_1.5V
SUSB
MAINON
+5V/+3V
+2.5V/+1.5V
+1.1V
VDDA_PWRGD
APU GROUP B power
Controlled by +3.3V
+VDDNB_CORE
+VDD_CORE
+1.2V
VRM_PWRGD
HWPG_1.2V
98ms < T <150ms
FCH_PWRGD
50ms Max
APU_CLKP/N
38ms Max
APU_PWRGD
101ms < T <113ms
A_RST#(PLTRST#)
PCIRST#
APU_RST#
75ns < T <100ns

1ms < T <2.3ms

PROJECT :ZRI/ZQI
Size
Document Number
Date:
Rev
A1A
POWER SEQUENCE
5
Sheet
48
of
50
MDV1528Q
P.35
+5VPCU +-5%
AC/DC Insert enable
(Peak:8.3A, TDC:6.25A)
48
+5V_S5 +-5%
S5_ON enable
(Peak:3A, TDC:2.25A)
OCP: 10 A
MDV1528Q
P.35
+5V +-5%
MAIND enable
(Peak:5.4A, TDC:4A)
RT8223P
P.35
MDV1528Q
P.35
(Peak:0.85A, TDC:0.64A)
+3VPCU +-5%
AC/DC Insert enable
Power Tree Table
+3V_S5 +-5%
S5_ON enable
MDV1528Q
P.35
OCP: 6.8A
+3V +-5%
MAIND enable
(Peak:2.7A, TDC:02A)
MDV1528Q
P.35
+3V_GFX
DGPU_PWREN
(Peak:0.06A, TDC:0.005A)
System Charger
AC
MDV1528Q
P.35
BQ24707A
+2.5V
MAINON enable
DC
(On LAN board)

MDV1528Q
P.35
+1.8V_GFX +-5%
DGPU_PWREN
+0.75V_DDR_VTT
SUSON enable
(Peak:1A, TDC:0.75A)
TPS51216RUKR
AO3404
P.36
+SMDDR_VREF
SUSON enable
P.36
+1.5VSUS +-5%
SUSON enable
(Peak:14.6A, TDC:11A)
MDV1528Q
P.41
TPS51211DSCR
P.38
+1.1V_DUAL
+1.1V_DUAL_EN enable
(Peak:0.5A, TDC:0.375A)
+PCIE_VDDC_GFX (+1V/+-5%)
DGPU_PWREN enable
OCP:18A
MDV1528Q
P.41
TPS51211DSCR
P.37
+1.5V
MAIND enable
MDV1528Q
P.37
OCP:6.2A
+1.5V_GFX
DGPU_PWREN enable
+1.1V
+1.1V_EN enable
B
(Peak:4A, TDC:3A)
+1.2V +-5%
VDDA_PWRGD enable
OCP:9A
+VDD_CORE
VRM_PWRGD enable
(Peak:35A, TDC:26A)
OCP:44A
ISL62771HRZ-T
+VDDNB_CORE
VRM_PWRGD enable
P.39
(Peak:33A, TDC:25A)
TPS51728RHAR
P.40
TPS51211DSCR
P.42
OCP:42A
+VGPU_CORE
DGPU_PWREN enable
(Peak:24A, TDC:18A)
OCP:28A
+VDDCI_GFX (+1V/+-5%)
DGPU_PWREN enable
(Peak:8A, TDC:6A)

PROJECT : ZRI/ZQI
OCP:9A
Size
Document Number
Date:
Rev
A1A
Power Tree
5
Sheet
1
49
of
50
www.s-manuals.com

Quanta Zri, Zqi Ra1a Schematics PDF

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Quanta Zri, Zqi Ra1a Schematics PDF

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5

ZRI/ZQI Block Diagram

Channel A(1600 MHZ)

FP2 827pin BGA

VRAM DDR3-128MB*8 = 1GB

Card Reader Conn.

Quanta Computer Inc.

Wednesday, April 24, 2013

LVDS Panel Sku

eDP Panel Sku

VGA Thames Sku

VGA Mars Sku

VGA Sku for Thames and Mars stuff

GPU 128bit Sku

GPU 128bit Sku of Special part

USB Charge Functions Sku

No USB Charge Functions Sku

USB3.0 Re-Driver Sku

No USB3.0 Re-Driver Sku

SMBUS Function Define

Always connect functions Sku

No Always connect functions Sku

Special part value change or modify

Key Board Back light Sku

Touch panel Sku

SMBUS Function Define

Page 9 GPIO strap pin

Synaptics touch pad

ELAN touch pad

For UMA Sku

ELPIDA on board DRAM

HYNIX on board DRAM

EC will Conflict with FCH.

Quanta Computer Inc.

Wednesday, April 24, 2013

FP2 only support PEG X 8

FP2 only support PEG X 8

HDT+ Connector for Debug only

Close by HDT+ Conector

Quanta Computer Inc.

Wednesday, April 24, 2013

Soldermask openings for all bottom side vias/TPs under FS1

Place close to APU within 1"

Quanta Computer Inc.

APU 2/4(DDR3 MEM I/F)

Wednesday, April 24, 2013

Note: CLK_APU_HCLKP/N is 100MHZ SSC

Note: CLK_DP_NSSCP/N is 100MHZ non-SSC

APU Core Power

DISPLAY PORT MISC.

7/8 For Comal.

for normal operation

Quanta Computer Inc.

Wednesday, April 24, 2013

2.3A Up to DDR3-1333 @ 1.5V VDDIO

APU POWER TABLE

VDDR = 3.2A ( Up to DDR3-1333 @ 1.5V )

Across VDDIO and VSS split

DECOUPLING between PROCESSOR and DIMMs

Quanta Computer Inc.

If the VSS plane is cut to create a VDDIO plane,

Wednesday, April 24, 2013

NC,no install by default