DESIGN PROBLEM Design a two stage, low power, high gain and high bandwidth folded cascode operational amplifier with the following specifications: (i) load capacitance 20pF; (ii) open loop gain 80+dB; (iii) power dissipation 1.5mW; (iv) frequency compensation should result in an amplifier with single-pole frequency response and (v) gain-bandwidth-product 70MHz. Analyze the integrated circuit for performance characteristics. DESIGN SUMMARY First, the voltage overdrive and biasing currents are allocated as per the power and output swing specification. Next, device dimension and biasing voltage are computed so as to keep all the transistors in the active region. Once first stage as folded cascode amplifier is designed with nearly zero output common-mode voltage level, the second stage is designed for higher swing. The biasing currents for the first and second stage are 50A and 150A, respectively. The overall low frequency gain comes to 82.5dB and gain-band-width-product is 70.5 MHz. The frequency response of the two stage amplifier after compensation resembles frequency response of single pole system. There are two different frequency compensation schemes used in this design. The design of this integrated circuit and related theory would be submitted for IEEE TCAS-I. The transistor SPICE model selected is TSMC 0.18 m (T77A MM NON EPI) with Ldrawn = 0.36m. DEVICE PARAMETERS Table 3.1 from the book Trade-offs and Optimization in Analog CMOS Design by David M. Binkley is used to compute the gate-oxide capacitance (Cox ) and transconductance factor (Cox ). Appendix B from the book CMOS Analog Circuit Design by Phillip Allen and Douglas Holberg is used to compute Vt and channel length modulation factor (). CIRCUIT DESIGN Documentation of this section is in progress. This would also include the circuit analysis and comparison with other two stage single ended amplifiers.
Figure 2: Frequency Response Before and After Compensation of Two Stage MOS Folded Cascode Amplifier