Analog?

PIC: Analog-to-Digital Converter

Digital!

PIC 16F87x A/D Module

10-bit A/D

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PIC 16F87x A/D Module

48 Channels (40 pins)
45 Channels (28 pins)
4Programmable +Vref, -Vref
4Internal Sample and Hold circuit
4Software selectable internal clock

(Fosc divide by 2, 8, 32 or internal RC

( about 4us.))

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PIC 16F87x A/D Module

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A/D Module - ADCON0 Register

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A/D Module - ADCON1 Register

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A/D Module - Sample and Hold

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A/D Module - Acquisition Time

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A/D Module - Acquisition Requirements

4 For the A/D converter to meet its specified accuracy,

the charge holding capacitor (CHOLD) must be

allowed to fully charge to the input channel voltage
level
4 The maximum recommended impedance for
analog sources is 10 k
As the impedance is decreased, the acquisition time may be
decreased

4 After the analog input channel is selected (changed),

this acquisition must be done before the conversion

can be started.
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A/D Module - Sampling Time

4 The A/D conversion time per bit is defined as TAD
4 The A/D conversion requires a minimum 12TAD per

10-bit conversion

4 software selected TAD:

2TOSC
8TOSC
32TOSC
Internal RC oscillator

4 TAD must be selected to ensure a minimum

TAD time of 1.6 s.

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A/D Module
TAD vs. MAXIMUM DEVICE OPERATING FREQUENCIES

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A/D Module - A/D CONVERSION TAD CYCLES

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A/D Module - Timing

4Total time to acquire data per channel
= Acquisition Time +Conversion time

= 19.72 + 12*1.6 (Assume TAD = 1.6us.)

= 40 us. (approx.)
< 25KHz !

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A/D Module - REGISTERS/BITS ASSOCIATED WITH A/D

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Summary - using A/D Module

1. Configure analog pins/voltage
reference/and digital I/O (ADCON1)
2. Select A/D conversion clock (ADCON0)
3. Turn on A/D module (ADCON0)
4. Configure A/D interrupt (if desired):
Clear ADIF bit
Set ADIE bit
Set GIE bit

5. Select A/D input channel (ADCON0)

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Summary - using A/D Module (Cont.)

6. Wait the required acquisition time
7. Start conversion: Set GO/DONE bit (ADCON0)
8. Wait for A/D conversion to complete, by either:
Polling for the GO/DONE bit to be cleared
OR

Waiting for the A/D interrupt

9. Read A/D Result register pair

(ADRESH:ADRESL), clear bit ADIF if required
10. For next conversion, go to step 5 or step 6 as
required.
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