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A

COMPAL CONFIDENTIAL
1

MODEL NAME : NCL00 NCL10(ATG)


PCB NO : LA-5471P ( DA80000G710)

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DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

MB PCB
Part Number
DA80000G700

Description
PCB 0AY LA-5471P REV0 M/B UMA

Title

Cover Sheet
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
E

of

57

Block Diagram
Compal confidential
Model : NCL00


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Compal Electronics, Inc.


Title

Block Diagram

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Size

Document Number

Rev
1.0

LA-5471P
Date:

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Wednesday, January 20, 2010

Sheet
E

of

57

POWER STATES

USB PORT#
SLP
S3#

SLP
S4#

SLP
S5#

S4
STATE#

SLP
M#

S0 (Full ON) / M0

HIGH

HIGH

HIGH

HIGH

HIGH

S3 (Suspend to RAM) / M1

LOW

HIGH

HIGH

HIGH

S4 (Suspend to DISK) / M1

LOW

LOW

HIGH

S5 (SOFT OFF) / M1

LOW

LOW

S3 (Suspend to RAM) / M-OFF

LOW

S4 (Suspend to DISK) / M-OFF


S5 (SOFT OFF) / M-OFF

Signal
State

ALWAYS
PLANE

M
PLANE

SUS
PLANE

RUN
PLANE

ON

ON

ON

ON

HIGH

ON

ON

ON

LOW

HIGH

ON

ON

LOW

LOW

HIGH

ON

HIGH

HIGH

HIGH

LOW

LOW

LOW

HIGH

LOW

LOW

LOW

LOW

LOW

CLOCKS

JUSB1 (Ext Right Side Top)

ON

JUSB1 (Ext Right Side Bottom)

OFF

OFF

JESA1 (Ext Left Side Top)

OFF

OFF

OFF

JESA1 (Ext Left Side Bottom)

ON

OFF

OFF

OFF

WLAN

ON

OFF

ON

OFF

OFF

WWAN

LOW

ON

OFF

OFF

OFF

OFF

Bluetooth

LOW

ON

OFF

OFF

OFF

OFF

USH->BIO

DOCKING

DOCKING

10

Express card

11

Camera

12

none

13

JMINI3(PCIE/BKT CARD)

PCH

PM TABLE

power
plane

DESTINATION

+15V_ALW

+3.3V_SUS

+5V_RUN

+3.3V_M

+5V_ALW

+1.5V_MEM

+3.3V_RUN

+1.05V_M +1.05V_M

+3.3V_ALW_PCH

+1.8V_RUN

+3.3V_RTC_LDO

+1.5V_RUN

+3.3V_M
(M-OFF)

+0.75V_DDR_VTT

+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN

State

S0

ON

ON

ON

ON

ON

S3

ON

ON

OFF

ON

OFF

Lane 1

MINI CARD-1 WWAN

S5 S4/AC

ON

OFF

OFF

ON

OFF

Lane 2

MINI CARD-2 WLAN

S5 S4/AC don't exist

OFF

OFF

OFF

OFF

OFF

Lane 3

PCMCIA

Lane 4

EXPRESS CARD

Lane 5

MINI CARD-3 PCIE/BKT

Lane 6

10/100/1G LAN

Lane 7

None

Lane 8

None

PCI EXPRESS

DESTINATION

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Index and Config.


Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

of

57

EN_INVPWR

FDC654P
Q17

MODC_EN

HDDC_EN

+BL_PWR_SRC

ADAPTER
GFX_VR_ON

MAX17028
(PU801)

+VCC_GFXCORE

SI3456BDV
(Q32)

SI3456BDV
(Q29)

+5V_HDD

+5V_MOD

+PWR_SRC
BATTERY

ALWON

+15V_ALW
MAX17020
(PU19)

CHARGER

+5V_ALW

RUN_ON

FDS8878
(Q55)

NCP5222
(PU10)

SI3456BDV
(Q47)

+1.8V_RUN +1.05V_RUN_VTT

RUN_ON

AO4430
(Q200)

S1S406
(Q151)

AUX_ON

M_ON

SUS_ON

RUN_ON

SI3456BDV
(Q66)

NTMS4107
(Q61)

+3.3V_ALW_PCH

+3.3V_SUS

+3.3V_LAN

+1.05V_M

+3.3V_M

+3.3V_RUN

REGCTL_PNP10

CPU1.5V_S3_GATE

+0.75V_DDR_VTT

SI3456
(Q2)

Pop option

RUN_ON

+1.5V_MEM

S13456
(Q60)

+5V_RUN

Pop option

+3.3V_WLAN
+VCC_CORE

SI3456BDV
(Q54)

M_ON

CPU_VTT_ON

ISL8014
(PU301)

RUN_ON

0.75V_VR_EN

TPS51100
(PU5)

DDR_ON

VT356
(PU4)

IMVP_VR_ON

MAX17030
(PU20)

PCH_ALW_ON

AUX_EN_WOWL

+3.3V_ALW

+3.3V_M

DCP69
(Q45)

FDS8878
(Q183)

Pop option

+1.05V_M
A

+1.0V_LAN
+1.5V_CPU_VDDQ

+1.05V_RUN

+1.5V_RUN

Pop option

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Power Rail
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

of

57

2.2K

+3.3V_ALW_PCH

2.2K
H14

MEM_SMBCLK

202

C8

MEM_SMBDATA

200

2.2K

+3.3V_LAN

2.2K

G12

C6

LAN_SMBCLK

28

G8

LAN_SMBDATA

31

DIMMB

SMBUS Address [TBD]

XDP1

SMBUS Address [TBD]

SMBUS Address [C8]

LOM

53

SML1_SMBDATA

51

2.2K

+3.3V_ALW_PCH
SML1_SMBCLK

3A

200

E10

A5

SMBUS Address [TBD]

202

PCH
D

DIMMA

2.2K

2.2K

B6

53

2.2K

3A

B4

DOCK_SMB_CLK

A3

DOCK_SMB_DAT

1A

51

+3.3V_ALW
129

2.2K
DOCKING
SMBUS Address [TBD]

2.2K
2.2K

2N7002

14

2N7002

13

G Sensor

+3.3V_RUN

SMBUS Address [TBD]

+LCD_VDD

B5

LCD_SMBCLK

17

A4

LCD_SMDATA

18

1B
1B

2.2K
SMBUS Address [TBD]

127

1A

XDP2

LCD
(JeDP1)

SMBUS Address [TBD]

BATTERY
CONN

SMBUS Address [TBD]

USH

SMBUS Address [TBD]

2.2K

2.2K

KBC

1C

A56

PBAT_SMBCLK

1C

B59

PBAT_SMBDAT

+3.3V_ALW
100 ohm

100 ohm

2.2K

2.2K

+3.3V_ALW

1E

A50

USH_SMBCLK

M9

1E

B53

USH_SMBDAT

L9

2.2K

2.2K

2B

A49

CARD_SMBCLK

2B

B52

CARD_SMBDAT

MEC 5045

+3.3V_ALW
B

7
8

Express card

SMBUS Address [TBD]

2.2K
2.2K

+3.3V_ALW

B50

CHARGER_SMBCLK

10

A47

CHARGER_SMBDAT

1G
1G

Charger

SMBUS Address [TBD]

2.2K
2.2K

+3.3V_RUN

0 ohm

0 ohm

B7

CKG_FFS_SMBDAT

31

A7

CKG_FFS_SMBCLK

32

2D

CLK GEN

SMBUS Address [TBD]

2D

2.2K
2.2K

B49

DAI_GPU_R3P_SMBCLK

B48

DAI_GPU_R3P_SMBDAT

2A
2A

+3.3V_RUN
A/D,D/A
converter

SMBUS Address [TBD]

Compal Electronics, Inc.


Title

SMBUS TOPOLOGY
Size

Document Number

Rev
1.0

LA-5471P
Date:
5

Wednesday, January 20, 2010

Sheet
1

of

57

+3.3V_RUN
+CK_VDD_MAIN

+3.3V_RUN

+CLK_VDD_IO
H_STP_CPU#

L89

+1.05V_RUN

1
R92

2
10K_0402_5%~D

C9
0.1U_0402_16V4Z~D

L2
BLM18AG601SN1D_0603~D

C10
0.1U_0402_16V4Z~D

C7
0.1U_0402_16V4Z~D

1
C6

0.1U_0402_16V4Z~D

C5
0.1U_0402_16V4Z~D

C4
0.1U_0402_16V4Z~D

C3
0.1U_0402_16V4Z~D

C2
10U_0805_10V4Z~D

C8
10U_0805_10V4Z~D

1
2
BLM18AG601SN1D_0603~D

CLKREF
1
@C1707
@C1707
10P_0402_50V8J~D

EMI

+CLK_VDD_IO CAN BE CHANGE FROM 1.05V TO 3V

+CK_VDD_MAIN
+CLK_VDD_IO
U1

1
5
C

15
18

VDDSRC_IO
VDDCPU_IO

17
24
29

VDDSRC_3.3
VDDCPU_3.3
VDDREF_3.3

31

<40> CKG_FFS_SMBDAT
<40> CKG_FFS_SMBCLK

H_STP_CPU#

VDD_DOT
VDD_27

SCL

16

CPU_STOP#

23

CPU_0#

22

CPU_1

20

BUF_BCLK

CPU_1#

19

BUF_BCLK#

SRC_1/SATA

10

BUF_CKSSCD

SRC_1/SATA#

11

BUF_CKSSCD#

SRC_2

13

BUF_DMI

SRC_2#

14

BUF_DMI#

DOT_96

DOT96

DOT_96#

DOT96#

SDA

32

CPU_0

1
R11
1
R13

CLK_BUF_BCLK
2
0_0402_5%~D
CLK_BUF_BCLK#
2
0_0402_5%~D

1
R1181
1
R1180

CLK_BUF_CKSSCD
2
0_0402_5%~D
CLK_BUF_CKSSCD#
2
0_0402_5%~D

1
R49
1
R52

CLK_BUF_DMI
2
0_0402_5%~D
CLK_BUF_DMI#
2
0_0402_5%~D

1
R37
1
R38

CLK_BUF_DOT96
2
0_0402_5%~D
CLK_BUF_DOT96#
2
0_0402_5%~D

CLK_BUF_BCLK <16>
CLK_BUF_BCLK# <16>
CLK_BUF_CKSSCD <16>
CLK_BUF_CKSSCD# <16>
CLK_BUF_DMI <16>
CLK_BUF_DMI# <16>

CLK_BUF_DOT96 <16>
CLK_BUF_DOT96# <16>

2
R17

2 0_0402_5%~D

CLK_XTAL_IN

28

XTAL_IN

CLK_XTAL_OUT

27

XTAL_OUT

27MHz_SS

VSS_DOT
VSS_27
VSS_SATA
VSS_SRC
VSS_CPU
VSS_REF
EP

2
8
9
12
21
26
33

<16> CLK_PCH_14M

CLK_PCH_14M

R33

CLKREF
2
33_0402_5%~D

30

R132
1K_0402_5%~D
2

C17
27P_0402_50V8J~D
2
1

27MHz

REF_0/CPU_SEL

CLK_PWRGD
2
100_0402_5%~D

1
R369
1

2
1
C16
27P_0402_50V8J~D

CKPWRGD/PD#

D
Q136
SSM3K7002FU_SC70-3~D

2
G

<49,52> CLK_EN#

25

+3.3V_RUN
CLK_PWRGD
X1
14.31MHZ_16PF_X5H01431AFG1HX~D

SLG8SP585VTR_QFN32_5X5~D
change PN to Spectra Linear SL28748ELCT SA00002Y33L

+3.3V_RUN

+1.05V_RUN

REF_O/CPU_SEL
CPU1

1(0.7~1.5v)

100MHz

100MHz

0 (DEFULT)

133MHz

133MHz

R23
10K_0402_5%~D

A
3

CPU0

PIN 30

@ R372
0_0402_5%~D
1
2

CLKREF

@ U23
@U23
NC7SZ04P5X_NL_SC70-5~D

NC

@ C1392
0.1U_0402_16V4Z~D

1
@ R41
@R41
4.7K_0402_5%~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Clock Generator
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

of

57

JCPUI

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

A24
C23
B22
A21

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

B24
D23
B23
A22

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

<17>
<17>
<17>
<17>

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

<17>
<17>
<17>
<17>

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

D24
G24
F23
H23

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

<17>
<17>
<17>
<17>

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

D25
F24
E23
G23

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

E22
D21
D19
D18
G21
E19
F21
G18

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

<17>
<17>
<17>
<17>
<17>
<17>
<17>
<17>

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

D22
C21
D20
C18
G22
E20
F20
G19

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]

FDI_FSYNC0
FDI_FSYNC1

F17
E17

FDI_FSYNC[0]
FDI_FSYNC[1]

FDI_INT

C17

FDI_INT

FDI_LSYNC0
FDI_LSYNC1

F18
D17

FDI_LSYNC[0]
FDI_LSYNC[1]

<17> FDI_FSYNC0
<17> FDI_FSYNC1
<17> FDI_INT
<17> FDI_LSYNC0
<17> FDI_LSYNC1

Intel(R) FDI

<17>
<17>
<17>
<17>
<17>
<17>
<17>
<17>

DMI

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

PCI EXPRESS -- GRAPHICS

<17>
<17>
<17>
<17>

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS

B26
A26
B27
A25

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

PEG_IRCOMP_R R1084

2 49.9_0402_1%~D

EXP_RBIAS
R1129 1
trace width 20mil

2 750_0402_1%~D

K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9

EDP_CPU_AUX# <24>

EDP_HPD# <24>
EDP_CPU_AUX <24>

EDP_CPU_LANE_N1 <24>
EDP_CPU_LANE_N0 <24>

EDP_CPU_LANE_P1 <24>
EDP_CPU_LANE_P0 <24>

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

VSS
C

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

NCTF

JCPUA

AT35
AT1
AR34
B34
B2
B1
A35

REV1.0
TYCO_CALPELLA_AUBURNDALE

REV1.0
TYCO_CALPELLA_AUBURNDALE

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Arrandale (1/6)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

of

57

1.5V_PWRGD <42>

+1.05V_RUN_VTT

+1.05V_RUN_VTT

+1.05V_RUN_VTT
+3.3V_ALW

+3.3V_ALW2

1
R1505
10K_0402_5%~D

2
0.1U_0402_16V4Z~D

3
E

1.8K_0402_5%~D

Q205
PMST3904_SOT323-3~D

2
B

5
P

Place near JXDP1

4
1

XDP_OBS6
XDP_OBS7

@ R6
@R6
1K_0402_5%~D
H_CPUPWRGD 1
H_CPUPWRGD_XDP
2
CFD_PWRBTN#_XDP
1
2
<15,17> SIO_PWRBTN#_R
@R68
@
R68
0_0402_5%~D
H_PWRGD_XDP 1
PWRGD_XDP_R
2
@R19
@
R19
0_0402_5%~D
@R1551
@
R1551
0_0402_5%~D
1
2 MEM_SMBDATA_XDP
<13,14,15,16,28> MEM_SMBDATA
1
2 MEM_SMBCLK_XDP
<13,14,15,16,28> MEM_SMBCLK
@R1552
@
R1552
0_0402_5%~D
XDP_TCLK

1
2

R880
750_0402_1%~D

Keep R1132, R1133, R1136-R119


for slew rate control.

JCPUB

H_COMP1

G16

COMP1

H_COMP0

AT26

COMP0

AH24

<40> CPU_DETECT#

<19>

H_PECI

AK14

CATERR#

H_PECI

AT15

PECI

H_PROCHOT#

<49> H_PROCHOT#

H_THERMTRIP#_R

AN26

AK15

PROCHOT#

THERMTRIP#

2 PM_DRAM_PWRGD_R
0_0402_5%~D

<48> H_VTTPWRGD

AK13

SM_DRAMPWROK

H_VTTPWRGD

AM15

VTTPWRGOOD

H_PWRGD_XDP

AM26

TAPPWRGOOD

AL14

RSTIN#

PCH_PLTRST#_R
2
1.5K_0402_1%~D

1
R1144

VCCPWRGOOD_0

E16
D16

CPU_DMI
CPU_DMI#

R1136 1
R1137 1

2 0_0402_5%~D
2 0_0402_5%~D

DPLL_REF_SSCLK
DPLL_REF_SSCLK#

A18
A17

CPU_DPLL
CPU_DPLL#

R1138 1
R1139 1

2 0_0402_5%~D
2 0_0402_5%~D

SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]

F6

DDR3_DRAMRST#_CPU

AL1
AM1
AN1

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

AN15
AP15

PM_EXTTS#

<10>
<10>

CFG4
CFG5

<10>
<10>

CFG6
CFG7

<10>
<10>

@ R7
1K_0402_5%~D
1 H_CPURST#

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS

R60

1 1K_0402_5%~D

@R64
@
R64

1 51_0402_1%~D

XDP_TDI_R @
@R65
R65

+1.05V_RUN_VTT

1
@R1469
@
R1469
DDR3_DRAMRST#_CPU

PRDY#
PREQ#

AT28
AP27

XDP_PRDY#
XDP_PREQ#

TCK
TMS
TRST#

AN28
AP28
AT27

XDP_TCLK
XDP_TMS
XDP_TRST#

TDI
TDO
TDI_M
TDO_M

AT29
AR27
AR29
AP29

XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

DBR#

AN25

XDP_DBRESET#_R
1
@R1241
@
R1241

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R
XDP_OBS4_R
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R

2
2
2
2
2
2
2
2

2
0_0402_5%~D

DDR3_DRAMRST# <13,14>

Q199

1 51_0402_1%~D

XDP_PREQ# @
@R1149
R1149 2

1 51_0402_1%~D

XDP_TDO

1 51_0402_1%~D

@R3
@
R3

BSS138_SOT23~D
DDR_HVREF_RST_GATE <40>

R1525
100K_0402_5%~D

XDP_TCLK

1
51_0402_1%~D

@R67
@
R67

C1890
0.1U_0402_10V7K~D
B

@ R780
@R780
@R781
@
R781
@R782
@
R782
@R783
@
R783
@R784
@
R784
@R785
@
R785
@R22
@
R22
@R24
@
R24

0_0402_5%~D

1
1
1
1
1
1
1
1

0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D

XDP_DBRESET# <15,17>
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7

JTAG MAPPING
XDP_TDI_R

1
@ R1153

XDP_TDO_M

1
@R1154
@
R1154

XDP_TDI
2
0_0402_5%~D

XDP_TRST#

2
@ R66

1
51_0402_1%~D

XDP_TDO
2
0_0402_5%~D

For ESD concern, please put near CPU


@ R1157
@R1157
0_0402_5%~D

XDP_TDI_M

XDP_TDO_R

Scan Chain

Stuff -> R1153,R1156,R1157

(Default)

No stuff -> R1154,R1155

CPU Only
1
@R1155
@
R1155

1
@ R1156

Stuff -> R1153,R1154

2
0_0402_5%~D

No stuff -> R1154,R1155,R1157


PCH Only

2
0_0402_5%~D

Stuff -> R1155,R1156

No stuff -> R1153,R1154,R1157


PM_EXTTS#

<23>

@R1145
@
R1145
12.4K_0402_1%~D

DELL CONFIDENTIAL/PROPRIETARY

R1142
130_0402_1%~D
2
1

R1141
24.9_0402_1%~D
2
1

R1140
100_0402_1%~D
2
1

1
2

1
2

1
2

R1095
49.9_0402_1%~D

R1094
49.9_0402_1%~D

R1093
20_0402_1%~D

R1235
20_0402_1%~D

CFG10
CFG11

XDP_RST#_R 2
XDP_DBRESET#

XDP_DBRESET#

Compal Electronics, Inc.


PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Arrandale (2/6)
Size

Document Number

Rev
1.0

LA-5471P
Date:

<10>
<10>

CLK_CPU_ITP
CLK_CPU_ITP#

XDP_TMS

+1.05V_RUN_VTT

SM_RCOMP2
SM_RCOMP1
SM_RCOMP0

H_COMP0
H_COMP1
H_COMP2
H_COMP3

CFG6
CFG7

CFG2
CFG3

+3.3V_RUN
H_THERMTRIP#
2
56_0402_5%~D
H_CATERR#
2
49.9_0402_1%~D
H_PROCHOT#
2
68_0402_1%~D
H_CPURST#_R
2
68_0402_1%~D

1
R1285
1
R1232
1
R1233
1
@ R1234

CLK_CPU_DPLL <16>
CLK_CPU_DPLL# <16>

R25
10K_0402_5%~D

CFG4
CFG5

<10>
<10>

TYCO_CALPELLA_AUBURNDALE

R1143
750_0402_1%~D

Refer to CRB 1.51

CFG10
CFG11

CFG0
CFG1

+1.05V_RUN_VTT

REV1.0

<18,32,34,36,39,40> PCH_PLTRST#_EC

AN27

VCCPWRGOOD_1

CLK_CPU_DMI <16>
CLK_CPU_DMI# <16>

PEG_CLK
PEG_CLK#

CFG2
CFG3

<10>
<10>

1
R878

<17> PM_DRAM_PWRGD

AN14

PM_SYNC

CLK_CPU_BCLK <19>
CLK_CPU_BCLK# <19>

CLK_CPU_ITP
CLK_CPU_ITP#

JTAG & BPM

2 VCCPWRGOOD_0_R
0_0402_5%~D

1
R1087

<19> H_CPUPWRGD

AL15

RESET_OBS#

2 0_0402_5%~D
2 0_0402_5%~D

H_PM_SYNC
<17> H_PM_SYNC
1
2
@R12
@
R12
0_0402_5%~D
1
2 VCCPWRGOOD_1_R
R1290
0_0402_5%~D

AP26

R1132 1
R1133 1

AR30
AT30

CFG0
CFG1

CFG8
CFG9

2 H_CPURST#_R
0_0402_5%~D

PWR MANAGEMENT

<39,49,52> IMVP_PWRGD

H_CPURST# 1
R1088

CPU_BCLK
CPU_BCLK#

BCLK_ITP
BCLK_ITP#

place R1286 near CPU


<49> H_CPURST#

A16
B16

1
2
R1286
0_0402_5%~D

<23> H_THERMTRIP#

H_CATERR#

THERMAL

<39> H_CATERR#

SKTOCC#

BCLK
BCLK#

COMP2

CFG8
CFG9

SAMTE_BSH-030-01-L-D-A

AT24

CLOCKS

COMP3

H_COMP2

DDR3
MISC

AT23

MISC

H_COMP3

XDP_OBS4
XDP_OBS5

R879
1.5K_0402_1%~D

C1880
0.22U_0402_10V6K~D

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17

1.5V_CPU_VDDQ_PWRGD_R

IN2

XDP_OBS2
XDP_OBS3

GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16

IN1

+1.5V_CPU_VDDQ
@R9
@
R9
1.1K_0402_1%~D
1
2 PM_DRAM_PWRGD_R

1
Q207
BSS138_SOT23~D

R1507

1.5V_CPU_VDDQ_PWRGD

1.5V_CPU_VDDQ_PWRGD# 2
G

R1504
1K_0402_5%~D

U141
74AHC1G08GW_SOT353-5~D

1.5V_PWRGD

XDP_OBS0
XDP_OBS1

R1503
100K_0402_5%~D

+1.5V_CPU_VDDQ

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

XDP_PREQ#
XDP_PRDY#

@JXDP1
@
JXDP1

@ C20
0.1U_0402_16V4Z~D

C1879

@ C19
0.1U_0402_16V4Z~D

+3.3V_ALW2

Wednesday, January 20, 2010

Sheet
1

of

57

JCPUC

JCPUD

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

<13> DDR_A_BS0
<13> DDR_A_BS1
<13> DDR_A_BS2

<13> DDR_A_CAS#
<13> DDR_A_RAS#
<13> DDR_A_WE#

A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

AC3
AB2
U7

SA_BS[0]
SA_BS[1]
SA_BS[2]

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#

AE1
AB3
AE9

SA_CAS#
SA_RAS#
SA_WE#

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

AA6
AA7
P7

M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

Y6
Y5
P6

M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA

SA_CS#[0]
SA_CS#[1]

AE2
AE8

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#

SA_ODT[0]
SA_ODT[1]

AD8
AF9

M_ODT0
M_ODT1

M_CLK_DDR0 <13>
M_CLK_DDR#0 <13>
DDR_CKE0_DIMMA <13>

M_CLK_DDR1 <13>
M_CLK_DDR#1 <13>
DDR_CKE1_DIMMA <13>

DDR_CS0_DIMMA# <13>
DDR_CS1_DIMMA# <13>

M_ODT0
M_ODT1

<13>
<13>

DDR_A_DM[0..7]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

B9
D7
H7
M7
AG6
AM7
AN10
AN13

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

C9
F8
J9
N9
AH7
AK9
AP11
AT13

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

C8
F9
H9
M9
AH8
AK10
AN11
AR13

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

<14> DDR_B_D[0..63]

<13>

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

DDR_A_MA[0..15]

<13>

<13>

<13>

<14> DDR_B_BS0
<14> DDR_B_BS1
<14> DDR_B_BS2
<14> DDR_B_CAS#
<14> DDR_B_RAS#
<14> DDR_B_WE#

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

AB1
W5
R7

SB_BS[0]
SB_BS[1]
SB_BS[2]

DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#

AC5
Y7
AC6

SB_CAS#
SB_RAS#
SB_WE#

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

W8
W9
M3

M_CLK_DDR2
M_CLK_DDR#2
DDR_CKE2_DIMMB

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

V7
V6
M2

M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB

SB_CS#[0]
SB_CS#[1]

AB8
AD6

DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

SB_ODT[0]
SB_ODT[1]

AC7
AD1

M_ODT2
M_ODT3

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

D4
E1
H3
K1
AH1
AL2
AR4
AT8

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

M_CLK_DDR2 <14>
M_CLK_DDR#2 <14>
DDR_CKE2_DIMMB <14>

M_CLK_DDR3 <14>
M_CLK_DDR#3 <14>
DDR_CKE3_DIMMB <14>

DDR_CS2_DIMMB# <14>
DDR_CS3_DIMMB# <14>

M_ODT2
M_ODT3

<14>
<14>
DDR_B_DM[0..7]

<14>

DDR SYSTEM MEMORY - B

<13> DDR_A_D[0..63]

DDR SYSTEM MEMORY A

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

D5
F4
J4
L4
AH2
AL4
AR5
AR8

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

C5
E3
H4
M5
AG2
AL5
AP5
AR7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

DDR_B_DQS#[0..7]

<14>

DDR_B_DQS[0..7]

<14>

DDR_B_MA[0..15] <14>
B

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

REV1.0
TYCO_CALPELLA_AUBURNDALE

REV1.0
TYCO_CALPELLA_AUBURNDALE

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Arrandale (3/6)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

of

57

JCPUE

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18

@ R831
0_0402_5%~D
2
1

@ R830
0_0402_5%~D
2
1

H_RSVD17
H_RSVD18

AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16

B19
A19

RSVD15
RSVD16

A20
B20

RSVD17
RSVD18

U9
T9

RSVD19
RSVD20

AC9
AB9

RSVD21
RSVD22

C1
A3

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

RSVD_NCTF_23
RSVD_NCTF_24

J29
J28

RSVD26
RSVD27

A34
A33

RSVD_NCTF_28
RSVD_NCTF_29

C35
B35

RSVD_NCTF_30
RSVD_NCTF_31

@T188
@
T188

PAD~D

@T189
@
T189

PAD~D

AL26
AR2

RSVD38
RSVD39

AJ26
AJ27

@R1107
@
R1107
3.01K_0402_1%~D

RSVD_NCTF_40
RSVD_NCTF_41

AP1
AT2

RSVD_NCTF_42
RSVD_NCTF_43

AT3
AR1

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65

E15
F15
A2
D15
C15
AJ15
AH15

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

VSS

CFG0
1

RSVD36
RSVD_NCTF_37

@T190
@
T190

PAD~D

PCI-Express Configuration Select

CFG0

1 : Single PEG
0 : Bifurcation enable

CFG3
C

@ R1108
3.01K_0402_1%~D

PCI-Express Static Lane Reversal

CFG3

1 : Normal Operation
0 : Lane Number Reversed
15->0, 14->1 ...

CFG4
1

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D

AH25
AK26

R1109
3.3K_0402_1%~D

AP34

<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
@T18
@
T18
@T19
@
T19
@T20
@
T20
@T21
@
T21
@T22
@
T22
@T23
@
T23
@T24
@
T24

DIMM0_VREF_R
DIMM1_VREF_R

RSVD34
RSVD35

PAD~D
PAD~D

@T184PAD~D
@
T184PAD~D
@ T185PAD~D
@T185PAD~D

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF
SB_DIMM_VREF
RSVD11
RSVD12
RSVD13
RSVD14

@ T186
@T186
@T187
@
T187

AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30

RESERVED

Populate R84,R85 for Intel DDR3


VREFDQ multiple methods M3

AJ13
AJ12

RSVD32
RSVD33

REV1.0
TYCO_CALPELLA_AUBURNDALE

Display Port Presence

CFG4

1 : Disabled; No Physical Display Port


attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Arrandale (4/6)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

10

of

57

JCPUF

+VCC_CORE
+VCC_CORE

1
C29
22U_0805_6.3VAM~D

C30
22U_0805_6.3VAM~D

1
C31
22U_0805_6.3VAM~D

1
C34
22U_0805_6.3VAM~D

C35
22U_0805_6.3VAM~D

1
C37
22U_0805_6.3VAM~D

1
C44
10U_0805_4VAM~D

1
C45
10U_0805_4VAM~D

1
C50
10U_0805_4VAM~D

1
C46
10U_0805_4VAM~D

1
C51
10U_0805_4VAM~D

1
C52
10U_0805_4VAM~D

1
C56
10U_0805_4VAM~D

1
C47
10U_0805_4VAM~D

1
@ C53
10U_0805_4VAM~D

1
C57
10U_0805_4VAM~D

1
C48
10U_0805_4VAM~D

C59
10U_0805_4VAM~D

1
@ C54
10U_0805_4VAM~D

C49
10U_0805_4VAM~D

1
C55
10U_0805_4VAM~D

C58
10U_0805_4VAM~D

+VCC_CORE

1
+ @C60
270U_D_2VM_R4.5M~D
2 3

+
2 3

C61
270U_D_2VM_R4.5M~D

+
2 3

1
C62
270U_D_2VM_R4.5M~D

1
C63
270U_D_2VM_R4.5M~D

2 3

+
2 3

C64
270U_D_2VM_R4.5M~D

C1197
C1198
10U_0805_4VAM~D 10U_0805_4VAM~D
2

C1199
10U_0805_4VAM~D
D

1
C1200
10U_0805_4VAM~D

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

PSI#

AN33

H_PSI#

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

VID0
VID1
VID2
VID3
VID4
VID5
VID6
H_DPRSLPVR_R

H_PSI#

<49>

VID0
VID1
VID2
VID3
VID4
VID5
VID6
1
R1115

<49>
<49>
<49>
<49>
<49>
<49>
<49>

C1083
22U_0805_6.3V6M~D

1
C1204
10U_0805_4VAM~D

+1.05V_RUN_VTT

CPU CORE SUPPLY

1
C1196
10U_0805_4VAM~D
2

C1082
22U_0805_6.3V6M~D

+VCC_CORE

C1103
22U_0805_6.3V6M~D

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

C1085
22U_0805_6.3V6M~D

C36
22U_0805_6.3VAM~D

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

C1087
22U_0805_6.3V6M~D

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

2
0_0402_5%~D

H_DPRSLPVR <49>

VTT_SELECT = low, 1.1V


VTT_SELECT

G15

VTT_SELECT = high, 1.05V


+VCC_CORE
1

AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

ISENSE

AN35

IMVP_IMON

VCC_SENSE
VSS_SENSE

AJ34
AJ35

VCCSENSE
VSSSENSE

B15
A15

VTT_SENSE

VTT_SENSE
VSS_SENSE_VTT

IMVP_IMON

R1116
100_0402_1%~D

<23,49>

Place R1116 and R1236 near CPU

C28
22U_0805_6.3VAM~D

VCCSENSE
VSSSENSE
1

C27
22U_0805_6.3VAM~D

+1.05V_RUN_VTT

18A

VTT_SENSE

<48>

<49>
<49>

Route VCCSENSE and VSSSENSE trace at


27.4 ohms, 7 mils spacing

R1236
100_0402_1%~D
2

C26
22U_0805_6.3VAM~D

48AAG35

1.1V RAIL POWER

C25
22U_0805_6.3VAM~D

CPU VIDS

C24
22U_0805_6.3VAM~D

POWER

SENSE LINES

REV1.0

DELL CONFIDENTIAL/PROPRIETARY

TYCO_CALPELLA_AUBURNDALE

Compal Electronics, Inc.


PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Arrandale (5/6)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

11

of

57

+VCC_GFXCORE

SENSE
LINES

VCC_AXG_SENSE <52>
VSS_AXG_SENSE <52>

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

AM22
AP22
AN22
AP23
AM23
AP24
AN24

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6

GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON

AR25
AT25
AM24

GFX_VR_ON_R
R1120
GFX_DPRSLPVR_R 1
GFX_IMON
R1119

JCPUH

1.1V

VCCPLL1
VCCPLL2
VCCPLL3

L26
L27
M26

600mA

C1165
330U_D2_2VM_R6M~D

+1.05V_RUN_VTT

C1117
22U_0805_6.3V6M~D

+1.8V_RUN
1

C65
4.7U_0603_6.3V6M~D

C67
2.2U_0603_6.3V6K~D

TYCO_CALPELLA_AUBURNDALE

C1116
1U_0402_6.3V6K~D

REV1.0

+1.05V_RUN_VTT

C1115
1U_0402_6.3V6K~D

1.8V

J22
J20
J18
H21
H20
H19

C1112
22U_0805_6.3V6M~D

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

C1111
22U_0805_6.3V6M~D

VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58

PEG & DMI

K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25

C1100
1U_0402_6.3V6K~D

C1099
1U_0402_6.3V6K~D

C1098
1U_0402_6.3V6K~D

C1108
10U_0805_4VAM~D

P10
N10
L10
K10

+1.5V_CPU_VDDQ

C1102
22U_0805_6.3V6M~D

VTT0_59
VTT0_60
VTT0_61
VTT0_62

<52>

<52>

3A

+1.05V_RUN_VTT

2 0_0402_5%~D
GFX_VR_ON
2
GFX_DPRSLPVR <52>
0_0402_5%~D

C1097
1U_0402_6.3V6K~D

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

C1107
10U_0805_4VAM~D

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35

<52>
<52>
<52>
<52>
<52>
<52>
<52>

GFX_IMON

C1101
22U_0805_6.3V6M~D

VTT1_45
VTT1_46
VTT1_47

FDI

J24
J23
H25

VCC_AXG_SENSE
VSS_AXG_SENSE

C1096
1U_0402_6.3V6K~D

AR22
AT22

- 1.5V RAILS

GRAPHICS

+1.05V_RUN_VTT

VAXG_SENSE
VSSAXG_SENSE

DDR3

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

GRAPHICS VIDs

AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16

POWER

C1095
10U_0805_4VAM~D

C1094
10U_0805_4VAM~D

C1093
22U_0805_6.3V6M~D

C1092
22U_0805_6.3V6M~D

C1091
22U_0805_6.3V6M~D

C1090
22U_0805_6.3V6M~D

C1089
22U_0805_6.3V6M~D

C1088
22U_0805_6.3V6M~D

@
2

JCPUG

22A
1

+1.5V_CPU_VDDQ Source

R1497
100K_0402_5%~D

R1499
100K_0402_5%~D

RUN_ON_CPU1.5VS3

C1881

1 0.1U_0402_10V7K~D

C1882

1 0.1U_0402_10V7K~D

C1883

1 0.1U_0402_10V7K~D

C1884

1 0.1U_0402_10V7K~D

+1.5V_CPU_VDDQ

@ R1498
20K_0402_5%~D

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

VSS

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

REV1.0

Q200
AO4728L 1N_SOIC-8~D
8
1
7
2
6
3
5

+15V_ALW
1

+3.3V_ALW2

C1875
10U_0805_10V4Z~D

+1.5V_MEM

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

TYCO_CALPELLA_AUBURNDALE
@ PJP906

RUN_ON_CPU1.5VS3#

Q201B
DMN66D0LDW-7_SOT363-6~D
4

+1.5V_CPU_VDDQ
1

1
@R1500
@
R1500

1
R1501

<40> CPU1.5V_S3_GATE

PAD-OPEN 4x4m

Q201A
DMN66D0LDW-7_SOT363-6~D

2
2
0_0402_5%~D
1

<34,39,42,47> RUN_ON

+1.5V_MEM

@ PJP907

PAD-OPEN 4x4m

C1878
4700P_0402_25V7K~D

RUN_ON_CPU1.5VS3#

2
0_0402_5%~D

<42>

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
GFX_VR_ON

1
R358

2
470_0402_5%~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Arrarndale (6/6)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

12

of

57

+V_DDR_REF

+1.5V_MEM

2
0_0402_5%~D

R87

<9> DDR_A_DQS#[0..7]

DDR_A_D0
DDR_A_D1
1

DDR_A_DM0
C1120

<9> DDR_A_MA[0..15]

C1119

<9> DDR_A_DQS[0..7]

0.1U_0402_16V4Z~D

Populate R87 for Intel DDR3


VREFDQ multiple methods M1

2.2U_0603_6.3V6K~D

<9> DDR_A_DM[0..7]

DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

Layout Note:
Place near JDIMMA

Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket

DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2

+1.5V_MEM

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

C1124

0.1U_0402_16V4Z~D

C1123

0.1U_0402_16V4Z~D

C1122

C1121

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

DDR_A_DM3

DDR_A_D26
DDR_A_D27

<9> DDR_A_BS2

C1125
330U_SX_2VY~D

C1131

10U_0603_6.3V6M~D
C1130

10U_0603_6.3V6M~D
C1129

10U_0603_6.3V6M~D
C1128

10U_0603_6.3V6M~D
C1127

10U_0603_6.3V6M~D
C1126

10U_0603_6.3V6M~D

<9> M_CLK_DDR0
<9> M_CLK_DDR#0
<9> DDR_A_BS0
<9> DDR_A_WE#
<9> DDR_A_CAS#

Layout Note:
Place near JDIMMA.203,204

<9> DDR_CS1_DIMMA#

C1142
2.2U_0603_6.3V6K~D

C1141

0.1U_0402_16V4Z~D

+3.3V_RUN

205

GND1

CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

GND2

206

DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0

+1.5V_MEM

DDR_A_D6
DDR_A_D7

DDR3_DRAMRST# 2
R1509

1
1K_0402_5%~D

DDR_A_D12
DDR_A_D13

DDR_A_DM1
DDR3_DRAMRST#

DDR3_DRAMRST# <8,14>

DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31

DDR_CKE1_DIMMA

DDR_CKE1_DIMMA <9>

DDR_A_MA15
DDR_A_MA14
C

DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1

M_CLK_DDR1 <9>
M_CLK_DDR#1 <9>

DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1

DDR_A_BS1 <9>
DDR_A_RAS# <9>
DDR_CS0_DIMMA# <9>
M_ODT0
<9>
M_ODT1

<9>
+V_DDR_REF

DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45

C1133

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

C1132

1
C1138

10U_0603_6.3V6M~D

C1137
1U_0402_6.3V6K~D

C1136
1U_0402_6.3V6K~D

C1135
1U_0402_6.3V6K~D

C1134
1U_0402_6.3V6K~D

CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT

VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS

0.1U_0402_16V4Z~D

73
75
77
DDR_A_BS2
79
81
DDR_A_MA12
83
DDR_A_MA9
85
87
DDR_A_MA8
89
DDR_A_MA5
91
93
DDR_A_MA3
95
DDR_A_MA1
97
99
M_CLK_DDR0
101
M_CLK_DDR#0
103
105
DDR_A_MA10
107
DDR_A_BS0
109
111
DDR_A_WE#
113
DDR_A_CAS#
115
117
DDR_A_MA13
119
DDR_CS1_DIMMA#
121
123
125
127
DDR_A_D32
129
DDR_A_D33
131
133
DDR_A_DQS#4
135
DDR_A_DQS4
137
139
DDR_A_D34
141
DDR_A_D35
143
145
DDR_A_D40
147
DDR_A_D41
149
151
DDR_A_DM5
153
155
DDR_A_D42
157
DDR_A_D43
159
161
DDR_A_D48
163
DDR_A_D49
165
167
DDR_A_DQS#6
169
DDR_A_DQS6
171
173
DDR_A_D50
175
DDR_A_D51
177
179
DDR_A_D56
181
DDR_A_D57
183
185
DDR_A_DM7
187
189
DDR_A_D58
191
DDR_A_D59
193
195
1
2
197
R1182 10K_0402_5%~D199
1
2
201
R1183 10K_0402_5%~D203
+0.75V_DDR_VTT

VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS

2.2U_0603_6.3V6K~D

+0.75V_DDR_VTT

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

DDR_CKE0_DIMMA

<9> DDR_CKE0_DIMMA
+1.5V_MEM

+1.5V_MEM
JDIMMA

DIMM0_VREF

<9> DDR_A_D[0..63]

DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
MEM_SMBDATA
MEM_SMBCLK

MEM_SMBDATA <8,14,15,16,28>
MEM_SMBCLK <8,14,15,16,28>

+0.75V_DDR_VTT

FOX_AS0A626-U4SN-7F

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

DDRIII-SODIMM SLOT1
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

13

of

57

+V_DDR_REF

+1.5V_MEM

2
0_0402_5%~D

R88

<9> DDR_B_DQS[0..7]

DDR_B_D0
DDR_B_D1
1

DDR_B_DM0
C1144

<9> DDR_B_DM[0..7]

0.1U_0402_16V4Z~D

<9> DDR_B_D[0..63]

1
C1143

2.2U_0603_6.3V6K~D

Populate R88 for Intel DDR3


VREFDQ multiple methods M1

+1.5V_MEM
JDIMMB

DIMM1_VREF

<9> DDR_B_DQS#[0..7]

DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9

<9> DDR_B_MA[0..15]

DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11

Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket

DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19

Layout Note:
Place near JDIMMB

DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT

VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR_B_DM1
DDR3_DRAMRST#

DDR3_DRAMRST# <8,13>

DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31

+1.5V_MEM
DDR_CKE2_DIMMB

<9> DDR_CKE2_DIMMB

DDR_B_BS2

<9> DDR_B_BS2
C1148

0.1U_0402_16V4Z~D

C1147

0.1U_0402_16V4Z~D

C1146

C1145

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2

<9> M_CLK_DDR2
<9> M_CLK_DDR#2

+1.5V_MEM

DDR_B_MA10
DDR_B_BS0

<9> DDR_B_BS0

+
2

DDR_B_MA13
DDR_CS3_DIMMB#

<9> DDR_CS3_DIMMB#

DDR_B_D40
DDR_B_D41

Layout Note:
Place near JDIMMB.203,204

DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6

+0.75V_DDR_VTT

DDR_B_D50
DDR_B_D51

C1161
1U_0402_6.3V6K~D

C1160
1U_0402_6.3V6K~D

C1159
1U_0402_6.3V6K~D

C1158
1U_0402_6.3V6K~D

DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
+3.3V_RUN
+3.3V_RUN

C1163

C1162

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D

R1185
10K_0402_5%~D

R1184
10K_0402_5%~D

+0.75V_DDR_VTT

205

GND1

GND2

206

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#

M_CLK_DDR3 <9>
M_CLK_DDR#3 <9>
DDR_B_BS1 <9>
DDR_B_RAS# <9>

DDR_CS2_DIMMB#
DDR_CS2_DIMMB# <9>
M_ODT2
M_ODT2
<9>
M_ODT3

M_ODT3

<9>
+V_DDR_REF

DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45

C1157

DDR_B_D34
DDR_B_D35

DDR_CKE3_DIMMB <9>

DDR_B_MA15
DDR_B_MA14

C1156

DDR_B_DQS#4
DDR_B_DQS4

DDR_CKE3_DIMMB

0.1U_0402_16V4Z~D

DDR_B_D32
DDR_B_D33

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

2.2U_0603_6.3V6K~D

C1149
330U_SX_2VY~D

1
1

C1155

10U_0603_6.3V6M~D
C1154

10U_0603_6.3V6M~D
C1153

10U_0603_6.3V6M~D
C1152

10U_0603_6.3V6M~D
C1151

10U_0603_6.3V6M~D
C1150

10U_0603_6.3V6M~D

DDR_B_WE#
DDR_B_CAS#

<9> DDR_B_WE#
<9> DDR_B_CAS#

CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT

DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
MEM_SMBDATA
MEM_SMBCLK

MEM_SMBDATA <8,13,15,16,28>
MEM_SMBCLK <8,13,15,16,28>

+0.75V_DDR_VTT

FOX_AS0A626-U8SN-7F

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

DDRIII-SODIMM SLOT2
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

14

of

57

CMOS setting

ME_CLR1 TPM setting


Open

Keep ME RTC Registers

@R62
@
R62
10K_0402_5%~D

+RTC_CELL

PCH_AZ_SYNC

@R120
@
R120
100K_0402_5%~D

PCH_INTVRMEN

On Die PLL VR is supplied by


1.5V when sampled high, 1.8 V
when sampled low

R224
2

R225
1

R236
33_0402_5%~D
1
2

2
<37> PCH_AZ_MDC_BITCLK

@
ME1
1
C298

1
R238

<37> PCH_AZ_MDC_SYNC

@
CMOS1 SHORT PADS~D
1
2
C299
1U_0402_6.3V6K~D

SHORT PADS~D
2
1U_0402_6.3V6K~D

<29>

1
R240

1
R242

<37> PCH_AZ_MDC_SDOUT
+3.3V_ALW_PCH
<39>

SPI_WP#_SEL
1
@ R1246

D29

C30

/CS

VCC

DO

/HOLD

3
4

/WP

HDA_SDIN0

PCH_AZ_MDC_SDIN1

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

USB_MCARD3_DET#

M3

JTAG_TCK

1 200_0402_5%~D

PCH_JTAG_TMS

K3

JTAG_TMS

R805 2

1 200_0402_5%~D

PCH_JTAG_TDI

K1

JTAG_TDI

J2

JTAG_TDO

PCH_JTAG_TDO

1
200_0402_5%~D

J4

GND

PCH_SPI_CLK

DIO

PCH_SPI_DO

C34

LPC_LFRAME#

LDRQ0#
LDRQ1# / GPIO23

A34
F34

LPC_LDRQ0#
LPC_LDRQ1#

SERIRQ

AB9

IRQ_SERIRQ

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

C1205
1
2

VCC

/HOLD

CLK

PCH_SPI_CLK

DIO

PCH_SPI_DO

TDI

/CS

TMS

R1238
3.3K_0402_5%~D

U13
1

PCH_SPI_DIN
SPI_WP#_SEL 1
@R1060
@
R1060

0.1U_0402_16V4Z~D

32Mb Flash ROM

PCH_SPI_CS1#

TDO

2
0_0402_5%~D

DO

/WP

GND

TCK
TRST#

W25Q32BVSSIG_SO8~D

Ref.

LPC_LDRQ0#
LPC_LDRQ1#

<39>
<39>

IRQ_SERIRQ

<31,32,39,40>

XDP_FN14
XDP_FN15
+3.3V_ALW_PCH

PLTRST1#_XDP
XDP_DBRESET#

XDP_DBRESET# <8,17>

PCH_JTAG_TDO
PCH_JTAG_RST#_R 1
PCH_JTAG_TDI
@ R117
PCH_JTAG_TMS

2PCH_JTAG_RST#
0_0402_5%~D

ES1

2
1K_0402_5%~D

PSATA_PRX_DTX_N0_C
PSATA_PRX_DTX_P0_C
PSATA_PTX_DRX_N0_C
PSATA_PTX_DRX_P0_C

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AH6
AH5
AH9
AH8

SATA_ODD_PRX_DTX_N1_C
SATA_ODD_PRX_DTX_P1_C
SATA_ODD_PTX_DRX_N1_C
SATA_ODD_PTX_DRX_P1_C

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AF11
AF9
AF7
AF6

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

AH3
AH1
AF3
AF1

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AD9
AD8
AD6
AD5

ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C
ESATA_PTX_DRX_N4_C
ESATA_PTX_DRX_P4_C

<37>
<37>
<37>
<37>

E-SATA

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AD3
AD1
AB3
AB1

SATA_PRX_DKTX_N5_C
SATA_PRX_DKTX_P5_C
SATA_PTX_DKRX_N5_C
SATA_PTX_DKRX_P5_C

<38>
<38>
<38>
<38>

DOCKED

TRST#

SATAICOMPO

AF16

SATAICOMPI

AF15

PLTRST_XDP# <18>

+3.3V_RUN

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

<28>
<28>
<28>
<28>

2
R265

1
10K_0402_5%~D

HDD

<28>
<28>
<28>
<28>

ODD

+1.05V_RUN
SATA_COMP

1
R1201

2
37.4_0402_1%~D
+3.3V_RUN

BA2

SPI_CLK

PCH_SPI_CS0#

AV3

SPI_CS0#

PCH_SPI_CS1#

AY3

SPI_CS1#

SATALED#

T3

SATA_ACT#_R

AY1

SPI_MOSI

SATA0GP / GPIO21

Y9

HDD_DET#_R

SATA1GP / GPIO19

V1

GPIO19

2 PCH_SPI_DIN_R
33_0402_5%~D

AV1

SPI_MISO

R382
43K_0402_5%~D

SATA_ACT#_R <43>
1
R131
2
R58

2
0_0402_5%~D
1
+3.3V_RUN
10K_0402_5%~D

PCH JTAG Disable

HDD_DET#

ES2

ES2

ES1

@ R264
@R264
1K_0402_5%~D
2
1

All

R806

No Stuff

200 ohm

No Stuff

No Stuff

200 ohm

R1315

No Stuff

100 ohm

No Stuff

No Stuff

100 ohm

R807

200 ohm

200 ohm

No Stuff

No Stuff

200 ohm

R1281

100 ohm

100 ohm

No Stuff

No Stuff

100 ohm

R805

200 ohm

200 ohm

20K ohm

No Stuff

200 ohm

R1282

100 ohm

100 ohm

10K ohm

No Stuff

100 ohm

R804

4.7K ohm

4.7K ohm

4.7K ohm

4.7K ohm

51 ohm

R808

20K ohm

No Stuff

No Stuff

No Stuff

No Stuff

R1316

10K ohm

No Stuff

No Stuff

No Stuff

No Stuff

<28>

+3.3V_RUN

Production

No Reboot Strap
Low = Default
A

SPKR
High = No Reboot

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PCH (1/8)
Size

Document Number

Rev
1.0

LA-5471P
Date:

XDP_FN12
XDP_FN13

PLTRST1#_XDP 1
@R118
@
R118

LPC_LFRAME# <31,32,39,40>

SPKR

PCH Pin

+3.3V_M

200 MIL SO8

XDP_FN10
XDP_FN11

AK7
AK6
AK11
AK9

PCH_SPI_CLK

PCH JTAG Enable

W25Q64BVSSIG_SO8~D

R1237
3.3K_0402_5%~D

XDP_FN8
XDP_FN9

IBEXPEAK-M_FCBGA1071~D

SPI_WP#_SEL <39>

XDP_FN16
XDP_FN17

<31,32,39,40>
<31,32,39,40>
<31,32,39,40>
<31,32,39,40>

PAD~D

PCH_SPI_DO
PCH_SPI_DIN 1
R1247

FWH4 / LFRAME#

HDA_RST#

R807 2

0.1U_0402_16V4Z~D
R299
3.3K_0402_5%~D

CLK

SPKR

G30

HDA_SYNC

PCH_AZ_CODEC_SDIN0

PCH_AZ_SDOUT
2
33_0402_5%~D

T174

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

HDA_BCLK

PCH_JTAG_TCK

R1281
100_0402_5%~D
2
1

1
2
0_0402_5%~D

A30

U12

PCH_SPI_DIN

PCH_AZ_BITCLK

1 51_0402_5%~D

C328
1
2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17

IRQ_SERIRQ

PCH_JTAG_RST#

64Mb Flash ROM

R298
3.3K_0402_5%~D
PCH_SPI_CS0#

INTVRMEN

R804 2

200 MIL SO8


For iAMT

INTRUDER#

A14

<36> USB_MCARD3_DET#

+3.3V_ALW_PCH_JTAG
2
R806
+3.3V_M

A16

PCH_INTVRMEN

ME_FWP

R1315
100_0402_5%~D
2
1

D33
B33
C32
A32

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

INTRUDER#

PCH_AZ_RST#
2
33_0402_5%~D

ME_FWP

R123
0_0603_5%~D
2

@ C302
27P_0402_50V8J~D

2 PCH_AZ_SDOUT
33_0402_5%~D
2 PCH_AZ_SYNC
33_0402_5%~D
2 PCH_AZ_RST#
33_0402_5%~D
2 PCH_AZ_BITCLK
33_0402_5%~D

R1282
100_0402_5%~D
2
1

<29> PCH_AZ_CODEC_BITCLK

SRTCRST#

<29> PCH_AZ_CODEC_RST#

RTCRST#

D17

P1

<37> PCH_AZ_MDC_SDIN1

<29> PCH_AZ_CODEC_SYNC

C14

SRTCRST#

PCH_AZ_SYNC
2
33_0402_5%~D

<29> PCH_AZ_CODEC_SDIN0

1
R234
1
R235
1
R239
1
R241

PCH_RTCRST#

SPKR

<37> PCH_AZ_MDC_RST#

CMOS place near DIMM

<29> PCH_AZ_CODEC_SDOUT

RTCX1
RTCX2

1M_0402_5%~D
2
1
@ C300
27P_0402_50V8J~D

B13
D13

20K_0402_5%~D

R226

REV1.0

PCH_RTCX2

20K_0402_1%~D
1

@JXDP2
@
JXDP2
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16

SAMTE_BSH-030-01-L-D-A

U73A

R223
0_0402_5%~D
1
1
2
12P_0402_50V8J~D

2
C297
1

R222
10M_0402_5%~D

NC NC

4
1

Y1
32.768K_12.5PF_Q13MC30610018~D

+RTC_CELL

PCH_RTCX1

1
12P_0402_50V8J~D
1

2
C296

+3.3V_ALW_PCH
1
+3.3V_ALW_PCH
3
5
7
1
XDP_FN0
9
XDP_FN1
@ C1375
11
0.1U_0402_16V4Z~D
13
2
XDP_FN2
15
XDP_FN3
17
19
21
23
25
XDP_FN4
27
XDP_FN5
29
31
XDP_FN6
33
XDP_FN7
35
37
RESET_OUT#
39
<17,40> RESET_OUT#
PCH_PWRBTN#_XDP
1
2
41
<8,17> SIO_PWRBTN#_R
@ R69
0_0402_5%~D
43
45
@ R1545
47
0_0402_5%~D
49
MEM_SMBDATA_R
1
2
51
<8,13,14,16,28> MEM_SMBDATA
MEM_SMBCLK_R
1
2
53
<8,13,14,16,28> MEM_SMBCLK
@ R1546
55
PCH_JTAG_TCK
0_0402_5%~D
57
59
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
XDP_FN16
XDP_FN17

INTVRMEN- Integrated SUS


1.1V VRM Enable
High - Enable Internal VRs

R217
330K_0402_1%~D

<19,31> CONTACTLESS_DET#
<19>
GPIO37
<19,37> EN_ESATA_RPTR#
<19,39> TEMP_ALERT#
<19,39> TOUCH_SCREEN_DET#
<19> SIO_EXT_SCI#_R

33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D

Clear ME RTC Registers


2

Shunt

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

+3.3V_RUN

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

LPC

Keep CMOS

@ R78
@R78
@R91
@
R91
@R101
@
R101
@R102
@
R102
@R103
@
R103
@R104
@
R104
@R105
@
R105
@R106
@
R106
@R107
@
R107
@R108
@
R108
@R109
@
R109
@R110
@
R110
@R111
@
R111
@R112
@
R112
@R113
@
R113
@R114
@
R114
@R115
@
R115
@R116
@
R116

SATA

Open

USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
PCMCLK_REQ#
LANCLK_REQ#
HDD_DET#_R
GPIO19
CONTACTLESS_DET#
GPIO37
EN_ESATA_RPTR#
TEMP_ALERT#
TOUCH_SCREEN_DET#
SIO_EXT_SCI#_R

<18> USB_OC0#_R
<18> USB_OC1#_R
<18> USB_OC2#
<18> USB_OC3#
<18> USB_OC4#
<18> USB_OC5#
<18> USB_OC6#
<18> USB_OC7#
<16,34> PCMCLK_REQ#
<16,30> LANCLK_REQ#

RTC

Clear CMOS

IHDA

Shunt

SPI

CMOS_CLR1

JTAG

Wednesday, January 20, 2010

Sheet
1

15

of

57

+3.3V_RUN

MEM_SMBCLK_P

5
D

MEM_SMBDATA_P

MEM_SMBCLK <8,13,14,15,28>

@Q190A
@
Q190A
DMN66D0LDW-7_SOT363-6~D

MEM_SMBDATA <8,13,14,15,28>

@Q190B
@
Q190B
DMN66D0LDW-7_SOT363-6~D
U73B

10/100/1G LAN --->

<36> PCIE_PRX_WPANTX_N5
<36> PCIE_PRX_WPANTX_P5
<36> PCIE_PTX_WPANRX_N5_C
<36> PCIE_PTX_WPANRX_P5_C
<30>
<30>
<30>
<30>

PCIE_PRX_GLANTX_N6
PCIE_PRX_GLANTX_P6
PCIE_PTX_GLANRX_N6_C
PCIE_PTX_GLANRX_P6_C

C1008 1
C1009 1

C1025 1
C1024 1

C326 1
C327 1

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

PCIE_PRX_PCMTX_N3
PCIE_PRX_PCMTX_P3
PCIE_PTX_PCMRX_N3
PCIE_PTX_PCMRX_P3

AU30
AT30
AU32
AV32

PERN3
PERP3
PETN3
PETP3

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

PCIE_PRX_EXPTX_N4
PCIE_PRX_EXPTX_P4
PCIE_PTX_EXPRX_N4
PCIE_PTX_EXPRX_P4

BA32
BB32
BD32
BE32

PERN4
PERP4
PETN4
PETP4

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
PCIE_PTX_WPANRX_N5
PCIE_PTX_WPANRX_P5

BF33
BH33
BG32
BJ32

PERN5
PERP5
PETN5
PETP5

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

PCIE_PRX_GLANTX_N6
PCIE_PRX_GLANTX_P6
PCIE_PTX_GLANRX_N6
PCIE_PTX_GLANRX_P6

BA34
AW34
BC34
BD34

PERN6
PERP6
PETN6
PETP6

AT34
AU34
AU36
AV36

PERN7
PERP7
PETN7
PETP7

BG34
BJ34
BG36
BJ36

PERN8
PERP8
PETN8
PETP8

AK48
AK47
+3.3V_ALW_PCH

10/100/1G LAN --->

<30> CLK_PCIE_LAN#
<30> CLK_PCIE_LAN

R122 1

2 10K_0402_5%~D

PCIECLKREQ0#

R1198 1
R1199 1

2 0_0402_5%~D
2 0_0402_5%~D

PCIE_LAN#
PCIE_LAN
LANCLK_REQ#

<15,30> LANCLK_REQ#

PCMCIA--->
B

MiniWPAN (Mini Card 3)--->

Express card--->

MiniWLAN (Mini Card 2)--->

MiniWWAN (Mini Card 1)--->

<33> CLK_PCIE_PCM#
<33> CLK_PCIE_PCM
+3.3V_RUN
<15,34> PCMCLK_REQ#
<36> CLK_PCIE_MINI3#
<36> CLK_PCIE_MINI3
+3.3V_ALW_PCH
<36> MINI3CLK_REQ#
<34> CLK_PCIE_EXP#
<34> CLK_PCIE_EXP
+3.3V_ALW_PCH
<34> EXPCLK_REQ#
<36> CLK_PCIE_MINI2#
<36> CLK_PCIE_MINI2
+3.3V_ALW_PCH
<36> MINI2CLK_REQ#

<36> CLK_PCIE_MINI1#
<36> CLK_PCIE_MINI1
+3.3V_ALW_PCH
<36> MINI1CLK_REQ#

R1293
R1294
R876

1 0_0402_5%~D
1 0_0402_5%~D
2 10K_0402_5%~D

2
2
1

R1297 2
R1302 2
R61 2

R1205
R1206
R523

1 0_0402_5%~D
1 0_0402_5%~D
1 10K_0402_5%~D

1 0_0402_5%~D
1 0_0402_5%~D
1 10K_0402_5%~D

2
2
2

R1203 2
R1196 2
R45 2

1 0_0402_5%~D
1 0_0402_5%~D
1 10K_0402_5%~D

R1195 2
R1202 2
R40 2

1 0_0402_5%~D
1 0_0402_5%~D
1 10K_0402_5%~D

PCIE_PCM#
PCIE_PCM
PCMCLK_REQ#
PCIE_MINI3#
PCIE_MINI3
MINI3CLK_REQ#
PCIE_EXP#
PCIE_EXP
EXPCLK_REQ#
PCIE_MINI2#
PCIE_MINI2
MINI2CLK_REQ#
PCIE_MINI1#
PCIE_MINI1
MINI1CLK_REQ#

SMBDATA

P9
AM43
AM45
U4
AM47
AM48
N4
AH42
AH41
A8
AM51
AM53
M9
AJ50
AJ52
H6
AK53
AK51
P13

SML0ALERT# / GPIO60

SMBus

PCIE_PRX_EXPTX_N4
PCIE_PRX_EXPTX_P4
PCIE_PTX_EXPRX_N4_C
PCIE_PTX_EXPRX_P4_C

PERN2
PERP2
PETN2
PETP2

SMBCLK

B9
H14

MEM_SMBCLK_P

C8

MEM_SMBDATA_P

2
0_0402_5%~D

1
R54

2
0_0402_5%~D

J14

SML0CLK

C6

LAN_SMBCLK

SML0DATA

G8

LAN_SMBDATA

SML1ALERT# / GPIO74

1
R51

LAN_SMBCLK <30>
LAN_SMBDATA <30>

M14

SML1CLK / GPIO58

E10

SML1_SMBCLK

SML1DATA / GPIO75

G12

SML1_SMBDATA

CL_CLK1

T13

PCH_CL_CLK1

CL_DATA1

T11

PCH_CL_DATA1

CL_RST1#

T9

PCH_CL_RST1#

PEG_A_CLKRQ# / GPIO47

H1

PEG_A_CLKRQ#

SML1_SMBCLK <40>
SML1_SMBDATA <40>
PCH_CL_CLK1 <36>
PCH_CL_DATA1 <36>
C

PCH_CL_RST1# <36>

+3.3V_ALW_PCH

R1
10K_0402_5%~D
2

SML1_SMBCLK

1
R1178
1
R1179

SML1_SMBDATA
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P

CLKOUT_DMI_N
CLKOUT_DMI_P

AN4
AN2

CLK_CPU_DMI#
CLK_CPU_DMI

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

AT1
AT3

CLK_CPU_DPLL#
CLK_CPU_DPLL

AW24
BA24

CLK_BUF_DMI#
CLK_BUF_DMI

CLKIN_BCLK_N
CLKIN_BCLK_P

AP3
AP1

CLK_BUF_BCLK#
CLK_BUF_BCLK

CLKIN_DOT_96N
CLKIN_DOT_96P

F18
E18

CLK_BUF_DOT96#
CLK_BUF_DOT96

AH13
AH12

CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD

REFCLK14IN

P41

CLK_PCH_14M

CLKIN_PCILOOPBACK

J42

CLK_PCI_LOOPBACK

XTAL25_IN
XTAL25_OUT

AH51
AH53

XTAL25_IN
XTAL25_OUT

XCLK_RCOMP

AF38

1
R686

CLKIN_DMI_N
CLKIN_DMI_P

CLKOUT_PCIE3N
CLKOUT_PCIE3P
PCIECLKRQ3# / GPIO25
CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4# / GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P

PEG_B_CLKRQ# / GPIO56

CLK_CPU_DPLL# <8>
CLK_CPU_DPLL <8>

MEM_SMBCLK_P

2
@ R252
MEM_SMBDATA_P
2
@ R255
PCH_SMB_ALERT# 2
R1175

CLK_BUF_DMI# <6>
CLK_BUF_DMI <6>

SIO_14M

R1223

+3.3V_LAN

CLK_BUF_DOT96# <6>
CLK_BUF_DOT96 <6>
CLK_BUF_CKSSCD# <6>
CLK_BUF_CKSSCD <6>

2
R309
2
R377

LAN_SMBDATA

1
2.2K_0402_5%~D
1
2.2K_0402_5%~D

CLK_PCH_14M <6>
CLK_PCI_LOOPBACK <18>

2
90.9_0402_1%~D

R379
0_0402_5%~D
2
1

1 22_0402_5%~D

T45

CLKOUTFLEX1 / GPIO65

P43

PCI_TCM 3@ R1220 2

1 22_0402_5%~D

CLKOUTFLEX2 / GPIO66

T42

PCI_TPM

1 22_0402_5%~D

CLKOUTFLEX3 / GPIO67

N50

R685
1M_0402_5%~D

+1.05V_RUN

CLKOUTFLEX0 / GPIO64

R1219

1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
10K_0402_5%~D

CLK_BUF_BCLK# <6>
CLK_BUF_BCLK <6>

LAN_SMBCLK

PCIECLKRQ2# / GPIO20

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

CLK_CPU_DMI# <8>
CLK_CPU_DMI <8>
+3.3V_ALW_PCH

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

PCIECLKRQ5# / GPIO44

AD43
AD45

2
2.2K_0402_5%~D
2
2.2K_0402_5%~D

MiniPCIE/SATA
(Mini Card 3)--->

<34>
<34>
<34>
<34>

C1373 1
C1374 1

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

PCIE_PRX_WLANTX_N2 AW30
PCIE_PRX_WLANTX_P2 BA30
PCIE_PTX_WLANRX_N2 BC30
PCIE_PTX_WLANRX_P2 BD30

SMBALERT# / GPIO11

PCH_SMB_ALERT#

CLK_SIO_14M <39>

Y6

Express card--->

PCIE_PRX_PCMTX_N3
PCIE_PRX_PCMTX_P3
PCIE_PTX_PCMRX_N3_C
PCIE_PTX_PCMRX_P3_C

PERN1
PERP1
PETN1
PETP1

Link

PCMCIA--->

<33>
<33>
<33>
<33>

C320 1
C321 1

BG30
BJ30
BF29
BH29

Controller

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

PEG

MiniWLAN (Mini Card 2)--->

<36>
<36>
<36>
<36>

C317 1
C319 1

From CLK BUFFER

PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1_C
PCIE_PTX_WANRX_P1_C

Clock Flex

<36>
<36>
<36>
<36>

PCI-E*

MiniWWAN (Mini Card 1)--->

REV1.0

PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1
PCIE_PTX_WANRX_P1

25MHZ_12PF_X5H025000FC1H-H
2
2
C1168
C1187
12P_0402_50V8J~D
12P_0402_50V8J~D

CLK_PCI_TPM_CHA <32>
CLK_PCI_TPM <31>

1
JETWAY_14M

JETWAY_14M <32>

IBEXPEAK-M_FCBGA1071~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

PCH (2/8)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

16

of

57

+3.3V_ALW_PCH

Intel WW18 Strapping option


STRAP
PORT

+3.3V_RUN
ME_SUS_PWR_ACK
PCH_PCIE_WAKE#
SIO_SLP_LAN#
D

PCH_RI#

2
R269

1
10K_0402_5%~D

2
R268

1
10K_0402_5%~D

2
R380

1
10K_0402_5%~D

2
R267

1
10K_0402_5%~D

CLKRUN#

2
R282

ENABLE

DISABLE

L_DDC_DATA

PU to 3.3V thoough 2.2Kohm

NC

PORT B

SDVO_CTRLDATA

PU to 3.3V thoough 2.2Kohm

NC

PORT B

DDPC_CTRLDATA

PU to 3.3V thoough 2.2Kohm

NC

PORT B

DDPD_CTRLDATA

PU to 3.3V thoough 2.2Kohm

NC

CFG[4] (at CPU)

PD to GND thoough 3.3Kohm

NC

LVDS

1
8.2K_0402_5%~D

eDP on CPU

Intel request DDPB can not support eDP


U73C

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

BE22
BF21
BD20
BE18

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

BD22
BH21
BC20
BD18

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

DMI_COMP_R
2
49.9_0402_1%~D

1
R385

PCH_PWROK

R48

2 8.2K_0402_5%~D

PCH_RSMRST#

R260 1

2 10K_0402_5%~D

XDP_DBRESET#

<8,15> XDP_DBRESET#

<15,40> RESET_OUT#
<40> PM_MEPWROK

BF25

T6

DMI_ZCOMP

R254 1

2
0_0402_5%~D

PCH_PWROK

B17

R256 1

PM_MEPWROK_R
2
0_0402_5%~D

K5

MEPWROK

R257 1

LAN_RST#
2
0_0402_5%~D

A10

LAN_RST#

<40> PCH_RSMRST#

1
R53

<40> AC_PRESENT

C16

ME_SUS_PWR_ACK

<40> ME_SUS_PWR_ACK
<8,15> SIO_PWRBTN#_R
<40> SIO_PWRBTN#

PCH_RSMRST#

M1

SIO_PWRBTN#_R
2
0_0402_5%~D
AC_PRESENT

FDI_FSYNC1

FDI_LSYNC0

BJ12

FDI_LSYNC0

FDI_LSYNC1

BG14

FDI_LSYNC1

CLKRUN# / GPIO32

M6

BH13

SYS_PWROK

SYS_PWROK

<8> PM_DRAM_PWRGD

FDI_FSYNC1

WAKE#

2
0_0402_5%~D

D9

FDI_FSYNC0

FDI_FSYNC0

SYS_RESET#

R253 1

PM_DRAM_PWRGD

BJ14
BF13

DMI_IRCOMP

PWROK

DRAMPWROK
RSMRST#

System Power Management

BH25

FDI_INT

FDI_INT

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

+1.05V_RUN
C

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

Y1

PCH_PCIE_WAKE#
CLKRUN#

<7>
<7>
<7>
<7>
<7>
<7>
<7>
<7>

FDI_INT
FDI_FSYNC0

2 PCH_BATLOW#
8.2K_0402_5%~D
PCH_RI#

F14

<7>

CLKRUN#

T173

PAD~D

SUSCLK / GPIO62

F3

SUSCLK

T179

PAD~D

T2

PAD~D

SLP_S5# / GPIO63

E4

SIO_SLP_S5#

SLP_S4#

H7

SIO_SLP_S4#

K8

TP23

N2

SIO_SLP_M#

PCH_CRT_DDC_CLK_R
PCH_CRT_DDC_DAT_R

SLP_LAN# / GPIO29

F6

H_PM_SYNC
SIO_SLP_LAN#

L_BKLTEN
L_VDD_EN

SDVO_TVCLKINN
SDVO_TVCLKINP

BJ46
BG46

Y48

L_BKLTCTL

SDVO_STALLN
SDVO_STALLP

BJ48
BG48

SDVO_INTN
SDVO_INTP

BF45
BH45

AB48
Y45

L_DDC_CLK
L_DDC_DATA

AB46
V48

L_CTRL_CLK
L_CTRL_DATA

AP39
AP41

LVD_IBG
LVD_VBG

AT43
AT42

LVD_VREFH
LVD_VREFL

AV53
AV51

LVDSA_CLK#
LVDSA_CLK

BB47
BA52
AY48
AV47

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

BB48
BA50
AY49
AV48

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

AP48
AP47

LVDSB_CLK#
LVDSB_CLK

AY53
AT49
AU52
AT53

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

AY51
AT48
AU50
AT51

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

AA52
AB53
AD53

CRT_BLUE
CRT_GREEN
CRT_RED

PAD~D

R480
1
1
R673

<27> PCH_CRT_HSYNC
<27> PCH_CRT_VSYNC

SIO_SLP_M# <39,48>

20_0402_1%~D
2 HSYNC
2 VSYNC
20_0402_1%~D

Y53
Y51

CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN

PAD~D

PCH_SDVO_CTRLCLK <26>
PCH_SDVO_CTRLDATA <26>

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

BG44
BJ44
AU38

DPB_PCH_AUX# <26>
DPB_PCH_AUX <26>
DPB_PCH_HPD <26>

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

DPB_PCH_LANE_N0
DPB_PCH_LANE_P0
DPB_PCH_LANE_N1
DPB_PCH_LANE_P1
DPB_PCH_LANE_N2
DPB_PCH_LANE_P2
DPB_PCH_LANE_N3
DPB_PCH_LANE_P3

<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>

DDPC_CTRLCLK
DDPC_CTRLDATA

Y49
AB49

PCH_DDPC_CTRLCLK <25>
PCH_DDPC_CTRLDATA <25>

DDPC_AUXN
DDPC_AUXP
DDPC_HPD

BE44
BD44
AV40

DPC_PCH_DOCK_AUX# <25>
DPC_PCH_DOCK_AUX <25>
DPC_PCH_DOCK_HPD <38>

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

DDPD_CTRLCLK
DDPD_CTRLDATA

CRT_DDC_CLK
CRT_DDC_DATA

AD48
AB51

T51
T53

SDVO_CTRLCLK
SDVO_CTRLDATA

V51
V53

PAD~D

CRT_IREF

BJ10

T48
T47

PAD~D

SIO_SLP_S3# <39>
T5

SLP_M#

PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED

<27> PCH_CRT_BLU
<27> PCH_CRT_GRN
<27> PCH_CRT_RED

SIO_SLP_S4# <39>
T4

SIO_SLP_S3#

<32,39,40>

SIO_SLP_S5# <40>
T3

PMSYNCH

RI#

<7>

FDI_LSYNC1

PCH_PCIE_WAKE# <39>

T6
1
R275

+3.3V_ALW_PCH

FDI_LSYNC0

SUS_STAT#/LPCPD#

P12

BIA_PWM_PCH

<7>
<7>

P8

SLP_S3#

<24> BIA_PWM_PCH

PANEL_BKEN_PCH
ENVDD_PCH

<7>

FDI_FSYNC1

SUS_STAT# / GPIO61

SUS_PWR_DN_ACK / GPIO30

P5

J12

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

<39> PANEL_BKEN_PCH
<24,39> ENVDD_PCH

Digital Display Interface

<7>
<7>
<7>
<7>

BD24
BG22
BA20
BG20

<7>
<7>
<7>
<7>
<7>
<7>
<7>
<7>

LVDS

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

BC46
BD46
AT38

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

REV1.0

DPC_PCH_LANE_N0
DPC_PCH_LANE_P0
DPC_PCH_LANE_N1
DPC_PCH_LANE_P1
DPC_PCH_LANE_N2
DPC_PCH_LANE_P2
DPC_PCH_LANE_N3
DPC_PCH_LANE_P3

<38>
<38>
<38>
<38>
<38>
<38>
<38>
<38>

U50
U52

DDPD_AUXN
DDPD_AUXP
DDPD_HPD

CRT

<7>
<7>
<7>
<7>

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

BC24
BJ22
AW20
BJ20

IBEXPEAK-M_FCBGA1071~D

H_PM_SYNC <8>

R672
1K_0402_0.5%~D
2

<7>
<7>
<7>
<7>

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

REV1.0

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

FDI

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI

<7>
<7>
<7>
<7>

U73D

SIO_SLP_LAN# <30,39>

IBEXPEAK-M_FCBGA1071~D
1
R679
1
R680
1
R681
1
R682

+3.3V_RUN

1
R890
1
R887

PCH_CRT_DDC_CLK_R
2
2.2K_0402_5%~D
PCH_CRT_DDC_DAT_R
2
2.2K_0402_5%~D

+3.3V_RUN

2 PCH_CRT_BLU
150_0402_1%~D
2 PCH_CRT_GRN
150_0402_1%~D
2 PCH_CRT_RED
150_0402_1%~D
2 ENVDD_PCH
100K_0402_5%~D

<27> PCH_CRT_DDC_DAT

PCH_CRT_DDC_CLK_R

Q212A
DMN66D0LDW-7_SOT363-6~D

<27> PCH_CRT_DDC_CLK

DELL CONFIDENTIAL/PROPRIETARY

PCH_CRT_DDC_DAT_R

Compal Electronics, Inc.

Q212B
DMN66D0LDW-7_SOT363-6~D
1
@R1543
@
R1543
1
@R1544
@
R1544

2
0_0402_5%~D
2
0_0402_5%~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

PCH (3/8)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

17

of

57

PCH XDP ENABLE

R1479 1
R1480 1
R1481 1
R1482 1
R1483 1
R1484 1
R1485 1

1
R212

1
R590

J50
G42
H47
G34

C/BE0#
C/BE1#
C/BE2#
C/BE3#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

G38
H51
B37
A44

PIRQA#
PIRQB#
PIRQC#
PIRQD#

PCI_REQ0#
PCI_REQ1#
BT_DET#

F51
A46
B45
M53

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

PCI_GNT0#
PCI_GNT1#
PCIE_MCARD3_DET#
PCI_GNT3#

F48
K45
F36
H53

GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

LVDS_CBL_DET#

B41
K53
A36
A48

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

CAM_MIC_CBL_DET#
2
8.2K_0402_5%~D
BT_DET#
2
8.2K_0402_5%~D

PCI_GNT3#

@R863
@
R863
4.7K_0402_5%~D
2

<36> PCIE_MCARD2_DET#
<41> BT_DET#

<36> PCIE_MCARD3_DET#
<24> LVDS_CBL_DET#

A16 swap override Strap/Top-Block


<28,40> HDD_FALL_INT1

Swap Override jumper


Low = A16 swap

<24> CAM_MIC_CBL_DET#
1
2
R632
0_0402_5%~D
1
2
@R121
@
R121
0_0402_5%~D

reserve for DEBUG

PCI_GNT#3

CAM_MIC_CBL_DET#
FFS_PCH_INT
PCH_PCIRST#

K6
E44
E50

SERR#
PERR#

PCI_IRDY#
PCI_DEVSEL#
PCI_FRAME#

A42
H44
F46
C46

IRDY#
PAR
DEVSEL#
FRAME#

PCI_PLOCK#

D49

PLOCK#

PCI_STOP#
PCI_TRDY#

D41
C48

High = Default
B

<31> PLTRST_USH#
<33> PLTRST_R5U242#
<15> PLTRST_XDP#
<30> PLTRST_LAN#

R100
R97
@R94
@
R94
R14

1
1
1
1

2
2
2
2

0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D

<39> CLK_PCI_5028
<40> CLK_PCI_MEC
<38> CLK_PCI_DOCK
<16> CLK_PCI_LOOPBACK
+3.3V_RUN

M7
PCH_PLTRST#

R1216
R1217
R1215

2
2
1

R63

PCIRST#

PCI_SERR#
PCI_PERR#

D5

PCI_5028
PCI_MEC
PCI_DOCK

1 22_0402_5%~D
1 47_0402_5%~D
2 47_0402_5%~D

N52
P53
P46
P51
PCI_LOOPBACKOUT
22_0402_5%~D
1
P48

NV_DQS0
NV_DQS1

AV9
BG8

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

NV_ALE
NV_CLE

BD3
AY6

NV_RCOMP

AU2

NV_RB#

AV7

+VCCPNAND

NV_WR#0_RE#
NV_WR#1_RE#

AY8
AY5

NV_WE#_CK0
NV_WE#_CK1

STOP#
TRDY#

PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

PCH_PLTRST#_EC

Boot
PCH_PLTRST#_EC <8,32,34,36,39,40>

BIOS Strap

High = Enabled (Default)


NV_ALE
Low = Disabled
NV_ALE
NV_CLE

@R866
@
R866
1K_0402_5%~D

AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
USBP11USBP11+

USBRBIAS#

B25

USBRBIAS

USBRBIAS

D25

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

N16
J16
F16
L16
E14
G16
F12
T15

USBP0- <37>
USBP0+ <37>
USBP1- <37>
USBP1+ <37>
USBP2- <37>
USBP2+ <37>
USBP3- <37>
USBP3+ <37>
USBP4- <36>
USBP4+ <36>
USBP5- <36>
USBP5+ <36>
USBP6- <41>
USBP6+ <41>
USBP7- <31>
USBP7+ <31>
USBP8- <38>
USBP8+ <38>
USBP9- <38>
USBP9+ <38>
USBP10- <33>
USBP10+ <33>
USBP11- <24>
USBP11+ <24>

USBP13USBP13+

USB_OC0#_R
USB_OC1#_R

USBP13- <36>
USBP13+ <36>

NV_CLE

----->Right Side Top


----->USH_BIO
----->Left Side Top
----->Left Side Bottom
----->WLAN
----->WWAN
----->Blue Tooth
----->Express Card
----->DOCK
----->DOCK
----->Right Side Bottom
----->Camera

DMI Termination Voltage


Set to Vss when LOW
NV_CLE
Set to Vcc when HIGH

+3.3V_ALW_PCH

----->WPAN

Within 500 mils

2
R303
22.6_0402_1%~D
R71 1
R77 1

2 0_0402_5%~D
2 0_0402_5%~D
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

<37>
<37>
<15>
<15>
<15>
<15>
<15>
<15>

TC7SH08FU_SSOP5~D

PCI_GNT#1

PCI_GNT#0

Boot BIOS Location

LPC

Reserved (NAND)

R1486

1 10K_0402_5%~D

USB_OC1#

R1487

1 10K_0402_5%~D

USB_OC3#

R1488

1 10K_0402_5%~D

USB_OC4#

R1489

1 10K_0402_5%~D

USB_OC5#

R1490

1 10K_0402_5%~D

USB_OC6#

R1491

1 10K_0402_5%~D

USB_OC7#

R1493

1 10K_0402_5%~D

USB_OC2#

R1494

1 10K_0402_5%~D

USB_OC0#_R <15>
USB_OC1#_R <15>

PCI
SPI

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

PCH (4/8)
Size

Document Number

Rev
1.0

LA-5471P
Date:

USB_OC0#

PCI_GNT1#

U11
O

Danbury Technology Enabled

@ R79
1K_0402_5%~D
2
1

5
A

NV_ALE

PCI_GNT0#

no support?

@ R872
10K_0402_5%~D

IBEXPEAK-M_FCBGA1071~D

0.1U_0402_16V4Z~D

PCH_PLTRST#

+VCCPNAND

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

PME#

C40
1

AY9
BD1
AP15
BD8

R1478 1

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

R1476 1

REV1.0

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

R1477 1

U73E
H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36

R1475 1

No Stuff: R78,R89,R101~R116

@ R93
1K_0402_5%~D
2
1

R1474 1

Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
PCH XDP DISABLE

NVRAM

R1473 1

USB

R1472 1

No Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130

PCI_DEVSEL#
2
8.2K_0402_5%~D
PCI_PIRQA#
2
8.2K_0402_5%~D
PCI_PLOCK#
2
8.2K_0402_5%~D
PCI_PERR#
2
8.2K_0402_5%~D
PCI_TRDY#
2
8.2K_0402_5%~D
PCI_FRAME#
2
8.2K_0402_5%~D
PCI_REQ1#
2
8.2K_0402_5%~D
PCI_PIRQD#
2
8.2K_0402_5%~D
PCI_PIRQB#
2
8.2K_0402_5%~D
PCI_REQ0#
2
8.2K_0402_5%~D
PCI_SERR#
2
8.2K_0402_5%~D
PCI_IRDY#
2
8.2K_0402_5%~D
PCI_STOP#
2
8.2K_0402_5%~D
LVDS_CBL_DET#
2
8.2K_0402_5%~D
PCI_PIRQC#
2
8.2K_0402_5%~D

PCI

R1471 1

Stuff: R78,R89,R101~R116

+3.3V_RUN

Wednesday, January 20, 2010

Sheet
1

18

of

57

U73F
<15> SIO_EXT_SCI#_R

<15,37> EN_ESATA_RPTR#
<29> SPEAKER_DET#

J32

TACH3 / GPIO7

SIO_EXT_SMI#

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

SIO_EXT_WAKE#

T7

GPIO15

AA2

SPEAKER_DET#

F38

PCH_GPIO22

Y7
H10

<36> PCIE_MCARD1_DET#
TP_ONDIE_PLL_VR
<15,39> TOUCH_SCREEN_DET#

Internal pull up GPIO27 to


enable VccVRM

<15,31> CONTACTLESS_DET#

R1284
8.2K_0402_5%~D
@
2

<36> USB_MCARD1_DET#

<15> GPIO37

<28> FFS_INT2

<37>

+3.3V_ALW_PCH

1
R1309

IO_LOOP

PCH_GPIO34

M11

STP_PCI# / GPIO34

CONTACTLESS_DET#
GPIO37

SIO_A20GATE

AM3

CLK_CPU_BCLK#

SIO_RCIN#

SIO_A20GATE <40>

AM1

CLK_CPU_BCLK

BG10

H_PECI

T1

SIO_RCIN#

PROCPWRGD

BE10

H_CPUPWRGD

THRMTRIP#

BD10

PCH_THRMTRIP#_R

CLKOUT_BCLK0_P / CLKOUT_PCIE8P
PECI
RCIN#

SIO_EXT_SCI#

CLK_CPU_BCLK# <8>
CLK_CPU_BCLK <8>
H_PECI
SIO_RCIN#

<8>

2
R230
2
R231
1
R836
1
R272

1
8.2K_0402_5%~D
1
10K_0402_5%~D
2
10K_0402_5%~D
2
10K_0402_5%~D

+1.05V_RUN_VTT

R237
56_0402_5%~D

<40>

H_CPUPWRGD <8>

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

TP1

BA22

AB13

SATA3GP / GPIO37

TP2

AW22

C33
0.1U_0402_16V4Z~D

+3.3V_ALW_PCH

V3

SLOAD / GPIO38

TP3

BB22

TPM_ID1

P3

SDATAOUT0 / GPIO39

TP4

AY45

USB_MCARD2_DET#

H3

PCIECLKRQ6# / GPIO45

TP5

AY46

TOUCH_SCREEN_DET# 1
R74

2
10K_0402_5%~D

F1

PCIECLKRQ7# / GPIO46

TP6

AV43

SIO_EXT_SMI#

1
R274

2
10K_0402_5%~D

SIO_EXT_WAKE#

1
R1557

FFS_INT2

AB6

SDATAOUT1 / GPIO48

TP7

AV45

TEMP_ALERT#

AA4

SATA5GP / GPIO49

TP8

AF13

GPIO57

TP9

M18

TP10

N18

TP11

AJ24

TP12

AK41

TP13

AK42

TP14

M32

TP15

N32

TP16

M30

TP17

N30

TP18

H12

TP19

AA23

NC_1

AB45

NC_2

AB38

NC_3

AB42

NC_4

AB41

NC_5

T39

IO_LOOP

2 GPIO46
10K_0402_5%~D

CONTACTLESS_DET#
1
10K_0402_5%~D
GPIO37
1
10K_0402_5%~D
EN_ESATA_RPTR#
1
10K_0402_5%~D
TEMP_ALERT#
1
10K_0402_5%~D
PCH_GPIO1
1
10K_0402_5%~D
PCH_GPIO6
1
10K_0402_5%~D
SPEAKER_DET#
2
8.2K_0402_5%~D
PCH_GPIO22
2
10K_0402_5%~D
PCH_GPIO34
2
10K_0402_5%~D

A20GATE

U2

TPM_ID0

+3.3V_RUN
2
R1242
2
R1243
2
R1244
2
R1245
2
R1510
2
R1511
1
R95
1
R1520
1
R1521

GPIO24

GPIO28

GPIO46

<15,39> TEMP_ALERT#

SCLOCK / GPIO22

GPIO27

V6

+3.3V_RUN
SIO_A20GATE

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

TACH0 / GPIO17

V13

TP_ONDIE_PLL_VR

<36> USB_MCARD2_DET#

SATA4GP / GPIO16

TOUCH_SCREEN_DET#

USB_MCARD1_DET#

AF48
AF47

1394_DET#

AB12

+3.3V_ALW_PCH

CLKOUT_PCIE7N
CLKOUT_PCIE7P

TACH1 / GPIO1

PM_LANPHY_ENABLE

EN_ESATA_RPTR#

AH45
AH46

<39> SIO_EXT_WAKE#

TACH2 / GPIO6

1394_DET#

CLKOUT_PCIE6N
CLKOUT_PCIE6P

<30> PM_LANPHY_ENABLE

D37

CPU

<40> SIO_EXT_SMI#

PCH_GPIO6

BMBUSY# / GPIO0

All NCTF pins should have thick


traces at 45from the pad.

F8

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

RSVD

2 SIO_EXT_SMI#
1K_0402_5%~D

1
@R99
@
R99

2
Y3
0_0402_5%~D
C38

GPIO

<33> 1394_DET#

1
R130
PCH_GPIO1

MISC

SIO_EXT_SCI#

NCTF

<40> SIO_EXT_SCI#

INIT3_3V#

REV1.0

TP24

P6

IO_LOOP

2
R835

1
100K_0402_5%~D

2
2.2K_0402_5%~D

INIT3_3V#

PAD~D

T7 @

C10

IBEXPEAK-M_FCBGA1071~D
+3.3V_RUN

+3.3V_RUN

China TPM
No TPM, No China TPM

TPM_ID1
2

TPM_ID0
6@ R922

Reserved
1

TPM_ID0

4@ R787
20K_0402_5%~D
2

5@ R273
10K_0402_5%~D

3@ R339
2.2K_0402_5%~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

10K_0402_5%~D
1

TPM

TPM_ID1

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

PCH (5/8)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

19

of

57

PCH Power Rail Table


+1.05V_RUN

+3.3V_RUN

C85
0.1U_0402_10V7K~D

+3.3V_RUN

AN30
AN31

VCCIO[54]
VCCIO[55]

AN35
+VCCAFDI_VRM

VCCVRM[1]

BJ18

VCCFDIPLL

C22
1U_0402_6.3V6K~D

AM23

+1.05V_RUN

VCCIO[1]

AF53

VSSA_DAC[2]

AF51

VCCALVDS

AH38

VSSA_LVDS

AH39

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

AP43
AP45
AT46
AT45

VCC3_3[2]

AB34

VCC3_3[3]

AB35

VCC3_3[4]

AD35

2
1
BLM18PG181SN1_0603~D
C87
0.1U_0402_10V7K~D

VSSA_DAC[1]

+VCCADAC

Voltage

V_CPU_IO

1.1/1.05

< 1 (mA)

V5REF

< 1 (mA)

V5REF_Sus

< 1 (mA)

C38
10U_0805_4VAM~D

+3.3V_RUN
1

C93
0.1U_0402_10V7K~D

+1.5V_1.8V_RUN_VCCADMI_VRM

Vcc3_3

3.3

0.357

VccAClk

1.1

0.052

VccADAC

3.3

0.069

VccADPLLA

1.1

0.068

VccADPLLB

1.1

0.069

VccapllEXP

1.1

0.04

VccCore

1.1

1.432

VccDMI

1.1

0.058

VccDMI

1.1

0.061

VccFDIPLL

1.1

0.037
C

VCCVRM[2]

AT24

VCCDMI[1]

AT16

VCCDMI[2]

AU16

1
R391

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

VccIO

1.1

3.062

VccLAN

1.1

0.32

VccME

1.1

1.849

VccME3_3

3.3

0.085

C1140
1U_0402_6.3V6K~D
+VCCPNAND

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

AM8
AM9
AP11
AP9

1
@ R489

2
+3.3V_RUN
0_0805_5%~D

VccpNAND

1.8

0.156

1
R495

2
+1.8V_RUN
0_0805_5%~D

VccRTC

3.3

2 (mA)

VccSATAPLL

1.1

0.031

VccSus3_3

3.3

0.163

VccSusHDA

3.3

0.006

+3.3V_M

VccVRM

REV1.0

2 @

2
+1.05V_+1.5V_1.8V_RUN
0_0603_5%~D

+1.05V_RUN_VTT

VCC3_3[1]

AT22

Place C22 Near BJ18 pin

VCCADAC[2]

AE52

HVCMOS

VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]

AE50

C94
0.1U_0402_10V7K~D

C84
1U_0402_6.3V6K~D

C83
1U_0402_6.3V6K~D

C82
1U_0402_6.3V6K~D

C81
1U_0402_6.3V6K~D

C80
10U_0805_4VAM~D

AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27

VCCADAC[1]

DMI

+1.05V_RUN

VCCAPLLEXP

NAND / SPI

2 @

BJ24

PCI E*

Place C78 Near BJ24 pin

VCCIO[24]

FDI

C78
1U_0402_6.3V6K~D

VCCAPLLEXP

AK24

LVDS

+1.05V_RUN

S0 Iccmax
Current (A)

Voltage Rail
L49

C109
0.01U_0402_16V7K~D

CRT

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]

POWER

VCC CORE

AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31

C77
1U_0402_6.3V6K~D

C1139
10U_0805_4VAM~D

U73G

C95
0.1U_0402_10V7K~D

1.8 / 1.5

0.196

VccVRM

1.05

< 1 (mA)

VccALVDS

3.3

< 1 (mA)

VccTX_LVDS

1.8

0.059

IBEXPEAK-M_FCBGA1071~D

+1.05V_+1.5V_1.8V_RUN

1
R390

+VCCAFDI_VRM
2
0_0603_5%~D
+1.5V_RUN

+1.8V_RUN

+1.05V_RUN

+1.05V_+1.5V_1.8V_RUN

2
@ R96

2
R387

2
@ R80

+1.05V_+1.5V_1.8V_RUN
1
0_0603_5%~D

1
0_0603_5%~D

1
0_0603_5%~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

PCH (6/8)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

20

of

57

Place C39 Near AP51 pin

VCCME[6]

V39

VCCME[7]

V41

VCCME[8]

V42

VCCME[9]

Y39

VCCME[10]

Y41

VCCME[11]

Y42

VCCME[12]

V9

1
C103
0.1U_0402_10V7K~D

AU24

+1.05V_+1.5V_1.8V_RUN

BB51
BB53

+1.05V_RUN_DPLLA

+1.05V_RUN_DPLLB

+VCCSST
1

2
+3.3V_RUN

2
0_0603_5%~D

AF34

VCCIO[2]

AH34

VCCIO[3]

AF32

VCCIO[4]

V12

DCPSST

P18

VCCSUS3_3[29]
VCCSUS3_3[30]

U20

VCCSUS3_3[31]

U22

VCCSUS3_3[32]

V15

VCC3_3[5]

V16

VCC3_3[6]

Y16

VCC3_3[7]

A12
1

@ C106
1U_0402_6.3V6K~D

+1.05V_RUN_DPLLB
L46
10UH_LBR2012T100M_20%~D
1
2
1
1
+

+PCH_V5REF_SUS

K49

+PCH_V5REF_RUN

V_CPU_IO[1]
V_CPU_IO[2]

VCCRTC

VCC3_3[8]

J38

VCC3_3[9]

L38

VCC3_3[10]

M36

VCC3_3[11]

N36

VCC3_3[12]

P36

VCC3_3[13]

U35

VCC3_3[14]

AD13

VCCSATAPLL[1]
VCCSATAPLL[2]

AK3
AK1

C342
1U_0603_10V6K~D

Follow DG 1.11
+1.05V_RUN
+5V_RUN +3.3V_RUN

2
R517

D15
RB751S40T1_SOD523-2~D

1
0_0805_5%~D

+PCH_V5REF_RUN

R311
100_0402_5%~D

+3.3V_RUN

+3.3V_RUN_VCCPPCI

C356
0.1U_0402_10V7K~D

C335
1U_0603_10V6K~D

+3.3V_RUN

C1203
0.1U_0402_10V7K~D

+VCCSATAPLL
1

Place C610 Near AK3 pin

AH22

VCCVRM[4]

AT20

VCCIO[10]

AH19

VCCIO[11]

AD20

VCCIO[12]

AF22

VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]

AD19
AF20
AF19
AH20

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

AB19
AB20
AB22
AD22

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

AA34
Y34
Y35
AA35

+1.05V_+1.5V_1.8V_RUN

+1.05V_RUN

+1.05V_M

+VCCME_13
+VCCME_14
+VCCME_15
+VCCME_16

R559
R573
R591
R592

2
2
2
1

+VCCSUSHDA

L30

IBEXPEAK-M_FCBGA1071~D

+PCH_V5REF_SUS

1
1
1
2

0_0603_5%~D
0_0603_5%~D
0_0603_5%~D
0_0603_5%~D

2
R650

1
+3.3V_ALW_PCH
0_0603_5%~D

C672
1U_0402_6.3V6K~D
A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

PCH (7/8)
Size

Document Number

Rev
1.0

LA-5471P
Date:

D16
RB751S40T1_SOD523-2~D

+3.3V_ALW_VCCPUSB

VCCIO[9]

VCCSUSHDA

F24

+3.3V_ALW_PCH

R313
100_0402_5%~D

V5REF_SUS

C18
0.1U_0402_10V7K~D

V23

2
G

VCCIO[56]

DCPSUS

U19

AU18

U23

V5REF

+RTC_CELL

+1.05V_RUN

C1874
220U_B2_2.5VM_R35M~D

@ C105
1U_0402_6.3V6K~D

C1873
220U_B2_2.5VM_R35M~D

VCCIO[21]
VCCIO[22]
VCCIO[23]

AT18

+V_CPU_IO
1

2
+1.05V_RUN_DPLLA
L45
10UH_LBR2012T100M_20%~D
1
2
1
1
+

AH23
AJ35
AH35

C760
0.1U_0402_10V7K~D

C763
4.7U_0603_6.3V6K~D
2
2

+1.05V_RUN

VCCADPLLB[1]
VCCADPLLB[2]

+1.05V_RUN_VTT
1
R692

+3.3_RUN_VCCPCORE

VCCADPLLA[1]
VCCADPLLA[2]

BD51
BD53

Y22

C783
0.1U_0402_10V7K~D

2
0_0805_5%~D

+3.3V_ALW_VCCPSUS

+DCPSUS

C781
0.1U_0402_10V7K~D

1
R691

C113
0.1U_0402_10V7K~D

2
0_0805_5%~D

C777
0.1U_0402_10V7K~D

1
R690

C759
0.1U_0402_10V7K~D

+3.3V_ALW_PCH

C677
0.1U_0402_10V7K~D

:,&,&

sZhE'
'
W,

C217
0.1U_0402_10V7K~D

C139
1U_0402_6.3V6K~D

C138
1U_0402_6.3V6K~D

C108
1U_0402_6.3V6K~D

+1.05V_RUN

VCCVRM[3]

HDA

DCPRTC

VCCSUS3_3[28]

+5V_ALW_PCH

VCCME[5]

AF42

1
+3.3V_ALW_PCH
0_0603_5%~D

AF41

2
R500

R57
20K_0402_5%~D

VCCME[4]

+3.3V_ALW_VCCPUSB

AF43

<42> ALW_ENABLE

VCCME[3]

VCCME[2]

AD41

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

Q10
SSM3K7002FU_SC70-3~D

AD39

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

+5V_ALW_PCH

R651
0_0402_5%~D
2
1

VCCME[1]

+5V_ALW

C611
1U_0402_6.3V6K~D

AD38

1
+1.05V_RUN
0_0603_5%~D

C96
1U_0402_6.3V6K~D

@ C610
1U_0402_6.3V6K~D

DCPSUSBYP

+1.05V_RUN_VCCUSBCORE
2
R499
1

C97
0.1U_0402_10V7K~D

Y20

USB

@ C112
22U_0805_6.3V6M~D

+VCCRTCEXT

VCCLAN[2]

V24
V26
Y24
Y26

C99
0.1U_0402_10V7K~D

VCCLAN[1]

AF24

PCI/GPIO/LPC

C117
22U_0805_6.3V6M~D

+1.05V_M_VCCEPW
1

@ C111
22U_0805_6.3V6M~D

C116
22U_0805_6.3V6M~D

Place C117 Near V39 pin

AF23

SATA

C110
0.1U_0402_10V7K~D

Place C116 Near AD38 pin


2
0_0805_5%~D

VCCACLK[2]

+1.05V_M
1
R674

AP53

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

Clock and Miscellaneous

+TP_PCH_VCCDSW

VCCACLK[1]

RTC

C101
1U_0402_6.3V6K~D

C102
1U_0402_6.3V6K~D

1
R669

C100
1U_0402_6.3V6K~D

2 +1.05V_M_VCCAUX
0_0603_5%~D
1

POWER
REV1.0

AP51

PCI/GPIO/LPC

+1.05V_M

U73J

CPU

@ C39
1U_0402_6.3V6K~D

+VCCACLK
1

Wednesday, January 20, 2010

Sheet
1

21

of

57

U73I
AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42

U73H

AB16

VSS[0]

AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

REV1.0

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

IBEXPEAK-M_FCBGA1071~D

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

REV1.0
IBEXPEAK-M_FCBGA1071~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

PCH (8/8)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

22

of

57

+3.3V_M

+3.3V_M
1

R1517
10K_0402_5%~D

R142
10K_0402_5%~D

JFAN1

C219

1
2
3
4

22U_0805_6.3VAM~D

+3.3V_M

D2
RB751S40T1_SOD523-2~D

FAN1_DET#
+FAN1_VOUT
FAN1_TACH_FB

1
2
3 G1
4 G2

5
6

MOLEX_53398-0471~D

R134
8.2K_0402_5%~D
+1.05V_RUN_VTT
R135
C
2.2K_0402_5%~D
1
2
2
B
Q5 E
PMST3904_SOT323-3~D

THERMATRIP1#

IMVP_IMON

1
C218
0.1U_0402_16V4Z~D

1
R998

<40> BC_DAT_EMC4002

Place under CPU

<40> BC_CLK_EMC4002
1

Place C223 close to the Q8 as possible


Place C224, close to the Guardian pins as possible

R1408
0_0402_5%~D

<8> H_THERMTRIP#

10
11

SMDATA/BC-LINK_DATA
SMCLK/BC-LINK_CLK

REM_DIODE1_P
REM_DIODE1_N

36
35

REM_DIODE2_P
REM_DIODE2_N

C221
2200P_0402_50V7K~D

C228
2200P_0402_50V7K~D
2
B
E Q9
Place C228 close 2to the
MMBT3904WT1G_SC70-3~D
Guardian pins as possible.
2 22_0402_5%~D

@ C227
@C227
100P_0402_50V8K~D

2
B
Q7
MMBT3904WT1G_SC70-3~D

REM_DIODE3_P
REM_DIODE3_N

+3.3V_M

R1218

VIN1
VCP1
VCP2

39
48
45

DP1/VREF_T
DN1/THERM

DP4/DN8
DN4/DP8

44
43

38
37

DP2
DN2

DP5/DN9
DN5/DP9

47
46

41
40

DP3/DN7
DN3/DP7

1
E

+RTC_CELL
1

C229
0.1U_0402_16V4Z~D

+3.3V_M

+3.3V_M

<40> PCH_PWRGD#

DP6/VREF_T2
DN6/VIN2

1
2

1
R146 1
R148

R137
8.2K_0402_5%~D

2
18
2 10K_0402_5%~D 17
1K_0402_5%~D
THERMATRIP1#
22
THERMATRIP2#
23
THERMATRIP3#
24
VSET

42

2
R141

VDD
ATF_INT#/BC-LINK_IRQ#
POWER_SW#
ACAVAIL_CLR
THERMTRIP_SIO/PWM1/GPIO5
SYS_SHDN#
VDD_PWRGD
3V_PWROK#
RTC_PWR3V

THERMTRIP1#
THERMTRIP2#
THERMTRIP3#

12
26
27
20
25

LDO_SHDN#

19

VSET

LDO_POK

34

ADDR_MODE/XEN

LDO_SET

33

6
5

VDDH1
VDDH1

VDDH2
VDDH2

32
31

Rset=953,Tp=88degree
2

+3.3V_M

BC_INT#_EMC4002 <40>

POWER_SW#

ACAV_IN

PWM

2
R211

<40,50,51>

2
R145
1
@ R147

1
+3.3V_M
10K_0402_5%~D
THERM_STP#
2
+RTC_CELL
47K_0402_1%~D

<45>

1
10K_0402_5%~D
B

LDO_SET

+FAN1_VOUT
FAN1_TACH_FB

<40> EC_32KHZ_OUT

VDDL1

7
8

FAN_OUT1
FAN_OUT1

15
14

TACH1/GPIO3
CLK_IN/GPIO2

EC_32KHZ_OUT

VDDL2

28

LDO_OUT/FAN_OUT2
LDO_OUT/FAN_OUT2

29
30

TACH2/GPIO4
PWM2/GPIO1

16
13

R154
1K_0402_5%~D

FAN1_DET#
PM_EXTTS# <8>

EMC4002-HZH C_QFN48_7X7~D

49

+3.3V_M

C237
10U_0805_10V4Z~D

+3.3V_RUN
C236
0.1U_0402_16V4Z~D

C220
0.1U_0402_16V4Z~D

C235
10U_0805_10V4Z~D

C234
0.1U_0402_16V4Z~D

C231
0.1U_0402_16V4Z~D

1
4.7K_0402_5%~D

1
10K_0402_5%~D

VSS

THERMATRIP2#

2
R150

+VCC_4002

+5V_RUN
R151
953_0402_1%~D
2

Assign Diode 6 to GPU VR controller Imon output instead of a thermistor.

+VCC_4002

21

C230
1U_0402_6.3V6K~D

U3
BC_DAT_EMC4002
BC_CLK_EMC4002

Place C222 close to Q7 as


possible.

Place C227 close


to Q9

C222 @
100P_0402_50V8K~D

Q9 Place near DIMM

C224
2200P_0402_50V7K~D

Place C221 close to the


Guardian pins as possible.

Diode circuit at DP2/DN2 is used


for skin temp sensor (placed
optimally
between CPU, MCH and MEM).

2
2
B
E Q8
MMBT3904WT1G_SC70-3~D

@ C223
100P_0402_50V8K~D

<11,49>

2
MAX8731_IINP <51>
4.7K_0402_5%~D

1
A

C243
0.1U_0402_16V4Z~D

<= 4.7K +/- 5%


10K

SMBUS
Address

2N3904

2F(r/w)

2N3904

2E(r/w)

18K

Thermistor

2F(r/w)

>= 33K

Thermistor

2E(r/w)

U68
TC7SH08FU_SSOP5~D
POWER_SW#
4 O

For Remote1
mode

Pull-up Resistor
on ADDR_MODE/XEN

THERMATRIP3#

C1050
0.1U_0402_16V4Z~D
1
2

+RTC_CELL

DOCK_PWR_SW# <40>

POWER_SW_IN# <40>
A

R157
8.2K_0402_5%~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

FAN & Thermal Sensor


Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

23

of

57

C358 2
C271 2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

EDP_CPU_LANE_N0 <7>
EDP_CPU_LANE_P0 <7>

MB_EDP_AUX
MB_EDP_AUX#

C295 1
C314 1

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

EDP_CPU_AUX <7>
EDP_CPU_AUX# <7>

2
1

+BL_PWR_SRC
C246 1

0.1U_0603_50V4Z~D

@ R165
10K_0402_5%~D

<39> LCD_VCC_TEST_EN
<17,39> ENVDD_PCH

EN_LCDPWR

Close to JEDP1.31,32,33

LCD_SMBCLK <40>
LCD_SMBDAT <40>
+3.3V_RUN
ALS_INT#
<39>

ALS_INT#

BAT54CW_SOT323-3~D

2
BIA_PWM_PCH <17>
BLM18BB221SN1D_2P~D

L92

+LCDVDD

40mil

40mil

<29>

6
5
2
1

USBP11_D-

+3.3V_RUN

IO1

USBP11-

USBP11-

1
R457

2
0_0402_5%~D

1
R513

2
0_0402_5%~D

IO2

G
1

PWR_SRC_ON
Q18
SSM3K7002FU_SC70-3~D

USBP11_D-

1
R168

2
1
47K_0402_5%~D

FDC654P: P CHANNAL

EN_INVPWR

<40> EN_INVPWR
VCC

C247
0.1U_0603_50V4Z~D

<18>

USBP11+

2
USBP11_D+

<18>

USBP11+

1
R167
100K_0402_5%~D

2
G

@ L59
DLW21SN121SQ2L_4P~D
1 1
2 2

+BL_PWR_SRC

@ U50
@U50
1 GND
1
0_0402_5%~D
1
0_0402_5%~D

DMIC0

Q17
FDC654P_SSOT6~D

+PWR_SRC

2
R180
1
2
2.2K_0402_5%~D @
@R181
R181
1
2.2K_0402_5%~D

<29>

D48
SD05.TCT_SOD323-2~D
2
1

BREATH_BLUE_LED <43>
BATT_YELLOW_LED <43>
BATT_BLUE_LED <43>

D49
SD05.TCT_SOD323-2~D
2
1

BREATH_BLUE_LED
BATT_YELLOW_LED
BATT_BLUE_LED

DMIC_CLK

DMIC0

Q15
PDTC124EU_SC70-3~D

+CAMERA_VDD

C241
0.1U_0402_16V4Z~D

CAM_MIC_CBL_DET# <18>

USBP11_D+
USBP11_DDMIC_CLK

1
4

LCD_SMBCLK
LCD_SMBDAT

1
2

D3
3

Q12
1
SI3456BDV-T1-E3_TSOP6~D
2

+3.3V_RUN

6 2

1
1

R158
100K_0402_5%~D

<39>

C242
0.1U_0402_25V4Z~D

LCD_TST

6
5
2
1
G

LCD_TST
2
1K_0402_5%~D

+15V_ALW

Q13B
DMN66D0LDW-7_SOT363-6~D

+LCDVDD

I-PEX_20505-044E-011G

LCD_SMBCLK
2
R548
LCD_SMBDAT
2
R549

+LCDVDD

EDP_CPU_LANE_N1 <7>
EDP_CPU_LANE_P1 <7>

+LCDVDD
1
R667
EDP_HPD

+3.3V_ALW

EDP_LANE_N0
EDP_LANE_P0

+LCDVDD

+15V_ALW

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

C248
1000P_0402_50V7K~D

LVDS_CBL_DET# <18>

EDP_LANE_N1 @C225
@ C225 2
EDP_LANE_P1 @
@C359
C359 2

R162
100K_0402_5%~D

LVDS_CBL_DET#

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

R161
100_0402_5%~D

CONNTST
GND
LANE1_N
LANE1_P
GND
LANE0_N
LANE0_P
GND
AUX_CH_P
AUX_CH_N
GND
LCD_VCC
LCD_VCC
LCD_VCC
TEST
GND
HPD
BL_GND
BL_GND
BL_PWR
BL_PWR
BL_PWR
BL_PWR
BL_GND
BL_GND
BL_PWM
SMBUS_CLK
SMBUS_DATA
ALS_VCC
ALS_INT#
GND
CAM_MIC_CBL_DET#
USB+
USBUSB_VCC
MIC_CLK
MIC_GND
MIC_DAT
GND
PWR_LED
BATT2_LED
BATT1_LED
GND
CONNTST

Q13A
DMN66D0LDW-7_SOT363-6~D

MGND1
MGND2
MGND3
MGND4
MGND5
MGND6
MGND7
MGND8
MGND9
MGND10
MGND11
MGND12
MGND13

C244
0.1U_0402_16V4Z~D

45
46
47
48
49
50
51
52
53
54
55
56
57

LCD Power

JEDP1

Panel backlight power control by EC

+CAMERA_VDD
USBP11_D+

PRTR5V0U2X_SOT143-4~D

@ R995
@R995
0_0603_5%~D
2

+1.05V_RUN_VTT

For Webcam
Q132

+CAMERA_VDD

2
2

EDP_HPD#

<7>

2
G
R1028
110K_0402_1%~D

EDP_HPD

EDP_HPD#

Q3
BSS138_SOT23~D

C1043
0.1U_0402_16V4Z~D

+3.3V_RUN

C250
10U_1206_16V4Z~D

C249
0.1U_0402_16V4Z~D

R1470
7.5K_0402_5%~D

PMV45EN_SOT23-3~D
R997
0_0603_5%~D
+CAMERA_VDD_R
2
1
3
1

+15V_ALW

R169
100K_0402_5%~D

Webcam PWR CTRL


D

2
G

Q133
SSM3K7002FU_SC70-3~D

CCD_OFF

1
<39>

CCD_OFF

C1044
0.1U_0402_25V4Z~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

eDP & CAM Conn


Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

24

of

57

+3.3V_RUN

AUX/DDC SW for DPC to E-DOCK

1
C337
0.1U_0402_16V4Z~D

<17> DPC_PCH_DOCK_AUX

C272
0.1U_0402_10V7K~D
DPC_AUX_C
2
1

<38> DPC_DOCK_AUX
<17> DPC_PCH_DOCK_AUX#

2
C274

<38> DPC_DOCK_AUX#

U86

DPC_DOCK_AUX
DPC_AUX#_C
1
0.1U_0402_10V7K~D
DPC_DOCK_AUX#

1
2

BE0
A0

B0

4
5

BE1
A1

VCC
BE3

14
13

A3

12

B3
BE2

11
10

+3.3V_RUN

B1

A2

GND

B2

PCH_DDPC_CTRLCLK

<17>

PCH_DDPC_CTRLDATA

<17>

PCH_DDPC_CTRLCLK
2
2.2K_0402_5%~D
PCH_DDPC_CTRLDATA
2
2.2K_0402_5%~D

1
R885
1
R886

PI3C3125LEX_TSSOP14~D

+5V_RUN

DPC_CA_DET

A
3

<38> DPC_CA_DET

DPC_CA_DET
R996
2
1M_0402_5%~D

C277
0.1U_0402_16V4Z~D

NC

DPC_CA_DET#

U8
NC7SZ04P5X_NL_SC70-5~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

DPC DPD SW for DOCK


Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

25

of

57

Display port Connector

2
1

F1
1.5A_6V_1206L150PR~D

R184
0_1206_5%~D

+3.3V_RUN

+VDISPLAY_VCC

<17> DPB_PCH_LANE_P0
<17> DPB_PCH_LANE_N0

1 0.1U_0402_10V7K~D DPB_LANE_P0_C 55
1 0.1U_0402_10V7K~D DPB_LANE_N0_C 56

<17> DPB_PCH_LANE_P1
<17> DPB_PCH_LANE_N1

C309 2
C301 2

1 0.1U_0402_10V7K~D DPB_LANE_P1_C
1 0.1U_0402_10V7K~D DPB_LANE_N1_C

<17> DPB_PCH_LANE_P2
<17> DPB_PCH_LANE_N2

C315 2
C318 2

<17> DPB_PCH_LANE_P3
<17> DPB_PCH_LANE_N3
<17> DPB_PCH_AUX
<17> DPB_PCH_AUX#
2
C1893
2
C1894

DPB_AUX_C
1
100P_0402_50V8J~D

OUT1_1P
OUT1_1N

33
32

DPB_MB_LANE_P0 C278
DPB_MB_LANE_N0 C279

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

MBDP_LANE_P0
MBDP_LANE_N0

1
2

IN_P2
IN_N2

OUT1_2P
OUT1_2N

30
29

DPB_MB_LANE_P1 C280
DPB_MB_LANE_N1 C281

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

MBDP_LANE_P1
MBDP_LANE_N1

1 0.1U_0402_10V7K~D DPB_LANE_P2_C
1 0.1U_0402_10V7K~D DPB_LANE_N2_C

4
5

IN_P3
IN_N3

OUT1_3P
OUT1_3N

25
24

DPB_MB_LANE_P2 C282
DPB_MB_LANE_N2 C283

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

MBDP_LANE_P2
MBDP_LANE_N2

C338 2
C322 2

1 0.1U_0402_10V7K~D DPB_LANE_P3_C
1 0.1U_0402_10V7K~D DPB_LANE_N3_C

6
7

IN_P4
IN_N4

OUT1_4P
OUT1_4N

22
21

DPB_MB_LANE_P3 C284
DPB_MB_LANE_N3 C285

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

MBDP_LANE_P3
MBDP_LANE_N3

C90
C91

1 0.1U_0402_10V7K~D DPB_AUX_C
1 0.1U_0402_10V7K~D DPB_AUX#_C

8
9

AUXP_S
AUXN_S

SCL1
SDA1

19
18

DPB_MB_AUX
DPB_MB_AUX#

OUT2_1P
OUT2_1N

49
48

DPB_DOCK_P0
DPB_DOCK_N0

C286
C287

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

OUT2_2P
OUT2_2N

46
45

DPB_DOCK_P1
DPB_DOCK_N1

C288
C289

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPB_DOCK_LANE_P1 <38>
DPB_DOCK_LANE_N1 <38>

OUT2_3P
OUT2_3N

43
42

DPB_DOCK_P2
DPB_DOCK_N2

C290
C291

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPB_DOCK_LANE_P2 <38>
DPB_DOCK_LANE_N2 <38>

OUT2_4P
OUT2_4N

41
40

DPB_DOCK_P3
DPB_DOCK_N3

C292
C293

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

SCL2
SDA2

38
37

DPB_DOCK_AUX
DPB_DOCK_AUX#

HPD_S

12

2
2

<38> DPB_DOCK_HPD

DPB_AUX#_C
1
100P_0402_50V8J~D
<38> DPB_DOCK_CA_DET

h

DPB_MB_HPD
DPB_DOCK_HPD

17
36

HPD1
HPD2

DPB_MB_CA_DET
DPB_DOCK_CA_DET

26
27

CAD1
CAD2

11
10

<17> PCH_SDVO_CTRLDATA
<17> PCH_SDVO_CTRLCLK
DP_PRIORITY

R190
100K_0402_5%~D

C107
0.1U_0402_10V7K~D

C98
0.1U_0402_10V7K~D

C104
0.1U_0402_10V7K~D

C92
0.1U_0402_10V7K~D

HPDSEL

@PAD~D T30
@PAD~D T27

14
15

EQ_S0/SDA_CTL
OEB/SCL_CNTL

@PAD~D T28
@PAD~D T29

34
16

EQ_S1/I2C_Address
12C_CTL_EN

@PAD~D T37

54

CEC_S

@PAD~D T38
@PAD~D T39

52
53

CEC1
CEC2

44
31
20
3

VDD4
VDD3
VDD2
VDD1

+3.3V_RUN

+3.3V_RUN

35

SDA_S
SCL_S

<39> DP_PRIORITY

IN_P1
IN_N1

CAD_S

28

P1_OC1
P1_OC0

13
23

P2_OC1
P2_OC0

50
47

Vbias

51

GND
GPAD

39
57

JDP1
DPB_MB_HPD
DPB_MB_AUX#
DPB_MB_AUX
DPB_MB_P14
DPB_MB_CA_DET
MBDP_LANE_N3
MBDP_LANE_P3
MBDP_LANE_N2

DPB_DOCK_LANE_P0 <38>
DPB_DOCK_LANE_N0 <38>

MBDP_LANE_P2
MBDP_LANE_N1
MBDP_LANE_P1
MBDP_LANE_N0
MBDP_LANE_P0

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

DPB_DOCK_LANE_P3 <38>
DPB_DOCK_LANE_N3 <38>

DP_PWR
RTN
HP_DET
AUX_CHGND
AUX_CH+
GND
CA_DET
LAN3LAN3_shield
LAN3+
LAN2LAN2_shield
LAN2+
LAN1LAN1_shield
LAN1+
LAN0LAN0_shield
LAN0+

GND
GND
GND
GND

21
22
23
24

MOLEX_105088-0001

DPB_DOCK_AUX <38>
DPB_DOCK_AUX# <38>
DPB_PCH_HPD <17>

T40 PAD~D @
P1_OC1
P1_OC0
+3.3V_RUN
P2_OC1
P2_OC0
PCH_SDVO_CTRLCLK
2
2.2K_0402_5%~D
PCH_SDVO_CTRLDATA
2
2.2K_0402_5%~D
DPB_MB_AUX#
2
100K_0402_5%~D

1
R888
1
R889
1
R278

PI3VDP8200ZBEX_TQFN56_8X8~D
DPB_PCH_HPD
110K_0402_1%~D
DPB_DOCK_CA_DET
1M_0402_5%~D
2 DPB_MB_AUX
100K_0402_5%~D
2 DPB_MB_CA_DET
1M_0402_5%~D
2 DPB_MB_HPD
110K_0402_1%~D
2 DPB_MB_P14
5.1M_0603_1%~D

1
+3.3V_RUN

R191
1

R1098
A

C275

U9
C316 2
C312 2

C1075
10U_0805_10V4Z~D

0.1U_0402_10V7K~D

DPB SW for MB & DOCK


B

P1_OC1

@ R1537
P1_OC0

@ R1538
P2_OC1
@ R1539
P2_OC0
R1516

1
4.7K_0402_5%~D

R1024

4.7K_0402_5%~D

R185

4.7K_0402_5%~D

R186

4.7K_0402_5%~D

R797

1
1
1

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Display port
Size

Rev
1.0

LA-5471P
Date:

Document Number

Wednesday, January 20, 2010

Sheet

26

of

57

2
3

1
3

NC
+5V_RUN_CRT

1
3

+5V_RUN_SYNC

2
1

R174
150_0402_1%~D
2
1

R173
150_0402_1%~D
2
1

+CRT_VCC

C254
1U_0402_6.3V6K~D

R172
150_0402_1%~D
2
1

D8
BAT1000-7-F_SOT23-3~D

R171
0_1206_5%~D

C253
4.7P_0402_50V8C~D

C252
4.7P_0402_50V8C~D

1
2
L61
BLM18BB050SN1D_0603~D
1
2
L62
BLM18BB050SN1D_0603~D
1
2
L63
BLM18BB050SN1D_0603~D
C251
4.7P_0402_50V8C~D

C996
4.7P_0402_50V8C~D

C518
4.7P_0402_50V8C~D

C390
4.7P_0402_50V8C~D

@ F2
5A_125V_R451005.MRL~D

BLUE_CRT

+5V_RUN

GREEN_CRT

2
RED_CRT

+3.3V_RUN

D7
DA204U_SOT323-3~D

D6
DA204U_SOT323-3~D

D5
DA204U_SOT323-3~D

JCRT1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

R
G
1
2

1
2

1
2

@R176
@
R176
1K_0402_5%~D

@R175
@
R175
1K_0402_5%~D

R793
2.2K_0402_5%~D

R794
2.2K_0402_5%~D

JVGA_HS
B
+CRT_VCC
JVGA_VS
M_ID2#

DAT_DDC2_CRT
CLK_DDC2_CRT

16
17

SUYIN_070546FR015H358ZR~D

HSYNC_CRT

1
R177

VSYNC_CRT

1
R178

L11
BLM18AG121SN1D_0603~D
2 HSYNC_L2 1
2
0_0402_5%~D

C258
2

0.1U_0402_16V4Z~D

2 VSYNC_L2 1
2
0_0402_5%~D
L12
BLM18AG121SN1D_0603~D

VGA SW for MB/DOCK

CRT_SWITCH

SEL1

PCH_CRT_DDC_DAT
PCH_CRT_DDC_CLK
CRT_SWITCH

VDD
VDD
VDD
VDD
VDD

4
16
23
29
32
27
25
22
20
18
12
14
26
24
21
19
17
13
15

9
10

A5
A6

30

SEL2

0B1
1B1
2B1
3B1
4B1
5B1
6B1

GND
GND
GND
GND
GPAD

0B2
1B2
2B2
3B2
4B2
5B2
6B2

3
11
28
31
33

2
VSYNC_BUF
HSYNC_BUF
RED_CRT
GREEN_CRT
BLUE_CRT
DAT_DDC2_CRT
CLK_DDC2_CRT

+5V_RUN
VSYNC_DOCK
HSYNC_DOCK
RED_DOCK
GREEN_DOCK
BLUE_DOCK
DAT_DDC2_DOCK
CLK_DDC2_DOCK

VSYNC_DOCK <38>
HSYNC_DOCK <38>
RED_DOCK
<38>
GREEN_DOCK <38>
BLUE_DOCK <38>
DAT_DDC2_DOCK <38>
CLK_DDC2_DOCK <38>

<39> CRT_SWITCH

A0
A1
A2
A3
A4

D9
SDM10U45-7_SOD523-2~D
1

<17> PCH_CRT_DDC_DAT
<17> PCH_CRT_DDC_CLK

1
2
5
6
7

@ C268
22P_0402_50V8J~D

<17> PCH_CRT_VSYNC
<17> PCH_CRT_HSYNC
<17> PCH_CRT_RED
<17> PCH_CRT_GRN
<17> PCH_CRT_BLU

@ C267
22P_0402_50V8J~D

+3.3V_RUN

U131
PCH_CRT_VSYNC
PCH_CRT_HSYNC
PCH_CRT_RED
PCH_CRT_GRN
PCH_CRT_BLU

+5V_RUN_SYNC

1
R179

P
HSYNC_BUF

HSYNC_CRT

A
3

C270
0.1U_0402_16V4Z~D
VSYNC_BUF

2
1K_0402_5%~D

U5
74AHCT1G125GW_SOT353-5~D

OE#

C264
0.1U_0402_16V4Z~D

C263
0.1U_0402_16V4Z~D

C262
0.1U_0402_16V4Z~D

C261
0.1U_0402_16V4Z~D

C260
0.1U_0402_16V4Z~D

SEL CRT
0
MB (A=B1)
1
APR/SPR(A=B2)

C259
10U_0805_10V4Z~D

OE#

+3.3V_RUN

C269
0.1U_0402_16V4Z~D

PI3V712-AZLEX_TQFN32_6X3~D

VSYNC_CRT

U6
74AHCT1G125GW_SOT353-5~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

CRT/Video switch
Size

Rev
1.0

LA-5471P
Date:

Document Number

Wednesday, January 20, 2010

Sheet

27

of

57

+5VMOD Source
+15V_ALW

1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_P1

+5V_MOD

GND1
GND2

TYCO_2-1759838-8
2

<39> MODC_EN

Pleace near ODD CONN

R319
100K_0402_5%~D

Main SATA +5V Default

<15> PSATA_PRX_DTX_P0_C
<15> PSATA_PRX_DTX_N0_C

2
C1385

TX_2P
TX_2N

PE1
PE2

9
8

3
13
17
18
19
21

GND
GND
GND
GND
GND
PAD

2
1

TX_1P
TX_1N

15
14

PSATA_PTX_DRX_P0_RP
PSATA_PTX_DRX_N0_RP

RX_2N
RX_2P

12
11

PSATA_PRX_DTX_N0_RP
PSATA_PRX_DTX_P0_RP

HDD PWR
+5V_ALW
+15V_ALW

+3.3V_RUN

<39> HDDC_EN
1

+3.3V_RUN
B

For HDD

HDD_SMBDAT_R
2
2.2K_0402_5%~D
HDD_SMBCLK_R
2
2.2K_0402_5%~D

PSATA_PTX_DRX_P0_RP C308 2
PSATA_PTX_DRX_N0_RP C307 2

1 0.01U_0402_16V7K~D SATA_PTX_DRX_P0
1 0.01U_0402_16V7K~D SATA_PTX_DRX_N0

PSATA_PRX_DTX_N0_RP
2
PSATA_PRX_DTX_P0_RP C380 2
C381

SATA_PRX_DTX_N0
1
1 0.01U_0402_16V7K~D SATA_PRX_DTX_P0
0.01U_0402_16V7K~D

GND
RX+
RXGND
TXTX+
GND

1
2
5
6

S
4

+5V_HDD

1
1

+5V_RUN
PJP16
2

@ PAD-OPEN 4x4m

Open

+5V_HDD Source
+3.3V_ALW

1
2
5
6

R463

JSATA2
1
2
3
4
5
6
7

R323
100K_0402_5%~D

3
11

D Q32
SI3456BDV-T1-E3_TSOP6~D

G
HDD_EN_5V

SDO
SDA / SDI / SDO
SCL / SPC
RSVD
CS
RSVD

1
1

12
13
14

HDD_SMBDAT_R
HDD_SMBCLK_R

INT 1
INT 2

R321
100K_0402_5%~D

R322
100K_0402_5%~D

2
2 0_0402_5%~D
0_0402_5%~D
2
2 0_0402_5%~D
0_0402_5%~D

8
9

2
4
5
10

GND
GND
GND
GND

R320
100K_0402_5%~D

C383
10U_0805_10V4Z~D

1
1

HDD_FALL_INT1
FFS_INT2

VDD_IO
VDD

+3.3V_ALW2

1
6

R1304
0_0402_5%~D

DE351DLTR

U139

DE351DLTR8_LGA14_3X5~D

R445

@ PAD-OPEN 4x4m

C382
0.1U_0603_50V4Z~D

@ R1549
@R1549
@R1550
@
R1550

5
4

Q34B
DMN66D0LDW-7_SOT363-6~D

R1547
R1548

6
10
16
20

Q34A
DMN66D0LDW-7_SOT363-6~D

3,14,15,16> MEM_SMBDATA
3,14,15,16> MEM_SMBCLK

VCC
VCC
VCC
VCC

RX_1P
RX_1N

@ R1303
0_0402_5%~D
2
1
2
1

EN

1
2

SN75LVCP412ARTJR_QFN20_4X4~D

<18,40> HDD_FALL_INT1
<19> FFS_INT2

<40> HDD_SMBDAT
<40> HDD_SMBCLK

2
C1382

PSATA_PRX_DTX_N0_C

C436
0.1U_0402_16V4Z~D

C435
10U_0805_10V4Z~D

2
C324

PSATA_PRX_DTX_P0_C

Free Fall Sensor

+3.3V_RUN

PSATA_PTX_DRX_N0_C

+5V_RUN
PJP15

0_0402_5%~D

<15> PSATA_PTX_DRX_N0_C
C

C323

PSATA_PTX_DRX_P0
0.01U_0402_16V7K~D
1 PSATA_PTX_DRX_N0
0.01U_0402_16V7K~D
1 PSATA_PRX_DTX_P0
0.01U_0402_16V7K~D
1 PSATA_PRX_DTX_N0
0.01U_0402_16V7K~D
1

+5V_MOD

R1305

<15> PSATA_PTX_DRX_P0_C

0_0402_5%~D

U96
PSATA_PTX_DRX_P0_C

@R1308
@
R1308

C1384
0.1U_0402_16V4Z~D

C1383
0.01U_0402_16V7K~D

HDD Repeater

+3.3V_RUN

R318
100K_0402_5%~D

14
15

C379
10U_0805_10V4Z~D

2
10K_0402_5%~D

Q31A
DMN66D0LDW-7_SOT363-6~D

1
R1239

+3.3V_RUN

DP
+5V
+5V
MD
GND
GND

D Q29
SI3456BDV-T1-E3_TSOP6~D

G
2 MOD_EN

ODD_DET#

<40> ODD_DET#

8
9
10
11
12
13

R317
100K_0402_5%~D

<15> SATA_ODD_PRX_DTX_P1_C

R316
100K_0402_5%~D

1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_N1

C375 2

+3.3V_ALW2

C374 2

GND
RX+
RXGND
TXTX+
GND

<15> SATA_ODD_PRX_DTX_N1_C

1
2
3
4
5
6
7

1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_P1
1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_N1

C378
0.1U_0603_50V4Z~D

C311 2
C310 2

Q31B
DMN66D0LDW-7_SOT363-6~D

C377
0.1U_0402_16V4Z~D

C376
1000P_0402_50V7K~D

<15> SATA_ODD_PTX_DRX_P1_C
<15> SATA_ODD_PTX_DRX_N1_C

+5V_MOD

+5V_ALW

JSATA1

For ODD

1
2
5
6

+5V_HDD

+3.3V_HDD

+5V_HDD

+3.3V_RUN

1
GND1
GND2

23
24
2

Open

+3.3V_HDD Source

FFS_INT2

Q118
SSM3K7002FU_SC70-3~D

DELL CONFIDENTIAL/PROPRIETARY

FFS_INT2_Q

Compal Electronics, Inc.

D10
SDM10U45-7_SOD523-2~D

Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Pleace near HDD CONN

ODD/HDD CONNECTOR
Size

Document Number

Rev
1.0

LA-5471P
Date:

@ PAD-OPEN 4x4m

Main SATA +5V Default

@R329
@
R329
100K_0402_5%~D

9@ C388
0.1U_0402_10V7K~D

9@ C387
0.1U_0402_16V4Z~D

C385
0.1U_0402_16V4Z~D

C384
1000P_0402_50V7K~D

+3.3V_RUN
PJP17
1

TYCO_1775707-3_RV

+3.3V_HDD

9@ R477
100K_0402_5%~D

FFS_INT2_Q

+5V_HDD

HDD_DET#

D 9@ Q117
SI3456BDV-T1-E3_TSOP6~D

<15> HDD_DET#

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
Reserved
GND
12V
12V
12V

9@ C79
10U_0805_10V4Z~D

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

+3.3V_HDD

Wednesday, January 20, 2010

Sheet
1

28

of

57

Speaker Connector
JSPK1

15 mils trace

Close pin 24

TYCO_1775765-6~D

RST#



Place close to JSPK1


@ D1
INT_SPK_R+

Ground V BUS

V I/O

V I/O

INT_SPK_L+

+3.3V_RUN
+5V_RUN
INT_SPK_L-

R1296
10K_0402_5%~D
1
2

+3.3V_RUN
<39> AUD_NB_MUTE

SPDIF_OUT_0

47

EAPD

35

31
32

PORT_C_L
PORT_C_R
VREFOUT_C

19
20
24

SPKR_PORT_D_L+
SPKR_PORT_D_L-

40
41

INT_SPK_L+
INT_SPK_L-

SPKR_PORT_D_RSPKR_PORT_D_R+

43
44

INT_SPK_RINT_SPK_R+

PORT_E_L
PORT_E_R

15
16

AUD_DOCK_HP_OUT_L
AUD_DOCK_HP_OUT_R

PORT_F_L
PORT_F_R

17
18

CAP-

36

CAP+

PC_BEEP

12

MONO_OUT

25

CAP2
VREFFILT

1
C453
4.7U_0603_6.3V6M~D

Close to U16 pin5

AVSS
AVSS
AVSS

CAP2
VREFFILT

21

42

PVSS

V-

34

VREG

37

Close to U16 pin6


49

RST#

32

DVDD

IOVDD

2
4
1

BCLK
DIN
MCLK

10
12

LINEL
LINER

31

RESET#

R18
0_0402_5%~D
1
2

XTALI_12MHZ

DOUT
LEFT_LO
RIGHT_LO

5
27
29

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

20
19
22
23
28
11
13
14
16
15
30

DAI_GPU_R3P_SMBCLK 8

SCL

AVSS1
AVSS2

17
26

DAI_GPU_R3P_SMBDAT 9

SDA

DRVSS

21

I2S_LRCLK

WCLK

DVSS

GPAD

33

TLV320AIC3004IRHBR_QFN32_5X5~D

DAI_GPU_R3P_SMBCLK

<40>

DAI_GPU_R3P_SMBDAT

<40>

X4

Close pin 32

VDD ST/OE

OUT

GND

+1.8V_RUN

12MHZ_15PF_SIT8102AC3333E12T~D

R340
1
1
R342

C408
1
1
C409

2 1000P_0402_50V7K~D
2 1000P_0402_50V7K~D

2K_0402_1%~D
C410
AUD_DOCK_HP_L_R 1
2
AUD_DOCK_HP_R_R
2
1
2K_0402_1%~D
C411

1U_0603_10V6K~D
2 AUD_DOCK_HP_L_C
2 AUD_DOCK_HP_R_C
1U_0603_10V6K~D

@ R1090 2

1 10M_0402_5%~D

@ R1089 2

1 10M_0402_5%~D

C1897 1
C1898 1

2 1000P_0402_50V7K~D
2 1000P_0402_50V7K~D
1U_0603_10V6K~D
R1091
2K_0402_1%~D
DOCK_MIC_IN_L_C
AUD_DOCK_MIC_IN_L_R
2
1
2
DOCK_MIC_IN_R_C
AUD_DOCK_MIC_IN_R_R
2
1
2
1U_0603_10V6K~D
R1092
2K_0402_1%~D
2
1
2
1
SPKR
<15>
C389
0.1U_0402_16V4Z~D
R327
510K_0402_5%~D
C394

0.1U_0402_16V4Z~D

Resistor

2
R828

SENSE_A

1
BEEP
510K_0402_5%~D

<40>

SENSE_B

Place closely to Pin 34

R355
100K_0402_5%~D

DAI_BCLK#

<38>

2Y#

DAI_LRCK#

<38>

R354
100K_0402_5%~D

1
R345
1K_0402_5%~D

3A

3Y#

DAI_DO#

<38>

10

4A

4Y#

DAI_12MHZ#

<38>

12

5A

5Y#

11

14

6A

6Y#

13

1
15

OE1#
OE2#

GND

+3.3V_RUN
I2S_DI#

D20
DA204U_SOT323-3~D

@
CD74HC366M96_SO16~D

2
<37,39>
<39> DOCK_HP_DET

Q40A
DMN66D0LDW-7_SOT363-6~D

5
4

AUD_HP_NB_SENSE

Q38B
DMN66D0LDW-7_SOT363-6~D

5
1

2
Q38A
DMN66D0LDW-7_SOT363-6~D

XTALI_12MHZ

2A

I2S_DO

<39> EN_I2S_NB_CODEC#

1Y#

+3.3V_RUN

R353
100K_0402_5%~D

1
2

2
6

1
1
2

+3.3V_RUN

R351
20K_0402_1%~D

+3.3V_RUN
R352
39.2K_0402_1%~D

R349
20K_0402_1%~D

R348
39.2K_0402_1%~D

R350
100K_0402_5%~D

C417
1000P_0402_50V7K~D

+3.3V_RUN

C420
1000P_0402_50V7K~D

R347
2.49K_0402_1%~D
2
1

AUD_SENSE_B

1A

I2S_LRCLK

AUD_SENSE_A

+VDDA_AVDD

R346
2.49K_0402_1%~D
2
1

Place closely to Pin 13.

I2S_BCLK
+VDDA_AVDD

VCC

U17

16

Pull-up to AVDD

2.49K

SPDIFOUT1 (DMIC0)

SPDIFOUT0

5.11K

DMIC0

PORT C

10K

+3.3V_RUN

D55
DA204U_SOT323-3~D

PORT F

D19
DA204U_SOT323-3~D

PORT B (HP1)

D18
DA204U_SOT323-3~D

20K

PORT E

PORT A (HP0)

+3.3V_RUN

C415
1U_0603_10V6K~D

39.2K

D17
DA204U_SOT323-3~D

2
@ C412
10P_0402_50V8J~D

C414
10U_0805_10V6K~D

1
@C416
@C416
0.1U_0402_10V7K~D

C455
4.7U_0603_6.3V6M~D

C457
4.7U_0603_6.3V6M~D

92HD81B1B5NLGXUAX8_QFN48_7X7~D

C413
0.1U_0402_16V7K~D

<37> AUD_MIC_SWITCH

I2S_DO
AUD_DOCK_MIC_IN_L_R
AUD_DOCK_MIC_IN_R_R

+3.3V_RUN

C1895 1
C1896 1

AUD_DOCK_MIC_IN_L
AUD_DOCK_MIC_IN_R

@ R343
10_0402_5%~D

@ R344
47_0402_5%~D

DAP

AUD_DOCK_HP_L_C
AUD_DOCK_HP_R_C

DRVDD
DRVDD

PCH_AZ_CODEC_BITCLK

PCH_AZ_CODEC_SDOUT

AVDD

18
24

AUD_PC_BEEP

22

AUD_HP_OUT_L <37>
AUD_HP_OUT_R <37>

DVSS

33
30
26

AUD_EXT_MIC_L <37>
AUD_EXT_MIC_R <37>
+VREFOUT

HP1_PORT_B_L
HP1_PORT_B_R

DMIC1/GPIO0/SPDIF_OUT_1

48

28
29
23

I2S_BCLK
I2S_DI#
XTALI_12MHZ

25

C459
1U_0603_10V6K~D

46

DMIC_CLK/GPIO1
DMIC0/GPIO2

2
AUD_SENSE_A
AUD_SENSE_B

+3.3V_RUN_I2S_VDD

C430
0.1U_0402_10V7K~D

2
4

13
14

U15

+1.8V_RUN

@ C1067
4700P_0402_25V7K~D

HDA_RST#

SENSE_A
SENSE_B

C432
0.1U_0402_10V7K~D

C679
150P_0402_50V8J~D

C676
150P_0402_50V8J~D

11

39
45

C400
10U_0805_10V6K~D

PCH_AZ_CODEC_RST#

HDA_SYNC

PVDD
PVDD

HP0_PORT_A_L
HP0_PORT_A_R
VREFOUT_A_or_F

HDA_SDO

10

27
38

C456
1U_0603_10V6K~D

AVDD
AVDD

+3.3V_RUN_IOVDD

L3
1
2
BLM21PG600SN1D_0805~D

+VDDA_PVDD
C401
0.1U_0402_10V7K~D

HDA_SDI

<24> DMIC_CLK

DVDD_IO

L4
BLM18BB221SN1D_2P~D
DMIC_CLK_R
1
2

PCH_AC_SDIN0_R
2
33_0402_5%~D
PCH_AZ_CODEC_SDOUT
<15> PCH_AZ_CODEC_SDOUT

1
R332

<15> PCH_AZ_CODEC_RST#

DVDD

HDA_BITCLK

<15> PCH_AZ_CODEC_SYNC

<15> PCH_AZ_CODEC_SDIN0

DMIC0

DVDD_CORE

PCH_AZ_CODEC_BITCLK

<15> PCH_AZ_CODEC_BITCLK

<24>

C454
1U_0603_10V6K~D

1
U16

C399
0.1U_0402_10V7K~D

C403
10U_0805_10V6K~D

+5V_RUN
L77
BLM21PG600SN1D_0805~D
+VDDA_AVDD
1
2

+CODEC_DVDD_CORE

C404
0.1U_0402_10V7K~D

C402
1U_0603_10V6K~D

C405
0.1U_0402_10V7K~D

+3.3V_RUN

L18
BLM18EG601SN1D_2P~D
1
2

IP4223CZ6_SO6~D

+3.3V_RUN

@ C1066
C393
1U_0603_10V6K~D 4700P_0402_25V7K~D

Close pin 25

C392
0.1U_0402_10V7K~D

2
INT_SPK_R-

V I/O

V I/O

C433
0.1U_0402_10V7K~D

@ C426
100P_0402_50V8J~D

@ C425
100P_0402_50V8J~D

@ C424
100P_0402_50V8J~D

@ C423
100P_0402_50V8J~D

PCH_AZ_CODEC_RST#
1
2
@ R50
33_0402_5%~D

Close pin 18

C463
1U_0603_10V6K~D

2
1
L70
47UH_CBMF1608T470K_10%~D

C431
0.1U_0402_10V7K~D

R365
100K_0402_5%~D

C397
1U_0603_10V6K~D

GND
GND

+3.3V_RUN

C398
0.1U_0402_10V7K~D

7
8

+3.3V_RUN

C428
10U_0805_10V6K~D

1
2
3
4
5
6

C458
1U_0603_10V6K~D

<19> SPEAKER_DET#

1
2
3
4
5
6

C429
0.1U_0402_10V7K~D

INT_SPK_R+
INT_SPK_RINT_SPK_L+
INT_SPK_L-

DAI_DI
DOCK_MIC_DET

<38>

<39>

Q40B
DMN66D0LDW-7_SOT363-6~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Azalia (HD) Codec


Size

Rev
1.0

LA-5471P
Date:

Document Number

Wednesday, January 20, 2010

Sheet

29

of

57

+3.3V_RUN

1
R371
0_1210_5%~D

R699
10K_0402_5%~D
2

38
39

PETp
PETn

MDI_PLUS2
MDI_MINUS2

20
21

LAN_TX2+
LAN_TX2-

41
42

PERp
PERn

MDI_PLUS3
MDI_MINUS3

23
24

LAN_TX3+
LAN_TX3-

Trace=12mil
REGCTL_PNP10

VDD3P3_OUT
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#

26
27
25

LED0
LED1
LED2

PAD~D @
PAD~D @

TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK

T176
T177

C427
10P_0402_50V8J~D
1
2

JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TCK

XTALO
XTALI

9
10

XTAL_OUT
XTAL_IN

LAN_TEST_EN

30

TEST_EN

RES_BIAS

12

RBIAS

R1200
3.01K_0402_1%~D
2
1

R59
1K_0402_5%~D
2
1

C476
33P_0402_50V8J~D

C475
33P_0402_50V8J~D

Y2
25MHZ_18PF_1Y725000CE1A~D
1
2

32
34
33
35

JTAG

@R56
@
R56
10K_0402_5%~D

LED

<39> LAN_DISABLE#_R
VDD3P3_15
VDD3P3_19
VDD3P3_29

2
4
+RSVD_VCC3P3_1 R70 2
+RSVD_VCC3P3_2 R1291 2

+3.3V_LAN_OUT

15
19
29

+3.3V_LAN_OUT_R

1 3.01K_0402_1%~D
1 3.01K_0402_1%~D

1
0_0603_5%~D

+1.0V_LAN

47
46
37

+1.0V_LAN_4

R694 2

1 0_0603_5%~D

VDD1P0_43

43

+1.0V_LAN_3

R695 2

1 0_0603_5%~D

VDD1P0_11

11

+1.0V_LAN_2

R696 2

1 0_0603_5%~D

VDD1P0_40
VDD1P0_22
VDD1P0_16
VDD1P0_8

40
22
16
8
7

VSS_EPAD

49

+1.0V_LAN

REGCTL_PNP10
+1.0V_LAN_2

+1.0V_LAN_3

WG82577LM-QLDT-A2_QFN48_6X6~D
1

R1200 Resistor Value:


3.01 kohm for Hanksville-M LOM
2.37 kohm for Hanksville-D LOM

+1.0V_LAN_4

+3.3V_M

Need to verify A3 silicon drive


power before removing C427

C786
1U_0603_10V6K~D

VDD1P0_47
VDD1P0_46
VDD1P0_37

CTRL_1P0

@ R119
0_0805_5%~D
1
2

Intel suggest to empty it.


1

2
R693

+1.05V_M

+1.0V_LAN

+3.3V_LAN

C803
0.1U_0402_10V7K~D

LAN_DISABLE_N

C480
0.1U_0402_10V7K~D

1
2
5

C802
0.1U_0402_10V7K~D

RSVD_VCC3P3_1
RSVD_VCC3P3_2
VDD3P3_IN

Q45
DCP69A-13_SOT223-3~D

C479
0.1U_0402_10V7K~D

LAN_DISABLE#_R

C801
0.1U_0402_10V7K~D

SMBus Device Address 0xC8

2 0_0402_5%~D

VCT

C800
0.1U_0402_10V7K~D

SMB_CLK
SMB_DATA

2
0_0402_5%~D

R73

C477
0.1U_0402_10V7K~D

28
31

C474
10U_0805_10V4Z~D

<19> PM_LANPHY_ENABLE

R42 1

LAN_SMBCLK
LAN_SMBDATA

<16> LAN_SMBCLK
<16> LAN_SMBDATA

SMBUS

R44
10K_0402_5%~D

LAN_TX1+
LAN_TX1-

+3.3V_LAN_R

17
18

C1118
0.01U_0402_16V7K~D

MDI_PLUS1
MDI_MINUS1

R72
4.99K_0402_1%~D
2

PE_CLKP
PE_CLKN

MDI

44
45

PCIE

LAN_TX0+
LAN_TX0-

C478
0.1U_0402_10V7K~D

<16> PCIE_PRX_GLANTX_N6
<16> PCIE_PTX_GLANRX_P6_C
<16> PCIE_PTX_GLANRX_N6_C

13
14

+3.3V_LAN

1 PCIE_PRX_GLANTX_P6_C
0.1U_0402_10V7K~D
1 PCIE_PRX_GLANTX_N6_C
0.1U_0402_10V7K~D

2
C451
2
C452

<16> PCIE_PRX_GLANTX_P6

MDI_PLUS0
MDI_MINUS0

C466
4.7U_0603_6.3V6M~D

CLK_PCIE_LAN
CLK_PCIE_LAN#

<16> CLK_PCIE_LAN
<16> CLK_PCIE_LAN#

CLK_REQ_N
PE_RST_N

C465
4.7U_0603_6.3V6M~D

<15,16> LANCLK_REQ#
<18> PLTRST_LAN#

48
36

U79
LANCLK_REQ#_R
2
0_0402_5%~D

1
R1534

C806
0.1U_0402_10V7K~D

@ R76 1

R370
0_1210_5%~D
1
2

+1.05V_M for VC10 not the


correct or complete
implementation to connect to
+1.05V SVR.

TP_LAN_JTAG_TMS
2
10K_0402_5%~D
TP_LAN_JTAG_TCK
2
10K_0402_5%~D

@ R75 1

C805
10U_0805_6.3V6M~D

+3.3V_LAN

C804
0.1U_0402_10V7K~D

+3.3V_LAN

@ R373
@R373
0_1210_5%~D

+3.3V_LAN
1
7

A1-

B3+
B3-

25
24

SW_LAN_TX3+
SW_LAN_TX3-

LAN_TX2+ 1
2
L24
22NH_0603CS-220EJTS_5%~D
LAN_TX21
2
L25
22NH_0603CS-220EJTS_5%~D

LAN_TX2+R

A2+

LAN_TX2-R

10

A2-

LEDB0
LEDB1
LEDB2

17
18
41

LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#

LAN_TX3+ 1
2
L26
22NH_0603CS-220EJTS_5%~D
LAN_TX31
2
L27
22NH_0603CS-220EJTS_5%~D

LAN_TX3+R

11

A3+

C0+
C0-

36
35

DOCK_LOM_TRD0+
DOCK_LOM_TRD0-

LAN_TX3-R

12

A3-

C1+
C1-

32
31

DOCK_LOM_TRD1+
DOCK_LOM_TRD1-

13

SEL

C2+
C2-

27
26

DOCK_LOM_TRD2+
DOCK_LOM_TRD2-

15
16
42

LEDA0
LEDA1
LEDA2

C3+
C3-

23
22

DOCK_LOM_TRD3+
DOCK_LOM_TRD3-

LEDC0
LEDC1
LEDC2

19
20
40

DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#

DOCKED
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#

Layout Notice : Place bead as


close PI3L720 as possible

5
43

FROM NIC

DOCKED

PD

SW_LAN_TX3+ <37>
SW_LAN_TX3- <37>
LAN_ACTLED_YEL# <37>
LED_100_ORG# <37>
LED_10_GRN# <37>

<40>

AUX_ON

2
2
0_0402_5%~D

2
0_0402_5%~D

R2

DOCK_LOM_TRD0+ <38>
DOCK_LOM_TRD0- <38>

<17,39> SIO_SLP_LAN#

@ R47

S
G

Q184A
DMN66D0LDW-7_SOT363-6~D

DOCK_LOM_TRD1+ <38>
DOCK_LOM_TRD1- <38>
DOCK_LOM_TRD2+ <38>
DOCK_LOM_TRD2- <38>

+3.3V_LAN

DOCK_LOM_TRD3+ <38>
DOCK_LOM_TRD3- <38>

DOCK_LOM_ACTLED_YEL# <38>
DOCK_LOM_SPD100LED_ORG# <38>
DOCK_LOM_SPD10LED_GRN# <38>

PAD_GND

1: TO DOCK
0: TO RJ45

Q184B
1
DMN66D0LDW-7_SOT363-6~D

PI3L720ZHEX_TQFN42_9X3P5~D

TO
DOCK

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

LOM_ACTLED_YEL#
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#

Intel 82577/82578 (Hanksville) / LAN SW


Size

Document Number

Rev
1.0

LA-5471P
Date:
5

C481
0.1U_0402_10V7K~D

LAN_TX1-R

SW_LAN_TX2+ <37>
SW_LAN_TX2- <37>

C482
10U_0805_6.3V6M~D

SW_LAN_TX2+
SW_LAN_TX2-

29
28

B2+
B2-

A1+

ENAB_3VLAN

LAN_TX1+R

LAN_TX1+ 1
2
L22
22NH_0603CS-220EJTS_5%~D
LAN_TX11
2
L23
22NH_0603CS-220EJTS_5%~D

R1311
100K_0402_5%~D

SW_LAN_TX1+ <37>
SW_LAN_TX1- <37>

SW_LAN_TX1+
SW_LAN_TX1-

34
33

B1+
B1-

A0-

A0+

@R394
@
R394
10K_0402_5%~D

LAN_TX0-R

@R393
@
R393
10K_0402_5%~D

LAN_TX0+R

@R392
@
R392
10K_0402_5%~D

LAN_TX0+ 1
2
L20
22NH_0603CS-220EJTS_5%~D
LAN_TX01
2
L21
22NH_0603CS-220EJTS_5%~D

SW_LAN_TX0+ <37>
SW_LAN_TX0- <37>

SW_LAN_TX0+
SW_LAN_TX0-

R1310
100K_0402_5%~D

DOCKED

38
37

6
5
2
1

+3.3V_ALW2

B0+
B0-

+15V_ALW

U25

+3.3V_LAN

Q2
SI3456BDV-T1-E3_TSOP6~D

C1414
2200P_0402_50V7K~D

<39>

+3.3V_ALW

LAN ANALOG
SWITCH
39
30
21
14
8
4
1

VDD
VDD
VDD
VDD
VDD
VDD
VDD

C462
0.1U_0402_16V4Z~D

C461
0.1U_0402_16V4Z~D

C460
0.1U_0402_16V4Z~D

Wednesday, January 20, 2010

Sheet
1

30

of

57

2
0_0402_5%~D
R481 0_0402_5%~D
1
2

IDDQ_EN

P1

CORE_PWRDN

E12

ALDO_PWRDN

GND

12

1
@ D33

DO

SPI_TXD

1
2
3
4

D
C
RESET#
S#

Q
VSS
VCC
W#

8
7
6
5

SPI_RXD
BCM5882_GPIO15

1
1

W25X32VSSIG_SO8~D

FCI_10089709-010010LF~D

1
R341

2
4.7K_0402_5%~D

1
D34
DA204U_SOT323-3~D

M45PE16-VMW6TG_SO8W8~D
BCM5882_GPIO15

3
2

+3.3V_ALW
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD3P3
L38

+2.5V_ALW_AVDD
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD2P5
L36
2

J13

POR_MONITOR

POR_EXTR

PLL_TESTOUT

T154PAD~D

T156PAD~D

K11 SWV

T155PAD~D

C13 PLL_TESTOUT

T157PAD~D

BCM5882

A6
B6

HF_RFIDTAG_VRX_P
HF_RFIDTAG_VRX_N

HF_TX_P
HF_TX_N

A8
B8

RFREADER_TXP1
RFREADER_TXN1

C5

HF_RFIDTAG_VTX

HF_RX_P
HF_RX_N

A10
B10

RFREADER_RXP
RFREADER_RXN

HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3

B9
C9
C10
E9

HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3

HF_TX_AVDD1P2
HF_RX_AVDD1P2
HF_RX_ADC_AVDD1P2

D7
F8
D10

+RFID_AVDD1P2

HF_RX_AVDD2P5
HF_TX_AVDD2P5

F9
A7

+RFID_AVDD2P5

HF_TX_AVDD3P3_D8
HF_TX_AVDD3P3_B7

D8
B7

+RFID_AVDD3P3

HF_TX_AVSS_C7
HF_TX_AVSS_C8
HF_TX_AVSS_E7

C7
C8
E7

0.01U_0402_25V7K~D

HF_RFIDTAG_VREF

B4

HF_RFIDTAG_DVDD1P2

+2.5V_ALW_AVDD

C6
E6

HF_RFIDTAG_AVDD2P5_C6
HF_RFIDTAG_AVDD2P5_E6

D6
B5

HF_RFIDTAG_AVSS_D6
HF_RFIDTAG_AVSS_B5

A4

HF_RFIDTAG_DVSS

A9
B11
E8
D9

RFID

JCS1

placement close to U32 pins: RFREADER_TXN1 &


RFREADER_TXP1, and ESD diodes should be placed
between Pi filter and connector.

RFREADER_TXN1_PI
RFREADER_TXP1_PI

<15,19> CONTACTLESS_DET#

1
2
3
4
5
6

1
2
3
4
5 G1
6 G2

7
8

TYCO_2041084-6~D


Hardware enable for USH TPM:Populate D70 & R841,
No Stuff R483.
Hardware disable for USH TPM:No Stuff D70 &
R841, Populate R483

+1.2V_ALW_AVDD
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD1P2
L37
1

DELL CONFIDENTIAL/PROPRIETARY
1

C629
0.1U_0402_16V4Z~D

DIO

RFREADER_TXN1

+3.3V_ALW

SPI_RST

SWV

+1.2V_ALW_AVDD

C628
1U_0603_10V6K~D

SPI_CLK

NOPOP

C627
1U_0603_10V6K~D

CLK

POP

L72
150NH_LLQ1608-FR15G_2%~D
1
2

C626
0.1U_0402_16V4Z~D

SPI_RST

NOPOP

C625
1U_0603_10V6K~D

GND

/HOLD

3K

C624
1U_0603_10V6K~D

R555,R633

C1

HF_RX_ADC_AVSS1
HF_RX_ADC_AVSS2

RFREADER_RXN_C

C632
0.1U_0402_16V4Z~D

BCM5882_GPIO15
3 /WP

J14

RFTAG_VRXP
RFTAG_VRXN

C1888

VCC

SPI_TXD
SPI_CLK
SPI_RST
SPI_CS

C1071

SPI_RXD

/CS

CURRENT

RSTOUT_N

HF_RX_AVSS_A9
HF_RX_AVSS_B11

390P_0603_50V8G~D

Component VOLTAGE
D31-D34

U34
SPI_CS

C643
1U_0603_10V7K~D
1
2

C631
1U_0603_10V6K~D

R1468
1.5K_0402_5%~D

DA204U_SOT323-3~D

+3.3V_ALW

+3.3V_ALW
@ U14

10
9
8
7
6
5
4
3
2
1

@ D32
DA204U_SOT323-3~D

C630
3.3U_0603_10V6K~D

SC_IO
SC_C8
SC_DET
1
2

10
9
8
7
6
5
4
3
2
1

RFID MODE

Place C718 close


to U33 pin15

GND
GND

1
2

CLKOUT

BCM5882KFBG_FBGA196~D

390P_0603_50V8G~D

SC_RST
SC_CLK
SC_C4

+3.3V_ALW

JSC1
12
11

LPC
SPI
2

+3.3V_ALW

RFREADER_TXP1

DA204U_SOT323-3~D

D3

TESTMODE

L71
150NH_LLQ1608-FR15G_2%~D
1
2

SC_RST
SC_CLK
SC_IO
SC_C4
SC_C8
SC_DET

0_0402_5%~D
47_0402_5%~D
100_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D

RFREADER_RXP_C

C644
0.1U_0402_16V4Z~D

SC_VCC should be 3X wide as


regular SC trace width to carry
~60mA max. current per ISO spec
C1031 and C646 should be placed
very close to SC cage pin

+3.3V_ALW

C1015
10P_0402_50V8J~D

C646
0.22U_0402_10V6K~D

@ C1031
10U_0805_10V4Z~D

RFREADER_RXP

@ D31

+SC_VCC

CLKOUT

BCM5882KFBG_FBGA196~D

C1887

GPAD

C639
1U_0603_10V7K~D
1
2

RFREADER_RXN

TDA8034HN_HVQFN24_4X4~D

+SC_VCC

2 0_0402_5%~D
2 0_0402_5%~D

R633
15K_0402_1%~D

XTAL2

2
2
2
2
2
2

C1070

XTAL1

24

AUX1UC
AUX2UC
I/OUC
OFFN

R773 1
R772 1
R491 1
R493 1
R492 1
R1459 1

390P_0603_50V8G~D

14
13
9
10
11
8

+SC_VCC

C718
.47U_0402_6.3V6-K~D

25

RST
CLK
I/O
AUX1
AUX2
PRESN

C633
10P_0402_50V8J~D

BCM5882_SCCLK 23

15

GPIO_4
GPIO_14
GPIO_15
GPIO_16

CONTACTLESS_DET#
SCC_CMDVCC_N_R
BCM5882_GPIO15
CLKDIV2

POR_MONITOR

R555
15K_0402_1%~D

21
22
20
19

VCC

RSTIN
CMDVCCN
EN_5V/3VN
EN_1.8VN

J1
D2
C2
B1

U32C

390P_0603_50V8G~D

AUX1UC
AUX2UC
BCM5882_IO
BCM5882_SCDET

VDDP

16

R488
3.3M_0402_5%~D

3
5
2
4

1
17

+5V_ALW
C709
10U_0805_10V6M~D

PAD~D T143

BCM5882_SCRST
SCC_CMDVCC_N
BCM5882_GPIO25
BCM5882_GPIO26

VDD(intf)
VDD

PORadj
CLKDIV1
CLKDIV2

C1014
0.1U_0402_16V4Z~D

U33
18
6
7

C706
10U_0805_10V6M~D

C620
0.1U_0402_16V4Z~D

2 PORADJ
4.7K_0402_5%~D
2 CLKDIV2
4.7K_0402_5%~D

PORADJ
CLKDIV1
CLKDIV2

POR_EXTR

SBOOT
POR_EXTR

+3.3V_ALW
C622
0.1U_0402_16V4Z~D

1
@ R538
1
R553

L14

HF_RX_TEST3

C1177
10U_0603_6.3V6M~D

1 SCC_CMDVCC_N
0_0402_5%~D

C1021
4.7U_0603_6.3V6M~D

Smart Card

SECURE_BOOT

C595 should be placed


closer
to2 pin A5
A5
1
C606
1U_0402_6.3V6K~D

C609
15P_0402_50V8J~D

R476
5.1M_0402_5%~D

+3.3V_ALW
2 PORADJ
4.7K_0402_5%~D
2 CLKDIV1
4.7K_0402_5%~D

HF_RX_TEST2
R908
0_0402_5%~D
1
2

C595

SCC_CMDVCC_N_R 2
@ R776

1
R537
1
R532

E2

USH_TESTMODE D1

HF_RX_TEST1

+2.5V_ALW_AVDD
C605
1U_0402_6.3V6K~D

+1.2V_ALW_AVDD

C1176
10U_0603_6.3V6M~D

GND

27.12MHZ_12PF_1N227120CC0B~D
C608
12P_0402_50V8J~D

+3.3V_ALW

C589
R744
4.7P_0402_50V8C~D
10_0402_5%~D
PCI_TPM_TERM
CLK_PCI_TPM
1
2
2
1

C602
1U_0402_6.3V6K~D

GND

XO

R485
4.7K_0402_5%~D

SCANACCMODE

BCM5882KFBG_FBGA196~D

C601
1U_0402_6.3V6K~D

2
1

OUT

E3

REF_XIN

2
10M_0402_5%~D

IN

1
1
1
1
1
1
1

R497 1
R496 1

SC_TEST

OVSTB

SBOOT

BCM5882_SCCLK
0_0402_5%~D
0_0402_5%~D
AUX1UC
BCM5882_GPIO25
0_0402_5%~D
BCM5882_GPIO26
0_0402_5%~D
BCM5882_SCDET
0_0402_5%~D
BCM5882_IO
0_0402_5%~D
0_0402_5%~D
BCM5882_SCRST
R775
0_0402_5%~D
2
1 SCC_CMDVCC_N

2
2
2
2
2
2
2
+SC_PWR

E1

OVSTB

SCANACCMODE
@ T158PAD~D

HF_RX_TEST0
R907
0_0402_5%~D
1
2

REF_XOUT

Y3
XI

R472
R533
R767
R766
R774
R608
R771

M11
M12
F2
F1
M2
L11
M10
N14
P14
L10

T145PAD~D
T148PAD~D
T149PAD~D
T150PAD~D

UART_TX/GPIO1

@ R899
0_0402_5%~D

WAKEUP_N

BCMGPIO_10
BCMGPIO_11
BCMGPIO_12
BCMGPIO_13

1
@ R486

L7
K1

SSP_CLK1_GPIO_10
SSP_FSS1_GPIO_11
SSP_RXD1_GPIO_12
SSP_TXD1_GPIO_13

C3
B2
A2
A1

SC_CLK
SC_FCB
SC_SEL5V_GPIO_25
SC_SEL18V_GPIO_26
SC_DET
SC_IO
SC_RST
SC_PWR_N14
SC_PWR_P14
SC_VCC

UART_RX/GPIO0
R894
0_0402_5%~D
1
2

USH_PWR_STATE#_R
2
0_0402_5%~D
1
2
R738
1K_0402_5%~D
1
2
R739
1K_0402_5%~D
1
2
R743
1K_0402_5%~D

SM BUS
Smard Card

1
R1049

PAD~D T147

SMBCLK
SMBDAT
SMBALERT_N
SMB_GPIO_0
SMB_GPIO_1

2
3

G
1

M9
L9
K9
M7
N8

SPI_CLK
SPI_CS
SPI_RXD
SPI_TXD

<37>

USH_SMBCLK
USH_SMBDAT
BCM5882_ALERT#
150_0402_5%~D
2
SMB_GPIO1

JTCE_USH
G3
G2
H1
H2

JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRSTN
JTCE

FP_RESET#

CLKDIV1

LRESET_N_GPIO_17
LPCEN
LPCPD_N_GPIO_24

JTAG_CLK_USH
JTAG_TDI_USH
JTAG_TDO_USH
JTAG_TMS_USH
JTAG_RST#_USH
JTCE_USH

UART_TX/GPIO1
UART_RX/GPIO0

5882_GPIO271
@ R1523

M3
M5
N6

JTAG_RST#_USH
R897
0_0402_5%~D
1
2

USBH_OC1

SSP_CLK0_GPIO_6
SSP_FSS0_GPIO_7
SSP_RXD0_GPIO_8
SSP_TXD0_GPIO_9

L1
M1
N1
N2
L3
L2

NC

+3.3V_ALW

USBP7+ 1
R470

2 0_0402_5%~D PLTRST1#_USH
USH_LPCEN
LPD#
2 0_0402_5%~D

USBH_DN_1
USBH_UP_1
USBH_OC_1

RST_N

JTAG_TMS_USH

FP_USBD- <37>
FP_USBD+ <37>
2
1
R844
4.7K_0402_5%~D

@ R1522
1K_0402_5%~D

25882_GPIO27
G
<39> USH_PWR_STATE#
Q210
S
2
1.5K_0402_5%~D SSM3K7002FU_SC70-3~D

LCLK
LAD0_GPIO_20
LAD1_GPIO_21
LAD2_GPIO_22
LAD3_GPIO_23
LFRAME_N_GPIO_18
LSERIRQ_GPIO_19

R1460 1
@

SI2301BDS-T1-E3_SOT23-3~D

P2
N3
M4
K5
N4
K4
L4

P11
P12
P10

G1

D4
C4
B3
A3

UART_TX_GPIO_1
UART_RX_GPIO_0
UART_CTS_GPIO_2
UART_RTS_GPIO_3

SC_DET

R615 1
2 0_0402_5%~D
R618 1
2 0_0402_5%~D
R619 1
2 0_0402_5%~D
R620 1
2 0_0402_5%~D
R621 1
2 0_0402_5%~D
2 0_0402_5%~D IRQ_SERIRQ_R

FP_USBDFP_USBD+
USBH_OC0#

P7
P8
P9

USBH_DN_0
USBH_UP_0
USBH_OC_0

BCM5882
REFCLK_XTALIN
REFCLK_XTALOUT

R466 1

BCM5882
USBD_DN
USBD_UP
USBD_ATTACH_GPIO_27

<32,39> SP_TPM_LPC_EN

P5
P6
N7

RST_N

R1048 1

USBP7-_R
USBP7+_R
5882_GPIO27

REF_XIN
G14
REF_XOUT F14

JTAG_TDO_USH
R896
0_0402_5%~D
1
2

@@@@

R1515
4.7K_0402_5%~D

<18> PLTRST_USH#

<40> USH_SMBCLK
<40> USH_SMBDAT
<39> BCM5882_ALERT#

Q209

2 0_0402_5%~D
2 0_0402_5%~D

CLK_PCI_TPM
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
@ R842 1

<16> CLK_PCI_TPM
<15,32,39,40> LPC_LAD0
<15,32,39,40> LPC_LAD1
<15,32,39,40> LPC_LAD2
<15,32,39,40> LPC_LAD3
<15,32,39,40> LPC_LFRAME#
<15,32,39,40> IRQ_SERIRQ

+3.3V_ALW_PCH

R468 1
R469 1

USBP7USBP7+

U32D
JTAG_TDI_USH

CLK
UART

U32A

<18>
<18>

2 RST_N
4.7K_0402_5%~D
2 OVSTB
4.7K_0402_5%~D
2 FP_RESET#
4.7K_0402_5%~D
2 SPI_RST
4.7K_0402_5%~D

1
R810
1
R484
1
R1034
1
R1524

2 JTAG_RST#_USH
1K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D

1
R737
1
6@ R483

+3.3V_ALW
2 PLTRST1#_USH
10K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D
2 LPD#
4.7K_0402_5%~D
2 IRQ_SERIRQ_R
4.7K_0402_5%~D
2 USH_SMBCLK
2.2K_0402_5%~D
2 USH_SMBDAT
2.2K_0402_5%~D
2 BCM5882_ALERT#
2.2K_0402_5%~D
2 USH_PWR_STATE#
4.7K_0402_5%~D
USBH_OC1
2
4.7K_0402_5%~D

1
@ R1059
1
5@ R841
1
@ R474
1
R843
1
R490
1
R626
1
R629
1
R630
1
R637

JTAG_CLK_USH
R895
0_0402_5%~D
1
2

JTAG

+3.3V_ALW

Compal Electronics, Inc.


Title

USH BCM5882 (1/2)


Size

Document Number

Rev
1.0

LA-5471P
Date:

Wednesday, January 20, 2010

Sheet
1

31

of

57

+3.3V_ALW

C1178
10U_0603_6.3V6M~D

C593
1U_0402_6.3V6K~D

C592
1U_0402_6.3V6K~D

C1179
10U_0603_6.3V6M~D

C619
1U_0402_6.3V6K~D

C618
1U_0402_6.3V6K~D

C617
1U_0402_6.3V6K~D

C616
1U_0402_6.3V6K~D

C615
1U_0402_6.3V6K~D

C614
1U_0402_6.3V6K~D

+1.2V_ALW_PLL
C613
1U_0402_6.3V6K~D

U32B

+1.2V_ALW_PLL
+1.2V_ALW_AVDD
+2.5V_ALW_AVDD
+3.3V_ALW

A14

+SC_PWR

C1027
0.1U_0402_16V4Z~D

USH BCM5882 and China TPM Z8H172T Option


Ref Des TCM Enable
TPM Enable
ALL TPM/TCM Disable

PART/PIN

TCM circuit

All 3@

POP

SIO 5028 ->SP_TPM_LPC_EN

PU R841

POP

PD R483

POP

PU R788

PU R787

POP

PD R339

POP

POP

PU R273

POP

POP

PD R922

POP

PCH GPIO39 ->TPM_ID1

+1.2V_ALW_PLL

1
+VDDC_5882

+3.3V_ALW

+VDDC_5882

PCH GPIO38 ->TPM_ID0

3@ U24

2 0_0402_5%~D
2 0_0402_5%~D

LPC_LFRAME#_R
PCI_RST#_R

3@ R909 1

2 0_0402_5%~D

CLKRUN#_R
TCM_BA1
TCM_BA0

LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
PP
BA_1
BA_0

5
12
13

NC_1
NC_2
NC_6
NC_8
NC_P

1
2
6
8
14

JETWAY_CLK14M 1
@R910
@
R910

ZTE

1
A

P13

OTP_PWR

POR_AVSS

G13

D14
E14
C14

PLL_AVDD_1P2I
PLL_AVDD_1P2O
PLL_DVDD_1P2I

D13
F3
J4
J5
J6
J7
J8
J10
J11
K7
K8

VSSC_F4
VSSC_F5
VSSC_F6
VSSC_F7
VSSC_F10
VSSC_F11
VSSC_F12
VSSC_G5
VSSC_G6
VSSC_G7
VSSC_G8
VSSC_G9
VSSC_G10
VSSC_G11
VSSC_G12
VSSC_H5
VSSC_H6
VSSC_H7
VSSC_H8
VSSC_H9
VSSC_H10
VSSC_H11
VSSC_H12
VSSC_J9
VSSC_J12
VSSC_K2
VSSC_K6
VSSC_K13
VSSC_K14
VSSC_L5
VSSC_M8
VSSC_M14
VSSC_N9
VSSC_N11
VSSC_N12
VSSC_P3
VSSC_P4

F4
F5
F6
F7
F10
F11
F12
G5
G6
G7
G8
G9
G10
G11
G12
H5
H6
H7
H8
H9
H10
H11
H12
J9
J12
K2
K6
K13
K14
L5
M8
M14
N9
N11
N12
P3
P4

VDDC_D13
VDDC_F3
VDDC_J4
VDDC_J5
VDDC_J6
VDDC_J7
VDDC_J8
VDDC_J10
VDDC_J11
VDDC_K7
VDDC_K8

E4
J2
K3
L8
N10

VDDO_33_E4
VDDO_33_J2
VDDO_33_K3
VDDO_33_L8
VDDO_33_N10
VDDO_33CORE_G4
VDDO_33CORE_H3
VDDO_33CORE_H4
VDDO_33CORE_J3
VDDO_33SC_M13
VDDO_33SC_N13

L6
M6

VDDO_LPC_L6
VDDO_LPC_M6

K10
K12
L12
L13

VDDO_SC_K10
VDDO_SC_K12
VDDO_SC_L12
VDDO_SC_L13

D5
E5

VDDO_VAR_D5
VDDO_VAR_E5

N5

VESD

+3.3V_RUN

3@

TCM_BA0
TCM_BA1

POP
R1026, R1023, C23, C1174
C1175, R910
2

Jetway

E13

JETWAY_14M <16>

3@ R1026
1K_0402_5%~D

TCM Vender

JETWAY_14M
2
22_0402_5%~D

3@ R1023
1K_0402_5%~D

@ C1175
@C1175
0.1U_0402_16V4Z~D

place R910 close to U73

SSX44-B_TSSOP28~D

PLL_DVSS

JETWAY_PIN5

JETWAY_PIN5

PLL_AVSS

R1025
10K_0402_5%~D

NC_5
NC_12
NC_13

F13
D12

R1022
10K_0402_5%~D

11
18
25
4

C23
1U_0402_6.3V6K~D

21
22
16
27
15
7
3
9

GND_11
GND_18
GND_25
GND_4

AVSS_REF

3@ R905 1
3@ R906 1

LPCPD#
LAD0
LAD1
LAD2
LAD3

B14

C_TPM_LPC_EN 28
LPC_LAD0_R
26
LPC_LAD1_R
23
LPC_LAD2_R
20
LPC_LAD3_R
17

AVSS_PLL

AVDD25_PLL_A14

AVDD33_LDO25

M13
N13

AVSS_LDO25_B13
AVSS_LDO25_C12

AVDD25_LDO12_A13
AVDD25_LDO12_B12

D11

G4
H3
H4
J3

C11
B13
C12

3@

0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D

2
2
2
2
2

3@

1
1
1
1
1

R893
R901
R902
R903
R904

3@

AVDD_2P5I
AVDD_2P5O_E10
AVDD_2P5O_E11

AVSS_LDO12

BCM5882KFBG_FBGA196~D

<16> CLK_PCI_TPM_CHA
<15,31,39,40> LPC_LFRAME#
<8,18,34,36,39,40> PCH_PLTRST#_EC
+3.3V_RUN
<15,31,39,40> IRQ_SERIRQ
<17,39,40> CLKRUN#
1
2
@ R1210
4.7K_0402_5%~D

3@
3@
3@
3@
3@

BCM5882
AVDD_1P2I_REF
AVDD_1P2O_A11
AVDD_1P2O_A12

C1174
10U_0603_6.3V6M~D

SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

3@

C1173
0.1U_0402_16V4Z~D

<31,39>
<15,31,39,40>
<15,31,39,40>
<15,31,39,40>
<15,31,39,40>

C1172
0.1U_0402_16V4Z~D

10
19
24

C1171
0.1U_0402_16V4Z~D

VDD_0
VDD_1
VDD_2

C599
1U_0402_6.3V6K~D

C1180
10U_0603_6.3V6M~D

+3.3V_RUN

C598
1U_0402_6.3V6K~D

C877
1U_0402_6.3V6K~D

China TPM: ZTE & Jetway co-lay

C873
1U_0402_6.3V6K~D

LOW:Power Down Mode


High:Working Mode

C597
1U_0402_6.3V6K~D

C596
1U_0402_6.3V6K~D

H13
E10
E11
A13
B12

C1017
4.7U_0603_6.3V6M~D

C612
1U_0402_6.3V6K~D

C875
1U_0402_6.3V6K~D

C638
1U_0402_6.3V6K~D

C637
1U_0402_6.3V6K~D

C636
1U_0402_6.3V6K~D

C635
1U_0402_6.3V6K~D

C621
1U_0402_6.3V6K~D

H14
A11
A12

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

USH BCM5882 (2/2)


Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

32

of

57

+3.3V_RUN

+3.3V_RUN

RXC

PCIe / Power /
1394 / MultiCard

C705
1500P_0402_7K~D
2
1

C707
0.022U_0402_16V7K~D

R1148
5.1K_0402_1%~D

R8 Close to U94
SDCLK/MMC_CLK
need shield GND

SDDAT1/MMCDAT1
SDDAT0/MMCDAT0

1
R36 1
R35

SDCLK/MMC_CLK

R8
SDCMD/MMCCMD

0_0402_5%~D
1

R34

C707,C705,R1148 as close
as possible to U94

2
2 0_0402_5%~D
0_0402_5%~D

SDDAT3/MMCDAT3
SDDAT2/MMCDAT2

2
0_0402_5%~D

1
R32 1
R31

2
2 0_0402_5%~D
0_0402_5%~D

PERST#
RXC
CPO
RREF

H1
H2

FLG
GND

NC
NC
NC

7
6
10

+3.3V_RUN_CARD
D13
1

SD18C

D8

AGND0
AGND1
GND0
GND1
GND2
GND3
GND4
GND5
GND8
GND9
GND10
GND11
GND12

K11
L12
A7
B7
C6
D11
E12
E13
K4
L8
M9
N9
L5

2
1

+3.3V_RUN
+3.3V_RUN_CARD

C701, C702,Close to U94.D7


C703,Close to U94.D13

C1889
1U_0402_6.3V6K~D
2

SDDAT0/MMCDAT0
SDDAT1/MMCDAT1
SDDAT2/MMCDAT2

14
12
10
9
8
6
4
3
15

DAT3/SD1
CMD/SD2
VSS1/SD3
VCC/SD4
CLK/SD5
GND/VSSS2/SD6
DAT7/SD7
DAT1/SD8
DAT2/SD9

MMCDAT4
MMCDAT5
MMCDAT6
MMCDAT7

13
11
7
5

DAT4/MMC10
DAT5/MMC11
DAT6/MMC12
DAT7/MMC13

SDCD#/MMCCD#
SDWP#
SDCD#/MMCCD#
SDWP#

17
18
2
1

CD_SW/SD
WP_SW/SD
CD_SW_TAISOL/SD
WP/SW_TAISOL/SD

16

GND_SW

19
20

CD_WP_SW/GRD
CD_WP_SW/GRD

SDCLK/MMC_CLK

Place close
to JSD1.9

FOX_2WX131A1-31DD-7F~D

only for MMC/SD

R46:
For R5U241 should be 0 ohm,
R5U242 should be 1uF
TPBIAS0
2A currect caoacity request between
R5U242 and SD slot

USBDP
USBDM
R5U242-CSP144P_CSP144~D
TPAP0
TPAN0
TPBP0
TPBN0

J1394

<19> 1394_DET#

1@ R803
0_0402_5%~D

1
2
3
4
5
6

1
2
3
4
5
6

7
8

GND
GND

<34> USBP10-_EXP
<34> USBP10+_EXP

2@ R671
0_0402_5%~D
2
1
2
1
2@ R745
0_0402_5%~D

VCC3_EN
VCC5_EN

+3.3V_RUN_CARD

USBP10-_R1
USBP10+_R1

MFCD0#
MFCD1#
MFCD2#

R399
56.2_0402_1%~D

F11
G11
G10

MFIO00
MFIO01
MFIO02
MFIO03
MFIO04
MFIO05
MFIO06
MFIO07
MFIO08
MFIO09
MFIO10
MFIO11
MFIO12
MFIO13
MFIO14

R398
56.2_0402_1%~D

<18> USBP10<18> USBP10+

1@ R802
0_0402_5%~D
2
1
2
1

VPPOUT

C493
0.33U_0603_10V7K~D

SDCD#/MMCCD#
B

EN0
EN1

R1464
150K_0402_5%~D

C767
0.1U_0402_16V4Z~D

D7

MF_VOUT
SDWP#
H13
SDDAT1/MMCDAT1_R H12
SDDAT0/MMCDAT0_R G13
MMCDAT7
G12
MMCDAT6
F13
SDCLK/MMC_CLK_R F12
D12
MMCDAT5
D10
SDCMD/MMCCMD_R C13
MMCDAT4
C12
SDDAT3/MMCDAT3_R B13
SDDAT2/MMCDAT2_R C11
A13
B12
A12

C21
47U_0805_6.3V6M~D

M12
L9
L10
L11

+CBS_VPP

SDDAT3/MMCDAT3
SDCMD/MMCCMD

PLTRST_R5U242#

+PCIE_PHY

<18> PLTRST_R5U242#

R5531V002-E2-FA_SSOP16~D

M13
M11
N11

PCIE_VIN0
PCIE_VIN1
PCIE_VIN2

AVCC_3V

CPO
RREF

U94.M13
U94.M11/N11
U94.J3
U94.C8

RXP
RXN

2
1

C491
10P_0402_50V8J~D

N10
M10

<16> PCIE_PTX_PCMRX_P3_C
<16> PCIE_PTX_PCMRX_N3_C

REFCLKP
REFCLKN
TXP
TXN

VCC3EN#
VCC5EN#

9
14
12

JSD1
C8
J3

PCIE_VOUT0
PCIE_VOUT1

PCIE_PRX_PCMTX_P3_C N12
PCIE_PRX_PCMTX_N3_C N13

to
to
to
to

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

C695,Close
C697,Close
C698,Close
C699,Close

C702
1U_0402_6.3V6K~D

C710 1
C713 1

3
4

VCCOUT
VCCOUT
VCCOUT

VCC5IN
VCC5IN

5
16

C700
10U_0805_10V4Z~D

<16> PCIE_PRX_PCMTX_P3
<16> PCIE_PRX_PCMTX_N3

C701
0.1U_0402_16V4Z~D

N8
M8

<16> CLK_PCIE_PCM
<16> CLK_PCIE_PCM#

C710,C713 as close
as possible to U94

TPAP0
TPAN0
TPBIAS0
TPBP0
TPBN0
CPS

C699
0.1U_0402_16V4Z~D

1
R1146

A5
B5
C7
A6
B6
D4

C10
J4
K3

VCC_3V0
VCC_3V1
VCC_3V2

C703
0.1U_0402_16V4Z~D

+3.3V_RUN

XI
XO

C645
0.1U_0402_16V4Z~D

TPAP0
TPAN0
TPBIAS0
TPBP0
TPBN0
2 CPS
0_0402_5%~D

A8
B8

C698
0.1U_0402_16V4Z~D

R5U241_XI
R5U241_XO

1
100_0402_5%~D

C603
0.1U_0402_16V4Z~D

2
R421

VCC3EN#
VCC5EN#

VPPEN0
VPPEN1

C603,Close to U94.J4/K3

U94A

C697
0.1U_0402_16V4Z~D

X3
24.57MHZ_12PF_X5H024576FC1HH~D
30ppm

C695
0.1U_0402_16V4Z~D

2
1
C515
15P_0402_50V8J~D

<34>
<34>

C645,Close to U94.C10

2
1
C514
15P_0402_50V8J~D

13
15

VPPEN0
VPPEN1

VCC3IN

C500
0.01U_0402_16V7K~D

Crystal close to U94

11

1@ C499
0.1U_0402_16V4Z~D

<34>
<34>

1@ U27

1@ C498
1U_0402_6.3V6K~D

@C497
@
C497
10U_0805_10V4Z~D

+5V_RUN

1@ C496
0.1U_0402_16V4Z~D

+CBS_VCC

1@ C495
1U_0402_6.3V6K~D

R401
56.2_0402_1%~D

TYCO_1775765-6~D

R403
56.2_0402_1%~D



2
C494
270P_0402_50V7K~D

R407
5.1K_0402_1%~D
1

MFIO SD8 XD MS8


00
WP
BS
D7
01
D1
D6
D0
02
D1
D5
D7
03
D4
D6
04
D5
D3
D0
CLK D2
05
06
D1
07
D5
D0
D4
08
CMD WP# D2
09
D4 WE# D6
10
D3 ALE D3
11
D2 CLE
12
- CE#
13
- RE# D7
- R/B# CLK
14

Z3008
2

MFIO Pin Assignment Table

Close to U94

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R5U241 (1/2)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

33

of

57

+1.5V_CARD
+1.5V_RUN

1
C

C708
1U_0603_25V6-K~D

Power-On-Reset: GBRST#
(Global Reset)
Note: De-asserted BEFORE
PERST# de-assertion

D9
E10
F10
E11

VPPEN1
VPPEN0
VCC3EN#
VCC5EN#

1
@R1495
@
R1495
1
2@ R683
1
@R1496
@
R1496

<39> EXPRCRD_STDBY#
<12,39,42,47> RUN_ON
<39> EXPRCRD_PWREN#

2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D

20
EXPRCRD_STBY_R#
EXPRCRD_CPPE#
CPUSB#

AUX_IN

AUX_OUT

15

OC#

19

SYSRST#
SHDN#

PERST#

STBY#

NC

10

CPPE#

GND

9
18

16
2

CARD_RESET#

+1.5V_CARD: Max. 650mA, Average 500mA


+3.3V_CARD: Max. 1300mA, Average 1000mA

+3.3V_SUS

+1.5V_CARD

1
@R791
@
R791

2
0_0402_5%~D

<33> USBP10-_EXP

1
@ R792
@R792
4 4

2
0_0402_5%~D
3 3

<33> USBP10+_EXP

2
USBP10_D-

2@
JEXP1

USBP10_D+

CPUSB#

<40> CARD_SMBCLK
<40> CARD_SMBDAT

71
72

CARD_RESET#
1
<16> EXPCLK_REQ#
2
1

2@ C1005
0.1U_0402_16V4Z~D

GND7
GND8

Close to JCBUS1 Pin18/52

PCIE_WAKE#

+3.3V_CARD

2
+CBS_VCC
+CBS_VPP

CARD_SMBCLK
CARD_SMBDAT

EXPRCRD_CPPE#

<16> CLK_PCIE_EXP#
<16> CLK_PCIE_EXP
<16> PCIE_PRX_EXPTX_N4
<16> PCIE_PRX_EXPTX_P4
<16> PCIE_PTX_EXPRX_N4_C
<16> PCIE_PTX_EXPRX_P4_C

+CBS_VCC

GND1
USB_DUSB_D+
CPUSB#
RESERVED
RESERVED
SMB_CLK
SMB_DAT
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PER_N0
PER_P0
GND
PET_N0
PET_P0
GND

27
28
29
30

GND
GND
GND
GND

MOLEX_48326-0001_RT

Close to JCBUS1 pin23,63

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MOLEX_48315-0013_RT

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R5U241 (2/2)
Size

Document Number

Rev
1.0

LA-5471P
Date:

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

1@ C543
10U_0805_10V4Z~D

GND5
GND6

1@ C542
0.01U_0402_16V7K~D

69
70

CBS_CTRDY#
CBS_CFRAME#
CBS_CAD17
CBS_CAD19
CBS_CVS2
CBS_CRST#
CBS_CSERR#
CBS_CREQ#
CBS_CC/BE3#
CBS_CAUDIO
CBS_CSTSCHNG
CBS_CAD28
CBS_CAD30
CBS_CAD31
CBS_CCD2#

<36,39> PCIE_WAKE#

+3.3V_CARDAUX

+CBS_VPP

1@ C541
0.01U_0402_16V7K~D

CBS_CCLK
CBS_CIRDY#
CBS_CC/BE2#
CBS_CAD18
CBS_CAD20
CBS_CAD21
CBS_CAD22
CBS_CAD23
CBS_CAD24
CBS_CAD25
CBS_CAD26
CBS_CAD27
CBS_CAD29
CBS_DATA2
CBS_CCLKRUN#

CBS_CCD1#
CBS_CAD2
CBS_CAD4
CBS_CAD6
CBS_DATA14
CBS_CAD8
CBS_CAD10
CBS_CVS1
CBS_CAD13
CBS_CAD15
CBS_CAD16
CBS_DATA18
CBS_CBLOCK#
CBS_CSTOP#
CBS_CDEVSEL#

2@ C1004
0.1U_0402_16V4Z~D

+CBS_VCC
+CBS_VPP

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

1@ C769
0.1U_0402_10V7K~D

CBS_CAD0
CBS_CAD1
CBS_CAD3
CBS_CAD5
CBS_CAD7
CBS_CC/BE0#
CBS_CAD9
CBS_CAD11
CBS_CAD12
CBS_CAD14
CBS_CC/BE1#
CBS_CPAR
CBS_CPERR#
CBS_CGNT#
CBS_CINT#

GND3
CCD1#
CAD2
CAD4
CAD6
CB_D14
CAD8
CAD10
CVS1
CAD13
CAD15
CAD16
CB_D18
CBLOCK#
CSTOP#
CDEVSEL#
VCC
VPP2
CTRDY#
CFRAME#
CAD17
CAD19
CVS2
CRST#
CSERR#
CREQ#
CCBE3#
CAUDIO
CSTSCHG
CAD28
CAD30
CAD31
CCD2#
GND4

Express Card

1@ JCBUS1
GND1
CAD0
CAD1
CAD3
CAD5
CAD7
CCBE0#
CAD9
CAD11
CAD12
CAD14
CCBE1#
CPAR
CPERR#
CGNT#
CINT#
VCC
VPP1
CCLK
CIRDY#
CCBE2#
CAD18
CAD20
CAD21
CAD22
CAD23
CAD24
CAD25
CAD26
CAD27
CAD29
CB_D2
CCLKRUN#
GND2

RCLKEN
TPS2231MRGPR-1_QFN20_4X4~D

2@ L64
DLW21SN900SQ2_0805~D

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

CPUSB#

R5U242-CSP144P_CSP144~D

+3.3V_CARDAUX

2@ R127
2.2K_0402_5%~D

VPPEN1
VPPEN0
VCC3EN#
VCC5EN#

CBS_CAD11
CBS_CGNT#
CBS_CAD10
CBS_CC/BE0#
CBS_CC/BE3#
CBS_CRST#
CBS_CSERR#
CBS_CCLKRUN#
CBS_CINT#
CBS_CAUDIO
CBS_CSTSCHNG
CBS_CVS2
CBS_CVS1
CBS_CCD2#
CBS_CCD1#
CBS_CREQ#
CBS_CAD13
CBS_CAD15

2@ R126
2.2K_0402_5%~D

VPPEN1
VPPEN0
VCC3EN#
VCC5EN#

C1
F4
D3
D5
L4
N1
N2
L7
G4
L6
K7
K5
E4
K8
D6
K6
D1
E1

17
<8,18,32,36,39,40> PCH_PLTRST#_EC

2@ C1007
0.1U_0402_16V4Z~D

<33>
<33>
<33>
<33>

OE#
WE#
CE2#
CE1#
REG#
RESET
WAIT#
WP#/IOIS16#
RDY/IREQ#
BVD2
BVD1
VS2#
VS1#
CD2#
CD1#
INPACK#
IORD#
IOWR#

3
5

PWR_ON_RST

CBS_CAD8
CBS_DATA14
CBS_CAD6
CBS_CAD4
CBS_CAD2
CBS_CAD31
CBS_CAD30
CBS_CAD28
CBS_CAD7
CBS_CAD5
CBS_CAD3
CBS_CAD1
CBS_CAD0
CBS_DATA2
CBS_CAD29
CBS_CAD27

3.3Vout
3.3Vout

R1150
47K_0402_1%~D

CDATA15
CDATA14
CDATA13
CDATA12
CDATA11
CDATA10
CDATA9
CDATA8
CDATA7
CDATA6
CDATA5
CDATA4
CDATA3
CDATA2
CDATA1
CDATA0

B1
B2
B3
C4
B4
M7
M6
M5
A1
A2
A3
A4
C5
N7
N6
N5

3.3Vin
3.3Vin

CARDBUS / MEDIA CARD / SD Card

+3.3V_RUN
1

@R1152
@
R1152
47K_0402_5%~D

2
4

1
2

TEST

K10

11
13

2@ C1003
10U_0805_6.3V6M~D

SROM: SPKROUT
Pull-Hi: Disable
Pull-Lo: Enable (Default)

1.5Vout
1.5Vout

2@ C1002
0.1U_0402_16V4Z~D

SPKROUT

1.5Vin
1.5Vin

+3.3V_CARD

2@ C1016
10U_0805_6.3V6M~D

<15,16> PCMCLK_REQ#

UDIO0
UDIO1
UDIO2
UDIO3
UDIO4
UDIO5
SPKROUT
WAKE#
GBRST#

2@ U52
12
14

2@ C1006
0.1U_0402_16V4Z~D

K13
2
K12
0_0402_5%~D
J13
J12
J11
H11
J10
L13
PWR_ON_RST
K9

1
R81

2
1@ R410
0_0402_5%~D

CBS_CCLK

2@ C1001
0.1U_0402_16V4Z~D

NC
GND

R410 Close to U94, CBS_CCLK need shield GND.

2@ C1012
10U_0805_6.3V6M~D

H10
B10

2@ C1000
0.1U_0402_16V4Z~D

R1151
47K_0402_5%~D

2@ C997
0.1U_0402_16V4Z~D

+3.3V_RUN

2@ C135
0.1U_0402_16V4Z~D

+3.3V_RUN

GND
GND
GND
GND
GND
GND

CBS_CAD19
CBS_CAD17
CBS_CFRAME#
CBS_CTRDY#
CBS_CDEVSEL#
CBS_CSTOP#
CBS_CBLOCK#
CBS_DATA18
CBS_CAD16
CBS_CCLK_R
CBS_CIRDY#
CBS_CPERR#
CBS_CPAR
CBS_CC/BE2#
CBS_CAD12
CBS_CAD9
CBS_CAD14
CBS_CC/BE1#
CBS_CAD18
CBS_CAD20
CBS_CAD21
CBS_CAD22
CBS_CAD23
CBS_CAD24
CBS_CAD25
CBS_CAD26

2@ C134
0.1U_0402_16V4Z~D

C9
A10
A9
B9
B11
A11

CADR25
CADR24
CADR23
CADR22
CADR21
CADR20
CADR19
CADR18
CADR17
CADR16
CADR15
CADR14
CADR13
CADR12
CADR11
CADR10
CADR9
CADR8
CADR7
CADR6
CADR5
CADR4
CADR3
CADR2
CADR1
CADR0

L2
K2
H4
J1
G3
F3
G2
F2
E2
H3
J2
G1
F1
K1
C2
C3
D2
E3
L1
M1
M2
L3
M3
N3
N4
M4

2@ C999
0.1U_0402_16V4Z~D

+3.3V_SUS

U94B

Wednesday, January 20, 2010

Sheet
1

34

of

57

2
1

1
2

R437
100K_0402_5%~D

FUNCTION FIELD.

S
4
Q47
SI3456BDV-T1-E3_TSOP6~D

1
5

<39> AUX_EN_WOWL

6
5
2
1

R1541
20K_0402_5%~D
2

1
4

D
G
3

2
3

1
2
6

R1540
20K_0402_5%~D

+3.3V_WLAN

C551
4700P_0402_25V7K~D

+3.3V_ALW

Q53B
DMN66D0LDW-7_SOT363-6~D

Q51
SI3456BDV-T1-E3_TSOP6~D

Q53A
DMN66D0LDW-7_SOT363-6~D

+15V_ALW

R432
100K_0402_5%~D

C571
4700P_0402_25V7K~D

+3.3V_RUN

@ R504
0_0805_5%~D
1
2

R431
100K_0402_5%~D

6
5
2
1

Q193B
DMN66D0LDW-7_SOT363-6~D

R452
100K_0402_5%~D
C

Q193A
DMN66D0LDW-7_SOT363-6~D

R453
100K_0402_5%~D

R451
100K_0402_5%~D
5

<39> MCARD_WWAN_PWREN

+3.3V_PCIE_SATA_WAN

+3.3V_ALW

+15V_ALW

Mini WLAN

Mini WWAN

PCIE/BKT Card
+3.3V_ALW
D

S
4
Q50
SI3456BDV-T1-E3_TSOP6~D
1

1
2
4

R1542
20K_0402_5%~D
2

1
2
6
1

1
2

6
5
2
1

C553
4700P_0402_25V7K~D

Q192B
DMN66D0LDW-7_SOT363-6~D

R450
100K_0402_5%~D

Q192A
DMN66D0LDW-7_SOT363-6~D

R436
100K_0402_5%~D

R435
100K_0402_5%~D
5

<36,39> MCARD_PCIE_BKT_PWREN

+3.3V_PCIE_BKT

+15V_ALW
B

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

PCIE PWR
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

35

of

57

+3.3V_ALW_PCH
+3.3V_ALW_PCH
USB_MCARD2_DET# 2
R447

1
@R428
@
R428

1
100K_0402_5%~D

<39> WLAN_RADIO_DIS#
+3.3V_RUN
PCIE_MCARD2_DET# 1
R449
USB_MCARD2_DET# 1
@R740
@
R740

Mini WWAN

+3.3V_PCIE_SATA_WAN
JMINI1
1 1
3 3
5 5
MINI1CLK_REQ#
7 7
9 9
CLK_PCIE_MINI1#
11 11
CLK_PCIE_MINI1
13 13
15 15
17 17
19 19
21 21
PCIE_PRX_WANTX_N1
23 23
PCIE_PRX_WANTX_P1
25 25
27 27
29 29
PCIE_PTX_WANRX_N1_C
31 31
PCIE_PTX_WANRX_P1_C
33 33
35 35
PCIE_MCARD2_DET#
37 37
39 39
41 41
43 43
45 45
47 47
49 49
51 51

<16> MINI1CLK_REQ#
<16> CLK_PCIE_MINI1#
<16> CLK_PCIE_MINI1

<16> PCIE_PRX_WANTX_N1
<16> PCIE_PRX_WANTX_P1
<16> PCIE_PTX_WANRX_N1_C
<16> PCIE_PTX_WANRX_P1_C
<18> PCIE_MCARD2_DET#

+1.5V_RUN

53

GND1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

Mini WLAN

+1.5V_RUN
+SIM_PWR

UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

+3.3V_WLAN

WWAN_RADIO_DIS#
1
2
R442
0_0402_5%~D

<41> COEX2_WLAN_ACTIVE
<41> COEX1_BT_ACTIVE

WWAN_RADIO_DIS# <39>
PCH_PLTRST#_EC <8,18,32,34,39,40>

<16> MINI2CLK_REQ#
<16> CLK_PCIE_MINI2#
<16> CLK_PCIE_MINI2

USBP5USBP5+
USB_MCARD2_DET#
LED_WWAN_OUT#

<40> HOST_DEBUG_RX
<40> MSCLK
USBP5- <18>
USBP5+ <18>
USB_MCARD2_DET# <19>
LED_WWAN_OUT# <43>

WIMAX_LED#
2
0_0402_5%~D

1
R840

1
@C552
@
C552
33P_0402_50V8J~D

<16> PCH_CL_CLK1
<16> PCH_CL_DATA1
1
<16> PCH_CL_RST1#
R448

1000

750

+3.3V_PCIE_SATA_WAN

+-9%

330

250

+1.5V

+-5%

500

375

250 (Wake enable)


5 (Not wake enable)

C562
4.7U_0603_6.3V6M~D

+-9%

C561
0.1U_0402_16V4Z~D

+3.3V

C560
0.1U_0402_16V4Z~D

Normal

C559
0.047U_0402_16V4Z~D

Normal

2 PCH_CL_RST1#_R
0_0402_5%~D

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

GND1

+3.3V_WLAN
C558
0.047U_0402_16V4Z~D

Peak

PCIE_MCARD1_DET#

<19> PCIE_MCARD1_DET#

C557
0.1U_0402_16V4Z~D

Voltage
Tolerance

Aux Power

PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C

<16> PCIE_PTX_WLANRX_N2_C
<16> PCIE_PTX_WLANRX_P2_C

COEX2_WLAN_ACTIVE

For WIMAX LED debug

Rail

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2

<16> PCIE_PRX_WLANTX_N2
<16> PCIE_PRX_WLANTX_P2

C556
0.047U_0402_16V4Z~D

PCIE_WAKE#
1
2 0_0402_5%~D
1
2 0_0402_5%~D

COEX2_WLAN_ACTIVE R440
COEX1_BT_ACTIVE
R441

1
+
2

USB_MCARD1_DET#
1
@ R741

2 PCIE_MCARD1_DET#
0_0402_5%~D

+3.3V_WLAN
+1.5V_RUN

JMINI2

<34,39> PCIE_WAKE#

C555
0.047U_0402_16V4Z~D

C563
330U_D2E_6.3VM_R25~D

C568
33P_0402_50V8J~D

C567
22U_0805_6.3VAM~D

C566
33P_0402_50V8J~D

C565
0.047U_0402_16V4Z~D

C564
0.047U_0402_16V4Z~D

2
100K_0402_5%~D
2
100K_0402_5%~D
D

1
R438
PCIE_MCARD1_DET#
1
@ R439

+3.3V_PCIE_SATA_WAN

Primary Power

+3.3V_RUN

2 PCIE_MCARD2_DET#
0_0402_5%~D

+1.5V_RUN

+3.3V_PCIE_SATA_WAN

2
100K_0402_5%~D

USB_MCARD1_DET#

2
100K_0402_5%~D

TYCO_1775861-1~D

PWR

1
R443

WLAN_RADIO_DIS#_R

D21
RB751S40T1_SOD523-2~D

C554
330U_D2E_6.3VM_R25~D

C570
0.047U_0402_16V4Z~D

C569
33P_0402_50V8J~D

PCIE_MCARD1_DET#

2
0_0402_5%~D

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

C1705 4700P_0402_25V7K~D
HOST_DEBUG_TX <40>
WLAN_RADIO_DIS#_R
2
1 PCH_PLTRST#_EC
R444
0_0402_5%~D

USBP4USBP4+
USB_MCARD1_DET#
WIMAX_LED#
LED_WLAN_OUT#
1
@ R1409

USBP4- <18>
USBP4+ <18>
USB_MCARD1_DET# <19>

2
0_0402_5%~D

MSDATA

USB_MCARD3_DET#

1
@R742
@
R742

2 PCIE_MCARD3_DET#
0_0402_5%~D

WPAN Noise
USB_MCARD3_DET#

PCIE/BKT Card
+3.3V_PCIE_BKT

+3.3V_PCIE_BKT
2

JMINI3
COEX2_WLAN_ACTIVE

PCIE_WAKE#
R454 1
2 0_0402_5%~D
MINI3CLK_REQ#_Q

SIM Card

CLK_PCIE_MINI3#
CLK_PCIE_MINI3

<16> CLK_PCIE_MINI3#
<16> CLK_PCIE_MINI3

+SIM_PWR
JSIM1
1
2
3
4

UIM_RESET
UIM_CLK

C573
1U_0402_6.3V6K~D

VCC
RST
CLK
NC

GND
VPP
I/O
NC
GND
GND
MOLEX_475531001

5
6
7
8
9
10

<16> PCIE_PRX_WPANTX_N5
<16> PCIE_PRX_WPANTX_P5

UIM_VPP
UIM_DATA

<16> PCIE_PTX_WPANRX_N5_C
<16> PCIE_PTX_WPANRX_P5_C

U31

+1.5V_RUN

1
@ R207
100K_0402_5%~D

@ Q191
SSM3K7002FU_SC70-3~D
1

<16> MINI3CLK_REQ#

2
G

<35,39> MCARD_PCIE_BKT_PWREN

MCARD_PCIE_BKT_PWREN

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

GND1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

+1.5V_RUN

Confirm with DELL about UWB

2
R456

UWB_RADIO_DIS#

1 PCH_PLTRST#_EC
0_0402_5%~D

<39>

UWB_RADIO_DIS#
USBP13USBP13+
USB_MCARD3_DET#

USBP13- <18>
USBP13+ <18>
USB_MCARD3_DET# <15>

2
R266

1
100K_0402_5%~D

+3.3V_ALW_PCH

TYCO_1775861-1~D
A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

MINI3CLK_REQ#_Q
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Mini Card
Size

Document Number

Rev
1.0

LA-5471P
Date:

C572
4700P_0402_25V7K~D
B

2
0_0402_5%~D

SRV05-4.TCT_SOT23-6~D

R1492

C577
33P_0402_50V8J~D

UIM_DATA

C576
33P_0402_50V8J~D

C575
33P_0402_50V8J~D

C574
33P_0402_50V8J~D

C585
4.7U_0603_6.3V6M~D

UIM_CLK

C584
0.1U_0402_16V4Z~D

C583
0.1U_0402_16V4Z~D

+3.3V_PCIE_BKT

C582
0.047U_0402_16V4Z~D

reserved for test

+SIM_PWR

C581
0.047U_0402_16V4Z~D

+3.3V_PCIE_BKT
C580
0.1U_0402_16V4Z~D

2
100K_0402_5%~D

UIM_VPP
C579
0.047U_0402_16V4Z~D

C578
0.047U_0402_16V4Z~D

1
R458

+3.3V_RUN

UIM_RESET

PCIE_MCARD3_DET#

<18> PCIE_MCARD3_DET#

<40>

TYCO_1775861-1~D

NA

LED_WLAN_OUT# <43>

Wednesday, January 20, 2010

Sheet
1

36

of

57

+5V_ALW

Fingerprint CONN.+3.3V_RUN
+3.3V_RUN
FP_USB_DFP_USB_D+

@ Q211
SSM3K7002FU_SC70-3~D

+3.3V_RUN

1
2
0_0402_5%~D
ESATA_EN
2
0_0402_5%~D

R1513
1
@ R1514

GND

VCC

IO2

IO1

<15> ESATA_PTX_DRX_P4_C

+3.3V_RUN

<15> ESATA_PTX_DRX_N4_C

FP_USB_D+

<15> ESATA_PRX_DTX_P4_C

PRTR5V0U2X_SOT143-4~D

ESATA_PTX_DRX_P4
0.01U_0402_16V7K~D
ESATA_PTX_DRX_N4
0.01U_0402_16V7K~D
ESATA_PRX_DTX_P4
0.01U_0402_16V7K~D
ESATA_PRX_DTX_N4
0.01U_0402_16V7K~D

1
1
1
1

EN

1
2
5
4
3
13
17
18
19
21

RX_1P
RX_1N

VCC
VCC
VCC
VCC

6
10
16
20

TX_2P
TX_2N

PE1
PE2

9
8

GND
GND
GND
GND
GND
PAD

TX_1P
TX_1N

15
14

ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP

RX_2N
RX_2P

12
11

ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP
R1300
0_0402_5%~D
2
1
2
1

<15> ESATA_PRX_DTX_N4_C

ESATA_PTX_DRX_P4_C 2
C304
ESATA_PTX_DRX_N4_C 2
C303
ESATA_PRX_DTX_P4_C 2
C1380
ESATA_PRX_DTX_N4_C 2
C1381

0_0402_5%~D

<39> EN_ESATA_RPTR

0_0402_5%~D

+3.3V_RUN

R1299

ESATA Repeater

U51
1

ESATA_EN

2
G
S

U95



FP_USB_D-

D
R28 1
2
24.9K_0402_1%~D

TPS2560DRCR_SON10_3X3~D

+3.3V_RUN Place close to


JBIO1.1

TYCO_2041070-6

<15,19> EN_ESATA_RPTR#

<18>

@ R1298

USB_OC1#

C1379
0.1U_0402_16V4Z~D

<31>

<39> ESATA_USB_PWR_EN#

10
9
8
7
6
11

GND FAULT1#
IN
OUT1
IN
OUT2
EN1#
ILIM
EN2# FAULT#2
T-PAD

C1378
0.01U_0402_16V7K~D

FP_RESET#

C770
0.1U_0402_16V4Z~D

1
2
3
4
5
6
7
8

1
2
3
4
5
6
GND
GND

U53
1
2
3
4
5

JBIO1

2
0_0402_5%~D
2
0_0402_5%~D

PJP23
JUMP_43X79
+5V_ALW_USB
2
1 1

C547
10U_1206_16V4Z~D

2
C546
0.1U_0402_16V4Z~D

1
R422
1
R423

FP_USB_D-

@ R1528
@R1528
0_0402_5%~D
2
1

+5V_ESATA/USB2

FP_USB_D+

+5V_ESATA/USB3

<31> FP_USBD-

<31> FP_USBD+

@ L29
@L29
DLW21SN121SQ2L_4P~D
1 1
2 2

SN75LVCP412ARTJR_QFN20_4X4~D
C

R1301
0_0402_5%~D

@ D4
USBP2_R+

V I/O

Ground V BUS

V I/O

V I/O

USBP2_R+5V_ESATA/USB3
+5V_ALW_USB
USBP3_R+

IP4223CZ6_SO6~D

1
+
2

I/O board CONN.


Connector need updated

C545
0.1U_0402_16V4Z~D

V I/O

C544
150U_D2_6.3VY_R15M~D

USBP3_R-

JESA1

JIO1

+3.3V_LAN

Place close
to JIO1.13

<18>

Place close
to JIO1.30

+LOM_VCT_IO
1

Place close
to JIO1.36

USBP2USBP2+

USBP2-

USBP2+

+3.3V_ALW_PCH
1

C711
0.1U_0402_16V4Z~D

1
@ R1530

2
0_0402_5%~D

1
@ R1531

2
0_0402_5%~D

USBP3_R+

+
2

ESATA_PTX_DRX_P4_RP
1
C1376
ESATA_PTX_DRX_N4_RP
1
C1377
ESATA_PRX_DTX_N4_RP
1
C549
ESATA_PRX_DTX_P4_RP
1
C550

Place close
to JIO1.35

L91 HCMC0805-900MFS_4P~D
1
2 2

GND
A+ ESATA
AGND
BB+
GND

16
17
18
19

G1
G2
G3
G4

1
@ R1532

2
0_0402_5%~D

1
@ R1533

2
0_0402_5%~D

USBP2_R1

<15> PCH_AZ_MDC_RST#
USBP2_R+

+5V_ALW

D/

PCH_AZ_MDC_RST1#

Q35
SSM3K7002FU_SC70-3~D

<39> MDC_RST_DIS#

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

USB 2.0 PORT


Size

Document Number

Rev
1.0

LA-5471P
Date:

9
10
11
12
13
14
15

2 SATA_PTX_DRX_P4
0.01U_0402_16V7K~D
2 SATA_PTX_DRX_N4
0.01U_0402_16V7K~D
2 SATA_PRX_DTX_N4
0.01U_0402_16V7K~D
2 SATA_PRX_DTX_P4
0.01U_0402_16V7K~D

FCI_10100446-003RLF

AUD_HP_OUT_L <29>
AUD_HP_OUT_R <29>

@C712
@
C712
1U_0402_6.3V6K~D

PCH_AZ_MDC_SDOUT <15>
PCH_AZ_MDC_SYNC <15>
PCH_AZ_MDC_SDIN1 <15>
AUD_HP_NB_SENSE <29,39>

<18>

C634
0.1U_0402_16V4Z~D

C768
0.1U_0402_16V4Z~D

PCH_AZ_MDC_BITCLK <15>

TYCO_1759898-1

+VREFOUT

+5V_ALW
IO_LOOP

C623
0.1U_0402_16V4Z~D

<19>

R325
100K_0402_5%~D

USBP1+
USBP1-

USBP3+

<18>
<18>

PCH_AZ_MDC_RST1#

USBP3+

USBP0+
USBP0-

5
6
7
8

USBP3_R-

<18>
<18>

USBP2_RUSBP2_R+

A_VBUS
A_DA_D+
A_GND
USB
B_VBUS
B_DB_D+
B_GND

2
G

+3.3V_LAN

<18>

USBP3-

L90 HCMC0805-900MFS_4P~D
1 1
2 2

USBP3-

<30> SW_LAN_TX0<30> SW_LAN_TX0+

<18>
+VREFOUT
AUD_MIC_SWITCH <29>
LAN_ACTLED_YEL# <30>
LED_10_GRN# <30>
LED_100_ORG# <30>
+3.3V_ALW_PCH
+LOM_VCT_IO
USB_SIDE_EN# <39>
USB_OC0#
<18>

1
2
3
4

+5V_ESATA/USB2

AUD_EXT_MIC_L <29>
AUD_EXT_MIC_R <29>

R326
10K_0402_5%~D

<30> SW_LAN_TX1+
<30> SW_LAN_TX1-

26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

DETECT_GND

C548
0.1U_0402_16V4Z~D

<30> SW_LAN_TX2<30> SW_LAN_TX2+

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

C588
150U_D2_6.3VY_R15M~D

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

<30> SW_LAN_TX3+
<30> SW_LAN_TX3-

USBP3_RUSBP3_R+

Wednesday, January 20, 2010

Sheet
1

37

of

57

JDOCK1

<26> DPB_DOCK_LANE_P2
<26> DPB_DOCK_LANE_N2
<26> DPB_DOCK_LANE_P3
<26> DPB_DOCK_LANE_N3
<26> DPB_DOCK_AUX
<26> DPB_DOCK_AUX#
<26> DPB_DOCK_HPD
+NBDOCK_DC_IN_SS
1
<27> BLUE_DOCK

C985
0.033U_0402_16V7K~D

BLUE_DOCK

Close to DOCK
Its for Enhance ESD on dock issue.

RED_DOCK

<27> RED_DOCK

GREEN_DOCK

<27> GREEN_DOCK
<27> HSYNC_DOCK
<27> VSYNC_DOCK
<40> CLK_MSE
<40> DAT_MSE

DPB_DOCK_HPD

<29> DAI_BCLK#
<29> DAI_LRCK#
<29> DAI_DI
<29> DAI_DO#

R798
110K_0402_1%~D
1

<29> DAI_12MHZ#

<39>
<39>

D_LAD0
D_LAD1

<39>
<39>

D_LAD2
D_LAD3

<39> D_LFRAME#
<39> D_CLKRUN#
<39> D_SERIRQ
<39> D_DLDRQ1#
<18> CLK_PCI_DOCK
<40> DOCK_SMB_CLK
<40> DOCK_SMB_DAT
<40,44> DOCK_SMB_ALERT#
<44> DOCK_PSID
<40> DOCK_PWR_BTN#
<39,44,50> SLICE_BAT_PRES#

SLICE_BAT_PRES#

D64
@

SM24.TCT_SOT23-3~D

3
2

153
154
155
156
157
158

Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G

PWR2
PWR2
PWR2
GND2

149
150
151
152

Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G

159
160
161
162
163
164

DOCK_AC_OFF <39,50>
DOCK_LOM_SPD100LED_ORG# <30>
DPC_CA_DET <25>

DPC_CA_DET
DPC_DOCK_LANE_P0
DPC_DOCK_LANE_N0

C361 2
C357 2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1

C355 2
C313 2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2

C360 2
C362 2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3

C364 2
C363 2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPC_PCH_LANE_P0 <17>
DPC_PCH_LANE_N0 <17>
DPC_PCH_LANE_P1 <17>
DPC_PCH_LANE_N1 <17>
DPC_PCH_LANE_P2 <17>
DPC_PCH_LANE_N2 <17>
DPC_PCH_LANE_P3 <17>
DPC_PCH_LANE_N3 <17>

DPC_DOCK_AUX <25>
DPC_DOCK_AUX# <25>
DPC_PCH_DOCK_HPD
ACAV_DOCK_SRC# <50>

2
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5

2
C586 2
C587
1
C306 1
C305

1
1 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
2
2 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D

<17>

DAT_DDC2_DOCK <27>
CLK_DDC2_DOCK <27>

C986
0.033U_0402_16V7K~D

SATA_PRX_DKTX_P5_C <15>
SATA_PRX_DKTX_N5_C <15>

Close to DOCK
Its for Enhance ESD on dock issue.

SATA_PTX_DKRX_P5_C <15>
SATA_PTX_DKRX_N5_C <15>

USBP8+ <18>
USBP8- <18>
DPC_PCH_DOCK_HPD

USBP9+ <18>
USBP9- <18>
CLK_KBD <40>
DAT_KBD <40>

R796
110K_0402_1%~D

BREATH_LED# <40,43>
DOCK_LOM_ACTLED_YEL# <30>
DOCK_LOM_TRD0+ <30>
DOCK_LOM_TRD0- <30>
DOCK_LOM_TRD1+ <30>
DOCK_LOM_TRD1- <30>

+LOM_VCT
DOCK_DET#

1
+LOM_VCT
DOCK_LOM_TRD2+ <30>
DOCK_LOM_TRD2- <30>

+PWR_SRC

DOCK_POR_RST# <40>

+VCHGR
2
C1891

DOCK_DCIN_IS+ <51>
DOCK_DCIN_IS- <51>

DOCK_DET_R#

+3.3V_ALW
R1038
100K_0402_5%~D
1
2

C42
1U_0402_6.3V6K~D

DOCK_LOM_TRD3+ <30>
DOCK_LOM_TRD3- <30>

D71
RB751S40T1_SOD523-2~D
1
2

DOCK_DET#

1
0.1U_0402_25V4Z~D

<39>
CLK_PCI_DOCK

+DOCK_PWR_BAR

C1033
0.1U_0603_50V4Z~D

C1034
0.1U_0603_50V4Z~D

@ C1899
4.7U_0805_25V6K~D

GND1
PWR1
PWR1
PWR1

DOCK_AC_OFF

C1900
4.7U_0805_25V6K~D

+DOCK_PWR_BAR

145
146
147
148

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

<26> DPB_DOCK_LANE_P1
<26> DPB_DOCK_LANE_N1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

<26> DPB_DOCK_LANE_P0
<26> DPB_DOCK_LANE_N0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

<30> DOCK_LOM_SPD10LED_GRN#
<26> DPB_DOCK_CA_DET

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

@ R462
@R462
10_0402_5%~D
2

DOCK_DET_1

@C590
@C590
4.7P_0402_50V8C~D

JAE_WD2F144WB1R300~D

Reserve for EMI test

Compal Electronics, Inc.


Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DOCKING CONN
Size

Rev
1.0

LA-5471P
Date:

Document Number

Wednesday, January 20, 2010

Sheet

38

of

57

+3.3V_ALW

PCIE_WAKE#
2
10K_0402_5%~D
SLICE_BAT_PRES#
2
100K_0402_5%~D
DCIN_CBL_DET#
2
100K_0402_5%~D

+3.3V_ALW

1
R501
1
R503
1
R862

Option for select PC


+3.3V_RUN
Card & Express Card
For PC Card stuff R882
For Experss card stuff
1@ R882
100K_0402_5%~D R883

DET_PCCRD_EXPSCRD#
PWR_BTN_BD_DET#
2
100K_0402_5%~D

1
R754

2@ R883
100K_0402_5%~D

1
C1072
10U_0805_10V4Z~D

C648
0.1U_0402_16V4Z~D

C652
0.1U_0402_16V4Z~D

C649
0.1U_0402_10V7K~D
2

C650
0.1U_0402_16V4Z~D
D

<35,36> MCARD_PCIE_BKT_PWREN
<28> HDDC_EN
<28> MODC_EN

VGA_ID_UMA

VGA_ID_DISC

UMA

SG

<36> UWB_RADIO_DIS#

5
P
TSTX_ECRX

A
G

+5V_RUN
TSRX_ECTX_BUF
TSTX_ECRX

6
7

VGA_ID_UMA
VGA_ID_DISC
UWB_RADIO_DIS#
R528
10K_0402_5%~D
2
1

BCM5882_ALERT#

TOUCH_SCREEN_DET# <15,19>

A53
B57

SYSOPT1/GPIOH[2]
SYSOPT0/GPIOH[3]

B58
A55
B59
A56

GPIOF[7]
GPIOF[6]
GPIOF[5]
GPIOF[4]

B60
A57

IRTX
IRRX

B61
A58
B62
A59

VSS

B51

DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLK_RUN#
DLDRQ1#
DSER_IRQ

B29
B28
A25
A24
B23
A19
B24
A20

DLPC

GPIOF[3]/IRMODE/IRRX3B
GPIOF[2]/IRTX2
GPIOF[1]/IRRX2
GPIOF[0]/IRMODE/IRRX3A

ECE5028-LZY_DQFN132_11X11~D

OE#

P
G

U69
TC7SH08FU_SSOP5~D
<50>

1
100K_0402_5%~D
1
100K_0402_5%~D

OUT65

SP_TPM_LPC_EN

GPIOJ[4]
VSS
GPIOK[7]
VSS
VSS
VSS
VSS
VSS
GPIOJ[1]

A6
A9
A12
A18
B27
B39
A44
B64
A64

CLK_PCI_5028

2
R1130

ME_FWP

@R506
@
R506
10_0402_5%~D

R527
10_0402_5%~D
B

@ R649
@R649
1K_0402_5%~D

1
@C654
@C654
4.7P_0402_50V8C~D

1
10K_0402_5%~D

C656
4.7P_0402_50V8C~D

+3.3V_RUN

SP_TPM_LPC_EN <31,32>

GPIO_PSID_SELECT <44>

+3.3V_ALW

SPI_WP#_SEL <15>

1
C657
4.7U_0603_6.3V6M~D

R524
100K_0402_5%~D

+3.3V_RUN

<41>

R1288
8.2K_0402_5%~D

LID_CL_SIO#

R525
10_0402_5%~D
2
1

LID_CL#

LID_CL#

<43>

TSTX_ECRX_BUF
+1.05V_RUN_VTT

CPU_CATERR#

R1289
C
2.2K_0402_5%~D
1
2
2
B
Q182 E
PMST3904_SOT323-3~D

C655
0.047U_0402_16V4Z~D
A

C1372
0.1U_0402_16V4Z~D

<8> H_CATERR#

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

TSRX_ECTX

R1078
33K_0402_5%~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

ECE5028
Size

Document Number

Rev
1.0

LA-5471P
Date:

0.75V_DDR_VTT_ON 2
R520
PBATT_OFF
2
R521

CLK_SIO_14M

D_LAD0
<38>
D_LAD1
<38>
D_LAD2
<38>
D_LAD3
<38>
D_LFRAME# <38>
D_CLKRUN# <38>
D_DLDRQ1# <38>
D_SERIRQ <38>

RUNPWROK_R1

9@ U60
SN74LVC1G125DKR_SC70-5~D

9@ U61
SN74LVC1G125DKR_SC70-5~D

1
100K_0402_5%~D

DOCK_AC_OFF <38,50>

CLK_SIO_14M <16>

B56

2
R518

LPC_LFRAME# <15,31,32,40>
PCH_PLTRST#_EC <8,18,32,34,36,40>
CLK_PCI_5028 <18>
CLKRUN#
<17,32,40>
LPC_LDRQ0# <15>
LPC_LDRQ1# <15>
IRQ_SERIRQ <15,31,32,40>

D_LAD0
D_LAD1
D_LAD2
D_LAD3
D_LFRAME#
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ

+5V_RUN

TYCO_1734595-5
9@

DOCK_AC_OFF_EC

2
1
4
D65
RB751S40T1_SOD523-2~D

LPC_LAD[0..3] <15,31,32,40>

TP_DET#

9@ C89
0.1U_0402_16V4Z~D
2
1

TSRX_ECTX_BUF 4

SIO_SLP_S3# <17>
SIO_SLP_S4# <17>

A4

PWRGD

EP

<31> BCM5882_ALERT#
+3.3V_RUN
9@ C88
0.1U_0402_16V4Z~D
1
2

JTS1

GND
GND

WWAN_RADIO_DIS#

<36> WWAN_RADIO_DIS#

CLK_SIO_14M

2
100K_0402_5%~D
2
100K_0402_5%~D

9@ C114
0.1U_0402_16V4Z~D
2
1

GPIOG[0]
GPIOG[1]
GPIOG[2]
GPIOG[3]
GPIOG[4]
GPIOG[5]
GPIOG[6]
GPIOG[7]

1
R522
1
@R558
@
R558

Discrete

1
2
3
4
5

B47
A45
SYS_LED_MASK#
B48
ALS_INT#
A46
R526 1
2 0_0402_5%~D B49
EN_ESATA_RPTR
A47
PCH_PCIE_WAKE#
B50
WLAN_RADIO_DIS#
A48

LAN_DISABLE#_R

<30> LAN_DISABLE#_R
<43> CAP_LED#
<43> SYS_LED_MASK#
<24> ALS_INT#
<19> SIO_EXT_WAKE#
<37> EN_ESATA_RPTR
<17> PCH_PCIE_WAKE#
<36> WLAN_RADIO_DIS#

OE#

VGA_ID_UMA

VGA_ID_DISC
2
100K_0402_5%~D
VGA_ID_UMA
2
100K_0402_5%~D

A32

VGA_ID_DISC

1
2
3
4
5

GPIOH[6]
GPIOH[7]

CLKI (14.318 MHz)

LPC

GPIOD[3]/VBUS_DET
GPIOD[4]/OCS1_N
GPIOD[5]/OCS2_N
GPIOD[6]/OCS3_N
GPIOD[7]/OCS4_N

B17
B18

1
@R875
@
R875
1
R881

SLICE_BAT_PRES#
PWR_BTN_BD_DET#

<38,44,50> SLICE_BAT_PRES#
<43> PWR_BTN_BD_DET#

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC
CLK_PCI_5028
CLKRUN#
LPC_LDRQ0#
LPC_LDRQ1#
IRQ_SERIRQ

+3.3V_ALW

A27
A26
B26
B25
A21
B22
A28
B20
A23
A22
B21

<40,50,51>

CPU_VTT_ON

B33
B15
MCARD_PCIE_BKT_PWREN A15
HDDC_EN
B16
MODC_EN
A16

LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0#
LDRQ1#
SER_IRQ

C1051
0.1U_0402_16V4Z~D
1
2

GPIOD[1]
GPIOD[2]

A63
B65
A61

+3.3V_ALW

1
100K_0402_5%~D

B32
A31

GPIOI[7]
GPIOI[4]
GPIOI[3]

DOCK_AC_OFF_EC

ACAV_IN_NB

2
R515

LID_CL_SIO#
CPU_VTT_ON

2
1
R514
1K_0402_5%~D

RUN_ON

ME_FWP

<48> CPU_VTT_ON

ACAV_IN_NB

1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
10K_0402_5%~D

D_DLDRQ1#

IMVP_VR_ON <49>
IMVP_PWRGD <8,49,52>
0.75V_DDR_VTT_ON <47>

AUX_EN_WOWL <35>

2
R510
2
R511
2
R512
2
R1558

D_SERIRQ

DP_PRIORITY <26>
1.8V_RUN_PWRGD <47>
RUN_ON
<12,34,42,47>

1
2
R509
0_0402_5%~D
0.75V_DDR_VTT_ON
8mil

B19

D_CLKRUN#

<30> DOCKED
<38> DOCK_DET#
<29> AUD_NB_MUTE
<35> MCARD_WWAN_PWREN
<24> LCD_VCC_TEST_EN
<24> CCD_OFF
<29,37> AUD_HP_NB_SENSE
<37> ESATA_USB_PWR_EN#

GPIO

TEST_PIN

TEST

DP_PRIORITY
1.8V_RUN_PWRGD
RUN_ON
CPU_CATERR#

+3.3V_RUN

GPIOB[0]/INIT#
GPIOB[1]/SLCTIN#
GPIOC[2]/SLCT
GPIOC[3]/PE
GPIOC[4]/BUSY
GPIOC[5]/ACK#
GPIOC[6]/ERROR#
GPIOC[7]/ALF#
GPIOD[0]/STROBE#
GPIOC[1]/PD7
GPIOC[0]/PD6
GPIOB[7]/PD5
GPIOB[6]/PD4
GPIOB[5]/PD3
GPIOB[4]/PD2
GPIOB[3]/PD1
GPIOB[2]/PD0

USB_SIDE_EN#
EN_I2S_NB_CODEC#
USH_PWR_STATE#
EN_DOCK_PWR_BAR
PANEL_BKEN_PCH
ENVDD_PCH
LCD_TST
PSID_DISABLE#

<37> USB_SIDE_EN#
<29> EN_I2S_NB_CODEC#
<31> USH_PWR_STATE#
<50> EN_DOCK_PWR_BAR
<17> PANEL_BKEN_PCH
<17,24> ENVDD_PCH
<24> LCD_TST
<44> PSID_DISABLE#

DOCK_HP_DET <29>
CRT_SWITCH <27>
ME_FWP
<15>

LCD_TST
2
100K_0402_5%~D
PANEL_BKEN_PCH
1
100K_0402_5%~D
SYS_LED_MASK#
2
10K_0402_5%~D

1
R816
2
R530
1
R658

GPIOI[6]
GPIOI[5]
GPIOI[2]
CAP_LDO
GPIOJ[0]

1
100K_0402_5%~D

DOCKED
DOCK_DET#
AUD_NB_MUTE
MCARD_WWAN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR_EN#

A33
B36
A34
B37
A35
B38
A36
A37
B40
A38
B41
A39
B42
A40
B43
A41
B44

DET_PCCRD_EXPSCRD#

DOCK_HP_DET
CRT_SWITCH
ME_FWP

B66
A62
A60
B46 +CAP_LDO
B67

<17,48>

SIO_SLP_LAN# <17,30>

GPIOE[0]/RXD
GPIOE[1]/TXD
GPIOE[2]/RTS#
GPIOE[3]/DSR#
GPIOE[4]/CTS#
GPIOE[5]/DTR#
GPIOE[6]/RI#
GPIOE[7]/DCD#

GPIO

SIO_SLP_M#

2
R756

A1
B2
A2
B3
A3
B45
A42
B4

SIO_SLP_LAN#

TSTX_ECRX_BUF
TSRX_ECTX

A5
B6
A7
B7
A8
B9
A10
B10
A11
B12

TP_DET#

GPIOH[0]
GPIOH[1]
GPIOH[4]
GPIOH[5]
BC_INT#
BC_DAT
BC_CLK

B63

GPIOJ[2]
GPIOJ[3]
GPIOJ[6]
GPIOJ[5]
GPIOK[0]
GPIOK[1]
GPIOK[3]
GPIOK[2]
GPIOK[5]
GPIOK[6]

B13
A13
B14
A14
A29
B31
A30

GPIOI[1]

SIO_SLP_M#

DOCK_MIC_DET <29>
TEMP_ALERT# <15,19>

C1

WIRELESS_ON#/OFF
2
100K_0402_5%~D
SP_TPM_LPC_EN
2
10K_0402_5%~D
ALS_INT#
2
2.2K_0402_5%~D

ECE5028-LZY

WIRELESS_ON#/OFF
BT_RADIO_DIS#
EXPRCRD_PWREN#
EXPRCRD_STDBY#
BC_INT#_ECE5028
BC_DAT_ECE5028
BC_CLK_ECE5028

DOCK_MIC_DET
TEMP_ALERT#

<43> WIRELESS_ON#/OFF
<41> BT_RADIO_DIS#
<34> EXPRCRD_PWREN#
<34> EXPRCRD_STDBY#
<40> BC_INT#_ECE5028
<40> BC_DAT_ECE5028
<40> BC_CLK_ECE5028

GPIOA[0]
GPIOA[1]
GPIOA[2]
GPIOA[3]
GPIOA[4]
GPIOA[5]
GPIOA[6]
GPIOA[7]

+3.3V_ALW

DCIN_CBL_DET#
PBATT_OFF
MDC_RST_DIS#
PCIE_WAKE#

B52
A49
B53
A50
B54
A51
B55
A52

+3.3V_ALW

B68
B35
B34
B1
B5
B8
B11

NC
NC
NC
NC
VCC1
GPIOJ[7]
GPIOK[4]

C653
0.1U_0402_16V4Z~D

+3.3V_RUN

1
R874
1
@ R788
1
R258

PBAT_PRES#

<44> PBAT_PRES#
<43> SCRL_LED#
<43> NUM_LED#
<44> DCIN_CBL_DET#
<50> PBATT_OFF
<37> MDC_RST_DIS#
<34,36> PCIE_WAKE#

USB_SIDE_EN#
2
10K_0402_5%~D
ESATA_USB_PWR_EN#
2
10K_0402_5%~D

1
R502
1
R923

VCC1
VCC1
VCC1
VCC1

U35

+3.3V_ALW2

A17
B30
A43
A54

Wednesday, January 20, 2010

Sheet
1

39

of

57

+RTC_CELL

R539
100K_0402_5%~D

1
2

B2
A2
B8
B18
A8
B9
A9
A14
B15
A17
B39
A44
B47
A54
B58

DOCK_SMB_ALERT#
FFS_INT1
CPU_DETECT#
ME_SUS_PWR_ACK
1.5V_SUS_PWRGD
PM_MEPWROK
1.05V_M_PWRGD
ALW_PWRGD_3V_5V
ODD_DET#
RESET_OUT#
M_ON
PCH_RSMRST#
AC_PRESENT
SIO_PWRBTN#

LAT_ON_SW#

1
1 R1512

= Amber LED
= Blue LED

DOCK_SMB_DAT
DOCK_SMB_CLK
LCD_SMBDAT
LCD_SMBCLK
CKG_FFS_SMBDAT
CKG_FFS_SMBCLK
DAI_GPU_R3P_SMBDAT
DAI_GPU_R3P_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
CARD_SMBDAT
CARD_SMBCLK
USH_SMBDAT
USH_SMBCLK

<18,28>

+3.3V_RUN
R1131
10K_0402_5%~D
2
1

RUNPWROK

+3.3V_ALW_PCH
AC_PRESENT

LAT_ON_SW#
ALWON
VCI_IN1#
POWER_SW_IN#
ACAV_IN
DOCK_PWR_SW#

ALWON

DOCK_SMB_DAT
DOCK_SMB_CLK
CPU_DETECT#

+3.3V_ALW

RESET_OUT#

1
R1231

2
10K_0402_5%~D

1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
100K_0402_5%~D
2
8.2K_0402_5%~D

2
R569
2
R570
2
R571
2
R572

1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D

+5V_RUN

FWP#

HDD_SMBDAT <28>
HDD_SMBCLK <28>

CLK_KBD
DAT_KBD
@ R586
10K_0402_5%~D

<45>

ACAV_IN

2
R565
2
R567
2
R1529
1
@ R5

R578
10K_0402_5%~D

CLK_MSE
DAT_MSE

A59
B63
A60
A63
B67
B1
A1

1
1 0_0402_5%~D
0_0402_5%~D

<23,50,51>
+3.3V_RUN

2
R540
2
R542

R85
1K_0402_5%~D

SYSTEM_ID

PCH_PWRGD#

1
2.2K_0402_5%~D
1
2.2K_0402_5%~D

+3.3V_ALW

R98

VSS[2]
VSS[5]
VSS[7]
VSS[8]

AGND

1
HDD_FALL_INT1
0_0402_5%~D

R98
1K_0402_5%~D
BOARD_ID

240K
130K
33K
4.3K
2K
1K

C919

REV

4700p
4700p
4700p
4700p
4700p
4700p

X00
X01
X02
X03
X04
A00

+RTC_CELL

VCI_IN1#

2
R657

1
100K_0402_5%~D

DELL CONFIDENTIAL/PROPRIETARY

<23>

Compal Electronics, Inc.

Q189
SSM3K7002FU_SC70-3~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

MEC5045
Size

Document Number

Rev
1.0

LA-5471P
Date:

LAT_ON_SW#_R <43>

2 C1886
1U_0402_6.3V6K~D

DOCK_SMB_DAT <38>
DOCK_SMB_CLK <38>
LCD_SMBDAT <24>
LCD_SMBCLK <24>
CKG_FFS_SMBDAT <6>
CKG_FFS_SMBCLK <6>
DAI_GPU_R3P_SMBDAT <29>
DAI_GPU_R3P_SMBCLK <29>
CHARGER_SMBDAT <51>
CHARGER_SMBCLK <51>
CARD_SMBDAT <34>
CARD_SMBCLK <34>
USH_SMBDAT <31>
USH_SMBCLK <31>

15mil

DOCK_SMB_ALERT# <38,44>
2
@ R635
CPU_DETECT# <8>
ME_SUS_PWR_ACK <17>
1.5V_SUS_PWRGD <46>
PM_MEPWROK <17>
1.05V_M_PWRGD <48>
ALW_PWRGD_3V_5V <45>
ODD_DET# <28>
RESET_OUT# <15,17>
M_ON
<42,48>
PCH_RSMRST# <17>
AC_PRESENT <17>
SIO_PWRBTN# <17>

+3.3V_ALW

2
10K_0402_5%~D

CKG_FFS_SMBCLK

1
2
S

2
G

@ C1885
1U_0402_6.3V6K~D

MEC5045-LZY_DQFN132_11X11~D

SYSTEM_ID for BID


function

PCH_PWRGD#
D

R560
100K_0402_5%~D

A3
B4
A4
B5
B7
A7
B48
B49
A47
B50
B52
A49
B53
A50

@ C673
4.7P_0402_50V8C~D

C671
4.7U_0603_6.3V6M~D
8mil +VR_CAP

B17
B34
A46
A48
B51
A64
B68
1
1

1
2

RESET_OUT#

<8>

CPU1.5V_S3_GATE <12>
MSDATA
<36>
MSCLK
<36>
SIO_A20GATE <19>
PS_ID
<44>
Bat2
BAT1_LED#
<43>
BAT2_LED#
<43>Bat1

CKG_FFS_SMBDAT

R640
100K_0402_5%~D

@ R588
10_0402_5%~D

DOCK_PWR_BTN# <38>

+RTC_CELL

+3.3V_M

1=JTAG interface Reset disabled


0=Reset JTAG interface

CLK_PCI_MEC

<24>

DDR_HVREF_RST_GATE

2
@ R446 2
@ R508

BGPO0
VCI_IN2#
VCI_OUT
VCI_IN1#
VCI_IN0#
VCI_OVRD_IN
VCI_IN3#

XTAL1
XTAL2
GPIO160/32KHZ_OUT

JTAG1
@SHORT PADS~D
@

Place closely pin 58

GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK

MASTER CLOCK
A61
A62
B62

2
10K_0402_5%~D

DELL PWR SW INF

NC1
NC2
NC3
NC4
NC5
NC6
NC7
1
2
1

CPU1.5V_S3_GATE
MSDATA
MSCLK
SIO_A20GATE
PS_ID
BAT1_LED#
BAT2_LED#
FWP#

@ C669
1U_0402_6.3V6K~D

2 C670
1U_0402_6.3V6K~D

C919
4700P_0402_25V7K~D

DDR_HVREF_RST_GATE

C918
4700P_0402_25V7K~D

C1040
0.1U_0402_16V4Z~D

1
1 R554

DDR_ON
<46,47>
HOST_DEBUG_TX <36>
HOST_DEBUG_RX <36>
EN_INVPWR

R550
100K_0402_5%~D

+3.3V_ALW

GPIO011/nSMI
GPIO061/LPCPD#
LDRQ#
SER_IRQ
LRESET#
PCI_CLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
CLKRUN#
GPIO100/nEC_SCI

JTAG_RST#

@ R585
100_0402_1%~D

NC NC

C675
33P_0402_50V8J~D

C674
33P_0402_50V8J~D

SYSTEM_ID
BOARD_ID
DDR_ON
HOST_DEBUG_TX
HOST_DEBUG_RX
RUNPWROK
EN_INVPWR

A6
A27
B29
A28
B30
A29
B31
A30
B32
A31
B33
A32
A33

R579
10K_0402_5%~D

MEC_XTAL2

DOCK_PWR_SW#

20mA drive pins

SMBUS INTERFACE

HOST INTERFACE

+3.3V_ALW

Y4
32.768K_12.5PF_Q13MC30610018~D
1
4

A11
A22
B35
A41
A58
A52
B3
A26

GPIO123/BCM_A_CLK
GPIO122/BCM_A_DAT
GPIO121/BCM_A_INT#
GPIO022/BCM_B_CLK
GPIO023/BCM_B_DAT
GPIO024/BCM_B_INT#
GPIO044/BCM_C_CLK
GPIO043/BCM_C_DAT
GPIO042/BCM_C_INT#
GPIO047/LSBCM_D_CLK
GPIO046/LSBCM_D_DAT
GPIO045/LSBCM_D_INT#
GPIO032/GPTP-IN3/BCM_E_CLK
GPIO31/GPTP-OUT2/BCM_E_DAT
GPIO30/GPTP-IN2/BCM_E_INT#

ACES_85204-06001~D

32 KHz
Clock
Same as Laguna

A10
B10
B14
B44
B46
B26
A25
B36
B37
B38
A34
A35
A36
A40
B43
A45
A55
A57
B61
B65

VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]

BC-LINK
A43
B45
A42
A12
B13
A13
B20
A18
B19
A20
B21
A19
A16
B16
A15

<23> EC_32KHZ_OUT

MEC_XTAL1

POWER_SW#_MB <41,43>

C659
1U_0402_6.3V6K~D

+RTC_CELL

EP

2
R587

GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO26/GPTP-IN1
GPIO27/GPTP-OUT1
GPIO041
GPIO107/nRESET_OUT
GPIO125/GPTP-IN5
GPIO126
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4

VSS_RO

MEC_XTAL2

MEC_XTAL1
1
0_0402_5%~D

2
10K_0402_5%~D

GENERAL PURPOSE I/O

C1

JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO

GPIO050/FAN_TACH1
GPIO051/FAN_TACH2
GPIO052/FAN_TACH3
GPIO053/PWM0
GPIO054/PWM1
GPIO055/PWM2
GPIO056/PWM3

B27
B60
B11
B28

2
1

1
2

1
2

1
2

1
2
1
2
3
4
5
6

R584
10K_0402_5%~D

R583
10K_0402_5%~D

R582
10K_0402_5%~D

G1
G2

R581
10K_0402_5%~D

7
8

1
2
3
4
5
6

R580
49.9_0402_1%~D

JP2

B22
A21
B23
B24
A23
B25
A24

VR_CAP[1]

<15,31,32,39> IRQ_SERIRQ
<8,18,32,34,36,39> PCH_PLTRST#_EC
<18> CLK_PCI_MEC
<15,31,32,39> LPC_LFRAME#
<15,31,32,39> LPC_LAD0
<15,31,32,39> LPC_LAD1
<15,31,32,39> LPC_LAD2
<15,31,32,39> LPC_LAD3
<17,32,39> CLKRUN#
<19> SIO_EXT_SCI#

+3.3V_ALW

SIO_EXT_SMI#
SIO_RCIN#
LPC_LDRQ#_MEC
IRQ_SERIRQ
PCH_PLTRST#_EC
CLK_PCI_MEC
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
SIO_EXT_SCI#

<19> SIO_EXT_SMI#
<19> SIO_RCIN#

ACES_85204-06001~D

FAN PWM & TACH

B54

HOST_DEBUG_TX
HOST_DEBUG_RX

BC_CLK_ECE1077
BC_DAT_ECE1077
BC_INT#_ECE1077
BEEP
SIO_SLP_S5#
ACAV_IN_NB

<41> BC_CLK_ECE1077
<41> BC_DAT_ECE1077
<41> BC_INT#_ECE1077
<29> BEEP
<17> SIO_SLP_S5#
<39,50,51> ACAV_IN_NB

GPIO145/JTAG_TDI
GPIO146/I2C1K_CLK/JTAG_TDO
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
JTAG_RST#

B66

1
2

1
2

1
2

1
2

2
2 0_0402_5%~D
0_0402_5%~D

@ R574
100K_0402_5%~D

R575
10K_0402_5%~D

MSCLK
MSDATA
1
R593 1
R577

R1410
10K_0402_5%~D

1
2
3
4
5
6

R576
10K_0402_5%~D

G1
G2

1
2
3
4
5
6

BC_CLK_ECE5028
BC_DAT_ECE5028
BC_INT#_ECE5028
BC_CLK_EMC4002
BC_DAT_EMC4002
BC_INT#_EMC4002

<39> BC_CLK_ECE5028
<39> BC_DAT_ECE5028
<39> BC_INT#_ECE5028
<23> BC_CLK_EMC4002
<23> BC_DAT_EMC4002
<23> BC_INT#_EMC4002

JTAG INTERFACE
A51
B55
B56
A53
B57

B12

<38> DOCK_POR_RST#
<42> SUS_ON
<30>
AUX_ON
<38,43> BREATH_LED#
<42> PCH_ALW_ON
<41> KYBRD_BKLT_PWM

+3.3V_ALW

JDEG1

DOCK_POR_RST#
SUS_ON
AUX_ON
BREATH_LED#
PCH_ALW_ON
KYBRD_BKLT_PWM

GPIO021/RC_ID1
GPIO020/RC_ID2
GPIO025/UART_CLK
GPIO120/UART_TX
GPIO124/GPTP-OUT5/UART_RX
VCC_PRWGD
GPIO060/KBRST
GPIO101/ECGP_SCLK
GPIO103/ECGP_SIN
GPIO105/ECGP_SOUT
GPIO102/HSPI_SCLK
GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI
GPIO116/MSDATA
GPIO117/MSCLK
GPIO127/A20M
GPIO153/LED3
GPIO156/LED1
GPIO157/LED2
nFWP

JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
C1053
0.1U_0402_16V4Z~D
1
2

MISC INTERFACE

GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
GPIO110/PS2_CLK2/GPTP-IN6
GPIO111/PS2_DAT2/GPTP-OUT6
GPIO112/PS2_CLK1A
GPIO113/PS2_DAT1A
GPIO114/PS2_CLK0A
GPIO115/PS2_DAT0A
GPIO154/I2C1C_DATA/PS2_CLK1B
GPIO155/I2C1C_CLK/PS2_DAT1B

B64
VBAT

MSDATA
1
10K_0402_5%~D
M_ON
1
100K_0402_5%~D
AUX_ON
2
2.7K_0402_5%~D
DDR_ON
2
100K_0402_5%~D
SUS_ON
2
100K_0402_5%~D
PCH_ALW_ON
2
100K_0402_5%~D
DOCK_POR_RST#
2
100K_0402_5%~D
EN_INVPWR
2
100K_0402_5%~D

2
R589
2
R561
1
R563
1
R564
1
R566
1
R568
1
R1046
1
R595

C651
0.1U_0402_16V4Z~D

R27

C668
0.1U_0402_16V4Z~D

C667
0.1U_0402_16V4Z~D

DAI_GPU_R3P_SMBDAT
2
2.2K_0402_5%~D
DAI_GPU_R3P_SMBCLK
2
2.2K_0402_5%~D

A5
B6
A37
B40
A38
B41
A39
B42
B59
A56

<23> DOCK_PWR_SW#

PS/2 INTERFACE

SML1_SMBDATA
SML1_SMBCLK
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK

<16> SML1_SMBDATA
<16> SML1_SMBCLK
<41> CLK_TP_SIO
<41> DAT_TP_SIO
<38> CLK_KBD
<38> DAT_KBD
<38> CLK_MSE
<38> DAT_MSE
<44> PBAT_SMBDAT
<44> PBAT_SMBCLK

C666
0.1U_0402_16V4Z~D

U36

C665
0.1U_0402_16V4Z~D

+3.3V_RUN
R26

C664
0.1U_0402_16V4Z~D

2
PBAT_SMBDAT
2
2.2K_0402_5%~D
PBAT_SMBCLK
2
2.2K_0402_5%~D
LPC_LDRQ#_MEC
1
100K_0402_5%~D
CHARGER_SMBDAT
2
2.2K_0402_5%~D
CHARGER_SMBCLK
2
2.2K_0402_5%~D

1
R551
1
R552
2
@ R837
1
R29
1
R30

C660
0.1U_0402_16V4Z~D

C662
0.1U_0402_16V4Z~D

+RTC_CELL_VBAT
1

C661
0.1U_0402_16V4Z~D

1
2
R544
0_0402_5%~D

C663
10U_0805_10V4Z~D

1
1 R541

+3.3V_ALW

+RTC_CELL

@ C658
1U_0402_6.3V6K~D

POWER_SW_IN#

<23> POWER_SW_IN#

BC_DAT_ECE5028
2
100K_0402_5%~D
BC_DAT_EMC4002
1
100K_0402_5%~D
BC_DAT_ECE1077
1
100K_0402_5%~D
DOCK_SMB_ALERT#
1
10K_0402_5%~D

1
R543
2
R545
2
R546
2
R547

7
8

+3.3V_ALW

Wednesday, January 20, 2010

Sheet
1

40

of

57

BlueTooth

+3.3V_RUN
C1703
1
2

Touch Pad

0.1U_0402_16V4Z~D

+3.3V_ALW

<18> BT_DET#
<36> COEX1_BT_ACTIVE
R614
4.7K_0402_5%~D

R1565

1
2
3
4
5
6
7
8
9
10
11
12
Shield
Shield

@ FAN
Part Number

100P_0402_50V8J~D

@ C1334

Description
FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA

DC28A000800

MOLEX_48227-1211
R1407
10K_0402_5%~D

USBP6USBP6+

C1704
33P_0402_50V8J~D

<18>
<18>

CLK_TP_SIO <40>

C683
10P_0402_50V8J~D

DAT_TP_SIO <40>
CLK_TP_SIO

C682
10P_0402_50V8J~D

C681
10P_0402_50V8J~D

C680
10P_0402_50V8J~D

DAT_TP_SIO

2
100_0603_5%~D
2
100_0603_5%~D

1
R1564

TP_CLK

TP_DATA

<43> BT_ACTIVE
<39> BT_RADIO_DIS#
<36> COEX2_WLAN_ACTIVE

R613
4.7K_0402_5%~D

JBT
1
2
3
4
5
6
7
8
9
10
11
12
13
14



@ Speak
Part Number

Description
SPK PACK ZJX 2.0W 4 OHM FG

PK230003Q0L

@SM CARD BODY


Part Number
SP070007V0L

Description
S SOCKET TYCO 1770551-1
10P H5.9 SMART

@PCMCIA BODY
Part Number
Description
PCMCIA TYCO
1759096-1

DC000001Q0L

@ MDC wire set cable


Part Number

Power Switch for debug

Touch Pad Conn. Pitch=0.5

DC02000CS0L

Description
H-CONN SET ZGX
MB-MDC

@ T/P wire set cable


JTP1

+3.3V_ALW

<40> BC_CLK_ECE1077
<40> BC_DAT_ECE1077
<40> BC_INT#_ECE1077
+3.3V_ALW
+3.3V_RUN
+5V_RUN
+5V_ALW
<40> KYBRD_BKLT_PWM

Place close to
JTP1.7

<39>

TP_CLK
TP_DATA
KYBRD_BKLT_PWM

TP_DET#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

Part Number
+5V_RUN

<40,43> POWER_SW#_MB

C678
0.1U_0402_16V4Z~D

C771
0.1U_0402_16V4Z~D

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

POWER_SW#_MB

DC02000840L
1

Part Number
2

PWRSW1
@SHORT PADS~D
@ Place

DC020003Y0L

on Top

@ LVDS cable
Part Number

Place close to
JTP1.11

DC02000870L
1

@ RTC BATT
Part Number

+5V_ALW

G1
G2

HRS_FH12-16S-0P5SH(55)~D

GC20323MX00

C1413
0.1U_0402_16V4Z~D

17
18

H-CONN SET ZJX


MB-B/T-TP-FP

@ LVDS cable

1
@C684
@
C684
100P_0402_50V8J~D

Description

Description
H-CONN SET ZJX MB-LCD
14 WXGA+(-1ch)

Description
H-CONN SET ZJX
MB-LCD 14 WXGA+(-2ch)

Description
BATT CR2032 3V
220MAH MAXELL
B

PWRSW2
@SHORT PADS~D

Place
on Bottom
@

Place close to
JTP1.12

D54
SD05.TCT_SOD323-2~D

D53
SD05.TCT_SOD323-2~D

TP_CLK
TP_DATA

Place close to JTP1 connector


A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Touch PAD/Int KB/LID


Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

41

of

57

Q152
SSM3K7002FU_SC70-3~D
S

D
Q1
SSM3K7002FU_SC70-3~D

2
G
3

1
3

2
G

2
G

1.05V_RUN_ENABLE

S
2

1
R1307
20K_0402_5%~D
2

1
2
1

1
3

2
1

2
1
3

1
2
1
3

1
2
1
3

Q183
SI7658ADP-T1-GE3_POWERPAK8-5~D
+1.05V_RUN
1
2
5
3
C1411
10U_0805_10V4Z~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

POWER CONTROL
Size

Document Number

Rev
1.0

LA-5471P
Date:

C1191
4700P_0402_25V7K~D

C1412
2200P_0402_50V7K~D

2
G

+1.05V_M

R1306
100K_0402_5%~D

Q78
SSM3K7002FU_SC70-3~D

R624
22_0603_5%~D

+DDR_CHG

2
G

<12> RUN_ON_CPU1.5VS3#

Q202
SSM3K7002FU_SC70-3~D

+1.5V_CPU_VDDQ_CHG

2
G

R1502
220_0402_5%~D

Q80
SSM3K7002FU_SC70-3~D

+15V_ALW

@ R636
39_0402_5%~D
+1.05V_RUN_CHG

Q79
SSM3K7002FU_SC70-3~D

2
G

+0.75V_DDR_VTT

+1.05V_RUN

R625
39_0603_5%~D
+3.3V_RUN_CHG

RUN_ON_ENABLE#

Q77
SSM3K7002FU_SC70-3~D

+3.3V_RUN

@R623
@
R623
1K_0402_5%~D
+1.5V_RUN_CHG

ALW_ON_3.3V# 2
G

Q76
SSM3K7002FU_SC70-3~D

Q81
SSM3K7002FU_SC70-3~D

@R622
@
R622
1K_0402_5%~D
+5V_RUN_CHG

+3.3V_SUS_CHG

2
G

Q82
@ R628
SSM3K7002FU_SC70-3~D
1K_0402_5%~D
+3.3V_ALWPCH_CHG

@ R627
1K_0402_5%~D

SUS_ON_3.3V#
A

2
G

+1.05V_RUN Source

+1.5V_RUN

+3.3V_ALW_PCH

1.5V_RUN_ENABLE

1
2
G

+1.5V_CPU_VDDQ

R1224
100K_0402_5%~D

M_ON_3.3V#

C696
4700P_0402_25V7K~D

Q151
SIS406DN-T1-GE3_POWERPAK8-5~D
+1.5V_RUN
1
2
3
5
1
R1225
20K_0402_5%~D

+15V_ALW

Discharg Circuit
+3.3V_SUS

C693
470P_0402_50V7K~D

+1.5V_RUN Source

1
2

@ R612
20K_0402_5%~D
2

S
3

M_ENABLE

+5V_RUN

+3.3V_M

2
0_0402_5%~D

Q72
SSM3K7002FU_SC70-3~D
R616
39_0603_5%~D
+3.3V_M_CHG

1
Q64
SSM3K7002FU_SC70-3~D

C1190
10U_0805_10V4Z~D

6
5
2
1

Q68A
DMN66D0LDW-7_SOT363-6~D

M_ON

@ R607
@R607
20K_0402_5%~D

+1.5V_MEM

Q68B
DMN66D0LDW-7_SOT363-6~D

M_ON_3.3V# 5

+3.3V_M

C694
10U_0805_10V4Z~D

R610
100K_0402_5%~D

R611
100K_0402_5%~D

<40,48>

2
1

1
@ R1536

2
G

Discharg Circuit

Q66
SI3456BDV-T1-E3_TSOP6~D

+15V_ALW
+3.3V_ALW2

2
RUN_ON_CPU1.5VS3#

2
2
0_0402_5%~D G

1
R1535

+3.3VM Source

1
2
6
1

RUN_ON_ENABLE#

Q208
BSS138_SOT23~D

C692
4700P_0402_25V7K~D

+3.3V_ALW

0.75V_VR_EN <47>

+3.3V_RUN

3.3V_RUN_ENABLE
1

2
6

2
100K_0402_5%~D

R1508

Q62A
DMN66D0LDW-7_SOT363-6~D

SUS_ON

<8> 1.5V_PWRGD

R606
100K_0402_5%~D

<40>

R605
20K_0402_5%~D
2

G
3

Q61
NTMS4107NR2G_SO8~D
8
1
7
2
6
3
5

+15V_ALW

C691
10U_0805_10V4Z~D

Q62B
DMN66D0LDW-7_SOT363-6~D

+3.3V_RUN Source
+3.3V_ALW

SUS_ENABLE

<12,34,39,47> RUN_ON

R600
20K_0402_5%~D

+3.3V_SUS

C690
10U_0805_10V4Z~D

Q60
SI3456BDV-T1-E3_TSOP6~D
6
5
2
1

R603
100K_0402_5%~D

+3.3V_ALW2

Q56B
DMN66D0LDW-7_SOT363-6~D

+3.3V_ALW

SUS_ON_3.3V#

Q56A
DMN66D0LDW-7_SOT363-6~D

+3.3V_SUS Source

+15V_ALW

R604
100K_0402_5%~D

5V_RUN_ENABLE

1
1

Q57A
DMN66D0LDW-7_SOT363-6~D

1
2
3

RUN_ON_ENABLE#

C688
3300P_0402_50V7K~D

+5V_RUN

8
7
6
5

R597
100K_0402_5%~D
R599
100K_0402_5%~D

Q55
FDS8878_SO8~D

Q57B
DMN66D0LDW-7_SOT363-6~D

R601
20K_0402_5%~D
2

2
ALW_ON_3.3V#

+5V_ALW

C686
10U_0805_10V4Z~D

ALW_ENABLE

<21> ALW_ENABLE

+15V_ALW

C689
2200P_0402_50V7K~D

C687
10U_0805_10V4Z~D

R598
100K_0402_5%~D

+3.3V_ALW2

6
5
2
1

+3.3V_ALW2

<40> PCH_ALW_ON

+5VRUN Source

Q54
+3.3V_ALW_PCH
SI3456BDV-T1-E3_TSOP6~D

+3.3V_ALW

+15V_ALW

+3.3V_ALW_PCH Source

DC/DC Interface

R602
100K_0402_5%~D

Wednesday, January 20, 2010

Sheet
1

42

of

57

@ H7
@H_3P0

@ H8
@H_3P0

13
14

@ H9
@H_3P0

@ H10
@H_3P2

@ H11
@H_3P2

@ H12
@H_3P2

@ H13
@H_3P2

FIDUCIAL MARK~D

@ H14
@H_3P1X2P1

@FD2
@
FD2
1

CLIP2
EMI_CLIP

FIDUCIAL MARK~D
@FD3
@
FD3
1

GND

TYCO_1-2041070-2~D

@FD1
@
FD1
1

CLIP1
EMI_CLIP
GND

GND
GND

Fiducial Mark

EMI CLIP

@ H6
@H_3P0

@ H5
@H_3P0

@ H4
@H_3P0

FIDUCIAL MARK~D

+5V_ALW

@ H15
@H_5P2

@ H16
@H_3P2

2 SATA_LED
1K_0402_5%~D

1
R659

@FD4
@
FD4
1

MASK_BASE_LEDS#

@ H3
@H_3P0

Q92
PDTA114EU_SC70-3~D

Q93
SSM3K7002FU_SC70-3~D

@ H2
@H_3P0

<15> SATA_ACT#_R

WIRELESS_ON#/OFF

<39> WIRELESS_ON#/OFF

@ H1
@H_3P0

1
SATA_ACT# 2

<40,41> POWER_SW#_MB
<40> LAT_ON_SW#_R

1
2
3
4
5
6
7
8
9
10
11
12

C685
0.1U_0402_16V4Z~D

LID_CL#
BREATH_BLUE_LED_SNIFF

LID_CL#

R654
10K_0402_5%~D

1
2
3
4
5
6
7
8
9
10
11
12

<39>

+5V_RUN

PWR_BTN_BD_DET#

<39> PWR_BTN_BD_DET#
+3.3V_ALW

HDD LED solution for Blue LED

+3.3V_RUN

JSNIF1

@ H18
@H_4P5N

FIDUCIAL MARK~D

<39> CAP_LED#

Q120
PDTA114EU_SC70-3~D
R556
1K_0402_5%~D
R_CAP_LED#
1
2

Keyboard Status LED

Q97
PDTA114EU_SC70-3~D

<39> SCRL_LED#

1
D45

3
R1004
100K_0402_5%~D

BAT2_LED

U63
NC7SZ04P5X_NL_SC70-5~D

Q139
PDTA114EU_SC70-3~D

+3.3V_ALW

+3.3V_ALW

0.1U_0402_16V4Z~D

Q94
PDTA114EU_SC70-3~D

R1005
100K_0402_5%~D

BAT1_LED

U64
NC7SZ04P5X_NL_SC70-5~D

3
Q145B
DMN66D0LDW-7_SOT363-6~D

R1002
1K_0402_5%~D
1
2
BATT_BLUE_LED <24>

2
Q140
PDTA114EU_SC70-3~D

D43
2 WPAN_LED
2
1
1K_0402_5%~D
LTST-C191ZBKT-Q_BLUE~D

<39> SYS_LED_MASK#

R1003
150_0402_5%~D
1
2
BATT_YELLOW_LED <24>

1
R661

SSM3K7002FU_SC70-3~D
S

MASK_BASE_LEDS#
<BOM Structure>

+3.3V_ALW

Q143
2

<40> BAT1_LED#

Q95
SSM3K7002FU_SC70-3~D

NC

3
3

BAT1_LED#

5
P

NC

10K_0402_5%~D

R748
2

BT_ACTIVE

<41> BT_ACTIVE

R82
47K_0402_5%~D
1

C1337
1
2

Q101
PDTA114EU_SC70-3~D
R666
150_0402_5%~D
1
2

Q145A
DMN66D0LDW-7_SOT363-6~D
+3.3V_ALW

C1059

+5V_RUN

WPAN LED solution for Blue LED

+5V_ALW
+5V_ALW

Q134B
DMN66D0LDW-7_SOT363-6~D
4
3 2

LED Circuit Control Table

1
5

+3.3V_ALW
A

BREATH_LED#_R

U42
NC7SZ04P5X_NL_SC70-5~D

C1061

SYS_LED_MASK#

LID_CL#

0.1U_0402_16V4Z~D

U65
4

MASK_BASE_LEDS#

O
3

<39> SYS_LED_MASK#

TC7SH08FU_SSOP5~D

Q135A
DMN66D0LDW-7_SOT363-6~D

P
2

<38,40> BREATH_LED#

NC

0.1U_0402_16V4Z~D

+5V_ALW
<39> SYS_LED_MASK#

Q137
PDTA114EU_SC70-3~D
R664
1K_0402_5%~D
BREATH_BLUE_LED
1
2

Q135B
DMN66D0LDW-7_SOT363-6~D
4
3 2

MASK_BASE_LEDS#

Q138
PDTA114EU_SC70-3~D
R1001
150_0402_5%~D
1
2

BREATH_BLUE_LED_SNIFF

Compal Electronics, Inc.


Title

PAD and Standoff


Size

Document Number

Rev
1.0

LA-5471P
Date:

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

BREATH_BLUE_LED <24>

+5V_ALW
R1000
100K_0402_5%~D

1
R90
47K_0402_5%~D

6
C1060

X
0
1

0
1
1

Q134A
DMN66D0LDW-7_SOT363-6~D

Mask All LEDs (Sniffer Function)


Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)

LID_CL#
+3.3V_ALW

R999
100K_0402_5%~D

SYS_LED_MASK#

+3.3V_RUN

R1007
100K_0402_5%~D
1
2

+3.3V_ALW

WWAN LED solution for Blue LED

U117
NC7SZ04P5X_NL_SC70-5~D

YEL
LTST-C155TBJSKT_Blue/YEL~D

<39> SYS_LED_MASK#

D61
LTST-C191ZBKT-Q_BLUE~D

0.1U_0402_16V4Z~D

BATT_YELLOW 4

MASK_BASE_LEDS# 2
G

Q144B
DMN66D0LDW-7_SOT363-6~D
G

2 WWAN_LED
1K_0402_5%~D

1
R125

SSM3K7002FU_SC70-3~D
S

MASK_BASE_LEDS#

D46
BLUE
BATT_BLUE

+5V_ALW

Q142

2
Q115
PDTA114EU_SC70-3~D

Battery LED

P
A
G

NC

BAT2_LED#

<40> BAT2_LED#

0.1U_0402_16V4Z~D

Q99
PDTA114EU_SC70-3~D
R665
1K_0402_5%~D
1
2

5
Q116
SSM3K7002FU_SC70-3~D

1
D59
LTST-C191ZBKT-Q_BLUE~D
MASK_BASE_LEDS# 2
G
Q150
SSM3K7002FU_SC70-3~D

6
2

R89
47K_0402_5%~D

+5V_RUN

Q144A
DMN66D0LDW-7_SOT363-6~D
+5V_ALW

C1058

1
+3.3V_RUN

WLAN LED solution for Blue LED

R1006
100K_0402_5%~D
1
2

+5V_ALW

+3.3V_ALW

<36> LED_WWAN_OUT#

R655
1K_0402_5%~D
R_SCRL_LED#
2

+5V_ALW

2 WLAN_LED
2
1
1K_0402_5%~D
LTST-C191ZBKT-Q_BLUE~D

1
R663

R206
100K_0402_5%~D

D58
LTST-C191ZBKT-Q_BLUE~D

R596
1K_0402_5%~D
R_NUM_LED#
2

Q122
PDTA114EU_SC70-3~D

MASK_BASE_LEDS#

SDM10U45-7_SOD523-2~D

Q141
SSM3K7002FU_SC70-3~D

1
D57
LTST-C191ZBKT-Q_BLUE~D

Q98
SSM3K7002FU_SC70-3~D

<36> LED_WLAN_OUT#

Q121
PDTA114EU_SC70-3~D

<39> NUM_LED#
D67

R662
100K_0402_5%~D

+5V_RUN

+3.3V_WLAN

D42
LTST-C191ZBKT-Q_BLUE~D

Wednesday, January 20, 2010


1

Sheet

43

of

57

+COINCELL

COIN RTC Battery

PR1
1K_0402_5%~D
2

+3.3V_RTC_LDO

JRTC1

Z4012

+3.3V_ALW

1
2
3

+COINCELL

ESD Diodes

4
5
D

MOLEX_53398-0371~D

1
2 G1
3 G2

PD1
PD3
PD4
DA204U_SOT323~D
@

PD2
DA204U_SOT323~D

DA204U_SOT323~D

PJP1
PBATT+_C

Z4304
Z4305
Z4306

PR4
100_0402_5%~D
1
2

PBATT+

PAD-OPEN 4x4m

PR3
100_0402_5%~D
1
2

PC1
1U_0603_10V4Z~D

PR5
100_0402_5%~D
1
2

Move to power schematic

PBAT_SMBCLK <40>
PBAT_SMBDAT <40>

PBAT_PRES#

<39>

PQ1
FDN338P_NL_SOT23-3~D

PBATT1
SUYIN_200275MR009G50PZR

PD6
1

PC3
2200P_0402_50V7K~D
2
1

PC2
0.1U_0603_25V7K~D

11
10
9
8
7
6
5
4
3
2
1

+3.3V_ALW

Primary Battery Connector

GND
GND
9
8
7
6
5
4
3
2
1

RB715F UMD3

PR2
10K_0402_1%~D
2
1

PL1
FBMA-L18-453215-900LMA90T_1812~D
1
2

+RTC_CELL

DOCK_SMB_ALERT# <38,40>

2
2

RB751V-40_SOD323-2~D

GND

<38,39,50> SLICE_BAT_PRES#

PR7
1
2
0_0402_5%~D
C

PC87
1500P_0402_7K~D

+5V_ALW

PR9
2.2K_0402_5%~D
1
2

3
1

GND

V+

+5V_ALW

COM

PS_ID

NC

GPIO_PSID_SELECT <39>

<40>

1
PQ3
MMST3904-7-F_SOT323~D

PD9
DA204U_SOT323~D

+5V_ALW
+5V_ALW

PR13
15K_0402_1%~D
1
2

PR14
1
@

PSID_DISABLE# <39>

10K_0402_5%~D

+DC_IN_SS

<50>

1
2

PC10
10U_1206_25V6M~D

PR17
4.7K_0805_5%~D
2
1

PC8
0.1U_0603_25V7K~D
2
1

PC7
0.1U_0603_25V7K~D
2
1

PR20
1
2
10K_0402_5%~D

PC6
0.1U_0603_25V7K~D
2
1

1
PR16
2

1M_0402_5%~D
PR19
1M_0402_5%~D
2
1

PC5
0.022U_0805_50V7K~D
1
2

SOFT_START_GC

PC12
0.1U_0603_25V7K~D
2
1

PL4
FBMJ4516HS720NT_1806~D
1
2

MOLEX_87438-0743

IN

PQ74
FDS6679AZ_SO8~D
1 S
D 8
2 S
D 7
3 S
D 6
4 G
D 5

+DC_IN

@ PR18
4.7K_0805_5%~D
2
1

+DCIN_JACK

PD11
VZ0603M260APT_0603
PC11
0.1U_0603_25V7K~D
2
1

-DCIN_JACK

PC9
0.1U_0603_25V7K~D
2
1

1
2
3
4
5
6
7

NO

TS5A63157DCKR_SC70-6~D

+DC_IN

PL3
FBMJ4516HS720NT_1806~D
1
2

1
2
3
4
5
6
7

NB_PSID_TS5A63157

DC_IN+ Source

PJPDC1

PU1
<38> DOCK_PSID

DCIN_CBL_DET# <39>

PC4
.47U_0402_6.3V6-K~D
1
2

2
1
1

GND

PQ2
FDV301N_NL_SOT23-3~D

2
B

PD10
DA204U_SOT323~D

@
PD8
SM24_SOT23

2
G

PR11
100K_0402_1%~D
1
2

+5V_ALW

PR10
33_0402_5%~D
1
2

GND

PR12
10K_0402_1%~D

PL2
BLM18BD102SN1D_0603~D
2
1

NB_PSID

PR15
0_0402_5%~D
1
2

PR8
1
2
0_0402_5%~D

PD7
DA204U_SOT323~D

+3.3V_ALW

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+DCIN
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

44

of

57

s>tWs>tWs>ts>tWsZd>K
+DC1_PWR_SRC
PJP48
2

PC23
10U_1206_25V6M~D
2
1

PC22
10U_1206_25V6M~D
2
1

PC21
10U_1206_25V6M~D

PC20
0.1U_0805_50V7M~D
2
1

PC19
2200P_0402_50V7K~D
2
1

&<,

+3.3V_ALWP

+5V_ALW_LGATE

PC38
330U_D3L_6.3VM_R25~D

+3.3V_ALW_LGATE

@ PR37
4.7_1206_5%~D

PR41
0_0402_5%~D
2
1

PC32
0.1U_0603_25V7K~D

+3.3V_ALWP

PC37
0.1U_0402_10V7K~D
2
1

5
6
7
8

GNDA_3V5V

PR35
0_0402_5%~D
2
1

PL6
4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
2
1
1

PQ7
SI4128DY-T1-GE3 1N SO8

5
6
7
8
D
D
D
D
3
2
1

S
S
S

S
S
S

PR39
1_0603_5%~D
+3.3V_ALW_BOOT1
2

GNDA_3V5V

MAX17020ETJ+_TQFN32_5X5~D

PC30
0.1U_0402_10V7K~D
2
1

LDOREFIN
LDO
IN
RTC
ONLDO
VCC
TON
REF

8
7
6
5
4
3
2
1

33

BST1
DL1
VDD
SECFB
AGND
PGND
DL2
BST2

32
31
30
29
28
27
26
25

PQ9
SI4134DY-T1-GE3 1N SO8

REFIN2
ILIM2
OUT2
SKIP
PG00D2
ON2
DH2
LX2

PR36
1_0603_5%~D
1
2+5V_ALW_BOOT

PR30
@
1
2
0_0402_5%~D

PR31
316K_0402_1%~D
1
2
+3.3V_OUT2
2 PR33 0_0402_5%~D
1
POK2
EN_3V_5V
+3.3V_ALW_UGATE
+3.3V_ALW_PHASE

BYP
OUT1
FB1
ILIM1
PGOOD1
ON1
DH1
LX1

17
18
19
20
21
22
23
24

PC35
0.1U_0603_25V7K~D
2
1

+5V_ALW_PHASE

PQ8
FDMS7692 1N POWER56-8

PC31
0.1U_0603_25V7K~D
2
2
1

PR34
0_0402_5%~D
2
1

PR38
4.7_1206_5%~D
1

PR40
0_0402_5%~D
2
1

PC34
0.1U_0402_10V7K~D
2
1

PC33
330U_D3L_6.3VM_R25~D

+5V_ALW_UGATE

3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
1
2

+5V_ALWP

@PR28
@
PR28
0_0603_5%~D

D
D
D
D

EN_3V_5V

9
10
11
12
13
14
15
16

PR29
0_0402_5%~D

GNDA_3V5V

3
2
1

+5V_FB1
2
POK1

SECFB

PL5

PAD

PC29
0.1U_0402_10V7K~D
2
1

PR32
300K_0402_1%~D
1
GNDA_3V5V

PQ6
SI4134DY-T1-GE3 1N SO8

+5V_ALWP

+5V_ALWP

PU19

GNDA_3V5V
LDOREFIN

@PR27
@
PR27
0_0402_5%~D
1
2
5V_3V_REF
PC28
0.1U_0603_25V7K~D
1
2

+5V_ALW2P
VIN
+3.3V_ALW2
EN_3V_5V

@PR26
@
PR26
0_0402_5%~D
1
2

PC36
0.1U_0603_25V7K~D

PC26
1U_0402_6.3V4Z~D
2
1

PR25
0_0402_5%~D
2
1

PC25
0.1U_0603_25V7K~D
2
1

+3.3V_ALW2

GNDA_3V5V

PR24
10_0603_5%~D
2
1

PAD-OPEN1x1m

PC27
1U_0603_10V6K~D
2
1

+5V_ALW2

+3.3V_RTC_LDO

+5V_VCC1

&<,

s
d
W
KWD/E

WKDy

PJP49
1

PC24
4.7U_0805_6.3V6K~D
2
1

PC18
10U_1206_25V6M~D
2
1

PC17
10U_1206_25V6M~D
2
1

PC16
10U_1206_25V6M~D
2
1

s
d
W
KWD/E

PC15
0.1U_0805_50V7M~D
2
1

PC14
2200P_0402_50V7K~D
2
1

PR23
0_0805_5%~D
1
2

PR22
0_0805_5%~D
1
2

PAD-OPEN 4x4m

REFIN2

+PWR_SRC

1
+
2

GNDA_3V5V

PC42
0.1U_0603_25V7K~D
1 1
2

PD12
BAT54SW-7-F_SOT323-3~D

+3.3V_ALWP

GNDA_3V5V

PD14
BAT54CW_SOT323~D

PR45
0_0402_5%~D
2
1

PJP5

+15V_ALWP

PAD-OPEN 4x4m
PAD-OPEN1x1m

(100mA,20mils ,Via NO.=1)


PJP8
+3.3V_ALWP

PR48
200K_0402_1%~D
2
1

PJP7
+15V_ALW

+5V_ALW

+3.3V_ALW

PAD-OPEN 4x4m
PJP9
1
2

PAD-OPEN 4x4m
PJP6
1
2

ALW_PWRGD_3V_5V <40>

PR49
39K_0402_5%~D
1

+5V_ALWP

POK1

PC43
0.1U_0603_25V7K~D
2
1

PR47
0_0402_5%~D
2
1

<23> THERM_STP#

BAT54SW-7-F_SOT323-3~D
PR46
200K_0402_5%~D
1
2

<40> ALWON

POK2

PD13
3

PR44
2K_0402_5%~D
2
1

+3.3V_ALWP

PAD-OPEN1x1m
PR43
100K_0402_1%~D
1
2

PJP50
1

PR42
100K_0402_1%~D
1
2

PC39
0.1U_0603_25V7K~D
1 1
2

+5V_ALW2

PC41
0.1U_0603_25V7K~D
2
1

+5V_ALWP

PC40
1U_0603_10V6K~D
2
1

GNDA_3V5V
GNDA_3V5V

PAD-OPEN 4x4m
GNDA_3V5V

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DC/DC +3V/ +5V


Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010
1

Sheet

45

of

57

16
VIN

17

s
d
W
KWD/E

TPS51316RUW_QFN17_3P5X3P5~D
1

10 TPS51318_IMON

IMON

+1.5V_VX

GNDA_TPS_1.5V GNDA_TPS_1.5V

@ PR77
@PR77
2

0_0402_5%~D
1

1.33K_0402_1%~D

MODE

PR72
10K_0402_5%~D

SS

VOUT

TPS51318_SS 6

+1.5V_SUS_P 5

22.1K_0402_1%~D
1
12 TPS51318_FSET 2
@PR74
@
PR74
11 TPS51318_MODE

FSET

PR80

VFB

13 DDR_EN

EN

1800P_0402_50V7K~D
@PC92
@
PC92

@PR76
@
PR76

TPS51318_VFB 4

14 1.5V_SUS_PWRGD

PGOOD

COMP

PGND

0_0402_5%~D

GND

SW

VBST

PC91
2
1

2K_0402_5%~D
1

PR75

PR78
2

1.33K_0402_1%~D

2
TPS51318_COMP 3

VCCA

PC89 @
0.22U_0603_10V7K~D

@PR377
@
PR377
0_0603_5%~D
2
15 TPS51318_BST 1

PGND

@
@ PR79 5.6K_0402_5%~D PC93 680P_0402_50V7K~D
2
1
2
1

+1.5V_VX

PC103 100P_0402_50V8J~D
2
1

+1.5V_SUS_P

@ PU15

2200P_0402_50V7K~D

+3.3V_ALW

VIN

GNDA_TPS_1.5V @

DC_5V_ALW1

PC104
1
2

1U_0402_6.3V6K~D

+1.5V_SUS_P(TPS51316)

PJP19
1

PAD-OPEN1x1m
GNDA_TPS_1.5V

+1.5V_SUS_P(VT356)
PL9
FBMJ4516HS720NT_1806~D
1
2

A3

VDES

GND

C3

A4

VSENSE+

GND

C2

OE

GND

C1

PC69
0.1U_0603_25V7K~D

PC67
1U_0603_10V6K~D
2
1

PL8
0.42UH_MPC0740LR42C_20A_20%~D
+1.5V_VX +1.5V_VX
2
1
B

+1.5V_SUS_P

STAT

PC80
6800P_0402_25V7K~D
2
1

PC79
0.1U_0603_25V7K~D
2
1

PC78
22U_1206_6.3V6M~D
2
1

PC77
22U_1206_6.3V6M~D
2
1

PC76
22U_1206_6.3V6M~D
2
1

PC75
22U_1206_6.3V6M~D
2
1

PAD-OPEN1x1m
GNDA_1.5V
PJP14

+3.3V_ALW

PR68
100K_0402_1%~D
2
1

PAD-OPEN 4x4m

PJP20
+1.5V_SUS_P

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+1.5V_MEM

PAD-OPEN 4x4m

DELL CONFIDENTIAL/PROPRIETARY
1.5V_SUS_PWRGD <40>

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

+1.5V_MEM
Size

Document Number

Rev
1.0

LA-5471P
Date:

PC74
22U_1206_6.3V6M~D
2
1

@PR67
@
PR67
0_0402_5%~D

PC73
22U_1206_6.3V6M~D
2
1

PJP13

PC72
22U_1206_6.3V6M~D
2
1

VSENSE1

@ PC71
22U_1206_6.3V6M~D
2
1

PR65
0_0402_5%~D

PC90
10U_0603_6.3V6M~D
2
1

@ PR63
7.68K_0805_1%~D

PC94
10U_0603_6.3V6M~D
2
1

VT356FCX-ADJ_CSP20~D

AVDD

TEMP

B5

B4

B3

IRIPL
2
1
33.2K_0402_1%~D

B2

AGND
B1
PR64

PR62
44.2K_0402_0.5%

5.9K_0402_1%~D

PR61
1

<

D1

+1.5V_VDES

^

VX

C4

<

D2

VDD

PR66
0_0402_5%~D

hD

VX

R_SEL/ILOAD

1.5V_SUS_PWRGD

PR60
68.1K_0402_1%~D
2
1

D3

C5

A5

PR70
54.9K_0402_1%~D
2
1

VX

D4

VDD

AVDD1

WZ

BIAS

A2

DDR_EN

PC95
2200P_0402_50V7K~D
2
1

<40,47> DDR_ON

A1

+1.5V_R_SEL/LOAD

VSENSE1

PR265
0_0402_5%~D
1
2

PC70
2200P_0402_50V7K~D
2
1

+5V_ALW

PU4

BIAS

GNDA_1.5V

VX

VX

D5

PC68
0.22U_0402_10V6K~D
2
1

PC66
0.1U_0603_25V7K~D
2
1

AVDD1

PC65
10U_1206_25V6M~D
2
1

PR59
10_0402_1%~D

PC64
10U_1206_25V6M~D
2
1

PC81
10U_1206_25V6M~D
2
1

DC_5V_ALW1

Wednesday, January 20, 2010

Sheet
1

46

of

57

+1.8V_RUN
+3.3V_ALW

PJP301
2

+1.8V_PWR_SRC

PR418

0_0603_5%~D
2
1

0_0402_5%~D
2
1

PR416

100P_0402_50V8J~D
@

GNDA_1.8V

0_0402_5%~D

PC320
2
1

s
d
W
KWD/E

1.8V_VDD

PC321
0.1U_0603_25V7K~D
2
1

PC322
10U_0805_6.3V6M~D
1
2

PC323
10U_0805_6.3V6M~D
1
2

PAD-OPEN 2x2m~D

<34,39,42> RUN_ON

EN

NC

1
VIN

VIN

3
VDD

4
SYNCH

PU301

PR417

TPAD

17

NC

16

GNDA_1.8V

+1.8V_RUN

PR405 0_0402_5%~D

PR415

+3.3V_RUN

PC316
47P_0402_50V8J~D
2
1

PC317
10U_0805_6.3V6M~D
1
2

PC318
10U_0805_6.3V6M~D
1
2

124K_0402_1%~D

1
2

GNDA_1.8V

100K_0402_1%~D

1
2

PGND

PR406
100K_0402_5%~D

13

PR414

NC

12

11

10

1.8V_RUN_PWRGD <39>

PGND

VFB
SGND

SGND

1.8V_FB
C

PAD-OPEN 2x2m~D

14

PJP303
1.8V_RUNP

LX

PG

PC319
150P_0402_50V8F~D
2
1

15

PC312
680P_0603_50V8J~D

LX

PR407
4.7_0805_5%~D

ISL8014IRZ-T_QFN16_4X4~D

PL401
2UH +-20% #A915AY-H-2R0M=P3 3.3A
2
1

1.8V_LX

GNDA_1.8V
PJP302
1

PAD-OPEN1x1m
GNDA_1.8V

+0.75V_DDR_VTT
DDR3 Termination
+5V_ALW

+0.75V_P
PC88
2
1

+V_DDR_REF

4.7U_0805_10V4Z~D

PR128
0_0402_5%~D
2
1

<40,46> DDR_ON

VTT

VLDOIN

VTTSNS

VDDQSNS

VTTREF

VIN

2
1
7

S3

S5

PGND
GND
BP

4
8
11

TPS51100DGQRG4_MSOP10~D

PC84
10U_0805_6.3V6M~D
1
2

PAD-OPEN 2x2m~D
0_0402_5%~D
2
PC86
0.1U_0603_25V7K~D
2
1

42 0.75V_VR_EN

1DC_1+0.75V_VTT_PWR_SRC

PC85
10U_0805_6.3V6M~D
1
2

<39> 0.75V_DDR_VTT_ON

@ PR117
1

PC83
10U_0805_6.3V6M~D
1
2

10
PJP31
+1.5V_SUS_P

PC82
0.1U_0402_10V7K~D
1
2

PU5

0.75Volt +/-5%
Thermal Design Current: 0.525A
Peak current: 0.750A
OCP mini: 0.900A

PJP18
2

+0.75V_P

+0.75V_DDR_VTT
A

PAD-OPEN 2x2m~D

DELL CONFIDENTIAL/PROPRIETARY

PR118 0_0402_5%~D

Compal Electronics, Inc.


Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+0.75V_DDR_VTT/+1.8V_RUN
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

47

of

57

s
d
W
KWD/E

s
d
W
KWD/E

+1.05V_M/+1.05VTT_RUN
PR201
4.3K_0402_1%~D
1
2
PR202
1

PC118
1
2

100_0402_1%~D

PC106
33P_0402_50V8J~D
1
2
PR200
1

820P_0402_50V7K~D

PC115
22P_0402_50V8J~D
1
2

VTT_B+

PC116
1
2

51K_0402_1%~D

PC108
1
2

470P_0402_50V7K~D

PR120
1

470P_0402_50V7K~D

PR188
4.3K_0402_1%~D
2

PC117
1
2

2
82K_0402_1%~D

PR97
0_0402_5%~D
2
1

PR198
1

820P_0402_50V7K~D

2
180_0402_1%~D

@ PR92
0_0402_5%~D
2
1

<11>

PR199
1

13.7K_0402_1%~D

PR83

PR203
13.7K_0402_1%~D

20_0603_1%~D

VTT_SENSE

PC131
1
2
GNDA_VTT

PC99
0.1U_0603_25V7K~D
2
1

PC98
0.1U_0603_25V7K~D
2
1

PC97
10U_1206_25V6M~D
1
2

PC96
10U_1206_25V6M~D
1
2

PQ15

SIS412DN-T1-GE3 1N POWERPAK1212-8

0_0402_5%~D

NCP5222_CS1-/Vo1

+5V_ALW

PR93
2
1

1
+
2

1
+
2

PR95
2

H_VTTPWRGD <8>

0_0402_5%~D

PC109
330U_D2E_2.5VM_R9~D

NCP5222_CS1+

@ PC110
1000P_0402_50V7K~D

BRIDGE_G

PR86

PC207
3.3U_0603_10V6K~D

PC122
0.1U_0402_10V7K~D
2
1

PR205
24K_0402_1%~D

1
@

0_0402_5%~D

GNDA_VTT

1NCP5222_DRVS/2CH
PR73
0_0402_5%~D
2
1

PC208
1U_0603_16V6K~D

@ PC210
10U_0805_6.3V6M~D
2
1

PC121
10U_0805_6.3V6M~D
2
1

PC120
10U_0805_6.3V6M~D
2
1

PC119
0.1U_0603_25V7K~D
PR87
4.7_1206_5%~D

PQ14
AON6704L
3
2
1

PR204
5.23K_0402_1%~D
1
2

+5V_ALW

2 PR210

+1.05VTTP

BAT54HT1G SOD323~D

PR69
100K_0402_1%~D
1
2
<40> 1.05V_M_PWRGD

PC102
0.1U_0603_25V7K~D
2
2
1

5
3
2
1

BAT54HT1G SOD323~D
PR209
1
2

+3.3V_ALW

PQ13

FB1

PGND1

NCP5222MNR2G_QFN28_4X4~D

+PWR_SRC

PL18
0.56UH +-20% MPC1040LR56C 23A

PD19
2

20_0603_1%~D
B

3
2
1

22

NCP5222_LGATE1

PAD-OPEN 4x4m

NCP5222_PHASE1

SIS412DN-T1-GE3 1N POWERPAK1212-8

NCP5222_FB1
2

NCP5222_UGATE1

PQ12
AON6704L

NCP5222_COMP1
3

24
23

PC105
330U_D2E_2.5VM_R9~D

+5V_ALW

NCP5222_VIN

NCP5222_COMP2
5

COMP1

ICS1
DH1

DL1

DRVS/2CH
18

VCC

AGND

15

29

PR82
PC100
2_0603_5%~D0.1U_0603_25V7K~D
4
1
1
2
25 NCP5222_BST12

PJP30
VTT_B+

PC107
330U_D2E_2.5VM_R9~D

NCP5222_CS2+

27
26

SWN1

PD27
1

<39>

6.49K_0402_1%~D

+1.05V_MP

GNDA_VTT

28

9.31K_0402_1%~D

NCP5222_LGATE2

PGOOD2

DL2

PGOOD1

SWN2

21

DH2

13

VCCP

12

NCP5222_PHASE2

19

NCP5222_UGATE2

PR211
0_0402_5%~D
NCP5222_EN1/SKIP11
2

PR94
2.74K_0402_1%~D
2
1

BST1

NCP5222_PGD1 20

PR208

NCP5222_CS1+

EN1/SKIP1

BST2

5
0.1U_0603_25V7K~D

NCP5222_CS1-/Vo1

CS1+

EN2/SKIP2

PGND2

1
2
3
2

AON6704L
PQ17

PR207
4.32K_0402_1%~D
1
2

PC134
1
2

CPU_VTT_ON
NCP5222_ICS1

CS1-/Vo1

1
2
3

GNDA_VTT
PR96 @
0_0402_5%~D

3
2
1

CS2+

PR206
4.7_1206_5%~D

14

PC133
0.1U_0603_25V7K~D
2
2
1

PC135
220U_V_2.5VM_R9M

PC136
220U_V_2.5VM_R9M

PC202
0.1U_0402_10V7K~D
2
1

CS2-/Vo2

PC132
PR84
10
0.1U_0603_25V7K~D 2_0603_5%~D
1
2
2
1NCP5222_BST2 11

PL7
0.6UH +-20% MPC0750LR60C 17A
2
1
@ PC220
10U_0805_6.3V6M~D
2
1

PC211
10U_0805_6.3V6M~D
2
1

+1.05V_MP

VIN

ICS2

NCP5222_EN2/SKIP2

NCP5222_VCC 17

SIR472DP-T1-GE3
PQ16

PC206
10U_1206_25V6M~D
1
2

PC203
10U_1206_25V6M~D
1
2

PC205
0.1U_0603_25V7K~D
2
1

PC204
0.1U_0603_25V7K~D
2
1

NCP5222_CS2+

FB2

PU16

VTT_B+

COMP2

1
2
+1.05V_MP

NCP5222_ICS2

NCP5222_FB2

@ PR214
0_0402_5%~D

@ PR85
@PR85
0_0402_5%~D
2
1

<17,39> SIO_SLP_M#

M_ON

NCP5222_PGD2 16

<40,42>

GNDA_VTT
1500P_0402_7K~D

PR71
0_0402_5%~D
2
1

Sharing MOSFET gate driver

PQ77A
2 NCP5222_DRVS/2CH

0.01U_0402_25V7K~D
2

0.01U_0402_25V7K~D
NCP5222_ICS2

PJP32

PC209
1

1
PQ77B

47K_0402_5%~D

PR335
2
5

GNDA_VTT

1
6

DMN66D0LDW-7 2N SOT363-6

BRIDGE_G

PC215

2
A

JUMP_43X79

NCP5222_ICS1

PR212
2

PJP24
+1.05VTTP

499K_0603_1%~D

Current Sharing

JUMP_43X79

+1.05V_RUN_VTT

DELL CONFIDENTIAL/PROPRIETARY

PJP25
1

PJP22

PAD-OPEN 4x4m
A

DMN66D0LDW-7 2N SOT363-6

+1.05V_M

PR336

PJP21
+1.05V_MP

PQ21
FDMS7672 1N POWER56-8

+5V_ALW

1
2
100K_0402_5%~D

+15V_ALW

3
2
1

Compal Electronics, Inc.


Title

+1.05V_M/+1.05VTT_RUN

JUMP_43X79
Size

PAD-OPEN1x1m

Date:
4

Rev
1.0

LA-5471P

GNDA_VTT
5

Document Number

Wednesday, January 20, 2010


1

Sheet

48

of

57

40.2K_0402_1%~D

PR301
2.2_1206_1%~D

PC192
0.022U_0402_50V7~D
2
1

PC266
1000P_0603_50V7K~D
1
2
1
2

PR310
1

2.49K_0402_1%~D 10K_0402_1%_TSM0A103F34D1RZ
<BOM Structure>

@ PC200
1
2

0.022U_0402_50V7~D

1
2

PC216
10U_1206_25V6M~D
2
1

PC218
10U_1206_25V6M~D

PC214
2200P_0402_50V7K~D
2
1

PC217
0.1U_0603_25V7K~D
2
1

PL12
0.45UH +-20% MPC1040LR45CP 24A

2
10K_0402_5%~D

+3.3V_RUN

1
PR113

2
0_0402_5%~D

IMVP_PWRGD <8,39,52>

+VCC_CORE

PR308
1.74K_0402_1%~D PR305
1
2
1

PR302
2.2_1206_1%~D

1
PR112

DRSKP#

56_0402_5%~D
1
H_PROCHOT# <8>
0_0402_5%~D

PQ22
AON6704L

LGATE2

+1.05V_RUN_VTT

PC194
0.022U_0402_50V7~D
2
1

PC267
1000P_0603_50V7K~D
1
2
1

UGATE2
PHASE2

40.2K_0402_1%~D
PH4
2 PR311

2.49K_0402_1%~D

10K_0402_1%_TSM0A103F34D1RZ

@ PC213
@PC213
1
2

+5V_ALW

2
PR334

1
10K_0402_5%~D

PR144
33K_0402_5%~D

1
PR109

H_DPRSLPVR <11>

2
@ 1K_0402_1%~D

1
PR333

GND

DL

EP

1
2

PL13
0.45UH +-20% MPC1040LR45CP 24A
PHASE3

1200P_0402_50V7K~D

PQ26
AON6704L

G
S

LGATE3

GNDA_VCORE

PC260

PC148
10U_1206_25V6M~D
2
1

2
0_0402_5%~D

LX

+1.05V_RUN_VTT

PWM

MAX8791GTA+_TQFN8_3X3~D

2
1
PR332

UGATE3

GNDA_VCORE

2
1K_0402_1%~D

PC234
0.022U_0402_50V7~D
2
1

2
PC261

0.22U_0603_25V7K~D
2
12

PC273

0.022U_0402_25V7K~D
2
1

PR104
1.1_0603_1%~D

1200P_0402_50V7K~D

PC259
1

CSP2

DH

+VCC_CORE

PR312

40.2K_0402_1%~D

PH5
1

2.49K_0402_1%~D

PR108
1

PR309
1.74K_0402_1%~D PR306
1

CSP3
<39> IMVP_VR_ON

1
0_0402_5%~D

<11>

SKIP

PC147
10U_1206_25V6M~D

2
PR115

H_PSI#

VDD

PC196
0.022U_0402_50V7~D
2
1

0.022U_0402_50V7~D

@ PC264

BST

PR136
PC154
0_0603_5%~D
0.22U_0603_10V7K~D
BOOT3 2
1BOOT3_2 2
1

GNDA_VCORE

+1.05V_RUN_VTT

1
1K_0402_5%~D

PU17
5

PR303
2.2_1206_1%~D

2
@ PR110

+CPU_PWR_SRC

PC268
1000P_0603_50V7K~D
1
2
1

10_0402_5%~D

200K_0402_1%~D

CSN2
PC145
0.1U_0603_25V7K~D
2
1

PC236

<6,52>

PQ48
SIR472DP-T1-GE3

CLK_EN#

0_0402_5%~D
PC157
1000P_0402_50V7K~D

PR133

0.022U_0402_50V7~D

+CPU_PWR_SRC

+3.3V_RUN

1
2
1.91K_0402_1%~D

PR111

1U_0603_10V6K~D
2
1

1
2

PH3

PC146
2200P_0402_50V7K~D
2
1

PR137
4.75K_0402_1%~D

CSN2

PC129
100U_25V_M~D

PC128
100U_25V_M~D

PC127
100U_25V_M~D

PC126
10U_1206_25V6M~D
2
1

PC125
10U_1206_25V6M~D

PC124
2200P_0402_50V7K~D
2
1

3
D
3
3
D
G
S

VRHOT#

PR213
2
MAX17030GTL+_TQFN40_5X5~D
PR116
PWM3

+VCC_CORE

GNDA_VCORE

CSP1

PQ51
SIR472DP-T1-GE3

PR197
PC212
0_0603_5%~D
0.22U_0603_10V7K~D
1
2BOOT2_2 1
2

BOOT2

GNDA_VCORE

PR143
27.4 +-1% 0402~D
@

PR307
PR304
1.74K_0402_1%~D1
2

PR119

CSP2
2

CSN1

PWRGD

PQ46
SIR472DP-T1-GE3

S
1

1
2

D
PQ18
AON6704L
1

10_0402_5%~D

PR142
27.4 +-1% 0402~D
@

1U_0603_10V6K~D

PC263
2
1
30
29
28
27
26
25
24
23
22
21

PR135

PC233
0.022U_0402_50V7~D
2
1

PC197
0.022U_0402_50V7~D
2
1

1
@ PR121
1K_0402_5%~D
2
1

+CPU_PWR_SRC

11
12
13
14
15
16
17
18
19
20
VR_ON
DPRSLPVR
PSI#
VCORE_TON

PL11
0.45UH +-20% MPC1040LR45CP 24A

LGATE1

2
2
PAD

BST1
LX1
DH1
DL1
VDD
VRHOT
DL2
DH2
LX2
BST2

/
/d
KW
>s

1
CSN3
CSP3
THRM
IMON
ILIM
TIME
VCC
FB
FBAC
GNDS

+PWR_SRC

2
0_0402_5%~D

40
39
38
37
36
35
34
33
32
31
CSN1
CSP1
D6
D5
D4
D3
D2
D1
D0
PGD_IN

1
2
VCORE_THRM 3
VCORE_IMON 4
VCORE_ILIM
5
1
2VCORE_TIME 6
PR139
7
14K_0402_1%~D
8
9
FBAC 10

CSN2
CSP2
SHDN
DPRSLPVR
PSI
TON
CLKEN
PWRGD
DRVSKP
PWM3

PU20

0.022U_0402_50V7~D

PC130
0.22U_0603_10V7K~D
1
2

PAD-OPEN 4x4m

PHASE1

+5V_ALW

@PC265
@
PC265

1
2
1
2

1
2

1
2

2
2
1
2
1
2

1
@PR123
@
PR123

GNDA_VCORE

GNDA_VCORE
1

BOOT1_2

PR114
100K_0402_5%~D

PC256
1200P_0402_50V7K~D

41

GNDA_VCORE

PC219

1
PC258

PC272

0.22U_0603_25V7K~D
2
1 2

GNDA_VCORE

1U_0603_10V6K~D
PC269

<11> VSSSENSE

PC123
0.1U_0603_25V7K~D
2
1

1
2

1
2

1
2

1
2
1
1

0.22U_0603_25V7K~D
2
1 2

PC271

0.022U_0402_25V7K~D
2
1

PH1

0.022U_0402_25V7K~D
2
1

PR141
10K_0402_1%~D

1 1
2

100K +-5% TSM0B104J4702RE 0402


1

137K_0402_1%
vcore_vcc

1K_0402_1%~D

PR327

PR101
0_0603_5%~D
2
1

BOOT1

PR122
0_0402_5%~D

1200P_0402_50V7K~D

PR132
1
2
13.7K_0402_1%~D

PR140
GNDA_VCORE

10_0603_5%~D

1K_0402_1%~D

PC255

PR127
2
1
0_0402_5%~D

+5V_ALW

PR134

PR324

VSSSENSE

H_CPURST#
<8>

GNDA_VCORE

+3.3V_RUN

1.1_0603_1%~D

<11> VCCSENSE

PJP26

1K_0402_1%~D

PR103
CSN3

PR326

PC199
1200P_0402_50V7K~D

PC270
0.033U_0402_16V7K~D

PR138

1K_0402_1%~D

CSP3

<11,23> IMVP_IMON

UGATE1

GNDA_VCORE

<11>

PR323

vcore_vcc

GNDA_VCORE

1K_0402_1%~D

PC198
1200P_0402_50V7K~D

PR325

PR102
1.1_0603_1%~D

1K_0402_1%~D

CSN1

1K_0402_1%~D

CSP1

1K_0402_1%~D

VID6

PR322

<11>

PR331

VID5

1K_0402_1%~D

VID4

<11>

PR321

<11>

+CPU_PWR_SRC

PR330

VID3

PR329 1K_0402_1%~D

VID2

<11>

PR328 1K_0402_1%~D

<11>

1K_0402_1%~D

VID1

PR320

<11>

1K_0402_1%~D

VID0

PR319

<11>

1K_0402_1%~D

PR318

+1.05V_RUN_VTT

2
B

10K_0402_1%_TSM0A103F34D1RZ

@ PC254
1
2
0.022U_0402_50V7~D

2
CSN3

0_0402_5%~D
PJP27
1

PAD-OPEN1x1m
GNDA_VCORE

DELL CONFIDENTIAL/PROPRIETARY
A

Compal Electronics, Inc.


Title

+VCORE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Rev
1.0

LA-5471P
Date:

Document Number

Wednesday, January 20, 2010

49

Sheet
1

of

57

PD20
B540C-13-F_SMC2~D
2

D
D
D
D

1
2
3
4

S
S
S
G

FDS6679AZ_SO8~D

PR227
330K_0402_5%~D

PC226
0.47U_0805_25V7K~D

PQ37
8
7
6
5

+DOCK_PWR_BAR

PR257
2

STSTART_DCBLOCK_GC

0_0402_5%~D

PD21
2
1
PR240
330K_0402_5%~D

3
PDS5100H-13_POWERDI5-3~D

0_0402_5%~D
BLK_MOSFET_GC

+PWR_SRC

0_0402_5%~D
2
0_0402_5%~D

3301_DC_IN_SS

<51> +CHGR_DC_IN

+3.3V_ALW2

<38> ACAV_DOCK_SRC#
+SDC_IN

<23,40,51> ACAV_IN

+3.3V_ALW2

1
PR261

ACAVDK_SRC
2
0_0402_5%~D

1
2
ERC1
1
2
3
PR263 0_0402_5%~D
4
5
CD3301_SDC_IN
6
7
<51> DC_BLOCK_GC
ACAVIN 8
P33ALW2 9
1
2
PR264 0_0402_5%~D
1
2
PR284
0_0402_5%~D
37
2
1

DC_IN
SS_GC
ERC1
ACAVDK_SRC
GND
SDC_IN
DC_BLK_GC
ACAV_IN
P33ALW2

TP

P50ALW
PBATT_OFF
DK_AC_OFF_EN
ACAV_IN_NB
GND
DK_AC_OFF_EN
SL_BAT_PRES#
BLKNG_MOSFET_GC
NBDK_DCINSS

27
26
25
24
23
22
21
20
19

1
PR273

2
+5V_ALW
0_0402_5%~D
2
PBATT_OFF
0_0402_5%~D
2
0_0402_5%~D

'W/K/E


<39>

DOCK_AC_OFF <38,39>
1

DK_AC_OFF
3301_ACAV_IN_NB

1
PR276

2
0_0402_5%~D
1
PR275
BLKNG_MOSFET_GC

DK_AC_OFF_EN
SL_BAT_PRES#

1
PR274
1
PR270

2
0_0402_5%~D
2
0_0402_5%~D

ACAV_IN_NB <39,40,51>
2
0_0402_5%~D

DOCK_AC_OFF_EC

1M_0402_5%~D
PR285
<39>

SLICE_BAT_PRES# <38,39,44>
+NBDOCK_DC_IN_SS

CD3301RHHR_QFN36_6X6~D

<51> DK_CSS_GC

PC235
0.1U_0402_25V4Z~D
2
1

ERC3

ERC2

CSS_GC

PC232
0.047U_0603_25V7K~D
2
1

PC231
0.1U_0603_25V7K~D
2
1

1
2

@ PR282
180_0402_1%~D

<51>

1
PR271

CD_PBATT_OFF 1
PR272

10
11
12
13
14
15
16
17
18

@PD22
@
PD22 RB751S40T1_SOD523-2~D

P50ALW

36
35
34
33
32
31
30
29
28

PU902

100K_0402_5%~D
2

NC
CHARGERVR_DCIN
DC_IN_SS
DK_PWRBAR
GND
NC
BLK_MOSFET_GC
DSCHRG_MOSFET_GC
PBatt+

<44> SOFT_START_GC
PR281
1

CSS_GC
DK_CSS_GC
ERC3
ERC2
GND
PWR_SRC
SS_DCBLK_GC
EN_DK_PWRBAR
P33ALW

PC225
0.1U_0603_50V4Z~D

2 CD3301_DCIN
47_0805_5%~D

1
PR280

+DC_IN

PR258
0_0402_5%~D
2

+DC_IN_SS

PR279
0_0402_5%~D

DK_PWR_BAR

2
PR277
1
PR278

DSCHRG_MOSFET_GC
1

+DOCK_PWR_BAR

0_0402_5%~D

1
2
3
4

FDS6679AZ_SO8~D

PC229
1U_0805_25V4Z~D

S
S
S
G

PC228
0.1U_0603_25V7K~D
2
1

PR259
1

PBATT_IN_SS

D
D
D
D

4
C

PQ42
8
7
6
5

PC230
1U_0603_25V6-K~D

PR260
2

PC227
2200P_0402_50V7K~D
2
1

PQ40
FDS6679AZ_SO8~D
1 S
D 8
2 S
D 7
3 S
D 6
4 G
D 5

PR248
1K_1206_5%~D

+VCHGR

PBATT+

PQ41
SI4835DDY-T1-E3_SO8~D
8
1
7
2
6
3
5

P33ALW

1
PR269

2
+3.3V_ALW
0_0402_5%~D

EN_DK_PWRBAR 1
PR268

2
0_0402_5%~D

EN_DOCK_PWR_BAR <39>
1

STSTART_DCBLOCK_GC
3301_PWRSRC

1
PR267

2
0_0402_5%~D

1M_0402_5%~D
@ PR283

+PWR_SRC

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Selector
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

50

of

57

PD15 B540C~D
2
1
PQ80
SI4835DDY-T1-E3 1P SO8
8
1
7
2
6
3
5

PR155
10_0402_1%~D
16

GND

29

PC159
0.1U_0603_25V7K~D
2
1

PC158
2200P_0402_50V7K~D
2
1

PR157
100K_0402_5%~D

+VCHGR

100_0402_5%~D

G
S
S
S

GND

ISL88731_TQFN28~D

PC191
1
2

2
G

0.1U_0402_10V7K~D
@ PC190
@ PC350
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
GNDA_CHG
GNDA_CHG

PAD-OPEN1x1m

GNDA_CHG

For Maxim Charger only

PC172
10U_1206_25V6M~D
2
1

5
6
7
8

1000P_0603_50V7K

PJP29

PR173
1.8K_1206_5%~D

NC

12

1 PR174

PC179

PQ33
RHU002N06_SOT323

VFB

15

5.6U_HMU1356B-5R6-F 8A

17

CSON

+VCHGR

4
PC300
2200P_0402_50V7K~D
2
1

NC

2 +VCHGR_L1

PC189
10U_1206_25V6M~D
2
1

+VCHGR_B

PC188
10U_1206_25V6M~D
2
1

PGND
CSOP

PR171
0.01_1206_1%~D
PC187
10U_1206_25V6M~D
2
1

VREF

19
18

PL14

3
2
1

@ PR172
1
2
0_0402_5%~D
PC185
0.1U_0402_10V7K~D
2
1

@ PC178
130P_0402_10V7K~D@
1
2

ICOMP

PC174
220P_0402_50V7K~D
CHG_LGATE

PC171
10U_1206_25V6M~D
2
1

LGATE

20

2
PC177
130P_0402_10V7K~D
1
2

ISL88731_VREF

1
1
2
@ PC175
@ PR169
2000P_0402_10V7K~D 7.5K_0402_5%~D

PC184
1U_0603_10V6K~D
2
1

PC180
0.1U_0402_10V7K~D
2
1

PR175
6.81K_0402_1%~D
2
1

<23> MAX8731_IINP

PC183
0.01U_0402_25V7K~D
2
1

<40> CHARGER_SMBDAT

PC182
0.01U_0402_25V7K~D
2
1

<40> CHARGER_SMBCLK

1
2
@PR168
@
PR168
200K_0402_5%~D

PC181
0.01U_0402_25V7K~D
2
1

PR170
2.2K_0402_5%~D
2
1

GNDA_CHG

2 PR167 1
0_0603_1%~D

PR355
10_0402_1%~D
2
1
PC186
0.1U_0603_25V7K~D
2
1

23

PC170
0.1U_0603_25V7K~D
2
1

PHASE

CHG_UGATE

PC169
2200P_0402_50V7K~D
2
1

24

PR176
10_0402_1%~D
2
1

UGATE

PC168
1U_0603_10V6K~D
1
2

PQ31
SI4800BDY-T1_SO8~D

NC

21 ISL88731_VDDP

3
2
1

PR163
33_0603_1%~D

PR177
4.7_1206_5%

27

VDDP

PR164
2.2_0603_1%~D
2

PQ30
SI4800BDY-T1_SO8~D

VCOMP

2
25

ICM

PR156
100K_0402_5%~D

BOOT

NC

<38>

<50>

SI4812BDY-T1-E3_SO8~D
PQ32
2
1 2
1

SDA

26

5
6
7
8

SCL

DOCK_DCIN_IS-

PC176
3300PF_0402_50V7K~D
2
1
D 5
3
6
D
2
D 7
1
D 8

10

PR412
DK_CSS_GC
1
2
PC164 0_0402_5%~D
1U_0603_10V6K~D
1
2
GNDA_CHG

PD17
RB751V_SOD323~D
2
1

VDDSMB

VCC

PC167
0.1U_0603_25V7K~D
2
1

11

28

ACOK

@ PC353
GNDA_CHG
0.1U_0603_25V7K~D

CSSN

13

CSSP

ACIN

14
ISL88731_ICM

DCIN

9
GNDA_CHG

PC173
0.1U_0402_10V7K~D

PU10
22

<38>

3
PR165
1
2
0_0402_5%~D

PC163
0.1U_0402_10V7K~D
1
2

NC

GNDA_CHG

PR354
10_0402_1%~D
2
1

PR160
0_0402_5%~D
1

PC351
.1U_0805_25V7K~D
2
1

PR166
15.8K_0402_1%~D
2
1

+3.3V_ALW

PR404
1
2
1_0402_5%~D

<50> +CHGR_DC_IN

PR159
10K_0402_1%~D
2
1

PR161
226K_0402_1%~D

1
0.01U_0402_25V7K~D
GNDA_CHG

@PC162
@
PC162
0.1U_0603_25V7K~D
1
2

PQ71A
NTGD4161PT1G_TSOP6~D
D

<23,40,50> ACAV_IN

ISL88731_VREF

PR153
10K_0402_5%~D

DOCK_DCIN_IS+

PC166

PQ71B
NTGD4161PT1G_TSOP6~D

+SDC_IN

PR162
49.9K_0402_1%~D
1

2
2

WZ
d/Y<
//^><
DDy<

PAD-OPEN 4x4m
PQ28
NTR4502PT1G_SOT23-3~D

2
2

K<s

PQ29
NTR4502PT1G_SOT23-3~D

1
2
PR403
1
2
0_0402_5%~D

CSS_GC

<50>

ISL88731_VDDP

CHAGER_SRC
PJP28

PR402
1
2
0_0402_5%~D

<50> DC_BLOCK_GC

+PWR_SRC

PR145
0.01_1206_1%~D
PC160
TBD_0603_25V7K~D

+DC_IN_SS

+SDC_IN

@
ACAV_IN

GNDA_CHG

Maximum charging current is 6.24A

4
ACAV_IN_NB

<39,40,50>

IN+

G
O

PU11B
LM393DR_SO8~D

PC193 @
0.01U_0402_25V7K~D

PR362
100K_0402_5%~D

PR341
100K_0402_5%~D

PR401
1
2
0_0402_5%~D

PU11A
LM393DR_SO8~D
1

IN-

IN-

IN+

PR421
42.2K_0402_1%~D
2
1

6
PC330
100P_0402_50V8J
2
1

PR192
21.5K_0402_1%
2
1

PC352
100P_0402_50V8J
2
1

ISL88731_VREF

+5V_ALW

+3.3V_ALW
PR422
1M_0402_5%~D
1
2

PR420
47K_0402_1%~D
2
1

PR423
232K_0402_1%~D
2
1

+DC_IN ISL88731_VREF

PC195 @
0.01U_0402_25V7K~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

+5V_ALW
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Charger
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

51

of

57

0_0402_5%~D
<12>

GFX_VID0

PC802
1000P_0402_50V7K~D

3
SIR472DP-T1-GE3
PQ804

D
G
S

+PWR_SRC

S
1

SIR472DP-T1-GE3
PQ801

PL801

@ PC811
1500P_0603_25V7K~D

FDMS7660 1N POWER56-8
PQ803

@ PR830
4.7_1206_5%~D
1
2

3
D
G
S

13

FDMS7660 1N POWER56-8
PQ802

V3P3

12 GFX_CLK_EN#

1 PR829

+VGFX_COREP

20K_0402_1%~D
PH802
1

1
+
2

1
+
2

PR827
10K_0402_1%_TSM0A103F34D1RZ
2.49K_0402_1%~D

PC816
0.033U_0402_16V7K~D

PC807
0.22U_0603_25V7K~D

PR824
13.7K_0402_1%~D

PC806 @
0.001U_0402_50V7M~D

PR826
4.7K_0402_5%~D

GNDA_VGA

PH801

GFX_DPRSLPVR <12>
2

2
PR825
0_0402_5%~D

GNDA_VGA

100K +-5% TSM0B104J4702RE 0402

1
2

PC805

1U_0603_10V4Z~D

PC804

1U_0603_10V4Z~D

Layout Note:
Place near VDD Pin

1
PR823
10_0603_5%~D

GNDA_VGA

+5V_ALW

T_PAD

PWRGD

CLK_EN#

32

CCV

33

PGDIN

10

0.56UH +-20% MPC1040LR56C 23A


4
1
4700P_0402_50V7K~D
2
1

21

GVR_BST_R

GVR_TON 2

20

18

19
D5

16

15

17

D4

D3

D6

22 GVR__DRVL_G

SKIP
CSP

1
PR822
0_0402_5%~D

DL
PGND
VRHOT#

25 GVR_SW_PHASE

GVR_CSP

CSN

28

GVR_SKIP

LX

PC809
0.22U_0603_10V7K~D
2
1

PC810

TIME

GVR_VRHOT#

26 GVR_DRVH_G

100P_0603_50V7K~D

29

MAX17028GTJ+_TQFN32_5X5~D

SLOW#

GVR_TIME

ILIM

PR817
10K_0402_1%~D

30

GVR_CSN

PR818
64.9K_0402_1%~D
GNDA_VGA

GVR_ILIM

THRM

DH
FB

GFXVR_SLOW

GNDS

GVR_FB

27

<8,39,49> IMVP_PWRGD

PR819
10K_0402_1%~D
2
1

PR820
10K_0402_1%~D
2
1

PR821
10K_0402_1%~D
2
1

14

BST

PR831
0_0603_5%~D
2
24 GVR_BST 1

PC808
2
1

IMON

GVR_GNDS 2

GFXVR_THRM

+3.3V_ALW

VCC

+3.3V_RUN

TON

GFXVR_VCC 31

+3.3V_ALW

D2

GNDA_VGA

0_0402_5%~D

D1

PU801
GNDA_VGA

11

GVR_IMON

PC803
1000P_0402_50V7K~D

D0

1
PR816
10.2K_0402_1%~D

PR836
1

SHDN#

1
PR815
10_0603_5%~D

2
2

1
PR814
10_0603_5%~D

PR832
200K_0402_1%~D

@ PR809
4.7K_0402_5%~D
1

GNDA_VGA

<12> VCC_AXG_SENSE

1
PR808
0_0402_5%~D

<12> GFX_VR_ON

+VGFX_COREP
2

PAD-OPEN 4x4m

VDD

1
PR812
10_0603_5%~D

23

1
PR813
10_0603_5%~D

PJP801
GVR_VBAT

PC824
2200P_0402_50V7K~D

GFX_VID1

<12>

PC825
0.1U_0402_10V7K~D
2
1

GFX_VID2

<12>

PR803
0_0402_5%~D
1
2
PR804
0_0402_5%~D
1
2
PR805
0_0402_5%~D
1
2
PR806
0_0402_5%~D
1
2
PR807
0_0402_5%~D

PC826
330U 2V M D2 LESR6M

GFX_VID3

Thermal Design Current:12A


Peak Current:22A
OCP Mini: 26.4A

PC827
330U 2V M D2 LESR6M

<12>

PC815
0.1U_0805_50V7K
2
1

GFX_VID4

PC814
10U_1206_25V6M~D
2
1

<12>

GVR_NTC

GFX_VID5

2
PR801
0_0402_5%~D
1
2
PR802
0_0402_5%~D

PC813
10U_1206_25V6M~D
2
1

<12>

PC812
10U_1206_25V6M~D
2
1

1
2
2

<12> VSS_AXG_SENSE

PC801
0.015U_0402_16V7K~D
PR835

GFX_VID6

1
PR811
21K_0402_1%~D

PR810
9.09K_0402_1%~D

<12> GFX_IMON

<12>

PR828
2.2K_0402_1%~D

+3.3V_ALW

GNDA_VGA

GNDA_VGA

@ PR834
1.91K_0402_1%~D

@ PR833
GFX_CLK_EN# 1

CLK_EN#

<6,49>
PJP802

0_0402_5%~D

PJP803
2

PAD-OPEN 4x4m

PAD-OPEN1x1m

PJP804

GNDA_VGA

+VGFX_COREP

+VCC_GFXCORE

PAD-OPEN 4x4m
PJP805
1

PAD-OPEN 4x4m

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAX17028 VGFX_Core
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010
1

Sheet

52

of

57

V ersion Change L ist ( P. I. R . L ist )


Item
D

D ate

R equest
O w ner

Page#

Title

,t
,t

KDW>
KDW>




,t

,t

,t

>>

,t
,t
,t
,t
,t
,t
,t
,t
,t
,t

KDW>
/
KDW>
/

KDW>

KDW>
KDW>
>>

,t

>>

,t
,t
,t
,t
,t
,t
,t

KDW>

KDW>

KDW>
KDW>
KDW>

,t

KDW>

,t

>>

,t

KDW>

,t

KDW>

,t

>>

,t
,t

/
KDW>

31

,t

32
33

,t
,t

KDW>
^D^

34

,t

^D^

35

,t

^D^

36

,t

KDW>

Issue D escription

Solution D escription

R ev.

/
Ds>E

Z
Z
ZZZZZYYYYY
hW:WW:WZ<ZZWhY
/^
sDDsWhsYZsdd
ZhEKEE>ZhEKEWhs^sWhsY
Z,sZ&Z^d'dhYWhs^'dhZ

&&
hZZZZZZZZZZZZZ
&>>ZW
ZZZ
Per M09 lesson learn request
Z:dW:/K
'W/KWh
ZZ
&^D^
ZZ<>dKE^tZ
/^D,
zZZ
Z&/
ZZ
DD
:W
ZZ
Z
D/
Z>Z

YKEdD^
'W/KDW
:D/E/htZ/K/^
ZhsZhEZh
'W/KDW
E^dZWdZ

WZYZ
ZYY

Z
s/

ZZZ
Whh^DZd
h^DZdWhsZhE
ZWh Z
WW,'W/K'W/K
ZZ
&Zs><

^dW>>sDsWt
E^dZWdZ
hWW

D/Z'
>>>D^E
WhsZhE
WhZs>tW,sZhE
W,
EsDZZZZZ:t
Z
D:D/E/
&/dW
dd
&DWhsZhE
WZWhsDKsZhE
dZZZZZ>Z
&
ZZ'E:^
&Ed<WhsD
Z
E
ZZZ<<
dZs
ZWhsDs
^D^
sD
YZZ<
DsWtZ'
>>
&D^
&&

y
y

y
y
y
y
y
y
y
y
y
y
y
y

y
y
y
y
y
y
y
y
y
y
B

y
y
y
y
y
y
y
y
y
y
A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

EE P.I.R (1/1)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

53

of

57

V ersion Change L ist ( P. I. R . L ist )


Item
D

Title

D ate

R equest
O w ner

Issue D escription

Solution D escription

37

,t

38

,t

39

39

,t

KDW>

40

,t

,t

KDW>

yK^

42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59

31
15, 30,
33, 40
8
33, 34
30
19, 37
8, 40
37
30
42
31
28, 37
26
26
16
29
36
24
21
13, 14

ttDt/>>
,Z
W/W,W
<<
s'//^s'/hD
s>t
D

,t
,t
,t
,t
,t
,t
,t
,t
,t
,t
,t
,t
,t
,t
,t
,t
,t
,t

/
Z
/
KDW>
KDW>
KDW>
/
KDW>
KDW>
KDW>
W
KDW>
KDW>
KDW>
KDW>
KDW>
KDW>
KDW>

60

42

,t

KDW>

61
62
63
64
65
66
67
68
69
70
71
72
73

30
40
29
17
32
17
36
36
16
31
16
41
24

,t
,t
,t
,t
,t
,t
,t
,t
,t
,t
,t
,t
,t

/
KDW>
/d
KDW>
KDW>
KDW>
KDW>
KDW>
KDW>
KDW>
KDW>
KDW>
KDW>

74

31

,t

75
76
77
78
79
80

31
36
8, 28
40
24
24

,t
,t
,t
,t
,t
,t

KDW>
KDW>
KDW>
KDW>
KDW>
KDW>

Z/^WZWZ
ZhWd
/
'W/KDWE^dZWdZ
'W/KDWWhdd
D/
/
^
^
^d,^d
WW'E


s
&
W
^d
D/Z/DD
sDsZhE
sWhsY
&/tt
/
&/d
Zd
&/'&>y
&^
Whh^DZd

&y/d&
&Z&//d&
&^Dh^DdD
&dW
^&D/D,W,W/
hE

tys^^/'K>
tDy>
^Dh^
Zd
>
D&tW^/Kydt<K

41

Page#

R ev.

>>h,>dDZh,>ZdD

ZZZZ<<

WhsZhEs>tZZ

ZZ&&
&&Z&Z

Z
Z&&Zh
>KDsdZ>KDsd/K
ZYZZ'W/KE^dZWdZ
ZdW:Wh,h
>>ZZ>ZZ
Z
ZZ
ZK&
ZZZZ

ZZ
z^:D>>W
y^dD,W&^/dd
ZZ
ZZ
Z


y
y
y
y
y
y
y
y
y
y
y
y
y
y
y
y
y
y

ZZZ

Z&&
Z<
ZZZZ<
Y
Z
Z<<
ZWhsZhEs>ts>tW,
ZZ
&&
>>,,&&&
ZZ
WhZZs>ts>t
Z>

y
y
y
y
y
y
y
y
y
y
y
y
y

h

htys^^/'tYs^^/'
Z
ZZ
zd:^:WYD
Z
Z<Whs>tW,Z<WhsZhE

y
y
y
y
y
y

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

EE P.I.R (2/2)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

54

of

57

V ersion Change L ist ( P. I. R . L ist )


Item
D

Page#

Title

D ate

R equest
O w ner

Issue D escription

Solution D escription

81
82
83
84
85
86
87
88
89
90

31
31
40
37
38
36
31
12

^
,t
,t
,t
,t
,t
D/
,t
,t
,t

KDW>
/
KDW>
KDW>
KDW>
KDW>
KDW>
KDW>
KDW>
KDW>

^dW^&
&Wh'W/K'W/K
^

/y
&&:/K
^^D/
^t>
^><Wd
^hD'&y

91

31

,t

ZKD

ZKD

92

32

KDW>

dDd

93

8,15

,t
,t

KDW>

yW:d'

94

33, 34

,t

Z/K,

^^

95

39

,t

KDW>

96

28,37

,t

KDW>

97

26

,t

98

11

KDW>

Z&&sZhE:d^
D,
^d
Pericom DP SW DP8200 has new silicon
W version in stead of Y version
d

R ev.

ZZ>>
ZZWWhsZhE
Z
Z
Z
:/KdzKWddzKW

Z
Z
Z
>>,,&&
&&
dD^^yd^^yd
ZZZZZZZZZZZZZZ
ZZZZZZZZ
h^>^>

y
y
y
y







sZhE:d^d'

hh^W>

Change U9 to SA00003CD2L

De-pop C53 and C54





C

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

EE P.I.R (3/3)
Size

Rev
1.0

LA-5471P
Date:

Document Number
Wednesday, January 20, 2010

Sheet
1

55

of

57

V ersion Change L ist ( P. I. R . L ist )


Item Page#

R equest
O w ner

Title

D ate

Issue D escription

Solution D escription

R ev.

50

Selector

7/20

46

1.5V_MEM

7/20

Compal ADC
Guangyong

Add droop resistor for TI solution

Add PR77

X01

45

+3.3V/+5V

8/17

Compal ADC
Guangyong

Change 3V/5V choke for cost down

change PL5 from SH00000H90L to SH00000FN0L


change PL6 from SH00000HB0L to SH00000HR0L

X01

50

Selector

8/17

Compal

50

Selector

8/17

TI

new version CD3301 (PG2.1) don't need PD22 depop PD22 add PR282, pop PR430
and PR282

X01

50

Selector

8/17

TI

DOCK_AC_OFF_EC floating issue

X01

49,52

+VCORE
+VGFX_CORE

8/17

Compal

1
D

TI

CSS GC logic wrong issue

Add 1M_ohm pull down to fix ACAV_IN_NB


oscillation when battery mode S5

Add PR282 180_ohm to GND

X01

X01

Add PR283

add PR285

change thermistor package from 0603 to 0402 Change PH3,PH4,PH5 and PH802 from SL200000B0L to SL200000W0L
for cost down

X01

Change PC314 from SE00000868L(22u/0805) to SE00000O00L(100u/1206)

Change PR409 from SD03480618L (8.06k) to SD03460418L (6.04k)


Change PR410 from SD03440218L(4.02k) to SD03430118L(3.01k)
Change PR408 from SD014402A8L(40.2 Ohm) to SD000008H8L(51 Ohm)
8

47

1.8V_RUN

8/18

MAXIM

Output ripple voltage unstable issue

Change PC315 from SE000003W8L(820pF) to SE076333K8L (3300pF)

X01

Change PR411from SD00000268L(6.98K) to SD03445318L(4.53K)


Change PC310 from SE074102K8L(1000P) to

SE074472K8L(4700pF)

Change PC309 from SE071330J8L (33pF) to

SE071560J8L (56pF)

Change PC311 from SE042104K8L(.1u/0603/25V) to SE076104K8L(.1u/0402/16V)


Add PR413 SD02800008L (0 Ohm)
9

52

Vcc_gfx_core

8/19

Compal

Low side Vds ring over SPEC

Change PQ802 and PQ803 from SB00000KP0L(BSC882N03MS)


to SB00000KM0L(FDMS7660)

X01

10

52

Vcc_gfx_core

8/20

Compal

Fine tune Imon time constant meet


Intel SPEC 300uS~500uS

Change PC801 from SE068103K8L(0.01uF)


to SE076153K8L(0.015uF)

X01

Fine tune transient RC time constant

Add PC816 SE076333K8L (0.033uF)

X01

11

52

Vcc_gfx_core

8/20

Maxim

Change PR102, PR103 and PR104 from SD013220B8L(2.2) to SD00000V98L (1.1)


Change PR310, PR311 and PR312 from SD03430118L(3.01k) to SD03424918L(2.49k)
12

49

+VCORE
MAX17030

8/20

Maxim

Vcore FDIM issue

Change PR307, PR308 and PR309 from SD03422118L(2.21k) to SD03417418L(1.74k)

X01

Change PR137 from SD03449910L(4.99k) to SD03447518L(4.75k)


Add PC271,PC272 and PC273 SE075223K8L(0.022uF)

13

48

+1.05VM/
+1.05VTT

8/20

ON

Fine tune DC accurcay

Change
Change
Change
Change
Change
Change
Change
Change
Change
Change
Change
Change

PR188
PR199
PR198
PR202
PC108
PR200
PC115
PC106
PR204
PR205
PR207
PR208

and PR201 from SD03451018L(5.1k) to SD00000U28L(4.3k)


and PR203 from SD03416228L(16.2k) to SD03413728L(13.7k)
from SD03468008L(680 Ohm) to SD03418008L(180 Ohm)
from SD03468008L(680 Ohm) to SD03410008L(100 Ohm)
and PC116 from SE074331K8L(330p) to SE074471K8L(470p)
from SD00000DM0L(200k) to SD03451028L(51k)
from SE071300J0L(SE071300J0L) to SE071220J8L(22P)
from SE071300J0L(30P) to SE071330J8L(33P)
from SD03447518L(4.75K) to SD03452318L(5.23K)
from SD03444228L(44.2K) to SD03424028L(24K)
from SD00000LZ0L(3.83K) to SD00000J20L(4.32K)
from SD03482518L(8.25k) to SD03464918L(6.49k)

X01
A

Title
PIR
Size
C
Date:
5

Document Number
LA-5471P

Rev
1.0

Wednesday, January 20, 2010


1

Sheet

56

of

57

V ersion Change L ist ( P. I. R . L ist )


Item Page#
D

Title

D ate

R equest
O w ner

Issue D escription

Solution D escription

R ev.

14

47

1.8V_RUN

8/25

DELL

1.8V transient 0.1A ~ 1.6A


output voltage over spec

Change PU301 from SA00003B10L(MAX15050) to


SA00003CG0L (ISL8014) and support circuit

X01

15

49

Vcore

8/25

MAXIM

Improve DC accuracy

Change exposed pad to PGND from AGND

X01

16

49

Vcore

8/25

MAXIM

Vender recommend PSI# pull down 10k

Change PR334 from SD03410018L (1k) to SD02810028L(10k)

X01

17

51

Charger

8/25

Compal ADC
Guangyong

Improve charger choke saturation current


at 100 degree C

Change PL14 from SH04856AM8L (5.6u) to SH00000I60L (5.6u)

X01

18

44

DCIN

8/25

Compal

3.3V_ALW2 black driver issue


with RTC battery only

Change PD1 from SC100000Q0L(BAT54CW) to SCSB715F08L (RB715F)

X01

19

49

Vcore

8/27

Compal

Reserve resistor pad for debug

Add PR122 and PR123

X01

20

49

Vcore

9/01

MAXIM

Fine tune Imon time constant meet


Intel SPEC 300uS~500uS

Change PC270 from SE075223K8L (0.022U) to SE076333K8L (.033U)

X01

21

49

Vcore

9/01

MAXIM

Make sure DPRSLPVE low level under 0.33V

Change PR109 from SD03449908L (499 Ohm) to SD02800008L (0 Ohm)

X01

22

44

DC_IN

10/13

TI

High inrush current on DC_IN


when AC adapter plug in

Change PR20 from SD02800008L(0 Ohm) to SD02810028L(10k)

X02

23

49

Vcore

10/20

MAXIM

3 phase overlap issue with


2nd source MOSFET

Add PC198, PC199, PC255, PC256, PC259 and PC260 SE074122K8L (1200pF)

X02

24

48

+1.05VTT

10/28

INTEL

Fine tune H_VTTPWRGD voltage level meet


Vih(min) = 0.75 * Vtt

Change PR94 from SD03410028L (10k) to SD03427418L (2.74K)


Change PR93 from SD03428728L (28.7k) to SD03493118L (9.31K)

X02

25

49,52

+VCORE
+VGFX_CORE

11/03

Compal

change thermistor package from 0603 to 0402 Change PH1 and PH801 from SL20000068L (100K 0603)
for cost down
to SL20000160L (100K 0402)

X02

26

48

+1.05VTT/
+1.05VM

11/16

ON

Bost diode over stress

Change PD19 and PD27 from SC1B751V08L(RB751V) to SCS00003M0L(BAT54HT1G)

X02

27

52

+VGFX_CORE

11/24

MAXIM

Fine tune transient and load line for


2nd and 3rd source choke.

Change PR828 from SD03424918L (2.49k 0402) to SD000004O8L (2.2k 0402)


Change PR827 from SD03430118L (3.01k 0402) to SD03424918L (2.49k 0402)
Change PR816 from SD03411028L (11k 0402) to SD02810228L (10.2k 0402)

X02

28

52

29

51

+VGFX_CORE

Charger

11/24

MAXIM

Two 4.7k PD on GFX_VR_ON at both EE side


and PWR side. Depop PWR side 4.7k PD.

Depop PR809 SD02847018L (4.7K 0402)

X02

01/12

Compal

Reduce Pin33,34 and 35 of the CD3301


surge current

Change PC351 from SE00000130L (1u/0805) to SE043104M8L (0.1u/0805)


Change PR404 from SD02800008L (0 Ohm) to SD028100B8L (1 Ohm)

A00

Title
PIR
Size
C
Date:
5

Document Number
LA-5471P

Rev
1.0

Wednesday, January 20, 2010


1

Sheet

57

of

57