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Power Electronics
Ls
iL
i1
ip
vi
vo
L
V m ax sin t
vs
T2
Ls
i2
10&11-1
F. Rahman
ELEC4240/9240
Power Electronics
T1
Ls
iL
i1
ip
vi
vo
L
V m a x s in t
vs
T2
Ls
i2
Figure 10.2 Waveforms in the converter of figure 10.1, commutation overlap and
commutation notches, for = 45.
Lectures 10&11 Overlap in AC-DC Converters
10&11-2
F. Rahman
ELEC4240/9240
Power Electronics
T1
Ls
iL
i1
ip
vi
vo
L
V max sin t
vs
T2
Ls
i2
Figure 10.3 Waveforms in the converter of figure 10.1, commutation overlap and
commutation notches, for = 130.
10&11-3
F. Rahman
ELEC4240/9240
Power Electronics
The part of the input voltage waveform which is missing from the output voltage
is given by
Vmax sin t = Ls
di
dt
10.1
Vmax sin ( t ) d ( t ) = Ls
Id
10.2
di
where Vmax is the peak of the input ac voltage and Id is the dc level of the output
(load) current.
Note that in each half cycle of the above waveform, the input current through the
incoming thyristor rises from zero to Id in time /, starting from the instant of
firing. Thus, integrating equation 10.2,
Vmax cos ( + ) cos = Ls I d
cos ( + ) = cos
Ls
Vmax
Id
10.3
Vmax sin ( t ) d ( t )
Vmax sin ( t )d ( t )
10.4
=
2Vmax
cos
Ls
I
d
= 30
Vd
= 30
Id
= 120
(a)
(b)
Id
Figure 10. 4 Variation of Vd and commutation angle with Id and firing angle .
Lectures 10&11 Overlap in AC-DC Converters
10&11-4
F. Rahman
ELEC4240/9240
Power Electronics
Ls
V maxsin t
T1
T3
Vd
vsi
T2
Id
Load
T4
(a)
vo
iL
vp
vp
ip
ip
v si
v s -v si
(b)
Figure 10.5 (a) Single-phase, F-C, bridge converter with source inductance and
(b) its waveforms, for = 45.
Lectures 10&11 Overlap in AC-DC Converters
10&11-5
F. Rahman
ELEC4240/9240
Power Electronics
vs
vs
-vs
vo
iL
vp
ip
vp
ip
vsi
vs-vsi
=145o
di
dt
10.5
As before
Vmax sin ( t ) d ( t ) = Ls
cos ( + ) = cos
Id
Id
di = 2 Ls I d
2 Ls
Id
Vmax
10.6
10&11-6
F. Rahman
ELEC4240/9240
Power Electronics
Note that during overlap, the input current i, which flows through Ls, changes by
2Id. The overlap angle can be found from the above expression. The angle
increases when larger load current is commutated.
The dc output voltage of the converter with overlap is given by
Vd =
2Vmax
Vmax sin ( t )d ( t )
cos
2 Ls
Vmax sin (t )d ( t )
Id
= 30
10.7
Vd
= 30
= 125
Id
Id
Figure 10.6(a) Variation of Vd and commutation angle with load current and
firing angle for the converter of figure 10.5.
10&11-7
F. Rahman
ELEC4240/9240
Power Electronics
Ls
T1
T3
iL
Vd
Vmaxsint
Df
D2
LOAD
D4
Figure 10.7
The commutation of the load current through the thyristors and the diodes occur in
two stages. At first, the load current commutates to the freewheeling diode at the
zero crossings of the input voltage. When the incoming thyristor is triggered, the
freewheeling load current commutates to this thyristor. The part of the input
voltage waveform missing from the output is thus dropped across the source
inductance due to the load current rising to Id during the commutation overlap
angle when a thyristor is triggered. Consequently, the overlap angle and the dc
output voltage Vd for this converter with source inductance Ls are given by,
cos ( + ) = cos
Ls
Vmax
Id
di
Id
10.8
1
Vd =
Vd =
Vmax
[1 + cos ]
Ls
Id
10&11-8
10.9
F. Rahman
ELEC4240/9240
Power Electronics
500
vs
-500
vo
iL
iDf
ip
vp
vsi
vs-vsi
For = 45
Figure 10.8. Waveforms in the H-C converter with source inductance; for = 45.
10&11-9
F. Rahman
ELEC4240/9240
Power Electronics
vs
vo
iL
iDf
vp
ip
vsi
vs-vsi
0
For = 145
Figure 10.9. Waveforms in the H-C converter with source inductance; for =
145
10&11-10
F. Rahman
ELEC4240/9240
Power Electronics
ic
Ls
ia
T3
vcn
n
van
iL
vabi
vab
vbn
T1
Ls
ib
T2
vo
L
Figure 10.10
In this circuit, the converter output voltage during overlap is half of the incoming
and outgoing voltages. For instance, when T1 is triggered with angle , after the
crossover of van and vcn, the output voltage vo is given by
vo =
van + vcn
2
10.10
The voltage pulse missing from the output voltage waveform is bounded by va and
vo. This is given by
voL = van
10.11
3 Vmax sin t
where Vmax is the peak of the line-neutral
2
By expressing vol =
voltage.
1
3 Vmax
2
sin td ( t ) = Ls
2 L s
3 V max
Id
di
2 L s
Id
V max l l
I d = cos
10.12
Vd =
2 / 3
5
+
6
Vmax sin td ( t )
3 Vmax
2
10&11-11
sin td ( t )
F. Rahman
ELEC4240/9240
Power Electronics
3 3Vmax
3 Ls
cos
Id
2
2
10.13
10&11-12
F. Rahman
ELEC4240/9240
Power Electronics
10&11-13
F. Rahman
ELEC4240/9240
Power Electronics
+VD/2
ia
van
T3
T1
Ls
ib
vbn
vcn
Ls
T4
T6
Load
Vd
ic
iL
T5
L
T2
VD/2
Figure 10.13
In this converter, overlap due to source inductance occur every 60. When a
thyristor connected with the positive voltage is triggered, the positive dc bus
voltage becomes the average of the incoming and the outgoing phase voltages.
The same happens when one of the thyristors connected with the negative dc bus
is triggered.
During the commutation angle , current in the outgoing line falls gradually to
zero, while the current in the incoming line rises to Id. The voltage pulse missing
from the output voltage waveform is the difference between the incoming line
voltage minus the average of the incoming and the outgoing line voltages. For
instance, when thyristor T1 is triggered with angle , this voltage is given by,
voL = van
waveform.
Using a similar analysis as in the previous section, it can be shown that for this
converter,
cos ( + ) = cos
and
Vd =
3Vmax l l
cos
2 Ls
Id
Vmax l l
3 Ls
Id
10.14
10.15
10&11-14
F. Rahman
ELEC4240/9240
Power Electronics
10&11-15
F. Rahman
ELEC4240/9240
Power Electronics
10&11-16
F. Rahman
ELEC4240/9240
Power Electronics
+VD/2
ia
van
Ls
T5
ib
vbn
n
T3
T1
Df
ic
vcn
Ls
T4
T6
iL
iDf
R
Load
Vd
L
T2
VD/2
Figure 10.16
It can be shown that
Vd =
3Vmax l l
3 Ls
Id
[1 + cos ]
2
2
10.16
The above equation assumes that load current transfers to the free-wheeling diode
completely before the next thyristor is triggered, and that the load current transfers
from the free-wheeling diode to the incoming thyristor when it is triggered.
10&11-17
F. Rahman
ELEC4240/9240
Power Electronics
10.17
10.18
Here Vdcmax is the maximum dc output voltage for the converter circuit and XL is
a parameter determined by the input source inductance Ls and the converter
circuit.
V dm ax
= 0
= 30
Vd
= 60
= 75
= 90
= 110
= 130
= 160
V dm ax
Id
10&11-18
F. Rahman
ELEC4240/9240
Power Electronics
n
Vd max cos n sina sinn (t + ) cos cos n (t + )
p
vn ( t ) =
2
+ n sin ( + ) sinnt cos ( + ) cos nt
n 1
10.19
n
2 sin
3
bn =
n
n
sin
2
n
2
10.20
C. Commutation notches
During commutation overlap, simultaneous conduction of two thyristors makes
the line to line voltage of the two input lines under commutation zero. Other line
to line voltages are found by obtaining the difference of their potentials taking into
account the commutation. If the converter input voltage terminals are shared with
other loads, (these voltages are invariably used as signals which control the
triggering of the thyristors), then adequate filter circuits must be used to reduce
the commutation notches to acceptable levels. If these notches are not adequately
filtered out, firing angles vary from thyristor to thyristor, leading to uneven output
voltage ripples and thyristor currents.
Lectures 10&11 Overlap in AC-DC Converters
10&11-19
F. Rahman
ELEC4240/9240
Power Electronics
vo
ip
T1
T3
Id
is
R
Vmaxsint
Vd
L
T2
T4
Eb
10&11-20
F. Rahman
ELEC4240/9240
Power Electronics
di
+ Ri = Vmax sin t Eb
dt
10.21
V
E
R/L t
i = Ae ( ) + max sin( t ) b
Z
R
10.22
2
2
where Z = R + ( L )
and
10.23
= tan 1
10.24
R
Eb
sin( t )
Vmax
Z
Eb
( t )
R
sin( ) e L
+
Z
Vmax
10.25
Current i falls to zero at angle which is obtained by equating the above equation
to zero. Thus
Eb
Vmax
eR / L
= e R / L
E
cos sin( ) b
Vmax
cos sin( )
10.26
10&11-21
F. Rahman
ELEC4240/9240
Power Electronics
Vd
V dmax
= 0
= 30
= 60
= 75
= 90
= 110
= 130
= 160
V dmax
Id
10&11-22
F. Rahman