Exercise

Q1 (20 marks)
i.

Given circuit determine Moore or Mealy. (5 marks)

Moore
ii.

given state diagram determine Moore or Mealy. (5 marks )

Answer: Mealy
iii.

Between Moore and Mealy, which FSM require less state.

Answer: Mealy

Q2 (20 marks)
Given function table and pin assignments of shift register with parallel load
capability, complete the timing diagram below.

Answer

Q3 (20 marks)
The following state diagram describes a finite state machine with one input X and
one output Z. The FSM asserts its output Z when a certain string pattern from X is
recognised. Given input sequence X: 010011011011000001011000 determine
output sequence of Z.

Answer:

Pattern searched = 1011

X = 010011011011000001011000
Y = 000000000100100000000100

Q4 (40 marks)
Given state diagram:-

10

00

01
11

Derive state table

Answer:
Using D FlipFlop, D =
Next State
Present State
Next State
Q1
Q0
Q1+
Q0+
0
0
1
0
0
1
1
1
1
0
0
1
1
1
0
0
iv.

derive equation
D1 = Q1+ = Q1
D0 = Q0+ = Q1 Q0

v.

design circuit for the next state logic.