1

3&%67$&.83

BL6 Block Diagram

/$<(5723
/$<(5*1'
/$<(5,1
/$<(5,1
/$<(59&&

USB-0

/$<(5%27

EXT_LVDS
EXT_CRT
EXT_HDMI

VGA
P15,16,17,18,19,
20,21,22

DDRIII-SODIMM1
DDRIII-SODIMM2

SATA - HDD
P26

PCI-E x16

rPGA 989
P3, 4, 5, 6
FDI

DMI

P26

P14

3G

USB-10

CK505

P24

SATA
PCI-E

SATA 5

P2

PCI-Express

P25

USB-4

SIM Card

POWER SYSTEM
ISL88731
P.34
ISL82882C
P.39
RT8210B
P.35
UPI6116A
P.37
UP6163
P.36
UPI6111A
P.38
MAX8792A
P.41
RT8152C
P.42

PCIE-5

WLAN

P24

P25

HDMI Con.

PCIE-3
DMI

SATA 1

ESATA Con.

INT_HDMI

P23

P14

SATA 0
FDI

USB-13

HDMI
Level Shift

PCI-E

CRT Con.

DMI(x4)

SATA - ODD

ESATA
Re-driver

INT_CRT

PCI-E
Graphics Interfaces

Dual Channel DDR III

800/1066/1333 MHZ

DDR SYSTEM MEMORY

P12,13

INT_LVDS

Arrandale (UMA+VGA)

LCD/CCD Con. P23

SWITCH CIRCUIT

USB-5

Ibex Peak-M
USB-2

Bluetooth Con.

P24

USB 2.0 (Port0~13)

USB

P31

PCH

USB-8

USB Con.

P7, 8, 9, 10, 11

P31

PCIE-6

Giga/10/100 Lan

RTC

USB-9

USB Con.

P28

P31

+VCC_CORE

BATTERY
USB-3

Cardreader

+1.5V
+1.5VSUS

P7

P29

Azalia

IHDA
LPC

NVRAM

+VTT
+1.05V

NVRAM Con
P33

Cardreader Con.
P29
3 IN 1

LPC

+1.8V

Audio Codec

P30

Port-A

Port-B

P27

FAN
D

MIC JACK

MDC Con.
P27

+1.5V_S5
+3VPCU
+3V_S5
+3V
+5VPCU
+5V_S5
+5V
+SMDDR_VTERM
+SMDDR_VREF
+VGPU_CORE
+VAXG

EC

P27

HP

K/B Con.

HALL Sensor

SPI Flash

SPK Con.
P27

P27

P3

P31

P30

P23

Touch Pad /B
Con.

Power /B
Con.
P31

P31

Quanta Computer Inc.

PROJECT : BL6
Size

Document Number

Rev
A1A

Block Diagram
Date:
1

Wednesday, April 07, 2010

Sheet
8

of

45

CLOCK Gen
+3V
+1.05V

250mA(20mils)
L20

PBY160808T-601Y-N_1A

+VDDIO_CLK

80mA(20mils)

+3V_CK505_VDD

L43

C798
10U/6.3V_8X

C480
0.1U/10V_4X

C485
0.1U/10V_4X

U29
R302
*0_6

+1.5V

5
29

150mA(20mils)
L39

R632

2.2_6

+1.5V_CK505_VDD

1
17
24

PBY160808T-601Y-N_1A
C827
10U/6.3V_8X

CLK_PCH_14M

{8} CLK_PCH_14M

C483
0.1U/10V_4X

R289

C797
0.1U/10V_4X

C829
0.1U/10V_4X

XTAL_OUT
XTAL_IN

33_4

C479

27
28

VDD_27
VDD_REF

REF_0/CPU_SEL

CGDAT_SMB
CGCLK_SMB

31
32

SDA
SCL

2
8
9
12
21
26

VSS_DOT
VSS_27
VSS_SATA
VSS_SRC
VSS_CPU
VSS_REF

33

GND

C826

C831

*10U/6.3V_8X

10U/6.3V_8X

0.1U/10V_4X

0.1U/10V_4X

15
18

C3A
RP15

DOT_96
DOT_96#

CLK_BUF_DREFCLKP_R
CLK_BUF_DREFCLKN_R

27M
27M_SS

6
7

CLK_VGA_27M_R
CLK_VGA_27M#_R

SRC_1/SATA
SRC_1#/SATA#
SRC_2
SRC_2#

10
11
13
14

CLK_BUF_DREFSSCLKP_R
CLK_BUF_DREFSSCLKN_R
CLK_BUF_PCIE_3GPLLP_R
CLK_BUF_PCIE_3GPLLN_R

*CPU_STOP#

16

ICS_CPU_STOP#

CPU_1
CPU_1#
CPU_0
CPU_0#

20
19
23
22

CLK_BUF_BCLK1_P_R
CLK_BUF_BCLK1_N_R
CLK_BUF_BCLKP_R
CLK_BUF_BCLKN_R

CKPW RGD/PD#

25

XTAL_OUT
XTAL_IN

30

C844

3
4

VDD_DOT_1.5
VDD_SRC_1.5
VDD_CPU_1.5

CPU_SEL

*10P/50V_4C

VDD_SRC_I/O
VDD_CPU_I/O

PBY160808T-601Y-N_1A
D

C841

1 *SHORT_4P2R
3

2
4

R326
R329
RP19
RP20

CLK_BUF_DREFCLKP
CLK_BUF_DREFCLKN

*EV@33_4
EV@33_4

JTAG need Option2 for

Park,Madison Engineer sample.

B2A
R722

1 *SHORT_4P2R
3
1 *SHORT_4P2R
3

2
4
2
4

CLK_BUF_DREFSSCLKP
CLK_BUF_DREFSSCLKN
CLK_BUF_PCIE_3GPLLP
CLK_BUF_PCIE_3GPLLN

C3A
R332

{8}
{8}

27M_CLK {16}

10K_4

*EV@33_4

JTAG_TCK {16}

{8}
{8}
{8}
{8}

+3V

TP81
TP82

C3A
RP16

4
2

3 *SHORT_4P2R
1

CLK_BUF_BCLKP
CLK_BUF_BCLKN

{8}
{8}

VR_PWRGD_CLKEN

SLG8LV595VTR

CLK CRYSTAL

CLK CPU_SEL

CLK POWERGOOD

CLK I2C

Change to +3VPCU
(follow CRB)

+3V
+3V
+3VPCU

R291

1K/F_4

VR_PWRGD_CLKEN

R288
*10K_4

CPU_SEL

{39} VR_PWRGD_CK505#

10K_4

2N7002_200MA

XTAL_OUT

14.318MHZ_30

{8,24,28,33} SDATA

R626

C790

CGDAT_SMB {12,13,24}

C791
10K_4

33P/50V_4N

R292
100K/F_4

Q25

XTAL_IN

R675
Y5

Q59
2N7002_200MA

33P/50V_4N

R679
10K_4

+3V
A

0
CPU_SEL

{8,24,28,33} SCLK

CPU =133MHz CPU=100MHz

(default)

Quanta Computer Inc.

CGCLK_SMB {12,13,24}

PROJECT : BL6

Q60
2N7002_200MA
Size

Document Number

Rev
A1A

CLOCK GENERATOR
Date:
5

Thursday, April 08, 2010

Sheet
1

of

45

U15A

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

B24
D23
B23
A22

{9}
{9}
{9}
{9}

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

D24
G24
F23
H23

{9}
{9}
{9}
{9}

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

D25
F24
E23
G23

FDI_TXN[7:0]

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

FDI_TXP[7:0]

{9}
{9}

FDI_FSYNC0
FDI_FSYNC1

{9}

FDI_INT

{9}
{9}

FDI_LSYNC0
FDI_LSYNC1

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

E22
D21
D19
D18
G21
E19
F21
G18
D22
C21
D20
C18
G22
E20
F20
G19

FDI_FSYNC0
FDI_FSYNC1

F17
E17

FDI_INT

C17

FDI_LSYNC0
FDI_LSYNC1

F18
D17

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
FDI_FSYNC[0]
FDI_FSYNC[1]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

FDI_INT
FDI_LSYNC[0]
FDI_LSYNC[1]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

B26 PEG_COMP
A26
B27
A25 PEG_RBIAS
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0

R370
R369

49.9/F_4
750/F_4
PEG_RXN[0..15] {15}
U15B
R57
R56
R20
R76

H_COMP3 AT23
H_COMP2 AT24
H_COMP1 G16
H_COMP0 AT26
AH24

TP3
H_CATERR#
{10}

H_PECI

AK14
AT15
AN26
AK15

H_PROCHOT#_D
CPU_PM_THRMTRIP#

COMP3
COMP2
COMP1
COMP0
SKTOCC#

{10,33} H_PWRGOOD

AP26
AL15
AN14
AN27
AK13

PM_DRAM_PWRGD

AM26

{33} H_PWRGD_XDP
H_VTTPWRGD
R38
1.5K/F_4 CPU_PLTRST#

{9,24,28,29,30} PLTRST#

R39

AM15
AL14

RESET_OBS#
PM_SYNC
VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK

PR222

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

PEG_TXN15_C
PEG_TXN14_C
PEG_TXN13_C
PEG_TXN12_C
PEG_TXN11_C
PEG_TXN10_C
PEG_TXN9_C
PEG_TXN8_C
PEG_TXN7_C
PEG_TXN6_C
PEG_TXN5_C
PEG_TXN4_C
PEG_TXN3_C
PEG_TXN2_C
PEG_TXN1_C
PEG_TXN0_C

C624
C617
C614
C607
C597
C589
C586
C584
C582
C579
C577
C575
C573
C571
C569
C567

EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X

PEG_TXN15
PEG_TXN14
PEG_TXN13
PEG_TXN12
PEG_TXN11
PEG_TXN10
PEG_TXN9
PEG_TXN8
PEG_TXN7
PEG_TXN6
PEG_TXN5
PEG_TXN4
PEG_TXN3
PEG_TXN2
PEG_TXN1
PEG_TXN0

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

PEG_TXP15_C
PEG_TXP14_C
PEG_TXP13_C
PEG_TXP12_C
PEG_TXP11_C
PEG_TXP10_C
PEG_TXP9_C
PEG_TXP8_C
PEG_TXP7_C
PEG_TXP6_C
PEG_TXP5_C
PEG_TXP4_C
PEG_TXP3_C
PEG_TXP2_C
PEG_TXP1_C
PEG_TXP0_C

C623
C616
C613
C608
C590
C587
C585
C583
C581
C578
C576
C574
C572
C570
C568
C566

EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X
EV@0.1U/10V_4X

PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0

MAINON

PRDY#
PREQ#
TCK

XDP_OBS0 AJ22
XDP_OBS1 AK22
XDP_OBS2 AK24
XDP_OBS3 AJ24
XDP_OBS4 AJ25
XDP_OBS5 AH22
XDP_OBS6 AK23
XDP_OBS7 AH23

JTAG & BPM

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

TRST#
TDI
TDO
TDI_M
TDO_M

AT28
AP27
AN28

XDP_PREQ#
XDP_TCLK

AP28

XDP_TMS

AT27

XDP_TRST#

AT29
AR27
AR29
AP29

XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

XDP_TCLK

R53

*51/F_4

H_CATERR#
R34
H_CPURST#_R R99

49.9/F_4
*68_4

XDP_TMS
XDP_TDI_R
XDP_PREQ#

*51/F_4
*51/F_4
*51/F_4

R60
R92
R64

XDP_TDI_R
XDP_TDO_M

R72
R59

0_4
*0_4

XDP_PRDY# {33}
XDP_PREQ# {33}
XDP_TCLK {33}
XDP_TMS {33}
XDP_TRST# {33}

{11,30,37,38,40}

+VTT

R40

XDP_TRST#
R73
R95

*0_4
0_4

{39} H_PROCHOT#

R93
51/F_4

Scan Chain
(Default)

STUFF -> Ra, Rc, Re

NO STUFF -> Rb, Rd

CPU Only

STUFF -> Ra, Rb

NO STUFF -> Rc, Rd, Re

GMCH Only

STUFF -> Rd, Re

NO STUFF -> Ra, Rb, Rc

R41

C37

*100K_4

0.1U/10V_4X

H_PROCHOT#_D

0_4

Thermal Trip

R10

+VTT
R21
*0_4

Q10

{9,39} DELAY_VR_PWRGOOD

2N7002_200MA
1

Discrete only

+3V
R70

HWPG

*SHORT_4
5

{30}

FDI_INT

R16

EV@1K_4

R12

EV@1K_4 FDI_FSYNC0

+VTT

R17

EV@1K_4 FDI_FSYNC1

R15

EV@1K_4 FDI_LSYNC0

R13

EV@1K_4 FDI_LSYNC1

R107

R106

1K_4

100K_4

2
PR241

*0_4

C3A

S3_Reduce {30}

R63
*SHORT_4

MAINON_ON_G {5,12,40,41}

HWPG_1

R48

2K/F_4

H_VTTPWRGD

U2
R58

{9,30} MPWROK

R101

1
TC7SH08FU(F)

*0_4

R46

FDI_FSYNC can gang all these 4

signals together and tie them with
only one 1K resistor to GND (
Check list 1.0 ).

*0_4

B2A

Q12
MMBT3904-7-F_200MA

*56.2/F_4
CPU_PM_THRMTRIP#

R61
1K/F_4

PM_EXTTS#0 {12}
PM_EXTTS#1 {13}

XDP_TDI {33}
XDP_TDO {33}

XDP_TDO

R22
1K/F_4

+3V_S5

SYS_SHDN#

R100

0_4

SYS_SHDN# {16,35}

PM_THRMTRIP#

PM_THRMTRIP# {10}

CPU FAN CTRL

+3V_S5
R412
10K_4

R410
10K_4

+3V

+3V_S5
+3V

D3A

10K_4

1.5K/F_4

R422

0_4 PM_DRAM_PWRGD

+1.5VSUS
3

C23

2.2U/6.3V_6X

CPUFAN#_ON_R_1
3
2N7002_200MA

PM_DRAM_PWRGD {9}
{10,30} TEMP_ALERT#

TC7SH08FU(F)

TEMP_ALERT#

1
Q35

R421
750/F_4

VFAN1

+3V

E3A

R634
*3K/F_4

VO
GND
/FON GND
GND
VSET GND

{30}

CN12

FANSIG1

FANSIG1

TH_FAN_POWER1

1
2
3

C551

C550

C552

10U/6.3V_8X

0.01U/25V_4X

*0.01U/25V_4X

85205-0300L

FANPWR = 1.6*VSET

PM_DRAM_PWRGD

PM_DRAM_PWRGD:
Never drive hight before DDR3 voltage ramp to stable

VIN

3
5
6
7
8

G995P1U

R645
*1.1K/F_4
2

{30}

Q38
FDV301N_200MA

40mils

U14

R419

Q39
2N7002_200MA

10K_4

+5V

U17
4

R368

3mA(40mils)

R403
+1.5V_CPUVDDQ_PG
2

1K_4

+VTT

68_4

XDP_TDI_M
XDP_TDO_R

+1.5V_CPUVDDQ_PG

R404

10K_4

D3A

2
1

+VTT

R97

R66
0_4

+1.5VSUS

for S3 power reduction

+1.5V_CPUVDDQ

100/F_4
24.9/F_4
130/F_4
10K_4

Processor hot

DDR3_DRAMRST#_C

PQ49
DMN601K-7_300MA

EV@0_4

R407
R408
R409
R98

SYS_RESET# {9,33}

JTAG MAPPING

+VTT

BSS138_NL_0.22MA

TC7SH08FU(F)

CLK_DREFSSCLKP {8}
CLK_DREFSSCLKN {8}

AN25

DBR#

PEG_TXP[0..15] {15}

+3V_S5

PR227 100K_4
1
2

4 *IV@0X2
2

PZ98927-3641-41F

B2A
PU12

R372 3
1

AN15 PM_EXT_TS#0
AP15 PM_EXT_TS#1

PM_EXT_TS#[0]
PM_EXT_TS#[1]

PWR MANAGEMENT

CLK_CPU_BCLK_ITP {33}
CLK_CPU_BCLK_ITP# {33}
CLK_PCIE_3GPLLP {8}
CLK_PCIE_3GPLLN {8}

EV@0_4

DDR3_DRAMRST#_C

AL1 SM_RCOMP_0
AM1 SM_RCOMP_1
AN1 SM_RCOMP_2

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

VTTPWRGOOD
RSTIN#

DDR3_DRAMRST# {12,13}

*0_6

F6

SM_DRAMRST#

DDR3
MISC

TAPPWRGOOD

Q1
S3_1.5V

R374

A18 CLK_DREFSSCLKP_R
A17 CLK_DREFSSCLKN_R

DPLL_REF_SSCLK
DPLL_REF_SSCLK#

TMS
{33} XDP_OBS[0:7]

Change from Page36

S3_1.5V

E16
D16

PEG_CLK
CLOCKS PEG_CLK#

THERMAL

CLK_CPU_BCLKP {10}
CLK_CPU_BCLKN {10}

AR30
AT30

BCLK_ITP
BCLK_ITP#

CATERR#
PECI
PROCHOT#
THERMTRIP#

750/F_4

PEG_TXN[0..15] {15}

{10} DDR3_DRAMRST#_PCH

{36}

A16
B16

BCLK
BCLK#

MISC

R373
H_CPURST#_R

{33} H_CPURST#_R
{9}
PM_SYNC

PEG_RXP[0..15] {15}

PZ98927-3641-41F

C3A

20/F_4
20/F_4
49.9/F_4
49.9/F_4

{9}
{9}
{9}
{9}

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

{9}

A24
C23
B22
A21

Intel(R) FDI

{9}

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

PCI EXPRESS -- GRAPHICS

{9}
{9}
{9}
{9}

{22} VGA_THERM#

1
Q65

B2A
3
EV@2N7002_200MA

Quanta Computer Inc.

PROJECT :BL6
Size

Document Number

Date:

Saturday, April 10, 2010

PROCESSER 1/4(HOST&PEX)
1

Sheet
8

of

Rev
A1A
45

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

A

{13} M_B_DQ[63:0]

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

AA6
AA7
P7

M_A_CLKP0 {12}
M_A_CLKN0 {12}
M_A_CKE0 {12}

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

Y6
Y5
P6

M_A_CLKP1 {12}
M_A_CLKN1 {12}
M_A_CKE1 {12}

SA_CS#[0]
SA_CS#[1]

AE2
AE8

M_A_CS#0 {12}
M_A_CS#1 {12}

SA_ODT[0]
SA_ODT[1]

AD8
AF9

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

M_A_DM0
B9
D7 M_A_DM1
H7 M_A_DM2
M7 M_A_DM3
AG6 M_A_DM4
AM7 M_A_DM5
AN10 M_A_DM6
AN13 M_A_DM7
M_A_DQSN0
C9
M_A_DQSN1
F8
M_A_DQSN2
J9
M_A_DQSN3
N9
AH7 M_A_DQSN4
AK9 M_A_DQSN5
AP11 M_A_DQSN6
AT13 M_A_DQSN7

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

C8 M_A_DQSP0
M_A_DQSP1
F9
H9 M_A_DQSP2
M9 M_A_DQSP3
AH8 M_A_DQSP4
AK10 M_A_DQSP5
AN11 M_A_DQSP6
AR13 M_A_DQSP7

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

U15D
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_A_ODT0 {12}
M_A_ODT1 {12}
M_A_DM[7:0] {12}

M_A_DQSN[7:0]

M_A_DQSP[7:0]

{12}

{12}

M_A_A[15:0] {12}

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

{12}
{12}
{12}

M_A_BS#0
M_A_BS#1
M_A_BS#2

AC3
AB2
U7

SA_BS[0]
SA_BS[1]
SA_BS[2]

{13}
{13}
{13}

M_B_BS#0
M_B_BS#1
M_B_BS#2

AB1
W5
R7

SB_BS[0]
SB_BS[1]
SB_BS[2]

{12}
{12}
{12}

M_A_CAS#
M_A_RAS#
M_A_WE#

AE1
AB3
AE9

SA_CAS#
SA_RAS#
SA_W E#

{13}
{13}
{13}

M_B_CAS#
M_B_RAS#
M_B_WE#

AC5
Y7
AC6

SB_CAS#
SB_RAS#
SB_W E#

PZ98927-3641-41F

DDR SYSTEM MEMORY B

M_A_DQ0
A10
M_A_DQ1 C10
M_A_DQ2
C7
M_A_DQ3
A7
M_A_DQ4
B10
M_A_DQ5 D10
M_A_DQ6
E10
M_A_DQ7
A8
M_A_DQ8
D8
M_A_DQ9
F10
M_A_DQ10
E6
M_A_DQ11
F7
M_A_DQ12
E9
M_A_DQ13
B7
M_A_DQ14
E7
M_A_DQ15
C6
M_A_DQ16 H10
M_A_DQ17 G8
M_A_DQ18
K7
M_A_DQ19
J8
M_A_DQ20 G7
M_A_DQ21 G10
M_A_DQ22
J7
M_A_DQ23 J10
M_A_DQ24
L7
M_A_DQ25 M6
M_A_DQ26 M8
M_A_DQ27
L9
M_A_DQ28
L6
M_A_DQ29
K8
M_A_DQ30
N8
M_A_DQ31
P9
M_A_DQ32 AH5
M_A_DQ33 AF5
M_A_DQ34 AK6
M_A_DQ35 AK7
M_A_DQ36 AF6
M_A_DQ37 AG5
M_A_DQ38 AJ7
M_A_DQ39 AJ6
M_A_DQ40 AJ10
M_A_DQ41 AJ9
M_A_DQ42 AL10
M_A_DQ43 AK12
M_A_DQ44 AK8
M_A_DQ45 AL7
M_A_DQ46 AK11
M_A_DQ47 AL8
M_A_DQ48 AN8
M_A_DQ49 AM10
M_A_DQ50 AR11
M_A_DQ51 AL11
M_A_DQ52 AM9
M_A_DQ53 AN9
M_A_DQ54 AT11
M_A_DQ55 AP12
M_A_DQ56 AM12
M_A_DQ57 AN12
M_A_DQ58 AM13
M_A_DQ59 AT14
M_A_DQ60 AT12
M_A_DQ61 AL13
M_A_DQ62 AR14
M_A_DQ63 AP14

DDR SYSTEM MEMORY A

U15C

{12} M_A_DQ[63:0]

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

W8
W9
M3

M_B_CLKP0 {13}
M_B_CLKN0 {13}
M_B_CKE0 {13}

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

V7
V6
M2

M_B_CLKP1 {13}
M_B_CLKN1 {13}
M_B_CKE1 {13}

SB_CS#[0]
SB_CS#[1]

AB8
AD6

M_B_CS#0 {13}
M_B_CS#1 {13}

SB_ODT[0]
SB_ODT[1]

AC7
AD1

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

D4
E1
H3
K1
AH1
AL2
AR4
AT8

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

D5
F4
J4
L4
AH2
AL4
AR5
AR8

M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

C5
E3
H4
M5
AG2
AL5
AP5
AR7

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_ODT0 {13}
M_B_ODT1 {13}
M_B_DM[7:0] {13}

M_B_DQSN[7:0]

{13}

M_B_DQSP[7:0]

{13}

M_B_A[15:0] {13}

PZ98927-3641-41F

Quanta Computer Inc.

PROJECT : BL6
Size

Document Number

Rev
A1A

PROCESSER 2/4(DDR)
Date:
1

Saturday, April 10, 2010

7

Sheet

4
8

of

45

10U/6.3V_8X

C103

10U/6.3V_8X

C603

10U/6.3V_8X

C604

10U/6.3V_8X

C554

10U/6.3V_8X

C116

10U/6.3V_8X

C601

10U/6.3V_8X

C111

10U/6.3V_8X

C113

10U/6.3V_8X

C69

10U/6.3V_8X

10U/6.3V_8X

C117

10U/6.3V_8X

C120

*0.1U/10V_4X

C118

*0.1U/10V_4X

C72

*0.047U/10V_4X

C73

*0.047U/10V_4X

C74

*0.047U/10V_4X

C40

10U/6.3V_8X

C36

10U/6.3V_8X

C564

10U/6.3V_8X

C556

10U/6.3V_8X

C558

10U/6.3V_8X

C560

10U/6.3V_8X

C565

*10U/6.3V_8X

C562

*10U/6.3V_8X

AF10
AE10
C82
AC10
AB10
C91
Y10
W10
U10
T10
J12
J11
J16 +VTT_43
J15 +VTT_44

10U/6.3V_8X

C622

10U/6.3V_8X

C58

10U/6.3V_8X

+VAXG

C618
C612
C555

10U/6.3V_8X
*330U/2V_7343P_E9c

C620

IV@10U/6.3V_8X

C645

*IV@330U/2V_7343P_E9c

C648

*IV@330U/2V_7343P_E9c

R78

EV@0_8

+VTT

(15mils)
R18
R19

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
ICH_DPRSTP#

H_VID0
{39}
H_VID1
{39}
H_VID2
{39}
H_VID3
{39}
H_VID4
{39}
H_VID5
{39}
H_VID6
{39}
ICH_DPRSTP#

{39}

G15

10U/6.3V_8X

J24
J23
H25

VTT1_45
VTT1_46
VTT1_47

K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25

VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58

ISENSE

ISENSE

R376

100/F_4

R380

100/F_4

AJ34
AJ35

10U/6.3V_8X

C563

10U/6.3V_8X

C559

10U/6.3V_8X

C100

10U/6.3V_8X

GFXVR_VID_0
GFXVR_VID_1
GFXVR_VID_2
GFXVR_VID_3
GFXVR_VID_4
GFXVR_VID_5
GFXVR_VID_6

GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON

AR25
AT25
AM24

GFXVR_EN {42}
GFXVR_DPRSLPVR
GFXVR_IMON {42}

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

P10
N10
L10
K10
J22
J20
J18
H21
H20
H19

VCCPLL1
VCCPLL2
VCCPLL3

L26
L27
M26

+VTT

{39}

TP52
TP51
+VCC_CORE
VCCSENSE {39}
VSSSENSE {39}

H_VID0

R384
R382

1K_4
*1K_4

H_VID1

R383
R381

1K_4
*1K_4

H_VID2

R385
R388

1K_4
*1K_4

H_VID3

R386
R389

*1K_4
1K_4

H_VID4

R393
R395

*1K_4
1K_4

H_VID5

R405
R400

1K_4
*1K_4

H_VID6

R394
R396

*1K_4
1K_4

ICH_DPRSTP#

R417
R414

1K_4
*1K_4

PSI#

R406
R401

*1K_4
1K_4

C54
C63
C65
C57
C46
C50
C41

{42}
{42}

{42}
{42}
{42}
{42}
{42}
{42}
{42}

{42}

EV@1K_4

+1.5V_CPUVDDQ

1U/6.3V_4X
1U/6.3V_4X
1U/6.3V_4X
1U/6.3V_4X
4.7U/6.3V_6X
4.7U/6.3V_6X
4.7U/6.3V_6X

C3A
B

+VTT
C600

10U/6.3V_8X

C605

10U/6.3V_8X

C594

10U/6.3V_8X

C593

*10U/6.3V_8X

C61

10U/6.3V_8X

C130

4.7U/6.3V_6X

for S3 power reduction

+1.5V_CPUVDDQ

R23
220_8

+1.8V

PZ98927-3641-41F

VID Default Setting

VID[6:0]=[0100111]

TP1

VTT_SENSE
TP_VSS_SENSE_VTT

C29

{39}

H_VTTVID1=Low, 1.1V
H_VTTVID1=High, 1.05V

AN35

10U/6.3V_8X

C595

+VTT

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

B15
A15

C105

AM22
AP22
AN22
AP23
AM23
AP24
AN24

R65

*SHORT_4
*SHORT_4

C3A
PSI#

VCC_SENSE
VSS_SENSE

IV@10U/6.3V_8X

10U/6.3V_8X

PSI#

ISENSE

IV@10U/6.3V_8X

C621

10U/6.3V_8X

AN33

VTT_SENSE
VSS_SENSE_VTT

C619

+VTT

PSI#

VTT_SELECT

IV@10U/6.3V_8X

PEG & DMI

C611

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

10U/6.3V_8X

C30

FDI

10U/6.3V_8X

C598

C553

10U/6.3V_8X

10U/6.3V_8X

CPU CORE SUPPLY

C610

C35

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

VCC_AXG_SENSE
VSS_AXG_SENSE

C93

10U/6.3V_8X

AR22
AT22

C60

2.2U/6.3V_6X

C129

1U/6.3V_4X

C596

1U/6.3V_4X

{3,12,40,41}

Q2
DMN601K-7_300MA

+1.5VSUS

+15V

R35
*100K_4

{35,36,40}

MAIND

MAIND

C126
0.01U/25V_4X

Q3
AO4466_9.4A

+1.5V_CPUVDDQ

HFM_VID : Max 1.4V

LFM_VID : Min 0.65V

+VCC_CORE

MAINON_ON_G

10U/6.3V_8X

C28

VAXG_SENSE
VSSAXG_SENSE

5
6
7
8

C609

3
2
1

10U/6.3V_8X

10U/6.3V_8X

SENSE
LINES

C114

10U/6.3V_8X

C592

GRAPHICS VIDs

10U/6.3V_8X

C606

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

- 1.5V RAILS

10U/6.3V_8X

C70

10U/6.3V_8X

POWER

C76

C615

U15G
AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16

+VTT

1.8V

10U/6.3V_8X

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

C602

1.1V RAIL POWER

10U/6.3V_8X

POWER

C38

CPU VIDS

10U/6.3V_8X

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

GRAPHICS

10U/6.3V_8X

C39

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

SENSE LINES

C71

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

18A

U15F
+VCC_CORE

DDR3

1.1V

6A/maximum

PZ98927-3641-41F
C84

Quanta Computer Inc.

C101

C3A

+
*330U/2V_7343P_E9c

*330U/2V_7343P_E9c

PROJECT : BL6

C3A
Size

Document Number

Rev
A1A

PROCESSER 3/4(POWER)
Date:
1

Saturday, April 10, 2010

Sheet

5
8

of

45

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W 35
W 34
W 33
W 32
W 31
W 30
W 29
W 28
W 27
W 26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

R411
R371
R43

AT35
AT1
AR34
B34
B2
B1
A35

*0_4
*0_4
*0_4

AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U15I

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

U15E

J17
H17

{12} DDR_VREF_DQ0
{13} DDR_VREF_DQ1
CFG0
CFG3
CFG4
CFG7

TP2

VSS

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

R14
R11

*0_4 TP_RSVD17_R
*0_4 TP_RSVD18_R

SA_DIMM_VREF
SB_DIMM_VREF

AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8

G25
G17
E31
E30
B19
A19
A20
B20
U9
T9

RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20

AC9
AB9
C1
A3
J29
J28
A34
A33
C35

RSVD21
RSVD22
RSVD_NCTF_23
RSVD_NCTF_24
RSVD26
RSVD27
RSVD_NCTF_28
RSVD_NCTF_29
RSVD_NCTF_30

B35
AJ13
AJ12
AH25
AK26
AL26
AR2
AJ26
AJ27
AP1

RSVD_NCTF_31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD_NCTF_37
RSVD38
RSVD39
RSVD_NCTF_40

RSVD_NCTF_41
RSVD_NCTF_42
RSVD_NCTF_43
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

AT2
AT3
AR1
AL28
AL29
AP30
AP32
AL27
AT31

RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58
RSVD_TP_59
RSVD_TP_60

AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32
E15
F15

KEY
RSVD62
RSVD63
RSVD64
RSVD65
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70

A2
D15
C15
AJ15 RSVD64_R
AH15 RSVD65_R
AA5
AA4
R8
AD3
AD2

RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80

AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7

RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

W3
W2
N3
AE5
AD9

VSS

R50
R51

*0_4
*0_4

AP34

TP53

PZ98927-3641-41F

NCTF

U15H

RESERVED

PZ98927-3641-41F
PZ98927-3641-41F

Processor Strapping
1
CFG4
(Display Port
Presence)

The Clarkfield processor's PCI Express interface may

not meet PCI Express 2.0 jitter specifications. Intel
recommends placing a 3.01K +/- 5% pull down resistor to
VSS on CFG[7] pin for both rPGA and BGA components.
This pull down resistor should be removed when this
issue is fixed.

CFG0
(PCI-Epress
Configuration Select)
CFG3
(PCI-Epress Static
Lane Reversal)

Disabled; No Physical Display Port

attached to Embedded Diplay Port

Single PEG
Normal Operation

Enabled; An external Display port

device is connected to the Embedded
Display port

R52

CFG3

R47

3.01K/F_4

CFG4

R45

*3.01K/F_4

CFG7

R49

*3.01K/F_4

Bifurcation enabled
Lane Numbers Reversed
15 -> 0 , 14 -> 1

*3.01K/F_4

Quanta Computer Inc.

PROJECT : BL6
Size

Document Number

Rev
1A

PROCESSER 4/4 (GND)

Date:

CFG0

Saturday, April 10, 2010

7

Sheet

6
8

of

45

18P/50V_4C

R642

+RTC_CELL

1M_4

RTC_RST#

C14

SRTC_RST#

D17

SM_INTRUDER#
PCH_INVRMEN

{10} PCH_INVRMEN

ACZ_BITCLK
ACZ_SYNC
{10,27} PCBEEP

B13
D13

ACZ_RST#

{27} ACZ_SDIN0_AUDIO
TP45
ACZ_SDOUT
{10,30} PCH_GPIO33

A16
A14

A30
D29
P1
C30
G30
F30
E32
F32
B29
H32
J30

TP48
PCH_JTAG_TCK_BUF

M3

{33} PCH_JTAG_TMS

PCH_JTAG_TMS

K3

{33} PCH_JTAG_TDI

PCH_JTAG_TDI

K1

{33} PCH_JTAG_TDO

PCH_JTAG_TDO

J2

PCH_JTAG_RST#

J4

{33} PCH_JTAG_TCK

{33} PCH_JTAG_RST#

Ibex-M
1 OF 10

RTCX1
RTCX2

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ

LPC

RTCRST#

RTC

SRTCRST#

(+3V)

INTRUDER#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

INTVRMEN

HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDO
HDA_DOCK_EN# / GPIO33
HDA_DOCK_RST# / GPIO13

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

IHDA

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

(+3V)
(+3V_S5)

SATA

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

JTAG_TCK
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

JTAG_TMS

JTAG

JTAG_TDI
JTAG_TDO

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

TRST#

D33
B33
C32
A32
C34
A34
F34
AB9

LFRAME#

{24,30}

LDRQ#1

{24}

+3V

{23} INT_LVDS_BLON
{23} INT_LVDS_DIGON
{23} INT_LVDS_PWM

R229
10K_4

{26}
{26}
{26}
{26}

AH6
AH5
AH9
AH8

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

{26}
{26}
{26}
{26}

AB46
V48

LVDS_IBG
LVDS_VBG

AP39
AP41

HDD

LVDS_VREFH
LVDS_VREFL

AT43
AT42

ODD

INT_TXLCLKOUTINT_TXLCLKOUT+

AV53
AV51

INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-

BB47
BA52
AY48
AV47

INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+

BB48
BA50
AY49
AV48

{23} INT_TXLCLKOUT{23} INT_TXLCLKOUT+

{23} INT_TXLOUT0{23} INT_TXLOUT1{23} INT_TXLOUT2{23} INT_TXLOUT0+
{23} INT_TXLOUT1+
{23} INT_TXLOUT2+

STAT2/SATA3 HM55 not support

AD9
AD8
AD6
AD5

TP34
TP30
TP29
TP33

TP12
{10}

SPI_SI_R

BA2

SPI_CS0#_R

AV3

SPI_CS1#

AY3

SPI_SI_R

AY1

SPI_SO_R

AV1

SPI_CLK

SATAICOMPO

SPI_CS0#

SATAICOMPI

SPI

SPI_CS1#

SATALED#

AD3
AD1
AB3
AB1

SATA_RXN5
SATA_RXP5
SATA_TXN5
SATA_TXP5

{25}
{25}
{25}
{25}

SPI_MOSI

(+3V)
(+3V_S5)

SPI_MISO

SATA0GP / GPIO21
SATA1GP / GPIO19

AF15

SATA_COMP

R220

37.4/F_4

SATA_LED#

GPIO21
GPIO19

Y9
V1

+1.05V
SATA_LED#

R237
R587

10K_4
10K_4

TP66
TP22
TP68

AY53
AT49
AU52
AT53

TP67
TP23
TP17

AY51
AT48
AU50
AT51

ESATA

AF16

T3

AP48
AP47

TP26
TP25

SPI_CLK_R

IV@10K_4
IV@10K_4
TP24

AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1

Y48

L_CTRL_CLK
L_CTRL_DATA

R233
R234

+3V

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

INT_LVDS_PWM

AB48
Y45

{24,30}

AK7
AK6
AK11
AK9

T48
T47

INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA

{23} INT_LVDS_EDIDCLK
{23} INT_LVDS_EDIDDATA

SERIRQ

INT_LVDS_BLON
INT_LVDS_DIGON

INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED

{23} INT_CRT_BLU
{23} INT_CRT_GRN
{23} INT_CRT_RED

{32}

{23} INT_CRT_DDCCLK
{23} INT_CRT_DDCDAT
+3V
+3V

R604
R611

{23} INT_HSYNC
{23} INT_VSYNC

IbexPeak-M_Rev1_0

AA52
AB53
AD53

INT_CRT_DDCCLK
INT_CRT_DDCDAT

R227

IV@0_4
IV@0_4

INT_HSYNC_R
INT_VSYNC_R

1K/D_4

DAC_IREF

V51
V53
Y53
Y51
AD48
AB51

B2A

Ibex-M
4 OF 10

L_BKLTEN
L_VDD_EN

SDVO_TVCLKINN
SDVO_TVCLKINP

L_BKLTCTL

SDVO_STALLN
SDVO_STALLP

L_DDC_CLK
L_DDC_DATA

SDVO_INTN
SDVO_INTP

SDVO

L_CTRL_CLK
L_CTRL_DATA

SDVO_CTRLCLK
SDVO_CTRLDATA

LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL

LVDS--A
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDS--B
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED

CRT

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

DISPLAY PORT B

RTC_X1
RTC_X2

{24,30}
{24,30}
{24,30}
{24,30}

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA

DISPLAY PORT C

C803

U24D
LAD0
LAD1
LAD2
LAD3

U24A

10M_4
3
4

32.768KHZ_10

IBEX PEAK-M (LVDS,DDI)

IBEX PEAK-M (HDA,JTAG,SATA)

R636

Digital Display Interface

Y6

18P/50V_4C
2
1

C804

DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA

DISPLAY PORT D

DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

DAC_IREF
CRT_IRTN

BJ46
BG46
BJ48
BG48

BF45
BH45
T51
T53
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
Y49
AB49

TP31
TP32

BE44
BD44
AV40

TP13
TP7
TP9

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

TP57
TP54
TP10
TP8
TP58
TP62
TP56
TP60

U50
U52

SDVO_CTRLCLK {14}
SDVO_CTRLDATA {14}

BC46
BD46
AT38

DDPD_AUXN
DDPD_AUXP

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

C_TMDSD_DATA2#
C_TMDSD_DATA2
C_TMDSD_DATA1#
C_TMDSD_DATA1
C_TMDSD_DATA0#
C_TMDSD_DATA0
C_TMDSD_CLK#
C_TMDSD_CLK

R175
R174

IV@10K_4
IV@10K_4

+3V
Port-D_HPD

{14}

IbexPeak-M_Rev1_0

Port

Strap

57&%$77(5<

+3VPCU

+RTC_CELL

(20mils)
D21

(30mils)

CH501H-40PT_100MA

(20mils)

R_3VRTC

How to enable Port?

L_DDC_DATA

LVDS

How to disable Port?

PU to 3.3V with 2.2k+/- 5%

NC

Port B SDVO_CTRLDATA PU to 3.3V with 2.2k+/- 5%

NC

Port C DDPC_CTRLDATA PU to 3.3V with 2.2k+/- 5%

NC

Port D DDPD_CTRLDATA PU to 3.3V with 2.2k+/- 5%

NC
C

D20

eDP

CH501H-40PT_100MA

CFG[4]

NC

PD to GND directly

C530
1U/10V_6X
R352

HDMI

1K_4
RTC_N02

(20mils)
1
3

R349

1.91K/F_4

R350

(20mils)

1.91K/F_4

+5VPCU

R203

LVDS_VREFH
LVDS_VREFL

IV@0_4

Q28
MMBT3904-7-F_200MA

R351

CN25
2
1

R201

6.8K/F_4

For IV@ 2.37K/F

For EV@ NC

LVDS_IBG

IV@2.37K/F_4

(20mils)

2
1

RTC_N03

R348

R601
R597
R585

5(6(7-803

ACZ_RST#

{27} ACZ_RST#_AUDIO

R637

0_4

{27} ACZ_SDOUT_AUDIO

R640

0_4 ACZ_SDOUT

{27} ACZ_SYNC_AUDIO

R639

0_4

{27} BIT_CLK_AUDIO

R638

ACZ_SYNC

+RTC_CELL

An RC delay circuit with a time delay in the range

of 18 ms to 25 ms should be provided

E3A
R336

C821

IV@150/F_4
IV@150/F_4
IV@150/F_4

INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED

C715
C709

IHM@0.1U/10V_4X
IHM@0.1U/10V_4X

TMDSD_DATA2
TMDSD_DATA2#

C_TMDSD_DATA1
C_TMDSD_DATA1#

C721
C712

IHM@0.1U/10V_4X
IHM@0.1U/10V_4X

TMDSD_DATA1
TMDSD_DATA1#

C_TMDSD_DATA0
C_TMDSD_DATA0#

C722
C710

IHM@0.1U/10V_4X
IHM@0.1U/10V_4X

TMDSD_DATA0
TMDSD_DATA0#

For IV@ Connect to 150ohm/F

EV@ NC

C_TMDSD_CLK
C_TMDSD_CLK#

C349
C361

IHM@0.1U/10V_4X
IHM@0.1U/10V_4X

TMDSD_CLK
TMDSD_CLK#

4M byte SPI ROM

TMDSD_DATA2 {14}
TMDSD_DATA2# {14}
TMDSD_DATA1 {14}
TMDSD_DATA1# {14}
TMDSD_DATA0 {14}
TMDSD_DATA0# {14}

PCH

RTC_RST#

20K_6

33_4 ACZ_BITCLK
C513

G1

1U/6.3V_4X

*SHORT_ PAD

+RTC_CELL

2MB

8MB

4MB

HM55

U21

*10P/50V_4C

TMDSD_CLK {14}
TMDSD_CLK# {14}

PM55
SPI_SO_R

R542

0_4

SPI_SO

SPI_SI_R

R466

0_4

SPI_SI

SPI_CLK_R

R465

0_4

SPI_CLK

SPI_CS0#_R R510

0_4

SPI_CS0#

+1.05V
R606

C_TMDSD_DATA2
C_TMDSD_DATA2#

15K/F_4

AAA-BAT-046-K03

For AUDIO

For IV@ 0ohm

For EV@ NC

*51/F_4 PCH_JTAG_TMS

SO

VDD

SI

HOLD

SCK

WP

CE

VSS

+3V

SPI_HOLD#

R471

SPI_WP#

R526

HM57/PM57

3.3K/F_4
3.3K/F_4

QM57/QS57

4
0.1U/10V_4X

C739

W25Q32BVSSIG
R609

*51/F_4 PCH_JTAG_RST#

R607

*51/F_4 PCH_JTAG_TDI

C514

G2

R608

*51/F_4 PCH_JTAG_TDO

1U/6.3V_4X

*SHORT_ PAD

R605
1

R337

SRTC_RST#

20K_6

Quanta Computer Inc.

B2A

PROJECT : BL6
Size

Document Number

Date:

Saturday, April 10, 2010

51/F_4 PCH_JTAG_TCK

Rev
A1A

PCH 1/5 (SATA,HDA,LPC)

2

Sheet

7
8

of

45

IBEX PEAK-M (GND)

U24I

IBEX PEAK-M (PCI-E,SMBUS,CLK)

3G

{24}
{24}
{24}
{24}

PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3

TP63
TP61
TP55
TP59

BG30
BJ30
BF29
BH29

PERN1
PERP1
PETN1
PETP1

TP19
TP16
TP14
TP11

AW 30
BA30
BC30
BD30

PERN2
PERP2
PETN2
PETP2

AU30
AT30
AU32
AV32

PERN3
PERP3
PETN3
PETP3

PCIE_RXN3
PCIE_RXP3
*3G@0.1U/10V_4X PCIE_TXN3_C
*3G@0.1U/10V_4X PCIE_TXP3_C

C364
C365

B2A
{24}
{24}
WLAN{24}
{24}

PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5

C343
C342

{28}
{28}

PCIE_RXN6
PCIE_RXP6
PCIE_TXN6
PCIE_TXP6

C379
C378

LAN{28}
{28}

0.1U/10V_4X
0.1U/10V_4X

0.1U/10V_4X
0.1U/10V_4X

PCIE_RXN6
BA34
PCIE_RXP6
AW 34
PCIE_TXN6_C BC34
PCIE_TXP6_C BD34

T13

CL_CLK1

CL_DATA1

T11

CL_DATA1

CL_RST1#

T9

CL_RST#1

PERN6
PERP6
PETN6
PETP6

Controller
Link

PCI-E*

(+3V_S5)PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P

PCIECLKRQ0# / GPIO73 (+3V_S5)

CLKOUT_PCIE1N
CLKOUT_PCIE1P

PCIE_CLK_REQ1#

U4

PCIE_CLK_REQ2#

N4
AH42
AH41

PCIE_CLK_REQ3#

A8
AM51
AM53

{24} CLK_PCIE_3G#
{24} CLK_PCIE_3G
PCIE_CLK_REQ4#

M9

WLAN

PCIE_CLK_RQ5#

{24} PCIE_CLK_RQ5#

TP70
TP71
PCIE_CLK_REQB#

H6
AK53
AK51
P13

2ND_MBDATA {30}

Q15
2N7002_200MA
+3V_S5

CL_CLK1 {24}

2ND_MBCLK {30}

Q13
2N7002_200MA

CL_DATA1 {24}
CL_RST#1 {24}

PCIECLKRQ1# / GPIO18

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

PCIE_CLK_REQ1#
PCIE_CLK_REQ2#

CLK_PCIE_VGA# {15}
CLK_PCIE_VGA {15}
CLK_PCIE_3GPLLN {3}
CLK_PCIE_3GPLLP {3}

R588
R600

10K_4
10K_4
C

(+3V)

(+3V)

CLKOUT_PCIE3N
CLKOUT_PCIE3P
PCIECLKRQ3# / GPIO25 (+3V_S5)
CLKOUT_PCIE4N
CLKOUT_PCIE4P

(+3V_S5)

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

{3}
{3}

CLKIN_BCLK_N
CLKIN_BCLK_P

AP3
AP1

CLK_BUF_BCLKN {2}
CLK_BUF_BCLKP {2}

CLKIN_DOT_96N
CLKIN_DOT_96P

F18
E18

CLK_BUF_DREFCLKN
CLK_BUF_DREFCLKP

AH13
AH12

CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP

REFCLK14IN

P41

CLK_PCH_14M {2}

CLKIN_PCILOOPBACK

J42

SMBALERT#
SCLK
SDATA
SMBL0ALERT#
SMB_CLK_ME0
SMB_DATA_ME0
SML1ALERT#
MBCLK2
MBDATA2

{2}
{2}

R650
R311
R654
R300
R631
R623
R310
R299
R313

10K_4
2.2K_4
2.2K_4
10K_4
2.2K_4
2.2K_4
10K_4
2.2K_4
2.2K_4

{2}
{2}
+3V_S5

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

PCIECLKRQ4# / GPIO26 (+3V_S5)

PCIECLKRQ5# / GPIO44

CLK_DREFSSCLKN
CLK_DREFSSCLKP

CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP

XTAL25_IN
XTAL25_OUT

CLKOUT_PCIE5N
CLKOUT_PCIE5P

AT1
AT3
AW 24
BA24

CLKIN_DMI_N
CLKIN_DMI_P

CLKOUT_PCIE2N
CLKOUT_PCIE2P
PCIECLKRQ2# / GPIO20

H1 PEG_CLKREQ#
AD43
AD45
AN4
AN2

+3V_S5

XCLK_RCOMP
AJ50
AJ52

{24} CLK_PCIE_MINI#
{24} CLK_PCIE_MINI

{2,24,28,33}
{2,24,28,33}

+3V

P9
AM43
AM45

AM47
AM48

SCLK
SDATA

PEG

PCIE_CLK_REQ0#
TP21
TP27

TP74
TP87

MBDATA2

MBCLK2

PERN8
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P

{28} CLK_PCIE_LAN#
{28} CLK_PCIE_LAN

{24} PCIE_CLK_REQ4#

CL_CLK1

BG34
BJ34
BG36
BJ36
AK48
AK47

TP28
TP20

{28} PCIE_CLK_REQ3#

B9
H14
C8
J14
C6
G8
M14
E10
G12

(+3V_S5)

PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5

SMBALERT# / GPIO11
SMBCLK
SMBDATA
(+3V_S5) SML0ALERT# / GPIO60
SML0CLK
SML0DATA
(+3V_S5) SML1ALERT# / GPIO74
SML1CLK / GPIO58
(+3V_S5)
(+3V_S5) SML1DATA / GPIO75

SMBALERT#
SCLK
SDATA
SMBL0ALERT#
SMB_CLK_ME0
SMB_DATA_ME0
SML1ALERT#
MBCLK2
MBDATA2

PERN7
PERP7
PETN7
PETP7

B2A

3G

PCIE_RXN5
BF33
PCIE_RXP5
BH33
PCIE_TXN5_C BG32
PCIE_TXP5_C BJ32

SMBus

AT34
AU34
AU36
AV36

PCIE7/PCIE8 HM55 not support

LAN

BA32
BB32
BD32
BE32

C3A
Ibex-M
2 OF 10

+3V_S5

U24B

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W 52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

(+3V) CLKOUTFLEX0 / GPIO64

(+3V) CLKOUTFLEX1 / GPIO65
(+3V) CLKOUTFLEX2 / GPIO66
(+3V) CLKOUTFLEX3 / GPIO67

Clock Flex

CLK_PCI_FB

CLK_PCI_FB

{2}
{2}

B2A

{9}

AH51 XTAL25_IN
AH53 XTAL25_OUT
AF38 XCLK_RCOMP
T45
P43
T42
N50

CLK_FLEX0
CLK_FLEX1
CLK_FLEX2
CLK_FLEX3

R226
R235
T34
T33
R257

90.9/F_4 +1.05V
10K_4
22_4

PCIE_CLK_REQ0#

R309

10K_4

PCIE_CLK_REQ3#

R653

*10K_4

PCIE_CLK_REQ4#
PCIE_CLK_REQB#
PCIE_CLK_RQ5#

R276
R301
R619

10K_4
10K_4
10K_4

PEG_CLKREQ#

R615

IV@10K_4

PEG_CLKREQ#

R610

EV@10K_4

+3V
48M_CARD {29}

48M_Card Reserve for

cardreader 48MHZ

Placement close

PEG_B_CLKRQ# / GPIO56(+3V_S5)
R560

EV@0_4

C749

IV@27P/50V_4N

IbexPeak-M_Rev1_0
XTAL25_IN

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

Y4
R552
IV@1M/F_4

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

From CLK BUFFER

AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42

XTAL25_OUT

IV@25MHZ_30
C747

IV@27P/50V_4N

B2A

IbexPeak-M_Rev1_0

Quanta Computer Inc.

PROJECT : BL6
Size

Document Number

Rev
A1A

PCH 2/5 (PCIE, SMBUS, CK)

Date:
5

Sheet

Saturday, April 10, 2010

1

of

45

IBEX PEAK-M (DMI,FDI,GPIO)

U24C

IBEX PEAK-M (PCI,USB,NVRAM)

A

U24E

{10}
{10}

GNT0#
GNT1#

{10}

GNT3#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

G38
H51
B37
A44

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ0#
REQ1#
REQ2#
REQ3#

F51
A46
B45
M53

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

F48
K45
F36
H53

GNT0#
GNT1# / GPIO51 (+3V)
GNT2# / GPIO53 (+3V)
GNT3# / GPIO55 (+3V)

PIRQE#
PIRQF#
PIRQG#
PIRQH#

+3V

R652

B41
K53
A36
A48

8.2K_4
PCI_SERR#
PCI_PERR#
PCI_IRDY#

K6
E44
E50

PCI_PLOCK#

D49

PLOCK#

TP41

M7
PLT_RST-R#

R261
22_4 PCLK_DEBUG_R
TP76
TP39
CLK_PCI_FB R263
22_4
R259
22_4

{8} CLK_PCI_FB
{30}
PCLK_591

D5
N52
P53
P46
P51
P48

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

NV_ALE
NV_CLE

BD3
AY6

NV_RCOMP

AU2

NV_RB#

AV7

NV_W R#0_RE#
NV_W R#1_RE#

AY8
AY5

NV_W E#_CK0
NV_W E#_CK1

NV_ALE

NV_RCOMP R520

BD24
BG22
BA20
BG20

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

{3}
{3}
{3}
{3}

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

BE22
BF21
BD20
BE18

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

{3}
{3}
{3}
{3}

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

BD22
BH21
BC20
BD18

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

BH25
BF25

DMI_ZCOMP
DMI_IRCOMP

T6
M6
B17
K5

SYS_RESET#
SYS_PW ROK
PW ROK
MEPW ROK

+1.05V

R483

49.9/F_4 DMI_COMP

+3V

R432

1K_4

{3,33} SYS_RESET#
NV_ALE

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

SYS_PWROK
{10}

R273
R262
R270

C3A
{3} PM_DRAM_PWRGD
{30}
RSMRST#

*32.4/F_4

*SHORT_4
*SHORT_4
*SHORT_4

DNBSWON#
PM_RI#
PCIE_WAKE#

{24,28} PCIE_WAKE#
{3}
PM_SYNC

AV11
BF5

FDI

{3}
{3}
{3}
{3}
{3}
{3}
{3}
{3}

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

BB18
BF17
BC16
BG16
AW 16
BD14
BB14
BD12

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

{3}
{3}
{3}
{3}
{3}
{3}
{3}
{3}

FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

BJ14
BF13
BH13
BJ12
BG14

FDI_INT {3}
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

System Power Management

RSV_ICH_LAN_RST# A10
D9
RSMRST#
C16

{30,33} DNBSWON#

DMI

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

LAN_RST#
DRAMPW ROK
RSMRST#

P5

PW RBTN#

F14
J12
BJ10

RI#
W AKE#
PMSYNCH

SLP_S3#
SLP_S4#

P12
H7

SLP_M#
TP23

K8
N2

SLP_M#

(+3V_S5) SUS_PW R_DN_ACK / GPIO30

ACPRESENT / GPIO31
(+3V_S5)
(+3V) CLKRUN# / GPIO32
(+3V_S5) SUS_STAT# / GPIO61
SUSCLK / GPIO62
(+3V_S5)
(+3V_S5)
SLP_S5# / GPIO63
(+3V_S5) BATLOW # / GPIO72

M1
P7
Y1
P8
F3
E4
A6

SUS_PWR_ACK_R
AC_PRESENT
CLKRUN#
RSV_SUS_SATA#
SUSCLK_R
SLP_S5#
PM_BATLOW#

SLP_LAN# / GPIO29

F6

(+3V_S5)

SUSB#
SUSC#

{3}
{3}
{3}
{3}

{30}
{30}

TP50
TP73

CLKRUN# {30}
TP42
TP75
TP46

IbexPeak-M_Rev1_0

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

H18
J18
A18
C18
N20
P20
J20
L20
F20 USBP4-_R R293
G20 USBP4+_R R294
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

USBRBIAS#

B25 USB_BIAS R641

(+5V)
(+5V)
(+5V)

(+5V)
(+5V)
(+5V)
(+5V)

USB

SERR#
PERR#
IRDY#
PAR
DEVSEL#
FRAME#

D41
C48

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

PCIRST#

PCI_DEVSEL#
PCI_FRAME#

PCI_STOP#
PCI_TRDY#

{24} PCLK_DEBUG

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

A42
H44
F46
C46

TP43

AV9
BG8

PCI

J50
G42
H47
G34

TP44

NV_DQS0
NV_DQS1

NVRAM

{3}
{3}
{3}
{3}

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

STOP#
TRDY#

USBRBIAS

D25

(+3V_S5)OC0# / GPIO59
(+3V_S5)OC1# / GPIO40
(+3V_S5)OC2# / GPIO41
(+3V_S5)OC3# / GPIO42
(+3V_S5)OC4# / GPIO43
(+3V_S5) OC5# / GPIO9
(+3V_S5)OC6# / GPIO10
(+3V_S5)

N16
J16
F16
L16
E14
G16
F12
T15

PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

OC7# / GPIO14

USBP0USBP0+

TP78
TP79

*0_4
*0_4
TP36
TP49
TP80
TP77

{23}
{23}

USBP2{31}
USBP2+
{31}
USBP3{29}
USBP3+
{29}
USBP4USBP4+
USBP5{24}
USBP5+
{24}


+3V_S5



{24}
Z
{24}
^/D
t>E

+3V_S5

U28
*TC7SH08FU(F)
PLT_RST-R#

USB6/SUB7 HM55 not support

2
4

TP47
TP37
TP40
TP35

{31}
{31}
{31}
{31}
{24}
{24}

h^
h^
'

USBP13USBP13+

{25}
{25}

^d

R624

PLTRST#

{3,24,28,29,30}

RSMRST#
RSV_ICH_LAN_RST#

R303
R635

10K_4
10K_4
10K_4
10K_4
10K_4
*10K_4

R629

10K_4
10K_4
C

R630
*100K_4

100K_4

C3A

0_4
SUSCLK_R

R705

*SHORT_4

E3A
C3A
R625

22.6/F_4

SUSCLK

{30}

+3V_S5
0_4

VGA_PLTRST# {15}

C799

0.1U/10V_4X

+3V_S5

USB OC table
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USBOC#8_9
USB_OC5#
USBOC#13
SCI#

R307
R628
R312
R265
R266
R264

C807
*0.1U/10V_4X

1
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+

PM_RI#
PM_BATLOW#
PCIE_WAKE#
SUS_PWR_ACK_R
AC_PRESENT
DNBSWON#

C473
*10P/50V_4C

AY9
BD1
AP15
BD8

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

{30} SUS_PWR_ACK

{3,39} DELAY_VR_PWRGOOD

SUS_PWR_ACK_R

Q14
2N7002_200MA

USBOC#8_9 {30,31}
USBOC#13 {25,30}
SCI#
{30}

R115

SYS_PWROK

{3,30} MPWROK

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

R267
*22_4

Ibex-M
5 OF 10

BC24
BJ22
AW 20
BJ20

CLK_PCI_FB

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

&
D/

H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36

Ibex-M
3 OF 10

{3}
{3}
{3}
{3}

R656

U30
TC7SH08FU(F)

100K_4

R633
10K_4

*0_4

IbexPeak-M_Rev1_0
D

+3V

+3V

+3V_S5

RP18
PCI_IRDY#
PCI_STOP#
PCI_PIRQA#
PCI_PIRQC#

5
4
3
2
1

+3V

RP17

6
7
8
9
10

PCI_PIRQD#
PCI_SERR#
REQ1#
PCI_FRAME#

REQ3#
PCI_DEVSEL#
PCI_TRDY#
PIRQH#

+3V

8.2KX8

5
4
3
2
1

6
7
8
9
10

PCI_PLOCK#
PCI_PERR#
REQ0#
PCI_PIRQB#
+3V

REQ2#
PIRQE#
PIRQF#
CLKRUN#
PIRQG#

R287
R286
R620
R569
R285

RP8

8.2K_4
8.2K_4
8.2K_4
8.2K_4
8.2K_4

USBOC#8_9
USB_OC5#
USBOC#13
SCI#

8.2KX8

5
4
3
2
1

6
7
8
9
10

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#

Quanta Computer Inc.

PROJECT : BL6

+3V_S5
Size

8.2KX8

Document Number

Rev
A1A

PCH 3/5 (PCI,ONFI,USB,DMI)

Date:
1

Saturday, April 10, 2010

7

Sheet

9
8

of

45

U24F

C3A

Y3

BOARD_ID6

C38

GPIO6

D37

BOARD_ID4

J32

GPIO8

F10

{25} ESATA_DN#

{3,30} TEMP_ALERT#

CLKOUT_PCIE7N
CLKOUT_PCIE7P

AF48
AF47

(+3V)

TACH3 / GPIO7

(+3V)

GPIO
MISC

GPIO8(+3V_S5)

T7

GPIO16

AA2

SATA4GP / GPIO16 (+3V)

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

GPIO17

F38

TACH0 / GPIO17(+3V)

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

GPIO22

Y7

GPIO27

AB12

GPIO28

V13
AB7

GPIO37

AB13

GPIO39

P3
F1

BOARD_ID5

AB6

TEMP_ALERT#

AA4

H10
H3
F8
M11
V6
V3

A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1

AB16
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28

(+3V)

TACH2 / GPIO6

GPIO15

GPIO24
GPIO45
GPIO57
BOARD_ID2
BOARD_ID3
BOARD_ID7

AH45
AH46

K9

GPIO46

{3} DDR3_DRAMRST#_PCH

TACH1 / GPIO1

CLKOUT_PCIE6N
CLKOUT_PCIE6P

GPIO12

ESATA_DN#

3&+6WUDS3LQ&RQILJXUDWLRQ7DEOH

U24H

Ibex-M
6 OF 10

BMBUSY# / GPIO0 (+3V)

LAN_PHY_PWR_CTRL / GPIO12

A20GATE

(+3V_S5)

GATEA20

U2

GATEA20 {30}

GPIO15 (+3V_S5)

SCLOCK / GPIO22(+3V)

PECI

GPIO27 (+3V_S5)

RCIN#

CPU

GPIO28 (+3V_S5)

PROCPWRGD

SATA2GP / GPIO36

(+3V)

THRMTRIP#

SATA3GP / GPIO37

(+3V)

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24

SDATAOUT0 / GPIO39

(+3V)

PCIECLKRQ7# / GPIO46 (+3V_S5)

SDATAOUT1 / GPIO48

(+3V)

SATA5GP / GPIO49

(+3V)

RSVD

GPIO24
(+3V_S5)
PCIECLKRQ6# / GPIO45 (+3V_S5)
GPIO57
(+3V_S5)
STP_PCI# / GPIO34
(+3V)
SATACLKREQ# / GPIO35(+3V)
SLOAD / GPIO38
(+3V)

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15

VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

NCTF

AM3

CLK_CPU_BCLKN

{3}

AM1

CLK_CPU_BCLKP

{3}

BG10

PCH_PECI_R

H_PECI {3}

RCIN#

T1

RCIN#

BE10

{30}

H_PWRGOOD

BD10 PCH_THRMTRIP#_R
BA22
AW22
BB22
AY45
AY46
AV43
AV45
AF13
M18
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6
C10

R180

56.2/F_4

R181

56.2/F_4

{3,33}

PM_THRMTRIP# {3}
+VTT

TP38

BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53

IbexPeak-M_Rev1_0

+3V_S5

VSS[0]
VSS[80]
VSS[1]
VSS[81]
VSS[2]
VSS[82]
VSS[3]
VSS[83]
VSS[4]
VSS[84]
VSS[5]
VSS[85]
VSS[6]
VSS[86]
VSS[7]
VSS[87]
VSS[8]
VSS[88]
VSS[9]
VSS[89]
VSS[10]
VSS[90]
VSS[11]
VSS[91]
VSS[12]
VSS[92]
VSS[13]
VSS[93]
VSS[14]
VSS[94]
VSS[15]
VSS[95]
VSS[16]
VSS[96]
VSS[17]
VSS[97]
VSS[18]
VSS[98]
VSS[19]
VSS[99]
VSS[20]
VSS[100]
VSS[21]
VSS[101]
VSS[22]
VSS[102]
VSS[23]
VSS[103]
VSS[24]
VSS[104]
VSS[25]
VSS[105]
VSS[26]
VSS[106]
VSS[27]
VSS[107]
VSS[28]
VSS[108]
VSS[29]
VSS[109]
VSS[30]
VSS[110]
VSS[31]
VSS[111]
VSS[32]
VSS[112]
VSS[33]
VSS[113]
VSS[34]
VSS[114]
VSS[35]
VSS[115]
VSS[36]
VSS[116]
VSS[37]
VSS[117]
VSS[38]
VSS[118]
VSS[39]
VSS[119]
VSS[40]
VSS[120]
VSS[41]
VSS[121]
VSS[42]
VSS[122]
VSS[43]
VSS[123]
VSS[44]
VSS[124]
VSS[45]
VSS[125]
VSS[46]
VSS[126]
VSS[47]
VSS[127]
VSS[48]
VSS[128]
VSS[49]
VSS[129]
VSS[50]
VSS[130]
VSS[51]
VSS[131]
VSS[52]
VSS[132]
VSS[53]
VSS[133]
VSS[54]
VSS[134]
VSS[55]
VSS[135]
VSS[56]
VSS[136]
VSS[57]
VSS[137]
VSS[58]
VSS[138]
VSS[59]
VSS[139]
VSS[60]
VSS[140]
VSS[61]
VSS[141]
VSS[62]
VSS[142]
VSS[63]
VSS[143]
VSS[64]
VSS[144]
VSS[65]
VSS[145]
VSS[66]
VSS[146]
VSS[67]
VSS[147]
VSS[68]
VSS[148]
VSS[69]
VSS[149]
VSS[70]
VSS[150]
VSS[71]
VSS[151]
VSS[72]
VSS[152]
VSS[73]
VSS[153]
VSS[74]
VSS[154]
VSS[75]
VSS[155]
VSS[76]
VSS[156]
VSS[77]
VSS[157]
VSS[78]
VSS[158]
VSS[79]
IbexPeak-M_Rev1_0

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

SPKR

GNT3#/
GPIO55

{9}

RCIN#

R590

10K_4

GPIO12

R278

10K_4

GATEA20

R589

10K_4

GPIO27

R222

*10K_4

ESATA_DN#

R238

10K_4

GPIO28

R245

10K_4

GPIO6

R296

10K_4

GPIO37

R244

10K_4

GPIO46

R618

10K_4

GPIO16

R568

10K_4

GPIO39

R591

10K_4

GPIO24

R284

*10K_4

GPIO17

R279

10K_4

TEMP_ALERT#

R567

10K_4

GPIO45

R616

*10K_4

GPIO22

R258

10K_4

HDA_DOCK_EN
#/GPIO33

%RDUG,'

,'
H
L

,'

,'

,'

Flash Descriptor
Security Override

{9}
{9}

,'

R290
10K_4
BOARD_ID6

H
L

W/O 3G
W/ 3G
15"
14"

R231

R280
10K_4

R272
R621

GNT#1

{7}

LPC

PCI

Reserved (NAND)

SPI

R504

SPI_SI_R

TPM Functionality
Disable

*1K_4

+3V

*10K_4

+1.8V

1 = Enabled
0 = Disable

NV_ALE
{9}

R496

NV_ALE

IntelR Anti-Theft Technology

HDD Data Protection
(Intel AT-d) Enable

GPIO8

1 = Enabled
0 = Disabled (Default)

GPIO8

R298

10K_4

+3V_S5
C

This signal has a weak internal pull up.

NOTE: This signal should not be pulled low

Reserved

+3V

+3V

GPIO15

R248

1K_4

+3V_S5

0 = Intel ME Crypto Transport Layer Security (TLS) cipher

suite with no confidentiality
1 = Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality

R232

*10K_4

0 = Disables the VccVRM. Need to use

on-board filter circuits for analog rails.
1 = Enables the internal VccVRM to have a clean supply for analog rails.
No need to use on-board filter circuit.
This signal has a weak internal pull-up.

+3V

BT_Detect#

BOARD_ID5

{31}

HM@10K_4
BOARD_ID4

CPUSB#

{24}

BOARD_ID3

R247

*10K_4

HM@10K_4

R274
MDC@10K_4
BOARD_ID2

R570

R586

IV@10K_4

2C@10K_4

BOARD_ID1

+RTC_CELL

BOARD_ID7

R277

R571

R728

MDC@10K_4

EV@10K_4

*4C@10K_4

R644

330K_6 PCH_INVRMEN

PCH_INVRMEN

{7}

INTVRMEN - Integrated SUS 1.1V VRM Enable

High - Enable Internal VRs

Quanta Computer Inc.

PROJECT : BL6

H
L
1

Boot BIOS Location

H
L

2 Core
4 Core

*1K_4
*1K_4

GPIO27

R240

R239

H
L

W/O BT
W/ BT

GNT0#
GNT1#

GPIO27

+3V

10K_4

H
L

W/ HDMI
W/O HDMI

GNT0#
GNT1#

B2A
H
L

W/ MDC
W/O MDC

+3V

*SHORT PAD
1

SPI_MOSI

Reserved

+3V

JP1
2

0 = Flash Descriptor Security will be overridden

1 = Security measure defined in the Flash Descriptor will be enabled.

PCI_GNT0#

,'
+3V

E3A
1K_4

Boot BIOS Strap

On-Die PLL Voltage

Regulator

,'

*10K_4

R282

{7,30} PCH_GPIO33

BOARD ID SETTING
UMA SKU
VGA SKU

+3V

0 = Top Block Swap Mode

1 = Default Mode (Internal pull-up)

GPIO15

10K_4

R622

GNT3#

Top-Block
Swap Override

GNT0#,
GNT1#

*1K_4

0 = Default Mode (Internal weak Pull-down)

1 = No Reboot Mode with TCO Disabled

Reboot option at power-up

+3V
R297

R592

{7,27} PCBEEP

+3V

GPIO57

C3A

IBEX PEAK-M (GND)

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

BOARD_ID1

Size

Document Number

Date:

Saturday, April 10, 2010

Rev
A1A

PCH 4/5 (GPIO & Strap)

3

Sheet

10
8

of

45