MSP430x1xx

MSP430x1xxFamily

12

MSP430x1xx.
: . . .:
. , 2004. 368 .
ISBN 5-98730-001-0
Users Guide
MSP430x1xx Family (slau049d) Texas
Instruments 2004 .
Errata MSP430x1xx Family Users Guide
(slaz007) ( 2004), , .
MSP430x1xx
c -,

MSP430 .

ISBN 5-98730-001-0

9 785897 300013

ISBN 5-98730-001-0

, 2004

MSP430x1xxFamily

MSP430x1xxFamily
......................................................................................................................................9
..........................................................................................................................................12
...........................................................................................................................12
.........................................................................................................12
FCC ..........................................................................................................................12
.......................................................................................................................12

.........................................................................................................................................13
.....................................................................14

I. ..........................................................................................................................16
1.1. ..................................................................................................................................16
1.2. .....................................................................................................17
1.3. ..................................................................................................................18
1.4. ...............................................................................................................18
1.4.1. Flash- ....................................................................................................19
1.4.2. ....................................................................................................................................19
1.4.3. ...................................................................................................19
1.4.4. (SFRs) ..................................................................19
1.4.5. ........................................................................................................20

II. , ....................................................22
2.1. ...........................................................................................22
2.1.1. (POR) ............................................................................23
2.1.2. (BOR)....................................................23
2.1.3. .........................................24
2.2. ..................................................................................................................................25
2.2.1. ..........................................................................................26
2.2.2. ..............................................................................................28
2.2.3. ....................................................................................................29
2.2.4. .......................................................................................................31
2.3. ...........................................................................................................................32
2.3.1. .....................................34
2.4. ..........................................35
2.5. ...................................................................................36

III. 16- RISC CPU ................................................................................................38

3.1. ............................................................................................................................38
3.2. ...............................................................................................................................38
3.2.1. (PC).............................................................................................38
3.2.2. (SP) ........................................................................................................40
3.2.3. (SR) ........................................................................................................41
3.2.4. CG1 CG2 .....................................................................43
3.2.5. R4-R15 ............................................................................44
3.3. ......................................................................................................................44
3.3.1. .........................................................................................................45
3.3.2. ............................................................................................................46
3.3.3. .........................................................................................................47
3.3.4. .........................................................................................................48
3.3.5. .....................................................................................49
3.3.6. ...........................................................................50
3.3.7. ..................................................................................................................51

MSP430x1xxFamily

3.4. ...............................................................................................................................52
3.4.1. ( I)..................................................................53
3.4.2. ( II) .....................................................................54
3.4.3. ...........................................................................................................54
3.4.4. ................................................................................91
3.4.5. ................................................................................................93

IV. ..................................................................................98
4.1. ................................................................................98
4.2. ..............................................................99
4.2.1.
..............................................................................................100
4.2.2. LFXT1 ..........................................................................................................100
4.2.3. XT2..............................................................................................................101
4.2.4. (DCO) ............................................................101
4.2.5. DCO ...............................................................................................................104
4.2.6. ...............................................105
4.3. .............................................................................108

V. - ..........................................................................................112
5.1. - ..........................................................................................................112
5.2. - .......................................................................................................113
5.3. - ...........................................................................................113
5.3.1. -...............................................................................114
5.3.2. - ................................................................................................115
5.3.3. -..................................................................................................119
5.3.4. - .............................................125
5.3.5. ............................................................................126
5.3.6. - ......................................126
5.3.7. - .....................................................................127
5.3.8. - ........................................................127
5.4. - ............................................................................................................128

VI. ..............................................................................134
6.1. SVS ..........................................................................................................................134
6.2. SVS ............................................................................................................134
6.2.1. SVS ................................................................................................134
6.2.2. SVS .........................................................................134
6.2.3. VLDx ..................................................................................................136
6.2.4. SVS ..................................................................................................136
6.3. SVS .............................................................................................................................137

VII. ..........................................................................................140
7.1. .......................................................................................140
7.2. ........................................................................141
7.2.1. .........................................................................................................141
7.2.2. ......................................................................................................141
7.2.3. .........................................................................143
7.2.4. RESLO.........................................................................................143
7.2.5. .........................................................................................144
7.3. .........................................................................................144

VIII. DMA .......................................................................................................146

8.1. DMA.....................................................................................................146

MSP430x1xxFamily
8.2. DMA ...........................................................................................................146
8.2.1. DMA ...............................................................................................146
8.2.2. DMA .................................................................................................149
8.2.3 DMA- ...................................................................................154
8.2.4. DMA- ...............................................................................................157
8.2.5. DMA .............................................................................................157
8.2.6. DMA- ............................................................................157
8.2.7. DMA ...................................................158
8.2.8. DMA.....................................................................................158
8.2.9. I2C DMA .......................................................159
8.2.10. 12 DMA ...........................................................159
8.2.11. 12 DMA ...........................................................159
8.3. DMA ............................................................................................................................160

IX. /.........................................................................................166
9.1. / .....................................................................................166
9.2. / .....................................................................166
9.2.1. PxIN......................................................................................................166
9.2.2. PxOUT ...............................................................................................167
9.2.3. PxDIR .......................................................................................167
9.2.4. PxSEL ................................................................................167
9.2.5. 1 2 ......................................................................................................168
9.2.6. ................................................169
9.3. / ......................................................................................169

X. .....................................................................................................172
10.1. ..............................................................................................172
10.2. ............................................................................172
10.2.1. ....................................................................................173
10.2.2. ......................................................................................................173
10.2.3. ..................................................................................174
10.2.4. ............................................................................174
10.2.5. ...............................................175
10.2.6. .......................................................................175
10.3. .............................................................................................176

XI. ......................................................................................................................180
11.1. ................................................................................................................180
11.2. ................................................................................................180
11.2.1. 16- - ...................................................................................180
11.2.2. ............................................................................................................182
11.2.3. ...................................................................................182
11.2.4. / ............................................................................................187
11.2.5. ............................................................................................................189
11.2.6. ................................................................................................192
11.3. .................................................................................................................194

XII. .....................................................................................................................200
12.1. ................................................................................................................200
12.1.1. ............................................................................200
12.2. .....................................................................................................................201
12.2.1. 16- ..................................................................................202
12.2.2. ...............................................................................................................202

MSP430x1xxFamily

12.2.3. ...................................................................................203
12.2.4. / ............................................................................................207
12.2.5. ............................................................................................................210
12.2.6. ................................................................................................213
12.3. .................................................................................................................216

XIII. USART, UART...................................................222

13.1. USART: UART ............................................................................................222
13.2. USART: UART ...................................................................................................222
13.2.1. USART ..................................................................................222
13.2.2. ..........................................................................................................224
13.2.3. .............................................................224
13.2.4. USART ........................................................................................228
13.2.5. USART .....................................................................................229
13.2.6. UART ........................................................................230
13.2.7. USART......................................................................................................236
13.3. USART: USART.............................................................................................240

XIV. USART, SPI ......................................................250

14.1. USART: SPI ................................................................................................250
14.2. USART: SPI..................................................................................250
14.2.1. USART ..................................................................................252
14.2.2. ..........................................................................................................252
14.2.3. ..........................................................................................................253
14.2.4. SPI..............................................................................................................254
14.2.5. .......................................................255
14.2.6. SPI............................................................................................................257
14.3. USART: SPI...................................................................................................258

XV. USART, I2C ........................................................268

15.1. I2C .............................................................................................................268
15.2. I2C ...............................................................................................268
15.2.1. I2C..........................................................................................270
15.5.2. I2C ....................................................................................271
15.2.3. I2C ................................................................................................272
15.2.4. I2C ........................................................................................273
15.2.5. I2CDR I2C ..............................................................................280
15.2.6. I2C .................................................281
15.2.7. I2C ............282
15.2.8. I2C.............................................................................................................283
15.3. I2C ................................................................................................................285

XVI. ............................................................................................................296
16.1. ........................................................................................................296
16.2. ........................................................................................297
16.2.1. ...................................................................................................................297
16.2.2. ........................................................................297
16.2.3. ........................................................................................................298
16.2.4. ................................................................................298
16.2.5. , CAPD ......................................................299
16.2.6. ........................................................................................299
16.2.7. ...........300
16.3. .........................................................................................................302

MSP430x1xxFamily
XVII. 12 .......................................................................................................................306
17.1. 12 ....................................................................................................................306
17.2. 12......................................................................................................307
17.2.1. 12- ..............................................................................................307
17.2.2. 12 ..................................................................................308
17.2.3. ................................................................................309
17.2.4. .............................................................310
17.2.5. ..............................................................................................312
17.2.7. ...................................318
17.2.8. 12 ................................................318
17.2.9. 12 ......................................................................................................319
17.3. 12 .......................................................................................................................323

XVIII. 10 ......................................................................................................................332
18.1. 10 ....................................................................................................................332
18.2. 10......................................................................................................333
18.2.1. 10- ..............................................................................................333
18.2.2. 10 ..................................................................................334
18.2.3. ................................................................................335
18.2.4. .................................................................336
18.2.5. ............................................................................................338
18.2.6. 10 ........................................................................343
18.2.7. ...................................348
18.2.8. ....................................................349
18.2.9. 10 ......................................................................................................350
18.3. 10 .......................................................................................................................350

XIX. 12 ........................................................................................................................358
19.1. 12 ....................................................................................................................358
19.2. 12......................................................................................................358
19.2.1. 12 ..................................................................................................................359
19.2.2. 12...........................................................................................360
19.2.3. 12 .............................................................361
19.2.4. DAC12_xDAT......................................................................................361
19.2.5. 12...............................................362
19.2.6. 12 .................................................................363
19.2.7. 12 .....................................................................................................364
19.3. 12 .......................................................................................................................365

1930 .,
Texas Instruments
Incorporated

.
1954
Texas Instruments
, 1958
, 1971 .
,
.
Texas Instruments


.
20 21
, Texas Instruments ,
.
Texas Instruments

, ,
. ,
Texas Instruments
1 . .
2002 ., 1,75 . . 2003,

2004 . 2,1 . .
.
36 000
, .
Texas
Instruments 1982

. ,
,
,
-,
,


Texas Instruments. 40% Texas Instruments.
60%

Analog Devices, Agere

9

MSP430x1xxFamily

Systems, Freescale Semiconductors,

STMicroelectronics .
1999 Texas
Instruments -RISC 16-, /

MSP430.

.
, MSP430
.
, MSP430 /, ,
.

, -

10

MSP430
.
, ,
Texas Instruments,
.
, MSP430.
(Application Reports),
,

MSP430x4xx.

:
E-mail: TI@compel.ru
-
Texas Instruments
.

MSP430x1xxFamily

MSP430x1xxFamily

MSP430x1xx. .
, . ,

, .
,
.
.

http://www.ti.com/msp430.

FCC
. ,
, , J 15 FCC,
. , -
, - .

12

MSP430x1xxFamily

ACLK

Auxiliary Clock ( )

ADC

Analog-to-Digital Converter (-
, )

BOR

Brown-Out Reset ( - , )

BSL

Bootstrap Loader ( www.ti.com/msp430

)

CPU

Central Processing Unit ( 16- RISC CPU

, )

DAC

Digital-to-Analog Converter (-
, )

DCO

Digitally Controlled Oscillator ( )

dst

Destination ()

16- RISC CPU

FLL

Frequency Locked Loop (

)

GIE

General Interrupt Enable (

)

INT (N/2)

Integer portion of N/2 ( N/2)

I/O

Input/Output ( / )

ISR

Interrupt Service Routine (

)

LSB

Least-Significant Bit ( )

LSD

Least-Significant Digit ( )

LPM

Low-Power Mode ( )

MAB

Memory Address Bus ( )

MCLK

Master Clock ( )

MDB

Memory Data Bus ( )

MSB

Most-Significant Bit ( )

MSD

Most-Significant Digit ( )

NMI

(Non)-Maskable Interrupt ( )

PC

Program Counter ( )

16- RISC CPU

13

MSP430x1xxFamily

POR

Power-On Reset ( )

PUC

Power-up clear ( )

RAM

Random Access Memory ( , )

SCG

System Clock Generator (

)

SFR

Special Function Register (

)

SMCLK

Sub-System Master Clock (

)

SP

Stack Pointer ( )

16- RISC CPU

SR

Status Register ( )

16- RISC CPU

src

Source ()

16- RISC CPU

TOS

Top-of-Stack ( )

16- RISC CPU

WDT

Watchdog Timer ( )

, :

rw

r0

r1

w0

w1

(w)

; 1 . 0

h0

h1

-0, -1

PUC

-(0), -(1) POR

14

MSP430x1xxFamily

I.

MSP430x1xxFamily

MSP430.

1.1.
MSP430 16- RISC CPU,
,
(MAB) (MDB). CPU , MSP430 .
MSP430 :
, :
0,1 ;
0,8 ;

250 ;
:
12- 10-
200 ksps;

VRef;
12- ;
,
;
() ;
16- RISC CPU,
:

;
;
;
27 , ;
;
16

I.

Flash- , .

1.2.
.
(ACLK) 32
. ACLK
. (DCO)
(MCLK)
. DCO 6 . MSP430
16-
RISC CPU :

;
.

. 1-1. MSP430

17

MSP430x1xxFamily

1.3.
JTAG .
:

;

. 1-2.

;
,
;
,
.

1.4.
MSP430 (SFR), 18

 I.

, Flash- , . 1.2.

. . .
64 , .
1.4.1. Flash-
Flash-
. Flash- 0FFFFh.
Flash- , . Flash-,
.
16 Flash-, Flash- (0FFFEh).
1.4.2.
0200h.
.
, .
1.4.3.
.
0100 01FFh 16- .
-.
, ,
0.
010h 0FFh 8-
. . -
. , , .
1.4.4. (SFRs)
SFRs. 16- . SFRs .

19

MSP430x1xxFamily

SFRs .
1.4.5.
.
, .1.3. .
.
. , xxx4h, xxx4h,
xxx5h.

. 1-3. , ,

20

MSP430x1xxFamily

II.

MSP430x1xxFamily

,
,
MSP430x1xx.

2.1.
, . 2.1
(POR)
V CC

BOR
0V
SVS_POR
RST/NMI

WDTNMI
WDTSSEL
WDTQn
WDTIFG

V CC

V CC

 #

POR

#
POR

0V

0V

EQU
KEYV
( Flash)

~ 50us

S
POR
R

POR

S
S
wd1

wd2

S
PUC
S

PUC

MCLK

BOR
# BOR
SVS

. 2-1. (POR) (PUC)

(PUC). ,
.
POR . :
;
RST/NMI, ;
PORON = 1.
PUC POR, POR
PUC. PUC:
POR;
(
);
22

 II.

;
Flash-.
2.1.1. (POR)
Vcc , POR
POR , Vcc
V(POR), . 2.2. Vcc
POR, POR t(POR_DELAY) MSP430.

. 2-2. POR

,
V(min), POR,
. Vcc V(min) ,
POR . .
2.1.2. (BOR)

(. ), POR. , , ,

23

MSP430x1xxFamily

Vcc.
, POR-,
. . 2.3.

. 2-3.

POR , Vcc
Vcc(start). , Vcc V(B_IT+)
t(BOR). t(BOR)
Vcc. VHys(B_IT-) , , V(B_IT-),
POR.
V(B_IT-) V(min) POR,
BOR , Vcc V(min).
.
2.1.3.
POR, MSP430 :
RST/NMI
/
/
,

24

 II.

(SR)

,
(0FFFEh). .

MSP430 . :
SP ( , )

,
- .

2.2.
. 2.4.
.
/NMIRS, .

. 2-4.

25

MSP430x1xxFamily

:
( )
(NMI)

2.2.1.
NMI (GIE), (ACCVIE, NMIIE, OFIE).
NMI, NMI- . ,
(0FFFCh).
NMI-,
. - NMI-
. 2.5.
NMI :
RST/NMI

-

Reset/NMI
RST/NMI
. WDTCTL. RST/NMI
, ,
.
.1, ,
(0FFFEh).
RST/NMI
, ,
WDTNMIES NMI-, NMIIE.
NMIIFG.
:
RST/NMI .0.
RST/NMI NMI-, , NMI-, RST/NMI
.0. PUC - , NMI-
, , PUC
RST/NMI .
26

II.

. 2-5. -

:
WDTNMIES.
NMI WDTNMIES, NMI- RST/NMI.

27

MSP430x1xxFamily

NMI- NMI, NMI .

Flash-
ACCVIFG ,
Flash-. NMI- Flash- ACCVIE. ACCVIFG
NMI- ,
Flash-.

,
.
OFIE NMI- . OFIFG NMI-
, NMI- .
PUC-,
LFXT1 HF LF.
PUC XT2.

NMI
NMI- . NMI-
NMIIE, OFIE ACCVIE.
NMI-
, . 2.6.
:
NMI- ACCVIE, NMIIE OFIE
NMI- ACCVIE, NMIIE OFIE
NMI-, , RETI.
NMI-,
.
2.2.2.
,
, .

28

II.

,
(GIE) (SR).
NMI
:
OFIE, NMIIE, ACCVIE

Flash

NMI

NMIIE, OFIE,
ACCVIE

RETI

NMI

1:
BIS #(NMIIE+OFIE+ACCVIE), &IE1
2:
BIS MASK, &IE1
;
;
;

. 2-6. NMI-

.
2.2.3.

GIE , .
(NMI)
.

29

MSP430x1xxFamily

6 ,
, . 2.7.
:
1) ;
2) PC,
, ;

. 2-7.

3) SR ;
4)
, ,
;
5) . .
6) SR , SCG0, .
;
7) .

:
RETI ( )
5 , , . 2.8.
30

II.

1) SR. GIE, CPUOFF .,

, .
2) PC
, .

. 2-8.

, GIE
.
, , , ,
.
2.2.4.
0FFFFh 0FFE0h, 2.1.
16- . .
2.1. ,

,
, , Flash-
NMI-,
,
Flash-

WDTIFG
KEYV

0FFFEh

15,

NMIIFG
OFIFG
ACCVIFG

0FFFCh

14

31

MSP430x1xxFamily

2.1 ()

WDTIFG

0FFFAh
0FFF8h
0FFF6h
0FFF4h
0FFF2h
0FFF0h
0FFEEh
0FFECh
0FFEAh
0FFE8h
0FFE6h
0FFE4h
0FFE2h
0FFE0h

13
12
11
10
9
8
7
6
5
4
3
2
1
0,

SFRs ,
. SFRs
.
. SFRs .

2.3.
MSP430 , . 2.10.
:



MSP430 . 2.9.
0-4 CPUOFF, OSCOFF, SCG0 SCG1 .
CPUOFF, OSCOFF, SCG0 SCG1
SR , , SR
.
32

II.

. 2-9. 13 14

. 2-10. MSP430

33

MSP430x1xxFamily

, SR . ,
SR .
.
,
. , ,
. .
/ . .
SCG1

SCG0 OSCOFF CPUOFF

LPM0

LPM1

LPM2

LPM3

LPM4

MCLK ; SMCLK ACLK

, MCLK DCO-. ;DC

, DCO MCLK SMCLK
; SMCLK ACLK
, MCLK, SMCLK DCO-.
;DC ; ACLK
, MCLK, SMCLK DCO-. ; DC ; ACLK

2.3.1.
MSP430
.
:
:
PC SR ;
CPUOFF, SCG1 OSCOFF ;
:
SR ,
;
SR, ,
,
RETI.
34

 II.
; LPM0
BIS #GIE+CPUOFF, SR
;...

,
; LPM0
;

;
; LPM0
BIC #CPUOFF, 0(SP)
; LPM0
RETI
RETI
; LPM3
BIS #GIE+CPUOFF+SCG1+SCG0, SR
; LPM3
;...
;
;
; LPM3
BIC #CPUOFF+SCG1+SCG0,0(SP)
; LPM3
RETI
RETI

DCO
,
. , DCO
. ,
DCO
, .
; LPM4 DCO
BIC #RSEL2+RSEL1+RSEL0,&BCSCTL1
;
RSEL
BIS #GIE+CPUOFF+OSCOFF+SCG1+SCG0,
SR
; LPM4
;...
;
;
;
BIC #CPUOFF+OSCOFF+SCG1+SCG0, 0(SR)
; LPM4
RETI
RETI

2.4.
, MSP430
LPM3.
2 . ACLK
32 , DCO (
), 6 .

35

MSP430x1xxFamily

, ;
;
,
. ;
;
, ;
.

2.5.
2.2.
2.2.

AVCC

DVCC

AVSS

DVSS

VREF+

VeREF+

DVSS

VREF-/VeREF-

DVSS

XIN

DVSS

XOUT

XT2IN

DVSS

XT2OUT

C Px.0 Px.7

RST/NMI

DVSS VCC

Test/VPP

DVSS

Test

DVSS

TDO
TDI
TMS
TCK

36

13, 14, 15 16x

13, 14, 15 16x
,
47 10
P11x

30K ( 11x1-)
11x1A, 11x2, 12x, 12x2 -

16- RISC CPU

MSP430x1xxFamily

III.

MSP430x1xxFamily

16- RISC CPU

MSP430, .

3.1.
,
, ,
, C.
.
:
RISC- 27 7 ;
,
;
, , ;
;
16- ,
;
16- , ;
16- ,
;
, ;
;
.
- . 3.1.

3.2.
16- . R0, R1, R2
R3 . R4 R15
.
3.2.1. (PC)
16- (PC/R0) , .
38

16- RISC CPU

III.

MAB

. 3-1. -

39

MSP430x1xxFamily

(, ), PC .
64
, PC . . 3.2 .

. 3-2.

PC
. :
MOV
MOV

#LABEL, PC
LABEL, PC

MOV

@R14, PC

; LABEL
; , LABEL
; R14

3.2.2. (SP)
(SP/R1)
. . , SP
. . 3.3 SP.
SP
.

. 3-3.
MOV
MOV

2(SP),R6
R7,0(SP)

PUSH

#0123h

POP

R8

; I2 R6
; (TOS) R7
; 0123h
(TOS)
;R8 = 0123h

SP PUSH
POP . 3.5.
40

16- RISC CPU

III.

. 3-4.

. 3-5. PUSH SP POP SP

POP SP. POP SP SP1
PUSH SP.
SP (SP2=SP1).

3.2.3. (SR)
(SR/R2), , .
. . 3.6 SR.

. 3-6.

41

MSP430x1xxFamily

3.1 .
3.1.

.
, .

ADD(.B),
ADDC(.B)

, :
+ =
+ =

SUB(.B),
SUBC(.B),
CMP(.B)

, :
=
=

SCG1

1.
, SMCLK .

SCG0

0.
, DCO , DCOCLK
MCLK SMCLK.

OSCOFF

.
, LFXT1, , ,
LFXT1CLK MCLK SMCLK.

CPUOFF

.
, .

42

GIE

.
, . ,
.

.
, , .
:
N 15
:
N 7

.
, 0
, 0.

.
,
, .

16- RISC CPU

III.

3.2.4. CG1 CG2

R2 R3 ,
16- . (As) -, 3.2.
3.2. CG1, CG2

As

R2

00

-----

R2

01

(0)

R2

10

00004h

+4,

R2

11

00008h

+8,

R3

00

00000h

0,

R3

01

00001h

+1

R3

10

00002h

+2,

R3

11

0FFFFh

-1,

()

:


()
,
.
R2 R3 ,
-.

RIS- MSP430 27 .
, MSP430- 24
. , :
CLR

dst

:
MOV

R3,dst

#0 , R3 As=00
INC dst ADD 0(R3),dst

43

MSP430x1xxFamily

3.2.5. R4-R15
R4 R15 . ,

, . 3.7.

. 3-7. -/-
-
R5=0A28Fh
R6=0203h
Mem(0203h)=012h
ADD.B
R5,0(R6)
08Fh
+012h
0A1h
Mem(0203h)=0A1h
C=0, Z=0, N=1
(
)+( )
->( )

-
R5=01202Fh
R6=0223h
Mem(0223h)=05Fh
ADD.B
@R6,R5
05Fh
+002h
00061h
R5=00061h
C=0, Z=0, N=0
( )+(
)
->( ,
)

3.3.
. 3.3 As () Ad ().
3.3 /
As/Ad

00 / 0

Rn

01 / 1

X(Rn)

44

(Rn+X) . X

16- RISC CPU

III.

3.3 ()
As/Ad

01 / 1

ADDR

01 / 1

()

&ADDR

10 / -

@Rn

11 / -

@Rn+

11 / -

()

#N

(PC+X) . X
.
X(PC)
, ,
. X
. X(SR)
Rn

Rn
. Rn
1
2 -.
, ,
N.
@PC+

. ,
.
: EDE TONI
MSP430 EDE TONI. ,
.
3.3.1.
3.4.
3.4.

MOV R10,R11

MOV R10, R11

:
: R10 R11. R10 .
: .
: MOV R10,R11

R10

0A023h

R10

0A023h

R11

0FA15h

R11

0A023h

PC

PCold

PC

PCold+2

45

MSP430x1xxFamily

:

-. , 0. .
3.3.2.
3.5.
3.5.

MOV 2(R5), 6(R6)

MOV X(R5), Y(R6) X=2 Y=6

:
: ( R5 + 2)
( R6 + 6). (R5 R6) .
, .
:
: MOV 2(R5),6(R6):

46

16- RISC CPU

III.

3.3.3.
3.6.
3.6. .

MOV EDE, TONI

MOV X(PC), Y(PC)

X=EDE-PCY=TONI-PC

:
: EDE ( PC
+ X) TONI ( PC + Y).
PC . X Y. , .
:
: MOV EDE,TONI ; EDE=0F016h ;
TONI=01114h

47

MSP430x1xxFamily

3.3.4.
3.7.
3.7.

MOV &EDE, &TONI

MOV X(0), Y(0) X=EDEY=TONI

:
: EDE TONI.
.
, .
:
: MOV &EDE,&TONI ; EDE=0F016h ;
TONI=01114h

, , .
, (, -, ).
48

16- RISC CPU

III.

3.3.5.
3.8.
3.8.

MOV @R10, 0(R11)

MOV @R10, 0(R11)

:
: ( R10) ( R11). .
: .
0(Rd)
: MOV.B @R10, 0(R11)

49

MSP430x1xxFamily

3.3.6.
3.9.
3.9.

MOV @R10+, 0(R11)

MOV @R10+, 0(R11)

:
: ( R10) ( R11). R10 1
2 -, . .
: .
0(Rd) INCD Rd.
: MOV.B @R10+, 0(R11)

. . 3.8.
50

16- RISC CPU

III.

. 3-8.

3.3.7.
() 3.10.
3.10.

MOV #45h, TONI

MOV @PC+, X(PC)45X=TONI-PC

: . , CG1 CG2.
: 45h, ,
, TONI. ,
, ,
.
:
: MOV #45h,TONI

51

MSP430x1xxFamily

3.4.
MSP430 27 24
. ,
, . , , , .
.
:



, , , .B .W. . -
. , -.
:
src

As S-reg

dst

Ad D-reg

As
S-reg
Ad

, , (src)
, (src)
, , (dst)

D-reg

, (dst)

B/W

:
0:
1:

:
. , , , ,
. ,
, ,
.
52

16- RISC CPU

III.

: EDE TONI
MSP430 EDE TONI. ,
.
3.4.1. ( I)
. 9 .

. 3-9.

3.11 .
3.11.
S-Reg, D-Reg

src dst

src,dst

src + dst dst

ADDC(.B)

src,dst

src + dst + C dst

SUB(.B)

src,dst

dst + .not.src + 1 dst

SUBC(.B)

src,dst

dst + .not.src + C dst

CMP(.B)

src,dst

dst src

DADD(.B)

src,dst

src + dst + C dst ()

BIT(.B)

src,dst

src .and. dst

BIC(.B)

src,dst

.not.src .and. dst dst

BIS(.B)

src,dst

src .or. dst dst

XOR(.B)

src,dst

src .xor. dst dst

AND(.B)

src,dst

src .and. dst dst

MOV(.B)

src,dst

ADD(.B)

: CMP SUB
CMP SUB , .
BIT AND.

53

MSP430x1xxFamily

3.4.2. ( II)
. 3.10 .

. 3-10.

3.12 .
3.12.
S-Reg, D-Reg
RRC(.B)

dst

C MSB
MSB MSB

LSB C
LSB C

*
*

RRA(.A)

dst

PUSH(.B)

src

SP-2 SP, src @SP

SWPB

dst

CALL

dst

SP-2 SP, PC+2 @SP

dst PC
TOS SR, SP+2 SP

RETI

TOS PC, SP+2 SP

SXT

dst

7 8 15

CALL .
(), (#N), (&EDE)
x(RN), CALL .
3.4.3.
. 3.11 .

. 3-11.
54

16- RISC CPU

III.

3.13 .
3.13.

S-Reg, D-Reg

JEQ/JZ

, (Z)

JNE/JNZ

, (Z)

JC

, (C)

JNC

, (C)

JN

,
(N)

JGE

, (N.XOR.V)=0

JL

, (N.XOR.V)=1

JMP

PC . -511
+512 PC. 10- 10- : :
PCnew=PCold + 2 + PCoffset 2
: PCnew ;
PCold ;
PCoffset 10- .
ADC[.W]

ADC.B

ADC dst ADC.W dst
ADC.B dst

dst + C dst
ADDC #0,dst
ADDC.B #0,dst
() . .
N:

, , ,

Z:

, 0,

55

MSP430x1xxFamily

C:

, dst 0FFFFh 0000, ;

, dst 0FFh 00, ;

V:

, ,

OSCOFF, CPUOFF GIE

16- , R13, 32- , R12:

ADD @R13,0(R12)
; LSD
ADC 2(R12)
; MSD

8- , R13, c 16- , R12:

ADD.B @R13,0(R12)
; LSD
ADC.B 1(R12)
; MSD

ADD[.W]

ADD.B

ADD src,dst ADD.W src,dst
ADD.B src,dst

src + dst dst

. .
N:

, , ,

Z:

, 0,

C:

, ; ,

V:

, ,

56

OSCOFF, CPUOFF GIE

10 R5. TONI,
( ):
ADD #10, R5
JC TONI
;

10 R5. TONI,
( ):
ADD.B #10, R5 ; 10 R5
JC TONI
; , (R5) 246
;[0Ah+0F6h]

16- RISC CPU

III.
ADDC[.W]

ADDC.B

ADD src,dst ADD.W src,dst
ADD.B src,dst

src + dst + dst

() . .

N:

, , ,

Z:

, 0,

C:

, MSB ;
,

V:

, ,

OSCOFF, CPUOFF GIE

32- , R13,
32- , (20/2 + 2/2)
R13:
ADD @R13+, 20(R13) ; LSD-
;
ADDC @R13+, 20(R13) ; MSD
;

; LSD

24- , R13,
24- , R13:
ADD.B @R13+, 10(R13) ; LSD-
;
ADDC.B @R13+, 10(R13) ;
;
ADDC.B @R13+, 10(R13) ; MSD
;

; LSD

AND[.W]

AND.B

AND src,dst AND.W src,dst

AND.B src,dst

src .AND. dst dst

( ). .

57

MSP430x1xxFamily

N:

, MSB, ,

Z:

, 0,

C:

, 0; (=.NOT. Zero)

V:

OSCOFF, CPUOFF GIE

R5 (#0AA55h) , TOM. 0, TONI:

MOV #0AA55h, R5
; R5
AND R5, TOM
; ,
;TOM, R5
JZ TONI
;

; 0
;
;
;
;
;
AND #0AA55h,TOM
JZ TONI

#0A5h TOM.
0, TONI:
AND.B #0A5,TOM
;
;#0A5h
JZ
TONI
;

; 0

BIC[.W]
BIC.B

BIC src,dst BIC.W src,dst
BIC.B src,dst

.NOT.src .AND. dst dst

. .
.

OSCOFF, CPUOFF GIE

58

MSB LEO :
BIC #0FC00h,LEO
; 6- MSB
; (LEO)

MSB LEO :
BIC.B #0F8h,LEO
; 5- MSB
; LEO

16- RISC CPU

III.
BIS[.W]
BIS.B

BIS src,dst BIS.W src,dst
BISC.B src,dst

src .OR. dst dst

( ). . .

OSCOFF, CPUOFF GIE

LSB- TOM :
BIS #003Fh, TOM
; 6- LSB- TOM
;

MSB- LEO :
BIS.B #0E0h,TOM
; 3- MSB-
;TOM

BIT[.W]

BIT.B

BIT src,dst BIT.W src,dst

src .AND. dst

( ).
. .
N:

, MSB ,

Z:

, 0,

C:

, 0; (.NOT. Zero)

V:

OSCOFF, CPUOFF GIE

9 R8 , TOM:
BIT #0200h, R8
; 9 R8 ?
JNZ TOM
;, TOM

;,

3 R8 , TOM:
BIT #8, R8J TOM

59

MSP430x1xxFamily

(RCV) .
BIT ,
;
RECBUF:
;
; ,
(LSB), :
;xxxx xxxx xxxx xxxx
BIT.B #RCV,RCCTL ;
RRC
RECBUF
; MSB
;RECBUF
;cxxx xxxx

;8
;cccc cccc
;^
^
;
MSB
LSB
; ,
; (MSB),
;
;:
BIT.B #RCV, RCCTL ;
RLC.B RECBUF
; LSB
;RECBUF
;xxxx xxxc

;8
;cccc cccc
;LSB
;MSB

*BR, BRANCH

BR dst

dst PC

MOV dst, PC

64
. . -.

60

:
BR #EXEC ; EXEC
(, #0A4h)
; MOV @PC+,PC
BR EXEC ; , EXEC
; MOV X(PC),PC
;

16- RISC CPU

III.

CALL

BR &EXEC ; ,
; EXEC
; MOV X(0),PC
;
BR R5
; , R5
; MOV R5,PC
; R5BR @R5
; , ,
; R5
; MOV @R5,PC
;
; R5
BR @R5+ ; , ,
; R5
; R5.
; R5
;
; ,
;
; , R5
; MOV @R5,PC
;
; R5 c
BR X(R5) ; , ,
; R5+ (,
; ).
;
; MOV X(R5),PC
;
; R5 + X

CALL dst
dst tmp dst
SP 2 SP

PC @SP

PC (TOS)

tmp PC dst PC

64 . . ( ) .
-.

:
CALL #EXEC ; EXEC
;(, #0A4h)
;SP-2 SP, PC+2 @SP, @PC+ PC

61

MSP430x1xxFamily
CALL EXEC

*CLR[.W]
*CLR.B

62

; , EXEC
;SP-2 SP, PC+2 @SP, X(PC) PC
;
CALL &EXEC ; ,
; EXEC
;SP-2 SP, PC+2 @SP, X(0) PC
;
CALL R5
; , R5
;SP-2 SP, PC+2 @SP, R5 PC
; R5
CALL @R5
; , ,
; R5
;SP-2 SP, PC+2 @SP, @R5 PC
;
; R5
CALL @R5+ ; ,
; , R5
; R5.
; R5
;
; ,
; ,
; R5
;SP-2 SP, PC+2 @SP, @R5 PC
;
; R5 c
CALL X(R5) ; , ,
; R5+ (,
; ).
; .
;SP-2 SP, PC+2 @SP, X(R5) PC
;
; R5 + X


CLR dst CLR.W dst
CLR.B dst
0 dst
MOV #0, dst
MOV.B #0, dst


TONI :
CLR TONI
;0 TONI
R5:
CLR R5
TONI :
CLR.B TONI
;0 TONI

16- RISC CPU

III.

CLRC

*CLRC

BIC #1, SR

() . -.

N:

Z:

C:

V:

OSCOFF, CPUOFF GIE

16- ,
R13 32- , R12:
CLRC
;C=0:
;
DADD @R13,0(R12) ; 16-
; 32-
;
DADC 2(R12)
;
; 32-

*CLRN

CLRN

0 N (.NOT.src .AND. dst dst)

BIC #4, SR

04h (0FFFBh) (AND)

. .
-.

SUBR

SUBRET

N:

Z:

C:

V:

OSCOFF, CPUOFF GIE

. .
CLRN
CALL SUBR

JN SUBRET ; ,
;
;

RET

63

MSP430x1xxFamily
*CLRZ

CMP[.W]
CMP.B

CLRZ
0 Z (.NOT.src .AND. dst dst)
BIC #2, SR
02h (0FFFDh) (AND)
. .
-.
N:

Z:
0
C:

V:

OSCOFF, CPUOFF GIE
.
CLRZ


CMP src,dst CMP.W src,dst
CMP.B src, dst
dst + .NOT.src + 1 (dst src)
.
1.
, ,
.
N:
Z:

C:
V:

64

, ; ,
(src >= dst)
, 0, (src = dst)
, MSB ,

, ,

OSCOFF, CPUOFF GIE

R5 R6. , EQUAL.
CMP R5,R6 ;R5=R6?
JEQ EQUAL ;, EQUAL

. , ERROR.
L$1
MOV #NUM, R5
; ,
;
MOV #BLOCK1,R6
; BLOCK1
; R6

16- RISC CPU

III.
L$1 MOV #BLOCK2,R7

; BLOCK2
; R7
CMP @R6+,0(R7)
;
; R6
JNZ ERROR
; ,
; ERROR
INCD R7
; R7
DEC R5
; R5
JNZ L$1
; ;
, EDE TONI.
, EQUAL.
CMP.B EDE, TONI
;MEM(EDE)=MEM(TONI)?
JEQ
EQUAL
;, EQUAL

*DADC[.W]

*DADC.B

DADC dst DADC.W src,dst

DADC.B dst
dst + C dst ()
DADD
#0, dst
DADD.B #0, dst
()
N:
, MSB 1
, dst 0; Z:

, 9999
0000; . ,
C:
99 00;

V:

OSCOFF, CPUOFF GIE

, R5 , R8.
CLR
;
;
;
DADD R5,0(R8)
; LCDs
DADC 2(R8)
; MSD

, R5
, R8.
CLR
;
;
;
DADD.B R5,0(R8) ; LCDs
DADC 1(R8)
; MSD

65

MSP430x1xxFamily
DADD[.W]

DADD.B

,
DADD src,dst DADD.W src,dst
DADD.B src, dst
src + dst + C dst ()

(BCD Binary Coded Decimal) .

()
. . . , BCD-,
.
N:

, MSB 1;

Z:

, 0;

C:

, 9999,
99

V:

OSCOFF, CPUOFF GIE

BCD- , R5 R6,
BCD- , R3
R4 ( R6 R4 MSD).
CLR
;
DADD R5,R3
; LSDs
DADD R6,R4
; MSDs
JC
OVERFLOW
; ,
;
;

CNT .
CLR
;
DADD.B #1,CNT
;

SETC
DADD.B #0,CNT
; DADC.B CNT

*DEC[.W]

*DEC.B

66

DEC dst DEC.W dst

DEC.B dst
dst - 1 dst
SUB

#1, dst

SUB.B #1, dst

16- RISC CPU

III.

() .
.
, ; ,
N:

, dst 1; Z:

, 0;
C:

V:

, ;
;
, 08000h,
;
, 080h,

OSCOFF, CPUOFF GIE

R10 1.
DEC R10
; R10

255 , ,
EDE, , TONI. :
TONI EDE EDE+0FEh.
MOV
MOV
L$1 MOV.B
DEC
JNZ

#EDE,R6
#255,R10
@R6+,TONI-EDE-1(R6)
R10
L$1

, ; , . 3.12.

. 3-12. ()

67

MSP430x1xxFamily
*DECD[.W]
*DECD.B

DECD
dst DECD.W dst
DECD.B dst
dst - 2 dst
SUB
#2, dst
SUB.B #2, dst
() .
.
N:

, ; ,

Z:

, dst 2;

C:

, 0;

V:

, ;
;
, 08001h
08000h, ;
, 081h
080h,

OSCOFF, CPUOFF GIE

R10 2.
DECD R10
; R10

255 , ,
EDE, , TONI. :
TONI EDE EDE+0FEh.

L$1

68

MOV
MOV
MOV
DECD
JNZ

#EDE, R6
#510, R10
@R6+, TONI-EDE-2(R6)
R10
L$1

LEO .
DECD.B LEO ; MEM(LEO)
STATUS .
DECD.B STATUS

*DINT

()

DINT

0 GIE (0FFF7h .AND. SR SR/.NOT.src .AND. dst

dst)

BIC #8,SR

16- RISC CPU

III.

. 08h
(SR).
SR.

GIE . OSCOFF CPUOFF .

, 32- .
, - .
DINT
; GIE
;
NOP
MOV COUNTHI, R5 ;
MOV COUNTLO, R6
EINT
; GIE
;

:
- , DINT , ,
,
DINT NOP.

()
EINT

*EINT

1 GIE (0008h .OR. SR SR / .src .OR. dst dst)

BIS #8,SR

. #08h SR (OR). SR.

GIE . OSCOFF CPUOFF .

(GIE) .

P1.2 P1.7
P1IN , .
P1IFG , ,
PUSH.B &P1IN
BIC.B @SP, &P1IFG ;
EINT
;
; 0
; ,
;
BIT
#Mask, @SP
JEQ
MaskOK
;,
;

69

MSP430x1xxFamily
MaskOK

BIC

INCD

#Mask,@SP
SP

; ,
; PUSH,
;
;.
;
;

RETI

:
, (EINT), , , .
*INC[.W]

*INC.B

INC dst INC.W dst

INC.B dst
dst + 1 dst

ADD #1, dst

.
.

N:

, ; ,

Z:

, dst 0FFFFh,
;
, dst 0FFh,

C:

, dst 0FFFFh,
;
, dst 0FFh,

V:

, dst 07FFFh,
;
, dst 07Fh,

70

OSCOFF, CPUOFF GIE

STATUS . 11,
OVFL.
INC.B STATUS
CMP.B #11,STATUS
JEQ
OVFL

16- RISC CPU

III.
*INCD[.W]
*INCD.B

INCD dst INCD.W dst
INCD.B dst
dst + 2 dst
ADD
#2, dst
ADD.B #2, dst
. .
, ; ,
N:

, dst 0FFFEh,
;
Z:
, dst 0FEh,

, dst 0FFFEh 0FFFFh, ;

C:
, dst 0FEh 0FFh,

, dst 07FFEh 07FFFh, ;
V:
, dst 07Eh 07Fh,

OSCOFF, CPUOFF GIE
(TOS)
....
PUSH
R5
; R5,
; ,
;
INCD
SP
; TOS
; . INCD.B
; ,
; SP
;.
RET
.
INCD.B 0(SP) ; (TOS)
;

*INV[.W]

*INV.B

INV
dst
INV.B dst
.NOT.dst dst

XOR

XOR.B #0FFh, dst

#0FFFFh, dst

71

MSP430x1xxFamily

. .
N:

, ; ,

Z:

, dst 0FFFFh,
;
, dst 0FFh,

C:

, , (= .NOT. Zero)
, , (= .NOT. Zero)

V:

, ,

R5 (
).
MOV #00AEh,R5
;
R5=000AEh
INV R5
; R5,
R5=0FF51h
INC R5
; R5 , R5=0FF52h

LEO .
MOV
#0AEh,LEO ;
MEM(LEO)=0AEh
INV.B LEO
; LEO,
MEM(LEO)=051h
INC.B LEO
;MEM(LEO) , MEM(LEO)=052h

JC

JHS

, *

72

OSCOFF, CPUOFF GIE

JC label
JHS label
C=1: PC+2 PC
C=0:
() . , 10- , (LSB)
. , , jump. JC (,
/ )
( 0 65536).

P1IN.1 .
BIT #01h,&P1IN ;
JC
PROGA
; 1,
;

; 0,
;
;

16- RISC CPU

III.

R5 15.
, LABEL.
CMP #15, R5
JHS LABEL
; R515,

; , R5<15

* higher. , ,
, JGE (Jump if Greater
or Equal , ),
.
JEQ, JZ

, ; ,
JEQ label, JZ label
Z=1: PC+2 PC
Z=0:
y (Z) . , 10- , (LSB)
. Z ,
, jump.

, TONI, R7 .
TST R7
; R7
JZ
TONI
;,

LEO, R6 .
CMP R6, Table(R5) ;C R6
; (
; R5)
JEQ LEO
;,

;, ,
;

LABEL, R5 .
TST R5
JZ
LABEL

JGE

JGE label

(N .XOR. V)=0, : PC+2 PC

(N .XOR. V)=1,

(N) (V) .
, 10-
, (LSB)
. , ,
jump. .

73

MSP430x1xxFamily

JL

R6
, R7, EDE.
CMP @R7, R6
;R6(R7)?,
JGE EDE
;, R6(R7); EDE

;,

,
JL label
(N .XOR. V)=1, : PC+2 PC
(N .XOR. V)=0,
(N) (V) .
, 10-
, (LSB) . N V ,
, jump.
.

R6 , R7, EDE.
CMP @R7,R6
;R6<(R7)?,
JL
EDE
;, R6<(R7) ; EDE

;,

JMP label

PC+2 PC

10- ,
(LSB) .

JMP

BRANCH -511 +512

.

JN

74

,
JN label
N=1: PC+2 PC
N=0:
(N) . , 10- , (LSB)
. N ,
, jump.

16- RISC CPU

III.

R5 COUNT. , COUNT
.
SUB R5, COUNT ;COUNT R5 COUNT
JN L$1
; ,
; COUNT=0, PC=L$1

;, COUNT0

L$1 CLR COUNT

JNC

JLO

JNC label JLO label

C=0: PC+2 PC

C=1:
(C) . , 10- , (LSB)
. , , jump. JNC (,
/ ) ( 0
65536).

R6 BUFFER. , ERROR.
ADD R6,BUFFER ;BUFFER + R6 BUFFER
JNC CONT
; CONT,
ERROR
;

COUNT
;
;

STL2, STATUS 1 0.
CMP.B #2,STATUS
JLO
STL2
;STATUS<2

;STATUS2,

75

MSP430x1xxFamily
JNE

JNZ

,
JNE label JNZ label
Z=0: PC+2 PC
Z=1:

MOV[.W]

(Z) . , 10-
, (LSB) . Z ,
, jump.

TONI, R7 R8 .
CMP R7, R8
; R7 R8
JNE TONI
;,

;,

MOV src, dst MOV.W src, dst MOV.B src, dst

src dst

. . .

MOV.B

OSCOFF, CPUOFF GIE

76

EDE ( ) TOM.
020h .
MOV #EDE,R10
;
MOV #020h,R9
;
Loop MOV @R10+,TOM-EDE-2(R10) ;
;
; R10
;
DEC R9
;
JNZ Loop
;
;0,
;
;

EDE ( ) TOM.
020h .
MOV
#EDE,R10
;
MOV
#020h,R9
;
Loop MOV.B @R10+,TOM-EDE-1(R10) ;
;

16- RISC CPU

III.

DEC R9
JNZ Loop

*NOP

; R10
;
;
;
;0,
;
;
;

NOP

MOV #0, R3
.

.

NOP :
, ;
.
: NOP.
NOP,
. :
MOV
#0,R3
;1 , 1
MOV
0(R4),0(R4) ;6 , 3
MOV
@R4,0(R4)
;5 , 2
BIC
#0,EDE(R4) ;4 , 2
JMP
$+2
;2 , 1
BIC
#0,R5
;1 , 1
, , . , MOV 0(R4), 0(R4), R4 120h, ( 120h),
.
*POP[.W]
*POP.B

POP dst POP.B dst
@SP temp
SP + 2 SP
temp dst

77

MSP430x1xxFamily

MOV @SP+, dst MOV.W @SP+, dst MOV.B @SP+, dst

, (TOS)
. .

R7 .
POP
R7
; R7
POP
SR
;
LEO.
POP.B LEO
; LEO
R7.
POP.B R7
; R7,
; R7 00h
,
R7 .
POP.B 0(R7) ;
; , R7
;: R7=203h
;
Mem(R7) =
;

;: R7=20Ah
;
Mem(R7) =
;

POP
SR

:
(SP) , .
PUSH[.W]
PUSH.B

PUSH src PUSH.W src PUSH.B src
SP - 2 SP
src @SP
, , (TOS).

OSCOFF, CPUOFF GIE
R8 .
PUSH
SR
;
PUSH
R8
; R8
TCDAT .
PUSH.B &TCDAT ;
; 8-
;, TCDAT

:
(SP) , .
78

16- RISC CPU

III.
*RET

RET

@SP PC
SP + 2 SP

MOV @SP+, PC

, CALL
. ,
.

RETI

RETI

TOS SR, SP + 2 SP, TOS PC, SP + 2 SP

,
,
SR TOS. (SP) .
, .
.
PC TOS. (SP) .
N:

Z:

C:

V:

OSCOFF, CPUOFF GIE

*RLA[.W]

*RLA.B

RLA dst RLA.W dst

RLA.B dst
C MSB MSB1 LSB+1 LSB 0
ADD

dst, dst

ADD.B dst, dst

, .
3.14. MSB (), LSB
0. RLA 2.
, dst 04000h dst < 0C000h : .

79

MSP430x1xxFamily

. 3-13.
N:

, ; ,

Z:

, 0,

C:

MSB

V:

, :
04000h dst < 0C000h;

, :
040h dst <0C0h;

OSCOFF, CPUOFF GIE

. 3-14.
80

16- RISC CPU

III.

R7 2.
RLA
R7
; R7 ( 2)

R7 4.
RLA.B R7
; R7
;( 2)
RLA.B R7
; R7
;( 4)

: RLA
:
RLA @R5+ RLA.B @R5+
:
ADD @R5+,-2(R5) ADD.B @R5+,-1(R5)
*RL[.W]

*RL.B

RL dst RL.W dst
RL.B dst

C MSB MSB1 LSB+1 LSB

ADD dst, dst

,
. 3.15. () LSB,
MSB ().
N:

, ; ,

Z:

, 0,

C:

MSB

V:

, 04000h dst < 0C000h;

, 040h dst < 0C0h;

. 3-15.

81

MSP430x1xxFamily

OSCOFF, CPUOFF GIE

R5 .
RLC
R5
;(R52)+C R5

P1IN.1 LSB R5.

BIT.B #2,&P1IN ; (arry)
RLC
R5
;Carry=P0in.1 LSB R5

MEM (LEO) .
RLC.B LEO
;Mem(LEO)2+C Mem(LEO)

: RLC RLC.B
:
RLC
@R5+
:
ADDC
@R5+,-2(R5)
RRA[.W]
RRA.B

RRA dst RRA.W dst
RRA.B dst
MSB MSB, MSB MSB-1, LSB+1 LSB, LSB
,
. 3.16. MSB MSB-1, LSB+1
LSB.
, ; ,

, 0, Z:

C:
LSB
V:

OSCOFF, CPUOFF GIE

R5 .
MSB . 2.
RRA R5
;R5/2 R5
N:

. 3-16.
82

16- RISC CPU

III.
;
;

R5 0.75 (0.5 + 0.25).

PUSH R5
; R5
RRA
R5
;R50.5 R5
ADD
@SP+,R5 ;R50.5 + R5 = 1.5R5 R5
RRA
R5
;(1.5R5)0.5 = 0.75R5 R5

R5 . MSB . 2.
RRA.B R5
;R5/2 R5:
; ,
;R5
PUSH.B R5
;R50.5 TOS
RRA.B @SP
;TOS0.5 = 0.5R50.5 = 0.25R5 TOS
ADD.B @SP+,R5 ;R50.5 + R50.25 = 0.75R5 R5

RRC[.W]

RRC.B

RRC dst RRC.W dst
RRC.B dst
C MSB MSB-1 LSB+1 LSB

,
. 3.17. () MSB, LSB
().

N:

, ; ,

Z:

, 0,

C:

LSB

V:

,
,

OSCOFF, CPUOFF GIE

. 3-17.

83

MSP430x1xxFamily

R5 .
MSB 1.
SETC
; MSB
RR
R5
;R5/2 + 8000h R5

R5 .
MSB 1.
SETC
; MSB
RR.B R5
;R5/2 + 80h R5 ;
; R5

*SBC[.W]

/.NOT.

*SBC.B

/.NOT.
SBC dst SBC.W dst
SBC.B dst
dst + 0FFFFh + C dst
dst + 0FFh + C dst
SUBC
#0, dst
SUBC.B #0, dst

() . .
N:

, ; ,

Z:

, 0,

C:

, MSB , . 1,
; , .

V:

, ,

OSCOFF, CPUOFF GIE

16- , R13, 32 , R12:

SUB
@R13,0(R12) ; LSD
SBC
2(R12)
; MSD

8- , R13, 16- , R12:

SUB.B @R13,0(R12) ; LSD
SBC.B 1(R12)
; MSD

:
.NOT. :

0
1
84

16- RISC CPU

III.

SETC

*SETC

BIS #1, SR

().
N:

Z:

C:

V:

OSCOFF, CPUOFF GIE

: R5
R6. , R5=3987 R6=4137:
DSUB ADD #6666h,R5 ; R5
; 0-9 6-0Fh
;R5=03987+6666=09FEDh
INV R5
; R5
;( 0-9)
;R5=.NOT. R5=06012h
SETC
;
;carry=1
DADD R5,R6
;
;:
;(1000-R5-1)
;R6=R6+R5+1
;R6=4137+06012+1=1 0150=0150

SETN

*SETN

1 N

BIS #4, SR

(N).

*SETZ

N:

Z:

C:

V:

OSCOFF, CPUOFF GIE

SETZ

1 Z

BIS #2, SR

(Z).

85

MSP430x1xxFamily

SUB[.W]
SUB.B

N:

Z:

C:

V:

OSCOFF, CPUOFF GIE

SUB src, dst SUB.W src,dst
SUB.B src,dst
dst + .NOT.src + 1 dst [(dst src dst)]

1
. .
.
, ; ,
N:
.
, 0, Z:
.
, MSB , .
C:
1, ; ,
.
, ,
V:

OSCOFF, CPUOFF GIE
. SBC
. SBC.B

: .NOT.
.NOT. :

0
1
SUB[.W],
SBB[.W]
SUBC.B,
SBB.B

86

/.NOT.
/.NOT.
SUB src, dst SUB.W src, dst
SBB src, dst SBB.W src, dst
SUBC.B src, dst SBB.B src, dst
dst + .NOT.src + C dst [(dst src 1 + C
dst)]

16- RISC CPU

III.

()
. .
.
N:

, ; ,
.

Z:

, 0, .

C:

, MSB , . 1,
; , .

V:

, ,

OSCOFF, CPUOFF GIE

(24-) .
LSB R13 R10, MSB R12 R9.
SUB.W
R13,R10
;16- , LSB
SUBC.B R12,R9
;8- , MSB

16- , R13, 16 , R10 R11(MSD).

SUB.B
@R13+,R10 ; LSB
;
SUBC.B @R13,R11 ; MSB
; ,

;
;

; LSB

:
.NOT. :

0
1
SWPB

SWPB dst

15 8 7 0

,
. 3.18

OSCOFF, CPUOFF GIE

MOV
SWPB

#040BFh,R7
R7

;0100000010111111 R7
;1011111101000000 R7

87

MSP430x1xxFamily

R5 255. R5, R4.

SWPB R5
;
MOV R5, R4
;
; R4
BIC #0FF00h, R5 ;
BIC #00FFh, R4 ;

. 3-18.
SXT

SXT dst

7 8 15

,
. 3.19.

88

N:

, ; ,
.

Z:

, 0, .

C:

, , (.NOT. Zero)

V:

OSCOFF, CPUOFF GIE

R7 P1IN.
7 8 15.
MOV.B &P1IN,R7 ;P1IN = 080h:
.... .... 1000 0000
SXT
R7
;R7 = 0FF80h:
1111 1111 1000 0000

16- RISC CPU

III.

. 3-19.
*TST[.W]
*TST.B

TST dst TST.W dst
TST.B dst
dst + 0FFFFh + 1
dst + 0FFh + 1
CMP
#0, dst
CMP.B #0, dst
.
. .
, ; ,
N:
.
, 0,
Z:
.
C:

V:

OSCOFF, CPUOFF GIE

R7. , R7NEG; , ,
R7POS.
TST R7
; R7
JN
R7NEG ; R7
JZ
R7ZERO ;R7
R7POS
; R7 , 0
R7NEG
; R7
R7ZERO
;R7

89

MSP430x1xxFamily

R7. ,
R7NEG; ,
, R7POS.
TST.B R7
; R7
JN
R7NEG ; R7
JZ
R7ZERO ; R7
R7POS
; R7 ,
; 0
R7NEG
; R7
R7ZERO
; R7

XOR[.W]

XOR.B

XOR src, dst XOR.W src, dst

src .XOR. dst dst

(OR). .
.

90

XOR.B src, dst

N:

, MSB ; ,
.

Z:

, 0,
.

C:

, , (= .NOT. Zero)

V:

OSCOFF, CPUOFF GIE

, R6 TONI.
XOR R6,TONI
; TONI
; ,
; R6

, R6 TONI.
XOR.B R6,TONI ; TONI
; ,
;
; R6

R7, EDE.
XOR.B EDE,R7 ; 1
INV.B R7
; R7,
; e 0h

16- RISC CPU

III.

3.4.4.
, , , , , .
MCLK.

3.14 .
3.14.

(RETI)

WDT

(nonRST/NMI)

-II ( )
3.15
-II.
3.15. -II

RRA, RRC, SWPB,

SXT

PUSH

CALL

Rn

SWPB R5

@Rn

RRC @R9

@Rn+

SWPB @R10+

#N

. .

CALL #0F000h

X(Rn)

CALL 2(R7)

EDE

PUSH EDE

&EDE

SXT &EDE

: -II
RRA, RRC SXT
.
.

91

MSP430x1xxFamily

-III ( )
, , .
-I ( )
3.16
-I.
3.16. -I

Src

Rn

@Rn

@Rn+

#N

x(Rn)

92

Rm

MOV

PC

BR

x(Rm)

EDE

XOR

R8,EDE

&EDE

MOV

R5,&EDE

Rm

AND

@R4,R5

Dst

ADD

R5,R8
R9

R5,4(R6)

PC

x(Rm)

EDE

MOV

@R5,EDE

&EDE

XOR

@R5,&EDE

Rm

ADD

@R5+,R6

PC

BR

x(Rm)

BR
XOR

@R8

@R5,8(R6)

XOR

@R9+
@R5,8(R6)

EDE

MOV

@R9+,EDE

&EDE

XOR

@R9+,&EDE

Rm

MOV

#20,R9

PC

BR

#2AEh

x(Rm)

EDE

ADD

#33,EDE

&EDE

ADD

#33,&EDE
2(R5),R7

MOV

#0300h,0(SP)

Rm

MOV

PC

BR

TONI

MOV

4(R7),TONI

x(Rm)

ADD

4(R4),6(R9)

&TONI

MOV

2(R4),&TONI

2(R6)

16- RISC CPU

III.

3.16. ()

Src

EDE

&EDE

Dst

Rm
PC
TONI
x(Rm)
&TONI
Rm
PC
TONI
x(Rm)
&TONI

3
3
6
6
6
3
3
6
6
6

2
2
3
3
3
2
2
3
3
3

AND EDE,R6
BR
EDE
CMP EDE,TONI
MOV EDE,0(SP)
MOV EDE,&TONI
MOV &EDE,R8
BRA &EDE
MOV &EDE,TONI
MOV &EDE,0(SP)
MOV &EDE,&TONI

3.4.5.
. 3.20,
3.17.
000
0xxx
4xxx
8xxx
Cxxx
1xxx
14xx
18xx
1Cxx
20xx
24xx
28xx
2Cxx
30xx
34xx
38xx
3Cxx
4xxx
5xxx
6xxx
7xxx
8xxx
9xxx
Axxx
Bxxx
Cxxx
Dxxx
Exxx
Fxxx

RRC

040

080 00 100

RRC.B SWPB

RRA

140

RRA.B

180 10 200

SXT

PUSH

240

PUSH.B

280 20 300 340 380 30

CALL

RETI

JNE/JNZ
JEQ/JZ
JNC
JC
JN
JGE
JL
JMP
MOV, MOV.B
ADD, ADD.B
ADDC, ADDC.B
SUBC, SUBC.B
SUB, SUB.B
CMP, CMP.B
DADD, DADD.B
BIT, BIT.B
BIC, BIC.B
BIS, BIS.B
XOR, XOR.B
AND, AND.B

. 3-20.

93

MSP430x1xxFamily

3.17. MSP430

V N Z C

ADC(.B)* dst

dst + C dst

ADD(.B)

src + dst dst

src + dst + C dst

src .and. dst dst

0 *

src,dst

ADDC(.B) src,dst

AND(.B)

src,dst

BIC(.B)

src,dst

.not.src .and. dst dst -

BIS(.B)

src,dst

src .or. dst dst

BIT(.B)

src,dst

src .and. dst

0 *

BR*

dst

dst PC

CALL

dst

PC + 2 stack, dst PC -

CLR(.B)* dst

0 dst

CLRC*

0 C

CLRN*

0 N

CLRZ*

0 Z

CMP(.B)

src,dst
dst src

DADC(.B)* dst

dst + c dst ()

DADD(.B) src,dst

src + dst + C dst (*

)

DEC(.B)* dst

dst - 1 dst

94

16- RISC CPU

III.

3.17. ()

V N Z C

DECD(.B)* dst

dst - 2 dst

DINT*

0 GIE

EINT*

1 GIE

INC(.B)* dst

dst + 1 dst

INCD(.B)* dst

dst + 2 dst

INV(.B)* dst

JC/JHS

label

, /

JEQ/JZ

label

,
/ Z

JGE

label

JL

label

JMP

label

JN

label

, N

JNC/JLO

label

,
/

JNE/JNZ

label

,
,
Z

MOV(.B)

src,dst

src dst

NOP*

.not.dst dst

PC + 2 PC

95

MSP430x1xxFamily

3.17. ()

V N Z C

POP(.B)* dst

@SP dst, SP + 2 SP

PUSH(.B) src

SP - 2 SP, src @SP

RET*

@SP PC, SP + 2 SP

RETI

RLA(.B)* dst

RLC(.B)* dst

RRA(.B)

dst

0 *

RRC(.B)

dst

SBC(.B)* dst

not(C)
dst + 0FFFFh + C dst

SETC*

1 C

SETN*

1 N

SETZ*

1 C

src,dst
dst + .not.src + 1 dst *

dst + .not.src + C dst *

SUB(.B)

SUBC(.B) src,dst not(C)

dst

dst

0 *

TST(.B)* dst

0 *

* 1

SWPB
SXT

XOR(.B)

dst + 0FFFFh + 1

src,dst src .xor. dst dst

96

MSP430x1xxFamily

IV.

MSP430x1xxFamily

MSP430x1xx. .
MSP430x1xx.

4.1.

. ,

. ,
,
.
:
LFXT1CLK: / ,
32768
450 8 .
XT2CLK: ,
450 8 .
DCOCLK: (DCO) RC-.
:
ACLK: . ACLK LFXT1CLK 1, 2, 4
8. ACLK .
MCLK: . MCLK
LFXT1CLK, XT2CLK ( ) DCOCLK. MCLK 1, 2, 4
8. MCLK .
SMCLK: . SMCLK LFXT1CLK, XT2CLK ( ) DCOCLK. SMCLK 1, 2, 4 8. SMCLK
.
- . 4.1.
98

 IV.

. 4-1. -

: XT2
XT2 MSP430x11xx MSP430x12xx.
XT2CLK LFXT1CLK.

4.2.
PUC MCLK SMCLK
DCOCLK c 800 (.
) LFXT1 ACLK LF.
SCG0, SCG1, OSCOFF CPUOFF MSP430 . . ,
. DCOCTL, BCSCTL1 BCSCTL2 .

, :

99

MSP430x1xxFamily

BIS.B #RSEL2+RSEL1+RSEL0,&BCSCTL1
BIS.B #DCO2+DCO1+DCO0,&DCOCTL ;
;
; DCO
4.2.1.

MSP430x1xx :
;



: ACLK, MCLK SMCLK.
ACLK
32768 ,
. MCLK
DCO, . SMCLK ,
DCO, .

.
4.2.2. LFXT1
LF (XTS=0) LFXT1 32768 .
XIN XOUT -
. LFXT1 LF 12 . ,
6 , 32768 .
.
LFXT1 , HF (XTS=1).
XIN XOUT . , .
LFXT1 ,
XIN LF HF . , , .
100

IV.

LFXT1
OSCOFF, SMCLK
MCLK, . 4.2.

. 4-2. LFXT1

: LFXT1
, ,
. LFXT1 LF .
, LFXT1 LF .
MSP430 , .
LFXT1 LF 5,1 Xout Vss, Vcc < 2,5 .
4.2.3. XT2
XT2. XT2
XT2CLK, LFXT1
HF. XT2OFF XT2, XT2CLK MCLK SMCLK, . 4.3.
XT ,
XT2IN.
XT2.
4.2.4. (DCO)
DCO RC-. RC-, , . DCO
DCOx, MODx

101

MSP430x1xxFamily

. 4-3. XT2

RSELx. , RC-.
DCO
DCOCLK, SMCLK MCLK, . 4.4.

. 4-4. / DCO

DCO
PUC DCO , RSELx=4 DCOx=3, DCO
. MCLK SMCLK DCOCLK.
MCLK, DCO, 6
PUC. 4-5 DCO DCOx RSELx
DCOCLK :
DC
. DCOR
.
RSELx DCO . .
DCOx DCO, RSELx
8 , 10%.
102

 IV.

MODx , DCOx , DCOx+1. DCOx = 07h MODx

DCO, DCOx
. DCOx RSELx,
. 4.5.

. 4-5. DCOx RSELx

(Rosc) DCO
DCO Rosc DC .
. 4.6 DCO
. Rosc
DCO -0.05%/.
.
Rosc DCO . , 300
DCO 5 . Rosc 100 , DCO
10 . , MCLK, , DCO .

103

MSP430x1xxFamily

. 4-6. DCO

4.2.5. DCO
DCO-: fDCO fDCO+1, fDCO fDCO+1
, (EMI1).
fDCO fDCO+1 32 DCOCLK MODx. MODx=0, .
:
t=(32-MODx) tDCO + MODx tDCO+1
fDCO , fDCO+1 , .
. 32
DCOCLK. . 4.7 .
DCO
. DCOCLK , DCOx, RSELx MODx. 1

EMI ElectroMagnetic Interference

104

 IV.

. 4-7.

DCO
http://www.ti.com/sc/msp430.
4.2.6.
. LFXT1CLK ( HF)
XT2CLK. ,
50 . , MCLK LFXT1
HF, XT2, MCLK
DCO, .
, , .
OFIFG OFIE,
NMI. NMI-
OFIFG, .
OFIFG .
: LFXT1 LF
.

105

MSP430x1xxFamily

LFXT1
HF XT2.
LFXT1 LF .
OFIFG XT_OscFault.
XT_OscFault POR, XT2 LFXT1 HF
. XT2 LFXT1 HF , XT_OscFault ,
,
50 , . 4.8.

. 4-8.

XT_OscFault OFIFG , . 4.9. LFXT1_OscFault , LFXT1 LF .
, XT2 , OFIFG
, LFXT1 LF. MCLK
LFXT1CLK LF SELMx,
OFIFG .
, XT2, OFIFG ,
LFXT1 LF .
MCLK LFXT1CKL LF OFIFG.
MCLK
PUC DCOCLK
MCLK. , MCLK
LFXT1 XT2.
MCLK DCO (LFXT1CLK
XT2CLK) :
106

IV.

. 4-9

1)
2)
3)
4)

OFIFG
50
OFIFG 1-4 , OFIFG .

; LFXT1 ( HF) MCLK

BIC
#OSCOFF,SR
;
BIS.B #XTS,BCSCTL1
; HF
L1 BIC.B #OFIFG,&IFG1
; OFIFG
MOV
#0FFh,R15
;
L2 DEC
R15
;
JNZ
L2
;
BIT.B #OFIFG,&IFG1
;
;OFIFG
JNZ
L1
; ,
;
BIS.B #SELM1+SELM0,&BCSCTL2 ; LFXT1CLK

107

MSP430x1xxFamily

4.2.7.
MCLK SMCLK
, ,
. . 4.10:

. 4-10. MCLK DCOCLK LFXT1CLK

1)
.
2) (MCLK)
.
3) MCLK
, .

4.3.
4.1.
4-1.

DCO
1
2
1 SFR
1 SFR

DCOCTL

056h

060h PUC

BCSCTL1

057h

BCSCTL2

058h

IE1

000h

IFG1

002h

084h PUC
POR
PUC
PUC

DCOCTL, DCO

108

IV.
DCOx
MODx

DCO. ,
7-5 DCO RSELx.
. , fDCO+1
32 DCOCLK. (324-0
MOD) fDCO. , DCOx=7.

BCSCTL1, 1

XT2OFF

XTS

DIVAx

XT5V
RSELx

XT2. XT2.
0 XT2
1 XT2, MCLK SMCLK.
LFXT1
6 0
1
ACLK
00 /1
5-4 01 /2
10 /4
11 /8
3 . XT5V .
.
. 2-0
.
RSELx=0.
7

BCSCTL2, 2

SELMx

MCLK. MCLK.
00 DCOCLK
7-6 01 DCOCLK
10 XT2CLK, XT2 . LFXT1CLK, XT2 .
11 LFXT1CLK

DIVMx

MCLK
00 /1
5-4 01 /2
10 /4
11 /8

109

MSP430x1xxFamily
SELS

DIVSx

DCOR

SMCLK. SMCLK.
0 DCOCLK
1 XT2CLK, XT2 . LFXT1CLK, XT2 .
SMCLK
00 /1
2-1 01 /2
10 /4
11 /8
DCO.
0 0
1
3

IE1, 1

7-2

OFIE

. .
.
.
OFIFG.
IE1 ,
MOV.B CLR.B BIS.B BIC.B.
0
1
. .
.

IFG1, 1

OFIFG

7-2

. .
.

.
IFG1
, MOV.B CLR.B
BIS.B BIC.B.
0
1

110

. .
.

MSP430x1xxFamily

V.

MSP430x1xxFamily

-
-
MSP430.

5.1. -
- MSP430 ,
. -
, . , .
- MSP430 :
;
, ;
;
() .
- - . 5.1.

. 5-1. - -
112

 V.

: VCC
-
VCC - 2,7 . VCC 2,7
, .

5.2. -
- MSP430 .
, , -,
. ,
( ).
- .
. .
.
128- (
MSP430F1101 ).
512- . .
.
.5.2 4 -, .

5.3. -
- .
- , .
- MSP430
(ISP) .
-.
/ - BLKWRT, WRT,
MERAS, ERASE:
/


( )
( )

113

MSP430x1xxFamily

. 5-2. -, 4

- .
, . - .
5.3.1. -
, . 5.3. f(FTG)

. 5-3. - -
114

V.

~ 257 ~ 476 ( .
).
- ACLK, SMCLK
MCLK. FNx f(FTG).
() f(FTG)
, -
, .
5.3.2. -
- 1. , 1 0, 0 1 .
-, .
, ERASE
MERAS 5-1.
5-1.
MERAS

ERASE

( )

- ( )

1 ,
. - . . 5.4 -

, VCC
BUSY

t ( ) = t( ) = 5297/f(FTG), t( ) = 4819/f(FTG)

. 5-4.
1

-
.

115

MSP430x1xxFamily

. BUSY
. BUSY, MERAS ERASE
, .
-. MSP430.
,
, - . .

-. . , ,
,
.
,
, -, .
-,
-, .

, .
-, ,

. 5-5. , -
116

 V.

. ,
.
, -,
. 5.5.
; . 514 < SMCLK < 952
; ACCVIE = NMIIE = OFIE = 0.
MOV #WDTPW+WDTHOLD,&WDTCTL
; WDT
DINT
;
MOV #FWKEY+FSSEL1+FN0,&FCTL2 ;SMCLK/2
MOV #FWKEY,&FCTL3
; LOCK
MOV #FWKEY+ERASE,&FCTL1
;
;
CLR &0FC10h
; ,
; S1
MOV #FWKEY+LOCK,&FCTL3
;,
;LOCK
...
;
;WDT?
EINT
;

.
, .
- , BUSY. -,
BUSY=1
ACCVIFG .
- . 5.6.
; . 514 <SMCLK
<952
; ACCVIE = NMIIE = OFIE = 0.
MOV #WDTPW+WDTHOLD,&WDTCTL ; WDT
DINT
;
L1 BIT #BUSY,&FCTL3
; BUSY
JNZ L1
;,
MOV #FWKEY+FSSEL1+FN0,&FCTL2 ;SMCLK/2

117

MSP430x1xxFamily

BUSY = 1

BUSY = 1

LOCK=1,

. 5-6. ,

MOV #FWKEY,&FCTL3
MOV #FWKEY+ERASE,&FCTL1
CLR &0FC10h
L2 BIT #BUSY,&FCTL3
JNZ L2
MOV #FWKEY+LOCK,&FCTL3
...
EINT

118

; LOCK
;
; ,
; S1
; BUSY
;,
;,
;LOCK
;
;WDT?
;

V.

5.3.3. -
, WRT BLKWRT 5.2.
5-2.
BLKWRT

WRT

, /, .
,
- /,
.
BUSY , ,
. , -, BUSY=1.
, ACCVIFG,
.
/
/
- . -,
-,
.
, . / . 5.7.

VCC

BUSY

t( ) = 33/f(FTG)

. 5-7. /

119

MSP430x1xxFamily

/ ,
. BUSY ,
- ,
ACCVIFG, .
/ -
, / -
. 5.8.

WRF = 1

WRT = 0, LOCK = 1,

. 5-8. / -

; / . 514 <SMCLK<952
;, 0FF1Eh
; ACCVIE = NMIIE = OFIE = 0.
MOV #WDTPW+WDTHOLD,&WDTCTL ;
;
DINT
MOV
MOV
MOV
MOV
MOV
MOV
...

;
#FWKEY+FSSEL1+FN0,&FCTL2 ;SMCLK/2
#FWKEY,&FCTL3
; LOCK
#FWKEY+WRT,&FCTL1
;
#0123h,&0FF1Eh
;0123h > 0FF1Eh
#FWKEY,&FCTL1
;. WRT
#FWKEY+LOCK,&FCTL3
; LOCK
;
; ?
EINT
;
120

V.

/
, /
. 5.9.

BUSY = 1

WRT = 1

BUSY = 1

WRT = 0, LOCK = 1

. 5-9. /

; / . 514 < SMCLK < 952

;, 0FF1Eh
; ACCVIE = NMIIE = OFIE = 0.
MOV #WDTPW+WDTHOLD,&WDTCTL ;
;
DINT
;
L1 BIT #BUSY,&FCTL3
; BUSY
JNZ L1
MOV #FWKEY+FSSEL1+FN0,&FCTL2 ;SMCLK/2
MOV #FWKEY,&FCTL3
; LOCK

121

MSP430x1xxFamily

MOV
MOV
BIT
JNZ

L2

#FWKEY+WRT,&FCTL1
#0123h,&0FF1Eh
#BUSY,&FCTL3
L2

MOV #FWKEY,&FCTL1
MOV #FWKEY+LOCK,&FCTL3
...
EINT

;
;0123h > 0FF1Eh
; BUSY
; ,
;
; WRT
; LOCK
;
; ?
;

- . 64 , 0xx00h, 0xx40h, 0xx80h 0xx0h 0xx3Fh, 0xx7Fh,
0xxBFh 0xxFFh, . 5.10.
- 64-.
xxFFh
xxC0h
xxBFh

xxFFh

xx00h

xx80h
xx7Fh
xx40h
xx3Fh

xx00h

. 5-10. -

-.
. BUSY . WAIT .
, WAIT . BLKWRT
. BLKWRT
t(end). BUSY ,
. . 5.11
.
122

V.
BLKWRT
, MOV #123h, &Flash

t(CPT) =< 3 , VCC

BUSY

t( , 0) = 30/f(FGT)

t( 163) = 20/f(FGT)

t( 163) = 20/f(FGT)

t() = 6/f(FGT)

WAIT

. 5-11.

. 5.12,
.
; , 0F000h.
; ; ,
- .
;514 < SMCLK < 952
; ACCVIE = NMIIE = OFIE = 0.
MOV #32,R5
;
;
MOV #0F000h,R6
;
MOV #WDTPW+WDTHOLD,&WDTCTL ;
;
DINT
;
L1 BIT #BUSY,&FCTL3
; BUSY
JNZ L1
; ,
;
MOV #FWKEY+FSSEL1+FN0,&FCTL2 ;SMCLK/2
MOV #FWKEY,&FCTL3
; LOCK
MOV #FWKEY+BLKWRT+WRT,&FCTL1 ;
;
L2 MOV Write_Value,0(R6)
;
;
L3 BIT #WAIT,&FCTL3
; WAIT

123

MSP430x1xxFamily

BUSY = 1

BLKWRT = WRT = 1

WAIT=0?

BLKWRT = 0

BUSY = 1

WRT = 0, LOCK = 1

. 5-12.
124

V.

JZ L3

; ,
; WAIT=0
INCD R6
;
DEC R5
;
JNZ L2
; ?
MOV #FWKEY,&FCTL1
; WRT,BLKWRT
L4 BIT #BUSY,&FCTL3
; BUSY
JNZ L4
; ,
;
MOV #FWKEY+LOCK,&FCTL3 ; LOCK
...
;
; ,
;
EINT
;
5.3.4. -
,
BUSY=1,
-. ,
ACCVIFG . ,
- WRT=0, ACCVIFG, - .
/
-,
03FFFh . 03FFFh
JMP PC. , . - BUSY=0,

.
-, BUSY=1 5.3.
5-3. - BUSY=1

WAIT

ACCVIFG = 1, 03FFFh

ACCVIFG = 1.

ACCVIFG = 0. CPU 03FFFh.

JMP PC.

125

MSP430x1xxFamily

WAIT

ACCVIFG = 1, LOCK = 1

ACCVIFG = 0, 03FFFh

ACCVIFG = 0.

ACCVIFG = 1, LOCK = 1

-.
-,
03FFFh .
JMP PC BUSY=1. -, 03FFFh,
.
5.3.5.

EMEX. EMEX
-. - ,
, FCTL1 . - .
5.3.6. -
FCTLx 16- /, .
-, 0A5h. FCTLx
, 0A5h ,
KEYV PUC.
FCTLx 096h.
FCTL1 / ACCVIFG.
FCTL1 , WAIT=1,
FCTL1 , WAIT=0 ACCVIFG.
FCTL2, BUSY=1 .
FCTLx , BUSY=1. .
126

 V.

5.3.7. -
: KEYV ACCVIFG.
ACCVIFG , . ACCVIE -, ACCVIFG .
ACCVIFG NMI, GIE ACCVIFG. , ACCVIFG , ,
. ACCVIFG .
KEYV ,
.
, PUC, .
5.3.8. -
- MSP430.
(ISP):
JTAG1


- JTAG
MSP430 JTAG-. JTAG (5 20 28 ), VCC nonRST/NMI.
JTAG- .
JTAG- . JTAG-
. . Programming a FlashBased MSP430 Using the JTAG Interface2 www.ti.com/sc/msp430.
- (BSL)
MSP430 -
BSL. -
UART3. MSP430 BSL 256- , 1

2
3

JTAG (Joint Test Automation Group) interface

MSP430 - JTAG-
UART (Universal Asynchronous Receiver / Transmitter) -

127

MSP430x1xxFamily

, .

()

UART,
Px.x,
SPI,
.

MSP430

 

. 5-13. ,

. . Features of the MSP430

Bootstrap Loader1 www.ti.com/sc/msp430.
-
MSP430 - , . 5.13. ,
MSP430
(UART, SPI .).
-. ,
,
, -.

5.4. -
- 5.4.
5-4. -

1
-
1

FCTL1

0128h

09600h PUC

MSP430

128

V.

5-4. ()

2
-

FCTL2

012Ah

09642h PUC

3
-

FCTL3

012Ch

09618h PUC

IE1

000h

PUC

FCTL1, -
15

14

13

12

11

10

MERAS

ERASE

rw 0

rw 0

r0

FRKEY, 096h
FWKEY, 0A5h

BLKWRT

WRT

rw 0

BLKWRT

WRT

r0

r0

FCTLx. 096h.
0A5h,
PUC.

.
WRT. BLKWRT
EMEX.
0
1

.
. WRT
EMEX.
0
1

MERAS
ERASE

r0

15-8

5-3
2

rw 0

FRKEY/FWKEY

. 0.
. . MERAS
ERASE ,
EMEX.

. 0.
129

MSP430x1xxFamily
MERAS

ERASE

FCTL2, -
15

14

13

12

11

10

rw 0

rw 1

FWKEYx, 096h
0A5h

FSSELx

rw 0

FNx

rw0

rw 1

rw0

rw0

rw0

FWKEY

FCTLx. 096h.
15-8 0A5h,
PUC.

FSSELx

7-6

00 ACLK
01 MCLK
10 SMCLK
11 SMCLK

5-0

.

. FNx+1. , FNx=00h,
1. FNx=02Fh,
64.

FNx

FCTL3, -
15

14

13

12

11

10

FWKEYx, 096h
0A5h

r0

130

r0

EMEX

LOCK

WAIT

ACCVIFG

KEYV

BUSY

rw 0

rw 1

r 1

rw 0

rw (0)

r(w)0

V.

FWKEY

15-8

FCTLx. 096h. 0A5h,

PUC.

7-6

. 0.

EMEX

0
1

. - . LOCK
/
,
. , LOCK , BLKWRT=WAIT=1, BLKWRT WAIT
.
0
1

WAIT

. , -.
0 - /.
1 - /.

ACCVIFG

0
1

KEYV

. ,
FCTLx
-
PUC. KEYV .
0 FCTLx
1 FCTLx

BUSY

.
.
0
1

LOCK

131

MSP430x1xxFamily

IE1, 1
7

ACCVIE

rw0

ACCVIE

132

7-6,
4-0

. .
.

-. ACCVIFG.
IE1
,
BIS.B BIC.B, MOV.B
CLR.B.
0
1

MSP430x1xxFamily

VI.

MSP430x1xxFamily

(SVS1). SVS MSP430x15x MSP430x16x.

6.1. SVS
(SVS) AVCC . SVS ,
POR,
, .
SVS :
AVCC;
POR;
SVS;
;
14 ;
.
- SVS . 6.1.

6.2. SVS
SVS AVCC . SVS POR
. BOR SVS , .
6.2.1. SVS
VLDx / SVS 14 (V(SYS_IT-)) AVCC. SVS ,
VLDx=0 , VLDx>0. SVSON SVS. / SVS , SVS.
VLDx=1111 SVSin. SVSin
, 1,2 .
6.2.2. SVS
, AVCC

1

SVS Supply Voltage Supervisor.

134

VI.
NMI
D
U
S
D
U
S

Tau ~ 50
G
VCC

TCK

VCC

VCC
G

P6.7/A7

~ 50us

1111

POR

1101

1100

t ~ 50

SVS

0011
0010

1.25V

0001
D
G

SVSFG

VLD

PORON

SVSON

SVSOP

SVSFG
SVSCTL

. 6-1. SVS

1,2 .
SVSFG.
PORON SVS.
PORON=1, SVSFG POR.
PORON=0, SVSFG,
POR.
SVSFG . , . SVSFG .
SVSFG, SVS.

135

MSP430x1xxFamily

6.2.3. VLDx
VLDx , SVS. SVS
SVSFG. td(SVSon) tsettle . 6.2.
td(SVSon) , VLDx , 50 . tsettle
VLDx
~12 . . .
VLDx

15
14

4
3
2
1
0
0

td(SVSon)

tsettle

15

tsettle

3
VLD

tsettle

SVSON
0

. 6-2. SVSON VLDx

SVS
, SVSON .
SVSON
SVS.
6.2.4. SVS
SVS
, AVCC
. SVS SVS/Brownout1
. 6.3.
1

Brownout - .

136

VI.

VLD>0

Vhys(SVS_IT )

AVCC
V (SVS_IT )
V ( SVS)

V hys(B_IT)

V (B_IT )
V CC()

Brownout

Brownout
1
0
SVSout
1

BrownOut

td(BOR)

td(BOR)

SVS

td(SVSon)

POR
1

td(SVSR)

. 6-3. SVS Brownout/

6.3. SVS
SVS 6.1.
6-1. SVS

SVS

SVSCTL

055h

POR

SVSCTL, SVS
7

VLDx

rw 0

VLDx

rw0

rw0

7-4

rw0

PORON

SVSON

SVSOP

rw0

0
SVSFG

rw0

. SVS
SVS. .
0000 SVS

137

MSP430x1xxFamily

VLDx

7-4

0001 1.9
0010 2.1
0011 2.2
0100 2.3
0101 2.4
0110 2.5
0111 2.65
1000 2.8
1001 2.9
1010 3.05
1011 3.2
1100 3.35
1101 3.5
1110 3.7
1111 SVSin
1.2

POR. SVSFG
POR.
0 SVSFG POR
1 SVSFG POR

SVSON

SVS. SVS.
SVS. SVS VLDx > 0.
0 SVS
1 SVS

SVSOP

SVS.
SVS.
0 SVS
1 SVS

SVS. . SVSFG

.
0
1

PORON

SVSFG

:
SVSCTL .
SVSCTL brownout-. SVSCTL
POR
RST/NMI ( ), , POR SVS.
138

MSP430x1xxFamily

VII.

MSP430x1xxFamily

. MSP430x14x MSP430x16x.

7.1.
MSP430. ,
. , .
:
;
;
;
;
1616 , 168 , 816 , 88 .
- . 7.1.
150

rw
MPY 130h
15

MPYS 132h
OP1

rw
OP2 138h

MAC 134h
MACS 136h
16 x 16

MPY = 0000

MACS MPYS

32
MAC
MPY, MPYSMAC, MACS

32

SUMEXT 13Eh
15

C
0

S
31

RESHI 13Ch

RESLO 13Ah

rw

rw

. 7-1. -
140

VII.

7.2.
,
,
. ,
.
16- OP1 OP2
RESLO, RESHI SUMEXT. RESLO
, RESHI ,
SUMEXT . 3 MCLK.
OP2. , . NOP .
7.2.1.
OP1 ,
7.1, .
,
- .
OP2 . OP2
, OP1 OP2.
RESLO, RESHI SUMEXT.

OP1, OP1 .
OP1 .
7-1. OP1
OP1

0130h

MPY

0132h

MPYS

0134h

MAC

0136h

MACS

7.2.2.
RESLO 16 . RESHI . RESHI 7.2.

141

MSP430x1xxFamily

7-2. RESHI

RESHI

MPY

16

MPYS

MSB .
15 . .

MAC

16

MACS

16 . .

SUMEXT
. SUMEXT
7.3.
7-3. SUMEXT

SUMEXT

MPY

SUMEXT 0000h

MPYS

SUMEXT
00000h
0FFFFh

MAC

SUMEXT
0000h
0001h

MACS

SUMEXT
00000h
0FFFFh

MACS
MACS. 0 7FFF FFFFh, 0FFF FFFh 8000
0000h. , . ,
.
SUMEXT : 0FFFFh
0000h .
.
142

 VII.

7.2.3.
.
88 ,
.B -,
.
; 16x16
MOV #01234h,&MPY
;
MOV #05678h,&OP2
;
;...
;
;8x8 . .
MOV.B #012h,&0130h
;
MOV.B #034h,&0138h
;
;...
;
;16x16
MOV #01234h,&MPYS
;
MOV #05678h,&OP2
;
;...
;
;8x8 . .
MOV.B #012h,&0132h
;
SXT &MPYS
;
MOV.B #034h,&0138h
;
SXT &OP2
;
;( )
;...
;
;16x16
MOV #01234h,&MAC
;
MOV #05678h,&OP2
;
;...
;
;8x8 . .
MOV.B #012h,&0134h
;
MOV.B #034h,&0138h
;
;...
;
;16x16
MOV #01234h,&MACS
;
MOV #05678h,&OP2
;
;...
;
;8x8 .
MOV.B #012h,&0136h
;
SXT &MACS
;
MOV.B #034h,R5
;
SXT R5
;
MOV R5,&OP2
;
;...
;

7.2.4. RESLO

, , ,

:

143

MSP430x1xxFamily
;
MOV #RESLO,R5
; RESLO R5
;
MOV &OPER1,&MPY
;
MOV &OPER2,&OP2
;
NOP
;
MOV @R5+,&xxx
; RESLO
MOV @R5,&xxx
; RESHI

7.2.5.
OP1, OP2, ,
.
, .
;
DINT

NOP

; DINT

MOV #xxh,&MPY
MOV #xxh,&OP2
EINT

;
;
;
;

7.3.
7.4.
7-4.

MPY

0130h

MPYS

0132h

MAC

0134h

MACS

0136h

144

OP2

0138h

RESLO

013Ah

RESHI

013Ch

SUMEXT

013Eh

 DMA

MSP430x1xxFamily

VIII.

MSP430x1xxFamily

DMA
DMA
. DMA.
DMA MSP430x15x MSP430x16x.

8.1. DMA
(DMA)
. , DMA
12 .
DMA . ,

/ .
DMA :
;
DMA;
MCLK;
, /;
65535 ;
;
/
;
;
, - .
- DMA . 8.1.

8.2. DMA
DMA . DMA.
8.2.1. DMA
DMA .
DMA . ,
0 ,
1 146

 DMA

VIII.
DMA0TSELx

JTAG

4
DMAREQ
TACCR2_CCIFG
TBCCR2_CCIFG
USART0
USART0
DAC12_0IFG
ADC12IFGx
TACCR0_CCIFG
TBCCR0_CCIFG
USART1
USART1



DMA1IFG
DMAE0

0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011

NMI
ENNMI

ROUNDROBIN

DMADSTINCRx
DMADSTBYTE

DMADTx
3

0 DMA
DMA0SA

DT

DMA0DA
DMA0SZ

1110
1111

DMASRSBYTE
DMASRCINCRx

DMAEN

DMA1TSELx
4
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011

DMA

DMAREQ
TACCR2_CCIFG
TBCCR2_CCIFG
USART0
USART0
DAC12_0IFG
ADC12IFGx
TACCR0_CCIFG
TBCCR0_CCIFG
USART1
USART1



DMA1IFG
DMAE0

0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1110
1111

DMA1SA

DT

DMA1DA
DMA1SZ
2

DMA2TSELx

DMAREQ
TACCR2_CCIFG
TBCCR2_CCIFG
USART0
USART0
DAC12_0IFG
ADC12IFGx
TACCR0_CCIFG
TBCCR0_CCIFG
USART1
USART1



DMA1IFG
DMAE0

DMADTx

1 DMA

1110
1111

DMADSTINCRx
DMADSTBYTE

DMASRSBYTE
DMASRCINCRx

DMADSTINCRx
DMADSTBYTE

DMAEN

DMADTx
3

2 DMA
DMA2SA

DT

DMA2DA
DMA2SZ
2

DMASRSBYTE
DMASRCINCRx

DMAEN

DMAONFETCH

. 8-1. - DMA

. . 8.2.
:
;
;
;
.

147

MSP430x1xxFamily

DMA

DMA

DMA

DMA

. 8-2. DMA

DMASRCINCRx DMADSTINCRx. DMASRCINCRx ,
, . DMADSTINCRx , , .
: -, -, - -. -,
-. -,
- , .
148

 DMA

VIII.

8.2.2. DMA
DMA ,
DMADTx, 8-1. . , 0 , 1 - , 2 .
.
.
8-1. DMA
DMADTx

000

001

010, 011

100

101

110, 111

. DMAEN

, DMAxSZ.

. DMAEN

.

.
DMAEN .

. DMAEN
.

. DMAEN
.

-- .

DMAEN .

/
.
. 8-3.

149

MSP430x1xxFamily
DMAEN = 0

DMAEN = 0
DMAREQ = 0
T_Size
DMAxSZ

DMAEN = 0

DMAEN = 1

DMAxSZ
DMAxSA
DMAxDA

[DMADTx = 1
DMAxSZ = 0]
DMAEN = 0

T_Size
T_SourceAdd
T_DestAdd

DMAABORT = 1

DMAREQ = 0

DMAABORT = 0

DMAxSZ > 0
DMAEN = 1

2 x MCLK

[+ DMALEVEL = 0 ]

[ = 1 DMALEVEL = 1]
,

/

[ENNMI = 1
NMI

[DMALEVEL = 1
= 0]

T_Size
DMAxSA
DMAxDA

DMAxSZ
T_SourceAdd
T_DestAdd

DMADTx = 4
DMAxSZ = 0
DMAEN = 1
DMAxSZ
T_SourceAdd
T_DestAdd

. 8-3. DMA

DMAxSZ ,
. DMADSTINCRx DMASRCINCRx ,
. DMAxSZ=0, .
DMAxSA, DMAxDA DMAxSZ . DMAxSA DMAxDA . DMAxSZ
. DMAxSZ , 150

 VIII.

DMA

DMAIFG. DMADTx=0, DMAEN ,

DMAxSZ
.
DMA
DMAEN=1,
.

. DMADTx=1, DMAEN .
, , .
. 8-4.
DMAxSZ ,
DMADSTINCRx DMASRCINCRx ,

. DMAxSZ=0, .
DMAxSA, DMAxDA DMAxSZ . DMAxSA DMAxDA . DMAxSZ
. DMAxSZ ,
, DMAIFG.
. 2MCLKDMASZ
.
.
DMAEN . .

-
- , .
2 MCLK / .
20% .
- 100%
, DMAEN . DMAEN

151

MSP430x1xxFamily
DMAEN = 0

DMAEN = 0
DMAREQ = 0
T_Size
DMAxSZ

DMAEN = 0

DMAEN = 1

DMAxSZ
DMAxSA
DMAxDA

[DMADTx = 1
DMAxSZ = 0]
DMAEN = 0

T_Size
T_SourceAdd
T_DestAdd

DMAABORT = 1

DMAREQ = 0
T_Size
DMAxSZ
DMAxSA
T_SourceAdd
DMAxDA
T_DestAdd

DMAABORT = 0

2 x MCLK

DMADTx = 5
DMAxSZ = 0
DMAEN = 1

[+ DMALEVEL = 0 ]

[ = 1 DMALEVEL = 1]
,

/

[ENNMI = 1
NMI

[DMALEVEL = 1
= 0]

DMAxSZ > 0

DMAxSZ
T_SourceAdd
T_DestAdd

. 8-4. DMA

- .
- ,
- , . - . 8-5.
DMAxSZ ,
DMADSTINCRx DMASRCINCRx ,

. DMAxSZ=0, .
DMAxSZ, DMAxDA DMAxSZ . DMAxSA DMAxDA 152

 DMA

VIII.
DMAEN = 0

DMAEN = 0
DMAREQ = 0
T_Size
DMAxSZ

DMAEN = 0

DMAEN = 1
DMAxSZ
DMAxSA
DMAxDA

[DMADTx = {2, 3}
DMAxSZ = 0]

DMAEN = 0

T_Size
T_SourceAdd
T_DestAdd

DMAABORT = 1

DMAABORT=0

2 x MCLK

[+ DMALEVEL = 0 ]

[ = 1 DMALEVEL = 1]
,

/

[ENNMI = 1
NMI

[DMALEVEL = 1
= 0]

DMAREQ = 0
T_Size
DMAxSZ
DMAxSA
T_SourceAdd
DMAxDA
T_DestAdd
DMAxSZ
T_SourceAdd
T_DestAdd

DMAxSZ > 0

4 /

2 x MCLK

DMAxSZ > 0

DMAxSZ > 0
[DMADTx = {6, 7}
AND DMAxSZ = 0]

(
2MCLK)

. 8-5. - DMA

153

MSP430x1xxFamily

. DMAxSZ
. DMAxSZ ,
DMAIFG.
- DMAEN -
- . - . ,
DMAEN NMI-, ENNMI. - 20% - .
8.2.3 DMA-
DMA DMAxTSELx 8-2.
DMAxTSELx , DMAEN
DMACTLx 0. DMA.
, ,
. , TACCR2
CCIFG , ,
TACCR2 CCIFG.

DMALEVEL=0, ,
. . - , - .

DMALEVEL=1, .
, DMAE0. DMA
, DMAEN .
-
.
154

 DMA

VIII.

- , DMA
,
DMA .
DMA ,
, , , .
DMALEVEL=1,
DMADTx={0, 1, 2, 3}, DMAEN
.

DMA
DMAONFETCH ,
DMA . DMAONFETCH=0, , . DMAONFETCH=1,
, DMA .
: DMAONFETCH ,
DMA .
DMA -,
DMAONFETCH .
.
8-2. DMA
DMAxTSELx

0000

DMAREQ DMA-. DMAREQ

, .

0001

, TACCR2 CCIFG. TACCR2

CCIFG , . TACCR2
CCIE , TACCR2 CCIFG .

0010

, TBCCR2 CCIFG. TBCCR2

CCIFG , . TBCCR2
CCIE , TBCCR2 CCIFG .

0011

, USART0 . I2C
, RXRDYIFG.
RXRDYIFG , ,
RXRDYIFG . RXRDYIE ,
. UART SPI ,
URXIFG0. URXIFG0 , . URXIE0 , URXIFG0 .

155

MSP430x1xxFamily

8-2. ()
DMAxTSELx

0100

, USART0 .
I2C ,
TXRDYIFG. TXRDYIFG , , TXRDYIFG .
TXRDYIE ,
. UART SPI ,
UTXIFG0. UTXIFG0 , .
UTXIE0 , UTXIFG0 .

0101

, DAC12_0CTL DAC12IFG.
DAC12_0CTL DAC12IFG , .
DAC12_0CTL DAC12IE , DAC12_0CTL DAC12IFG
.

0110

ADC12IFGx.
, ADC12IFGx .
, ADC12IFGx .
, ADC12IFGx .
ADC12IFGx .
ADC12IFGx , DMA ADC12MEMx.

0111

, TACCR0 CCIFG. TACCR0

CCIFG , . TACCR0
CCIE , TACCR0 CCIFG .

1000

, TBCCR0 CCIFG. TBCCR0

CCIFG , . TBCCR0
CCIE , TBCCR0 CCIFG .

1001

, URXIFG1. URXIFG1 , . URXIE1 ,

URXIFG1 .

1010

, UTXIFG1. UTXIFG1 , . UTXIE1 , UTXIFG1

.

1011

, .

1100

1101

1110

, DMAxIFG. DMA0IFG
1, DMA1IFG 2, DMA2IFG 0.
DMAxIFG , .

1111

DMAE0.

156

 DMA

VIII.

8.2.4. DMA-
DMA-:
, - NMI-, ENNMI DMACTL1.
-
DMAEN.
8.2.5. DMA
DMA- : DMA0-DMA1-DMA2.
, (, -
) , .
,
. , .
DMA- ROUNDROBIN.
ROUNDROBIN , , .
DMA0-DMA1-DMA2, :
DMA

DMA

DMA0 DMA1 DMA2

DMA1

DMA2 DMA0 DMA1

DMA2 DMA0 DMA1

DMA2

DMA0 DMA1 DMA2

DMA0 DMA1 DMA2

DMA0

DMA1 DMA2 DMA0

ROUNDROBIN , .
8.2.6. DMA-
DMA MCLK

- . /
MCLK
. DMA MCLK,
DMA MSP430
.
MCLK , , DMA
MCLK .
MCLK , DMA MCLK

157

MSP430x1xxFamily

DCOCLK
- . ,
MCLK.
DMA 8-3.
8-3. DMA-

DMA

MCLK=DCOCLK

4 MCLK

MCLK=LFXT1CLK

4 MCLK

LPM0/1

MCLK=DCOCLK

5 MCLK

LPM3/4

MCLK=DCOCLK

5 MCLK + 6 *

LPM0/1

MCLK=LFXT1CLK

5 MCLK

LPM3

MCLK=LFXT1CLK

5 MCLK

LPM4

MCLK=LFXT1CLK

5 MCLK + 6 *

* 6 DCOCLK. t(LPMx).

8.2.7. DMA
DMA .
. NMI-
DMA-, ENNMI.
DMA . - , DMA
.
8.2.8. DMA
DMA DMAIFG.
DMAIFG ,
DMAxSZ . DMAIE GIE , .
DMAIFG DMA, DAC12.
DMAIFG DAC12IFG,
. DMAIFG .
158

 VIII.

DMA

8.2.9. I2C DMA

I2C
DMA. I2C , I2C
.
TXDMAEN RXDMAEN
DMA I2C. RXDMAEN=1, DMA
I2C I2C. RXDMAEN=1, RXRDYIE RXRDYIFG
.
TXDMAEN=1, DMA I2C . TXDMAEN=1, TXRDYIE
TXRDYIFG .
8.2.10. 12 DMA
MSP430 DMA ADC12MEMx .
DMA
. DMA 12 MSP430 ,
.
DMA ADC12IFGx.
CONSEQx={0,2}, ADC12IFGx ADC12MEMx, , DMA . CONSEQx={1, 3}, ADC12IFGx
ADC12MEMx DMA . ADC12IFGx , DMA
ADC12MEMx.
8.2.11. 12 DMA
MSP430 DMA DAC12_xDAT. DMA
. DMA
12 MSP430 , .
, , DMA
12. , , , . DMA

159

MSP430x1xxFamily

12 , . DAC12IFG
DAC12_xCTL , DMA
DAC12_xDAT.

8.3. DMA
DMA 8-4.
8-4. DMA

0 DMA

DMACTL0

0122h

1 DMA

DMACTL1

0124h

0 DMA

DMA0CTL

01E0h

POR

POR

POR

0 DMA

0 DMA

0 DMA

DMA0SA

01E2h

DMA0DA

01E4h

DMA0SZ

01E6h

1 DMA

DMA1CTL

01E8h

POR

1 DMA

1 DMA

1 DMA

DMA1SA

01EAh

DMA1DA

01ECh

DMA1SZ

01EEh

2 DMA

DMA2CTL

01F0h

POR

DMA2SA

01F2h

DMA2DA

01F4h

DMA2SZ

01F6h

2 DMA

2 DMA

2 DMA

DMACTL0, 0 DMA
15

14

13

12

11

rw-(0)

160

rw-(0)

rw-(0)

10

DMA2TSELx
rw-(0)

rw-(0)

rw-(0)

rw-(0)

rw-(0)

 DMA

VIII.
7

DMA1TSELx
rw-(0)

rw-(0)

DMA2TSELx

DMA1TSELx
DMA0TSELx

rw-(0)

DMA0TSELx
rw-(0)

rw-(0)

rw-(0)

rw-(0)

rw-(0)

15-12
DMA.
DMA-.
0000 DMAREQ ( )
0001 TACCR2 CCIFG
0010 TBCCR2 CCIFG
0011 URXIFG0 ( UART/SPI), USART0
( I2C)
0100 UTXIFG0 ( UART/SPI),
USART0 ( I2C)
0101 DAC12IFG DAC12_0CTL
0110 ADC12IFGx ADC12
11-8
0111 TACCR0 CCIFG
1000 TBCCR2 CCIFG
1001 URXIFG
11010 UTXIFG
11011
1100
1101
1110 DMA0IFG 1 DMA
DMA1IFG 2 DMA
DMA2IFG 0 DMA
1111 DMAE0
7-4 DMA2TSELx
3-0 DMA2TSELx

DMACTL1, 1 DMA
15

14

13

12

11

10

r0

r0

r0

r0

r0

r0

r0

r0

ROUND
ROBIN

ENNMI

rw-(0)

rw-(0)

DMA
ONFETCH

r0

r0

r0

r0

r0

rw-(0)

15-3

DMAONFETCH

. . 0.
DMA
0 DMA
1 DMA

161

MSP430x1xxFamily

ROUNDROBIN

ENNMI

DMA.
0 DMA :
DMA0-DMA1-DMA2
1 DMA
NMI. DMA NMI. NMI
DMA , ,

DMAABORT.
0 NMI DMA .
1 NMI DMA .

DMAxCTL, DMA x
15

14

13

12

DMADTx

11

10

DMADSTINCRx

DMASRCINCRx

rw-(0)

rw-(0)

rw-(0)

rw-(0)

rw-(0)

rw-(0)

rw-(0)

rw-(0)

DMAREQ
rw-(0)

DMA
DMA
DSTBYTE SRCBYTE
rw-(0)

rw-(0)

DMADTx

DMADSTINCRx

162

DMA
LEVEL

DMAEN

DMAIFG

DMAIE

DMA
ABORT

rw-(0)

rw-(0)

rw-(0)

rw-(0)

rw-(0)

15

DMA.
000
001
010 -
14-12 011 -
100
101
110 -
111 -
DMA .

.
DMADSTBYTE=1, / . DMADSTBYTE=0,
/ 2.
11-10 DMAxDA
. DMAxDA
.
00
01
10
11

 DMA

VIII.

DMASRCINCRx

9-8

DMADSTBYTE

DMASRCBYTE

DMALEVEL

DMAEN

DMAIFG

DMAIE

DMAABORT

DMAREQ

DMA .

.
DMASRCBYTE=1, /
. DMASRCBYTE=0,
/ 2. DMAxSA

. DMAxSA .
00
01
10
11
DMA . : .
0 .
1 .
DMA . :
.
0 .
1 .
DMA.
: .
0 ( )
1 ( )
DMA
0
1
DMA
0
1
DMA
0
1
DMA . , DMA
NMI .
0 DMA
1 DMA NMI
DMA. DMA.
DMAREQ .
0 DMA
1 DMA

DMAxSA, DMA
15

14

13

12

11

10

rw

rw

rw

DMAxSAx
rw

rw

rw

rw

rw

163

MSP430x1xxFamily
7

rw

rw

rw

rw

DMAxSAx
rw

rw

rw

15-0

DMAxSAx

rw

DMA .
DMA
.
- .

DMAxDA, DMA
15

14

13

12

11

10

DMAxDAx
rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

DMAxDAx

15-0

DMAxDAx

DMA .

. DMAxDA
- .

DMAxSZ, DMA
15

14

13

12

11

10

DMAxSZx
rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

DMAxSZx
rw

DMAxSZx

164

rw

rw

15-0

rw

() DMA. DMA
/ .
DMAxSZ
. DMAxSZ ,

.
00000h
00001h
00002h
.
.
0FFFFh 65535

MSP430x1xxFamily

IX.

MSP430x1xxFamily

/
/.
P1-P2 MSP430x11xx. 1-3 MSP430x12xx. 1-6
MSP430x14, MSP430x15x MSP430x16x.

9.1. /
MSP430 6 / 1
6. 8 /. /
.
1 2 . / 1 2 ,
. / 1 , / 2
.
/ :
/;
;
1 2;
.

9.2. /
/
. /
.
9.2.1. PxIN
PxIN
/, /.
= 0: ;
= 1: .
: PxIN
.
166

 IX.

9.2.2. PxOUT
PxOUT ,
/,
/ .
= 0: ;
= 1: .
9.2.3. PxDIR
PxDIR /,
. PxDIR /,
, .
= 0: ;
= 1: .
9.2.4. PxSEL
. .
. PxSEL ,
/ .
= 0: /
= 1:
PxSEL=1
.
PxDIR ,
.
; ACLK P2.0 MSP430F11x1
BIS.B #01h,&P2SEL ; ACLK
BIS.B #01h,&P2DIR ;
;()
: 1 2 PxSEL=1
- P1SELx P2SELx , .
1 2, P1IE P2IE.
,
. PxSELx=1, . , PxSELx=0,

167

MSP430x1xxFamily

,
PxSELx.
9.2.5. 1 2
1 2 ,
PxIFG, PxIE PxIES. 1
, 2
. 1 2 PxIFG.
1IFG, 2IFG
PxIFG /, ,
. PxIFG , PxIE GIE.
PxIFG . PxIFG,
- .
= 0:
= 1:
, . PxIFG
Px RETI
Px, PxIFGx
. , , .
: PxIFG PxOUT PxDIR
P1OUT, P1DIR, P2OUT P2DIR P1IFG P2IFG.
: /

, , 1,5 MCLK , .
P1IES, P2IES
PxIES ,
/.
= 0: PxIFG ;
168

IX.

= 1: PxIFG .
: PxIESx
P1IES P2IES
.
PxIESx

PxINx

01
01
10
10

0
1
0
1

PxIFGx

P1IE, P2IE
PxIE PxIFG.
= 0:
= 1:
9.2.6.
/
/, .
PxOUT , . .
,
.

9.3. /
1 2 . 3-6.
/ 9-1.
9-1. -.

P1

P1IN

020h

P1OUT

021h

P1DIR

022h

PUC
PUC

P1IFG

023h

P1IES

024h

P1IE

025h

PUC

P1SEL

026h

PUC

169

MSP430x1xxFamily

9-1. ( )

P2

029h

02Ah

PUC

P2IFG

02Bh

PUC

P2IES

02Ch

P2IE

02Dh

PUC

P2SEL

02Eh

PUC

P3IN

018h

P3OUT

019h

P3DIR

01Ah

PUC

P3SEL

01Bh

PUC

P4IN

01Ch

P4OUT

01Dh

P4DIR

01Eh

PUC

P4SEL

01Fh

PUC

P5IN

030h

P5OUT

031h

P5DIR

032h

PUC

P5SEL

033h

PUC

P6IN

034h

P6OUT

035h

P6DIR

036h

PUC

P6SEL

037h

PUC

170

P2DIR

P6

P2OUT

P5

028h

P4

P2IN

P3

MSP430x1xxFamily

X.

MSP430x1xxFamily

16- , , .
.
MSP430x1xx.

10.1.
(WDT)

. ,
. ,
.
:



WDT
nonRST/NMI


WDT . 10-1.
:
PUC, WDT ~32
DCOCLK. WDT .

10.2.
WDT WDTCTL
. WDTCTL nonRST/NMI. WDTCTL
16-, /.
-, 05Ah . WDTCTL
, 05Ah
172

X.

. 10-1. -

PUC
. WDTCTL 069h.
10.2.1.
(WDTCNT) 16- , . WDTCNT
WDTCTL.
WDTCNT ACLK SMCLK. WDTSSEL.
10.2.2.
PUC, WDT ~32 DCOCLK.

173

MSP430x1xxFamily

, WDT ,
PUC. WDT , WDTCTL

PUC. PUC WDT
nonRST/NMI .
10.2.3.
WDTTMSEL 1 .
. WDTIFG
. PUC
,
WDTIFG WDTIE .
WDTIE GIE , WDTIFG . WDTIFG , , .

.
:
WDT WDTCNTCL=1 , PUC . WDT .
10.2.4.
WDT SFR .
WDT, WDTIFG, IFG1.0
WDT, WDTIE, IE1.0
WDT , WDTIFG . WDTIFG , . ,
,
. WDTIFG ,
.
174

 X.

WDT , WDTIFG
WDT, WDTIE GIE.
, .
WDTIFG ,
.
10.2.5.
MSP430 .
.
, WDT
. , WDT SMCLK ,
3- , SMCLK
LPM3 WDT .
, WDTHOLD WDTCNT, .
10.2.6.
WDTCTL - 05Ah (WDTPW) :
;
MOV #WDTPW+WDTCNTCL,&WDTCTL
;
;
MOV #WDTPW+WDTCNTL+SSEL,&WDTCTL
;
;
MOV #WDTPW+WDTHOLD,&WDTCTL
;
; WDT clock/8192
MOV #WDTPW+WDTCNTCL+WDTTMSEL+WDTIS0,&WDTCTL

175

MSP430x1xxFamily

10.3.
10-1.
10-1. .

WDTCTL

0120h

06900h PUC

SFR 1

IE1

0000h

PUC

SFR 1

IFG1

0002h

PUC1

1) WDTIFG POR
WDTCTL,
15

14

13

12
11
10
069h
WDTPWx, 05Ah
5

WDTHOLD WDTNMIES WDTNMI WDTTMSEL WDTCNTCL WDTSSEL

rw0

WDTPWx

WDTHOLD

WDTNMIES

176

rw0

r0(w)

rw0

WDTISx

rw0

rw0

rw0

rw 0

15-8

. 069h. 05Ah, PUC.

.
. WDTHOLD=1, WDT , .
0
1

NMI . NMI WDTNMI=1. NMI.

NMI WDTNMI=0.
0 NMI
1 NMI

X.

WDTNMI

NMI .
nonRST/NMI.
0
1 NMI

WDTTMSEL

0
1

WDTCNTCL

. WDTCNTCL=1
0000h. WDTCNTCL
.
0
1 WDTCNT = 0000h

WDTSSEL

0 SMCLK
1 ACLK

WDTISx

1-0

.
,
WDTIFG / PUC.
00 /32768
01 /8192
10 /512
11 /64

IE1, 1
7

NMIIE

NMIIE

WDTIE

rw 0

rw 0

7-1

. . .

NMI. NMI.
IE1
, BIS.B BIC.B, MOV.B CLR.B.
0
1

177

MSP430x1xxFamily

WDTIE

.
WDTIFG . . IE1 ,

BIS.B BIC.B, MOV.B CLR.B.
0
1

IFG1, 1
7

NMIIFG

WDTIE

178

NMIIFG

WDTIFG

rw 0

rw 0

7-1

. . .

NMI. NMIIFG .
IFG1
, WDTIFG BIS.B
BIC.B, MOV.B CLR.B.
0
1

. WDTIFG
.
WDTIFG
.
IE1 ,
BIS.B BIC.B, MOV.B CLR.B.
0
1

MSP430x1xxFamily

XI.

MSP430x1xxFamily

16- / /. .
MSP430x1xx.

11.1.
16- / /
. /, .
.
/.
:
16- / ;
;
/;
;
() ;
.
- . 11-1.
:
. , . ,
.

11.2.
.
.
11.2.1. 16- -
16- / TAR, ( )
. TAR .
, .
180

XI.

TASSELx

IDx

MCx

150
TACLK
ACLK
SMCLK
INCLK

00
01
10
11

16
TAR

1/2/4/8

RC

EQU0
TAIFG

TACLR
CCR0
CCR1
CCR2

CCI2A
CCI2B
GND
VCC

CCISx

CMx

00
01
10
11

Logic

COV
SCS
150

0
1

CCR2
2

CCI
SCCI

EQU2

A
Y EN

CAP
0
1

TACCR2 CCIFG

OUT
EQU0

D Set Q

OUT2

Reset

POR
OUTMODx

. 11-1. -

TAR TACLR. TACLR /.

:
( , TACLR), .
TACLK , TAR , ,
. TAR .

181

MSP430x1xxFamily

TACLK ACLK, SMCLK
TACLK INCLK.
TASSELx. 2, 4 8
IDx. TACLK TACLR.
11.2.2.
:
, MCx > 0
/, 0 TACCR0.
TACCR0. .
11.2.3.
, 11-1: ,
, /. MCx.
11-1. .
MCx

00

01

TACCR0

10

11

0FFFFh
TACCR0
.

,
0FFFFh. ,
TACCR0, , .11-2. TACCR0+1.
TACCR0, , . ,
TACCR0, ,
.
182

XI.

0FFFFh
TACCR0

0h

. 11-2.

TACCR0 CCIFG ,
TACCR0. TAIFG ,
TACCR0 . . 11-3 .

CCR01

CCR0

0h

1h

CCR01

CCR0

0h

TAIFG

TACCR0 CCIFG

. 11-3.

TACCR0
TACCR0 ,
, .
, .
.

0FFFFh
, . 11-4. /
TACCR0 /.
0FFFFh

0h

. 11-4.

183

MSP430x1xxFamily

TAIFG , 0FFFFh
. . 11-5 .

FFFEh

0h

FFFFh

1h

FFFEh

FFFFh

0h

TAIFG

. 11-5.

. .
TACCRx . . 11-6
t0 t1, /
. , , . / .
,
TACCR0 . ,
TACCRx
TACCR1b
TACCR0b

TACCR1c
TACCR0c

TACCR0d

0FFFFh
TACCR1a

TACCR1d

TACCR0a

t0

t0

t1

t0

t1

t1

. 11-6.
184

XI.

TACCR0. TACCRx tx TACCR0, TACCR0 .

/
/ , 0FFFFh .
, TACCR0 , . 11-7.
TACCR0.
0FFFFh
TACCR0

0h

. 11-7. /

.
, .
, TACLR.
TACLR TAR TACLK.
/ TACCR0 CCIFG
TAIFG , 1/2 . TACCR0 CCIFG , TACCR0-1 TACCR0, TAIFG , 0001h 0000h. . 11-8 .

CCR01

CCR0

CCR01

CCR02

1h

0h

TAIFG

TACCR0 CCIFG

. 11-8. /

185

MSP430x1xxFamily

TACCR0
TACCR0 ,
. .
,
.
, , .
.
/
/ ,
(. ). , , , H- .
, .11-9 tdead :
tdead = ttimer (TACCR1 TACCR2), :
tdead ,
ttimer
0FFFFh
TACCR0
TACCR1
TACCR2
0h
""
6:
"/"
2:
"/"
EQU1
EQU1
EQU1
EQU1

TAIFG
TAIFG
EQU0
EQU0

EQU2
EQU2 EQU2
EQU2

. 11-9. /

186

XI.

TACCRx / x
TACCRx . ,
. , .
11.2.4. /
/
TACCRx. ()
.

, CAP=1.
. . CCIxA CCIxB
CCISx. CMx , :
, . . , :
TACCRx
CCIFG

CCI. CCIxA CCIxB MSP430x1xx . . .
. SCS
. SCS
. . 11-10.

n2

n1

n+1

n+2

n+3

n+4

CCI

TACCRx CCIFG

. 11-10. (SCS=1)

187

MSP430x1xxFamily

COV
TACCTLx

COV = 1

. 11-11.

/ ,
. , COV,
. 11-11. COV .

. CMx
. CCI=1 CCISO VCC GND, ,
CCISO :
MOV #CAP+SCS+CCIS1+CM_3,&TACCTLx
XOR #CCIS0,&TACCTLx

; TACCTLx
;TACCTLx = TAR

, CAP=0. -
. TAR TACCRx, :
188

XI.

CCIFG
EQU=1
EQUx
CCI SCCI
11.2.5.
/ .
, .. , -. , , EQU0 EQUx.

OUTMODx, 11-2. OUTx , 0. 2, 3, 6
7 0, EQUx=EQU0.
11-2. .
OUTMODx

000

OUTx OUTx.
OUTx
OUTx.

001

,
TACCRx.

.

010

,
TACCRx. ,
TACCR0.

011

,
TACCRx. ,
TACCR0.

100

,
TACCRx.
.

101

110

,
TACCRx. .

,
/ TACCRx. ,
TACCR0.

189

MSP430x1xxFamily

11-2. ()
OUTMODx

111

,
TACCRx. ,
TACCR0.

OUTx ,
TACCRx TACCR0 , .
TACCR0 TACCR1 . 11-12.
0FFFFh
TACCR0
TACCR1

0h
1:

2:
/
3:
/
4:

5:

6:
/
7:
/
EQU0
TAIFG

EQU1

EQU0
TAIFG

EQU1

EQU0
TAIFG

. 11-12.

190

XI.

OUTx , TACCRx
TACCR0, . TACCR0
TACCR1 . 11-13.
0FFFFh
TACCR0
TACCR1
0h
1:

2:
/
3:
/
4:

5:

6:
/
7:
/
TAIFG

EQU1

EQU0

TAIFG

EQU1

EQU0

. 11-13.

/
OUTx , TACCRx
, TACCR0,
. TACCR0 TACCR2 . 11-14.
:
OUTMODx
,
0. ,
0 NOR (-).

191

MSP430x1xxFamily
0FFFFh
TACCR0
TACCR2

0h
1:

2:
/
3:
/

4:

5:

6:
/
7:
/
TAIFG

EQU2
EQU2
EQU0
TAIFG

EQU2
EQU2
EQU0

. 11-14. /

7 :
BIS #OUTMOD_7,&TACCTLx
BIC #OUTMODx,&TACCTLx

; 7
;

11.2.6.
16- :
TACCR0 TACCR0 CCIFG
TAIV CCIFG TAIFG
CCIFG , TACCRx. CCIFG, TAR 192

XI.

TACCRx.
CCIFG. CCIFG ,
CCIE GIE.
TACCR0
TACCR0 CCIFG ,
. 11-15. TACCR0 CCIFG , TACCR0.

EQU0
CAP

Set

CCIE

IRQ,

Reset

POR

IRACC,

. 11-15. / TACCR0

TAIV
TACCR1 CCIFG, TACCR2 CCIFG TAIFG .
TAIV , .

TAIV (. ).

. TAIV.
TAIV
. ,
. , TACCR1
TACCR2 CCIFG , TAIV, TACCR1 CCIFG . RETI , TACCR2 CCIFG
.

193

MSP430x1xxFamily

, TAIV
TAIV .
TAIV
.

. ,
. :
/ TACCR0
11
/ TACCR1, TACCR2
16
TAIFG
14
; TACCR0 CCIFG.

CCIFG_0_HND
;
...
; 6
RETI
5
; TAIFG, TACCR1 TACCR2 CCIFG.
TA_HND
...
;
6
ADD &TAIV,PC ; 3
RETI ; 0:
5
JMP CCIFG_1_HND ; 2: TACCR1
2
JMP CCIFG_2_HND ; 4: TACCR2
2
RETI
; 6:
5
RETI
; 8:
5
TAIFG_HND
; 10: TAIFG
...
;
RETI
5
CCIFG_2_HND
; 4: TACCR2
...
;
RETI
;
5
CCIFG_1_HND
; 2: TACCR1
...
;
RETI
;
5

11.3.
11-3.
11-3. .

194

TACTL

0160h

POR

TAR

0170h

POR

XI.

11-3. ()

0 /

TACCTL0

0162h

POR

0 /

TACCR0

0172h

POR

1 /

TACCTL1

0164h

POR

1 /

TACCR1

0174h

POR

2 /

TACCTL2

0166h

POR

2 /

TACCR2

0176h

POR

TAIV

012Eh

POR

TACTL,
15

14

13

12

11

10

rw(0)

rw(0)

rw(0)

7
IDx
rw(0)

rw(0)

TASSELx

IDx

rw(0)

TASSELx

rw(0)

rw(0)

4
MCx

rw(0)

rw(0)

rw(0)

TACLR

TAIE

TAIFG

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

15-10

9-8

00 TACLK
01 ACLK
10 SMCLK
11 INCLK

7-6

.
.
00 /1
01 /2
10 /4
11 /8

195

MSP430x1xxFamily
. MCx=00h, , .
00 :
01 : TACCR0
10 : 0FFFFh
11 /: TACCR0,
0000h

MCx

5-4

TACLR

. TAR, IDx
. TACLR
.

TAIE

.
TAIFG.
0
1

TAIFG

0
1

TAR,
15

14

13

12

11

10

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

TARx
rw(0)

rw(0)

rw(0)

rw(0)

4
TARx

rw(0)

rw(0)

rw(0)

rw(0)

15-0 . TAR .

TARx

TACCTLx, /
15

14

13

12
CCISx

CMx

11

10

SCS

SCCI

CAP

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

r(0)

r(0)

rw(0)

CCIE

CCI

OUT

COV

CCIFG

rw(0)

rw(0)

rw(0)

rw(0)

OUTMODx
rw(0)

196

rw(0)

rw(0)

XI.

CMx

00
15-14 01 ()
10
11 ,

CCISx

/.
TACCRx. .
.
13-12
00 CCIxA
01 CCIxB
10 GND
11 VCC

SCS

.

.
0
1

SCCI

10

/.
CCI EQUx .

. . 0.

CAP

.
0
1

OUTMODx

7-5

. 2, 3, 6 7
TACCR0, EQUx=EQU0.
000 OUT
001
010 /
011 /
100
101
110 /
111 /

CCIE

/. CCIFG.
0
1

CCI

/.
.

. .
0,
.
0
1

OUT

197

MSP430x1xxFamily

COV

. ,
. COV
0
1

CCIFG

/
0
1

TAIV,
15

14

13

12

11

10

r0

r0

r0

r0

r0

r0

r0

r0

r0

r0

r0

r0

TARx

TAIVx
r(0)

r(0)

r0

15-0

TAIV

00h

02h

/ 1

TACCR1 CCIFG

04h

/ 2

TACCR2 CCIFG

06h

08h

0Ah

TAIFG

0Ch

0Eh

198

r(0)

MSP430x1xxFamily

XII.

MSP430x1xxFamily

16- /
/. . 3
( /) MSP430x13x
MSP430x15x. 7 ( /)
MSP430x14x MSP430x16x.

12.1.
16- / /.
/, - .
.
/.
:
16- /

/



- . 12-1.
:
. ,
. , .
12.1.1.
, :
8, 10, 12 16

TBCCRx
200

XII.
TBSSELx

IDx

MCx

150
TBCLK
ACLK
SMCLK

00
01
10
11

16
RC
TBR
8 10 12 16

1/2/4/8

CNTLx

TBCLR

TBCLGRPx

00
01
10
11

CCI6A
CCI6B
GND
VCC

CCISx

CMx

00
01
10
11

Logic

CLLDx

VCC
TBR=0
EQU0
/

00
01
10
11

TBIFG

CCR0
CCR1
CCR2
CCR3
CCR4
CCR5
CCR6

COV
SCS
150

0
1

TBCCR6

CCI

EQU0

TBCL6

CCR5
CCR4
CCR1

EQU6

CAP
0
1

TBCCR6 CCIFG

OUT
EQU0

OUTMODx

D Set Q

OUT6

Reset

POR

. 12-1. -

()
SCCI .

12.2.
.

201

MSP430x1xxFamily

12.2.1. 16-
16- / TBR ( )
. TBR . , .
TBR TBCLR. TBCLR

/.
:

( , TBCLR)
.
TBCLK , TBR
, . TBR .
TBR
8, 10, 12 16- CNTLx. TBR(max)
0FFh, 03FFh, 0FFFh 0FFFFh.
, TBR 8-, 10- 12- .

TBCLK ACLK,
SMCLK , TBCLK INCLK.
TBSSELx.
2, 4 8
IDx. TBCLK TBCLR.
12.2.2.
:
, MCx > 0
/,
TBCL0.
TBCL0.
.

202

XII.

12.2.3.
, 12-1: ,
, /. MCx.
12-1. .
MCx

00

01

TBCL0

10

, TBCNTLx.

11

TBCL0
.

,
TBR(max). TBCL0, ,
. 12-2. TBCL0+1. TBCL0, .
, TBCL0, .
TBR(max)
TBCL0

0h

. 12-2.

TBCCR0 CCIFG ,
TBCL0. TBIFG ,
TBCL0 . . 12-3 .
TBCL0
TBCL0 , TBCL0
,

203

MSP430x1xxFamily

TBCL01 TBCL0

0h

1h

TBCL01 TBCL0

0h

TBIFG

TBCCR0 CCIFG

. 12-3.

, .
, . ,
.


TBR(max) , . 12-4. TBCL0 /.
TBR(max)

0h

. 12-4.

TBIFG , TBR(max)
. . 12-5 .

TBR(max)1

TBR(max)

0h

1h

TBR(max)1

TBR(max)

0h

TBIFG

. 12-5.

.
204

XII.

.
TBCLx . . 12-6
t0 t1, /. ,
.
( 3) ( 7)
/.
TBCL1b
TBCL0b

TBR (max)

TBCL1c
TBCL0c

TBCL1a

TBCL0d

TBCL1d

TBCL0a
0h
EQU0

EQU1

t0

t0

t1

t0

t1

t1

. 12-6.

,
TBCL0 . , .. TBCLx
TBCL0. TBCLx tx
TBCL0, TBCL0.
/
/ , TBR(max), .
TBCL0 , . 12-7.
TBCL0.
: TBCL0 > TBR(max)
TBCL0 > TBR(max), , . TBR(max) .
. ,

205

MSP430x1xxFamily

TBCL0

0h

. 12-7. /

. ,
TBCLR. TBCLR TBR TBCLK.
/ TBCCR0 CCIFG TBIFG , 1/2-
. TBCCR0 CCIFG , TBCL0-1 TBCL0, TBIFG ,
0001h 0000h. . 12-8 .
TBCL0
TBCL0

TBCL01

TBCL0

TBCL01 TBCL02

1h

0h

1h

TBIFG

TBCCR0 CCIFG

. 12-8. /

TBCL0,
.
.
, TBCL0, , .
, TBCL0, . ,
, .
206

XII.

/
/ ,
(.
). , , , H- .
, . 12-9 tdead :
CBR(max)
TBCL0
TBCL1
TBCL3
0h
""
6:
"/"
2:
"/"
EQU1
EQU1
EQU1
EQU1

TBIFG
TBIFG
EQU0
EQU0

EQU3
EQU3 EQU3
EQU3

. 12-9. /

tdead = ttimer (TBCL1 TBCL3), :

tdead , ;
ttimer ;
TBCLx .
.
12.2.4. /
/ TBCCRx
. .

, CAP=1.
.
. CCIxA CCIxB

207

MSP430x1xxFamily

CCISx. CMx , :
, . . , :
TBCCRx
CCIFG

CCI. MSP430x1xx , CCIxA CCIxB. . .
. SCS .
SCS .
. 12-10.

n2

n1

n+1

n+2

n+3

n+4

CCI

TBCCRx CCIFG

. 12-10. (SCS=1)

/ ,
. , COV,
. 12-11. COV .
,
. CMx .
CIS1=1 CCIS0 VCC GND, , CCISO
:
MOV #CAP+SCS+CCIS1+CM_3,&TBCCTLx
XOR #CCIS0,&TBCCTLx

208

; TBCCTLx
;TBCCTLx = TBR

XII.

COV
TBCCTLx

COV = 1

. 12-11.

, CAP=0.

. TAR TBCLx, :
CCIFG
EQU=1
EQU
TBCLx
TBCCRx TBCLx . TBCLx TBCCRx.
. TBCLx.
TBCCRx TBCLx.
TBCCRx TBCLx CLLDx 12-2.
12-2. TBCLx
CLLDx

00

TBCCRx TBCLx , TBCCRx.

01

TBCCRx TBCLx, TBR 0.

209

MSP430x1xxFamily
CLLDx

10

TBCCRx TBCLx, TBR 0

. TBCCRx TBCLx, TBR
TBCL0 0 /.

11

TBCCRx TBCLx, TBR

TBCLx.

TBCLGRPx.
CLLDx TBCCRx
, , TBCLGRP=3,
12-3. CLLDx, TBCCRx, . CLLDx TBCCRx ,
TBCCRx .
. -, ,
TBCCRx TBCCRx. -,
.
12-3.
TBCLGRPx

00

TBCL1 + TBCL2
TBCL3 + TBCL4
TBCL5 + TBCL6
TBCL1 + TBCL2 + TBCL3
TBCL4 + TBCL5 + TBCL6
TBCL0 + TBCL1 + TBCL2 +TBCL3
+ TBCL4 + TBCL5 + TBCL6

TBCCR1
TBCCR3
TBCCR5
TBCCR1
TBCCR4

01
10
11

TBCCR1

12.2.5.
/ .
, -. , ,
EQU0 EQUx. TBOUTH ()
. TBOUTH
. , .
210

XII.

OUTMODx,
12-4. OUTx , 0. 2, 3, 6 7
0, EQUx=EQU0.
12-4. .
OUTMODx
000

001

010

011

100

101

110

111

OUTx OUTx.

OUTx
OUTx.
,
TBCLx.

.
,
/ TBCLx. ,
TBCL0.
,
/
TBCLx. ,
TBCL0.
,

TBCLx.
.
,

TBCLx.
.
,
/ TBCLx. ,
TBCL0.
,
/
TBCLx. ,
TBCL0.

OUTx ,
TBCLx TBCL0 , .
TBCL0 TBCL1 . 12-12.

OUTx , TBCLx TBCL0,
. TBCL0 TBCL1
. 12-13.

211

MSP430x1xxFamily
TBR(max)
TBCL0
TBCL1

0h
1:

2:
/
3:
/
4:

5:

6:
/
7:
/
EQU0
TBIFG

EQU1

EQU0
TBIFG

EQU1

EQU0
TBIFG

. 12-12.

/
OUTx , TBCLx , TBCL0, .
TBCL0 TBCL3 . 12-14.
:
OUTMODx
, 0. , 0 NOR (-).

7 :
BIS #OUTMOD_7,&TBCCTLx
BIC #OUTMODx,&TBCCTLx

212

; =7
;

XII.
TBR(max)
TBCL0
TBCL1
0h
1:

2:
/
3:
/
4:

5:

6:
/
7:
/
TBIFG

EQU1

EQU0

TBIFG

EQU1

EQU0

. 12-13.

12.2.6.
16- :
TBCCR0 TBCCR0 CCIFG
TBIV CCIFG TBIFG
CCIFG , TBCCRx. CCIFG, TBR TBCLx.
CCIFG. CCIFG ,
CCIE GIE.
TBCCR0
TBCCR0 CCIFG B ,

213

MSP430x1xxFamily
TBR(max)
TBCL0
TBCL3

0h
1:

2:
/
3:
/

4:

5:

6:
/
7:
/
TBIFG

EQU3
EQU3
EQU0
TBIFG

EQU3
EQU3
EQU0

. 12-14. /

. 12-15. TBCCR0 CCIFG , TBCCR0.

EQU0
CAP

Set

CCIE

IRQ,

Reset

POR

IRACC,

. 12-15. TBCCR0 /
214

 XII.

TBIV
TBIFG TBCCRx CCIFG ( TBCCR0 CCIFG) . TBIV , .
( TBCCR0
CCIFG) TBIV (. ). .
TBIV.
: TBIV .
,
. , TBCCR1 TBCCR2
CCIFG , TBIV, TBCCR1 CCIFG . RETI, TBCCR2 CCIFG
.
, TBIV
TBIV .
TBIV
.

. ,
. :
/ CCR0
11
/ CCR1 CCR6
16
TBIFG
14
TBIV 3:
; TBCCR0 CCIFG.

CIFG_0_HND
...
; 6
RETI
5
; TBIFG, TBCCR1 TBCCR2 CCIFG.
TB_HND
$
;
6
ADD &TBIV,PC ; 3
RETI
; 0:
5
JMP CCIFG_1_HND ; 2: 1
2

215

MSP430x1xxFamily
JMP CCIFG_2_HND ; 4: 2
2
RETI
; 6
RETI
; 8
RETI
; 10
RETI
; 12
TBIFG_HND
; 14: TIMOV
...
;
RETI
5
CCIFG_2_HND
; 4: 2
...
;
RETI
;
5
; 1 ,
; :
; 5 , 9
;,
CCIFG_1_HND
; 6: 3
...
;
JMP TB_HND
;
2

12.3.
12-5.
12-5. .

0 /

0 /
1 /

1 /
2 /

2 /
3 /

3 /

216

TBCTL

0180h

POR

TBR

0190h

POR

TBCCTL0

0182h

POR

TBCCR0

0192h

POR

TBCCTL1

0184h

POR

TBCCR1

0194h

POR

TBCCTL2

0186h

POR

TBCCR2

0196h

POR

TBCCTL3

0188h

POR

TBCCR3

0198h

POR

XII.

TBCCTL4

018Ah

POR

TBCCR4

019Ah

POR

4 /

4 /
5 /

5 /
6 /

6 /

TBCCTL5

018Ch

POR

TBCCR5

019Ch

POR

TBCCTL6

018Eh

POR

TBCCR6

019Eh

POR

TBIV

011Eh

POR

TBCTL,
15

14

rw(0)
7

13

TBCLGRPx
rw(0)
6

CNTLx

rw(0)
4
MCx

rw(0)

TBCLGRP

11

rw(0)

rw(0)

10

CNTLx

rw(0)
5

IDx
rw(0)

12

8
TBSSELx

rw(0)
3

rw(0)
2

rw(0)
1

rw(0)
0

TBCLR

TBIE

TBIFG

rw(0)

w(0)

rw(0)

rw(0)

TBCLx
00 TBCLx
01 TBCL1+TBCL2 ( TBCCR1 CLLDx )
TBCL3+TBCL4 ( TBCCR3 CLLDx )
TBCL5+TBCL6 ( TBCCR5 CLLDx )
TBCL0
14-13 10 TBCL1+TBCL2+TBCL3 ( TBCCR1 CLLDx )
TBCL4+TBCL5+TBCL6 ( TBCCR4 CLLDx )
TBCL0
11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6
( TBCCR1 CLLDx )

00 16-, TBR(max) = 0FFFFh
12-11 01 12-, TBR(max) = 0FFFh
10 10-, TBR(max) = 03FFh
11 8-, TBR(max) = 0FFh
15

217

MSP430x1xxFamily


00 TBCLK
TBSSELx
9-8 01 ACLK
10 SMCLK
11 INCLK
.
.
00 /1
IDx
7-6
01 /2
10 /4
11 /8
. MCx=00h, , .
00 :
01 : TBCL0
MCx
5-4
10 : , TBCNTLx
11 /: TBCL0,
0000h


3
. TBR, IDx
. TBCLR TBCLR
2
.
.
TBIFG.
TBIE
1
0
1

0
TBIFG
0
1

10

TBR,
15

14

13

12

11

10

TBRx
rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

TBRx
rw(0)

TBRx

218

rw(0)

rw(0)

rw(0)

15-0 . TBR .

XII.

TBCCTLx, /
15

14

13

CMx
rw(0)

12
CCISx

rw(0)

rw(0)

OUTMODx
rw(0)

CMx

CCISx

SCS

CLLDx

CAP

OUTMODx

rw(0)

rw(0)

11

10

SCS
rw(0)

rw(0)

9
CLLDx

rw(0)

8
CAP

r(0)

rw(0)

CCIE

CCI

OUT

COV

CCIFG

rw(0)

rw(0)

rw(0)

rw(0)

00
15-14 01 ()
10
11 ,
/. TBCCRx. .
.
13-12 00 CCIxA
01 CCIxB
10 GND
11 VCC
.
.
11
0
1
. , .
00 TBCLx TBCCRx
10-9 01 TBCLx , TBR
10 TBCLx , TBR ( )
11 TBCLx , TBR TBCLx
.
0
8
1
. 2, 3, 6 7 TBCL0,
EQUx=EQU0.
000 OUT
001
010 /
7-5
011 /
100
101
110 /
111 /

219

MSP430x1xxFamily

CCIE

CCI

OUT

COV

CCIFG

/. CCIFG.
0
1
/.
.
. . 0, .
0
1
. , . COV .
0
1
/
0
1

TBIV,
15

14

13

12

11

10

r0

r0

r0

r0

r0

r0

r0

r0

r0

r0

r0

r0

TBIVx

15-0

TBIVx
r(0)

r(0)

TBIV

00h

02h

/ 1

TBCCR1 CCIFG

04h

/ 2

TBCCR2 CCIFG

06h

/ 3*

TBCCR3 CCIFG

08h

/ 4*

TBCCR4 CCIFG

0Ah

/ 5*

TBCCR5 CCIFG

0Ch

/ 6*

TBCCR6 CCIFG

0Eh

TBIFG

0
r(0)

r0

* MSP430x14x, MSP430x16x.

220

 USART,
UART

MSP430x1xxFamily

XIII.

MSP430x1xxFamily

USART, UART
/ (USART)
. UART.
USART0 MSP430x12xx, MSP430x13xx MSP430x15x.
USART0 MSP430x14x MSP430x16x
USART USART1.

13.1. USART: UART

USART MSP430
: URXD UTXD. UART
SYNC.
UART :
7- 8- /




LPMx


,

. 13-1 USART, UART.

13.2. USART: UART

UART USART , . USART. .
13.2.1. USART
USART PUC
SWRST. PUC SWRST ,
222

 USART, UART

XIII.

SWRST URXEx*URXEIE URXWIE

SYNC= 0

URXIFGx*

FE PE OE BRK

UxRXBUF

MM SYNC

RXERR RXWAKE

SSEL1 SSEL0 SP
UCLKI
ACLK
SMCLK
SMCLK

LISTEN

CHAR

PEV

PENA
UCLKS

00
01
10
11

SOMI

0
1

URXD

STE

/ UxBRx

UxMCTL
SP

CHAR

PEV

UTXD

PENA
1

WUT

TXWAKE

UxTXBUF

UTXIFGx*

SIMO

SYNC CKPH CKPL

SWRST UTXEx* TXEPT

UCLKI

STC

UCLK

* . SFR

. 13-1. - USART UART

USART . SWRST ,
URXIEx, UTXIEx, URXIFGx, RXWAKE, TXWAKE, RXERR, BRK, PE, OE, FE UTXIFGx TXEPT. URXEx
UTXEx SWRST. SWRST USART
. . USART, I2C USART0 I2C UART.
: USART
/ USART :

223

MSP430x1xxFamily

1) SWRST (BIS.B #SWRST,&UxCTL)

2) USART SWRST=1 (
UxCTL)
3) USART MEx SFRs (URXEx / UTXEx)
4) SWRST (BIC.B #SWRST,&UxCTL)
5) ( ) IEx SFRs (URXIEx /
UTXIEx)
USART.
13.2.2.
USART, . 13-2,
, , ,
( ) .

.
ST

D0

D6

D7

AD PA

SP

SP

[2 , SP = 1]
[ , PENA = 1]
[ , MM = 1]

[ ]

[8 , CHAR = 1]

. 13-2.

13.2.3.
,
.
, USART .

MM=0, . ,
. 13-3. ,
10 ()
. , .
224

 USART, UART

XIII.

UTXDx/URXDx
10

UTXDx/URXDx

UTXDx/URXDx

ST

SP ST

SP

ST

SP

.

10
10

. 13-3.

, ,
. RXWAKE
. ,
, UxRXBUF.
URXWIE . URXWIE ,
, UxRXBUF . ,
UxRXBUF URXIFGx. .
.
,
URXWIE .
URXWIE , . URXWIE USART.


UTXDx USART. (WUT) TXWAKE,
. UxTXBUF, WUT
TXWAKE, TXWAKE.

225

MSP430x1xxFamily

,
:
1) TXWAKE,
UxTXBUF. UxTXBUF (UTXIFGx=1).
TXWAKE WUT UxTXBUF
, .
WUT,
, ,
11 . , . TXWAKE
.
2) UxTXBUF. UxTXBUF
(UTXIFGx=1).
, , , UTXDx.
UxTXBUF TXWAKE
WUT . UTXDx.

MM=1, .
, (. . 13-4).
, ,
. USART RXWAKE , , UxRXBUF.
URXWIE . URXWIE ,
( 0) ,
UxRXBUF .
, UxRXBUF URXIFGx. .
, URXWIE . URXWIE
, (
1). URXWIE
USART.
226

 USART, UART

XIII.

UTXDx/URXDx

UTXDx/URXDx

UTXDx/URXDx

ST

1 SP ST

.
AD 1

0 SP

ST

0 SP

AD 0

. 13-4.

,
TXWAKE. TXWAKE ,
UxTXBUF , TXWAKE . TXWAKE . USART WUT
SWRST.

USART.
URXDx tt ( 300 c)
. .
.
URXDx tt,
. , USART URXDx.

.
USART , , ().
FE, PE, OE BRK.

227

MSP430x1xxFamily

RXERR.
13-1.
13-1.

( )
. ,
.
FE.

. ,
.
PE.

,
UxRXBUF . ,
OE.

()

10 ,
URXDx .
, BRK.
URXIFGx.

,
URXEIE=0, UxRXBUF. URXEIE=1, UxRXBUF
.
FE, PE, OE, BRK RXERR ,
UxRXBUF.
13.2.4. USART
URXEx URXDx, . 13-5. USART , , , . UxRXBUF ,
RX .
: (
URXEx): UART
(URXEx=0), (URXEx=1) ,
228

 USART, UART

XIII.

URXEx = 0

URXEx = 1

URXEx = 0

(
)

URXEx = 1

URXEx = 1
URXEx = 0

. 13-5.

URXDx.

(. URXWIE).
13.2.5. USART
USART , UTXEx. UxTXBUF.
TX BITCLK . . 13-6.
UTXEx , . UTXEx = 0

UTXEx = 1

(
UTXEx = 0
)

UTXEx = 1

UTXEx = 1

UTXEx = 0,

. 13-6.

UxTXBUF
, UTXEx , .

229

MSP430x1xxFamily

(UTXEx=1),
UxTXBUF, UTXIFGx=1. ,
.. TX.
(UTXEx=0)
.
(TXEPT=1). , UxTXBUF ,
, ,
. UTXEx
.
13.2.6. UART
() USART .
/ , . 13-7. .
USART USART
BRCLK.
15
SSEL1 SSEL0 N = 2

...

28

27

UxBR1
UCLKI
ACLK
SMCLK
SMCLK

00
01
10
11

...

20

UxBR0

8
8
16 R
Q15 ............
Q0

BRCLK

+0 1 (0 1)

FF

(  )

mX

m7

BITCLK

m0

UxMCTL

. 13-7. MSP430

. 13-8. .
N/2-1, N/2 N/2+1 BRCLK,
N BRCLKs BITCLK.
230

 USART, UART

XIII.

: (m=0)
(m= 1)

BRCLK

N/2 N/21 N/22

1
1

N/2
0

N/21 N/22
N/2 N/21

1
1

N/2
0

N/21
N/2

BITCLK
INT(N/2) + m(= 0)
INT(N/2) + m(= 1)

N.: INT(N/2)
N.: INT(N/2) + R(= 1)

m:
R: N/2

. 13-8. BITCLK

16-
. INT(N/2), N , 4 UxBR0
UxBR1. INT(N/2) ,
N BRCLK. BRCLK,
N:
N = BRCLK / ;
N , /.
, . N
:
1 n 1
N  UxBR    mi ,
n i 0

:
N ;
UxBR 16- UxBR0 UxBR1;
i ;
n ;
mi (1 0).
BITCLK
,

231

MSP430x1xxFamily
_ 

BRCKL

N

BRCLK
1 n 1
UxBR    mi
n i 0

. BRCLK, mi .
, .
,
, UxBR.
UxBR m0,
UxBR m1 .
. 8 , m0 .

. , ,

.
. .
8 , . ,
9- 0.

. .
:
:

baudrate 
[%]  
( j  1) UxBR 

 BRCLK 

n1

 mi

i 0


  ( j  1)


 100%,

baudrate ;
BRCLK : UCLKI, ACLK SMCLK;
j 0 , 1 D0 ..;
UxBR UxBR1 UxBR0.
, :
232

 XIII.

USART, UART

baudrate = 2400
BRCLK = 32768 (ACLK)
UxBR = 13, 13.65
UxMCTL = 6Bh: m7=0, m6=1, m5=1, m4=0, m3=1, m2=0, m1=1 m0=1.
UxMCTL.
 baudrate

_ _ [%]  
[(0 1) UxBR  1] 1 100%  2.54%
BRCLK



 baudrate

_ _ _ D0 [%]  
[(1 1) UxBR  2] 2 100 %  5.08 %
BRCLK


 baudrate

_ _ _ D1 [%]  
[(2  1) UxBR  2] 3 100 %  0.29 %
 BRCLK

 baudrate

_ _ _ D2 [%]  
[(3  1) UxBR  3]  4 100%  2.83%
 BRCLK

 baudrate

_ _ _ D3 [%]  
[(4  1) UxBR  3] 5 100%  1.95%
 BRCLK

 baudrate

_ _ _ D 4 [%]  
[(5  1) UxBR  4] 6 100%  0.59%
 BRCLK


 baudrate

_ _ _ D5 [%]  
[(6  1) UxBR  5] 7 100%  3.13%
BRCLK


 baudrate

_ _ _ D6 [%]  
[(7  1) UxBR  5] 8 100%  1.66%
 BRCLK

 baudrate

_ _ _ D7 [%]  
[(8  1) UxBR  6] 9 100%  0.88%
 BRCLK

 baudrate

_ _ [%]  
[(9  1) UxBR  7] 10 100%  3.42%
BRCLK


 baudrate

_ _ _ 1 [%]  
[(10  1) UxBR  7] 11 100%  1.37%
 BRCLK


,
5,08% BITCLK.

. . , USART. . 13-9
URXDx .

233

MSP430x1xxFamily
i
t ideal

0
t0

1
t1

1 2 3 4 5 6 7 8 9 10 111213 14 1 2 3 4 5 6 7 8 9 10 1112 1314 1 2 3 4 5 6

BRCLK
URXDx
URXDS
t actual

STD0D2
ST

D0D2

t0
0,5xBRCLK

t1

t2

URXDS
Int(UxBR/2)+m0 =
Int (13/2)+1 = 6+1 = 7

UxBR +m1 = 13+1 = 14

UxBR +m2 = 13+0 = 13

. 13-9.

tideal(0) tbaud rate, . tideal(i)

tbaud rate. :


n1  
 UxBR  

baudrate 


2 m0  int 
[%]  
   i UxBR   mi    1 j  100%,
BRCLK
2

 

 
i 1





:
baudrate ;
BRCLK , UCLK, ACLK
SMCLK;
j 0 , 1 D0 ..;
UxBR UxBR1 UxBR0.
, :
baudrate = 2400
BRCLK = 32768 (ACLK)
UxBR = 13, 13.65
UxMCTL = 6Bh: m7=0, m6=1, m5=1, m4=0, m3=1, m2=0, m1=1 m0=1.
UxMCTL.
234

 XIII.

USART, UART

 baudrate

[2 (1  6)  (0 UxBR  0)] 1  0  100%  2.54%
_ _ [%]  
 BRCLK

 baudrate

_ _ _ D0 [%]  
[2 (1  6)  (1 UxBR  1)] 1  1 100%  5.08%
 BRCLK


 baudrate

_ _ _ D1 [%]  
[2 (1  6 ) (2 UxBR  1)]  1  2  100%  0.29%
 BRCLK

 baudrate

_ _ _ D2 [%]  
[2 (1  6) (3 UxBR  2)] 1  3  100%  2.83%
BRCLK


 baudrate

[2 (1  6)  (4 UxBR  2)] 1  4  100%  1.95%
_ _ _ D3 [%]  
 BRCLK


 baudrate

_ _ _ D 4 [%]  
[2 (1  6)  (5 UxBR  3 )] 1  5  100%  0.59%
 BRCLK


 baudrate

_ _ _ D5 [%]  
[2 (1  6)  (6 UxBR  4 )] 1  6  100%  3.13%
 BRCLK

 baudrate

_ _ _ D6 [%]  
[2 (1  6)  (7 UxBR  4 )] 1  7  100%  1.66%
 BRCLK


 baudrate

_ _ _ D7 [%]  
[2 (1  6)  (8 UxBR  5)] 1  8  100%  0.88%
 BRCLK


 baudrate

_ _ [%]  
[2 (1  6)  (9 UxBR  6)] 1  9  100%  3.42%
 BRCLK

 baudrate

_ _ _ 1 [%]  
[2 (1  6)  (10 UxBR  6)] 1  10  100%  1.37%
 BRCLK


,
5,08% BITCLK.

UxBR UxMCTL 13-2 (ACLK) 32768 SMCLK 1048576 .

.

.

235

MSP430x1xxFamily

13-2. ,
.

UxBR0

UxMCTL

.
TX, %

.
RX, %

1B

03

-4/3

-4/3

03 69

FF

0/0.3

13.65 436.91

0D

6B

-6/3

-6/3

01 B4

FF

0/0.3

4800

6.83

218.45

06

6F

-9/11

-9/11

0 DA 55

0/0.4

9600

3.41

109.23

03

4A -21/12 -21/12

15

6D 03 -0.4/1

B:

UxBR1

.
RX, %

27.31 873.81

2400

A:

UxBR1

1200

UxBR0

.
RX, %

B: BRCLK = 1048576

.
TX, %

A: BRCLK = 32768
UxMCTL

19200

54.61

36 6B -0.2/2

38400

27.31

1B 03

-4/3

76800

13.65

0D 6B

-6/3

115200

9.1

09 08

-5/7

13.2.7. USART
USART .
USART
UTXIFGx
UxTXBUF . , UTXIEx GIE. UTXIFGx , UxTXBUF.
UTXIFGx PUC SWRST=1. UTXIEx PUC SWRST=1. . 13-10.
USART
URXIFGx UxRXBUF. ,
URXIEx GIE. URXIFGx URXIEx
PUC SWRST=1. URXIFGx , ( URXSE=0)
UxRXBUF. . 13-11.
URXEIE URXIFGx
. URXWIE 236

 USART, UART

XIII.

UTXIEx

Clear
PUC or SWRST

V CC

Set UTXIFGx
Q

Clear

SWRST
UxTXBUF
IRQA

. 13-10.

.
SYNC


URXSE
From URXD

URXS

Clear

PE
FE
BRK
URXEIE

URXIEx

S
URXIFGx

URXWIE
RXWAKE

Clear

SWRST
PUC
UxRXBUF
URXSE
IRQA

. 13-11.

URXIFGx:
URXEIE=0
, URXWIE=1
URXEIE=1, BRK URXIFGx.

237

MSP430x1xxFamily

URXSE
.
, BRCLK DCO, - . DCO .
URXSE, URXIEx GIE URXDx
, URXS. URXS
, URXIFGx .

URXIFGx .
URXIFGx=0, , URXIFGx=1,
( ).
(ISR) ,
,
URXSE BRCLK, ISR ,
. ISR , BRCLK ,
. URXSE URXS
. .
, .
BRCLK USART . UxRXBUF
URXIFGx . ISR
URXIFGx=1 , . URXIFGx , UxRXBUF.
;
; . BRCLK=DCO.
U0RX_Int
BIT.B #URXIFG0,&IFG2 ; URXIFGx
JNE ST_COND
; ?
MOV.B &UxRXBUF,dst
;
...
;
RETI
;
ST_COND
BIC.B #URXSE,&U0TCTL ; URXS
BIS.B #URXSE,&U0TCTL ;
;
BIC #SCG0+SCG1,0(SP) ; BRCLK = DCO
RETI
;

238

 USART, UART

XIII.

:
UART

, ,
BRCLK .

URXSE=1,
USART. URXDx tt ( 300 ) USART
, . 13-12. . .
URXDx

URXS
t

. 13-12. USART

tt URXDx
, USART , . 13-13. ,
USART .

URXDx

URXS
t

. 13-13. , USART

, BRCLK .

, BRCLK.

239

MSP430x1xxFamily

13.3. USART: USART

13-3 USART. 13-4 USART
USART1.
13-3. USART0

USART

U0CTL

070h

001h PUC

U0TCTL

071h

001h PUC

U0RCTL

072h

000h PUC

U0MCTL

073h

U0BR0

074h

U0BR1

075h

U0RXBUF

076h

U0TXBUF

077h

1 SFR*

ME1

004h

000h PUC

1
SFR*

IE1

000h

000h PUC

1 SFR*

IFG1

002h

082h PUC

* `12xx. .
.

13-4. USART1

USART

U1CTL

078h

001h PUC

U1TCTL

079h

001h PUC

U1RCTL

07Ah

000h PUC

U1MCTL

07Bh

240

 USART, UART

XIII.

U1BR0

07Ch

U1BR1

07Dh

U1RXBUF

07Eh

U1TXBUF

07Fh

2 SFR

ME2

005h

000h PUC

2
SFR

IE2

001h

000h PUC

2 SFR

IFG2

003h

000h PUC

: SFR
, IEx IFGx BIS.
B BIC.B MOV.B CLR.B.
UxCTL, USART
7

PENA

PEV

SPB

CHAR

LISTEN

SYNC

MM

SWRST

rw0

rw0

rw0

rw0

rw0

rw0

rw0

rw1

PENA

.
0
1 .
(UTXDx) (URXDx).
.

PEV

. PEV , .
00
01

. . .
0
1

SPB

241

MSP430x1xxFamily

CHAR

. 7- 8- .
0 7-
1 8-

LISTEN

. LISTEN .
0
1 . UTXDx .

SYNC

0 UART
1 SPI

MM

0
1

SWRST

0 . USART
1 . USART

UxTCTL, USART
7

CKPL

rw0

rw0

CKPL

SSELx

5-4

URXSE

TXWAKE

242

4
SSELx

rw0

rw0

URXSE

TXWAKE

TXEPT

rw0

rw0

rw0

rw1

.
.
0 UCLKI = UCLK
1 UCLKI = UCLK
.
BRCLK
00 UCLKI
01 ACLK
10 SMCLK
11 SMCLK
UART .
UART` .
0
1

0 -
1

 USART, UART

XIII.

TXEPT

0 UART / UxTXBUF
1 UxTXBUF
SWRST=1

UxRCTL, USART
7

FE

PE

OE

BRK

URXEIE

URXWIE

RXWAKE

RXERR

rw0

rw0

rw0

rw0

rw0

rw0

rw0

rw0

FE

0
1

PE

. PENA=0, PE 0.
0
1

OE

. , UxRXBUF
.
0
1

BRK

0
1

0 , URXIFGx
1 URXIFGx

URXWIE

.
URXIFGx , .
URXEIE=0, URXIFGx,
.
0 URXIFGx
1 URXIFGx

RXWAKE

0 -
1

. ,
(). RXERR=1,
(FE, PE, OE, BRK) . RXERR
, UxRXBUF .
0
1

URXEIE

RXERR

243

MSP430x1xxFamily

UxBR0, 0 USART
7
7

rw

rw

rw

rw

rw

rw

0
2

rw

rw

UxBR1, 1 USART
7
15

6
14

rw

rw

5
2

13

rw

4
2

12

rw

3
2

11

rw

2
2

10

rw

rw

rw

3 UxBR < 0FFFFh, UxBR = {UxBR1+UxBR0}.
UxBR < 3,
.

UxBRx

UxMCTL, USART
7

m7

m6

m5

m4

m3

m2

m1

m0

rw

rw

rw

rw

rw

rw

rw

rw

UxMCTLx

7-0

. BRCLK.

UxRXBUF, USART
7
7

0
0

7-0

.
UxRXBUF , RXWAKE
URXIFGx. 7- , UxRXBUF
(LSB), (MSB)
.

UxRXBUFx

244

2
r

 USART, UART

XIII.

UxTXBUF, USART
7
7

rw

rw

UxTXBUFx

rw

7-0

rw

rw

rw

0
2

rw

rw

,
UTXDx.
UTXIFGx. UxTXBUF 7- .

ME1, 1
7

UTXE0*

URXE0*

rw0

rw0

UTXE0*

URXE0*

USART0.
USART0.
0
1

USART0.
USART0.
0
1

5-0

. . .

* MSP430x12xx. . ME2 USART0

MSP430x12xx.

ME2, 2
7

UTXE1
rw0

7-6

URXE1

UTXE0**

URXE0**

rw0

rw0

rw0

. . .

245

MSP430x1xxFamily

UTXE1

USART1.
USART1.
0
1

URXE1

USART1. USART1.
0
1

3-2

. . .

UTXE0**

USART0.
USART0.
0
1

URXE0**

USART0. USART0.
0
1

** MSP430x12xx

IE1, 1
7

UTXIE0*

URXIE0*

rw0

rw0

UTXIE0*

URXIE0*

USART0. UTXIFG0.
0
1

USART0.
URXIFG0.
0
1

5-0

. . .

* MSP430x12xx. . IE2
USART0 MSP430x12xx.

246

 USART, UART

XIII.

IE2, 2
7

UTXIE1
rw0

URXIE1

UTXIE0**

URXIE0**

rw0

rw0

rw0

7-6

. . .

USART1. UTXIFG1.
0
1

USART1.
URXIFG1.
0
1

3-2

. . .

USART0. UTXIFG0.
0
1

USART0.
URXIFG0.
0
1

UTXIE1

URXIE1

UTXIE0**

URXIE0**

** MSP430x12xx

IFG1, 1
7

UTXIFG0*

URXIFG0*

rw1

rw0

UTXIFG0*

USART0. UTXIFG0 , U0TXBUF .

0
1

247

MSP430x1xxFamily

USART0. URXIFG0 ,
U0TXBUF .
0
1

5-0

. . .

URXIFG0*

* MSP430x12xx. . IFG2 USART0

MSP430x12xx.

IFG2, 2
7

UTXIFG1

URXIFG1

UTXIFG0**

URXIFG0**

UTXIFG1

URXIFG1

rw1

rw0

UTXIFG0** URXIFG0**
rw1

rw0

7-6

. . .

USART1. UTXIFG1 , U1TXBUF .

0
1

USART1. URXIFG1 ,
U1RXBUF .
0
1

3-2

. . .

USART0. UTXIFG0 , U0TXBUF .

0
1

USART0. URXIFG0 ,
U0RXBUF .
0
1

** MSP430x12xx

248

 USART,
SPI

MSP430x1xxFamily

XIV.

MSP430x1xxFamily

USART, SPI
/ (USART)

. SPI. USART0
MSP430x12xx, MSP430x13xx MSP430x15x. USART0, MSP430x14x MSP430x16x USART
USART1.

14.1. USART: SPI

USART MSP430 : SIMO, SOMI, UCLK STE. SPI ,
SYNC , I2C .
SPI :
7- 8-
SPI 3- 4-



UCLK
UCLK

. 14-1 USART, SPI.

14.2. USART: SPI

, . STE, , .
SPI:
SIMO ,
: SIMO
: SIMO
SOMI ,
: SOMI
: SOMI
250

 USART, SPI

XIV.

SWRST USPIEx*URXEIE URXWIE

SYNC= 1

FE PE OE BRK

UxRXBUF

RXERR RXWAKE

LISTEN

MM

SSEL1 SSEL0 SP
UCLKI
ACLK
SMCLK
SMCLK

URXIFGx*

CHAR

PEV

PENA
UCLKS

00
01
10
11

SYNC
1

SOMI

0
1

URXD

STE

/ UxBRx

UxMCTL
SP

CHAR

PEV

UTXD

PENA
1

WUT

TXWAKE

UxTXBUF

0
UTXIFGx*

SIMO

SYNC CKPH CKPL

SWRST USPIEx* TXEPT

UCLKI

STC

UCLK

* . SPR

. 14-1. - USART SPI

UCLK USART SPI

: UCLK
: UCLK
STE . 4- , .
3- .
4- :
STE , SIMO UCLK .
STE , SIMO UCLK .

251

MSP430x1xxFamily

4- :
STE , RX/TX SOMI .
STE , RX/TX
SOMI .
14.2.1. USART
USART PUC SWRST. PUC SWRST
, USART . , SWRST URXIEx, UTXIEx, URXIFGx, OE, FE UTXIFGx. USPIEx SWRST. USART
SWRST. . USART, I2C
USART0, I2C SPI.
: USART
/ USART
:
1) SWRST (BIS.B #SWRST,&UxCTL)
2) USART SWRST=1 (
UxCTL)
3) USART MEx SFRs (USPIEx)
4) SWRST (BIC.B #SWRST,&UxCTL)
5) ( ) IEx SFRs (URXIEx /
UTXIEx)
USART.
14.2.2.
. 14-2 USART 3- 4-
. USART , UxTXBUF. UxTXBUF
TX, TX ,
SIMO, . SOMI
,
. ,
RX UxRXBUF,
URXIFGx , RX/TX.
UTXIFGx , UxTXBUF TX UxTXBUF . RX/TX.
252

 USART, SPI

XIV.

UxRXBUF

SIMO

SPI

UxTXBUF

Px.x

STE

STE

SS
Port.x

SOMI

MSB
LSB
UCLK
MSP430 USART

MSB
LSB

SIMO

SOMI
(DSR)
LSB
MSB
SCLK
SPI

. 14-2. USART ,

USART ,
UxTXBUF, .
4- SPI
4- STE
. , STE
. STE :
SIMO UCLK
FE, ,
STE USART.
STE 3- .
14.2.3.
. 14-3 USART 3- 4- . UCLK SPI
.
. UxTXBUF TX UCLK SOMI. SIMO UCLK
UxRXBUF, . RX UxRXBUF,
URXIFGx, , . OE
,
UxRXBUF UxRXBUF.

253

MSP430x1xxFamily

SIMO

SPI

UxTXBUF

Px.x

STE

STE

SS
Port.x

SOMI
DSR
MSB

SIMO

SOMI

LSB

MSB
SCLK

UxRXBUF

LSB

MSB

LSB

UCLK

SPI

MSP430 USART

. 14-3. USART ,

4- SPI
4- STE SPI. STE
, . STE :
SIMO
SOMI
STE USART. STE 3- .
14.2.4. SPI
USPIEx / SPI
USART SPI. USPIEx=0, USART , .

USPIEx = 0

PUC

USPIEx = 1

(
USPIEx = 0 )

SWRST

USPIEx = 1

USPIEx = 1

USPIEx = 0,

. 14-4.
254

 USART, SPI

XIV.

PUC SWRST USART ,

.

USPIEx=0, UxTXBUF . , UxTXBUF , USPIEx=1
BRCLK. . 14-4 . 14-5 .
USPIEx = 0

UCLK

USPIEx = 1

(
USPIEx = 0 )

SWRST

USPIEx = 1

USPIEx = 1

PUC

USPIEx = 0

. 14-5.

SPI . 14-6
. 14-7. USPIEx=0, UCLK RX.
USPIEx = 0

USPIEx = 1

USPIEx = 0

PUC

UxTXBUF

(
)

USPIEx = 1

UxTXBUF

SWRST

USPIEx = 1

USPIEx = 0

. 14-6. SPI

14.2.5.
UCLK SPI . MM=1, BITCLK
USART UCLK,

255

MSP430x1xxFamily
UCLK

USPIEx = 0

USPIEx = 1
USPIEx = 0

(
)

USPIEx = 1

SWRST

USPIEx = 1

PUC
USPIEx = 0

. 14-7. SPI

. 14-8. MM=0, USART UCLK , ,

SSELx . SPI .
SSEL1 SSEL0 N = 215

...

28

27

UxBR1
UCLKI
ACLK
SMCLK
SMCLK

00
01
10
11

...
UxBR0

8
8
16 R
Q15 ............
Q0

BRCLK

20

(0 1)

FF
R

R

( . )
mX

m7

BITCLK

8 m0
UxMCTL

. 14-8. SPI

16- UxBR0+UxBR1
USART BRCLK. , BRCLK/2. USART SPI,
000h. UCLK :
= BRCLK/UxBR, UxBR = [UxBR1, UxBR0]

256

 USART, SPI

XIV.

UCLK
CKPL CKPH USART.
. 14-9.

CKPH CKPL
0

UCLK

UCLK

UCLK

UCLK
SIMO/
0

SOMI
1
SIMO/
SOMI

UxTXBUF

RX

MSB
MSB

LSB
LSB

. 14-9. USART SPI

14.2.6. SPI
SPI .
SPI
UTXIFGx ,
UxTXBUF . , UTXIEx GIE. UTXIFGx
,
UxTXBUF.
UTXIFGx PUC SWRST=1. UTXIEx PUC SWRST=1. . 14-10.
: UxTXBUF SPI
UxTXBUF, UTXIFGx=0 USPIEx=1
.
SPI
URXIFGx ,
UxRXBUF, . 14-11 14-12.

257

MSP430x1xxFamily
Q

UTXIEx

SYNC = 1

Clear
PUC SWRST

V CC

Set

UTXIFGx

Clear

SWRST

UxTXBUF
IRQA

. 14-10.

, URXIEx GIE. URXIFGx

URXIEx PUC SWRST=1.
URXIFGx , UxRXBUF . . 14-11 . 14-12.
SYNC


URXSE
URXD
PE
FE
BRK

SYNC = 1

URXS

Clear
URXIEx

(S)

URXEIE

URXIFGx

URXWIE
RXWAKE

Clear

SWRST
PUC
UxRXBUF
URXSE
IRQA

. 14-11.

14.3. USART: SPI

USART, 14-1 14-2, ,
.
258

 USART, SPI

XIV.
SWRST = 1

URXIFGx = 0
URXIEx = 0

USPIEx = 0

SWRST = 1
USPIEx = 0

PUC

GIE = 0
URXIFGx = 0

USPIEx = 1
URXIFGx = 1
URXIEx = 1
GIE = 1
GIE = 0

USPIEx = 1

. 14-12.

14-1. USART0

USART

U0CTL

070h

001h PUC

U0TCTL

071h

001h PUC

U0RCTL

072h

000h PUC

U0MCTL

073h

U0BR0

074h

U0BR1

075h

U0RXBUF

076h

U0TXBUF

077h

1
SFR*

ME1

004h

000h PUC

1 SFR*

IE1

000h

000h PUC

1
SFR*

IFG1

002h

082h PUC

* MSP430x12xx. . .

259

MSP430x1xxFamily

14-2. USART1

USART



0
1


2
SFR
2 SFR
2
SFR

U1CTL
U1TCTL
U1RCTL
U1MCTL

/
/
/
/

078h
079h
07Ah
07Bh

001h PUC
001h PUC
000h PUC

U1BR0

07Ch

U1BR1

07Dh

U1RXBUF
U1TXBUF

07Eh
07Fh

ME2

005h

000h PUC

IE2

001h

000h PUC

IFG2

003h

020h PUC

: SFR
, IEx IFGx BIS.B
BIC.B MOV.B CLR.B.
UxCTL, USART
7

rw0

rw0

7-6

I2C*

CHAR

LISTEN

260

I C*

CHAR

LISTEN

SYNC

MM

SWRST

rw0

rw0

rw0

rw0

rw0

rw1

I2C. I2C
SPI, SYNC=1.
0 SPI
1 I2C

0 7-
1 8-
. LISTEN
.
0
1 .
.

 USART, SPI

XIV.

0 UART
1 SPI

0 USART
MM
1
1 USART

0 . USART
SWRST
0
1 . USART
* USART0 MSP430x15x MSP430x16x.
SYNC

UxTCTL, USART
7

CKPH

CKPL

rw0

rw0

4
SSELx

rw0

rw0

rw0

rw0

STC

TXEPT

rw0

rw1

. UCLK.
0 UCLK
1 UCLK

.
0 ;
UCLK;
UCLK.
1 ;
UCLK;
UCLK.

SSELx

5-4

.
BRCLK
00 UCLK ( )
01 ACLK ( )
10 SMCLK ( )
11 SMCLK ( )

STC

.
0 4- SPI: STE
1 3- SPI: STE

TXEPT

. TXEPT
.
0 / UxTXBUF
1 UxTXBUF TX

CKPH

CKPL

261

MSP430x1xxFamily

UxRCTL, USART
7

FE

5
OE

rw0

rw0

rw0

rw0

rw0

rw0

rw0

rw0

FE

. ,
MM=1 STC=0. FE .
0
1 STC ,

OE

. , UxRXBUF
. OE , UxRXBUF , SWRST=1, .
0
1

UxBR0, 0 USART
7
7

rw

rw

rw

rw

rw

rw

0
2

rw

rw

UxBR1, 1 USART
7
15

6
14

rw

rw

262

5
2

13

rw

4
2

12

rw

3
2

11

rw

2
2

10

rw

rw

rw

 USART, SPI

XIV.

{UxBR1+UxBR0} .
SPI UxBR < 2.

UxBRx

UxMCTL, USART
7

m7

m6

m5

m4

m3

m2

m1

m0

rw

rw

rw

rw

rw

rw

rw

rw

UxMCTLx

SPI
000h.

7-0

UxRXBUF, USART
7
7

UxRXBUFx

. UxRXBUF
OE URXIFGx.
7- , UxRXBUF
,
.

7-0

UxTXBUF, USART
7
7

rw

rw

UxTXBUFx

rw

7-0

rw

rw

rw

rw

0
2

rw

. 7
, UxTXBUF.
. UxTXBUF UTXIFGx.

263

MSP430x1xxFamily

ME1, 1
7

USPIE0*
rw0

USPIE0*

. . .

USART0 SPI. SPI

USART0.
0
1

5-0

. . .

* MSP430x12xx. . ME2 USART0

MSP430x12xx.

ME2, 2
7

7-5

USPIE1

3-1

USPIE0**

USPIE1

USPIE0**

rw0

rw0

. . .
USART1 SPI. SPI
USART1.
0
1
. . .
USART0 SPI. SPI
USART0.
0
1

** MSP430x12xx

IE1, 1
7

UTXIE0*

URXIE0*

rw0

rw0

264

 USART, SPI

XIV.

USART0. UTXIFG0.
0
1

USART0.
URXIFG0.
0
1

5-0

. . .

UTXIE0*

URXIE0*

* MSP430x12xx. . IE2
USART0 MSP430x12xx.

IE2, 2
7

UTXIE1
rw0

URXIE1

UTXIE0**

URXIE0**

rw0

rw0

rw0

7-6

. . .

UTXIE1

USART1. UTXIFG1.
0
1

URXIE1

USART1.
URXIFG1.
0
1

3-2

. . .

UTXIE0**

USART0. UTXIFG0.
0
1

URXIE0**

USART0.
URXIFG0.
0
1

** MSP430x12xx

265

MSP430x1xxFamily

IFG1, 1
7

UTXIFG0*

URXIFG0*

rw1

rw0

USART0. UTXIFG0 , U0TXBUF .

0
1
USART0. URXIFG0 ,
U0RXBUF .
URXIFG0*
6
0
1
. . 5-0
.
* MSP430x12xx. . IFG2 USART0
MSP430x12xx.
UTXIFG0*

IFG2, 2
7

UTXIFG1

URXIFG1

rw1

rw0

7-6

UTXIFG1

URXIFG1

3-2

UTXIFG0**

URXIFG0**

UTXIFG0** URXIFG0**
rw1

rw0

. . .
USART1. UTXIFG1 , U1TXBUF .
0
1
USART1. URXIFG1 , U1RXBUF .
0
1
. . .
USART0. UTXIFG0 , U0TXBUF .
0
1
USART0. URXIFG0 , U0RXBUF .
0
1

** MSP430x12xx

266

 USART,
I2C

MSP430x1xxFamily

XV.

MSP430x1xxFamily

USART, I2C
/ (USART) I2C USART0.
I2C. I2C MSP430x15x
MSP430x16x.

15.1. I2C
(I2C)
MSP430 I2C-
I2C. , I2C / / USART 2- I2C-.
I2C :
I2C v2.1 Philips Semiconductor
/
7- 10-

//
/
/
/ /
100 400

FIFO

16-

LPMx

USART0
. 15-1 - I2.

15.2. I2C
I2 , I2. . 15-2 I2. I2
268

 USART, I2C

XV.

I2CEN

I2CSSELx

ACLK

SYNC = 1
2
IC=1

I2CBUSY

I C

00
01

SMCLK

10

SMCLK

11

I2CIN

I2CPSC

I2CSCLLOW

I2CSCLL

I2CCLK

SCL

I2CSCLH
R/W

MST
I2CTRX
LISTEN

I2CRXOVR

I2CSTP

1
I2CSTT

I2CSTB
0

I2CWORD

SDA

I2CSBD
I2CTXUDF
I2CDRW

I2COA

I2CNDATx

I2CRM

I2CSA

XA

. 15-1. - USART: I2C

. , I2, .
SCL. ,
, .
I2 (SDA) (SCK). SDA
SCL
.
: SDA SCL
SDA SCL
VCC MSP430.

269

MSP430x1xxFamily
V CC
V CC

MSP430

(SDA)

(SCL)

. 15-2. I2C

15.2.1. I2C
I2C USART. , USART0 I2C, SPI
UART. U0CTL UART.
I2C SYNC I2C. , I2C .
I2CEN I2C.
I2C
I2CEN=0, .
I2CEN=0 :
I2C ;
SDA SCL ;
I2CTCTL 3-0, 7-4 ;
I2CDCTL I2CDR;
;
U0CTL, I2CNDAT, I2CPSC, I2CSCLL, I2CSCLH ;
I2COA, I2CSA, I2CIE, I2CIFG I2CIV .
USART I2C UART SPI,
I2C, SYNC I2CEN, SWRST UART
SPI. .
: USART I2C
:
270

 USART, I2C

XV.

I2C:
1) I2C SWRST=1

(BIS.B #I2C + SUNC,&U0CTL)

2) I2C

(BIC.B #I2CEN,&U0CTL)
2

3) I C I2CEN=0;
4) I2CEN

(BIS.B #I2CEN,&U0CTL)

USART.
: USART
UART SPI:
USART UART
SPI I2C, :
1) I2C, SYNC I2CEN

(CLR.B &U0CTL);

2) SWRST

(MOV.B #SWRST,&U0CTL);

3)
UART SPI;

USART.
15.5.2. I2C
. I2C , .
, . 15-3.
SDA
MSB
SCL
1

(S)

8
9
R/W ACK

9
ACK

(P)

. 15-3. I2C

7- R/nonW. R/nonW=0, .
R/nonW=1, . ACK
9- SCL.

271

MSP430x1xxFamily

, . 15-3, .
SDA SCL.
SDA
SCL. I2CBB
.
SDA
SCL, . 15-4. SDA
, SCL ,
.

SDA

SCL

. 15-4. I2C

15.2.3. I2C
I2C 7- 10- .
7-
7- , . 15-5,
7- R/nonW. ACK
.
1
S

1
RW

1
ACK

1
ACK

1 1
ACK P

. 15-5. 7- I2C

10-
10- , . 15-6,
11110b 10-
R/nonW. ACK .
272

 USART, I2C

XV.

8 10- ,
ACK 8- .
1

1

R/W ACK

2

ACK

1 1
ACK P

1 1 1 1 0 X X

. 15-6. 10- I2C

SDA
,
. . , ,
R/nonW. . 15-7.
1
1
1
1 1
1
1
7
8
7
S R/W ACK ACK S R/W ACK
1
1

8
Data

ACK P

. 15-7. I2C

15.2.4. I2C
I2C , ,
.

I2CRM, I2CSTT I2CSTP, 15-1. . 15-8 . 15-9.
, SCL .
15-1.
I2CRM

I2CSTP

I2CSTT

I2C , .
.
I2CSTT. I2CNDAT .
,
I2CNDAT. I2CSTP
. .

273

MSP430x1xxFamily

15-1. ()
I2CRM

I2CSTP

I2CSTT

I2CNDAT .
I2CSTT .

, I2CNDAT.
I2CNDAT .
. I2CSTT .

I2CSTP.
,
255 .
I2CSTP
, I2CNDAT
, ,
I2CNDAT.
I2CSTP
,
.
, .

,
. . 15-10 . ,
SDA .
, ,
, . ,
. ,
, ALIFG.
, .
, SDA , , ,
. :



274

 USART, I2C

XV.

I2CSTT=1

* I2RM = 1, I2CSTP
I2CDR.
.

4 x I2CPSC
START
I2CBUSY

8 x I2CPSC
XA=1

I2CBB
I2CSTT
8 x SCL
XA=0

NACKIFG

8 x SCL

8 x SCL
60

R/W = 0
1

ACK

98

R/W = 0

Ack

Ack

I2CBUSY

70

Ack
I2CRM=0

I2CNDAT

I2CRM=1

I2CDR
I2CSTP=1

10 x I2CPSC

I2CDR ?*

8 x SCL

I2CDR

8 x I2CPSC

I2CDR

2
8 x SCL
Ack,
I2CWORD=0

I2CBB
Ack

Ack

8 x I2CPSC
I2CSTP, I2CMST

I2CDR
Ack

Ack

I2CBUSY
?
3

. 15-8.

275

MSP430x1xxFamily

I2CSTT=1

4 x I2CPSC

8 x I2CPSC

?
I2CBB
I2CSTT
XA = 1
8 x SCL

98

R/W = 0

XA = 0

Ack
8 x SCL
70

NACKIFG
4 x I2CPSC

8 x SCL

I2CBUSY

8 x SCL
98

R/W = 1

60

R/W = 1

Ack

Ack
1

I2CRM=0

Ack

8 x SCL

I2CNDAT
?

I2CRM=1

1 x SCL
Ack

8 x SCL

, I2CSTP=1
10 x I2CPSC

I2CWORD=0
8 x SCL

8 x I2CPSC
I2CBB

Ack
?

8 x I2CPSC
I2CSTP, I2CMST

I2CBUSY

. 15-9.

276

 USART, I2C

XV.

SCL

n
1

1

SDA
1

0
1

1
0

. 15-10.

I2CNDAT. I2CRM=0, I2CNDAT.
, ,
I2CNDAT.
: I2CNDAT
I2CNDAT, I2CBB=1
I2CRM=0. .

I2C. . 15-11 . 15-12.
SDA ,
. ,
SCL ,
.
, , , ,
R/W, . SDA , .

277

MSP430x1xxFamily

OAIFG

I2CDR
I2CDR ?

STTIFG
I2CBUSY
4 x I2CPSC

I2CBB
XA = 1
8 x SCL

8 x SCL
98

R/W = 0

60

R/W = 1

I2COA

I2COA

Ack

1 x SCL

Ack

Ack
I2CWORD=0

Ack

Ack
8 x SCL

1 x SCL

8 x SCL

XA = 0

8 x SCL
70

I2COA

1 x SCL

1 x SCL

OAIFG

8 x SCL

4 x I2CPSC

I2CBB
1

13 x I2CPSC
98

R/W = 1

I2CBUSY

NACKIFG

STTIFG

SDA?

"1"

. 15-11.

278

 USART, I2C

XV.

?
2

STTIFG
I2CBUSY

4 x I2CPSC
I2CBB
XA = 1

XA = 0

8 x SCL

8 x SCL
98

R/W = 0

60

R/W = 0

1 x SCL

8 x SCL

I2COA

I2COA
1 x SCL

70

I2CWORD=0

1 x SCL

8 x SCL

1 x SCL

8 x SCL

OAIFG

I2COA
?

1 x SCL

4 x I2CPSC
I2CBB
1 x I2CPSC
I2CBUSY

. 15-12.

279

MSP430x1xxFamily

, SCL , .
: I2CTRX
I2CTRX
15.2.5. I2CDR I2C
I2CDR 8- 16- ,
I2CWORD. I2CDR
15-2. I2CWORD=1, .
15-2. I2CDR
I2CWORD

I2CTRX

I2CDR

: .
.
,
I2CDR.
I2CDR , TXRDYIFG.

: .
.
,
I2CDR.
I2CDR , RXRDYIFG.

: ,
. .
,
I2CDR. I2CDR , TXRDYIFG.

: ,
. .
,

I2CDR. I2CDR ,
RXRDYIFG.

,
. , ,
I2C .
, I2CTXUDF. I2CDR
280

 USART, I2C

XV.

I2CEN I2CTXUDF. I2CTXUDF .

,
. , I2CRXOVR. ,
SCL ,
. I2CDR I2CEN
I2CRXOVR. I2CRXOVR .
15.2.6. I2C
I2C ,
I2CSSELx. I2CPSC I2CSCLH I2CSCLL SCL ,
. 15-13.
: I2CCLK
I2CIN
I2CPSC
I2CCLK
(I2CPSC + 1) (I2CSCLH + 1) (I2CPSC + 1) (I2CSCLL + 1)

. 15-13. SCL I2C

I2CIN I2C ,
, 10 SCL .
I2CSCLL I2CSCLH.
: U2CPSC
I2CPSC>4, .
SCL I2CSCLL
I2CSCLH.
. , SCL, ,
. SCL
. , SCL
. . 15-14

281

MSP430x1xxFamily

SCL
1

SCL
2

SCL

. 15-14. I2C

.
.
15.2.7. I2C
I2C MSP430 . I2C , MSP430.
I2C , . I2C ,
I2CBUSY=0 I2CIN I2C,
.
I2C , I2C , ,
. I2C .
I2C ,
.
I2C :
, I2CSTT=1 , I2C .
282

 USART, I2C

XV.

, ,
I2C .
STTIFG
SCL ,
. , I2C SCL .
I2C ,
, ,
, . , , SMCLK, ,
I2C SMCLK .
15.2.8. I2C
I2C , 15-3.
. , GIE , .
15-3. I2C

ALIFG

NACKIFG

. ,
I2C I2CBB=1. ALIFG ,
. ALIFG , MST I2CSTP
I2C .
. ,
, .

OAIFG

. , I2C. OAIFG .

ARDYIFG

. ,
, . , I2C .

RXRDYIFG

/ . ,
I2C . RXRDYIFG , I2CDR
. ,
I2CRXOVR=1. RXRDYIFG .

TXRDYIFG

/ . ,
I2C ( )
( ). TXRDYIFG
, I2CDR .
, I2CTXUDF=1. .

283

MSP430x1xxFamily

15-3. ()

GCIFG

. , I2C
(00h). GCIFG .

STTIFG

. ,
I2C .
MSP430
I2C, I2C. STTIFG
.

I2CIV
I2C . I2CIV , .
I2CIV,

. I2C I2CIV. RXDMAEN=1, RXRDYIFG
I2CIV TXDMAEN=1, TXRDYIFG
I2CIV, RXRDYIE TXRDYIE.
( ) I2CIV
.
, .
, I2CIV
I2CIV. I2CIV PC :
I2C_ISR
ADD &I2CIV, PC
RETI
JMP AL IFG_ISR
JMP NACKIFG_ISR
JMP OAIFG_ISR
JMP ARDYIFG_ISR
JMP RXRDYIFG_ISR
JMP TXRDYIFG_ISR
JMP GCIFG_ISR
STTIFG_ISR
...

284

;
; 0:
; 2: ALIFG
; 4: NACKIFG
; 6: OAIFG
; 8: ARDYIFG
; 10: RXRDYIFG
; 12: TXRDYIFG
; 14: GCIFG
; 16
; ( )

 USART, I2C

XV.
RETI
ALIFG_ISR
...
RETI
NACKIFG_ISR
...
RETI
OAIFG_ISR
...
RETI
ARDYIFG_ISR
...
RETI
RXRDYIFG_ISR
...
RETI
TXRDYIFG_ISR
...
RETI
GCIFG_ISR
...
RETI

;
; 2
;
;
; 4
;
;
; 6
;
;
; 8
;
;
; 10
;
;
; 12
;
;
; 14
;
;

15.3. I2C
I2C 15-4.
15-4. I2C

I2C

I2CIE

050h

PUC

I2C

I2CIFG

051h

PUC

I2CNDAT

052h

PUC

U0CTL

070h

001h PUC

I2C

I2CTCTL

071h

PUC

I2C

I2CDCTL

072h

PUC

I2C

I2CPSC

073h

PUC

SCL I2C

I2CSCLH

074h

PUC

SCL I2C

I2CSCLL

075h

PUC

I2CDRW/I2CDRB /

076h

PUC

I2C
USART

I2C
I2C

I2COA

0118h

PUC

I2C

I2CSA

011Ah

PUC

I2C

I2CIV

011Ch

PUC

285

MSP430x1xxFamily

U0CTL, USART0 I2C

7

RXDMAEN TXDMAEN
rw-0

rw-0

XA

LISTEN

SYNC

MST

I2CEN

rw-0

rw-0

rw-0

rw-0

rw-0

rw-1

DMA . DMA I2C

. RXDMAEN=1, RXRDYIE .
0
1

DMA . DMA I2C

. TXDMAEN=1, TXRDYIE
.
0
1

I2C

I2C.
I2C SPI, SYNC=1.
0 SPI
1 I2C

XA

0 7-
1 10-

LISTEN

. . LISTEN MST=1 I2CTRX=1

( ).
0
1 SDA ( ).

SYNC

0 UART
1 SPI I2C

. .
MST
.
0
1

I2C. I2C.
, UART SPI SWRST. PUC I2C SYNC, I2CEN
.
0 I2C .
1 I2C .

RXDMAEN

TXDMAEN

MST

I2CEN

286

I2C

 USART, I2C

XV.

I2CTCTL, I2C
7

I2CWORD

I2CRM

rw-0

rw-0

I2CSSELx
rw-0

rw-0

I2CTRX

I2CSTB

I2CSTP

I2CSTT

rw-0

rw-0

rw-0

rw-0

, I2CEN=0

I2CWORD

I2CRM

I2CSSELx

I2CTRX

I2CSTB

I2CSTP

I2CSTT

I2C.
I2C.
0
1

I2C
0 I2CNDAT .
1 . I2CNDAT .

5-4

I2C. MST=1
, SCL.
00 I2C
01 ACLK
10 SMCLK
11 SMCLK

I2C. I2C MST=1. MST=0, R/W

. I2CTRX
.
0 . SDA.
1 . SDA.

. I2CSTB MST=1 I2CSTT=1.

, I2CSTB .
0
1 (01h),
.

.
. I2CSTP .
0
1

.
. I2CSTT
.
0
1

287

MSP430x1xxFamily

I2CDCTL, I2C
7

I2CBUSY

I2C
SCLLOW

I2CSBD

r0

r0

r-0

r-0

r-0

7-6

I2CBUSY

I2CSCLLOW

I2CSBD

I2CTXUDF

I2CRXOVR

I2CBB

I2CTXUDF I2CRXOVR
r-0

r-0

I2CBB
r-0

. 0.
I2C
0 I2C ( IDLE)
1 I2C
SCL I2C. , SCL , MSP430 ,
.
0 SCL .
1 SCL .
I2C. ,
. I2CSBD
I2CWORD=1.
0
1 I2CDR
I2C
0
1
I2C.
0 .
1 .
I2C. I2CBB 1.
I2CBB I2CEN=0.
0 I2C
1 I2C

I2CDRW, I2CDRB I2C

15

14

13

12

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

11

10

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

I2CDRW

I2CDRW, I2CDRB
rw-0

rw-0

rw-0

I2CDRW/I2CDRB

288

I C. I2CWORD=1, I2CDRW.
I2CWORD=0, I2CDRB.
15-0/ 7-0
I2CWORD=1,
.

 USART, I2C

XV.

I2CNDAT, I2C
7

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

I2CNDATx
2

I C. .
I2CNDATx .

7-0

I2CNDATx

I2CPSC, I2C
7

rw-0

rw-0

rw-0

rw-0

I2CPSCx
rw-0

rw-0

rw-0

rw-0

, I2CEN=0
I2C. I2CIN I2C I2CPSCx,
I2C. I2CPSC+1.
I2CPSCx > 4 .
SCL I2CSCLL I2CSCLH.
000h 1
001h 2
.
.
0FFh 256

7-0

I2CPSCx

I2CSCLH, I2C
7

rw-0

rw-0

rw-0

rw-0

I2CSCLHx
rw-0

rw-0

rw-0

rw-0

, I2CEN=0

I2CSCLHx

7-0

I2C.
SCL,
I2C . SCL (I2CSCLH + 2)(I2CPSC+1).
000h SCL = 5(I2CPSC+1)
001h SCL = 5(I2CPSC+1)
002h SCL = 5(I2CPSC+1)
003h SCL = 5(I2CPSC+1)
004h SCL = 6(I2CPSC+1)
.
.
0FFh SCL = 257I2CPSC

289

MSP430x1xxFamily

I2CSCLL, I2C
7

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

I2CSCLLx
, I2CEN=0
I2C.
SCL,
I2C . SCL (I2CSCLL + 2)(I2CPSC+1).
000h SCL = 5(I2CPSC+1)
001h SCL = 5(I2CPSC+1)
002h SCL = 5(I2CPSC+1)
003h SCL = 5(I2CPSC+1)
004h SCL = 6(I2CPSC+1)
.
.
0FFh SCL = 257I2CPSC

7-0

I2CSCLLx

I2COA, I2C 7-
15

14

13

12

11

10

r0

r0

r0

r0

r0

r0

r0

r0

rw-0

rw-0

rw-0

0
r0

I2COAx
rw-0

rw-0

rw-0

rw-0

, I2CEN=0

15-0

I2COAx

I2C. I2COA
I2C MSP430. I2COA
. (MSB) 6- .
15-7 0.

I2COA, I2C 10-

15

14

13

12

11

10

r0

r0

r0

r0

r0

r0

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

I2COAx

I2COAx

290

 USART, I2C

XV.

, I2CEN=0

15-0

I2COAx

I2C. I2COA
I2C MSP430. I2COA
. (MSB) 9- .
15-10 0.

I2CSA, I2C 7-
15

14

13

12

11

10

r0

r0

r0

r0

r0

r0

r0

r0

rw-0

rw-0

rw-0

0
r0

I2CSAx
rw-0

rw-0

15-0

I2CSAx

rw-0

rw-0

I2C. I2CSA
, MSP430. . I2CSA
. (MSB) 6- .
15-7 0.

I2CSA, I2C 10-

15

14

13

12

11

10

r0

r0

r0

r0

r0

r0

rw-0

rw-0

rw-0

rw-0

rw-0

rw-0

I2CSAx

I2CSAx
rw-0

rw-0

rw-0

15-0

I2CSAx

rw-0

I2C. I2CSA
, MSP430. . I2CSA
. (MSB) 9- .
15-10 0.

I2CIE, I2C
7

STTIE

GCIE

rw-0

rw-0

TXRDYIE RXRDYIE
rw-0

rw-0

ARDYIE

OAIE

NACKIE

ALIE

rw-0

rw-0

rw-0

rw-0

291

MSP430x1xxFamily

STTIE

0
1

GCIE

0
1

.
TXDMAEN=1, TXRDYIE TXRDYIFG
.
0
1

RXRDYIE

.
RXDMAEN=1, RXRDYIE RXRDYIFG .
0
1

ARDYIE

.
0
1

OAIE

.
0
1

NACKIE

.
0
1

ALIE

.
0
1

TXRDYIE

I2CIFG, I2C
7

STTIFG

GCIFG

rw-0

rw-0

TXRDYIFG RXRDYIFG ARDYIFG

rw-0

rw-0

rw-0

OAIFG

NACKIFG

ALIFG

rw-0

rw-0

rw-0

STTIFG

0
1

GCIFG

0
1

TXRDYIFG

0
1

292

 USART, I2C

XV.
RXRDYIFG

ARDYIFG

OAIFG

NACKIFG

ALIFG

.
0
1
. ARDYIFG :

ARDYIFG
I2CRM = 0

,

I2CNDAT.

I2CRM = 1
I2CSTP

.
I2CRM = 0

,
I2CNDAT
.

I2CRM = 1

I2CSTP.

.
0
1
.
0
1
.
0
1

I2CIV, I2C
15

14

13

12

11

10

r0

r0

r0

r0

r0

r0

r0

r0

r0

r0

r0

I2CIVx
r-0

r-0

0
r-0

r-0

r0

293

MSP430x1xxFamily
I2C

I2CIV

I2CIVx

294

15-0

000h

002h

004h

006h

008h

ARDYIFG

00Ah

RXRDYIFG

00Ch

TXRDYIFG

00Eh

GCIFG

010h

STTIFG

ALIFG

NACKIFG
OAIFG

MSP430x1xxFamily

XVI.

MSP430x1xxFamily

. .
MSP430x11x1, MSP430x12x, MSP430x13x, MSP430x14x, MSP430x15x
MSP430x16x.

16.1.
-
, . - . 16-1.
:

RC-

VCC 0V
P2CA0
0
CA0

CAEX

0
1

1
P2CA1

CCI1B

++

0
CA1

CAON
CAF

0
1

1 0

0
1

0
1

 ~ 2.0 

CAOUT
Set_CAIFG

0V
1 0

CAREFx
CARSEL
0
1

0.5x VCC

00
00
VCAREF 01
01
10
10
11
11

0.25x VCC
G

D
S

. 16-1. -
296

 XVI.

16.2.

.
.
16.2.1.
+ -.
+ , -, CAOUT . CAON. , .
, CAOUT .
16.2.2.
P2CAx.
. P2CAx :
+ -

-
.
:
, , .
.
CAEX , ,
+ - .
, , . .

297

MSP430x1xxFamily

16.2.3.
,
. CAF ,
RC-.
, . ,
,
,
. 16-2. .
, .

CAOUT

CAOUT

. 16-2. RC-

16.2.4.
VCAREF, . CAREFx . CARSEL
,
VCAREF. ,
,
. , VCC
0,55 .
298

XVI.

16.2.5. , CAPD
/, -.
-, VCC
. ,
.
.
CAPDx , P2 , . 16-3.
, P2, ,
CAPDx.
VCC

I CC
VO

VI
I CC

VI

VCC

CAPD.x = 1

V CC

VSS

. 16-3.
/

16.2.6.
, . 16-4. CAIFG
( ) , CAIES. CAIE GIE,
CAIFG . CAIFG ,
.

299

MSP430x1xxFamily
CAIE

VCC
CAIES
D

SET_CAIFG

IRQ,

Q
Reset

IRACC,

POR

. 16-4.

16.2.7.

- . ,

, , , . 16-5. Rref
Rmeas.
Rref
Px.x
Rmeas
Px.y
CA0
++

CCI1B

0.25 x VCC

. 16-5.
300

XVI.

, Rmeas,
MSP430:
/ .
/ (VCC) .
/ ,
CAPDx,.
Rref.
Rmeas.
+ .
- , 0,25 VCC.
.
CAOUT CCI1B , .
. CA0 /, ,
.
. , . 16-6.
VC
V CC

R meas
R ref

0.25 V CC

I:

II:

tref

III:

IV:

t meas

. 16-6.

301

MSP430x1xxFamily
V
N meas
N

ref

R meas

ln

CC

V
R

ref

ln

N meas

ref

N
;

ref

ref

R meas = R
ref

CC

R meas
R

ref
Nmeas
N

ref

VCC
, , ..
:

16.3.
16-1.
16-1.

CACTL1

059h

POR

CACTL2

05Ah

POR

CAPD

05Bh

POR

CACTL1, 1
7

CAEX

CARSEL

rw(0)

rw(0)

CAEX

CARSEL

302

4
CAREFx

rw(0)

rw(0)

CAON

CAIES

CAIE

CAIFG

rw(0)

rw(0)

rw(0)

rw(0)

.
.

. ,
VCAREF.
CAEX=0:
0 VCAREF +
1 VCAREF -
CAEX=1:
0 VCAREF -
1 VCAREF +

XVI.

5-4

.
VCAREF.
00 .
.
01 0,25*VCC
10 0,50*VCC
11

CAON

. . .
.
0
1

CAIES

0
1

CAIE

0
1

CAIFG

0
1

CAREF

CACTL2,
7

rw(0)

rw(0)

rw(0)

rw(0)

P2CA1

P2CA0

CAF

CAOUT

rw(0)

rw(0)

rw(0)

r(0)

7-4

P2CA1

CA1. CA1.
0 CA1
1 CA1

P2CA0

CA0. CA0.
0 CA0
1 CA0

CAF

0
1

303

MSP430x1xxFamily
CAOUT

. . - .

CAPD
7

CAPD7

CAPD6

CAPD5

CAPD4

CAPD3

CAPD2

CAPD1

CAPD0

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

7-0

. , .
, CAOUT P2.2, CAPDx
P2.x. CAPD0 P2.0, CAPD1 P2.1
..
0 .
1 .

CAPDx

304

12

MSP430x1xxFamily

XVII.

MSP430x1xxFamily

12
12 12-
- . 12.
12 MSP430x13x, MSP430x14x, MSP430x15x
MSP430x16x.

17.1. 12
12 12- -
. 12- SAR, , 16 .
16 .
12 :
200 ksps
12-
,
,

(1,5 2,5 )


, AVCC

, ,


, , -

18
16 .
- 12 . 17-1.
306

12

XVII.

2_5V

REFON
INCHx=0Ah

1,5 2,5

A VCC

Ve REF+

V REF+
V REF / Ve REF
A VCC
INCHx
A VSS

A0
A1
A2
A3
A4
A5
A6
A7

0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

SREF2

Ref_x
SREF1
SREF0

11 10 01 00

ADC12OSC
ADC12SSELx

ADC12ON
ADC12DIVx

VR

S/H

Convert

V R+

00

/1 .. /8

12
SAR

ADC12CLK

01

ACLK

10

MCLK

11

SMCLK

BUSY
SHP

1
0

SAMPCON

A VCC

4
SHI
/4 .. /1024

ENC
0
1

4
SHT1x

SHSx

ISSH

SHT0x

Sync

00

ADC12S C

01

TA1

10

TB0

11

TB1

MSC

INCHx=0Bh
Ref_x
R

ADC12MEM0
CSTARTADDx

CONSEQx

A VSS

ADC12MCTL0

16 x 12

16x 8

ADC12MEM15

ADC12MCTL15

. 17-1. - 12

17.2. 12
12 . 12 .
17.2.1. 12-
12- . / (VR+ VR-)
. (NADC) (0FFFh),

307

MSP430x1xxFamily

VR+, , VR-.
(VR+ VR-) . NADC
:
N ADC = 4095

Vin  VR 
VR   VR 

12 :
ADC12CTL0 ADC12CTL1. ADC12ON. ADC12
, . 12 ,
ENC=0. ENC 1 .

ADC12CLK ,
, .
ADC12 ADC12SSELx,
1-8 ADC12DIVx. ADC12CLK:
SMCLK, MCLK, ACLK ADC12OSC.
ADC12OSC, , 5 , , . .
ADC12OSC.
, ADC12CLK . , .
17.2.2. 12

. break-before-make ( ),
, , . 17-2.
-, .
,
(AVSS), , .
308

12

XVII.
R ~ 100 O

ADC12MCTLx.03

Ax

. 17-2.

12 . ,
.
.

12 6,
.
-, VCC GND.
, .
. P6SELx
.
;P6.0 P6.1
BIS.B #3h,&P6SEL ;P6.1 P6.0 12

17.2.3.
12
: 1,5 2,5 .
VREF+.
REFON=1 .
REF2_5V=1, 2,5 , REF2_5V=0 1,5 . , .

309

MSP430x1xxFamily

, VREF+ AVSS.
10 0,1 .
17
.
,
.
:
200 , .
10 0,1
,
. 17-11.
VR+ VR- VeREF+ VRED-/VeREF- .
17.2.4.
-
SHI. SHI SHSx :
ADC12SC
1
0
1
SHI ISSH.
SAMPCON .
SAMPCON , .
SAMPCON - , 13 ADC12CLK.
- SHP,
.

, SHP=0. SHI SAMPCON
tsample. SAMPCON , .
SAMPCON
ADC12CLK. . . 17-3.
310

12

XVII.

SHI
13 x ADC12CLK
SAMPCON

t
tsync

ADC12CLK

. 17-3.

, SHP=0. SHI . SHT0x SHT1x ADC12CTL0
, tsampe SAMPCON. SAMPCON
ADC12CLK tsampe.
tsampe tsync. . . 17-4.
SHTx 4 ADC12CLK.
SHT0x ADC12MCTL0-7, SHT1x ADC12MCTL8-15.

SHI
13 x ADC12CLK

SAMPCON

tsync

ADC12CLK

. 17-4.

311

MSP430x1xxFamily

SAMPCON=0, Ax . SAMPCON=1, Ax RC tsample,
. 17-5. RI ( 2 )
I ( 40 )
. I VC
VS 12- .
MSP430
VS

RS

VI

RI
VC
CI

VI =
VS =
RS =
RI =

CI =
VC =

. 17-5.

RS RI tsample.

tsample 12- :
13

tsample  ( R S + R I ) ln( 2 ) C I + 800

RI I, ,
:
tsample  ( RS + 2 ) 9,011 40 + 800

, RS 10 , tsample 5,13 .
17.2.5.
16- ADC12MEMx. ADC12MEMx
ADC12MCTLx. SREFx , INCHx . EOS
,
. ADC12MEM15 ADC12MEM0,
EOS ADC12MCTL15 .
312

12

XVII.

CSTARTADDx ADC12MCTLx, . , CSTARTADDx

ADC12MCTLx, .

, CSTARTADDx
ADC12MCTLx, .
ADC12MCTLx
. EOS
ADC12MCTLx .

ADC12MEMx, ADC12IFGx.
17.2.6. 12
12 , CONSEQx ,
17-1.
17-1.
CONSEQx

00

01

10

11

.
ADC12MEMx,
CSTARTADDx. . 17-6 . ADC12SC, ADC12SC.
, ENC .


. ,

313

MSP430x1xxFamily

ADCMEMx, CSTARTADDx.
EOS.
. 17-7 . CONSEQx = 00

ADC12

ADC12ON = 1
ENC =

x = CSTARTADDx

SHSx = 0

ENC = 1

ADC12SC =

ENC =

ENC =

SAMPCON =

ENC = 0

SAMPCON = 1
,

ADC12MCTLx

ENC = 0*

SAMPCON =

12 x ADC12CLK

ENC = 0*
1 x ADC12CLK

,

ADC12MEMx,
ADC12IFG.
x = ADC12MCTLx
*

. 17-6.

ADC12SC,
ADC12SC. , ENC .
314

12

XVII.
ADC12
CONSEQx = 01

ADC12ON = 1
ENC =

SHSx = 0

ENC = 1

ADC12SC =

x = CSTARTADDx

ENC =

ENC =

EOS.x = 1

SAMPCON =

SAMPCON = 1
,

ADC12MCTLx

x < 15 x = x + 1
x = 0

x < 15 x = x + 1
x = 0
SAMPCON =

12 x ADC12CLK

MSC = 1

SHP = 1

EOS.x = 0

1 x ADC12CLK

(MSC = 0

SHP = 0)

EOS.x = 0

,
ADC12MEMx,
ADC12IFG.x

x = ADC12MCTLx

. 17-7.

. ADC12MEMx, CSTARTADDx.
,
ADC12MEMx,
. . 17-8 .

. ,

315

MSP430x1xxFamily
ADC12

CONSEQx = 10

ADC12ON = 1
ENC =
x = CSTARTADDx

ENC =
SHSx = 0

ENC = 1 or

ADC12SC =

ENC =

ENC = 0

SAMPCON =
SAMPCON = 1
,

ADC12MCTLx

SAMPCON =
12 x ADC12CLK

MSC = 1

SHP = 1

ENC = 1

1 x ADC12CLK

(MSC = 0

SHP = 0)

ENC = 1

,
ADC12MEMx,
ADC12IFG.x

x = ADC12MCTLx

. 17-8.

ADC12MEMx, CSTARTADDx. EOS

. . 17-9 .
(MSC)

. MSC=1,
CONSEQx>1 , SHI 316

12

XVII.

CONSEQx = 11

ADC12

ADC12ON = 1
ENC =
x = CSTARTADDx

SHSx = 0

ENC = 1

ADC12SC =

ENC =

ENC =

ENC = 0

EOS.x = 1

SAMPCON =
SAMPCON = 1
,

ADC12MCTLx

SAMPCON =
EOS.x = 1 x =
CSTARTADDx
{ x < 15 x = x + 1

x = 0}
MSC = 1

SHP = 1

(ENC = 1

EOS.x = 0)

EOS.x = 1 x =
CSTARTADDx
{ x < 15 x = x + 1
x = 0}
12 x ADC12CLK

1 x ADC12CLK

Conversion
Completed,
Result Stored Into
ADC12MEMx,
ADC12IFG.x is Set

(MSC = 0

SHP = 0)

(ENC = 1

EOS.x = 0)

x = ADC12MCTLx

. 17-9.

. .
SHI ,
ENC . ENC ,
MSC.

12 . :

317

MSP430x1xxFamily

ENC ,
.
ENC.
ENC
.
ENC - .
CONSEQx=0 ENC.
.
: EOS
EOS , ENC .
,
ENC.
17.2.7.

INCHx=1010.
,
, ..

. 17-10. ,
30 .
.
. .

. VREF+
.
.
17.2.8. 12
, ,
318

12

XVII.

,
.

1.300
1.200
1.100
1.000
0.900
VTEMP =0.00355(TEMPC)+0.986
0.800

0.700
50

50

100

. 17-10.

, . , ,
- . , . 17-11 .
,
, .
,
, .
17.2.9. 12
12 18 :
ADC12IFG0-ADC12IFG15

319

MSP430x1xxFamily

ADC12OV, AD12MEMx
ADC12TOV, 12

DV CC

DVSS

10 uF100 nF

AV SS
10

+


10

AV CC

100
Ve REF+

MSP430F13x
MSP430F14x
MSP430F15x
MSP430F16x

100
V REF+

10 100

+


10

V REF / Ve REF
100

. 17-11. 12

ADC12IFGx ,
ADC12MEMx . ADC12IEx GIE , .
ADC12OV ,
ADC12MEMx . ADC12TOV ,
-.
ADC12IV,
12
. ADC12IV
,
12 .
320

 XVII.

12

12
ADC12IV (. ). . 12
ADC12IV.
( ), ADC12IV ADC12OV ADC12TOV,
. . ADC12IFGx ADC12IV. ADC12IFGx
ADC12MEMx
.
, . ,
ADC12OV ADC12IFG3,
ADC12IV, ADC12OV . RETI ADC12IFG3 .
- 12
ADC12IV . ADC12IV PC .
.
,
. :
ADC12IFG0-ADC12IFG14, ADC12TOV ADC12OV
ADC12IFG15

16
14

ADC12IFG15
,
ADC12IFG15. , 12.

321

MSP430x1xxFamily
; 12.
INT_ADC12

ADD&ADC12IV,PC

; PC

RETI

; 0:

JMPADOV

; 2:

JMPADTOV

; 4:

JMPADM0

; 6: ADC12IFG0

...

; 8-32

JMPADM14

; 34: ADC12IFG14

;
; ADC12IFG15 . JMP .
;
ADM15 MOV &ADC12MEM15, xxx ; ,
...

; ?

JMP INT_ADC12

;
; ADC12IFG14-ADC12IFG1
ADM0 MOV &ADC12MEM0, xxx

; ,

;
...

; ?

RETI

;
ADTOV ...
RETI

;
;
;

;
ADOV ...
RETI

322

; ADCMEMx
;

12

XVII.

17.3. 12
12 17-2.
17-2. 12

0 12
1 12
12
12
12
0 12
1 12
2 12
3 12
4 12
5 12
6 12
7 12
8 12
9 12
10 12
11 12
12 12
13 12
14 12
15 12
0 12
1 12
2 12
3 12
4 12
5 12
6 12
7 12
8 12
9 12
10 12
11 12
12 12
13 12
14 12
15 12

ADC12CTL0
ADC12CTL1
ADC12IFG
ADC12IE
ADC12IV
ADC12MEM0
ADC12MEM1
ADC12MEM2
ADC12MEM3
ADC12MEM4
ADC12MEM5
ADC12MEM6
ADC12MEM7
ADC12MEM8
ADC12MEM9
ADC12MEM10
ADC12MEM11
ADC12MEM12
ADC12MEM13
ADC12MEM14
ADC12MEM15
ADC12MCTL0
ADC12MCTL1
ADC12MCTL2
ADC12MCTL3
ADC12MCTL4
ADC12MCTL5
ADC12MCTL6
ADC12MCTL7
ADC12MCTL8
ADC12MCTL9
ADC12MCTL10
ADC12MCTL11
ADC12MCTL12
ADC12MCTL13
ADC12MCTL14
ADC12MCTL15

/
/
/
/

/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/

01A0h
01A2h
01A4h
01A6h
01A8h
0140h
0142h
0144h
0146h
0148h
014Ah
014Ch
014Eh
0150h
0152h
0154h
0156h
0158h
015Ah
015Ch
015Eh
080h
081h
082h
083h
084h
085h
086h
087h
088h
089h
08Ah
08Bh
08Ch
08Dh
08Eh
08Fh

POR
POR
POR
POR
POR
















POR
POR
POR
POR
POR
POR
POR
POR
POR
POR
POR
POR
POR
POR
POR
POR

323

MSP430x1xxFamily

ADC12CTL0, 0 12
15

14

13

12

11

10

SHT1x

SHT0x

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

MSC

REF2_5V

REFON

ADC120N

ENC

ADC12SC

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

ADC12OVIE ADC12TOVIE

rw(0)

rw(0)

, ENC = 0

SHT1x

-.
15-12 ADC12CLK ADC12MEM8
ADC12MEM15.
-.
ADC12CLK ADC12MEM0
ADC12MEM7.

SHT0x

324

11-8

SHTx

ADC12CLK

0000

0001

0010

16

0011

32

0100

64

0101

96

0110

128

0111

192

1000

256

1001

384

1010

512

1011

768

1100

1024

1101

1024

1110

1024

1111

1024

12

XVII.

.
.
0 - SHI
1 SHI , - ,

REF2_5V

. REFON .
0 1.5
1 2.5

REFON

.
0
1 .

ADC12ON

12
0 12
1 12

ADC12OVIE

ADC12MEMx. GIE.
0
1

ADC12TOVIE

12.
GIE.
0
1

ENC

0 12
1 12

. . ADC12SC ENC
. ADC12SC .
0 -
1 -

MSC

ADC12SC

ADC12CTL1, 1 12
15

14

13

12

11

CSTARTADDx
rw(0)

rw(0)

rw(0)

10
SHSx

rw(0)

rw(0)

rw(0)

SHP

ISSH

rw(0)

rw(0)

325

MSP430x1xxFamily
7

ADC12DIVx
rw(0)

rw(0)

2
CONSEQx

ADC12SSELx
rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

0
ADC12BUSY

r(0)

, ENC = 0

. ,
12
CSTARTADDx 15-12 . CSTARTADDx 0 0Fh,
ADC12MEM0 ADC12MEM15.

SHSx

-.
00 ADC12SC
11-10 01 1
10 0
11 1

SHP

-.
(SAMPCON),
, .
0 SAMPCON .
1 SAMPCON .

ISSH

-
0
1

ADC12DIVx

ADC12SSELx

CONSEQx

326

7-5

12
000 /1
001 /2
010 /3
011 /4
100 /5
101 /6
110 /7
111 /8

4-3

12
00 ADC12OSC
01 ACLK
10 MCLK
11 SMCLK

2-1

00 ,
01
10
11

12

XVII.

ADC12BUSY

12. .
0
1 ,

ADC12MEMx, 12
15

14

13

12

11

10

r0

r0

r0

r0

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

rw

12-
. 11 MSB. 15-12
15-0
0. .

ADC12MCTLx, 12
7

EOS
rw(0)

SREFx
rw(0)

rw(0)

rw(0)

rw(0)

INCHx
rw(0)

rw(0)

rw(0)

, ENC = 0

EOS

SREFx

6-4

.
.
0
1

000 VR+ = AVCC VR- = AVSS
001 VR+ = VREF+ VR- = AVSS
010 VR+ = VeREF+ VR- = AVSS
011 VR+ = VeREF+ VR- = AVSS
100 VR+ = AVCC VR- = VREF-/VeREF101 VR+ = VREF+ VR- = VREF-/VeREF110 VR+ = VeREF+ VR- = VREF-/VeREF111 VR+ = VeREF+ VR- = VREF-/VeREF-

327

MSP430x1xxFamily

INCHx

3-0

0000 A0
0001 A1
0010 A2
0011 A3
0100 A4
0101 A5
0110 A6
0111 A7
1000 VeREF+
1001 VREF-/VeREF1010
1011 (AVCC - AVSS)/2
1100 (AVCC - AVSS)/2
1101 (AVCC - AVSS)/2
1110 (AVCC - AVSS)/2
1111 (AVCC - AVSS)/2

ADC12IE, 12
15

14

13

12

11

10

ADC12IE15

ADC12IE14

ADC12IE13

ADC12IE12

ADC12IE11

ADC12IE10

ADC12IE9

ADC12IE8

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

ADC12IE7

ADC12IE6

ADC12IE5

ADC12IE4

ADC12IE3

ADC12IE2

ADC12IE1

ADC12IE0

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

15-0

. ADC12IFGx.
0
1

ADC12IEx

ADC12IFG, 12
15

14

13

12

11

10

ADC12IFG15 ADC12IFG14 ADC12IFG13 ADC12IFG12 ADC12IFG11 ADC12IFG10 ADC12IFG9

8
ADC12IFG8

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

ADC12IFG7

ADC12IFG6

ADC12IFG5

ADC12IFG4

ADC12IFG3

ADC12IFG2

ADC12IFG1

ADC12IFG0

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

328

12

XVII.

ADC12IFGx

ADC12MEMx. ,
ADC12MEMx
. ADC12IFGx ,
15-0 ADC12MEMx
.
0
1

ADC12IV, 12
15

14

13

12

11

10

r0

r0

r0

r0

r0

r0

r0

r0

r0

r0

r(0)

r(0)

r0

ADC12IVx

15-0

ADC12IVx
r(0)

r(0)

r(0)

12

ADC12IV

000h

002h

ADC12MEMx

004h

006h

ADC12MEM0

ADC12IFG0

008h

ADC12MEM1

ADC12IFG1

00Ah

ADC12MEM2

ADC12IFG2

00Ch

ADC12MEM3

ADC12IFG3

00Eh

ADC12MEM4

ADC12IFG4

010h

ADC12MEM5

ADC12IFG5

329

MSP430x1xxFamily

330

012h

ADC12MEM6

ADC12IFG6

014h

ADC12MEM7

ADC12IFG7

016h

ADC12MEM8

ADC12IFG8

018h

ADC12MEM9

ADC12IFG9

01Ah

ADC12MEM10

ADC12IFG10

01Ch

ADC12MEM11

ADC12IFG11

01Eh

ADC12MEM12

ADC12IFG12

020h

ADC12MEM13

ADC12IFG13

022h

ADC12MEM14

ADC12IFG14

024h

ADC12MEM15

ADC12IFG15

10

MSP430x1xxFamily

XVIII.

MSP430x1xxFamily

10
10 10-
- . 10.
10 MSP430x11x2 MSP430x12x2.

18.1. 10
10 10- -
. 10- SAR, , (DTC).
DTC 10 .
.
10 :
200 ksps (200000 .)
10-


(1,5 2,5 )


, AVCC


, , -


- 10 . 18-1.

332

10

XVIII.
REFOUT

REFBURST
Ve REF+

V REF+

REFON
INCHx=0Ah

2_5V

ADC10SR

1,5 2,5

V REF / Ve REF
INCHx

A VCC

Ref_x

A VCC

4
Auto

A0
A1
A2
A3
A4
A5
A6
A7

CONSEQx

0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

A VSS
1

SREF2

SREF1
SREF0

11 10 01 00

ADC10OSC
ADC10SSELx

ADC10ON
ADC10DIVx

VR

S/H

00

V R+

/1 .. /8

10 SAR
Convert

ADC10CLK

01

ACLK

10

MCLK

11

SMCLK
SHSx

ISSH

BUSY

ENC
SAMPCON

A VCC

/4/8/16/64

ADC10DF

ADC10SHTx

SHI

0
1

Sync

00

ADC10SC

01

TA1

10

TA0

11

TA2

MSC

INCHx=0Bh
ADC10MEM
Ref_x
R

, ,

ADC10SA
R
A VSS

ADC10CT

ADC10TB

ADC10B1

. 18-1. - 10

18.2. 10
10 . 10 .
18.2.1. 10-
10- ADC10MEM. (VR+ VR-) . (NADC)

333

MSP430x1xxFamily

(03FFh), VR+,
, VR-.
(VR+ VR-) . .
NADC
:
NADC = 1023

Vin  VR`
V R+  VR`

12 :
ADC10CTL0 ADC10CTL1. ADC10ON.
10
ENC=0. ENC 1 .

ADC10CLK ,
. 10 ADC10SSELx, 1-8 ADC10DIVx.
ADC10CLK: SMCLK, MCLK, ACLK ADC10OSC.
ADC10OSC 5 ,
,
. . ADC10OSC.
, ADC10CLK . , .
18.2.2. 10

. break-before-make ( ),
, , . 18-2.
-, .
,
(AVSS), , .
334

10

XVIII.
R ~ 100 O

INCHx

Ax

. 18-2.

10 . ,
.
.

10 c A0 4, VeREF+ VeREF-
2, . 5 7 3
(. ).
-,
VCC GND. , .

. ADC10AEx .
;P2.3
BIS.B #4h,&ADC10AE

;P2.3 10

18.2.3.
10
: 1,5 2,5 .

VREF+.
REFON=1.
REF2_5V=1, 2,5 , REF2_5V=0 1,5 .

335

MSP430x1xxFamily

VR+ VR-
4 3 .

10 .

. 30 . 10
100 .
VCC VSS , REFON=0.
,
.
VR+ VR- 4 3 .
50 ksps, ADC10SR=1 50%.
REFOUT=1 REFBURST=1, .
REFOUT1=1, REFBURST=0 ,
.
18.2.4.
-
SHI. SHI SHSx :
ADC10SC
1
0
2
SHI ISSH.
SHTx tsample 4, 8, 16 64
ADC10CLK. SAMPCON
ADC10CLK.
tsample tsync. SAMPCON
- , 13
ADC10CLK, . 18-3.
336

10

XVIII.

SHI
13 x ADC10CLK

SAMPCON

t.

ADC10CLK

. 18-3.

SAMPCON=0, Ax .
SAMPCON=1, Ax RC tsample, . 184. RI ( 2 )
I ( 40 ) . I VC
VS 10-
.
MSP430
VS

RS

VI

RI

VC
CI

VI =
VS =
RS =
R I =

C I =
VC =

. 18-4.

RS RI tsample.

tsample 10- :
11

tsample  ( R S + R I ) ln( 2 ) C I + 800

ADC10SR = 0
11
tsample  ( R S + R I ) ln( 2 ) C I + 2,5
ADC10SR = 1
RI I, ,
:

337

MSP430x1xxFamily

, RS 10 , tsample 2,63
ADC10SR = 0 4,33 ADC10SR = 1.
tsample  ( RS + 2 ) 7,625 20 + 800 (ADC10SR = 0)
tsample  ( RS + 2 ) 7,625 20 + 2,5 (ADC10SR = 1)

18.2.5.
ADC10 , CONSEQx ,
18-1.
18-1.
CONSEQx

00

01

10
11

.
.

.

.

, INCHx, . ADC10MEM.
. 18-5 . ADC10SC, ADC10SC.
, ENC .


. INCHx 0.
ADC10MEM. 0. . 18-6 . ADC10SC, ADC10SC. ,
ENC .

, INCHx, . ADC10MEM.
. 18- 7 .
338

10

XVIII.
ADC10

CONSEQx = 00

ENC =
ADC10ON = 1
x = INCHx

SHS = 0

ENC = 1

ADC10SC =

ENC =
ENC =

SAMPCON =
(4/8/16/64) x ADC10CLK

ENC = 0

ENC = 0*

12 x ADC10CLK

ENC = 0*
1 x ADC10CLK

,
ADC10MEM,
ADC10IFG
x = Ax
*

. 18-5.

. , INCHx 0. ADC10MEM.
0,
. . 18-8
.

339

MSP430x1xxFamily
ADC10

CONSEQx = 01
ADC10ON = 1

ENC =

x = INCHx

ENC =
SHS = 0

ENC = 1

ADC10SC =

ENC =

SAMPCON =

x=0

(4/8/16/64) x ADC10CLK
,
Ax

x > 0 x = x  1

x > 0 x = x  1
12 x ADC10CLK

MSC = 1

x 0

MSC = 0

x 0
1 x ADC10CLK

,
ADC10MEM,
ADC10IFG

x = Ax

. 18-6.

MSC

. MSC=1
CONSEQx>1, SHI .
. SHI ,
340

10

XVIII.
ADC10

CONSEQx = 10

ADC10ON = 1

ENC =

x = INCHx

SHS = 0

ENC = 1

ADC10SC =

ENC =
ENC =

SAMPCON =
(4/8/16/64)

ENC = 0
ADC10CLK

,
Ax

12 x ADC10CLK
MSC = 1

ENC = 1

MSC = 0
and
ENC = 1

1 x ADC10CLK

,
ADC10MEM,
ADC10IFG
x = Ax

. 18-7.

ENC
. ENC
, MSC.

10 . :

341

MSP430x1xxFamily

CONSEQx = 11

ADC10

ENC =

ADC10ON = 1
x = INCHx

SHS = 0

ENC = 1

ADC10SC =

ENC =
ENC =

SAMPCON =
(4/8/16/64) x ADC10CLK

Ax

x = 0 x = INCH
x = x  1

x = 0 x = INCH
x = x  1

12 x ADC10CLK

MSC = 1

(ENC = 1

x 0)

1 x ADC10CLK

MSC = 0

(ENC = 1

x 0)

ENC = 0

x=0

,
ADC10MEM,
ADC10IFG

x = Ax

. 18-8.

ENC ,
.
ADC10BUSY ENC.
ENC
.
ENC - .
342

10

XVIII.

CONSEQx=0 ENC.
.
18.2.6. 10
10 (DTC) ADC10MEM
. DTC ADC10DTC1 .
DTC , 10
ADC10MEM, . 10 ,
.
DTC- MCLK .
DTC- , , MCLK, .
DTC- , 10 .
,
, DTC :
; 10
BIC.W #ENC,&ADC10CTL0
busy_test BIT.W #BUSY,&ADC10CTL1

;
;

JNZ busy_test

MOV.W #xxx,&ADC10SA

MOV.B #xx,&ADC10DTC1

, ADC10TB . n
ADC10DTC1 .
- MSP430 16 ADC10SA. ADC10SA+2n-2.
. 18-9.
ADC10SA, n. . DTC
ADC10MEM , ADC10SA.
DTC-
, .

343

MSP430x1xxFamily
TB=0
'n'

ADC10SA+2n2
ADC10SA+2n4

DTC
2
1

ADC10SA+2
ADC10SA

. 18-9.

DTC ADC10MEM, . DTC ADC10SA. DTC

, ADC10IFG . . 18-10
.

, ADC10TB .
n ADC10DTC1 .
MSP430
16- ADC10SA.
ADC10SA+2n-2. SA+2n
SA+4n-2. . 18-11.
ADC10SA,
n.
. DTC ADC10MEM , ADC10SA.
DTC- , .
DTC ADC10MEM, .
ADC10IFG ADC10B1 . ADC10B1 , .
DTC . n. ADC10MEM DTC .
n . ADC10IFG ,
344

10

XVIII.

n=0 (ADC10DTC1)

DTC

0

ADC10SA

n=0
.
DTC

ADC10SA

DTC

ADC10SA
x=n
AD = SA

ADC10SA

n=0

,
ADC10MEM

DTC

ADC10MEM

ADC10SA

MCLK

x>0
DTC

Write to ADC10SA
1 x MCLK

AD
AD = AD + 2
x=x 1
x=0

ADC10IFG=1

ADC10TB = 0

ADC10CT = 1
ADC10TB = 0

ADC10CT = 0

. 18-10.

345

MSP430x1xxFamily
TB=1

2 x 'n'

ADC10SA+4n2
ADC10SA+4n4

DTC

'n'

ADC10SA+2n2
ADC10SA+2n4

2

ADC10SA+2

1

ADC10SA

. 18-11.

ADC10B1 .
ADC10B1 , . . 18- 12 .

, ADC10CT.
DT ( ) ( ). ADC10SA
n . , .
ADC10CT , DTC ( ) (
).
DTC
ADC10MEM DTC
MCLK , ( ) . DTC MCLK, DTC
MSP430 .
MCLK , , DTC MCLK . MCLK , DTC MCLK, MCLK DCOCLK, .
346

10

XVIII.

n=0 (ADC10DTC1)
DTC
ADC10B1 = 0
ADC10TB = 1
n

n=0

ADC10SA
.
DTC

ADC10SA

DTC

ADC10SA
x=n
ADC10B1 = 0
AD = SA

ADC10SA

n=0

n

ADC10MEM

DTC
ADC10MEM

MCLK

x>0
DTC

ADC10SA
1 x MCLK

AD
AD = AD + 2
x=x 1
x=0

ADC10IFG=1

ADC10B1

ADC10B1 = 1

ADC10CT=1
ADC10CT = 0

ADC10B1 = 0

. 18-12.

347

MSP430x1xxFamily

DTC , MCLK .
DTC
18-2.
18-2. DTC

DTC

MCLK=DCOCLK

3 MCLK

MCLK=LFXT1CLK

3 MCLK

LPM0/1

MCLK=DCOCLK

4 MCLK

LPM3/4

MCLK=DCOCLK

4 MCLK + 6 *

LPM0/1 MCLK=LFXT1CLK

4 MCLK

LPM3

MCLK=LFXT1CLK

4 MCLK

LPM4

MCLK=LFXT1CLK

4 MCLK + 6 *

* 6 DCOCLK. t(LPMx).

18.2.7.

INCHx=1010.

1.300
1.200
1.100
1.000
0.900
VTEMP = 0.00355(TEMPC )+0.986
0.800

0.700
50

50

100

. 18-13.

348

10

XVIII.

,
, ..

. 18-13. , 30 .
. . .

. VREF+
.
.
18.2.8.
, ,
,
.
, . , ,
- .
, . 18-14 .

V CC
+

10

100

V SS

MSP430F12x2
MSP430F11x2
Ve REF+

V REF

. 18-14. 10

349

MSP430x1xxFamily

, ,
.
, .
18.2.9. 10
10, . 18-15. DTC (ADC10DTC1=0), ADC10IFG
, ADC10MEM.
DTC (ADC10DTC1>0), ADC10IFG , ADC10IE
ADC10IFG
'n' = 0

D
ADC10CLK

IRQ,

Q
Reset
POR

IRACC,

. 18-15. 10

n=0.
ADC10IE GIE , ADC10IFG . ADC10IFG ,
, , .

18.3. 10
10 18-3.
18-3. 10

ADC10AE
10
ADC10CTL0
0 10
ADC10CTL1
1 10
ADC110MEM
10
0
ADC10DTC0
10
1
ADC10DTC1
10

ADC10SA
10

350

/
/
/

04Ah
01B0h
01B2h
01B4h

POR
POR
POR

048h

POR

049h

POR

01BCh

0200h c POR

10

XVIII.

ADC10CTL0, 0 10
15

14

13

SREFx

12

11

ADC10SHTx

10

ADC10SR

REFOUT

REFBURST

rw(0)
7

rw(0)
6

rw(0)
5

rw(0)
4

rw(0)
3

rw(0)
2

rw(0)
1

rw(0)
0

MSC

REF2_5V

REFON

ADC10ON

ADC10IE

ADC10IFG

ENC

ADC10SC

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

, ENC=0

SREFx

ADC10SHTx

ADC10SR

REFOUT

REFBURST

MSC

000 VR+ = AVCC VR- = AVSS
001 VR+ = VREF+ VR- = AVSS
010 VR+ = VeREF+ VR- = AVSS
15-13 011 VR+ = VeREF+ VR- = AVSS
100 VR+ = AVCC VR- = VREF-/VeREF101 VR+ = VREF+ VR- = VREF-/VeREF110 VR+ = VeREF+ VR- = VREF-/VeREF111 VR+ = VeREF+ VR- = VREF-/VeREF - 10
00 4 ADC10CLKs
12-11 01 8 ADC10CLKs
10 16 ADC10CLKs
11 64 ADC10CLKs
10. C
. ADC10SR .
10
0 200 ksps
1 50 ksps

0
9
1
. REFOUT
.
0
8
1 -
.
.
0 SHI
-
7
1 SHI , -

351

MSP430x1xxFamily

REF2_5V

. REFON .
0 1.5
1 2.5

REFON

0
1

ADC10ON

10
0 10
1 10

ADC10IE

10
0
1

ADC10IFG

10. ,
ADC10MEM - . -
. DTC,
, .
0
1

ENC

0 10
1 10

. - . ADC10SC ENC
. ADC10SC .
0 -
1 -

ADC10SC

ADC10CTL1, 1 10
15

14

13

12

11

INCHx
rw(0)
7

rw(0)
6

SHSx
rw(0)
5

ADC10DIVx
rw(0)

rw(0)

10

rw(0)
4

rw(0)
3

ADC10SSELx
rw(0)

rw(0)

rw(0)

rw(0)
2

ADC10DF

ISSH

rw(0)
1

rw(0)
0

CONSEQx
rw(0)

rw(0)

ADC10
BUSY
r0

, ENC=0

352

10

XVIII.

INCHx

0000 A0
0001 A1
0010 A2
0011 A3
0100 A4
0101 A5
0110 A6
15-12 0111 A7
1000 VeREF+
1001 VREF-/VeREF1010
1011 (AVCC - AVSS)/2
1100 (AVCC - AVSS)/2
1101 (AVCC - AVSS)/2
1110 (AVCC - AVSS)/2
1111 (AVCC - AVSS)/2

SHSx

-
00 ADC10SC
11-10 01 1
10 0
11 2

ADC10DF

10
0
1

ISSHx

-
0 -
1 -

ADC10DIVx

ADC10SSELx

7-5

10
000 /1
001 /2
010 /3
011 /4
100 /5
101 /6
110 /7
111 /8

4-3

10
00 ADC10OSC
01 ACLK
10 MCLK
11 SMCLK

353

MSP430x1xxFamily

CONSEQx

2-1

ADC10BUSY

00 ,
01
10
11
12. .
0
1 ,

ADC10AE,
7

ADC10AE7 ADC10AE6 ADC10AE5 ADC10AE4 ADC10AE3 ADC10AE2 ADC10AE1 ADC10AE0

rw(0)

ADC10AEx

rw(0)

rw(0)

rw(0)

rw(0)

7-0

0
1

rw(0)

rw(0)

rw(0)

ADC10MEM, ,
15

14

13

12

11

10

9
8

r0

r0

r0

r0

r0

r0

10-
15-0 . 9
(MSB). 15-10 0.

ADC10MEM, ,
15

14

13

12

11

10

354

10

XVIII.
7
6

r0

r0

r0

r0

r0

r0

10-
15-0 . 15
(MSB). 5-0 0.

ADC10DTC0, 0
7

r0

r0

r0

r0

ADC10TB

ADC10CT

ADC10B1

ADC10
FETCH

rw(0)

rw(0)

rw(0)

rw(0)

. 0.

7-4

ADC10TB

10.
0
1

10.
0 ,
( ) (
) .
1 . DTC ADC10CT
ADC10SA.

ADC10B1

10. ,
10. ADC10B1 ADC10IFG
DTC. ADC10TB
.
0 1
1 2

ADC10FETCH

ADC10CT

ADC10DTC1, 1
7

rw(0)

rw(0)

rw(0)

DTC
rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

355

MSP430x1xxFamily

DTC

DTC. .
0 DTC
01h-0FFh

7-4

ADC10SA,
15

14

13

12

11

10

ADC10SAx
rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(1)

rw(0)

0
0

ADC10SAx
rw(0)

rw(0)

rw(0)

ADC10SAx

15-1

356

rw(0)

rw(0)

rw(0)

rw(0)

r0

10.
DTC. ADC10SA DTC .
, . 0.

12

MSP430x1xxFamily

XIX.

MSP430x1xxFamily

12
12 12- - . 12. MSP430x15x
MSP430x16x 12.

19.1. 12
12 12- . 12
8- 12-
DMA.
12, .
12 :
12-
8- 12-

12
: 12
12.
, 12,
12 .
DAC12_xDAT DAC12_xCTL
. x , 12 . ,
, DAC12_xCTL.
- 12 MSP430F15x/16x
. 19-1.

19.2. 12
12 . 12
.
358

12

XIX.
Ve REF+
V REF+

ADC12
2,5 1,5
ADC12
DAC12SREFx
DAC12AMPx
DAC12IR
3

00
01

/3

10
11

AV SS
V R

DAC12LSELx

V R+
DAC12_0OUT
x3

DAC12_0
00

01
TA1

10

TB2

11

DAC12_0

DAC12GRP

ENC

DAC12RES
DAC12DF

DAC12_0DAT

DAC12_0DAT

DAC12SREFx
DAC12AMPx
DAC12IR
3

00
01
10
11

/3
AV SS

V R

DAC12LSELx

V R+

DAC12_1
00
01
TA1

10

TB2

11

DAC12_1OUT
x3

DAC12GRP

ENC

DAC12_1

DAC12RES
DAC12DF

DAC12_1DAT

DAC12_1DAT

. 19-1. - 12

19.2.1. 12
12 8- 12-
DASC12RES. ,
DAC12IR 1 3- .
12.
, 1 .
DAC12DF

359

MSP430x1xxFamily

.
, ,
19-1.
19-1. 12 (Vref = VeREF+ VREF+)

DAC12RES

DAC12IR

12

Vout = Vref 3

12

Vout = Vref

Vout = Vref 3

Vout = Vref

DAC12 _ xDAT
4096

DAC12 _ xDAT
4096
DAC12 _ xDAT
256

DAC12 _ xDAT
256

8- DAC12_
xDAT 0FFh, 12-
DAC12_xDAT 0FFFh. , , .
12
12 6
12. DAC12AMPx>0, 12, P6SELx P6DIRx.
19.2.2. 12
12 , 1.5 /2.5 12 DAC12SREFx.
DAC12SREFx={0,1}, VREF+,
DAC12SREFx={2,3}, VeREF+.
12,

12 (. 12). 12 , VREF+.
12
12
*
* , , .

360

12

XIX.

.
DAC12AMPx. /
, .
, . .
.
19.2.3. 12
DAC12_xDAT 12
. 12 DAC12LSELx.
DAC12LSELx=0, , DAC12_xDAT 12. 12 ,
12 DAC12_xDAT,
DAC12ENC.
DAC12LSELx=1, 12
12 DAC12_DAT. DAC12LSELx=2
3, CCR1
CCR2 . DAC12ENC ,
, DAC12LSELx>0.
19.2.4. DAC12_xDAT
12 : . ,
0FFFh 12- (0FFh 8- ), . 19-2.

0
0

0FFFh

DAC

. 19-2. 12 12-

361

MSP430x1xxFamily

, , DAC12_xDAT 0800h (0080h 8-

), , 0000h , 07FFh (007Fh 8- )
, . 19-3.

0
0800h (2048)

07FFh (+2047)

DAC

. 19-3. 12 12-

19.2.5. 12
12 . , ,

DAC

. 19-4.

362

12

XIX.

. , 12
.
. 19-4.

Vcc

DAC

. 19-5.

,
. 12
, 12 .
. 19-5.
12 . DAC12CALON .
12. ,
DAC12CALON . DAC12AMPx . , .
19.2.6. 12
12 DAC12GRP
12. ,
12 ,
NMI-.
MSP430x15x MSP430x16x DAC12_0 DAC12_1 DAC12GRP DAC12_0. DAC12GRP
DAC12_1 . DAC12_0 DAC12_1 , :

363

MSP430x1xxFamily

DAC12LSELx DAC12_1 ;
DAC12LSELx > 0
DAC12ENC 1.
DAS12_0 DAC12_1 , DAC12_xDAT
. . 19-6 - DAC12_0 DAC12_1.

DAC12_0
DAC12GRP

DAC12_0 DAC12_1

DAC12_0
DAC12ENC
1
A

DAC12_0DAT
DAC12_0

DAC12_1DAT

DAC12_0
DAC12_0 DAC12LSELx = 2

DAC12_0 DAC12LSELx > 0

DAC12_1 DAC12LSELx = 2

. 19-6. 12, _3

DAC12GRP=1 DAC12_0 DAC12LSELx>0 DAC12_x DAC12ENC=0, 12 .

: 12
DMA 12
12. ,
DMA. . .
19.2.7. 12
12 DMA. DAC12IFG DMAIFG .
364

12

XIX.

DAC12IFG , DAC12xLSELx>0 12 DAC12_xDAT . DAC12xLSELx=0,

DAC12IFG .
DAC12IFG , 12
. DAC12IE GIE, DAC12IFG
. DAC12IFG . .

19.3. 12
12 19-2.
19-2. 12

DAC12_0

DAC12_0CTL

01C0h

POR

DAC12_0

DAC12_0DAT

01C8h

POR

DAC12_1

DAC12_1CTL

01C2h

POR

DAC12_1

DAC12_1DAT

01CAh

POR

DAC12_xCTL, 12
15

14

13

12

DAC12SREFx

DAC12RES

11

10

DAC12LSELx

DAC12
CALON

DAC12IR
rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

DAC12AMPx
rw(0)

rw(0)

rw(0)

DAC12DF

DAC12IE

rw(0)

rw(0)

DAC12IFG DAC12ENC
rw(0)

rw(0)

1
DAC12
GRP
rw(0)

, DAC12ENC=0

DAC12SREFx

15

12
00 VREF+
14-13 01 VREF+
10 VeREF+
11 VeREF+

365

MSP430x1xxFamily

19-2. ()
DAC12RES

DAC12LSELx

DAC12CALON

12

12.
12.
DAC12ENC, , DAC12LSELx=0.
00 12
DAC12_xDAT (DAC12ENC )
11-10
01 12
DAC12_xDAT, , ,
DAC12_xDAT
10 c _3. 1 (TA1)
11 c _B7. 2 (TB2)

DAC12IR

DAC12AMPx

7-5

DAC12DF

DAC12IE

366

12
0 12-
1 8-

12. 12
.
0
1 /
12.
.
0 12 3-

1 12 1-

12.
12
DAC12AMPx


12 ,
000

12 ,
001

0
010
/ /
011
/ /
100
/ /
101
/ /
110
/ /
111
/ /
12
0
1
12
0
1

12

XIX.
DAC12IFG

DAC12ENC

DAC12GRP

12
0
1
12. 12, DAC12LSELx>0. DAC12LSELx=0,
DAC12ENC .
0 12
1 12
12. DAC12_x DAC12_, . MSP430x15x MSP430x16x.
0
1

DAC12_xDAT, 12
15

14

13

12

11

10

r(0)

r(0)

r(0)

r(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

rw(0)

DAC12 Data

DAC12 Data
rw(0)

rw(0)

rw(0)

15-12

12

11-0

rw(0)

rw(0)

. 0
12.
12
12
12
12
12- . 11
(MSB).
12
12- . 11
MSB ().
12
. 7 8-
(MSB). 11-8
12.
12
. 7 8- MSB (). 11-8


12.

367

 MSP430x1xx

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..
..
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