VLSI Testing

Sequential
Sequential ATPG
ATPG -- II
Virendra Singh
Indian Institute of Science (IISc)
Bangalore
virendra@computer.org
E0-286: Testing and Verification of SoC Design
Lecture 14
Feb 20, 2008

E0-286@SERC

Static
Static and
and Dynamic
Dynamic
Compaction
Compaction of
of Sequences
Sequences
Static compaction
ATPG should leave unassigned inputs as X
Two patterns compatible if no conflicting
values for any PI
Combine two tests ta and tb into one test
tab = ta
tb using D-intersection
Detects union of faults detected by ta & tb

Dynamic compaction

Process every partially-done ATPG vector

immediately
Assign 0 or 1 to PIs to test additional faults

Feb 20, 2008

E0-286@SERC

Compaction
Compaction Example
Example
t1 = 0 1 X
t3 = 0 X 0
Combine t1 and

t2 = 0 X 1
t4 = X 0 1
t3 , then t2 and t4

Obtain:

t13 = 0 1 0

t24 = 0 0 1

Test Length shortened from 4 to 2

Feb 20, 2008

E0-286@SERC

ATPG
ATPG based
based Formal
Formal
Verification
Verification
A
B

P
S

Z
Q
T

C
B

s-a-0

Formal Equivalence Checking

Feb 20, 2008

E0-286@SERC

Formal
Formal Equivalence
Equivalence
Checking
Checking

Feb 20, 2008

E0-286@SERC

Sequential
Sequential Circuits
Circuits
A sequential circuit has memory in addition to
combinational logic
Test for a fault in a sequential circuit is a
sequence of vectors, which
Initializes the circuit to a known state
Activates the fault, and
Propagates the fault effect to a PO
Methods of sequential circuit ATPG
Time-frame expansion methods
Simulation-based methods

Feb 20, 2008

E0-286@SERC

Example:
Example: A
A Serial
Serial Adder
Adder
An Bn

s-a-0

1
1

Cn

X
Cn+1

X
Combinational logic

FF
Feb 20, 2008

E0-286@SERC

Sn X

Time-Frame
Time-Frame Expansion
Expansion
An-1 Bn-1
1

An Bn

Time-frame -1
s-a-0

Cn-1

Time-frame 0
s-a-0

Cn

Cn+1

Combinational logic

Combinational logic

Sn-1

Sn

FF

Feb 20, 2008

E0-286@SERC

Concept
Concept of
of Time-Frames
Time-Frames
If the test sequence for a single stuck-at fault
contains n vectors,
Replicate combinational logic block n times
Place fault in each block
Generate a test for the multiple stuck-at fault
using combinational ATPG
Fault
Unknown
or given
Init. state

Comb.
block
Feb 20, 2008

Vector -n+1

Timeframe
-n+1
PO -n+1

State
variables

Vector -1

Vector 0

Timeframe
-1

Timeframe
0

PO -1

PO 0

E0-286@SERC

Next
state

Thank You
Feb 20, 2008

E0-286@SERC

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