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WritingIsolationStrategyinUPF|VLSICOMMUNITY

hhharishhh
Jul 27, 2014
Low
Power
Design
0

Isolation
strategy

is

required

implementation

to

tool

instruct

to

insert

isolation cells where a less-ON signal


drives a more-ON logic. Though tools
can infer this power domain relations
from

the

PST

state

implementation

table,

tools

the

doesnt

implement them without an isolation


strategy
states

specified.

do

not

Also

provide

the
the

PST
tools

sufficient information available for


inserting isolation cells like the clamp
value, supplies, and so many other
aspects. However the designer can
easily report the violations when the
isolation strategy you have defined is
not in line with the PST. An isolation
strategy can be written by using
following commands,
set_isolation_control

set_isolation

set_isolation

map_isolation_cell

command in UPF defines the name of


the Isolation strategy along with the
signals to be isolated and their clamp
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value. Clamp value is either 0 or 1


which

determines

the

type

of

isolation cell to be used.


Example,
[blockquote align=center]
set_isolation ISO_VDDA_TO_VDDB
-domain VDDA
-source VDDA_SUPPLY
-diff_supply_only TRUE
-isolation_power_net VDDB
-isolation_ground_net VSS
-name_suffix
ISO_LOW_VDDA_TO_VDDB
-clamp_value 0
[/blockquote][space_20]
In the example we defined a strategy
named ISO_VDDA_TO_VDDB. As the
name

suggests

this

strategy

is

defined for the signals that cross


from the domain VDDA to VDDB. The
option -domain specifies the name
of the domain which is to be isolated
hence VDDA. VDDA_SUPPLY is the
supply set of the power domain
VDDA.

By

specifying

the

source

option you indicate that the isolation


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strategy applies to pnly signal nets


whose driver is powered by the
supply specified in the -source
option. If you need to apply isolation
only when the supplies of the source
and the sink are different then we
need to provide TRUE for the option
diff_supply_only. The supply to be
used for the isolation cell can be
either the destination domain supply
or the always on supply. If the
destination

domain

is

also

an

ON/OFF domain then the destination


supply is better than the always on
supply because we could save some
power when the destination domain
is

in

OFF

state.

The

option

name_suffix helps the designer to


specify the suffix to the instance
name of isolation cell implemented
by the tool which helps for easy
identification and debug. Finally the
clamp_value which determines the
type of isolation cell whether its
clamp high or clamp low type.
There are many ways the designer
can customize the strategy lets see
few of them,
1. Designer can specify if the isolation
strategy to be applied for Inputs,
outputs or both. This can be achieved
by using -applies_to option. In the
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following example the strategy is


applied on only output ports of the
domain,
[blockquote align=center]
set_isolation ISO_VDDA_TO_VDDB
-domain VDDA
-source VDDA_SUPPLY
-diff_supply_only TRUE
-isolation_power_net VDDB
-isolation_ground_net VSS
-name_suffix
ISO_LOW_VDDA_TO_VDDB
-clamp_value 0
-applies_to outputs
[/blockquote][space_20]
2. In some scenarios, the designer
may specify only few ports of a
domain to be isolated. In that case
the

option

-elements

can

be

helpful. The elements option takes a


list of port with absolute hierarchy
path and applies isolation only to
those ports. In the example bellow,
the strategy is applied only to ports
fmg/write_req_out

and

fmg/read_ack_out
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WritingIsolationStrategyinUPF|VLSICOMMUNITY

[blockquote align=center]
set_isolation ISO_VDDA_TO_VDDB
-domain VDDA
-source VDDA_SUPPLY
-diff_supply_only TRUE
-isolation_power_net VDDB
-isolation_ground_net VSS
-name_suffix
ISO_LOW_VDDA_TO_VDDB
-clamp_value 0
-elements

fmg/write_req_out

fmg/read_ack_out}
[/blockquote][space_20]
3. Control signals like clocks should
not be routed through relatively less
ON domain than the sinks because
the isolation cell when enabled can
block its propagation. Designer can
explicitly specify tool not to isolate
specific signals using -no_isolation
option
[blockquote align=center]
set_isolation
NOISO_VDDA_TO_VDDB
-domain VDDA
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-no_isolation
-elements {fmg/core_clk}
[/blockquote][space_20]
4. Isolation cell can be forced on a
signal

by

option.

using

When

-force_isolation

the

option

force

isolation is used the tool implements


the

isolation

even

when

its

not

required or redundant. Also the tool


do not optimize away this isolation
even when there is no change to the
design functionality.
[blockquote align=center]
set_isolation
FORCE_ISO_VDDA_TO_VDDB
-domain VDDA
-force_isolation
-elements {gmf/php_ack_out}
[/blockquote][space_20]
set_isolation_control

command

is

used to specify the isolation enable


signal to the already defined isolation
strategy. The isolation enable signal
controls the enabling and disabling of
the isolation cell.
Example,

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WritingIsolationStrategyinUPF|VLSICOMMUNITY

[blockquote align=center]
set_isolation_control ISO_VDDA_TO_VDDB
-domain VDDA
-isolation_signal
pwr_ctrlr/iso_enable_vdda_to_vddb
-location parent
-isolation_sense low
[/blockquote][space_20]
In

the

example

we

defined

isolation

the

control

signal pwr_ctrlr/iso_enable_vdda_to_vddb
to

the

already

defined

isolation

strategy ISO_VDDA_TO_VDDB. The


option -isolation_signal can take a
port or pin or a net as the isolation
control.

The

option

-domain

specifies the domain to which the


isolation strategy applies. If you are
wondering if this is redundant since
we already specified the domain in
the strategy definition, yes it is. That
is how the IEEE standard 1801-2009
defined isolation strategy. However in
IEEE

1801-2013

command
deprecated

standard

set_isolation_control
by

enhancing

the
is
the

command set_isolation. As of today


synopsys
support

low

power

tools

still

set_isolation_control

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command.
Isolation sense together with the
clamp value determines the type of
isolation cell to be used for the
strategy

implementation.

Isolation

sense is the value (either high or low)


of the isolation control signal which
enables the isolation cell to isolate
the signal.
AND style: When the isolation sense
is low and the clamp value is 0 then
the AND gate can be used as an
isolation cell. Hence an AND style
isolation

cell

is

used

for

the

implementation.
OR style: When the isolation sense is
high and the clamp value is 1 then an
OR gate can be used as an isolation
cell. Hence an OR style isolation cell
is used for the implementation.
The location of the isolation cell
placement (with respect to the power
domains) can be controlled by the
designer using -location. Allowed
values for the option -location in
synopsys tools are self, parent and
fanout.
Self: Tool implements the isolation
cell in power domain that is specified
in the -domain option of the isolation
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strategy.

Parent: The tool places the isolation


cell in the parent hierarchy.

fanout: In this case the isolation cell


in the fanout logic domain. This
option is more useful when the signal
fansout to more than one power
domain so that a separate isolation
cell

is

placed

in

each

of

the

destination power domain.

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map_isolation_cell: This command is


used to specify the library cell to be
used for an isolation strategy. The
cells

specified

in

the

map_isolation_cell command must


match with the clamp value and the
isolation sense.
[blockquote align=center]
map_isolation_cell
ISO_VDDA_TO_VDDB
-lib_cells {isolowsrc2hr, isolowsrc3ur}
[/blockquote][space_20]

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