You are on page 1of 16

~ANALOG WDEVICES

+5 V Powered CMOS RS-232 Drivers/Receivers



ADM223/ADM230L -ADM241 L I

FEATURES

Single 5 V Power Supply

Meets All EIA-232-E and V.28 Specifications 120 kB/s Data Rate

On-Board DC-DC Converters

±9 V Output Swing with +5 V Supply Small 1 flF Capacitors

Low Power Shutdown :=;1 flA

Receivers Active in Shutdown (ADM223) ESD> 2 kV

±30 V Receiver Input Levels Latch-Up FREE

Plug-In Upgrade for MAX2231230-241 Plug-In Upgrade for AD230-AD241

APPLICATIONS

Computers

Peripherals

Modems

Printers

Instruments

GENERAL DESCRIPTION

The ADM2xx family of line drivers/receivers is intended for all EIA-232-E and V.28 communications interfaces, especially in applications where ± 12 V is not available. The ADM223, ADM230L, ADM235L, ADM236L and ADM241L feature a low power shutdown mode which reduces power dissipation to less than S j.L W making them ideally suited for battery powered equipment. Two receivers remain enabled during shutdown on the ADM223. The ADM233L and ADM235L do not require any external components and are particularly useful in applications where printed circuit board space is critical.

ADM232L TYPICAL OPERATING CIRCUIT

+5V INPUT

[ T11.

TTL/CMOS INPUTS*'

T21N

[R10UT

TTL/CMOS OUTPUTS

A20UT

1 RS·232

INPUTS'Idt

*INTERNAl 400kQ PULL·UP RESISTOR ON EACH TTL/CMOS INPUT ~INTERNAL 5kQ PULL·DOWN RESISTOR ON EACH RS·232 INPUT

All members of the ADM230L family, except the ADM231L and the ADM239L, include two internal charge pump voltage converters which allow operation from a single +S V supply. These converters convert the + 5 V input power to the ± 10 V required for RS-232 output levels. The ADM231L and ADM239L are designed to operate from + S V and + 12 V supplies. An internal + 12 V to -12 V charge pump voltage converter generates the -12 V supply.

The ADM2xxL is an enhanced upgrade for the AD2xx family featuring lower power consumption, faster slew rate and operation with smaller (1 f-LF) capacitors.

Table I. Selection Table

No. of No. of Low Power TTL
Part Power RS-232 RS-232 External Shutdown Three-State No. of
Number Supply Voltage Drivers Receivers Capacitors (SO) EN Pins
ADM223 +S V 4 5 4 Yes (SD) Yes (EN) 28
ADM230L +5 V 5 0 4 Yes No 20
ADM231L +5 V & +7.5 V to +13.2 V 2 2 2 No No 14
ADM232L +5 V 2 2 4 No No 16
ADM233L +S V 2 2 None No No 20
ADM234L +5 V 4 0 4 No No 16
ADM23SL +S V 5 5 None Yes Yes 24
ADM236L +5 V 4 3 4 Yes Yes 24
ADM237L +5 V 5 3 4 No No 24
ADM238L +5 V 4 4 4 No No 24
ADM239L +5 V & +7.5 V to +13.2 V 3 5 2 No Yes 24
ADM241L +5 V 4 5 4 Yes Yes 28 REV. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326·8703

ADM223/ADM230L-ADM241L-SPECIFICATIONS~2L.~4t.~:l,~8~~~9~~~~~)~3Vc!1:

+5 V ± 5% (ADM230L, 33l, 35l, 37L); V+ = 7.5 V to 13.2 V (ADM231l & ADM239l); C1-C4 = 1.0 f.tF Ceramic. All Specifications TMIN to TMAX unless otherwise noted.)

Parameter Min Typ Max Units Test Conditions/Comments
Output Voltage Swing ±5 ±9 Volts All Transmitter Outputs Loaded with 3 k!1 to Ground
Vee Power Supply Current 2 3.0 rnA No Load, All TINS = V cc (except ADM223)
3.5 6 rnA No Load, All TINS = GND
0.4 1 rnA ADM231L, ADM239L
V + Power Supply Current 1.5 4 rnA No Load, V+ = 12 V ADM23lL & ADM239L Only
Shutdown Supply Current 1 5 f-lA
- -
Input Logic Threshold Low, VINL 0.8 V TIN' EN, SD, EN, SD
Input Logic Threshold High, VINH 2.0 V TIN' EN, SD, EN, SD
Logic Pull-Up Current 10 25 f-lA TIN = 0 V
RS-232 Input Voltage Range -30 +30 V
RS-232 Input Threshold Low 0.8 1.2 V
RS-232 Input Threshold High 1.7 2.4 V
RS-232 Input Hysteresis 0.2 0.5 1.0 V
RS-232 Input Resistance 3 5 7 k!1
TTL/CMOS Output Voltage Low, VOL 0.4 V
TTL/CMOS Output Voltage High, VOH 3.5 V lOUT = -1.0 rnA
TTL/CMOS Output Leakage Current 0.05 ±5 f-lA EN = V co 0 V :5: ROUT :::s V cc
Output Enable Time (TEN) 250 ns ADM223, ADM235L, ADM236L, ADM239L, ADM24lL
(Figure 25. CL = 150 pF)
Output Disable Time (T DIS) 50 ns ADM223, ADM235L, ADM236L, ADM239L, ADM241L
(Figure 25. RL = 1 k!1)
Propagation Delay 0.5 fLS RS-232 to TTL
Instantaneous Slew Ratel 25 30 V/f-lS CL = 10 pF, RL = 3-7 k!1, TA = +25°C
Transition Region Slew Rate 5 V/f-lS RL = 3 k!1, CL = 2500 pF
Measured from +3 V to -3 V or -3 V to +3 V
Output Resistance 300 !1 V cc = V + = V - = 0 V, V OUT = ±2 V
RS-232 Output Short Circuit Current ±10 rnA NOTE

"Sample tested to ensure compliance.

Specifications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS* (T A = 25"C unless otherwise noted)

V cc -0.3 V to +6 V

V+ (Vee - 0.3 V) to +14 V

V- +0.3Vto-14V

Input Voltages

TIN -0.3 V to (Vee + 0.3 V)

RIN ±30 V

Output Voltages

TOUT (V+, + 0.3 V) to (V-, - 0.3 V)

ROUT -0.3 V to (V cc + 0.3 V)

Short Circuit Duration

TouT Continuous

Power Dissipation

N-14 DIP (Derate 10 rnWrC above +70°C) 800 mW

N-16 DIP (Derate 10.5 mwrc above +70°C) 840 mW

N-20 DIP (Derate 11 mwrc above +70°C) 890 mW

N-24 DIP (Derate 13.5 rnWrC above +70°C) 1000 rnW

N-24A DIP (Derate 13.5 mwrc above +70°C) 500 mW

R-16 sorc (Derate 9 rnWrC above +70°C) 760 mW

R-20 sorc (Derate 9.5 mwrc above +70°C) 800 mW

R-24 sorc (Derate 12 mW/oC above +70°C) 850 mW

R-28 sorc (Derate 12.5 rnW/oC above +70°C) 900 mW

RS-28 SSOP (Derate 10 mW/oC above +70°C) 900 rnW

Q-14 Cerdip (Derate 10 mW/oC above +70°C) 720 mW

Q-16 Cerdip (Derate 10 mwrc above +70°C) 800 mW

Q-20 Cerdip (Derate 11.2 rnW/oC above +70°C) 890 mW

Q-24 Cerdip (Derate 12.5 mwrc above +70°C) " 1000 mW D-24 Ceramic (Derate 20 mW/oC above +70°C) " 1000 mW

Thermal Impedance, flJA

N-14 DIP 140°CIW

N-16 DIP 135°CIW

N-20 DIP 125°CIW

N-24 DIP 120°CIW

N-24A DIP Il0°CIW

R-16 sorc 105°CIW

R-20 sorc 105°CIW

R-24 sorc 85°CIW

R-28 sorc 80°CIW

RS-28 SSOP 100°CIW

Q-14 Cerdip 105°CIW

Q-16 Cerdip 100°CIW

Q-20 Cerdip 100°CIW

Q-24 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . .. 55°CIW

D-24 Ceramic 50°CIW

Operating Temperature Range

Commercial (J Version) 0 to +70°C

Industrial (A Version) -40°C to +8SoC

Storage Temperature Range -65°C to + 150°C

Lead Temperature, Soldering + 300°C

Vapour Phase (60 sec) +21SoC

Infrared (15 sec) +220°C

ESD Rating >2000 V

*This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.

ADM223/ADM230L -ADM241 L

ORDERING GUIDE

Temperature Package Temperature Package Temperature Package
Model Range Option* Model Range Option* Model Range Option*
ADM223 ADM230L ADM231L
ADM223AR -40°C to +85°C R-28 ADM230LJN DoC to +70°C N-20 ADM231LJN O°C to +70°C N-14
ADM223ARS -40°C to + 85°C RS-28 ADM230LJR DoC to +70°C R-ZO ADM231LJR O°C to +70°C R-16
ADM230LAN -40°C to +85°C N-20 ADM231LAN -40°C to +85°C N-14
ADM230LAR -40°C to +8SoC R-20 ADM231LAR -40°C to +85°C R-16
ADM230LAQ -40°C to +8SoC Q-20 ADM231LAQ -40°C to +85°C Q-14
ADM232L ADM233L ADM234L
ADM232LJN DoC to +70°C N-16 ADM233LJN DoC to +70°C N-20 ADM234LJN DoC to +70°C N-16
ADMZ3ZLJR DoC to +70°C R-16 ADM233LAN -40°C to +85°C N-20 ADM234LJR O°C to +70°C R-16
ADM232LAN -40°C to +8SoC N-16 ADM234LAN -40°C to +8SoC N-16
ADM232LAR -40°C to +85°C R-16 ADM234LAR -40°C to +85°C R-16
ADM232LAQ -40°C to +85°C Q-16 ADM234LAQ -40°C to +85°C Q-16
ADM235L ADM236L ADM237L
ADM235LJN DoC to +70°C N-24A ADM236LJN DoC to +70°C N-24 ADM237LJN O°C to +70°C N-24
ADM235LAN -40°C to + 85°C N-24A ADM236LJR DOC to +70°C R-24 ADM237LJR DoC to +70°C R-24
ADM235LAQ -40°C to + 85°C D-24 ADM236LAN -40°C to +85°C N-24 ADM237LAN -40°C to +85°C N-24
ADM236LAR -40°C to +85°C R-24 ADM237LAR -40°C to +85°C R-24
ADM236LAQ -40°C to +85°C Q-24 ADM237LAQ -40°C to +85°C Q-Z4
ADM238L ADM239L ADM241L
ADM238LJN O°C to +70°C N-24 ADM239LJN O°C to +70°C N-24 ADMZ41LJR O°C to +70°C R-28
ADM238LJR DoC to +70°C R-24 ADM239LJR O°C to +70°C R-24 ADM241LAR -40°C to +85°C R-28
ADM238LAN -40°C to +8SOC N-24 ADM239LAN -40°C to +85°C N-24 ADMZ41LJRS O°C to +700C RS-28
ADM238LAR -40°C to +85°C R-24 ADM239LAR -40°C to +85°C R-24 ADMZ41LARS -40°C to +85°C RS-28
ADM238LAQ -40°C to +85°C Q-24 ADM239LAQ -40°C to +85°C Q-24 *N = Plastic DIP; Q = Cerdip; R = Small Outline Ie (SOIC); RS = Small Shrink Outline Package eSSOp).

ADM223/ADM230L-ADM241 L

+5V INPUT

T40UT
T51N
NC
SD
T50UT
T41N
T31N
V-
C2- TTL,lCMOS
C2+ INPUTS* +5V TO +10V VOLTAGE DOUBLER

RS-232 OUTPUTS

NC = NO CONNECT

Figure 1. ADM230L DIP/SOIC Pin Configuration

*INTERNAl 400kQ PUll-UP RESISTOR ON EACH TTL,lCMOS INPUT

Figure 2. ADM230L Typical Operating Circuit

DIP
ct- v+
Vee
v- GND
T10UT
R21N RllN
R20UT
T21N
sOle
v+
Vee
v- GND
T10UT
R21N RllN
R10UT
T21N TllN
NC = NO CONNECT
Figure 3. ADM231 L DIP & SOIC Pin Configurations +5V INPUT

[ T1IN

TTUCMOS INPUTS'

T~N

+7.5V TO 13.2V

T1 1

OUT RS-232

OUTPUTS T20UT

[R10UT

TTUCMOS OUTPUTS

R20UT

1 RS-232

INPUTS·'

'INTERNAL 400kQ PUll-UP RESISTOR ON EACH TTUCMOS INPUT -·INTERNAl 5kQ PUll-DOWN RESISTOR ON EACH RS-232 INPUT

Figure 4. ADM231L Typical Operating Circuit (DIP Pinout)

ADM223/ADM230L -ADM241 L

+SV INPUT

[ T11N

TTL/CMOS INPUTS*

T21N

+SVTO .10V VOLTAGE DOUBLER

T10UT) RS-232 OUTPUTS T20UT

Figure 5. ADM232L DIP/SOIC Pin Configuration

[R10UT

TTWCMOS OUTPUTS

R20UT

) RS-232

INPUTS-

*INTERNAL 400kQ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT **INTERNAL SkQ PULL·DOWN RESISTOR ON EACH RS-232 INPUT

Figure 6. ADM232L Typical Operating Circuit

.5V INPUT

[R10UT

TTL/CMOS OUTPUTS

R20UT

T1OUT)

RS-232

OUTPUTS T20UT

( T11N

TTL/CMOS INPUTS*

T21N

) RS·232

IN PUTS-

Figure 7. ADM233L DIP Pin Configuration

INTERNAL { -10VPOWER SUPPLY

INTERNAL .10VPOWER SUPPLY

ADM233L

DO NOT MAKE { CONNECTIONS TO THESE PINS

*INTERNAL 400kQ PULL-UP RESISTOR ON EACH TTUCMOS INPUT "INTERNAL 5kQ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

Figure 8. ADM233L Typical Operating Circuit

ADM223/ADM230L -ADM241 L

+SVINPUT

Figure 9. ADM234L DIP/SOIC Pin Configuration

TTLfCMOS INPUTS·

+5VTO+l0V VOLTAGE DOUBLER

RS-232 OUTPUTS

*INTERNAL 400kQ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT

Figure 10. ADM234L Typical Operating Circuit

+5V INPUT

Figure 11. ADM235L DIP Pin Configuration

TllN T10UT
T21N T20UT

TTL/CMOS T31N T30UT RS-232
INPUTS· OUTPUTS
T41N T40UT
T51N T50UT

RloUT RllN

R20UT R21N

TTLfCMOS R30UT R31N RS-232
OUTPUTS INPUTS"
R40UT R41N

R50UT R51N

EN SO "INTERNAL 400kQ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT "INTERNAL 5kQ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

Figure 12. ADM235L Typical Operating Circuit

ADM223/ADM230L -ADM241 L

+SVINPUT

T40UT

TIL/CMOS INPUTS·

+SVTO +10V VOLTAGE DOUBLER

SD EN

R30UT

Vee Ch

RS-232 OUTPUTS

V-

V+

C2-

Cl-

C2+

[R10UT

TIL/CMOS OUTPUTS R20UT

R30UT

] RS-232

INPUTS**

Figure 13_ ADM236L DIP/SOIC Pin Configuration

·,NTERNAL 400kQ PULL-UP RESISTOR ON EACH TIL/CMOS INPUT **INTERNAL 5kQ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

Figure 14_ ADM236L Typical Operating Circuit

+5V INPUT

T40UT
R2'N
R20UT
T5'N
T50UT
T4'N
T3'N
R30UT
R3'N TIL/CMOS
V- INPUTS·
C2-
C2+ +5V TO +10V VOLTAGE DOUBLER

RS-232 OUTPUTS

Figure 15_ ADM237L DIP/SOle Pin Configuration

[R10UT

TIL/CMOS OUTPUTS R20UT

R30UT

R2'N ] RS-232

INPUTS**

R3'N

·,NTERNAL 400kQ PULL-UP RESISTOR ON EACH TIL/CMOS INPUT "INTERNAL 5kQ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

Figure 16_ ADM237L Typical Operating Circuit

ADM223/ADM230L-ADM241 L

+SV INPUT

T40UT T3IN

TTL/CMOS INPUTS*

+SV TO +10V VOLTAGE DOUBLER

T30UT

R30UT

RS-232 OUTPUTS

R40UT

C2+

TTL/CMOS OUTPUTS

R20UT

ci-

V-

R10UT

V+

C2-

Cl-

RS-232 INPUTS**

Figure 17. ADM238L DIP/SOIC Pin Configuration

R40UT

*INTERNAL 400kQ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT "INTERNAL SkQ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

Figure 18. ADM238L Typical Operating Circuit

+12VTO-12V VOLTAGE INVERTER

+5V INPUT

+ l'IAF",*-

+7.SV TO +13.2V INPUT

~

11-'F ":"

16V

TTL/CMOS OUTPUTS R30UT

l TllN

TTL/CMOS T2IN

INPUTS*

T1OUT]

2 RS-232

T OUT OUTPUTS

T30UT

NC = NO CONNECT

RSOUT

RS-232 INPUTS**

Figure 19. ADM239L DIP/SOIC Pin Configuration

*INTERNAL 400kQ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT "INTERNAL SkQ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

Figure 20. ADM239L Typical Operating Circuit

ADM223/ADM230L-ADM241 L

+SV INPUT

TTWCMOS INPUTS*

T40UT
R31N
R30UT
SO
EN
T21N R41N
R40UT
R10UT T"'N
RllN T31N
GND RSOUT
Vee RS1N
Cl+ V-
V+ C2-
Cl- C2+ ... SVTO +10V VOLTAGE DOUBLER

RS-232 OUTPUTS

TTLJCMOS OUTPUTS

R30UT

RS-232 INPUTS"

R20UT

R40UT

Figure 21. ADM241L SOICISSOP Pin Configuration

RSOUT

*INTERNAL 400kn PULL-UP RESISTOR ON EACH TTLJCMOS INPUT **INTERNAL Skn PULL-DOWN RESISTOR ON EACH RS-232 INPUT

Figure 22. ADM247L Typica{ Operating Circuit

... SVINPUT

TTWCMOS INPUTS*

R10UT

T20UT

R30UT

T30UT

T40UT

... SVTO +10V VOLTAGE DOUBLER

GND

R50UT

RS-232 OUTPUTS

R40UT

Vee

ct-

V-

Cl-

C2 ...

TTWCMOS OUTPUTS

R30UT

RS-232 INPUTS'"

V+

C2-

R20UT

Figure 23. ADM223 SO{CISSOP Pin Configuration

R40UT

*INTERNAL 400kQ PULL-UP RESISTOR ON EACH TTWCMOS INPUT **INTERNAL SkQ PULL-DOWN RESISTOR ON EACH RS-232 INPUT NOTE: RECEIVERS R4 AND R5 REMAIN ACTIVE IN SHUTDOWN.

Figure 24. ADM223 Typica{ Operating Circuit

ADM223/ADM230L -ADM241 L

PIN FUNCTION DESCRIPTION

Mnemonic Function

Vee Power Supply Input 5 V ± 10% (+5 V ± 5% ADM233L, ADM23SL).

V+ Internally generated positive supply (+10 V nominal) on all parts except ADM23lL and ADM239L.

ADM231L, ADM239L requires external 7.5 V to 13.2 V supply.

V - Internally generated negative supply ( -10 V nominal).

GND Ground pin. Must be connected to 0 V.

C+ (ADM23lL and ADM239L only). External capacitor (+ terminal) is connected to this pin.

C- (ADM23lL and ADM239L only). External capacitor (- terminal) is connected to this pin.

Cl + (ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM24lL) External capacitor (+ terminal) is connected to this pin.

(ADM233L) The capacitor is connected internally and no external connection to this pin is required.

Cl- (ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM24lL) External capacitor (- terminal) is connected to this pin.

(ADM233L) The capacitor is connected internally and no external connection to this pin is required.

C2+ (ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM241L) External capacitor (+ terminal) is connected to this pin.

(ADM233L) Internal capacitor connections, Pins 11 and IS must be connected together.

C2- (ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM241L) External capacitor (- terminal) is connected to this pin.

(ADM233L) Internal capacitor connections, Pins 10 and 16 must be connected together.

TIN

ROUT

EN/EN

SD/SD

NC

Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kO pull-up resistor to Vee is connected on each input.

Transmitter (Driver) Outputs. These are RS-232 levels (typically ± 10 V).

Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kG pull-down resistor to GND is connected on each input.

Receiver Outputs. These are TTL/CMOS levels.

Enable Input. Active low on ADM235L, ADM236L, ADM239L, ADM241L. Active high ADM223. This input is used to enable/disable the receiver outputs. With EN = low (EN = high ADM223), the receiver outputs are enabled. With EN = high (EN = low ADM223), the outputs are placed in a high impedance state. This facility is useful for connecting to microprocessor systems.

Shutdown Input. Active high on ADM235L, ADM236L, ADM241L. Active low on ADM223. With SD = high on the ADM23SL, ADM236L, ADM241L, the charge pump is disabled, the receiver outputs are placed in a high impedance state and the driver outputs are turned off. With SD low on the ADM223, the charge pump is disabled, the driver outputs are turned off and all receivers except R4 and RS are placed in a high impedance state. In shutdown, the power consumption reduces to 5 fJ-W.

No Connect. No connections are required to this pin.

Table II. ADM223 Truth Table

Table I. ADM23SL, ADM236L, ADM241L Truth Table

Transmitters Receivers
SD EN Status TI-TS RI-RS
0 0 Normal Operation Enabled Enabled
0 1 Normal Operation Enabled Disabled
I 0 Shutdown Disabled Disabled Transmitters Receivers
SD EN Status TI-T4 RI-R3 R4,RS
0 0 Shutdown Disabled Disabled Disabled
0 1 Shutdown Disabled Disabled Enabled
1 0 Normal Operation Enabled Disabled Disabled
1 1 Normal Operation Enabled Enabled Enabled Typical Performance Characteristics-ADM223/ADM230L -ADM241 L

8


--.... ~
~ ~
-=::::: ~
IV-I r.:::::::: I::.:--..
~ 10

6

./
/" V
VOUT (1 OIP LOADE~ V ~
/' V V
/' V ~UT (ALL OIPs LOADED)
"'
V_,/ ~
v 10

> 6 I

....

5

>

> 8 I

....

:::J

o

>

4

2

o

o

10

30

40

4 3.0

4.0

5.0

Figure 25. Charge Pump V+, V- VS. Current

Figure 27. Transmitter Output Voltage VS. Vee

8


\
\
I\.
\
\
-,
-,
r-,
"-
<,
<,
.._ 12

~

I 12

~

..:

II:

~ 10 ~

<I>

8



t-.._ ............ I--
<; ~HIGH
<, r--.... - --
....................
TOUT LOW <,
<,
~
18

16

10

14

> I

~ 6 t-"

4

2

6

4

o

500

1000

1500

2000

2500

o

o

2

6

8

CAPACITIVE LOAO - pF

Figure 26. Transmitter Slew Rate VS. Load Capacitance

Figure 28. Transmitter Output Voltage vs. Current

300

r.....
............... r-- V- (UNLOADED)

r-----.
~(LOADED)
i-- v.1 (UNLOADED)
V. (LOADED) a I W

~ 200 i§

W IL

!

I

>

;100

o

3

4 VCC -V

5

Figure 29. Charge Pump Impedance VS. Vee

ADM223/ADM230L -ADM241 L

Figure 30. Charge Pump, V+, V- Exiting Shutdown

Figure 31. Transmitter Output Loaded Slew Rate

Figure 32. Transmitter Output Unloaded Slew Rate

GENERAL INFORMATION

The ADM223/ADM230L-ADM24lL family of RS-232 drivers/ receivers are designed to solve interface problems by meeting the EIA-232-E specifications while using a single digital + 5 V supply. The EIA-232-E standard requires transmitters which will deliver ± 5 V minimum on the transmission channel and receivers which can accept signal levels down to ± 3 V. The ADM223!ADM230L-ADM24lL meet these requirements by integrating step up voltage converters and level shifting transmitters and receivers onto the same chip. CMOS technology is used to keep the power dissipation to an absolute minimum. A comprehensive range of transmitter/receiver combinations is available to cover most communications needs.

The ADM223, ADM230L, ADM23SL, ADM236L and ADM24lL are particularly useful in battery powered systems as they feature a low power shutdown mode which reduces power dissipation to less than 5 j.1 W.

The ADM233L and ADM23SL are designed for applications where space saving is important as the charge pump capacitors are molded into the package.

The ADM23lL and ADM239L include only a negative charge pump converter and are intended for applications where a positive 12 V is available.

To facilitate sharing a common line or for connection to a microprocessor data bus the ADM23SL, ADM236L, ADM239L and ADM24lL feature an enable (EN, EN) function. When disabled, the receiver outputs are placed in a high impedance state.

CIRCUIT DESCRIPTION

The internal circuitry in the ADM230L-ADM241L consists of three main sections. These are:

(a) A charge pump voltage converter (b) RS-232 to TTL/CMOS receivers (c) TTL/CMOS to RS-232 transmitters

Charge Pump DC-DC Voltage Converter

The charge pump voltage converter consists of an oscillator and a switching matrix. The converter generates a ± 10 V supply from the input 5 V level. This is done in two stages using a switched capacitor technique as illustrated in Figures 33 and 34. First, the 5 V input supply is doubled to 10 V using capacitor CI as the charge storage element. The 10 V level is then inverted to generate -10 V using C2 as the storage element.

INTERNAL OSCILLATOR

Figure 33. Charge-Pump Voltage Doubler

ADM223/ADM230L -ADM241 L

INTERNAL OSCILLATOR

Figure 34. Charge-Pump Voltage Inverter Capacitors C3 and C4 are used to reduce the output ripple. Their values are not critical and can be reduced if higher levels of ripple are acceptable. The charge pump capacitors CI and C2 may also be reduced at the expense of higher output impedance on the V + and V - supplies.

The V + and V - supplies may also be used to power external circuitry if the current requirements are small.

Transmitter (Driver) Section

The drivers convert TTL/CMOS input levels into EIA-232-E output levels. With Vee = + 5 V and driving a typical ElA- 232-E load, the output voltage swing is ±9 V. Even under worst case conditions the drivers are guaranteed to meet the ±5 V ElA-232-E minimum requirement.

The input threshold levels are both TTL and CMOS compatible with the switching threshold set at V cc/4. With a nominal

Vee = 5 V the switching threshold is 1.25 V typical. Unused inputs may be left unconnected, as an internal 400 kn pull-up resistor pulls them high forcing the outputs into a low state.

As required by the EIA-232-E standard, the slew rate is limited to less than 30 V/fJ.-s without the need for an external slew limiting capacitor and the output impedance in the power-off state is greater than 300 n.

Receiver Section

The receivers are inverting level shifters which accept EIA- 232-E input levels (± 5 V to ± 15 V) and translate them into 5 V TTL/CMOS levels. The inputs have internal 5 kn pull-down resistors to ground and are also protected against overvoltages of up to ±30 V. The guaranteed switching thresholds are 0.8 V minimum and 2.4 V maximum which are well within the ±3 V EIA-232-E requirement. The low level threshold is deliberately positive as it ensures that an unconnected input will be interpreted as a low level.

The receivers have Schmitt trigger inputs with a hysteresis level of 0.5 V. This ensures error-free reception for both noisy inputs and for inputs with slow transition times.

Shutdown (SD)

The ADM223, ADM230L, ADM235L, ADM236L and ADM24lL feature a control input that may be used to disable the part and reduce the power consumption to less than 5 fL W. This is very useful in battery operated systems. During shutdown the charge pump is turned off, the transmitters are disabled and all receivers except R4 and R5 on the ADM223 are put into a high-impedance disabled state. Receivers R4 and R5 on the ADM223 remain enabled during shutdown. This feature allows monitoring external activity such as ring indicator monitoring while the device is in a low power shutdown mode.

The shutdown control input is active high on all parts except the ADM223 where it is active low. Refer to Tables I and II.

Enable Input

The ADM235, ADM239, ADM24lL and ADM223 feature an enable input used to enable or disable the receiver outputs. The enable input is active low on the ADM235L, ADM239L, ADM24lL and active high on the ADM223. Refer to Tables I and II. When disabled, all receiver outputs are placed in a high impedance state. This function allows the outputs to be connected directly to a microprocessor data bus. It can also be used to allow receivers from different devices to share a common data line. The timing diagram for the enable function is shown in Figure 35.

E:----'\ J

ov ---- ,'-- _J,

, ,

TEN -..r ~ TOIs"" r.-

_____ -<1 as \ ,~-,."

\,_. _o._8V ..Jf VVOL + O.lV

ROUT

'POLARITY OF EN IS REVERSED FOR ADM223.

Figure 35. Enable Timing

APPLICATION HINTS Driving Long Cables

In accordance with the EIA-232-E standard, long cables are permissible provided that the total load capacitance does not exceed 2500 pF. For longer cables which do exceed this, then it is possible to trade off baud rate vs. cable length. Large load capacitances cause a reduction in slew rate, and hence the maximum transmission baud rate is decreased. The ADM230L-ADM241L are designed so that the slew rate reduction with increasing load capacitance is minimized.

For the receivers, it is important that a high level of noise immunity be inbuilt so that slow rise and fall times do not cause multiple output transitions as the signal passes slowly through the transition region. The ADM230L-ADM24IL have 0.5 Vof hysteresis to guard against this. This ensures that, even in noisy environments, error-free reception can be achieved.

High Baud Rate Operation

The ADM230L-ADM24IL feature high slew rates permitting data transmission at rates well in excess of the EIA-232-E specification. The drivers maintain ±5 V signal levels at data rates up to 100-kB/s under worst-case loading conditions.

ADM223/ADM230L -ADM241 L

OUTLINE DIMENSIONS

Dimensions shown in inches and (nun),

14-Lead Plastic DIP (N-14)

I---- 0.795 (20.19) Ir-- 0.725 (18.42)

0.022 (0.SS8) 0014 (0.356)

0.100 (2.54) 8SC

0.070 (1.77) 0.045 (1 15)

Ifi-Lead Plastic DIP (N-16)

"',i~ : : : : : : ~g~:~

I 0.840 (21.33) I l 0.325 (8.25) E

4 0.745 (18.93) • 0.300 (7.62) __i

~~0'060(1'52)

0.210 0.015 (0.38) (,1------1:; 0.195 (4 95)

(5.33) b 0115 (2.93)

~~~~ ~~:~ - - - - - ] [ ~Jf31;:;

-I j.. j..-i SEATING

0.022 (0.558) 0.100 0.070 (1.77) PLANE

0.014 (0.356) (254) 0.045 (1.' 5) esc

16-Lead SOIC (R-16)

1

16

0.299 (760) 0.291 (7.40)

PIN 1 1 ::-.:: r

'" : 8 I

0.413 (10.50) -1 0.107 (2.72)

0.348 (1 0.1 0) 0.089 (2.26) 0 364 (9.246)

j_ I:=~-I

~~ro~u~C~D~rr~m~D~~~~~H ~JC )l

:r -.j ~ -I ~ --. "f 0.045(1.15)..1 j..

0.0'0 (0.25) 0.050 (1.27) 0.018 (0.46) 0.015 (0.38) 0.020 (0 50)

0.004 (0.10) esc 0.014 (0 36) 0.007 (1.18)

14-Lead Cerdip (Q-14)

16-Lead Cerdip (Q-16)

0.780 (19.81) ----+I

ADM223/ADM230L -ADM241 L

20-Lead Plastic DIP (N-20)

20-Lead Cerdip (Q-20)

90)

1.060 (26.
I 0.925 (23 SO)

~y {' 1'" ld '" ~ '" ld" 0060(1.52~~~~~

J L ~:.;

.l:~b

0.125 (3.1ij -11-

0.022 (0.558) 0.01' (0 356)

1--1

0.100 (2.54) Bse

0070 (1.78) SEATING 0045 (1 .15) PLANE

20-Lead SOIC (R-20)

24-Lead Plastic DIP (N-24)

'.~~:::::::::: J~::~'

1.228(31.19) 1032(8128)r

~~·"~R030(7.62)

= __ ~~ fr8 (3.25) l

J L SEATING

-11+ ~ PLANE --I ~ 0011 (028)

o 02 (0 5) 0 11 (2 79) 0 07 (1 78) 0 0 009 (0.23)

0.016 (0.41) 0.09 (2 28) 005 (1.27)

NOTES

1 LEAD NO 1 IDENTIFIED BY DOT OR NOTCH

2 PLASTIC LEADS WILL BE EITHER SOLDER DIPPED OR TIN PLATED IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS

24-Lead Ceramic DIP (D-24)

o.oos (0 13) 0098 (249)

".1:7 n n r J[ n ~ ~:~ f1:::~

~ ~ J ;; ;; ;; ;; ~ ~ _l '~'''''-I

f4.----- 1.290 (32.77) _10.075 (1 91) t ~ =;1

0.225~0.015(0.38) (572)

0200(508) - - - - - - - -u- u- - ~ 0.150 0.015(038)

ii"12O(3Osj (3.81) 0.008 (0.20)

-I~ -I I- -

0.023 (0.58) 0.110 (2.79) 0.070 (1.78) SEATING

0014 (0.36) 0 090 (2.29) 0030 (0.76) PLANE

24-Lead Plastic DIP (N-24A)

..a,..L:l.....D.1I....a..o.....a....a. ~
24 13 I
0.55 (13.97)
PIN 1 063(13.47)
'\ _l
·1 12 ~ o.eee n .. ,

~__i rr~~

0.2~ 0.16(407) G ~

(t~~ ~3.58)

o 175 (4.45) U U"\ L

0.12 (3.05) _ u., _" _ \ ~ 150

._,,_. _.,,_ 1"0 0.012 (0.305)

0.02 (0.508) 0.105 (267) 0.065 (1.66) SEATING 0 0.008 (0.203)

0.015(0381) 0095(242) 0045(115) PLANE

ADM223/ADM230L-ADM241 L

24-Lead Cerdip (Q-24)

""~~:::::::::: :13"' ... ~'8'

0.225~~JO'I80 1A_o'290(7366)1

(5.715) (4.572)

M~X M~

(3~;~~~ - - - - - - - -1-11-1- l'~~~~G [

MIN -114- .., f+- ~ ~ 0.070 (1.778) "*"f 0.012 (0.305)

0021 (0.533) 0.110(2 794) 0.065 (1.651) 0.020 (0.508) ~' 0.008 (0 203)

0.015 (0.381) 0090 (2.286) 0.055 (1.397) 0' TYP

TYP TYP TYP

1. LE~D NO llDENTIAED BY DOT OR NOTCH.

2 CERDIP LE~DS WILL BE EITHER TIN PLATED OR SOLDER DIPPED IN ACCORDANCE WITH MIL-M-3B51 0 REQUIREMENTS.

24-Lead SOIC (R-24)

)~

0.042 (1.067) -i 1+ 0.018 (0.447)

1 LEAD NO.1 IDENTIFIED BY A DOT.

2. soic LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED IN ~CCORDANCE WITH MIL-M-38510 REQUIREMENTS

28-Lead SOIC (R-28)

1. LEAD NO. IDENTIFIED BY A DOT.

2. SOICLE~DS WILL BE EITHER TIN P~TED OR SOLDER DIPPED IN ACCORDANCE WITH MIL-M-3B510 REQUIREMENTS.

28-Lead SSOP (RS-28)

2 C u l- 2

a. C.