(2 United States Patent Mann 'S006838651B1 (10) Patent No 45) Date of Patent: US 6,838,651 BL Jan, 4, 2005, os HIGH SENSITIVITY SNAP SHOT CMOS IMAGE SENSOR, (15) taveotor: Richard A. Mann, Torance, CA (US) (73) Assignee: ESS Technology, Ine, Fremont, CA Ws) (*) Notie: Subject to ay dislaimes the term ofthis patent is extended o adjusted under 35 USC. 154) by O days, (21) Appl. No. 10/113,545 (22) Filed: Mar. 28, 2002, G1) mc HOIL 27/00, (2) US.CL 2807208.1; 250214 DC; 250226 (58) Fle of Search 2507208.1, 14 DC, 2501226, 214 R; 356/416, 419; 341/155; 348.272, 294, 273, 280, 266; 3581474, 482 60) References Cited US. PATENT DOCUMENTS BOTLEGS A+ 71976 Bayer 38276 5461425 A+ 101005 Fowler ea: S204 390880 BL + 42002 Bidermann Sass (611280 BL ° 82013 Yuet al 318265 * cited by examiner Primary Examiner—Thah X. Law ‘Assistant Examiner—Seung C. Soba (14) Anorney, Agent, or Firm —Parjami & Farami LLP on ABSTRACT. ‘The present invention is directed to a solid state imaging device comprising « red pixel, a blue pixel, a fist green pixel, a second green pixel, wo analg-to-digital converters, fand« color interpolation czeuit. The fist analog-o-digital ‘converter converts the output of the red pixel and output of the blue pixel iato digital signals, The second analog-o- ligta converter convers the output ofthe fist green pixel ‘and output ofthe second green pixel into digital signals. The color interpolation cireut combines the digital signals to | i | fauna. g S| aie z 8 oltja 2 | 5 3| | soa g . - 8 £ | ae — ze? 9 i a 2 H a giz 2 — t ~202 a o| Wa [° 02 z0z - _ 012 49248009 a/v | {AB HPRHOD | ae _— OzUS 6,838,651 BL Sheet 3 of 3 -——_—, ¢ Old [ainowio | 90E nae|odsaqut x 40109 | e x va ozs ove _7foxes3u99 99019 | 8ZE aiqewwesbo1g | {XS setiantios ara _ 5 ‘JeqJOAUOD OY a fonuco Jan. 4, 2005 U.S. Patent *duioa JOI3 ze? yno419, | la 11 4e}9nu0D aryUS 6,838,651 BI 1 HIGH SENSITIVITY SNAP SHOT CMOS IMAGE SENSOR ‘TECHNICAL FIELD This invention relates generally 1 solidstate imaging devices such as Complementary Metal Oxide Semiconduc- tor (*CMOS") solid-state imagers. More particularly the invention relates toa solid-state imaging device implement- ‘ng multiple analog-o-digital (“A/D”) converters to obtain high frame rates. BACKGROUND OF THE INVENTION Solid-state image sensors (also known as “image sensors" “imagers,” or “solid-state imagers") have broad applications in many areas including commercial consumer, Industral, medical, defense and scientific fields. Solid-state jmage sensors convert a received image such as from an object into a signal indicative of the received image Examples of solidstate image sensors including charge coupled devices CCD"), photodiode arrays charge injec tion devices (*C1D"), ybrid foal plane arrays and comple ‘mentary metal oxide semiconductor (°CMOS") imaging devices. Solid-state image sensors are fabricated from semicon- ductor materials (such as silicon or gallium arsenide) and include imaging arrays of light detecting (i.e.. photosensitive) elements (alo known as photodetectors) interconnected 10 generate analog signals repesentative of an image illuminating the device. These imaging arrays are typically formed from rows and columns of photodetectors (Gach a5 photodiodes, photoconductors, photocapactars or phologates), each off which generate photo-charges. The photo-charges are the reslt of photons striking the surface of the semiconductor material of the photodetector, which ‘generate free change carriers (electron-hole pairs) ia an amount linearly proportional to the incident photon radia- tion Each photodetector in the imaging array receives por tion of the light reflected from the object received atthe solid-state image sensor. Ech portion is known as a picture element or “pixel.” Each individual pixel provides an output signal corresponding 1 the radiation intensity falling upon its detecting area (also known as the photosensitive or detector ates) defined by the physical dimensions of the photodetector, The photo-chrges from each pixel are con- verted to signal (charge signal) or an electrical potential ropresentatve of the energy level reflected from a respective portion of he object. The resulting signal or potential isread and processed by video processing circuitry o create an clectrcal representation of the image. This sigatl may be utilized, for example, to display a corresponding image on a ‘monitor or otherwise used fo provide information sbout the ‘optical image ‘CCDs are commonly uilized as solid-state image sensors. However, CMOS technology hss made sigificant strides in competing with CCD technology as the solid-state image sensor of choice for use in various applications such as stand-alone digital cameras and digital cameras embedded in other imaging devices (eg. cellular phones and personal igital assistants). The principal advantages of CMOS tech- ology are lower power consumption, higher levels of system integration that enable the creation of “camera-on- chip” capabilities, the ability to support very high data. 6s ‘ates andthe ease of manufacturing through the utilization of standaed CMOS wafer fabrication facilites. s 2 In video systems, CMOS technology is capable of higher frame rates than CCD technology a the same or lower levels, of circuit noise bevause many of the elements ean be ‘esigned to operate in parallel. In CCD circuits «single amplifier ansorms the received charge to voltage and ‘supports the total data rate of the solc-sate image sensor's, frame rate. In CCD solid-ate image sensor, the amplifier toise genorally becomes domisant when 30 frames per second (FPS) is employed for image sizes over several Fhundced thousand pixels CMOS solid-state image sensors, on the other hand, utlize multiple amplifiers that allow a longer seting time between applications and higher frame rate while maintain- ing excellent noise rejection, In addition, CMOS solid-state image sensors may easly be equipped with a precision analogsto-tigital (“A/D”) converter onthe solid-state image sensor chip. In many imaging applications, itis often desirable to take soap shot of 2 video image (ie, to obtain a sil image). ‘Unfortunately, because video imayes are not generally ofthe highest quality, the snap shot ofthe still mage will also not be of the highest quality. Such snap shots are especially inferior when compared with typical sil images generated in accordance with any one of a number of sill image techniques or standards generally known in the ar. ‘Typically, these higher quality sill images are generated ullizing specialized image generation software Generally, conventional CCD solid-state imager sensors provide snap shot capability through an interline transfer approach. In tbe interline transfer approach, when a short exposure is required wo frecze the action, the charge is transfered from the light collection junction to a junction shielded from light. The information regarding tbe light level is then stoed on a sorage node in the dark uatl the fame can be read. This method typically reduces motion blur and allows motion to be frozen even wea the time to read the entre frame is much longer than the integration time for the exposure. Conventional CMOS solid-state image sensors have also attempted to solve this soap shot capability problem by incorporating a storage node in the cell, However, this, storage node mus allow the transfer ofthe charge from the Tight collection nodes othe storage nodes, which requires an additional tansstor ia the cell Such active pixel sears are often termed fourstansisior culls to distinguish them from the thre-iansistor ative pixel sensor in CMOS solid-state mage sensors. Typically, the transfer of charge from the light collection node to the storage node introdues addi tional reset or KTIC noise unless a very specialized field elect transistor (*FET") design is used, Acklitionally, cross talk may cause the sorage node to contiaue to respond to light at 10% to 20% of the response of the lighted node ‘Moreover, the area required to implement the siorage node also reduces the atea available for light collection Generally, fr small pitch solid-state image Sensor eels, the installation of a storage node reduces the available area for light collection by about 30% to 50%. The combined elects, cof less light collection area, transfer KT/C noise and crass talk may cause the four-ransistor cul to have a signal-io- ‘noise performance that is about }s that of a conventional thee-ransistor cell ofthe same pitch. Therefor, there is 3 ‘ced for a high performance solid-state image sensor tht solves the snap shot eapsbiiy problem. SUMMARY Auber of technical advances are achieved in the art by combining multiple A/D converte in a single CMOS