Reg. No. : D 0093 B.E/B.Tech. DEGREE EXAMINATION, MAY/JUNE 2009 THIRD/FOURTH SEMESTER COMPUTER SCIENCE AND ENGINEERING 81202 COMPUTER ARCHITECTURE (Common to Information Technology) (REGULATION - 2007) Time : Three hours Maximum : 100 marks 10. Answer ALL questions. PART A—(10 x 2 = 20 marks) What is meant by multiplexed address and data buses? What are the limitations of assembly language? How floating point numbers are represented in a computer? Draw a half-adder circuit and write its truth table. Mention the advantages of microprogrammed control over hardwired control. Define pipeline speedup. Define cycle Stealing. What is an interrupt? Mention its importance. Compare Static RAM sind Dynamic RAM. Define virtual memory.nL 12. 13. 14. 15. 16. 17. 18. (a) (b) (a) (a) (b) PART B — (5 x 16 = 80 marks) Explain the functional units of a computer. 3) Explain the different types of addressing modes with examples. 8) Or Discuss in detail three, two, one and zero address instructions with example. (8) Explain stack organization in detail. @) What circuits are necessary for implementing integer division operation? w Explain the implementation of fast multiplication algorithm with necessary logic diagrams with example. 2) Or Draw and explain the flowchart for floating Point arithmetic operation for addition and subtraction. Discuss the hardware used for the above. (16) With neat diagram explain the design of micro-programmed control unit. (16) (a) (a) (b) (a) (b) Or What is instruction hazard? Explain in detail how to handle the instruction hazards with relevant examples. (10) Deseribe superscalar operation. © Explain DMA data transfer in detail, with a neat diagram. (10) Briefly explain the need for an Y/O interface. O} : Or Explain the principle of multilevel interrupt system. (8) Describe the functions of SCSI interface with a neat diagram.Describe the components of typical memory hierarchy in a computer system. © (b) Describe the mapping techniques of cache memory organization. _(10) Or 0. (a) Explain in detail how pages are mapped to blocks of physical memory. (8) (b) Describe page replacement algorithm. ®