CUDA.

........................................................................................................... 1
............................................................................................. 2
..........2
Intel Nehalem............................................ 3
AMD Istanbul............................................ 4
1.1. IBM Cell.............................................. 5
2. .................6
........................................................................... 7
.......................................................................... 8
3D .......................................................................... 9
................................................................ 10
Nvidia.................................. 11
G80..................................................................... 12
G200................................................................... 13
Fermi................................................................. 14
CUDA........................................................ 17
...................................................................... 20
................................................................ 22
CUDA..................................................................................... 22
............................................................................... 23
................................................................................. 24
CUDA............................................................................ 25
.............................................................. 28
.................................................................................... 29
()...................................... 31

 ...............31
............................................................ 33
. . .................................. 35
. . ................................. 36
........................................................... 40
............................................................. 40
................................................ 42
cudaArray ............................................... 43
()................................................ 46
........................................................................ 47
..................................................................................................... 49

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Nvidia CUDA,
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1. Intel Nehalem

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 10. Fermi

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;
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7. Nvidia

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 Compute
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1.0, 1.1, 1.2, 1.3, 2.0 Compute Capability. , Compute
Capability .
8. Compute Capability

GPU
GeForce 8800GTX
GeForce 9800GTX
GeForce 210
GeForce 275GTX
Tesla C2050

Compute Capability
1.0
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__device__

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__device__

device

device

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CPU.
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union.

const

CUDA
CUDA ,
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 (u/) char, char2, char3, char4

(u/) int, int2, int3, int4
float, float2, float3, float4
longlong, longlong2
double, double2

make_()(), :
char2 a = make_char2(a,b);
printf(%c %c, a.x, a.y);
float4 b =make_float4(1.0, 2.0, 3.0, 4.0);
printf(%f %f, b.x, b.y, b.z, b.w);
cuda > 3.0 .
dim3, uint3,

.
.
dim3 block = dim3 (16,16, 2);
dim3 grid = dim3 (1000);
, !
dim3 block = dim3 (16,16, 0);
0!
.

CUDA ,
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dim3 gridDim
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uint3 blockIdx .
dim3 blockDim .
uint3 threadIdx .
int warpSize ( 32).

.
params:
__global__ void Kernel_name(params);
:
Kernel_name<<<grid, block, mem, stream>>> ( params ),
dim3 grid .
.
dim3 block .
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size_t mem -- ,
.
cudaStream_t stream , .
:
#define BS 256 //
#define N 1024 //
//
__global__ void kernel (int* data){
//
.
int idx = blockIdx.x * BS + threadIdx.x;
some code
}
int main (){

//
int* data;
// ( N ,
)
dim3 block = dim3(BS);
dim3 grid = dim3(N / BS);
some code
//

kernel <<<grid, block>>> (data);

some code
}
, .
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CUDA.

CUDA
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CUDA API.
.
CUDA API: -API
runtime-API. Runtime-API -API,
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API


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cuda. API
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char* cudaGetErrorString(cudaError_t)
. cudaError_t cudaGetLastError()
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.

cudaError_t cudaGetDeviceCount(int *)
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cudaError_t cudaGetDevicePropertis (cudaDeviceProp * props, int deviceNo )
.
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,
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32/64/128-

t[i]
o

sizeof(t [0]) 4/8/16

t [i] sizeof ( t [0] )

256

4/8/16
__align__(size)
12.

 CUDA.
12. CUDA

R/W

Per-thread

(on-chip)

R/W

Per-thread

(DRAM)

Shared

R/W

Per-block

(on-chip)

R/W

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(DRAM)

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Texture

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cudaError_t cudaMalloc ( void ** devPtr, size_t size );
size devPtr
cudaError_t cudaMallocPitch ( void ** devPtr, size_t * pitch, size_t width,
size_t height );
width * height,
devPtr pitch
cudaError_t cudaFree ( void * devPtr );
devPtr

cudaError_t cudaMemset (void* devPtr, int value, size_t count );

devPtr value count
cudaError_t cudaMemcpy
cudaMemcpyKind kind );

( void * dst, const void * src, size_t count, enum

dst
src
count
kind :
cudaMemcpyHostToDevice c
cudaMemcpyDeviceToHost
cudaMemcpyDeviceToDevice
cudaMemcpyHostToHost
cudaError_t cudaMemcpyAsync ( void * dst, const void * src, size_t count,
enum cudaMemcpyKind kind, cudaStream_t stream );
cudaMemcpy stream.

:

,
1
( 13).
#include <stdio.h>
#include <time.h>
#define CUDA_FLOAT float
#define GRID_SIZE 256
#define BLOCK_SIZE 256

13.

// cuda API
void check_cuda_error(const char *message)
{
cudaError_t err = cudaGetLastError();
if(err!=cudaSuccess)
printf("ERROR: %s: %s\n", message, cudaGetErrorString(err));
}

__global__ void pi_kern(CUDA_FLOAT *res)

{
int n = threadIdx.x + blockIdx.x * BLOCK_SIZE;
CUDA_FLOAT x0 = n * 1.f / (BLOCK_SIZE * GRID_SIZE); //

CUDA_FLOAT y0 = sqrtf(1 - x0 * x0);
CUDA_FLOAT dx = 1.f / (1.f * BLOCK_SIZE * GRID_SIZE); //

CUDA_FLOAT s = 0; // ,

CUDA_FLOAT x1, y1;
x1 = x0 + dx;
y1 = sqrtf(1 - x1 * x1);
s = (y0 + y1) * dx / 2.f;
//
res[n] = s;
//
}
int main(int argc, char** argv)
{
cudaSetDevice(DEVICE);//
check_cuda_error("Error selecting device");
CUDA_FLOAT *res_d;
//
CUDA_FLOAT res[GRID_SIZE * BLOCK_SIZE];
//

cudaMalloc((void**)&res_d, sizeof(CUDA_FLOAT) * GRID_SIZE *
BLOCK_SIZE);
// CPU
check_cuda_error("Allocating memory on GPU");
// GPU
dim3 grid(GRID_SIZE);
dim3 block(BLOCK_SIZE);
pi_kern<<<grid, block>>>(res_d);
//
cudaThreadSynchronize();
//
check_cuda_error("Executing kernel");
cudaMemcpy(res, res_d, sizeof(CUDA_FLOAT) * GRID_SIZE * BLOCK_SIZE,
cudaMemcpyDeviceToHost);
//
check_cuda_error("Copying results from GPU");
cudaFree(res_d);
// GPU
check_cuda_error("Freeing device memory");
CUDA_FLOAT pi = 0;
for (int i=0; i < GRID_SIZE * BLOCK_SIZE; i++)
{
pi += res[i];
}
pi *= 4;
printf("PI = %.12f\n",pi);
return 0;

CUDA_FLOAT,
float double,
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Capability ( 13):
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1.0, 1.1

>= 1.2


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:
#define BS 256; //
__global__ void kern(float* data){
// float
// :
__shared__ float a[BS];
int idx = blockIdx.x * BS +
threadIdx.x;
//

a[idx] = data[idx];
//

. .
__syncthreads();
//
data[idx] = a[idx]+ a[(idx +
1) % BS];
}

, 17. float
float

32
,

float .
#define BS 256; //
__global__ void kern(short* data){
// float
// :
__shared__ short a[BS];
int idx = blockIdx.x * BS +
threadIdx.x;
//

a[idx] = data[idx];
//

. .
__syncthreads();
//
data[idx] = a[idx]+ a[(idx
+ 1) % BS];
}

18. short

 2 , short 16 ,
short .
char, 4 , char 8
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WA, WB
BS
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BX = blockIdx.x
BY = blockIdx.y
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C.

A B.

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19.
#define BLOCK_SIZE 16
__global__ void matMult ( float .
* a, float * b, float * , int wa, int wb )
{
int
bx
= blockIdx.x;
int
by
= blockIdx.y;
int
tx
= threadIdx.x;
int
ty
= threadIdx.y;
float sum = 0.0f;

int
int
int
for (
sum
c [ic

ia = wa * BLOCK_SIZE *
ib = BLOCK_SIZE * bx +
ic = wb * BLOCK_SIZE *
int k = 0; k < n; k++ )
+= a [ia + k] * b [ib +
+ wb * ty + tx] = sum;

by + wa * ty;
tx;
by + BLOCK_SIZE * bx;
k * wb];

, :

2 * WA

2 * WA

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( 22):

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__constant__ float contsData [256]; --
contsData
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cudaMemcpyToSymbol ( constData, hostData, sizeof ( data ), 0,
cudaMemcpyHostToDevice ); --
.

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shared


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texture< type , dim, tex_type> g_TexRef;

Type
Dim (1, 2, 3)
Tex_type
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o cudaReadModeElementType
,
:
struct cudaChannelFormatDesc {
int x, y, z, w;
enum cudaChannelFormatKind f;
};

int x, y, z, w; - [0,32]

cudaChannelFormatKind

o cudaChannelFormatKindSigned int
o cudaChannelFormatKindUnsigned
int
o cudaChannelFormatKindFloat float
CUDA cudaArray ( 14).
14. CUDA

cudaArray

1D/ 2D/3D :
1/2/4
8/16/32 bit signed/unsigned integers
32 bit float
16 bit float (driver API)

tex1D()/tex2D()/tex3D()


: tex1Dfetch(tex, int)

.

,
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.

.
:
cudaError_t cudaBindTexture(size_t shift, texref tex,
&src, size_t size));

Shift (
)

Tex

Src

Size

(
, ):
cudaError_t
tex, &src,
pitch);

cudaBindTexture2D(size_t
shift,
texref
&channelDesc, int width,int height,int

Shift (
)

Tex

Src

channelDesc ( )

width

height

pitch

:
cudaError_t cudaUnbindTexture(texref tex);
.
,
:
tex1Dfetch(texRef tex, int index);
Tex

Index

cudaArray .

cudaArray, .
cudaArray , 2
, ,
:

( [W, H] => [0,1])

Clamp

Wrap

( float )

Point

Linear

cudaArray
cudaArray:
cudaArray * a;
:
cudaError_t cudaMallocArray(struct cudaArray **
arrayPtr, const struct cudaChannelFormatDesc *
channelDesc, size_t width, size_t
height);

arrayPtr cudaArray

channelDesc ( )

width

height

:
cudaError_t cudaMemcpyToArray(struct cudaArray * dst,
size_t wOffset, size_t hOffset, const void * src,
size_t count, enum cudaMemcpyKind kind)

arrayPtr cudaArray

wOffset

hOffset

Src ,

count

kind ( cudaMemcpy)

,
cudaArray :
cudaError_t
cudaBindTextureToArray
(const
struct
textureReference *tex, const struct cudaArray *array,
const struct cudaChannelFormatDesc *desc);

Tex

array

channelDesc ( )

cudaArray,

.
,
:
tex1D (texRef tex, float x);
Tex

tex2D (texRef tex, float x, float y);

Tex

x, y

tex3D (texRef tex, float x, float y, float z);

Tex

x, y, z

 (
23).

23.

()

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x1 y1 z1
x2 y2 z2
x3 y3 z3
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