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Compal Confidential
2
2008-4-16
REV:1.0
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Cover Page
Document Number
Rev
1.0
JALB0 LA-4171P
Friday, April 18, 2008
Sheet
E
of
50
Compal Confidential
Thermal Sensor
ADM1032
Clock Generator
ICS9LPRS488B
page 15
page 5
uPGA-638 Package
Fan Control
page 36
HDMI Conn.
LCD Conn.
page 17
page 8,9
BANK 0, 1, 2, 3
page 4,5,6,7
CRT Conn.
page 18
page 16
200pin DDRII-SO-DIMM X2
ATI RS780M
PCI-Express 16x
MXM II VGA/B
BGA-528
page 14
PCI-Express 1x
port 0
port 1,2
New Card
Socket
MINI Card x2
TV-Tuner WLAN
page 29
port 3
LAN(GbE)
B5764M
page 28
port 4
page 25
page 27
page 25
page 16
USB port 5
3.3V 48MHz
USB
3.3V 24MHz
HD Audio
page 29
USB port 9
page 28
USB port1
page 19,20,21,22,23
BIOS ROM
page 21
page 19
Finger
Printer
S-ATA
BGA-528
SPI
RTC CKT.
Bluetooth
Conn
ATI SB700
5 in 1
Socket
RJ45
CMOS
Camera
page 29
A link
Express2
Card Reader
JMB385
page 26
USB Conn
x4
page 10,11,12,13
LPC BUS
BTN/B Conn.
page 32
SATA HDD
Conn. page 24
SATA ODD
Conn.page 24
port 0
port 1
ENE KB926
page 32
LED/B Conn.
page 32
MDC 1.5
Conn
page 33
HDA Codec
ALC888S
page 34
Int. MIC
page 35
Digital/Analog MIC.
Audio AMP
page 30
Mono AMP
(for Woofer)
page 34
page 35
Media/B Conn.
Touch Pad
page 32
Int.KBD
page 31
Phone Jack x3
page 31
page 34
FUN/B Conn.
38
CIR
page 32
EC ROM
page 30
page 31
USB/B Conn.
USB port 2, 4
page 28
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Block Diagrams
Document Number
Rev
1.0
JALB0 LA-4181P
Sheet
of
50
SIGNAL
STATE
Voltage Rails
Description
S1
S3
S5
VIN
N/A
N/A
N/A
B+
N/A
N/A
N/A
+CPU_CORE_0
ON
OFF
OFF
+CPU_CORE_1
ON
OFF
OFF
+CPU_CORE_NB
ON
OFF
OFF
+0.9V
ON
ON
OFF
+1.1VS
ON
OFF
OFF
+1.2V_HT
ON
OFF
OFF
+NB_CORE
ON
OFF
OFF
+1.5VS
ON
OFF
OFF
+1.8V
ON
ON
OFF
+1.8VS
ON
OFF
OFF
+2.5VS
ON
OFF
OFF
+3VALW
ON
ON
ON*
+3V_LAN
ON
ON
ON
+3VS
ON
OFF
OFF
+5VALW
ON
ON
ON*
+5VS
ON
OFF
OFF
+VSB
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
IDSEL#
REQ#/GNT#
EC SM Bus1 address
Device
Address
Smart Battery
0001 011X b
Device
HIGH
HIGH
ON
ON
ON
ON
HIGH
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
CPU SB
1001 101X b
Vcc
Ra/Rc/Re
Board ID
0
1
2
3
4
5
6
7
Address
Clock Generator
(ICS9LPRS365)
1101 001Xb
DDR DIMM0
1001 000Xb
DDR DIMM2
1001 010Xb
Device
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
BOARD ID Table
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
BTO Item
Discrete
UMA
BOM Structure
VGA@
UMA@
PROJECT ID Table
Board ID
0
1
2
3
4
5
6
7
SB700
SM Bus 1 address
Device
3.3V +/- 5%
100K +/- 5%
Rb / Rd / Rf
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
1001 101X b
SB700
SM Bus 0 address
Address
1001 100X b
Clock
HIGH
Board ID
0
1
* 2
3
4
5
6
7
ADI ADM1032
+VS
LOW
Interrupts
EC SM Bus2 address
+V
HIGH
No PCI device
+VALW
S1(Power On Suspend)
Full ON
Power Plane
PROJECT
JALB0
JALC0
Address
New card
Lan
Minicard
4
Minicard
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Notes List
Document Number
Rev
1.0
JALB0 LA-4181P
Sheet
of
50
VLDT CAP.
+1.2V_HT
250 mil
1
H_CADIP[0..15]
10 H_CADIP[0..15]
H_CADOP[0..15]
H_CADIN[0..15]
10 H_CADIN[0..15]
H_CADON[0..15]
H_CADOP[0..15]
H_CADON[0..15]
10
2
10
C535
4.7U_0805_10V4Z
C534
4.7U_0805_10V4Z
C520
0.22U_0603_16V4Z
C518
0.22U_0603_16V4Z
C516
180P_0402_50V8J
C517
180P_0402_50V8J
+1.2V_HT
JCPU1A
VLDT=500mA
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
HT LINK
D1
D2
D3
D4
VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3
E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
AE2
AE3
AE4
AE5
1
C533
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
2
4.7U_0805_10V4Z
10
10
10
10
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
J3
J2
J5
K5
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
Y1
W1
Y4
Y3
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
10
10
10
10
10
10
10
10
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
N1
P1
P3
P4
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
R2
R3
T5
R5
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
10
10
10
10
6090022100G_B
Athlon 64 S1
Processor Socket
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
of
50
JCPU1C
9 DDRB_SDQ[63..0]
MEM:DATA
DDRA_CLK0
1
+1.8V
2
R79
1K_0402_1%
DDRA_CLK0#
C244
1.5P_0402_50V9C
DDRA_CLK1
1
R78
1K_0402_1%
1
C189
1000P_0402_50V7K
C181
0.1U_0402_16V4Z
+MCH_REF
1
DDRA_CLK1#
C178
1.5P_0402_50V9C
DDRB_CLK0
1
DDRB_CLK0#
C509
1.5P_0402_50V9C
DDRB_CLK1
1
DDRB_CLK1#
C447
1.5P_0402_50V9C
+0.9V
+0.9V
JCPU1B
+1.8V
R343 39.2_0402_1%
1
2
1
2
R352 39.2_0402_1%
T5
8
8
DDRA_ODT0
DDRA_ODT1
8 DDRA_SCS0#
8 DDRA_SCS1#
8 DDRA_CKE0
8 DDRA_CKE1
8 DDRA_CLK0
8 DDRA_CLK0#
8 DDRA_CLK1
8 DDRA_CLK1#
3
8 DDRA_SMA[15..0]
8 DDRA_SBS0#
8 DDRA_SBS1#
8 DDRA_SBS2#
8 DDRA_SRAS#
8 DDRA_SCAS#
8 DDRA_SWE#
PAD
DDRA_ODT0
@
DDRA_ODT1
DDRA_SCS0#
DDRA_SCS1#
DDRA_CKE0
DDRA_CKE1
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
DDRA_SMA15
D10
C10
B10
AD10
VTT1
VTT2
VTT3
VTT4
AF10
AE10
MEMZP
MEMZN
MEM:CMD/CTRL/CLK VTT5
VTT6
VTT7
VTT8
VTT9
H16
RSVD_M1
T19
V22
U21
V19
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
T20
U19
U20
V20
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
J22
J20
MA_CKE0
MA_CKE1
N19
N20
E16
F16
Y16
AA16
P19
P20
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CLK_H2
MA_CLK_L2
MA_CLK_H3
MA_CLK_L3
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
W10
AC10
AB10
AA10
A10
VTT_SENSE
Y10
MEMVREF
W17
VTT_SENSE
+MCH_REF
RSVD_M2
B18
MB0_ODT0
MB0_ODT1
MB1_ODT0
W26
W23
Y26
DDRB_ODT0
DDRB_ODT1
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
V26
W25
U22
DDRB_SCS0#
DDRB_SCS1#
J25
H26
DDRB_CKE0
DDRB_CKE1
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
MB_CLK_H2
MB_CLK_L2
MB_CLK_H3
MB_CLK_L3
P22
R22
A17
A18
AF18
AF17
R26
R25
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_SMA14
DDRB_SMA15
MB_CKE0
MB_CKE1
PAD
T2
PAD
T17
DDRB_ODT0 9
DDRB_ODT1 9
DDRB_SCS0# 9
DDRB_SCS1# 9
DDRB_CKE0 9
DDRB_CKE1 9
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
9
9
9
9
9 DDRB_SDM[7..0]
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
R20
R23
J21
MA_BANK0
MA_BANK1
MA_BANK2
MB_BANK0
MB_BANK1
MB_BANK2
R24
U26
J26
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
R19
T22
T24
MA_RAS_L
MA_CAS_L
MA_WE_L
MB_RAS_L
MB_CAS_L
MB_WE_L
U25
U24
U23
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
DDRB_SMA[15..0]
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
DDRB_SBS0# 9
DDRB_SBS1# 9
DDRB_SBS2# 9
DDRB_SRAS# 9
DDRB_SCAS# 9
DDRB_SWE# 9
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
Athlon 64 S1
Processor
Socket
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
A12
B16
A22
E25
AB26
AE22
AC16
AD12
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
E12
C15
E19
F24
AC24
Y19
AB16
Y13
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
DDRA_SDQ[63..0]
8
1
DDRA_SDM[7..0]
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Athlon 64 S1
Processor Socket
6090022100G_B
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
of
50
1
+
C282
4.7U_0805_10V4Z
C264
150U_D2_6.3VM
C255
1
R364
1
R358
+1.8V
C261
0.22U_0603_16V4Z
2
10K_0402_5%
2
300_0402_5%
B
+2.5VDDA
VDDA=300mA
L33
3300P_0402_50V7K
1
2
FBM_L11_201209_300L_0805
1
1
1
+2.5VS
<BOM Structure>
1
2
3900P_0402_50V7K
Address:100_1100
+1.8VS
+1.8V
R82
R86
+1.2V_HT
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
CPU_SIC
CPU_SID
@
1
2
R356
1K_0402_5%
2 44.2_0402_1% CPU_HTREF0
2 44.2_0402_1% CPU_HTREF1
AF4
AF5
AE6
SIC
SID
ALERT_L
R6
P6
HT_REF0
HT_REF1
LDT_RST#
C554
0.01U_0402_16V7K
@
10_0402_5%
1
2CPU_VDD0_FB_H
1
2CPU_VDD0_FB_L
10_0402_5%
R95
VDD0_FB_H
VDD0_FB_L
VDDIO_FB_H
VDDIO_FB_L
W9
Y9
46 CPU_VDD1_FB_H
46 CPU_VDD1_FB_L
CPU_VDD1_FB_H
Y6
CPU_VDD1_FB_L AB6
VDD1_FB_H
VDD1_FB_L
VDDNB_FB_H
VDDNB_FB_L
H6
G6
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
DBREQ_L
E10
CPU_DBREQ#
TDO
AE9
CPU_TDO
10_0402_5%
1
2CPU_VDD1_FB_H
1
2CPU_VDD1_FB_L
2
1
R419
300_0402_5%
19
R81
@
T27
T28
PAD
PAD
1@
1@
+1.8V
10_0402_5%
T21
T22
T23
T24
T25
T26
H_PWRGD
H_PWRGD
CPU_TEST23_TSTUPD
AD7
@
@
CPU_TEST18_PLLTEST1 H10
CPU_TEST19_PLLTEST0 G9
T10 PAD
+CPU_CORE_1
R80
+1.8VS
C553
0.01U_0402_16V7K
@
PAD
PAD
PAD
PAD
PAD
PAD
@
@
@
@
@
@
R108 2 510_0402_5%
R107 2 510_0402_5%
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST12_SCANSHIFTENB
CPU_TEST27_SINGLECHAIN
1
R418 2 0_0402_5%
AB8
AF7
AE7
AE8
AC8
AF8
DBRDY
TMS
TCK
TRST_L
TDI
TEST23
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6
A3
A5
B3
B5
C1
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
H_PROCHOT#
+1.8V
+CPU_CORE_NB
Close to CPU
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N
TEST17
TEST16
TEST15
TEST14
D7
E7
F7
C7
CPU_TEST17_BP3
CPU_TEST16_BP2
CPU_TEST15_BP1
CPU_TEST14_BP0
TEST7
TEST10
C3
K8
TEST8
C4
TEST29_H
TEST29_L
C9
C8
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
@
@
@
@
PAD
PAD
@
PAD @T16
PAD T7
PAD T6
PAD T9
T3
T4
+1.8V
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
@
@
PAD
PAD
T8
T15
@
1
C245
0.01U_0402_16V7K
@
R351
2
1
2.2K_0402_5%
HDT_RST#
1
D
+3VS
2CPU_SIC
0_0402_5%
1
R565
CPU_SIC_SB
1
2.2K_0402_5%
Q30
@
2
@ 0_0402_5%
1
2
R567
@ 0_0402_5%
FDV301N_NL_SOT23-3
2
R365
ACES_85201-1005N
@
1
R568
2
0_0402_5%
1
R569
2
0_0402_5%
EC_SMB_DA1 14,30,40
ICH_SMBCLK1 20,26,29
EC_SMB_CK1 14,30,40
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
EC is PU to 5VALW
C446
HDT Connector
JP1
1
3
5
7
9
11
13
15
17
19
21
23
2
U27
THERMDA_CPU 2
C449
THERMDC_CPU 3
1
2
2200P_0402_50V7K
4
VDD
SCLK
EC_SMB_CK2
EC_SMB_DA2
D+
SDATA
D-
ALERT#
GND
THERM#
ICH_SMBDATA1 20,26,29
FDV301N_NL_SOT23-3
1
2
3
4
5
6
7
8
9
10
GND
GND
+1.8V
2CPU_SID
0_0402_5%
1
2
3
4
5
6
7
8
9
10
11
12
1
R566
2
R361
+1.8V
0.1U_0402_16V4Z
2
2300_0402_5%
300_0402_5%
1
R564
CPU_SID_SB
R360
@
34.8K_0402_1%~N
Q31 @
20
C436 0.1U_0402_16V4Z
+1.8V
20
EC_SMB_CK2 30,31
2
4
6
8
10
12
14
16
18
20
22
24
26
R93
2
0_0402_5%
+3VS
U8
HDT_RST#
SAMTEC_ASP-68200-07
LDT_RST#
SB_PWRGD 20,32
@ NC7SZ08P5X_NL_SC70-5
EC_SMB_DA2 30,31
Security Classification
2008/04/16
Issued Date
ADM1032ARMZ_MSOP8
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Address:100_1101
Date:
2
1K_0402_5%
2
1K_0402_5%
CPU_TEST21_SCANEN
1
CPU_TEST24_SCANCLK1 R5381
R539
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
LDT_STOP#
20K_0402_5%
2200p change to
1000p for ADT7421
1
R415 1
R416
H18
H19
AA7
D5
C5
6090022100G_B
+3VS
route as differential
as short as possible
testpoint under package
2
1
220_0402_5%R112
2
1
220_0402_5%R115
2
1
220_0402_5%R118
2
1
220_0402_5%R119
2
1
300_0402_5%R129
1
1
R101 10_0402_5%
1
2
1
2
R106 10_0402_5%
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
CPU_VDDNB_FB_H 46
CPU_VDDNB_FB_L 46
H_PROCHOT# 19
JP29
R113
300_0402_5%
R370 2
0_0402_5%
@ PAD
@ PAD
J7
H8
TEST28_H
TEST28_L
TEST18
TEST19
C2
AA6
2
300_0402_5%
R353
2
+1.8VS
E9
E8
T30
T29
F6
E6
Close to CPU
1
R357
+1.8V
THERMDC_CPU
THERMDA_CPU
46 CPU_VDD0_FB_H
46 CPU_VDD0_FB_L
G10
AA9
AC9
AD9
AF9
H_THERMTRIP# 20
300_0402_5%
CPU_VDD0_FB_H
CPU_VDD0_FB_L
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
W7
W8
CPU_SVC 46
CPU_SVD 46
CPU_THERMTRIP#_R
H_PROCHOT#
CPU_MEMHOT#_1.8V
AF6
AC7
AA8
THERMDC
THERMDA
MAINPWON 40,41
CPU_SVC
CPU_SVD
LDT_RST#
THERMTRIP_L
PROCHOT_L
MEMHOT_L
MMBT3904_NL_SOT23-3
M11
W18
A6
A4
R335 2
@ 0_0402_5%
R334 2
0_0402_5%
Q32
1
19
+CPU_CORE_0
R92
1
1
SVC
SVD
R420
300_0402_5%
CLKIN_H
CLKIN_L
B7
A7
F10
C6
11 CPU_LDT_REQ#
2
1
C532
A9
A8
KEY1
KEY2
LDT_RST#
H_PWRGD
LDT_STOP#
CPU_LDT_REQ#
R409
169_0402_1%
15 CLK_CPU_BCLK#
VDDA1
VDDA2
CPU_THERMTRIP#_R
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
2 3900P_0402_50V7K
1
C531
15 CLK_CPU_BCLK
F8
F9
JCPU1D
Rev
1.0
JALB0 LA-4171P
Sheet
of
50
JCPU1F
VDD(+CPU_CORE) decoupling.
+CPU_CORE_0
+CPU_CORE_1
C80
330U_X_2VM_R6M
C79
330U_X_2VM_R6M
C77
330U_X_2VM_R6M
C78
330U_X_2VM_R6M
+CPU_CORE_1
+CPU_CORE_NB
C214
22U_0805_6.3V6M
C225
22U_0805_6.3V6M
C221
22U_0805_6.3V6M
C224
22U_0805_6.3V6M
C196
22U_0805_6.3V6M
C200
22U_0805_6.3V6M
+CPU_CORE_0
C186
22U_0805_6.3V6M
C201
22U_0805_6.3V6M
+1.8V
+CPU_CORE_1
C220
0.22U_0603_16V4Z
C217
0.01U_0402_25V4Z
JCPU1E
+CPU_CORE_0
C219
180P_0402_50V8J
C195
0.22U_0603_16V4Z
C184
0.01U_0402_25V4Z
C179
180P_0402_50V8J
G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11
VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23
K16
M16
P16
T16
V16
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
+CPU_CORE_1
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
+1.8V
6090022100G_B
Athlon 64 S1
Processor Socket
VDDIO decoupling.
+CPU_CORE_NB
decoupling.
+1.8V
+CPU_CORE_NB
1
C206
22U_0805_6.3V6M
C226
22U_0805_6.3V6M
C216
0.22U_0603_16V4Z
2
C230
0.22U_0603_16V4Z
2
C191
C182
180P_0402_50V8J
180P_0402_50V8J
2
2
C198
22U_0805_6.3V6M
C207
22U_0805_6.3V6M
C223
22U_0805_6.3V6M
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
6090022100G_B
Athlon 64 S1
Processor Socket
+0.9V
C235
0.22U_0603_16V4Z
C234
0.22U_0603_16V4Z
C165
0.22U_0603_16V4Z
+1.8V
C162
0.01U_0402_25V4Z
C163
0.01U_0402_25V4Z
C166
0.22U_0603_16V4Z
C164
180P_0402_50V8J
C237
180P_0402_50V8J
C273
22U_0805_6.3V6M
C238
180P_0402_50V8J
+0.9V
C239
1
180P_0402_50V8J
C141
4.7U_0805_10V4Z
+1.8V
+ C281
220U_D2_4VM_R15
+1.8V
VTT decoupling.
C146
4.7U_0805_10V4Z
C144
0.22U_0603_16V4Z
C148
0.22U_0603_16V4Z
C174
1000P_0402_50V7K
C173
1000P_0402_50V7K
C172
180P_0402_50V8J
C175
180P_0402_50V8J
1
1
1
C167
4.7U_0805_10V4Z
1
C168
4.7U_0805_10V4Z
1
C169
4.7U_0805_10V4Z
C170
4.7U_0805_10V4Z
+ C233
+ C218
220U_D2_4VM_R15
220U_D2_4VM_R15
2 @
2
4
C541
4.7U_0805_10V4Z
C530
4.7U_0805_10V4Z
C514
0.22U_0603_16V4Z
C515
0.22U_0603_16V4Z
C528
1000P_0402_50V7K
C537
1000P_0402_50V7K
C540
180P_0402_50V8J
C543
180P_0402_50V8J
2
4
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
of
50
+1.8V
+1.8V
RESERVE
+V_DDR_MCH_REF BUFFER CIRCUIT
JDIMM1
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS2#
DDRA_SDQS2
5 DDRA_SDQS2#
5 DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDM3
DDRA_SDQ26
DDRA_SDQ27
DDRA_CKE0
DDRA_CKE0
DDRA_SBS2#
DDRA_SBS2#
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
5
5
DDRA_SBS0#
DDRA_SWE#
5
5
DDRA_SCAS#
DDRA_SCS1#
DDRA_ODT1
DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS#
DDRA_SCS1#
DDRA_ODT1
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
5 DDRA_SDQS4#
5 DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
3
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQS6#
DDRA_SDQS6
5 DDRA_SDQS6#
5 DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
ICH_SMBDATA0
ICH_SMBCLK0
9,15,17,20,28 ICH_SMBDATA0
9,15,17,20,28 ICH_SMBCLK0
+3VS
4
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDM[0..7]
DDRA_SMA[0..15]
DDRA_SMA[0..15]
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDM1
+1.8V
+0.9V
RP20
DDRA_SMA6
DDRA_SMA7
DDRA_SMA11
DDRA_SMA15
DDRA_CLK0 5
DDRA_CLK0# 5
DDRA_SDQ14
DDRA_SDQ15
+1.8V
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204
DDRA_SDQ20
DDRA_SDQ21
R148
1K_0402_1%
DDRA_SDM2
+V_DDR_MCH_REF
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3#
DDRA_SDQS3
2
DDRA_SDQS3# 5
DDRA_SDQS3 5
DDRA_SDQ30
DDRA_SDQ31
DDRA_CKE1
DDRA_CKE0
DDRA_SBS2#
DDRA_SMA14
DDRA_CKE1
DDRA_SBS1#
DDRA_SMA0
DDRA_SMA2
DDRA_SMA4
+V_DDR_MCH_REF
R141
1K_0402_1%
DDRA_SMA5
DDRA_SMA8
DDRA_SMA9
DDRA_SMA12
DDRA_CKE1 5
DDRA_SMA15
DDRA_SMA14
DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_SMA13
DDRA_SBS1# 5
DDRA_SRAS# 5
DDRA_SCS0# 5
DDRA_ODT0 5
8
7
6
5
47_0804_8P4R_5%
RP23
8
1
7
2
6
3
5
4
47_0804_8P4R_5%
RP17
1
8
2
7
3
6
4
5
47_0804_8P4R_5%
RP18
8
1
7
2
6
3
5
4
1
C187
1
C213
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C194
1
C222
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C157
1
C152
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C190
1
C211
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
DDRA_SBS0#
DDRA_SMA10
DDRA_SMA1
DDRA_SMA3
47_0804_8P4R_5%
RP15
8
1
7
2
6
3
5
4
1
C180
1
C199
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
DDRA_SCS1#
DDRA_ODT1
DDRA_SWE#
DDRA_SCAS#
47_0804_8P4R_5%
RP9
8
1
7
2
6
3
5
4
1
C161
1
C156
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
DDRA_SMA13
DDRA_ODT0
DDRA_SCS0#
DDRA_SRAS#
47_0804_8P4R_5%
RP12
1
8
2
7
3
6
4
5
1
C159
1
C154
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
1
2
3
4
47_0804_8P4R_5%
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
DDRA_SDQ38
DDRA_SDQ39
3
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
DDRA_SDQS5# 5
DDRA_SDQS5 5
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDRA_CLK1 5
DDRA_CLK1# 5
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQS7# 5
DDRA_SDQS7 5
DDRA_SDQ62
DDRA_SDQ63
R314 1
R315 1
2 10K_0402_5%
2 10K_0402_5%
4
FOX_AS0A426-M2RN-7F
CONN@
+3VS
C413
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
203
DDRA_SDQ[0..63]
DDRA_SDM0
DDRA_SDQS1#
DDRA_SDQS1
5 DDRA_SDQS1#
5 DDRA_SDQS1
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ8
DDRA_SDQ9
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDRA_SDQ2
DDRA_SDQ3
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
DDRA_SDQS0#
DDRA_SDQS0
5 DDRA_SDQS0#
5 DDRA_SDQS0
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
C257
1U_0402_6.3V4Z
DDRA_SDQ0
DDRA_SDQ1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
C256
1000P_0402_50V7K
+V_DDR_MCH_REF
C414
0.1U_0402_16V4Z
2
2
4.7U_0805_10V4Z
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
of
50
+1.8V
DDRB_SDQ0
DDRB_SDQ1
1
5 DDRB_SDQS0#
5 DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ9
5 DDRB_SDQS1#
5 DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
5 DDRB_SDQS2#
5 DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26
DDRB_SDQ27
5
DDRB_CKE0
DDRB_SBS2#
DDRB_CKE0
DDRB_SBS2#
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
5
5
DDRB_SBS0#
DDRB_SWE#
5
5
DDRB_SCAS#
DDRB_SCS1#
DDRB_ODT1
DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#
DDRB_SCAS#
DDRB_SCS1#
DDRB_ODT1
DDRB_SDQ32
DDRB_SDQ33
5 DDRB_SDQS4#
5 DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
5 DDRB_SDQS6#
5 DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
8,15,17,20,28 ICH_SMBDATA0
8,15,17,20,28 ICH_SMBCLK0
ICH_SMBDATA0
ICH_SMBCLK0
+3VS
+1.8V
DDRB_SDQ[0..63]
JDIMM2
+V_DDR_MCH_REF
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
DDRB_SDM[0..7]
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
5
5
+1.8V
+0.9V
RP14
DDRB_SDM0
DDRB_SMA[0..15]
DDRB_SDQ6
DDRB_SDQ7
DDRB_SMA[0..15]
DDRB_SRAS#
DDRB_SMA0
DDRB_SMA2
DDRB_SMA4
DDRB_SDQ12
DDRB_SDQ13
1
2
3
4
8
7
6
5
2
C185
1
C176
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C188
1
C193
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C203
1
C215
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C205
1
C210
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C204
1
C209
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C171
1
C153
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C158
1
C160
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
47_0804_8P4R_5%
RP19
DDRB_SDM1
DDRB_SMA6
DDRB_SMA7
DDRB_SMA11
DDRB_SMA14
DDRB_CLK0 5
DDRB_CLK0# 5
DDRB_SDQ14
DDRB_SDQ15
1
2
3
4
8
7
6
5
47_0804_8P4R_5%
RP22
DDRB_CKE0
DDRB_SBS2#
DDRB_SMA15
DDRB_CKE1
DDRB_SDQ20
DDRB_SDQ21
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDRB_SDM2
RP21
DDRB_SMA8
DDRB_SMA5
DDRB_SMA12
DDRB_SMA9
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQS3#
DDRB_SDQS3
1
2
3
4
47_0804_8P4R_5%
RP16
DDRB_SDQS3# 5
DDRB_SDQS3 5
DDRB_SBS0#
DDRB_SMA10
DDRB_SMA3
DDRB_SMA1
DDRB_SDQ30
DDRB_SDQ31
DDRB_CKE1
8
7
6
5
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDRB_CKE1 5
DDRB_SMA15
DDRB_SMA14
RP10
DDRB_ODT1
DDRB_SCS1#
DDRB_SWE#
DDRB_SCAS#
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
RP11
DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_SMA13
DDRB_SMA13
DDRB_ODT0
DDRB_SCS0#
DDRB_SBS1#
DDRB_SBS1# 5
DDRB_SRAS# 5
DDRB_SCS0# 5
1
2
3
4
8
7
6
5
47_0804_8P4R_5%
DDRB_ODT0 5
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDM4
DDRB_SDQ38
DDRB_SDQ39
3
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
DDRB_SDQS5# 5
DDRB_SDQS5 5
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_CLK1 5
DDRB_CLK1# 5
DDRB_SDM6
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
DDRB_SDQS7# 5
DDRB_SDQS7 5
DDRB_SDQ62
DDRB_SDQ63
R331 1
R327 1
2 10K_0402_5%
2 10K_0402_5%
+3VS
4
FOX_AS0A426-MARG-7F
CONN@
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
DDRII SO-DIMM 1
Rev
1.0
JALB0 LA-4171P
Sheet
of
50
14 PCIE_GTX_C_MRX_P[0..15]
14 PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15] 14
PCIE_MTX_C_GRX_N[0..15] 14
U25B
29
29
28
28
28
28
26
26
25
25
PCIE_PTX_C_IRX_P0
PCIE_PTX_C_IRX_N0
PCIE_PTX_C_IRX_P1
PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P2
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P3
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P4
PCIE_PTX_C_IRX_N4
19
19
19
19
19
19
19
19
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_N15
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
PCIE_ITX_PRX_P0
PCIE_ITX_PRX_N0
PCIE_ITX_PRX_P1
PCIE_ITX_PRX_N1
PCIE_ITX_PRX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P4
PCIE_ITX_PRX_N4
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
AC8
AB8
PART 2 OF 6
PCIE I/F SB
C451 1
0.1U_0402_16V7K
C467 1
0.1U_0402_16V7K
2
C453 1
0.1U_0402_16V7K
2
C469 1
0.1U_0402_16V7K
2
C455 1
VGA@
0.1U_0402_16V7K
2
C471 1
2VGA@ 0.1U_0402_16V7K
C457 1
2VGA@ 0.1U_0402_16V7K
C473 1
2VGA@ 0.1U_0402_16V7K
C459 1
VGA@
0.1U_0402_16V7K
2
C475 1
2VGA@ 0.1U_0402_16V7K
C461 1
2VGA@ 0.1U_0402_16V7K
C477 1
2VGA@ 0.1U_0402_16V7K
C463 1
2VGA@ 0.1U_0402_16V7K
C479 1
2VGA@ 0.1U_0402_16V7K
C465 1
2VGA@ 0.1U_0402_16V7K
C481 1
VGA@
0.1U_0402_16V7K
2
C450 1
C466 1
C452 1
C468 1
C454 1
C470 1
C456 1
C472 1
C458 1
C474 1
C460 1
C476 1
C462 1
C478 1
C464 1
C480 1
C18
C19
C31
C30
C21
C20
C23
C22
C33
C32
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2
1
1
2
2
1
1
2
2
1
1
2
2
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
2VGA@ 0.1U_0402_16V7K
PCIE_ITX_C_PRX_P0
PCIE_ITX_C_PRX_N0
PCIE_ITX_C_PRX_P1
PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P4
PCIE_ITX_C_PRX_N4
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
29
29
28
28
28
28
26
26
25
25
New Card
2
TV Tuner
WLAN
GLAN
Card Reader4
H_CADOP[0..15]
4 H_CADON[0..15]
SB_TX0P_C
SB_TX0N_C
SB_TX1P_C
SB_TX1N_C
SB_TX2P_C
SB_TX2N_C
SB_TX3P_C
SB_TX3N_C
R33
R31
C271
C268
C290
C295
C263
C265
C262
C260
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1.27K_0402_1%
2K_0402_1%
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
19
19
19
19
19
19
19
19
H_CADIP[0..15]
H_CADIN[0..15]
H_CADIP[0..15]
H_CADIN[0..15]
U25A
+1.1VS
RS780M_FCBGA528
RS780M Display Port Support (muxed on GFX)
GFX_TX0,TX1,TX2 and TX3
DP0
AUX0 and HPD0
3
H_CADOP[0..15]
H_CADON[0..15]
4
4
4
4
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
4
4
4
4
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
1
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
T22
T23
AB23
AA22
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
M22
M23
R21
R20
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
R75
301_0402_1%
C23
A24
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
H24
H25
L21
L20
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
M24
M25
P19
R18
HT_RXCALP
HT_RXCALN
HT_TXCALP
HT_TXCALN
B24
B25
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
PART 1 OF 6
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
RS780M_FCBGA528
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
4
4
4
4
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
4
4
4
4
R76
301_0402_1%
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
10
of
50
L7
+AVDD1
1
2
FBM-L11-201209-300LMA30T_0805
AVDD=100mA
1
+1.8VS
L14
+VDDA18HTPLL
C433
2.2U_0603_6.3V4Z
L17
1
2
MBK2012221YZF 0805 1
C118
2.2U_0603_6.3V4Z
GMCH_CRT_G
18 GMCH_CRT_G
GMCH_CRT_B
18 GMCH_CRT_B
R59
+NB_PLLVDD
+NB_HTPVDD
+VDDA18PCIEPLL
+VDDA18HTPLL
L6
1
2
MBK2012221YZF 0805 1
C69
2.2U_0603_6.3V4Z
15
15
+1.1VS
1
2
R40
4.7K_0402_5%
1
2
R34
4.7K_0402_5%
GMCH_LCD_CLK
2
4.7K_0402_5%
GMCH_LCD_DATA
2
4.7K_0402_5%
1
R3181
R323
GMCH_DDC_CLK
2
GMCH_DDC_DATA
4.7K_0402_5%
2
4.7K_0402_5%
CLK_NBHT
CLK_NBHT#
1
R5111
R512
GMCH_CRT_CLK
2
4.7K_0402_5%
GMCH_CRT_DATA
2
4.7K_0402_5%
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_DDC_DATA
GMCH_DDC_CLK
16 GMCH_LCD_CLK
16 GMCH_LCD_DATA
17 GMCH_DDC_DATA
17 GMCH_DDC_CLK
Strap pin
+3VS
43 POWER_SEL
VDDA18HTPLL
SYSRESETb
POWERGOOD
LDTSTOPb
ALLOW_LDTSTOP
15 CLK_SBLINK_BCLK
15 CLK_SBLINK_BCLK#
1
R325
1
R329
H17
VDDA18PCIEPLL1
VDDA18PCIEPLL2
15 CLK_NBGFX
15 CLK_NBGFX#
+3VS
PLLVDD(NC)
PLLVDD18(NC)
PLLVSS(NC)
D8
A10
NB_LDTSTOP#
C10
NB_ALLOW_LDTSTOPC12
15 NB_OSC_14.318M
2
1
R41
10K_0402_5%
POWER_SEL
13
C25
C24
HT_REFCLKP
HT_REFCLKN
E11
F11
REFCLK_P/OSCIN(OSCIN)
REFCLK_N(PWM_GPIO3)
T2
T1
GFX_REFCLKP
GFX_REFCLKN
U1
U2
GPP_REFCLKP
GPP_REFCLKN
V4
V3
GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN)
B9
A9
B8
A8
B7
A7
I2C_CLK
I2C_DATA
DDC_DATA0/AUX0N(NC)
DDC_CLK0/AUX0P(NC)
DDC_CLK1/AUX1P(NC)
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3P(PCIE_RESET_GPIO5)
TXOUT_U3N(NC)
B18
A18
A17
B17
D20
D21
D18
D19
GMCH_TZOUT0+
GMCH_TZOUT0GMCH_TZOUT1+
GMCH_TZOUT1GMCH_TZOUT2+
GMCH_TZOUT2-
16
16
16
16
16
16
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
B16
A16
D16
D17
GMCH_TXCLK+
GMCH_TXCLKGMCH_TZCLK+
GMCH_TZCLK-
DAC_RSET(PWM_GPIO1)
A12
D14
B12
NB_RESET#
0_0402_5%
DAC_HSYNC(PWM_GPIO4)
DAC_VSYNC(PWM_GPIO6)
DAC_SCL(PCE_RCALRN)
DAC_SDA(PCE_TCALRN)
D7
E7
+VDDA18PCIEPLL
1
NB_PWRGD_R
R319
13,19,25,26,28,29,30 PLT_RST#
RED(DFT_GPIO0)
REDb(NC)
GREEN(DFT_GPIO1)
GREENb(NC)
BLUE(DFT_GPIO3)
BLUEb(NC)
+NB_PLLVDD
+NB_HTPVDD
+1.8VS
G18
G17
E18
F18
E19
F19
GMCH_CRT_HSYNCA11
GMCH_CRT_VSYNCB11
GMCH_CRT_CLK F8
GMCH_CRT_DATAE8
13,18 GMCH_CRT_HSYNC
13,18 GMCH_CRT_VSYNC
18 GMCH_CRT_CLK
18 GMCH_CRT_DATA
C_Pr(DFT_GPIO5)
Y(DFT_GPIO2)
COMP_Pb(DFT_GPIO4)
16
16
16
16
16
16
VDDLTP18(NC)
VSSLTP18(NC)
A13
B13
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
A15
B15
A14
B14
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
C14
D15
C16
C18
C20
E20
C22
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
E9
F7
G12
16
16
16
16
+VDDLT18
R26
1
D9
D10
SUS_STAT#(PWM_GPIO5)
D12
THERMALDIODE_P
THERMALDIODE_N
AE8
AD8
TESTMODE
D13
AUX_CAL(NC)
C442
0.1U_0402_16V4Z
1 UMA@ 2
R3301
20_0402_5%
R317 UMA@ 0_0402_5%
R328
1.27K_0402_1%
TMDS_HPD(NC)
HPD(NC)
L46
1
2
MBC1608121YZF_0603
+VDDLT18
1
+1.8VS
C439
2.2U_0603_6.3V4Z
+VDDLTP18
UMA@
MIS.
L42
1
2
1 MBC1608121YZF_0603
+VDDLTP18
+NB_PLLVDD
L41
1
2
MBK2012221YZF 0805 1
+1.8VS
GMCH_CRT_R
18 GMCH_CRT_R
+1.1VS
E17
F17
F15
GMCH_TXOUT0+
GMCH_TXOUT0GMCH_TXOUT1+
GMCH_TXOUT1GMCH_TXOUT2+
GMCH_TXOUT2-
A22
B22
A21
B21
B20
A20
A19
B19
+1.8VS
2
C443
4.7U_0805_10V4Z
GMCH_ENVDD 16
ENBKL 14,30
R313
1.27K_0402_1%
UMA@
+AVDDQ
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
PART 3 OF 6
C84
2.2U_0603_6.3V4Z
AVDD1(NC)
AVDD2(NC)
AVDDDI(NC)
AVSSDI(NC)
AVDDQ(NC)
AVSSQ(NC)
CRT/TVOUT
1
2
FBM-L11-201209-300LMA30T_0805
C99
2.2U_0603_6.3V4Z
+NB_HTPVDD
L10
1
2
MBK2012221YZF 0805 1
F12
E12
F14
G15
H15
H14
PLL PWR
LVTM
L12
+1.8VS
U25C
PM
C106
2.2U_0603_6.3V4Z
+1.8VS
C75
22U_0805_6.3V6M
+AVDD2
1
2
FBM-L11-201209-300LMA30T_0805 1
CLOCKs
+3VS
GMCH_CRT_R
2
133_0402_1%
GMCH_CRT_G
2
150_0402_1%
GMCH_CRT_B
2
150_0402_1%
1
R64
1
R63
1
R71
10K_0402_5%
2
HDMI_DET 14,17
1
2
R316 0_0402_5%
SUS_STAT# 20
SUS_STAT_R# 13
NB_THERMAL_DA 21
NB_THERMAL_DC 21
Strap pin
NB temp to SB
1
2
R359
1.8K_0402_5%
RS780M_FCBGA528
Strap pin
+1.8VS
+3VS
R540
300_0402_5%
NB_ALLOW_LDTSTOP
FDV301N_NL_SOT23-3
Q56
NB_LDTSTOP#
FDV301N_NL_SOT23-3
R571
R570
R332
1
R534
4.7K_0402_5%
Q28
@
6,19 LDT_STOP#
R338
300_0402_5% @
NB_PWRGD_R
FDV301N_NL_SOT23-3
19 ALLOW_LDTSTOP
Q29
21
2
R324
4.7K_0402_5%
G
3
NB_PWRGD
0_0402_5%
1
2
R414
R333
300_0402_5%
20
6 CPU_LDT_REQ#
+3VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
0_0402_5%
0_0402_5%
0_0402_5%
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
11
of
50
U25F
0.68A
2
22U_0805_6.3V6M
1
C134
1
C136
1
C135
2
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
C72
22U_0805_6.3V6M
C88
22U_0805_6.3V6M
C92
2
1
C87
1
C91
1
C93
2
2
0.1U_0402_16V4Z
J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10
0.6A
C89
2
0.1U_0402_16V4Z
22U_0805_6.3V6M
0.64A
F9
G9
AE11
AD11
+1.8VS
+1.8VS
C432
1U_0402_6.3V4Z
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
VDD18_1
VDD18_2
VDD18_MEM1(NC)
VDD18_MEM2(NC)
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDD33_1(NC)
VDD33_2(NC)
+NB_CORE
VDD_CORE=5A
7.6A
1
+
2
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
RS780M_FCBGA528
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
+3VS
1
RS780M_FCBGA528
C431
1U_0402_6.3V4Z
@
L4
1
2
FBMA-L11-201209-221LMA30T_0805
L3
1
2
FBMA-L11-201209-221LMA30T_0805
+1.1VS
330U_D2E_2.5VM
L9
2A
2
1
FBMA-L11-201209-221LMA30T_0805
1
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
C29
+1.8VS
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
PART 6/6
C95
0.1U_0402_16V4Z
1
C96
U25D
0.1U_0402_16V4Z
PAR 4 OF 6
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
AD16
AE17
AD17
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)
W12
Y12
AD18
AB13
AB18
V14
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)
V15
W14
MEM_CKP(NC)
MEM_CKN(NC)
AE12
AD12
SBD_MEM/DVO_I/F
1
C123
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
C38
1
C130
AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17
2
20.1U_0402_16V4Z
0.1U_0402_16V4Z
C36
FBMA-L11-201209-221LMA30T_0805
1
1
22U_0805_6.3V6M
2A
C73
C82
C103
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
0.1U_0402_16V4Z
L21
+1.2V_HT
H18
G19
F20
E21
D22
B23
A23
22U_0805_6.3V6M
2
0.1U_0402_16V4Z
2
2
2
2
C97
C139
2
2
2
2
22U_0805_6.3V6M 0.1U_0402_16V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
1
1
C102
C147
0.68A
0.1U_0402_16V4Z
C127
C74
C85
C81
C86
C110
C131
22U_0805_6.3V6M
22U_0805_6.3V6M
C35
C34
1.1A
0.1U_0402_16V4Z
C150
+1.1VS
+VDDA11PCIE
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
C112
PART 5/6
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
0.1U_0402_16V4Z
2A
VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
0.1U_0402_16V4Z
0.1U_0402_16V4Z +VDDHTRX
J17
K16
L16
M16
P16
R16
T16
C94
FBMA-L11-201209-221LMA30T_0805
VDDA_12=2.5A
U25E
2
0.1U_0402_16V4Z
L25
0.1U_0402_16V4Z
L5
1
2
FBMA-L11-201209-221LMA30T_0805
C114
2
2
2
0.1U_0402_16V4Z
C104
C121
0.1U_0402_16V4Z
C117
C107
C116
2
22U_0805_6.3V6M
0.1U_0402_16V4Z
C109
C101
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
GROUND
0.1U_0402_16V4Z
+VDDHT
0.1U_0402_16V4Z
0.1U_0402_16V4Z
FBMA-L11-201209-221LMA30T_0805
0.1U_0402_16V4Z
L16
2A
+1.1VS
POWER
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
MEM_COMPP(NC)
MEM_COMPN(NC)
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
Y17
W18
AD20
AE21
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
W17
AE19
IOPLLVDD18(NC)
IOPLLVDD(NC)
AE23
AE24
IOPLLVSS(NC)
AD23
MEM_VREF(NC)
AE18
+1.8VS
+1.1VS
RS780M_FCBGA528
4
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
RS780 PWR/GND
Rev
1.0
JALB0 LA-4171P
Sheet
12
of
50
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
2
R46
2
R45
11,18 GMCH_CRT_VSYNC
1
1
3K_0402_5%
1
3K_0402_5%
+3VS
DFT_GPIO1: LOAD_EEPROM_STRAPS
1
2
@R320
@
R320
150_0402_1%
D17
@ CH751H-40_SC76
2
1
11 AUX_CAL
RS780 DFT_GPIO1
11 SUS_STAT_R#
PLT_RST# 11,19,25,26,28,29,30
11,18 GMCH_CRT_HSYNC
1
3K_0402_5%
1
3K_0402_5%
+3VS
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
RS780 STRAPS
Rev
1.0
JALB0 LA-4171P
Sheet
13
of
50
10 PCIE_MTX_C_GRX_N[0..15]
10 PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P10
B
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P13
VGA_ON 32
19
VGA_RST#
20 HDA_SYNC_MXM
20 HDA_BCLK_MXM
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
1
C183
VGA@
680P_0402_50V7K 68P_0402_50V8J
2
2
HDA_SYNC_MXM
HDA_BCLK_MXM
D_EC_SMB_DA1
D_EC_SMB_CK1
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_DDC_CLK
VGA_DDC_DATA
HDA_SDI_MXM
HDA_SDO_MXM
18 VGA_CRT_HSYNC
18 VGA_CRT_VSYNC
18 VGA_DDC_CLK
18 VGA_DDC_DATA
20 HDA_SDI_MXM
20 HDA_SDO_MXM
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P1
C668
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P2
+3VS
@
1
0.1U_0402_16V4Z
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3
2
21,30,31,37,39,42
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P4
ACIN
U43
Y
A
@
NC7SZ08P5X_NL_SC70-5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P9
11,17 HDMI_DET
17 VGA_DVI_TXC17 VGA_DVI_TXC+
VGA_DVI_TXCVGA_DVI_TXC+
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P11
17 VGA_DVI_TXD217 VGA_DVI_TXD2+
VGA_DVI_TXD2VGA_DVI_TXD2+
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
17 VGA_DVI_TXD117 VGA_DVI_TXD1+
VGA_DVI_TXD1VGA_DVI_TXD1+
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P13
17 VGA_DVI_TXD017 VGA_DVI_TXD0+
VGA_DVI_TXD0VGA_DVI_TXD0+
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P10
PEX_RX1#
GND
PEX_RX1
PEX_TX1#
GND
PEX_TX1
PEX_RX0#
GND
PEX_RX0
PEX_TX0#
GND
PEX_TX0
PEX_REFCLK#
PRSNT1#
PEX_REFCLK
TV_C/HDTV_Pr
CLK_REQ#
GND
PEX_RST#
TV_Y/HDTV_Y
RSVD
GND
RSVD
TV_CVBS/HDTV_Pb
SMB_DAT
GND
SMB_CLK
VGA_RED
THERM#
GND
VGA_HSYNC
VGA_GRN
VGA_VSYNC
GND
DDCA_CLK
VGA_BLU
DDCA_DAT
GND
IGP_UCLK#
LVDS_UCLK#
IGP_UCLK
LVDS_UCLK
GND
GND
RSVD
LVDS_UTX3#
RSVD
LVDS_UTX3
RSVD
GND
IGP_UTX2#
LVDS_UTX2#
IGP_UTX2
LVDS_UTX2
GND
GND
IGP_UTX1#
LVDS_UTX1#
IGP_UTX1
LVDS_UTX1
GND
GND
IGP_UTX0#
LVDS_UTX0#
IGP_UTX0
LVDS_UTX0
GND
GND
IGP_LCLK#/DVI_B_CLK#
LVDS_LCLK#
IGP_LCLK/DVI_B_CLK
LVDS_LCLK
DVI_B_HPD/GND
GND
RSVD
LVDS_LTX3#
RSVD
LVDS_LTX3
GND
GND
IGP_LTX2#/DVI_B_TX2#
LVDS_LTX2#
IGP_LTX2/DVI_B_TX2
LVDS_LTX2
GND
GND
IGP_LTX1#/DVI_B_TX1#
LVDS_LTX1#
IGP_LTX1/DVI_B_TX1
LVDS_LTX1
GND
GND
IGP_LTX0#/DVI_B_TX0#
LVDS_LTX0#
IGP_LTX0/DVI_B_TX0
LVDS_LTX0
DVI_A_HPD
GND
DVI_A_CLK#
DDCC_DAT
DVI_A_CLK
DDCC_CLK
GND
LVDS_PPEN
DVI_A_TX2#
LVDS_BL_BRGHT
DVI_A_TX2
LVDS_BLEN
GND
DDCB_DAT
DVI_A_TX1#
DDCB_CLK
DVI_A_TX1
2V5RUN
GND
GND
DVI_A_TX0#
3V3RUN
DVI_A_TX0
3V3RUN
GND
3V3RUN
GND
GND
+1.2V_HT
+2.5VS
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P15
R502 1
@
2 1K_0402_5%
VGA_CRT_R
1
0.1U_0603_25V7K
C567
C483
C482
0.1U_0402_16V4Z
VGA@ 2
2
0.1U_0402_16V4Z
VGA_CRT_G 18
VGA_CRT_B
VGA_CRT_B 18
VGA_TZCLKVGA_TZCLK+
VGA_TZCLK- 16
VGA_TZCLK+ 16
VGA_TZOUT1- 16
VGA_TZOUT1+ 16
VGA_TZOUT0VGA_TZOUT0+
VGA_TZOUT0- 16
VGA_TZOUT0+ 16
VGA_TXCLKVGA_TXCLK+
VGA_TXCLK- 16
VGA_TXCLK+ 16
VGA_TXOUT2VGA_TXOUT2+
VGA_TXOUT2- 16
VGA_TXOUT2+ 16
VGA_TXOUT1VGA_TXOUT1+
VGA_TXOUT1- 16
VGA_TXOUT1+ 16
VGA_TXOUT0VGA_TXOUT0+
VGA_TXOUT0- 16
VGA_TXOUT0+ 16
I2CC_SDA
I2CC_SCL
ENVDD
I2CC_SDA 16
I2CC_SCL 16
ENVDD
16
ENBKL
VGA_DVI_SDATA
VGA_DVI_SCLK
2
0.1U_0402_16V4Z
VGA@
Deciphered Date
D_EC_SMB_CK1
A
Q34B
2N7002DW-T/R7_SOT363-6
Title
Date:
D_EC_SMB_DA1
Q34A
2N7002DW-T/R7_SOT363-6
6,30,40 EC_SMB_CK1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
ENBKL
11,30
VGA_DVI_SDATA 17
VGA_DVI_SCLK 17
+3VS
6
VGA@
+2.5VS
VGA@
Issued Date
SPDIF_HDMI 33
VGA_TZOUT2- 16
VGA_TZOUT2+ 16
VGA_TZOUT1VGA_TZOUT1+
VGA@
Security Classification
+3VS
6,30,40 EC_SMB_DA1
160mil(4A)
HDA_RST#_MXM 20
VGA_CRT_R 18
VGA_CRT_G
R377
0_0402_5%
@
1
2
VGA_TZOUT2VGA_TZOUT2+
+5VS
B+
C202
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
ACES_88990-2D08
CONN@
+MXM_B+
L26 2
1
KC FBM-L11-201209-221LMAT_0805
VGA@
L27 2
1
KC FBM-L11-201209-221LMAT_0805
VGA@
1
C197
CLK_PCIE_VGA#
CLK_PCIE_VGA
15 CLK_PCIE_VGA#
15 CLK_PCIE_VGA
+5VS
ACES_88990-2D08
CONN@
160mil(4A)
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
231
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P3
PRSNT2#
PEX_TX15#
PEX_TX15
GND
PEX_TX14#
PEX_TX14
GND
PEX_TX13#
PEX_TX13
GND
PEX_TX12#
PEX_TX12
GND
PEX_TX11#
PEX_TX11
GND
PEX_TX10#
PEX_TX10
GND
PEX_TX9#
PEX_TX9
GND
PEX_TX8#
PEX_TX8
GND
PEX_TX7#
PEX_TX7
GND
PEX_TX6#
PEX_TX6
GND
PEX_TX5#
PEX_TX5
GND
PEX_TX4#
PEX_TX4
GND
PEX_TX3#
PEX_TX3
GND
PEX_TX2#
PEX_TX2
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P14
+1.8VS
140mil(3.5A)
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P2
PEX_RX15#
PEX_RX15
GND
PEX_RX14#
PEX_RX14
GND
PEX_RX13#
PEX_RX13
GND
PEX_RX12#
PEX_RX12
GND
PEX_RX11#
PEX_RX11
GND
PEX_RX10#
PEX_RX10
GND
PEX_RX9#
PEX_RX9
GND
PEX_RX8#
PEX_RX8
GND
PEX_RX7#
PEX_RX7
GND
PEX_RX6#
PEX_RX6
GND
PEX_RX5#
PEX_RX5
GND
PEX_RX4#
PEX_RX4
GND
PEX_RX3#
PEX_RX3
GND
PEX_RX2#
PEX_RX2
GND
2
4
6
8
10
12
14
16
18
20
22
24
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
RUNPWROK
5VRUN
GND
GND
GND
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P0
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
GND
GND
GND
GND
1
3
5
7
9
11
13
15
17
19
21
23
+MXM_B+
JMXM1B
10 PCIE_GTX_C_MRX_P[0..15]
JMXM1A
PCIE_MTX_C_GRX_P[0..15]
10 PCIE_MTX_C_GRX_P[0..15]
MXM Connector
Document Number
Rev
1.0
JALB0 LA-4171P
Friday, April 18, 2008
Sheet
1
14
of
50
+3VS_CLK
R230
1
2
+3VS
FBMA-L11-201209-601LMT10805
C348
+VDDCLK_IO
+1.2V_HT
C324
0.1U_0402_16V4Z
1
C344
22U_0805_10V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C363
C364
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C319
C339
2
0.1U_0402_16V4Z
C326
0.1U_0402_16V4Z
1
C325
2
0.1U_0402_16V4Z
C362
2
0.1U_0402_16V4Z
C350
1U_0402_6.3V4Z
R192
1
0.1U_0402_16V4Z
1
C316
FBMA-L11-201209-601LMT 0805
C313
0.1U_0402_16V4Z
1
C365
0.1U_0402_16V4Z
1
C323
C361
0.1U_0402_16V4Z
1
C322
C346
1U CLOSE PIN 69
2
2
22U_0805_10V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
R190
+CLK_VDDA
CLK_XTAL_OUT
22U_0805_10V4Z
1
C311
+3VS_CLK
U20
C321
0.1U_0402_16V4Z
CLK_XTAL_IN
FBMA-L11-201209-601LMT 0805
R197
8.2K_0402_5%
ICS 9LPRS488
49
48
VDDA
GNDA
62
66
VDDREF
GNDREF
SB_SRC_SLOW#
41
12
18
28
37
53
VDDSRC_IO
VDDSRC_IO
VDDATIG_IO
VDDSB_SRC_IO
VDDCPU_IO
CPUKG0T_LPRS
CPUKG0C_LPRS
56
55
CLK_CPU
CLK_CPU#
HTT0T_LPRS / 66 M
HTT0C_LPRS / 66 M
60
59
CLK_HTT
CLK_HTT#
3
17
29
38
44
54
61
69
VDDDOT
VDDSRC
VDDATIG
VDDSB_SRC
VDDSATA
VDDCPU
VDDHTT
VDD48
SB_SRC0T_LPRS
SB_SRC0C_LPRS
40
39
SB_SRC1T_LPRS
SB_SRC1C_LPRS
35
34
ATIG0T_LPRS
ATIG0C_LPRS
33
32
CLK_ATIG0
CLK_ATIG0#
1
R223
1
R226
ATIG1T_LPRS
ATIG1C_LPRS
31
30
CLK_ATIG1
CLK_ATIG1#
CLK_PCIE_VGA 14
CLK_PCIE_VGA# 14
VGA chip(Dis)
ATIG2T_LPRS
ATIG2C_LPRS
26
25
1
2
R227
1
2 0_0402_5%
R229VGA@
0_0402_5%
VGA@
SRC0T_LPRS
SRC0C_LPRS
23
22
CLK_SRC0
CLK_SRC0#
1
R239
1
R240
2
2 0_0402_5%
0_0402_5%
CLK_PCIE_LAN 26
CLK_PCIE_LAN# 26
GLAN
SRC1T_LPRS
SRC1C_LPRS
21
20
1
R244
1
R251
2
2 0_0402_5%
0_0402_5%
CLK_PCIE_CARD 29
CLK_PCIE_CARD# 29
SMBCLK
SMBDAT
1
2
ICH_SMBCLK0 8,9,17,20,28
ICH_SMBDATA0 8,9,17,20,28
+3VS_CLK
SRC_SLOW
22P_0402_50V8J
2
1
0.1U_0402_16V4Z
+VDDCLK_IO
22P_0402_50V8J
R195 8.2K_0402_5%
1
2
29 EXP_CLKREQ#
28 MINI1_CLKREQ#
R205 8.2K_0402_5%
1
2
+3VS_CLK
+3VS_CLK
R201 8.2K_0402_5%
1
2
C368
2
C343
1
14.31818MHZ_20P_6X1430004201
1
C360
R503
1
FBMA-L11-160808-601LMT 0603
24
28 MINI2_CLKREQ#
1
R231
CLKREQ2#
43
CLKREQ3#
42
CLKREQ4#
2
100_0402_5%
11 NB_OSC_14.318M
CLK_14M_SIO
30 CLK_14M_SIO
CLKREQ1#
50
1
2
R232
200_0402_1%
SEL_SATA
2 R522
1
33_0402_5%
SEL_HT66
1
R225
1
R222
2
2 0_0402_5%
0_0402_5%
2
2 0_0402_5%
0_0402_5%
1
1
R215 1
R206
R214
261_0402_1%
@
CPU
CLK_NBHT 11
CLK_NBHT# 11
CLK_SRC1
CLK_SRC1#
2
2 0_0402_5%
0_0402_5%
CLK_NBGFX 11
CLK_NBGFX# 11
NB GFX
63
REF2/SEL_27
64
REF1/SEL_SATA
65
REF0/SEL_HTT66
SRC2T_LPRS
SRC2C_LPRS
16
15
CLK_SRC2
CLK_SRC2#
1
R256
1
R255
2
2 0_0402_5%
0_0402_5%
CLK_PCIE_MINI1 28
CLK_PCIE_MINI1# 28
MiniCard_1
48MHz_0
SRC3T_LPRS
SRC3C_LPRS
14
13
CLK_SRC3
CLK_SRC3#
1
R263
1
R262
2
2 0_0402_5%
0_0402_5%
CLK_PCIE_MINI2 28
CLK_PCIE_MINI2# 28
MiniCard_2
SRC4T_LPRS
SRC4C_LPRS
10
9
CLK_SB_SRC0
CLK_SB_SRC0#
1
R199
1
R200
2
2 0_0402_5%
0_0402_5%
CLK_SBLINK_BCLK 11
CLK_SBLINK_BCLK# 11
NB A LINK
SRC5T_LPRS
SRC5C_LPRS
8
7
CLK_SRC5
CLK_SRC5#
1
R261
1
R260
2
2 0_0402_5%
0_0402_5%
CLK_PCIE_READER 25
CLK_PCIE_READER# 25
Card Reader
46
45
CLK_SB_SRC1
CLK_SB_SRC1#
1
R213
1
R218
2
2 0_0402_5%
0_0402_5%
CLK_SBSRC_BCLK 19
CLK_SBSRC_BCLK# 19
New Card
71
2 R243
1
33_0402_5%
20 CLK_48M_USB
70
48MHz_1
CLK_XTAL_IN
67
X1
CLK_XTAL_OUT
68
X2
2
R234
8.2K_0402_5%
R237
@
LAN
SRC 1
NEW CARD
SRC 2
MINI2
SRC 3
MINI1
RS740
PD#
ICS9LPRS488AKLFT_MLF72_10x10
RS780
HT_REFCLKP
NC
100M DIFF
100M DIFF
100M DIFF
100M DIFF
REFCLK_N
14M SE (3.3V)
NC
14M SE (1.8V)
NC
14M SE (1.1V)
vref
GFX_REFCLK
100M DIFF
100M DIFF
100M DIFF(IN/OUT)*
GPP_REFCLK
NC
100M DIFF
NC
100M DIFF
100M DIFF
HT_REFCLKN
SB RCLK
RX780
REFCLK_P
5
4
57
2
R220
1
1
8.2K_0402_5%
+3VS_CLK
C669
@
R238
8.2K_0402_5%
1U_0603_10V6K
A
R235
8.2K_0402_5%
1
SRC7T_LPRS/27MHz_SS
SRC7C_LPRS/27MHz_NS
SEL_SATA
SEL_HT66
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
8.2K_0402_5%
GNDDOT
GNDSRC
GNDSRC
GNDATIG
GNDSB_SRC
GNDSATA
GNDCPU
GNDHTT
GND48
GNDPAD
SRC 0
+3VS_CLK
6
11
19
27
36
47
52
58
72
73
R210
8.2K_0402_5%
CLK_CPU_BCLK# 6
CLKREQ0 #
51
CLK_CPU_BCLK 6
SRC_SLOW
+3VS_CLK
Y4
0*
SEL_HTT66
0*
NB_OSC_14.318M
1*
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SEL_SATA
* default
Date:
Clock generator
Rev
1.0
JALB0 LA-4171P
Sheet
15
of
50
TXOUT0+
TXOUT0-
TXOUT1+
TXOUT1-
+LCDVDD
+3VS
+3VALW
TXOUT2+
TXOUT2-
W=60mils
TXCLK+
TXCLK-
R5
300_0603_5%
R9
100K_0402_5%
TZOUT0+
TZOUT0-
4.7U_0805_10V4Z
C2
2N7002DW-T/R7_SOT363-6
Q2B
TZOUT2+
TZOUT2-
+LCDVDD
0.047U_0402_16V7K
2
1
C5
4.7U_0805_10V4Z
2
1
2
RP31
1
2
RP30
1
2
RP29
1
2
RP28
1
2
RP27
1
2
RP26
1
2
RP25
1
2
RP24
VGA_TXOUT0+
4
VGA_TXOUT03
VGA@ 0_0404_4P2R_5%
VGA_TXOUT1+
4
VGA_TXOUT13
VGA@ 0_0404_4P2R_5%
VGA_TXOUT2+
4
VGA_TXOUT23
VGA@ 0_0404_4P2R_5%
VGA_TXCLK+
4
VGA_TXCLK3
VGA@ 0_0404_4P2R_5%
VGA_TZOUT0+
4
VGA_TZOUT03
VGA@ 0_0404_4P2R_5%
VGA_TZOUT1+
4
VGA_TZOUT13
VGA@ 0_0404_4P2R_5%
VGA_TZOUT2+
4
VGA_TZOUT23
VGA@ 0_0404_4P2R_5%
VGA_TZCLK+
4
VGA_TZCLK3
VGA@ 0_0404_4P2R_5%
1
2
RP13
GMCH_LCD_CLK
4
GMCH_LCD_DATA
3
UMA@ 0_0404_4P2R_5%
VGA_TXOUT0+ 14
VGA_TXOUT0- 14
VGA_TXOUT1+ 14
VGA_TXOUT1- 14
VGA_TXOUT2+ 14
VGA_TXOUT2- 14
VGA_TXCLK+ 14
VGA_TXCLK- 14
VGA_TZOUT0+ 14
VGA_TZOUT0- 14
VGA_TZOUT1+ 14
VGA_TZOUT1- 14
VGA_TZOUT2+ 14
VGA_TZOUT2- 14
VGA_TZCLK+ 14
VGA_TZCLK- 14
C6
I2CC_SCL
I2CC_SDA
0.1U_0402_16V4Z
GMCH_LCD_CLK 11
GMCH_LCD_DATA 11
R7
VGA@
100K_0402_5%
TZCLK+
TZCLK-
W=60mils
R4
UMA@
2 0_0402_5%
VGA@
0_0402_5%
2
ENVDD
1
1K_0402_5%
1
C3
1
14
R6
AO3413_SOT23-3
Q1
11 GMCH_ENVDD
R3
TZOUT1+
TZOUT1-
2N7002DW-T/R7_SOT363-6
Q2A
TXOUT0TXOUT0+
+3VS
TXOUT1TXOUT1+
RP1
TXOUT2TXOUT2+
RP2
DAC_BRIG
R8
C11
INVTPWM
C9
30
BKOFF#
BKOFF#
D2
2 RB751V_SOD323
4.7K_0402_5%
C
DISPOFF#
DISPOFF#
C8
220P_0402_50V7K
RP3
TXCLKTXCLK+
220P_0402_50V7K
RP4
TZOUT0TZOUT0+
220P_0402_50V7K
RP5
TZOUT1TZOUT1+
RP6
TZOUT2TZOUT2+
JLVDS1
+INVPWR_B+
+3VS
14
14
I2CC_SCL
I2CC_SDA
I2CC_SCL
I2CC_SDA
TZOUT0TZOUT0+
TZOUT1+
TZOUT1TZOUT2+
TZOUT2TZCLKTZCLK+
20
20
0_0603_5%
R1
1
R2
1
0_0603_5%
USB20_N5
USB20_P5
2
2
USB20_CMOS_N5
USB20_CMOS_P5
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
GND
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
GND
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
RP7
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
ACES_88242-4001
CONN@
DAC_BRIG
INVTPWM
DISPOFF#
TZCLKTZCLK+
DAC_BRIG 30
INVT_PWM 30
RP8
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
3
4
UMA@ 0_0404_4P2R_5%
3
4
UMA@ 0_0404_4P2R_5%
3
4
UMA@ 0_0404_4P2R_5%
3
4
UMA@ 0_0404_4P2R_5%
3
4
UMA@ 0_0404_4P2R_5%
3
4
UMA@ 0_0404_4P2R_5%
3
4
UMA@ 0_0404_4P2R_5%
3
4
UMA@ 0_0404_4P2R_5%
GMCH_TXOUT0GMCH_TXOUT0+
GMCH_TXOUT1GMCH_TXOUT1+
GMCH_TXOUT2GMCH_TXOUT2+
GMCH_TXCLKGMCH_TXCLK+
GMCH_TZOUT0GMCH_TZOUT0+
GMCH_TZOUT1GMCH_TZOUT1+
GMCH_TZOUT2GMCH_TZOUT2+
GMCH_TZCLKGMCH_TZCLK+
GMCH_TXOUT0- 11
GMCH_TXOUT0+ 11
GMCH_TXOUT1- 11
GMCH_TXOUT1+ 11
GMCH_TXOUT2- 11
GMCH_TXOUT2+ 11
GMCH_TXCLK- 11
GMCH_TXCLK+ 11
C
GMCH_TZOUT0- 11
GMCH_TZOUT0+ 11
GMCH_TZOUT1- 11
GMCH_TZOUT1+ 11
GMCH_TZOUT2- 11
GMCH_TZOUT2+ 11
GMCH_TZCLK- 11
GMCH_TZCLK+ 11
+LCDVDD
W=60mils
TXOUT0TXOUT0+
TXOUT1TXOUT1+
TXOUT2+
TXOUT2TXCLKTXCLK+
R574 1
R575 1
2 0_0603_5%
2 0_0603_5%
+3VS
+3VALW
C10
0.1U_0402_16V4Z
+INVPWR_B+
+LCDVDD
L1
2
1
KC FBM-L11-201209-221LMAT_0805
W=40mils
B+
L2
2
1
KC FBM-L11-201209-221LMAT_0805
C12
C13
C4
10U_0805_10V4Z
C7
0.1U_0402_16V4Z
680P_0402_50V7K 68P_0402_50V8J
2
2
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
16
of
50
EC_DOCKIN
38 EC_DOCKIN
+HDMI_5V_OUT
0_0402_5%
1
2
R87
6.8K_0402_5%
2
2
2
BSH111 1N_SOT23-3
Q47
1
D
VGA_DVI_SDATA_R
D_DVI_SDATA 38
R84
6.8K_0402_5%
HDMI_HPD
+HDMI_5V_OUT
HDMI_SDATA
HDMI_SCLK
HDMI_SCLK
HDMI_R_CK-
BSH111 1N_SOT23-3
Q50
1
HDMI_R_CK+
HDMI_R_D0HDMI_SDATA
HDMI_R_D0+
HDMI_R_D1-
VGA_DVI_SDATA_R 3
0_0402_5%
BSH111 1N_SOT23-3
Q48
1
R94
1 UMA@ 2
VGA_DVI_SCLK_R
D_DVI_SCLK 38
11 GMCH_DDC_DATA
1 VGA@ 2
R98
14 VGA_DVI_SDATA
R91
2K_0402_5%
VGA_DVI_SCLK_R
0_0402_5%
EC_DOCKIN#_S0
18,33,38 EC_DOCKIN#_S0
1 VGA@ 2
R90
2K_0402_5%
R88
0_0402_5%
14 VGA_DVI_SCLK
1 UMA@ 2
R89
11 GMCH_DDC_CLK
JHDMI1
D
closed to JHDMI1
HDMI_R_D1+
HDMI_R_D2HDMI_R_D2+
VGA_DVI_SCLK_R
VGA_DVI_SDATA_R
EC_DOCKIN#_S0
2
5
1
7
1A
2A
1OE#
2OE#
VCC
1B
2B
GND
8
3
6
4
D_DVI_SCLK
D_DVI_SDATA
2
5
1
7
1A
2A
1OE#
2OE#
VCC
1B
2B
GND
8
3
6
4
+5VS
F1
1
RB491D_SC59-3
1.1A_6VDC_FUSE
C177
0.1U_0402_16V4Z
HDMI_SCLK
HDMI_SDATA
HDMI_CLK-
D_DVI_DET 38
0_0402_5%
+HDMI_5V_OUT
HDMI_HPD
+3VS
5
1
HDMI_R_CK-
R105
2.2K_0402_5%
4
C242
U9
SN74AHCT1G125GW_SOT353-5
2
0_0402_5%
HDMI_R_CK+
HDMI_TX0-
1
R384
2
0_0402_5%
HDMI_R_D0-
0.1U_0402_16V7K
1
R383
HDMI_DET 11,14
HDMI_CLK+
1 R123
P
OE#
2
0_0402_5%
@ WCM-2012-900T_0805
1
R382
L50
1
R524
20
21
22
23
W=40mils
SN74CBTD3306CPWR_TSSOP8
@
C243
0.1U_0402_16V7K
2
+HDMI_5V_OUT
D6
SN74CBTD3306CPWR_TSSOP8
@
+HDMI_5V_OUT
U42
VGA_DVI_SCLK_R
VGA_DVI_SDATA_R
EC_DOCKIN
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
TYCO_1939864-1
CONN@
+HDMI_5V_OUT
U41
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
L51
100K_0402_5%
@ WCM-2012-900T_0805
HDMI_TX0+
1
R385
2
0_0402_5%
HDMI_R_D0+
HDMI_TX1-
1
R386
2
0_0402_5%
HDMI_R_D1-
+3VS
D21
SS1040_SOD123
MS
+3VS_D80
T12
T13
PAD
PAD
8,9,15,20,28 ICH_SMBCLK0
8,9,15,20,28 ICH_SMBDATA0
+3VS
+3VS
A
+3VS
+3VS
1
R395
1
R401
1
R396
1
R402
1
R397
1
R403
1
R398
1
R404
2
@ 4.7K_0402_5%
2
0_0402_5%
2
@ 4.7K_0402_5%
2
0_0402_5%
2
@ 4.7K_0402_5%
2
0_0402_5%
2
@ 4.7K_0402_5%
2
0_0402_5%
16
55
SEL_OUT
SEL_IN
19
20
SCL/S3
SDA/S2
OE
1
17
54
56
MS
TEST_OUT
TEST_IN
OE
A0
A1
A2
A3
49
50
51
52
A0/S4
A1/S5
A2/S6
A3/S7
@
@
MS
A0
T11
PAD
@
A1
A2
A3
C485
@ WCM-2012-900T_0805
0.1U_0402_16V4Z
AVDD
D0+
D0D1+
D1D2+
D2D3+
D3-
0.1U_0402_16V4Z
2
D3-_B
D3+_B
D2-_B
D2+_B
D1-_B
D1+_B
D0-_B
D0+_B
25
26
28
29
31
32
34
35
HDMI_TX2HDMI_TX2+
HDMI_TX1HDMI_TX1+
HDMI_TX0HDMI_TX0+
HDMI_CLKHDMI_CLK+
HDMI_TX1+
1
R387
2
0_0402_5%
HDMI_R_D1+
HDMI_TX2-
1
R388
2
0_0402_5%
HDMI_R_D2-
L53
1
@ WCM-2012-900T_0805
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
L : D-->A
H: D-->B
4
5
7
8
9
10
12
13
VGA_DVI_TXC+
VGA_DVI_TXCVGA_DVI_TXD0+
VGA_DVI_TXD0VGA_DVI_TXD1+
VGA_DVI_TXD1VGA_DVI_TXD2+
VGA_DVI_TXD2-
3
14
21
27
30
33
39
42
45
53
NOTE:
14
14
14
14
14
14
14
14
C486
D3-_A
D3+_A
D2-_A
D2+_A
D1-_A
D1+_A
D0-_A
D0+_A
37
38
40
41
43
44
46
47
NC
T-pad
18
57
D_DVI_TXD2- 38
D_DVI_TXD2+ 38
D_DVI_TXD1- 38
D_DVI_TXD1+ 38
D_DVI_TXD0- 38
D_DVI_TXD0+ 38
D_DVI_TXC- 38
D_DVI_TXC+ 38
HDMI_TX2+
2
0_0402_5%
HDMI_R_D2+
PI3HDMI412ADZBE_TQFN56_8X8
Security Classification
2008/04/16
Issued Date
1
R390
AVSS
U28
22
OE
1
RB751V_SOD323
2
4.7K_0402_5%
L52
23
2
D22
1
R400
2
4.7K_0402_5%
2
0_0402_5%
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
+3VS
1
R393
1
R392 @
+3VS
2
6
11
15
24
36
48
2009/04/16
Deciphered Date
Title
DVI/HDMI Connector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
1.0
JALB0 LA-4171P
Date:
Sheet
17
of
50
CRT Connector
D5
D4
W=40mils
D3
+5VS
+R_CRT_VCC
+CRT_VCC
D18
2
1.1A_6VDC_FUSE
1
C430
0.1U_0402_16V4Z
2
RB491D_SC59-3
+5VS
150_0402_1%
C129
C108
C133
@
C115
@
C105
@
C83
C98
1
10K_0402_5%
CRT_R_SW
DSUB_12
1
@
2
1
C125
C76
100P_0402_50V8J
100P_0402_50V8J 2
SN74AHCT1G125DCKR_SC70-5
+CRT_VCC
2
0.1U_0402_16V4Z
U4
Y
4D_CRT_VSYNC
+CRT_VCC
+3VS
SN74AHCT1G125DCKR_SC70-5
D_CRT_HSYNC 38
D_CRT_VSYNC 38
CRT_VSYNC
CRT_HSYNC
+3VS
R380
0_0402_5%
VGA@1
2
VGA@1
2
R379
0_0402_5%
R367
6.8K_0402_5%
R366
R36
4.7K_0402_5%
CRT_G_SW
DSUB_12 2
CRT_B_SW
DSUB_15 2
R326
2
4.7K_0402_5%
2
G
1
1
R35
2
VGA@ 0_0402_5%
VGA_DDC_DATA 14
2
VGA@ 0_0402_5%
VGA_DDC_CLK 14
2
G
VGA@
BSH111 1N_SOT23-3
Q52
1
3
R368 1
R369 1
33_0402_5%
14 VGA_CRT_B
14 VGA_CRT_G
CRT_R_SW
14 VGA_CRT_R
6.8K_0402_5%
R375
0_0402_5%
VGA@1
2
R374
0_0402_5%
VGA@1
2
R376
0_0402_5%
VGA@1
2
+CRT_VCC
C66
DSUB_15
1
D_CRT_HSYNC
CRT_VSYNC
14 VGA_CRT_VSYNC
14 VGA_CRT_HSYNC
R30
100K_0402_5%
C90
CRT_G_SW
CRT_B_SW
CRT_DET# 20,38
CRT_VSYNC_2
2
FCM1608C-121T_0603
SUYIN_070549FR015S208CR
CONN@
2
100P_0402_50V8J
100P_0402_50V8J
P
A
1
L8
U3
11 GMCH_CRT_B
11 GMCH_CRT_G
CRT_HSYNC
OE#
R371
0_0402_5%
UMA@1
2
R372
0_0402_5%
UMA@1
2
R373
0_0402_5%
UMA@
2
1
11 GMCH_CRT_R
CRT_VSYNC
CRT_HSYNC
OE#
R381
0_0402_5%
UMA@1
2
UMA@1
2
R378
0_0402_5%
2 CRT_HSYNC_2
FCM1608C-121T_0603
11,13 GMCH_CRT_VSYNC
11,13 GMCH_CRT_HSYNC
2
R13
2
0.1U_0402_16V4Z
5
C67
1
L11
16
17
CRT_B_2
C145
CRT_G_2
2
FCM2012C-800_0805
100P_0402_50V8J
2
FCM2012C-800_0805
JCRT1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
5P_0402_50V8C
C100
L15
5P_0402_50V8C
L20
CRT_B_1
2
FCM2012C-800_0805
CRT_R_2
5P_0402_50V8C
2
2
150_0402_1%
C120
CRT_G_1
2
FCM2012C-800_0805
5P_0402_50V8C
5P_0402_50V8C
C140
R54
5P_0402_50V8C
L13
150_0402_1%
2
FCM2012C-800_0805
6P_0402_50V8D
L18
CRT_B
R70
L24
6P_0402_50V8D
CRT_G
R74
CRT_R_1
2
FCM2012C-800_0805
L23
6P_0402_50V8D
CRT_R
W=40mils
33_0402_5%
R27
VGA@
BSH111 1N_SOT23-3
Q53
public board write w/o PH
+5VS
38 D_CRT_DATA
1
C155
U7
17,33,38 EC_DOCKIN#_S0
CRT_R_SW
CRT_G_SW
CRT_B_SW
1
15
SEL
OE#
4
7
9
12
1A
2A
3A
4A
VCC
16
1B1
2B1
3B1
4B1
2
5
11
14
1B2
2B2
3B2
4B2
3
6
10
13
0.1U_0402_16V4Z
D_CRT_R
D_CRT_G
D_CRT_B
38
R17
D_CRT_CLK
R18
1
1
GMCH_CRT_DATA
UMA@2
0_0402_5%
UMA@2
GMCH_CRT_CLK
0_0402_5%
GMCH_CRT_DATA 11
GMCH_CRT_CLK 11
D_CRT_R 38
D_CRT_G 38
D_CRT_B 38
CRT_R
CRT_G
CRT_B
GND
FSAV330MTC_TSSOP16
NOTE:
CRT_R_SW
CRT_G_SW
CRT_B_SW
L : A-->B1
H: A-->B2
CRT_R
CRT_G
CRT_B
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
CRT Connector
Document Number
Rev
1.0
JALB0 LA-4171P
Sheet
18
of
50
1
R154
2 A_RST#
@ 8.2K_0402_5%
U10A
+PCIE_VDDR
1
2
MBC1608121YZF_0603
C523
10U_0805_10V4Z
PCIE_PVSS
PLT_RST#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
AD3
AC4
AE2
AE3
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
SERIRQ
G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15
PLT_RST# 11,13,25,26,28,29,30
NC7SZ08P5X_NL_SC70-5
+3VALW
C298
5
B
U13
Y
VGA_RST#
VGA_RST# 14
NC7SZ08P5X_NL_SC70-5
2
R185 @
NB_HT_CLKP
NB_HT_CLKN
P17
M18
CPU_HT_CLKP
CPU_HT_CLKN
M23
M22
SLT_GFX_CLKP
SLT_GFX_CLKN
1
33_0402_5%
20M_0402_5%
2
J19
J18
GPP_CLK0P
GPP_CLK0N
L20
L19
GPP_CLK1P
GPP_CLK1N
M19
M20
GPP_CLK2P
GPP_CLK2N
N22
P22
GPP_CLK3P
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
C192
SB_32KHI
25M_X2
+3VS
R394
4.7K_0402_5%
H_PWRGD
H_PWRGD_L 46
FDV301N_NL_SOT23-3
Q35
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
@
PAD
T18
1
2
R180 0_0402_5%
23
23
23
23
23
23
PM_CLKRUN# 30
IN
NC
SB_32KHI
A3
X1
32.768KHZ_12.5P_MC-306
B3
11 ALLOW_LDTSTOP
6 H_PROCHOT#
6 H_PWRGD
6,11 LDT_STOP#
6
LDT_RST#
H_PWRGD
F23
F24
F22
G25
G24
ALLOW_LDTSTP
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#
RTCCLK
INTRUDER_ALERT#
VBAT
CLK_PCI_EC
CLK_PCI_EC 23,30
LPCCLK1 23,30
STRAP PIN
EC & Debug
LPC_DRQ1# 30
SERIRQ 30
C3
C2
B2
1
R127
2
1M_0402_5%
RTC_CLK 23
+RTCVCC
STRAP PIN
+RTCBATT
+RTCVCC
D10
+RTCVCC_R
218S7EALA11FG_BGA528_SB700
0.1U_0402_16V4Z
C289 1
1
R184
1 C293
2
510_0402_5%
W=20mils
2
R178
1
1K_0402_5%
J1
C297
2008/04/16
@
0_0603_5%
Security Classification
Issued Date
2 22_0402_5%
LPC_AD0 30
LPC_AD1 30
LPC_AD2 30
LPC_AD3 30
LPC_FRAME# 30
RTC
X2
LPC
SB_32KHO
Close to SB
CPU
SB_32KHO
12P_0402_50V8J
R120 1
2009/04/16
Deciphered Date
Title
0.1U_0402_16V4Z
NC
OUT
RTC XTAL
R85
20M_0603_5%
C212
J20
X2
12P_0402_50V8J
23
23
23
23
+1.8VS
1U_0402_6.3V4Z
@ R83
@R83
1
NB_DISP_CLKP
NB_DISP_CLKN
M24
M25
0.1U_0402_16V4Z
2
A_RST#
PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN
K23
K22
N25
N24
PCI INTERFACE
15 CLK_SBSRC_BCLK
15 CLK_SBSRC_BCLK#
1
33_0402_5%
@
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
N1
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
CLOCK GENERATOR
2
R179
PCIE_PVDD
P25
P4
P3
P1
P2
T4
T3
U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5
PCIE_CALRP
PCIE_CALRN
P24
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41
PCIRST#
Close to SB
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
U12
Y
U22
U21
U19
V19
R20
R21
R18
R17
562_0402_1% T25
2.05K_0402_1% T24
C524
1U_0402_6.3V4Z
Part 1 of 5
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
A_RST#
1
1
+SB_PCIEVDD
0.1U_0402_16V4Z
2
2
2
SB700
A_RST#
V23
V22
V24
V25
U25
U24
T23
T22
R149
R143
L59
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
SB_RX2P_C
SB_RX2N_C
SB_RX3P_C
SB_RX3N_C
+1.2V_HT
+3VALW
C294
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2
2
2
2
2
2
2
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
1
1
1
1
1
1
1
1
10
10
10
10
10
10
10
10
C275
C278
C287
C279
C272
C274
C266
C267
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
PCI CLKS
10
10
10
10
10
10
10
10
N2
A_RST#
BAS40-04_SOT23-3
+CHGRTC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
19
of
50
SKU-ID
R509
R510
POP
UMA
POP
DIS
U10D
33_0402_5% @ 1
30
30
30
30
SB_TEST2
2
@ 2.2K_0402_5%
2
@ 2.2K_0402_5%
2
@ 2.2K_0402_5%
SB_TEST1
EC_GA20
EC_KBRST#
EC_SCI#
EC_SMI#
SB_TEST0
26,28,29 SB_PCIE_WAKE#
25
CR_PE#
6 H_THERMTRIP#
11 NB_PWRGD
CR_PE#
H_THERMTRIP#
NB_PWRGD
EC_RSMRST#
30 EC_RSMRST#
1
R124
2 EC_RSMRST#
2.2K_0402_5%
25
CR_WAKE#
R509
R510
+3VS
2 10K_0402_5%
CR_WAKE#
2 2.2K_0402_5%
ICH_SMBCLK0
R410
2 2.2K_0402_5%
ICH_SMBDATA0
VGA@
1
2.2K_0402_5%
2
2.2K_0402_5%
1 UMA@ 2
33
SB_SPKR
8,9,15,17,28 ICH_SMBCLK0
8,9,15,17,28 ICH_SMBDATA0
6,26,29 ICH_SMBCLK1
6,26,29 ICH_SMBDATA1
R413
AE18
AD18
AA19
SKU_ID
W17
V17
W20
W21
ICH_SMBCLK0 AA18
ICH_SMBDATA0 W18
ICH_SMBCLK1
K1
ICH_SMBDATA1 K2
AA20
Y18
C1
Y19
G5
CR_WAKE#
+3VS
R537
+3VALW
33
32
32
33
33
32
R535
R136
2 2.2K_0402_5%
ICH_SMBCLK1
R135
2 2.2K_0402_5%
ICH_SMBDATA1
R134
2 10K_0402_5%
SB_PCIE_WAKE#
R536
2 100K_0402_5%
27,30,38 EC_DOCKIN#
29 CP_PE#
30 EC_LID_OUT#
EC_LID_OUT#
R146
R152
R153
R147
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
1
1
1
1
32 HDA_SYNC_MDC
33 HDA_SYNC_AUDIO
33 HDA_RST_AUDIO#
32 HDA_RST_MDC#
STRAP PIN
14
14
14
14
14
R504
R505
R506
R507
R508
2
2
2
2
EC_LID_OUT#
USB_OC#2
USB_OC#1
USB_OC#0
28
USB_OC#2
29
USB_OC#1
29
USB_OC#0
HDA_BITCLK
HDA_SDOUT
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
R144
R150
33_0402_5%
33_0402_5%
R145
R151
33_0402_5%
33_0402_5%
1
1
1
1
2
2
HDA_SYNC
2
2
HDARST#
PAD T14
1
1
1
1
1
2
2
2
2
2
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
HDA_SYNC
HDA_BITCLK
HDARST#
HDA_SDIN2
HDA_SDOUT
F7
E8
USB_HSD11P
USB_HSD11N
H11
J10
USB20_P11
USB20_N11
USB_HSD10P
USB_HSD10N
E11
F11
USB20_P10
USB20_N10
USB_HSD9P
USB_HSD9N
A11
B11
USB20_P9
USB20_N9
USB_HSD8P
USB_HSD8N
C10
D10
USB20_P8
USB20_N8
USB_HSD7P
USB_HSD7N
G11
H12
USB20_P7
USB20_N7
USB_HSD6P
USB_HSD6N
E12
E14
USB_HSD5P
USB_HSD5N
C12
D12
USB20_P5
USB20_N5
USB_HSD4P
USB_HSD4N
B12
A12
USB20_P4
USB20_N4
USB_HSD3P
USB_HSD3N
G12
G14
USB20_P3
USB20_N3
USB_HSD2P
USB_HSD2N
H14
H15
USB20_P2
USB20_N2
USB_HSD1P
USB_HSD1N
A13
B13
USB20_P1
USB20_N1
USB_HSD0P
USB_HSD0N
B14
A14
USB20_P0
USB20_N0
IMC_GPIO8
IMC_GPIO9
IMC_PWM0/IMC_GPIO10
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15
IMC_PWM2/IMC_GPO16
IMC_PWM3/IMC_GPO17
A18
B18
F21
D21
F19
E20
E21
E19
D19
E18
IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
IMC_GPIO21
IMC_GPIO22
IMC_GPIO23
IMC_GPIO24
IMC_GPIO25
G20
G21
D25
D24
C25
C24
B25
C23
IMC_GPIO26
IMC_GPIO27
IMC_GPIO28
IMC_GPIO29
IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
IMC_GPIO33
IMC_GPIO34
IMC_GPIO35
IMC_GPIO36
IMC_GPIO37
IMC_GPIO38
IMC_GPIO39
IMC_GPIO40
IMC_GPIO41
B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18
SATA_IS0#/GPIO10
CLK_REQ3#/SATA_IS1#/GPIO6
SMARTVOLT1/SATA_IS2#/GPIO4
CLK_REQ0#/SATA_IS3#/GPIO0
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
SCL1/GPOC2#
SDA1/GPOC3#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
LLB#/GPIO66
SMARTVOLT2/SHUTDOWN#/GPIO5
DDR3_RST#/GEVENT7#
B9
B8
A8
A9
E5
F8
E4
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GPM5#
USB_OC4#/IR_RX0/GPM4#
USB_OC3#/IR_RX1/GPM3#
USB_OC2#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#
M1
M2
J7
J8
L8
M3
L6
M4
L5
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO42
AZ_SDIN1/GPIO43
AZ_SDIN2/GPIO44
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#
AZ_DOCK_RST#/GPM8#
+3VS
1
R130
2
2.2K_0402_5%
H19
H20
H21
F25
IMC_GPIO0
IMC_GPIO1
SPI_CS2#/IMC_GPIO2
IDE_RST#/F_RST#/IMC_GPO3
D22
E24
E25
D23
IMC_GPIO4
IMC_GPIO5
IMC_GPIO6
IMC_GPIO7
2
R405
USB20_P11 29
USB20_N11 29
USB20_P10 28
USB20_N10 28
USB20_P9 29
USB20_N9 29
USB-9 Bluetooth
USB20_P8 28
USB20_N8 28
USB-8 WLAN
USB20_P7 29
USB20_N7 29
USB-7 M/B
USB20_P5 16
USB20_N5 16
USB20_P4 28
USB20_N4 28
USB-4 TV/B
USB20_P3 38
USB20_N3 38
USB-3 DOCK
USB20_P2 28
USB20_N2 28
USB-2 USB/B
USB20_P1 28
USB20_N1 28
USB-1 Fingerprint
USB20_P0 29
USB20_N0 29
USB-0 M/B
CPU_SIC_SB 6
CPU_SID_SB 6
GPIO16 23
GPIO17 23
STRAP PIN
STRAP PIN
3
2
R406
100K_0402_5%
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
18,38 CRT_DET#
2
Q36G
2N7002_SOT23
CRT_DET
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
1
R513
1 @
R514
1 @
R515
CLK_48M_USB 15
USB_RCOMP 1
11.8K_0402_1%
218S7EALA11FG_BGA528_SB700
+3VALW
USB_FSD12P
USB_FSD12N
RSMRST#
23 HDARST#
HDA_SYNC_MXM
HDA_BCLK_MXM
HDA_RST#_MXM
HDA_SDI_MXM
HDA_SDO_MXM
E6
E7
CR_PE#
2 100K_0402_5%
HDA_BITCLK_AUDIO
HDA_BITCLK_MDC
HDA_SDOUT_MDC
HDA_SDOUT_AUDIO
HDA_SDIN0
HDA_SDIN1
D3
USB_FSD13P
USB_FSD13N
INTEGRATED uC
1
R133
1
R132
1
R131
+3VALW
USB_RCOMP
USB MISC
SUS_STAT#
SB_TEST2
SB_TEST1
SB_TEST0
C8
G8
USB 1.1
SUS_STAT#
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
SUS_STAT#
C232
22P_0402_50V8J @
1
2
1
USBCLK/14M_25M_48M_OSC
USB 2.0
30
30
30
6,32
11
NB_PWRGD
10K_0402_5%
2
10K_0402_5%
2 R109
Part 4 of 5
SB700
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S2/GPM9#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
TEST2
TEST1
TEST0
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#
NB_PWRGD
USB OC
@
2
E1
E2
H7
F5
G1
H2
H1
K3
H5
H4
H3
Y15
W15
K4
K24
F1
J2
H6
F2
J6
W14
HD AUDIO
1
R137
+3VS
CRT_DET
INTEGRATED uC
EC_SWI#
GPIO
30
R417
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
20
of
50
Pri/SEC,Mas/Slave assignment
Port 0
Primary master
SATA controler
Port 1
Secondary master
SATA controler
Port 2
Primary slave
SATA controler
Port 3
Secondary slave
SATA controler
Port 4
PATA controler
Port 5
PATA controler
Port Number
U10B
1
2
R412
SATA_X2
+3VS R411 1
31 SATA_LED#
+1.2V_HT
L61
2
1
BLM18PG121SN1D_0603
C562
2.2U_0603_6.3V4Z
SATA_TX3P
SATA_TX3N
AB14
AC14
SATA_RX3N
SATA_RX3P
AE14
AD14
SATA_TX4P
SATA_TX4N
AD15
AE15
SATA_RX4N
SATA_RX4P
AB16
AC16
SATA_TX5P
SATA_TX5N
SATA_X1
SATA_X2
AA12
SATA_X2
2 10K_0402_5%
W11
+PLLVDD_SATA
1
C560
C546
1U_0402_6.3V4Z
L34
C296
1U_0402_6.3V4Z
+XTLVDD_SATA
2
0.1U_0402_16V4Z
2
1
BLM18PG121SN1D_0603
1
C545
SATA_CAL
SATA_ACT#/GPIO67
AA11
PLLVDD_SATA
W12
XTLVDD_SATA
@
+3VALW
2
D30
+3VALW
1
RB751V_SOD323
R549
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS1#/GPIO32
G6
D2
D1
F4
F3
LAN_RST#/GPIO13
ROM_RST#/GPIO14
U15
J1
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
M8
M5
M7
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
P5
P8
R8
TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
C6
B6
A6
A5
B5
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
A4
B4
C4
D4
D5
D6
A7
B7
C667
1
+SB_SPI_VCC
SB_SI_SPI_SO
SB_SO_SPI_SI
SB_SPICLK
SB_HOLD#
SB_SPICS#
R547 R548
2
SB_SPICS#
SB_HOLD#
@
1
R545
F6
AVSS
G7
10K_0402_5% U23
1 CE#
3 WP#
7 HOLD#
4 VSS
8
6
5
2
VDD
SCK
SI
SO
SB_SPICLK
SB_SO_SPI_SI
SB_SI_SPI_SO
MX25L8005M2C-15G_SOP8
NB_THERMAL_DC
NB_THERMAL_DC 11
1
pop after bring up
NB_THERMAL_DC_R
@
1
2
NB_THERMAL_DA_R R110
@ 0_0402_5%
1
2
R111
0_0402_5%
@
2
NB_THERMAL_DA
C229
10P_0402_50V8J
NB_THERMAL_DA 11
EC_THERM# 30
2
D7
R104 1
1
RB751V_SOD323
2 100K_0402_5%
ACIN
+SB_AVDD
1
1
L55
2
1
BLM18PG121SN1D_0603
+3VALW
NC7SZ08P5X_NL_SC70-5
C670
@
3
0.1U_0402_16V4Z
2
Y
@
C488
2.2U_0603_6.3V4Z
14,30,31,37,39,42
+3VS
+3VALWS
2
C492
0.1U_0402_16V4Z
218S7EALA11FG_BGA528_SB700
10K_0402_5%
2
0_0402_5%
U44
AVDD
0.1U_0402_16V4Z
2
0_0603_5%
R546
1K_0402_5%
SATA_RX5N
SATA_RX5P
Y12
AD24
AD23
AE22
AC22
AD21
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23
AD13
AE13
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
SATA_RX2N
SATA_RX2P
V12
+3VS
AE12
AD12
SATA_CAL
1
1K_0402_1%
SATA_X1
0.1U_0402_16V4Z
1 C283
SATA_TX2P
SATA_TX2N
10M_0402_5%
2
10P_0402_50V8J 2
AB12
AC12
AE16
AD16
Y3
2
25MHZ_20P
SATA_RX1N
SATA_RX1P
R176
AD11
AE11
SATA_X1
1 C284
1
10P_0402_50V8J 2
SATA_TX1P
SATA_TX1N
24 SATA_DTX_C_SRX_N2
24 SATA_DTX_C_SRX_P2
SATA_RX0N
SATA_RX0P
AE10
AD10
ACIN
4.99_0402_1%
4.99_0402_1%
AB10
AC10
SATA_STX_DRX_P2
SATA_STX_DRX_N2
AA24
AA25
Y22
AB23
Y23
AB24
AD25
AC25
AC24
Y25
Y24
24 SATA_DTX_C_SRX_N0
24 SATA_DTX_C_SRX_P0
IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
Part 2 of 5
2
2
SATA_TX0P
SATA_TX0N
ATA 66/100/133
1
R182 1
R181
SB700
AD9
AE9
SPI ROM
24 SATA_STX_R_DRX_P2
24 SATA_STX_R_DRX_N2
SATA_STX_DRX_P0
SATA_STX_DRX_N0
4.99_0402_1%
4.99_0402_1%
HW MONITOR
2
2
SERIAL ATA
1
R175 1
R174
SATA PWR
24 SATA_STX_R_DRX_P0
24 SATA_STX_R_DRX_N0
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
21
of
50
+1.2V_HT
+PCIE_VDDR
L32
2
1
FBMA-L11-201209-221LMA30T_0805
1
C254
C525 1
C522 1
C527 1
2
22U_0805_6.3V6M
2 1U_0402_6.3V4Z
2 1U_0402_6.3V4Z
2 1U_0402_6.3V4Z
C251 1
C250 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
+1.2V_SATA
L60
2
1
FBMA-L11-201209-221LMA30T_0805
1
C565
C547 1
C549 1
C552 1
C559 1
2
22U_0805_6.3V6M
2 1U_0402_6.3V4Z
2 1U_0402_6.3V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
CKVDD_1.2V_1
CKVDD_1.2V_2
CKVDD_1.2V_3
CKVDD_1.2V_4
L21
L22
L24
L25
CORE S0
PCI/GPIO I/O
CLKGEN I/O
1
C490
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C505
C249
C502
C507
C248
AA14
AB18
AA15
AA17
AC18
AD17
AE17
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
AVDD_SATA_1
AVDD_SATA_4
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_3.3V_7
A17
A24
B17
J4
J5
L1
L2
+S5_3V
S5_1.2V_1
S5_1.2V_2
G2
G4
+S5_1.2V
1
R138
2
FBMA-L11-201209-221LMA30T_0805
1
2
C252
22U_0805_6.3V6M
1U_0402_6.3V4Z 2
C241
1
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
A16
B16
C16
D16
D17
E17
F15
F17
F18
G15
G17
G18
10U_0805_10V4Z
10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDTX_5
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
AVDDRX_5
A10
B10
1
C227
2
C231 2
C240
V5_VREF
AE7
+V5_VREF
J16
+AVDDCK_3.3V
AVDDC
1
1
1
1
+1.2VALW
FBMA-L11-160808-221LMT 0603
+1.2VALW
1U_0402_6.3V4Z
1U_0402_6.3V4Z
FBMA-L11-160808-221LMT 0603
L28
AVDDCK_3.3V
AVDDCK_1.2V
2
2
2
2
C503
C253
C506
C247
L56
+1.2_USB
USB_PHY_1.2V_1
USB_PHY_1.2V_2
PLL
2
2
2
2
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
2
2
1
1
2
+3VALW
USB I/O
1
1
1
1
1
1
1
1
1
2
2
1
T10
U10
U11
U12
V11
V14
W9
Y9
Y11
Y14
Y17
AA9
AB9
AB11
AB13
AB15
AB17
AC8
AD8
AE8
AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
A15
B15
C14
D8
D9
D11
D13
D14
D15
E15
F12
F14
G9
H9
H17
J9
J11
J12
J14
J15
K10
K12
K14
K15
AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
POWER
P18
P19
P20
P21
R22
R24
R25
L29
2
1
FBMA-L11-201209-221LMA30T_0805
C228
C236
C491
C497
C493
C489
C499
SB700
L31
2
1
+1.2V_HT
FBMA-L11-160808-221LMT 0603
+1.2V_CKVDD
+AVDD_USB
+3VALW
U10E
2
+1.2VALW
FBMA-L11-201209-221LMA30T_0805
2
+1.2V_HT
FBMA-L11-201209-221LMA30T_0805
2
22U_0805_6.3V6M
C512
1
C504
1
C521
1
C526
1
C519
1
C511
1
K17
+AVDDC
C495
C494
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1K_0402_5% 2
E9
1
1
22U_0805_6.3V6M
1
1
C277
+AVDDCK_1.2V 0.1U_0402_16V4Z
2
2
C291
1U_0603_10V4Z
1
1
D9
1 R172
+5VS
+3VS
H18
J17
J22
K25
M16
M17
M21
P16
RB751V_SOD323
L54
2
1
+3VALW
FBMA-L11-160808-221LMT 0603
2.2U_0603_6.3V4Z
C487
0.1U_0402_16V4Z
C496
218S7EALA11FG_BGA528_SB700
+AVDDCK_1.2V
AVSSC
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21
Part 5 of 5
AVSSCK
A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y21
AB1
AB19
AB25
AE1
AE24
P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25
L17
218S7EALA11FG_BGA528_SB700
L57
2
1
+1.2V_HT
FBMA-L11-160808-221LMT 0603
2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
+AVDDCK_3.3V
F9
PCIE_CK_VSS_1
PCIE_CK_VSS_2
PCIE_CK_VSS_3
PCIE_CK_VSS_4
PCIE_CK_VSS_5
PCIE_CK_VSS_6
PCIE_CK_VSS_7
PCIE_CK_VSS_8
GROUND
+1.2V_HT
VDD33_18_1
VDD33_18_2
VDD33_18_3
VDD33_18_4
Part 3 of 5
3.3V_S5 I/O
1 @ 2
C557
22U_0805_6.3V6M
C544
1 @ 2 0.1U_0402_16V4Z
C548
1 @ 2 0.1U_0402_16V4Z
C551
1
2 0.1U_0402_16V4Z
@
Y20
AA21
AA22
AE25
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
L15
M12
M14
N13
P12
P14
R11
R15
T16
CORE S5
+3VS
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
IDE/FLSH I/O
2
22U_0805_6.3V6M
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
A-LINK I/O
1
C561
C529
1
C536
1
C556
1
C513
1
C542
1
C550
1
C538
1
C508
1
SATA I/O
+3VS
SB700
L9
M9
T15
U9
U16
U17
V8
W7
Y6
AA4
AB5
AB21
1
R399
1
R391
C501
C510
L30
2
1
+3VS
FBMA-L11-160808-221LMT 0603
2.2U_0603_6.3V4Z
1 C246
0.1U_0402_16V4Z
1 C500
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
22
of
50
REQUIRED STRAPS
RESERVED
LPC_CLK0
PCI_CLK5 CLK_PCI_EC LPC_CLK1
RESERVED
ENABLE PCI
MEM BOOT
CLKGEN
ENABLED
RTC_CLK AZ_RST_CD#
EC
ENABLED
INTERNAL
RTC
DEFAULT
PULL
LOW
BOOTFAIL
TIMER
DISABLED
IGNORE
DEBUG
STRAPS
DEFAULT
DEFAULT
DEFAULT
R139
10K_0402_5%
2
1
+3VALW
R125
10K_0402_5%
2
1
+3VALW
R116
10K_0402_5%
2
1
+3VALW
R121
10K_0402_5%
2
1
+3VALW
R159
10K_0402_5%
2
1
+3VS
DEFAULT
R161
10K_0402_5%
2
1
+3VS
EC
DISABLED
R158
10K_0402_5%
2
1
+3VS
GP16
Internal pull up
H,H = Reserved
1
EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)
R155
10K_0402_5%
2
1
+3VS
DEFAULT
GP17
+3VALW
+3VALW
R103
2.2K_0402_5%
2
1
PULL
HIGH
USE
DEBUG
STRAPS
PCI_CLK2
PCI_CLK3
CLK_PCI_PCM CLK_PCI_DBG PCI_CLK4
BOOTFAIL
TIMER
ENABLED
R102
2.2K_0402_5%
2
1
19
PCI_CLK2
19
PCI_CLK3
19
PCI_CLK4
19
PCI_CLK5
19,30 CLK_PCI_EC
19,30 LPCCLK1
19
RTC_CLK
20 HDARST#
20
GPIO17
20
GPIO16
R100
2.2K_0402_5%
2
1
R99
2.2K_0402_5%
2
1
R140
10K_0402_5%
2
1
R126
2.2K_0402_5%
2
1
R117
10K_0402_5%
2
1
R160
10K_0402_5%
2
1
R122
10K_0402_5%
2
1
R162
10K_0402_5%
2
1
R157
10K_0402_5%
2
1
R156
10K_0402_5%
2
1
DEBUG STRAPS
PULL
LOW
PCI_AD24
PCI_AD23
USE IDE
PLL
USE DEFAULT
PCIE STRAPS
RESERVED
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
USE
SHORT
RESET
BYPASS
PCI PLL
BYPASS
ACPI
BCLK
BYPASS IDE
PLL
USE EEPROM
PCIE STRAPS
R164
2.2K_0402_5%
2
1
R166
2.2K_0402_5%
2
1
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
R167
2.2K_0402_5%
2
1
19
19
19
19
19
19
PCI_AD25
USE ACPI
BCLK
R169
2.2K_0402_5%
2
1
PCI_AD26
USE PCI
PLL
R165
2.2K_0402_5%
2
1
PCI_AD28
PULL
HIGH
PCI_AD27
USE
LONG
RESET
R168
2.2K_0402_5%
2
1
Security Classification
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
23
of
50
21 SATA_STX_R_DRX_P2
21 SATA_STX_R_DRX_N2
1
1
C300
C299
21 SATA_DTX_C_SRX_N2
21 SATA_DTX_C_SRX_P2
SATA_STX_RC_DRX_P2
SATA_STX_RC_DRX_N2
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
1
1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
1
R183
0.1U_0402_16V4Z
1
2
@ 1K_0402_1%
+5VS
+5VS
C288
C280
10U_0805_10V4Z
1
1000P_0402_50V7K
SATA_DTX_SRX_N2
SATA_DTX_SRX_P2
C292
1
2
3
4
5
6
7
GND
A+
AGND
BB+
GND
8
9
10
11
12
13
DP
+5V
+5V
MD
GND
GND
GND
GND
15
14
SANTA_206401-1_13P
CONN@
C276
1U_0402_6.3V4Z
21 SATA_STX_R_DRX_P0
21 SATA_STX_R_DRX_N0
21 SATA_DTX_C_SRX_N0
21 SATA_DTX_C_SRX_P0
SATA_STX_RC_DRX_P0
2 0.01U_0402_16V7K
SATA_STX_RC_DRX_N0
2 0.01U_0402_16V7K
0.01U_0402_16V7K
SATA_DTX_C_SRX_N0C345
1
2 SATA_DTX_SRX_N0
SATA_DTX_C_SRX_P0 C347
1
2 SATA_DTX_SRX_P0
1
1
0.01U_0402_16V7K
+3VS
+5VS
10U_0805_10V4Z
1
1
+5VS
0.1U_0402_16V4Z
+3VS
C378
C384
C379
C369
0.1U_0402_16V4Z
2
1000P_0402_50V7K
C386
1U_0402_6.3V4Z
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
GND
HTX+
HTXGND
HRXHRX+
GND
VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
GND
VCC12
GND
23
24
OCTEK_SAT-22SG1G_NR
CONN@
Issued Date
Security Classification
2008/04/16
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Friday, April 18, 2008
G
Sheet
24
H
of
50
+3VS
+1.8VS_APVDD
40mil
0.1U_0402_16V4Z
L64
0.1U_0402_16V4Z
+1.8VS
1
C597
1
C608
1
C605
1
C617
0.1U_0402_16V4Z
40mil
BLM18AG601SN1D_0603
C585
2
2
10U_0805_10V4Z
0.1U_0402_16V4Z
C602
1
C587
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3V_MCVCC
1
C588
1
C612
C586
0.1U_0402_16V4Z
XDWP_SDWP
1
R458
XD_RB
1000P_0402_50V7K
R466
10K_0402_5%
10K_0402_5%
+3VS
XD_CLE
XDCD0#_SDCD#
1
R450
XDCD1#_MSCD#
1
R451
XD_RE
U33
15 CLK_PCIE_READER#
15 CLK_PCIE_READER
PCIE_ITX_C_PRX_N4
PCIE_ITX_C_PRX_P4
10 PCIE_ITX_C_PRX_N4
10 PCIE_ITX_C_PRX_P4
C584 1
C583 1
10 PCIE_PTX_C_IRX_N4
10 PCIE_PTX_C_IRX_P4
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2
PCIE_PTX_IRX_N4
PCIE_PTX_IRX_P4
3
4
APCLKN
APCLKP
9
8
APRXN
APRXP
11
12
APTXN
APTXP
15mil
R444
APREXT
8.2K_0402_5%
7
38
39
+3VS
R460
1
2
PLT_RST#
CR_PE
T20
PAD
D29
20
CR_WAKE#
@
XDCD1#_MSCD#
XDCD0#_SDCD#
CH751H-40PT_SOD323-2
MC_PWREN#
PCIES_EN
PCIES
JMB385
31
SEEDAT
SEECLK
15
16
CR1_CD1N
CR1_CD0N
17
CR1_PCTLN
21
5IN1_LED#
XRSTN
XTEST
13
14
40 mil
5
10
30
DV33
DV33
DV33
DV18
DV18
19
20
44
18
37
MDIO0
MDIO1
MDIO2
MDIO3
MDIO4
MDIO5
MDIO6
MDIO7
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
48
47
46
45
43
42
41
40
29
28
27
26
25
23
22
NC
NC
NC
34
35
36
APREXT
11,13,19,26,28,29,30
APVDD
APV18
TAV33
APGND
GND
GND
GND
GND
CR1_LEDN
+1.8VS_APVDD
+3VS
10K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
+1.8VS_APVDD
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
SDCMD_MSBS_XDWE#
XDCE_SDCLK_MSCLK_R
XDWP_SDWP
XD_CLE
XD_D4
XD_D5
XD_D6
XD_D7
XD_RE
XD_RB
XD_ALE
R471
R533
XDCE_SDCLK_MSCLK
22_0402_5%
XD_ALE
R462
200K_0402_5%
200K_0402_5%
C
Vendor recommend
D25
24
31
32
33
XDCD0#_SDCD#
XDCD1#_MSCD#
XD_CD#
DAN202UT106_SC70-3
C594
270P_0402_50V7K
JMB385-LGEZ0B_LQFP48_7X7
+3VALW
R531
10K_0402_5%
20
CR_PE#
JREAD1
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_D4
XD_D5
XD_D6
XD_D7
CR_PE
2
G
Q55
2N7002_SOT23
R477
C625 1
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
C620 1
C619 1
4.7U_0805_10V4Z
2
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
7 IN 1 CONN
XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
11
31
40mil
2
0_0805_5%
XD-VCC
32
10
9
8
7
6
5
4
SDCMD_MSBS_XDWE# 34
XDWP_SDWP
33
XD_ALE
35
XD_CD#
40
XD_RB
39
XD_RE
38
XDCE_SDCLK_MSCLK 37
XD_CLE
36
+3V_MCVCC
MC_PWREN#
+3V_MCVCC
1 1
7IN1 GND
7IN1 GND
C626 1
41
42
SD-VCC
MS-VCC
21
28
SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7
SD-CMD
SD-CD-SW
20
14
12
30
29
27
23
18
16
25
1
XDCE_SDCLK_MSCLK
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_D4
XD_D5
XD_D6
XD_D7
SDCMD_MSBS_XDWE#
XDCD0#_SDCD#
SD-WP-SW
XDWP_SDWP
MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
26
17
15
19
24
22
13
XDCE_SDCLK_MSCLK
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XDCD1#_MSCD#
SDCMD_MSBS_XDWE#
+3V_MCVCC
7IN1 GND
7IN1 GND
Issued Date
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
1.0
JALB0 LA-4171P
Date:
For EMI
33P_0402_50V8K
TAITW_R015-B10-LM
CONN@
Security Classification
C676
Sheet
1
25
of
50
1
R77
2
0_1206_5%
+3V_LAN
+3V_LAN
R309 1
2 1_1206_1%
R12
2 1_1206_1%
2 LAN_PME#
4.7K_0402_5%
1
R60
+3V_LAN
+3V_LAN
C28
+1.2V_LAN
2
4
LAN_REGCTL12 1
60mil
0.1U_0402_16V4Z
2
2
4.7U_0805_10V4Z
Q3
MMJT9435T1G_SOT223
+3V_LAN
+3V_LAN_R
1
C27
+3VALW
C149
C417
C422
C68
C428
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C678
C412
C71
C132
C37
C448
C409
C438
C111
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
2
2
2
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
+1.2V_VDDCIO
C415
C39
+3V_LAN
U5
2 1K_0402_5%
53
VMAIN_PRSNT
+3V_LAN
R20
2 1K_0402_5%
54
VAUX_PRSNT
10 PCIE_ITX_C_PRX_N3
10 PCIE_ITX_C_PRX_P3
10 PCIE_PTX_C_IRX_N3
C142 1
10 PCIE_PTX_C_IRX_P3
C143 1
20,28,29 SB_PCIE_WAKE#
30
EC_PME#
2
2
R47
R56
R61
1
1
5
6,20,29 ICH_SMBDATA1
32
PCIE_RXD_N
PCIE_ITX_C_PRX_P3
31
PCIE_RXD_P
PCIE_PTX_IRX_N3
25
PCIE_TXD_N
PCIE_PTX_IRX_P3
0_0402_5% LAN_RESET#
2 0_0402_5%
2 0_0402_5%
R14
4.7K_0402_5%
1
2
+3V_LAN
4
GPHY_PLLVDD
PCIE_ITX_C_PRX_N3
0.1U_0402_16V7K
+3V_LAN
35
0.1U_0402_16V7K
LAN_PME#
SCLK(EECLK)
SI
SO(EEDATA)
CS
65
63
64
62
REGCTL12
REGCTL25/12_IO
RDAC
14
18
37
LAN_REGCTL12
XTALVDD
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
23
6
15
19
56
61
+LAN_XTALVDD
10
PERST
12
WAKE
58
SMB_CLK
57
SMB_DATA
SPROM_WP
VDDP
VDDP/DC
17
68
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
5
13
20
34
55
60
BIASVDD
PCIE_PLLVDD
PCIE_VDD/PLL
PCIE_VDD
36
30
27
33
R16
4.7K_0402_5%
1
2
+3V_LAN
Q4A
@
2N7002DW-T/R7_SOT363-6
R19 1
2 @
0_0402_5%
R67
GPIO_0(SERIAL_DO)
GPIO_1(SERIAL_DI)
GPIO_2
UART_MODE
LAN_XTALI
21
XTALI
XTALO
22
XTALO
LAN_SMBCLK
1
2
16
39K_0402_5%
+LAN_PCIEVDD
24
AVDD/DC
AVDD/AVDDL
AVDD/DC
AVDDL
AVDDL/T1_P
REG_GND/S_IDDQ AVDDL/T2_P
AVDDL
PCIE_GND/VDD
E- PAD
+3V_LAN
LAN_LINK# 27
LAN_ACTIVITY# 27
LAN_RDAC 1
R66
2 4.7K_0402_5%
A0
A1
A2
GND
SPROM_WP
SPROM_CLK
SPROM_DOUT
20mil
L48
1
2
BLM18AG601SN1D_0603
VCC
WP
SCL
SDA
8
7
6
5
+LAN_PCIEPLLVDD
1
1
C440
C445
+3V_LAN
C444
20mil
+LAN_PCIEVDD
1
1
C434
C441
+1.2V_LAN
0.1U_0402_16V4Z
2
+LAN_BIASVDD
+LAN_PCIEPLLVDD
1
2
BLM18AG601SN1D_0603
1
+LAN_PCIEVDD
+3V_LAN
0.1U_0402_16V4Z
2
+LAN_AVDDL
LAN_MIDI1+
LAN_MIDI2+
+LAN_AVDDL
20mil
+LAN_AVDD
1
C427
C437
C70
0.1U_0402_16V4Z
2
+1.2V_LAN
+LAN_AVDDL
1
C426
2
0.1U_0402_16V4Z
C416
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
L38
1
2
BLM18AG601SN1D_0603
+1.2V_LAN
2
4.7U_0805_10V4Z
+LAN_GPHYPLLVDD
1
1
C126
C122
R73
200_0402_1%
L39
1
2
+3V_LAN
BLM18AG601SN1D_0603
20mil
LAN_MIDI1+ 27
LAN_MIDI2+ 27
XTALO
L19
1
2
BLM18AG601SN1D_0603
+1.2V_LAN
2
4.7U_0805_10V4Z
Y1
L45
1
2
BLM18AG601SN1D_0603
2
4.7U_0805_10V4Z
20mil
+1.2V_LAN
L43
LAN_XTALI
L47
1
2
BLM18AG601SN1D_0603
0.1U_0402_16V4Z
2
2
4.7U_0805_10V4Z
2
0.1U_0402_16V4Z
+1.2V_VDDCIO
BCM5764MKML_QFN68
R312
R321
4.7K_0402_5%4.7K_0402_5%
AT24C64AN-10SU-2.7_SO8
2
1.18K_0402_1%
38
45 +LAN_AVDDL
52
39
44
46
51
69
1
0_0402_5%
1
2
3
4
+1.2V_VDDCIO
+3V_LAN
R311
4.7K_0402_5%
0.1U_0402_16V4Z
2
+3V_LAN
U24
R29
+3V_LAN
+3V_LAN
C410
2
R308 @
PCIE_TXD_P
LAN_SMBDATA
+3V_LAN
2
2
1
67
66
LAN_SMBDATA
Q4B
@
2N7002DW-T/R7_SOT363-6
R15 1
2
0_0402_5% @
6,20,29 ICH_SMBCLK1
26
LAN_SMBCLK
ENERGY_DET
+LAN_GPHYPLLVDD
2
R24
0_0402_5%
2
R25
0_0402_5%
SPROM_CLK
SPROM_DIN
SPROM_DOUT
SPROM_CS
LINKLED
SPD100LED
SPD1000LED
TRAFFICLED
R21
59
SPROM_DIN
LOW PWR
+3VS
30 ENERGY_DET
11,13,19,25,28,29,30 PLT_RST#
4.7K_0402_5%
LAN_MIDI2- 27
LAN_MIDI3- 27
LAN_MIDI3+ 27
2 10K_0402_5%
R299
LAN_MIDI1- 27
R37
LAN_MIDI0- 27
LAN_MIDI0+ 27
11
TRD0_N
TRD0_P
TRD1_N/AVDD
PCIE_REFCLK_P TRD1_P/T1_N
TRD2_N/AVDD
CLKREQ
TRD2_P/T2_N
TRD3_N
TRD3_P
PCIE_REFCLK_N
29
28
15 CLK_PCIE_LAN
LAN_MIDI0LAN_MIDI0+
+LAN_AVDD
LAN_MIDI1+LAN_AVDD
LAN_MIDI2LAN_MIDI3LAN_MIDI3+
15 CLK_PCIE_LAN#
41
40
42
43
48
47
49
50
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
2 LAN_XTALO
25MHZ_20P
C138
27P_0402_50V8J
Issued Date
Security Classification
C137
27P_0402_50V8J
2
2008/04/16
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
BCM5764M_5787M
Rev
1.0
JALB0 LA-4171P
Date:
Sheet
26
of
50
T1
1
2
3
4
5
6
7
8
9
10
11
12
L_LAN_MIDI0+
L_LAN_MIDI0L_LAN_MIDI1+
L_LAN_MIDI1L_LAN_MIDI2+
L_LAN_MIDI2L_LAN_MIDI3+
L_LAN_MIDI3-
TCT1
TD1+
TD1TCT2
TD2+
TD2TCT3
TD3+
TD3TCT4
TD4+
TD4-
MCT1
MX1+
MX1MCT2
MX2+
MX2MCT3
MX3+
MX3MCT4
MX4+
MX4-
24
23
22
21
20
19
18
17
16
15
14
13
RJ45_MIDI0+
RJ45_MIDI0RJ45_MIDI1+
RJ45_MIDI1-
RJ45_MIDI2+
RJ45_MIDI2RJ45_MIDI3+
RJ45_MIDI3-
+3V_LAN
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
C403
R303
75_0402_1%
C406
0.1U_0402_16V4Z
2
R304
75_0402_1%
C402
C400
R302
75_0402_1%
R300
75_0402_1%
2
1
R298
1K_0402_5%
L_LAN_ACTIVITY#
350uH_GSL5009LF-1
RJ45_GND
0.1U_0402_16V4Z
11
8
RJ45_MIDI3+
PR4+
RJ45_MIDI1-
PR2-
RJ45_MIDI2-
PR3-
RJ45_MIDI2+
PR3+
RJ45_MIDI1+
PR2+
RJ45_MIDI0-
PR1-
RJ45_MIDI0+
PR1+
+3V_LAN
10
1
1K_0402_5%
RJ45_GND
56
50
38
27
18
10
4
LAN_MIDI0+
A0
26
LAN_MIDI0-
A1
D_LAN_MIDI0+
D_LAN_MIDI0-
0B1
1B1
48
47
2B1
3B1
43
42
D_LAN_MIDI1+
D_LAN_MIDI1-
D_LAN_MIDI1+ 38
D_LAN_MIDI1- 38
4B1
5B1
37
36
D_LAN_MIDI2+
D_LAN_MIDI2-
D_LAN_MIDI2+ 38
D_LAN_MIDI2- 38
D_LAN_MIDI3+ 38
D_LAN_MIDI3- 38
LAN_MIDI1+
A2
26
LAN_MIDI1-
A3
6B1
7B1
32
31
D_LAN_MIDI3+
D_LAN_MIDI3-
26
LAN_MIDI2+
11
A4
LAN_MIDI2-
12
A5
0LED1
1LED1
2LED1
22
23
52
D_LAN_ACTIVITY#
D_LAN_LINK#
26
0B2
1B2
46
45
L_LAN_MIDI0+
L_LAN_MIDI0-
26
LAN_MIDI3+
14
A6
26
LAN_MIDI3-
15
A7
2B2
3B2
41
40
L_LAN_MIDI1+
L_LAN_MIDI1-
20,30,38 EC_DOCKIN#
17
SEL
4B2
5B2
35
34
L_LAN_MIDI2+
L_LAN_MIDI2-
26 LAN_ACTIVITY#
26 LAN_LINK#
19
20
54
6B2
7B2
30
29
L_LAN_MIDI3+
L_LAN_MIDI3-
0LED2
1LED2
2LED2
25
26
51
L_LAN_ACTIVITY#
L_LAN_LINK#
5
57
14
SHLD1
13
Guide Pin
Green LED+
LED0
LED1
LED2
NC
D_LAN_ACTIVITY#
D_LAN_LINK# 38
LANGND
1
2
1
C24
LAN_MIDI0+
LAN_MIDI0-
2
1
RP32
LAN_MIDI1+
LAN_MIDI1-
2
1
RP33
LAN_MIDI2+
LAN_MIDI2-
2
1
RP34
LAN_MIDI3+
LAN_MIDI3-
2
1
RP35
VALUE@
L_LAN_MIDI0+
3
L_LAN_MIDI04
0_0404_4P2R_5%
VALUE@
L_LAN_MIDI1+
3
L_LAN_MIDI14
0_0404_4P2R_5%
VALUE@
L_LAN_MIDI2+
3
L_LAN_MIDI24
0_0404_4P2R_5%
VALUE@
L_LAN_MIDI3+
3
L_LAN_MIDI34
0_0404_4P2R_5%
LAN_ACTIVITY#
LAN_LINK#
2
1
RP36
VALUE@
L_LAN_ACTIVITY#
3
L_LAN_LINK#
4
0_0404_4P2R_5%
38
40mil
C26
4.7U_0805_10V4Z
0.1U_0402_16V4Z
L_LAN_ACTIVITY#
1
2
C398
68P_0402_50V8J
@
L_LAN_LINK#
1
2
C405
68P_0402_50V8J
@
For EMI
PAD_GND
1
6
9
13
16
21
24
28
33
39
44
49
53
55
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
L : A-->B1
H: A-->B2
SHLD2
D_LAN_MIDI0+ 38
D_LAN_MIDI0- 38
26
NOTE:
15
Green LED-
C25
1000P_1206_2KV7K
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
B
26
16
SHLD1
C408
220P_0402_50V7K
+3V_LAN
U2
SHLD2
PR4-
FOX_JM36113-L2R8-7F
CONN@
2
R307
Amber LED-
RJ45_MIDI3-
L_LAN_LINK#
40mil
C397
220P_0402_50V7K
JRJ45
12 Amber LED+
PI3L500-AZFEX_TQFN56_11X5
Security Classification
2008/04/16
Issued Date
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Friday, April 18, 2008
Sheet
1
27
of
50
+1.5VS
+3VS
+3VS
C609
4.7U_0805_10V4Z
C613
0.1U_0402_16V4Z
C390
4.7U_0805_10V4Z
C381
0.1U_0402_16V4Z
C382
0.1U_0402_16V4Z
C615
+1.5VS
C387
C380
+5VS
C383
C385
C389
C392
0.1U_0402_16V4Z
2
4.7U_0805_10V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+5VS
JMINI1
29 WLAN_BT_DATA
29 WLAN_BT_CLK
15 MINI1_CLKREQ#
15 CLK_PCIE_MINI1#
15 CLK_PCIE_MINI1
10 PCIE_PTX_C_IRX_N2
10 PCIE_PTX_C_IRX_P2
10 PCIE_ITX_C_PRX_N2
10 PCIE_ITX_C_PRX_P2
+3VS
0_0402_5%
R469 1
2
30 E51RXD_P80CLK
30 E51TXD_P80DATA
E51TXD_P80DATA_R
E51RXD_P80CLK
JMINI2
1
3
5
7
9
11
13
15
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
2
4
6
8
10
12
14
16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
+3VS
+1.5VS
15 MINI2_CLKREQ#
15 CLK_PCIE_MINI2#
15 CLK_PCIE_MINI2
WL_OFF#
PLT_RST#
R279 1
R278 1
WL_OFF# 30
PLT_RST# 11,13,19,25,26,29,30
+3VS
10 PCIE_PTX_C_IRX_N1
+3VALW
10 PCIE_PTX_C_IRX_P1
ICH_SMBCLK0 8,9,15,17,20
ICH_SMBDATA0 8,9,15,17,20
10 PCIE_ITX_C_PRX_N1
10 PCIE_ITX_C_PRX_P1
USB20_N8 20
USB20_P8 20
+3VS
(MINI1_LED#)
MINI1_LED# 31
(9~16mA)
E51TXD_P80DATA_R
E51RXD_P80CLK
R550
100K_0402_5%
2
FOX_AS0B226-S99N-7F
CONN@
1
3
5
7
9
11
13
15
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
2
4
6
8
10
12
14
16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
53
54
55
56
53
54
55
56
2 0_0603_5%
2 0_0603_5%
ICH_SMBCLK0
ICH_SMBDATA0
G1
G2
G3
G3
SB_PCIE_WAKE# 1
@
2
R498 0_0402_5%
+3VS
+1.5VS
PLT_RST#
ICH_SMBCLK0
ICH_SMBDATA0
USB20_N10 20
USB20_P10 20
(MINI1_LED#)
G1
G2
G3
G3
20,26,29 SB_PCIE_WAKE#
R282 1
@
2 0_0402_5%
WLAN_BT_DATA
WLAN_BT_CLK
SB_PCIE_WAKE#
FOX_AS0B226-S99N-7F
CONN@
+3VALW
H=5.2 mm
H=9.2 mm
Normal
Peak
Normal
+3VS
1000
750
+3V
330
250
+1.5VS
500
375
Fingerprint Conn
To USB/B Connector
+3VS
+3VALW
To USB/B Connector
10
GND 1
2
3
4
5
6
7
GND 8
1
2
3
4
5
6
7
8
80mil
JP9
80mil
JP8
+5VALW
1
C679
R563
USB20_N4
USB20_P4
2
33P_0402_50V8K
SYSON#
MBK1005121YZF_0402
USB20_N4 20
USB20_P4 20
10
GND 1
2
3
4
5
6
7
GND 8
1
2
3
4
5
6
7
8
2 0_0603_5%
2 0_0603_5%
JP7
C484
2
1
0.1U_0402_16V4Z
20
20
R572 1
R573 1
For EMI
+5VALW
1
C680
USB20_N1
USB20_P1
2 SYSON#
SYSON#
MBK1005121YZF_0402
USB20_N2 20
USB20_P2 20
G2
G1
4
3
2
1
ACES_85201-0405N
CONN@
2
33P_0402_50V8K
1
R576
USB20_N2
USB20_P2
6
5
4
3
2
1
29,37,38,45
USB_OC#2 20
ACES_87213-0800G
CONN@
ACES_87213-0800G
CONN@
+5VALW
+5VALW
+3VALW
4.7U_0805_10V4Z
2
C333
R520
100K_0402_5%
4.7U_0805_10V4Z
2
C404
USB_OC#2
C654
0.1U_0402_16V4Z
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
28
of
50
2
4
+3VS
17
+3VALW
11,13,19,25,26,28,30
PLT_RST#
PLT_RST#
30,37,44
SYSON
30,32,37,45 SUSP#
+3VALW
1.5Vin
1.5Vin
1.5Vout
1.5Vout
11
13
3.3Vin
3.3Vin
3.3Vout
3.3Vout
3
5
AUX_IN
AUX_OUT
SYSRST#
OC#
SYSON
20
SHDN#
PERST#
SUSP#
STBY#
NC
R248 1
2 100K_0402_5%CP_PE# 10
CPPE#
R242 1
2 100K_0402_5%CP_USB# 9
CPUSB#
RCLKEN1
18
GND
TGND
Imax = 0.275A
+1.5VS_CARD
60mils
C372
+3VS_CARD
15
10U_0805_10V4Z
2
+3VALW_CARD
40mil
19
+3VS_CARD
C367
C341
PERST1#
+3VS_CARD
2
5
2
CLKREQ1#
CP_PE#
RCLKEN1 2
G
10U_0805_10V4Z
2
NC7SZ32P5X_NL_SC70-5
20 CP_PE#
15 CLK_PCIE_CARD#
15 CLK_PCIE_CARD
C338
0.1U_0402_16V4Z
10 PCIE_PTX_C_IRX_N0
10 PCIE_PTX_C_IRX_P0
U15
4
10 PCIE_ITX_C_PRX_N0
10 PCIE_ITX_C_PRX_P0
EXP_CLKREQ# 15
27
28
1
10U_0805_10V4Z
2
CP_USB#
21
10U_0805_10V4Z
2
USB20_N11
USB20_P11
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
+3VS
+1.5VS
C371
20
20
C366
20,26,28 SB_PCIE_WAKE#
+3VALW_CARD
+3VS
C353
16
7
CLKREQ1#
C370
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
6,20,26 ICH_SMBCLK1
6,20,26 ICH_SMBDATA1
+1.5VS_CARD
RCLKEN
+3VALW
C342
10U_0805_10V4Z
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R228
10K_0402_5%
C340
JEXP1
Imax = 0.75A
PERST1#
G577NSR91U_TQFN_20P
+3VS
+1.5VS_CARD
Imax = 1.35A
G Vcc
12
14
+1.5VS
40mil
Q17
2N7002_SOT23
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
GND
GND
29
30
GND
GND
FOX_1CH4110C_LT
CONN@
+USB_VCCA
+USB_VCCA
+USB_VCCA
W=80mils
1
+
2
R407
Bluetooth Conn.
150U_D2_6.3VM
C498
470P_0402_50V7K
0_0402_5%
R426
L58
+3VS
20
USB20_N0
USB20_P0
USB20_N0
USB20_P0
1
4
JUSB1
2
3
USB20_N0_1
USB20_P0_1
WCM2012F2S-900T04_0805
1
C320
C334
C330
0_0402_5%
1U_0603_10V4Z
2
AO3413_SOT23-3
Q16
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
20
USB20_N7
USB20_N7
1 1
20
USB20_P7
USB20_P7
4 4
470P_0402_50V7K
0_0402_5%
JUSB2
USB20_N7_1
USB20_P7_1
WCM2012F2S-900T04_0805
R427
0_0402_5%
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
SUYIN_020173MR004G565ZR
CONN@
SUYIN_020173MR004G565ZR
CONN@
D23
USB20_P0_1
CH3
Vp
W=40mils
CH2
Vn
CH1
USB20_N7_1
+BT_VCC
0.1U_0402_16V4Z
+USB_VCCA
C335
R452
300_0603_5%
4.7U_0805_10V4Z
2
0.1U_0402_16V4Z
USB20_P7_1
CH4
+3VALW
D
Q42
2N7002_SOT23
2
G
3
USB20_N0_1
CM1293-04SO_SOT23-6
+5VALW
U29
C555
1
2
3
4
GND
IN
IN
EN#
+USB_VCCA
80mil
8
7
6
5
OUT
OUT
OUT
FLG
TPS2061DRG4_SO8
+BT_VCC
4.7U_0805_10V4Z
2
C327
R421
100K_0402_5%
2
BT_ON#
2
10K_0402_5%
30
1
R202
R408
0.1U_0402_16V4Z
W=80mils
C558
L62
20
+3VALW
C539
R422 1
2 10K_0402_5%
USB_OC#0 20
R425 1
2 10K_0402_5%
USB_OC#1 20
JP10
20
20
1
2
3
4
5
6
7
8
USB20_P9
USB20_N9
28 WLAN_BT_DATA
28 WLAN_BT_CLK
1 GND
2
3
4
5
6
7
8 GND
1
28,37,38,45 SYSON#
C566
0.1U_0402_16V4Z
2
C563
0.1U_0402_16V4Z
10
ACES_87213-0800G
CONN@
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
29
of
50
For EC Tools
+3VALW
L35
77
78
79
80
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
LID_SW#
ESB_CLK
ESB_DATA
EC_PME#
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
D11
32
RCIRRX
EC_RCIRRX
RB751V_SOD323
+5VS
2 TP_CLK
4.7K_0402_5%
2 TP_DATA
4.7K_0402_5%
1
R221
1
R224
+3VALW
6,14,40
6,14,40
6,31
6,31
EC_SMB_CK2
2
4.7K_0402_5%
EC_SMB_DA2
2
4.7K_0402_5%
ESB_CLK
2
4.7K_0402_5%
ESB_DATA
2
4.7K_0402_5%
1
R217
1
R216
1
R561
1
R562
+5VS
20 PM_SLP_S3#
20 PM_SLP_S5#
20
EC_SMI#
31
LID_SW#
31 ESB_CLK
31 ESB_DATA
26
EC_PME#
26 ENERGY_DET
36 FAN_SPEED1
29
BT_ON#
+3VS
32
ON/OFF
31 PWR_SUSP_LED
31
NUM_LED#
JP28
FAN_SPEED1
BT_ON#
E51TXD_P80DATA
E51RXD_P80CLK
ON/OFF
PWR_SUSP_LED
NUM_LED#
EC_CRY1
EC_CRY2
CLK_14M_SIO
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
PLT_RST#
R521 1
R523 1
SERIRQ
CLK_14M_SIO 15
122
123
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
97
98
99
109
3S/4S#
65W/90W#
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
119
120
126
128
EC_SPIDI/FWR#
EC_SPIDO/FRD#
EC_SPICLK
EC_SPICS#/FSEL#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
73
74
89
90
91
92
93
95
121
127
EC_RCIRRX
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
100
101
102
103
104
105
106
107
108
GPIO
SM Bus
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
GPI
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
V18R
124
XCLK1
XCLK0
65W/90W#
2
R246
1
100K_0402_5%
BT_ON#
1
100K_0402_5%
+3VALW
EC_MUTE 34,35
EC_I2C_INT1 31
DOCKIN# 38
BT_LED# 31
TP_CLK 31
TP_DATA 31
TP_CLK
TP_DATA
R552
3S/4S# 42
65W/90W# 42
EC_VLDT_EN 32
VGATE(A32)
EC_SI_SPI_SO 31
EC_SO_SPI_SI 31
EC_SPICLK 31
EC_SPICS#/FSEL# 31
+3VALW
ENCODER_PULSE 34
FSTCHG 42
BATT_GRN_LED# 31
CAPS_LED# 31
BATT_AMB_LED# 31
PWR_LED 31
SYSON
29,37,44
VR_ON
46
ACIN
14,21,31,37,39,42
EC_RSMRST# 20
EC_LID_OUT# 20
EC_ON
32
EC_SWI# 20
EC_PWROK 32
BKOFF# 16
WL_OFF# 28
EC_LID_OUT#
EC_ON
EC_PWROK
BKOFF#
WL_OFF#
EC_DOCKIN#
+3VALW
R189
100K_0402_5%
Ra
FSTCHG
BATT_GRN_LED#
CAPS_LED#
BATT_AMB_LED#
PWR_LED
SYSON
VR_ON
ACIN
KB926QFB1_LQFP128_14X14
ENBKL
EAPD
SUSP#
PBTN_OUT#
Ra
AD_BID0
R187
Rb
C308
@
R203
100K_0402_5%
AD_PID0
R209
18K_0402_5%
2
0.1U_0402_16V4Z
Rb
C317
100K_0402_5%
2
0.1U_0402_16V4Z
B
EC_CRY2
C358
20,27,38
VGATE
46
ENBKL
11,14
EAPD
33
EC_THERM# 21
SUSP#
29,32,37,45
PBTN_OUT# 20
ARCADE# 31
C359
15P_0402_50V8J
X1
32.768KHZ_12.5P_MC-306
C354
4.7U_0805_10V4Z
BATT_TEMP
20mil
L36
ECAGND 2
1
FBM-L11-160808-800LMT_0603
BATT_OVP
ACIN
C304
2
C303
2
C355
2
100P_0402_50V8J
1
100P_0402_50V8J
1
100P_0402_50V8J
1
LPCCLK1 19,23
Security Classification
2008/04/16
Issued Date
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ACES_85201-20051
@
Date:
1
100K_0402_5%
15P_0402_50V8J
LPC_DRQ1# 19
2 0_0402_5%
2 0_0402_5%
R551
2
4.7K_0402_5%
DAC_BRIG 16
EN_DFAN1 36
IREF
42
CALIBRATE# 42
EC_MUTE
PS2 Interface
BATT_OVP 42
ADP_I
42
1
R241
VR_ON
AD_PID0
83
84
85
86
87
88
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
11
24
35
94
113
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
DAC_BRIG
EN_DFAN1
IREF
GND
GND
GND
GND
GND
+3VS
EC_SMB_CK1
2
4.7K_0402_5%
EC_SMB_DA1
2
4.7K_0402_5%
1
R207
1
R208
68
70
71
72
AD_BID0
3S/4S#
BATT_TEMP 40
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
R198
10K_0402_5%
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
AD
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
+3VALW
BATT_TEMP
BATT_OVP
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
63
64
65
66
75
76
EC_SCI#
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
PWM Output
INVT_PWM 16
BEEP#
33
ENCODER_DIR 34
ACOFF
42
ECAGND
2
1
C305 0.01U_0402_16V7K
PLT_RST#
20
EC_SCI#
19 PM_CLKRUN#
2
1
R188
47K_0402_5%
2
1
C306
0.1U_0402_16V4Z
12
13
37
20
38
INVT_PWM
BEEP#
11,13,19,25,26,28,29
+3VALW
PLT_RST#
21
23
26
27
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
19,23 CLK_PCI_EC
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
IN
1 @ 33_0402_5%
1
2
3
4
5
7
8
10
OUT
R219 2
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
NC
C331
@ 22P_0402_50V8J
2
1
20
EC_GA20
20 EC_KBRST#
19
SERIRQ
19 LPC_FRAME#
19
LPC_AD3
19
LPC_AD2
19
LPC_AD1
19
LPC_AD0
NC
LID_SW#
2
10K_0402_5%
E51RXD_P80CLK 28
E51TXD_P80DATA 28
AVCC
1
R211
E51RXD_P80CLK
E51TXD_P80DATA
ACES_85205-0400
@
AGND
EC_PME#
2
10K_0402_5%
69
@
1
R204
VCC
VCC
VCC
VCC
VCC
VCC
U16
KSO[0..17] 31
0.1U_0402_16V4Z
1
2
3
4
+3VALW
1
2
3
4
67
9
22
33
96
111
125
KSO[0..17]
C312
31
2
2
0.1U_0402_16V4Z
KSI[0..7]
C351
JP11
KSI[0..7]
C337
2
2
0.1U_0402_16V4Z
+3VALW
1
2+EC_VCCA
2 FBM-L11-160808-800LMT_0603
1
C356
C357
1000P_0402_50V7K
1000P_0402_50V7K
1
1
2
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1 C315
1
C307
ECAGND
EC ENE KB926
Document Number
Rev
1.0
JALB0 LA-4171P
Friday, April 18, 2008
Sheet
1
30
of
50
2 0.1U_0402_16V4Z
U19
CE#
WP#
HOLD#
VSS
8
6 R269 1
5 R268 1
2 R236 1
VDD
SCK
SI
SO
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
EC_SPICLK 30
EC_SO_SPI_SI 30
EC_SI_SPI_SO 30
KSI[0..7]
KSI[0..7]
KSO[0..17]
C258
KSO[0..17] 30
To Media/B Conn.
For ENE Cap sense IC
28
27
100P_0402_50V8J
KSO6
C46
100P_0402_50V8J
100P_0402_50V8J
KSO5
C45
100P_0402_50V8J
KSO12
C52
100P_0402_50V8J
KSO4
C44
100P_0402_50V8J
KSI0
C58
100P_0402_50V8J
KSO3
C43
100P_0402_50V8J
KSO11
C51
100P_0402_50V8J
KSI4
C62
100P_0402_50V8J
KSO10
C50
100P_0402_50V8J
KSO2
C42
100P_0402_50V8J
KSI1
C59
100P_0402_50V8J
KSO1
C41
100P_0402_50V8J
KSI2
C60
100P_0402_50V8J
KSO0
C40
100P_0402_50V8J
KSO9
C49
100P_0402_50V8J
KSI5
C63
100P_0402_50V8J
KSI3
C61
100P_0402_50V8J
KSI6
C64
100P_0402_50V8J
KSO8
C48
100P_0402_50V8J
KSI7
C65
100P_0402_50V8J
17
18
+5VALW
RIGHT_BTN#3
SW2
SMT1-05-A_4P
1
C17
C401
LID_SW#
C662 1
100P_0402_50V8J
MEDIA_LED# C655 1
100P_0402_50V8J
100P_0402_50V8J
KSO17 C57
100P_0402_50V8J
CAPS_LED# C657 1
100P_0402_50V8J
PWR_LED#
C658 1
100P_0402_50V8J
ON/OFFBTN# C659 1
100P_0402_50V8J
ACIN#
C660 1
100P_0402_50V8J
PWR_SUSP_LED# 1
C661
100P_0402_50V8J
BATT_AMB_LED#
ARCADE# 30
51ON#
51ON#
32,39
DAN202UT106_SC70-3
PWR_SUSP_LED#
R264
100K_0402_5%
2N7002DW-T/R7_SOT363-6
Q20B
5
R247
100K_0402_5%
To FUN/B Conn.
+3VS
6
5
4
3
2
1
ARCADE_BTN#
KSO0
KSI5
+5VS
25
5IN1_LED#
21
SATA_LED#
1
SATA_LED#
ACES_85201-0605
CONN@
To BTN/B Conn.
+3VS
Q23A
2N7002DW-T/R7_SOT363-6 R274
@
100K_0402_5%
6
MEDIA_LED#
Q23B
2N7002DW-T/R7_SOT363-6
JP17
KSO0
LED2
ARCADE_BTN# 1
14,21,30,37,39,42
JP21
FOR EMI
BATT_GRN_LED#
ACIN
2N7002DW-T/R7_SOT363-6
30 PWR_SUSP_LED
Q20A
PWR_LED
0.1U_0402_16V4Z
2
G
30
C656 1
PWR_SUSP_LED#
Q18
2N7002_SOT23 S
30
C663
NUM_LED#
ON/OFFBTN# 32
LID_SW#
+3VALW
2
+3VALW
100K_0402_5%
+3VS
100P_0402_50V8J
PWR_LED#
1
R258
D15
PWR_LED#
+3VALW
ACIN#
NUM_LED# 30
CAPS_LED# 30
PWR_SUSP_LED#
ACIN#
LID_SW#
YG
A
SW1
SMT1-05-A_4P
1
+5VALW
MEDIA_LED#
NUM_LED#
CAPS_LED#
PWR_LED#
YG
+5VALW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
+5VS
C664
LED1
R287
1
2
1K_0402_5%
+5VS
ACES_85201-16051
CONN@
+5VALW
G17
G18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
KSO16 C56
LEFT_BTN# 3
C53
R286
1K_0402_5%
1
2
ACES_85201-0605
CONN@
C54
KSO13
15" ONLY
C677
KSO14
100P_0402_50V8J
C675
1
D8
@
PSOT24C_SOT23
0.1U_0402_16V4Z
R284
4
2
1.5K_0402_5%
TP_CLK
C208
C47
+5VALW
C674
1
+3VS
KSO7
6
5
4
3
2
1
JP16
100P_0402_50V8J
1.5K_0402_5%
3
2
+5VS
R285
TP_DATA
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
2
ACES_85201-0605
CONN@
+3VS
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
2
2
2
2
C673
C55
@
@
1
1
1
1
C259
100P_0402_50V8J
R557
R558
R559
R560
ESB_CLK
ESB_DATA
EC_SMB_CK2
EC_SMB_DA2
EC_I2C_INT1
For EMI
KSO15
+5VS
+5VS
JP14
30
30
6,30
6,30
30
ACES_88747-2601
CONN@
Compal Footprint
100P_0402_50V8J
(Right)
KSO0
G2
KSO1
G1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
30
6
5
4
3
2
1
TP_CLK
TP_DATA
LEFT_BTN#
RIGHT_BTN#
TP_CLK
TP_DATA
5
6
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+5VS
30
30
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
JP13
MX25L1005AMC-12G_SOP8
JP15
(Left)
To TP/B Conn.
+SPI_VCC
EC_SPICLK
EC_SO_SPI_SI
EC_SI_SPI_SO
8
6
5
2
MX25L8005M2C-15G_SOP8
@
INT_KBD Conn.
VDD
SCK
SI
SO
1
3
7
4
CE#
WP#
HOLD#
VSS
EC_SPICS#/FSEL#
2 4.7K_0402_5% SPI_WP#
2 4.7K_0402_5% SPI_HOLD#
R233 1
R271 1
1
3
7
4
30 EC_SPICS#/FSEL#
+3VALW
EC_SPICS#/FSEL#
SPI_WP#
SPI_HOLD#
U18
5
6
+SPI_VCC
C374 1
2
0_0603_5%
1
R273
+3VALW
BATT_GRN_LED# 30
BATT_AMB_LED# 30
KSI1
WL_BTN#
KSI2
BT_BTN#
KSI3
EMAIL_BTN#
KSI4
IE_BTN#
KSI5
E-KEY_BTN#
KSI6
PROGRAM_BTN#
1
2
3
4
5
6
7
8
9
10
11
12
MINI1_LED#
BT_LED#
KSO0
KSI1
KSI2
KSI3
KSI4
+3VS
+5VS
MINI1_LED# 28
BT_LED# 30
ACES_85201-1205
CONN@
HT-297DQ/GQ_AMB/YG_0603
Issued Date
Security Classification
2008/04/16
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Friday, April 18, 2008
Sheet
31
of
50
Power Button
ON/OFF switch
TOP Side
R301
+3VALW
2
@ 10K_0603_5%
R194
100K_0402_5%
ON/OFF
51ON#
@
SW3
SMT1-05-A_4P
3
1
51ON#
20 HDA_SYNC_MDC
20 HDA_SDIN1
20 HDA_RST_MDC#
30
31,39
HDA_SDIN1_MDC
33_0402_5%
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
2
4
6
8
10
12
1
R283
HDA_BITCLK_MDC 20
R280
0_0402_5%
GND
GND
GND
GND
GND
GND
<BOM Structure>
C329
EMI Notice
D13
C393
RLZ20A_LL34
22P_0402_50V8J
1000P_0402_50V7K
1
ACES_88018-124G
CONN@
13
14
15
16
17
18
2
0_0402_5%
1U_0603_10V4Z
+3VALW
DAN202UT106_SC70-3
5
6
R281
1
3
5
7
9
11
C394
ON/OFFBTN#
D12
ON/OFFBTN#
31 ON/OFFBTN#
20 HDA_SDOUT_MDC
Bottom Side
20mil
JMDC1
R11
2
@ 10K_0603_5%
EC_ON
EC_ON
For EMI
D
Q15
2
G
3
30
R196
S 2N7002_SOT23
10K_0402_5%
2
Power ON Circuit
+3VS
+3VALW
+3VALW
14
1
R254
2
@ 0_0402_5%
SB_PWRGD 6,20
1
R501
100_0805_5%
2
C349
1U_0805_25V4Z
30
1
R253
EC_PWROK
CIR
+3VALW
P
3
O
7
2
G
Q19
2N7002_SOT23
U21B
SN74LVC14APWLE_TSSOP14
2
SUSP
1
37
1
D
U21A
SN74LVC14APWLE_TSSOP14
14
R249
180K_0402_5%
0_0402_5%
IR1
3
1
+3VS
C645
+3VALW
Vs
GND
OUT
GND
TSOP36236TR_4P
+3VALW
4.7U_0805_10V4Z
14
I
R267
For +VCCP/+1.05VS
@
2
RCIRRX
30
C644
1000P_0402_50V7K
VLDT_EN 37,43,44
0_0402_5%
0.1U_0402_16V4Z
I
7
C377
RB751V_SOD323
U21D
SN74LVC14APWLE_TSSOP14
14
U21C
SN74LVC14APWLE_TSSOP14
10K_0402_1%
D14
SUSP# 1
R272
29,30,37,45 SUSP#
RCIRRX
4
2
R266
1
EC_VLDT_EN 1
30 EC_VLDT_EN
2
0_0402_5%
+3VALW
C352
10
13
D16
14
12
1
R250
2
0_0402_5%
VGA_ON
14
I
G
U21F
SN74LVC14APWLE_TSSOP14
14
U21E
SN74LVC14APWLE_TSSOP14
P
11
+3VALW
2 0.1U_0402_16V4Z
RB751V_SOD323
2
VGA@
C373
SUSP#
1
R252
2
@ 0_0402_5%
0.22U_0603_16V7K
1
VGA@
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Sheet
32
of
50
+VDDA
R464
10K_0402_5%
+5VAMP
C606
+5VS
2
1U_0402_6.3V4Z
R463
10K_0402_5%
2
60mil
U34
L70 1
2
KC FBM-L11-201209-221LMAT_0805
1
1
L69 1
C607
C604
2
KC FBM-L11-201209-221LMAT_0805
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
GND
SHDN
IN
OUT
BYP
G9191-475T1U_SOT23-5
ALC268
C575 1
1U_0402_6.3V4Z
BEEP#
C
2
1
R461
Q41
2
B
E
560_0402_5%
2SC2411K_SOT23
R441
888VC@
560_0402_5%
C574 1
1U_0402_6.3V4Z
SB_SPKR
4.7U_0805_10V4Z
0.01U_0402_16V7K
2
2.4K_0402_1%
ALC888S-VC
20
C595
4.75V
C596
268@
30
MONO_IN
+VDDA
1
BOM Option
C592
1
1U_0402_6.3V4Z
R442
40mil
D24
RB751V_SOD323
10mil
L63
MBK1608121YZF_0603
1
2
+3VS_DVDD
1
HD Audio Codec
R445
10K_0402_5%
C571
+3VS
C572
0.1U_0402_16V4Z
10U_0805_10V4Z
2
2
+AVDD_HDA
2 0_0402_5% LINEIN_PLUG#
1 0_0402_5%
34
MIC1_L
34
MIC1_R
MIC1_L
C610
MIC1_R
C611
MIC_PLUG#
R457 2
R455 1
R449 2
1 39.2K_0402_1%
2 10K_0402_1%
1 20K_0402_1%
30
EAPD
SIDE_L
45
LINE1_R
SIDE_R
46
CD_L
CENTER
43
20
CD_R
LFE
19
CD_GND
34,38
DMIC_DATA
1
R439
Sense Pin
SENSE A
SENSE B
Impedance
Codec Signals
39.2K
20K
10K
5.1K
39.2K
20K
10K
5.1K
MIC1_R
PCBEEP
20 HDA_SYNC_AUDIO
10
SYNC
44
BITCLK
SDATA_IN
PIN37_VREFO
37
LINE1_VREFO
29
LINE2_VREFO
31
MIC1_VREFO_L
28
MIC1_VREFO_R
SPDIFO2
GPIO0/DMIC_CLK MIC2_VREFO
SENSE A
SENSE B
VREF
32
2
3
13
34
47
SPDIFI/EAPD
JDREF
40
SENSE C
33
AVSS1
AVSS2
26
42
1
R431 268@
48
4
7
HP_RIGHT-FRONT_RIGHT
WOOFER_MONO
1
2
R432
0_0402_5%
DMIC_CLK
2
0_0402_5%
1
R440
2
1
10_0402_5%
DMIC_CLK_R
R294
DMIC_DATA_R
R288
SDATA_OUT
SPDIFO
GPIO1/DMIC_DATA
DVSS
DGND
2
R437 33_0402_5%
20
Digital/Analog MIC
HDA_SDIN0 20
+3VS
JP23
DMIC_CLK
R293 @
DMIC_DATA
R290 @
10mil
MIC1_VREFO_L
MIC2_VREFO
1
R433
20K_0402_1%
HDA_GPIO0
2
268@ 0_0402_5%
2
888VC@ 0_0402_5%
DMIC_CLK
HDA_GPIO3
2
888VC@ 0_0402_5%
1
C578
C579
0.1U_0402_16V4Z
2
2
10U_0805_10V4Z
1
R489
2
0_0805_5%
1
R494
2
0_0805_5%
1
R486
2
0_0805_5%
1
R443
2
0_0805_5%
1
R474
2
0_0805_5%
GNDA
GND
GNDA
2009/04/16
Deciphered Date
Title
Rev
1.0
JALB0 LA-4171P
Date:
ACES_87213-0400G
CONN@
2
0_0805_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
5
6
1
R468
GND
Security Classification
1
2
3 GND
4 GND
D1
SM05T1G_SOT23-3
@
10mil
CODEC_VREF
27
1
2
3
4
DMIC_CLK_R
0_0603_5%
DMIC_DATA_R
0_0603_5%
MIC1_VREFO_R
30
DMIC_DATA
1
R435
1
R434
Issued Date
220P_0402_50V7K
2 C577
22P_0402_50V8J
AGND
1
R436
INT_MIC_R
KC FBMA-L11-160808-121LMT_0603
1
KC FBMA-L11-160808-121LMT_0603
C395
2
2
268@ 0_0402_5%
14 SPDIF_HDMI
34
WOOFER_MONO 35
HDA_BITCLK_AUDIO
HDA_SDIN0_AUDIO
ALC888S-VC_LQFP48_7x7
1
R438
HP_LEFT-FRONT_LEFT 34
MIC1_L
RESET#
R577 2
1
MBK1005121YZF_0402
1
2SPDIF_R
SPDIF
R430
MBK1005121YZF_0402
2
888VC@ 0_0402_5%
LINE1_L
15mil
2
HP_RIGHT-FRONT_RIGHT
20 HDA_RST_AUDIO#
For EMI
41
HP_PLUG#
LINEIN_PLUG#
MIC_PLUG#
34 HP_PLUG#
34 LINEIN_PLUG#
34 MIC_PLUG#
39
SURR_R
MIC1_C_L
21
4.7U_0805_6.3V6K
MIC1_C_R
22
4.7U_0805_6.3V6K
MONO_IN
12
HDA_GPIO0
2HDA_GPIO3
0_0402_5%
SENSE_A
DVDD
SURR_L
MIC2_R
R295
2.2K_0402_5%
AMP_RIGHT 34
MIC2_L
11
1
R530
AMP_LEFT 34
HP_LEFT-FRONT_LEFT
20 HDA_SDOUT_AUDIO
17,18,38 EC_DOCKIN#_S0
DVDD_IO
AMP_RIGHT
R454 1
AMP_LEFT
36
38 D_LINEIN_PLUG#
35
FRONT_R
MIC2_VREFO
38 D_HP_PLUG#
2 0_0402_5%
FRONT_L
LINE2-R
MIC2_C_R
17
4.7U_0805_6.3V6K
LINE_C_L
23
4.7U_0805_6.3V6K
LINE_C_R
24
4.7U_0805_6.3V6K
18
HP_PLUG#
R456 1
LINE2-L
C582
15
2
Intel: +1.5VS
AMD: +3VS
AMD SB700 only support +3VS I/O
0.1U_0402_16V4Z
10U_0805_10V4Z
2
2
14
C581
+3VS
38
U31
L65
MBK1608121YZF_0603
1
2
+1.5VS_DVDD
34 LINE_R-SURR_R
C589
2
0.1U_0402_16V4Z
1
C599
LINE_L-SURR_L 1
C600
LINE_R-SURR_R 1
C601
C598
34 LINE_L-SURR_L
R448 2
MIC2_C_L
16
4.7U_0805_6.3V6K
INT_MIC_R
38 D_MIC_PLUG#
10mil
40mil
25
C590
10U_0805_10V4Z
0.1U_0402_16V4Z
1
1
C568
AVDD2
L66 1
2
FBM-L11-160808-800LMT_0603
AVDD1
+VDDA
Sheet
33
H
of
50
+5VAMP
W=40mil
INR_H
INL_H
1
C632
1U_0603_10V4Z
2
+5VAMP
C635
26
/SD
28
BEEP
12
14
CP+
CP-
25
BIAS
Left
3
D27
SM05T1G_SOT23-3
@
+5VAMP
+5VAMP
Right
3
4
G1
G2
ACES_88266-02001
CONN@
HP_PLUG#
HP_PLUG# 33
HP_R
HP_L
1
2
CVSS
15
VSS
16
GND
PGND
PGND
CGND
GND
2
23
7
13
29
R484
100K_0402_5%
R485
100K_0402_5%
C636
1U_0603_10V4Z
APA2057A_TSSOP28
SPDIF_PLUG#
Q45B
2N7002DW-T/R7_SOT363-6
Q45A
2N7002DW-T/R7_SOT363-6
Q44
AO3413_SOT23-3
20mil
2.2U_0603_6.3V6K
2
VOL_AMP
39K_0402_5%
4
6
HP_RIGHT_R
39K_0402_5% HP_LEFT_R
1
2
HP EN
VDD
HPOUT_R
HPOUT_L
24
19
17
18
2 100K_0402_5%
HP_RIGHT_C 1
2.2U_0603_6.3V6K R482
HP_LEFT_C
1
2.2U_0603_6.3V6K R481
20
10
11
SPKL+
SPKL-
R491 1
G1
G2
8
9
/AMP EN
SPK_R+
SPK_R-
2 0_0603_5%
2 0_0603_5%
1
1
6 1
33 HP_LEFT-FRONT_LEFT
LOUT+
LOUT-
27
3
4
HP_RIGHT-FRONT_RIGHT 1
C624
HP_LEFT-FRONT_LEFT 1
C623
33 HP_RIGHT-FRONT_RIGHT
ROUT+
ROUT-
R51
R52
+5VAMP
INR_A
INL_A
2 100K_0402_5%
1
2
JP20
SPKR+
SPKRSPKR+
SPKR-
22
21
R492 1
1
2
ACES_88266-02001
CONN@
20mil
HPF Fc = 900Hz
SPK_L+
SPK_L-
D26
SM05T1G_SOT23-3
@
3
5
C630
1K_0402_5%
1K_0402_5%
U36
PVDD
PVDD
HVDD
AMP_RIGHT_C
1U_0402_6.3V4Z
AMP_LEFT_C
1U_0402_6.3V4Z
CVDD
1
C629
AMP_LEFT_C-1
1
2
1
C621
C628
0.22U_0603_16V4Z
R478
R479
1
AMP_LEFT
2 0_0603_5%
2 0_0603_5%
1
1
2
4.7U_0805_10V4Z
AMP_RIGHT
33
C622
0.22U_0603_16V4Z
AMP_RIGHT_C-1
1
2
JP19
33
0.1U_0402_16V4Z
<BOM Structure>
2
0.1U_0402_16V4Z
C627
R50
R49
C638
SPKL+
SPKL-
+3VS
+5VSPDIF
R490
42.2K_0402_1%
VOL_AMP
1
Gain= 6dB
D
1
C634
2
G
Q46
1
C637
R493
61.9K_0402_1%
2
0.01U_0402_16V7K
EC_MUTE
EC_MUTE 30,35
D_HPOUT_L
D_HPOUT_R
D_HPOUT_L
D_HPOUT_R
38
38
R487 1
R480 1
HPOUT_L 1
R488 2HPOUT_L_1
1
56.2_0603_1%
L74
HPOUT_R 1
R483 2HPOUT_R_1
1
56.2_0603_1%
L73
2 56.2_0603_1% HPOUT_L
2 56.2_0603_1% HPOUT_R
D_LINE_L
D_LINE_R
D_LINE_L
D_LINE_R
R459 1
R446 1
2 75_0603_1%
2 75_0603_1%
38
38
1
C633
For EMI
D_MIC_L
D_MIC_R
R475 1
R470 1
2 75_0603_1%
2 75_0603_1%
R465 1
38 AUDIO_GNDA
FOR EMI
MIC1_R
MIC1_L
R553
75_0603_1%
LINE_R-SURR_R
LINE_L-SURR_L
R554
LINE_R_R
2
FBMA-L11-160808-800LMT_0603
LINE_L_R
2
FBMA-L11-160808-800LMT_0603
1
1
1
L68
1
L67
75_0603_1%
C593
220P_0402_50V7K
2
+3VS
2
NC7SZ14P5X_NL_SC70-5
U38
1
2
3
4
5
6
7
1
C641
2
MIC1_VREFO_L
MIC1_VREFO_R
+3VS
C639
0.1U_0402_16V4Z
(HDA Jack)
CD1#
D1
CP1
SD1#
Q1
Q1#
GND
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
14
13
12
11
10
09
08
TC74LCX74FT_TSSOP14
ENCODER_DIR 30
ENCODER_PULSE 30
33
MIC1_R
33
MIC1_L
MIC1_L
R556
R555
MIC1_R
1
1
C643
0.1U_0402_16V4Z
C616
220P_0402_50V7K
C618
220P_0402_50V7K
2008/04/16
4
MIC2_R_1
3
6
2
1
4
SINGA_2SJ-E351-S01
CONN@
Deciphered Date
Title
Date:
(HDA Jack)
Security Classification
MIC_PLUG#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MIC JACK
JMIC1
8
7
33 MIC_PLUG#
R472
R476
2.2K_0402_5%
2.2K_0402_5%
75_0603_1%
2
1
2
L72
FBMA-L11-160808-800LMT_0603
MIC2_L_1
2
1
2
L71
FBMA-L11-160808-800LMT_0603
75_0603_1%
1
1
2
1
4
U39
Issued Date
SINGA_2SJ-E351-S03
CONN@
C603
220P_0402_50V7K
FOR EMI
2
R495
100K_0402_5%
A
3
2
10K_0402_5%
1
C640
0.01U_0402_16V7K
XRE094PHDINB1-2-12-E-7016_3P
5
1
R499
GND
0.01U_0402_16V7K
5
P
2
A
JLINE1
3
6
2
1
0.1U_0402_16V4Z
NC
1
4
GND
C642
2
2
10K_0402_5%
LINE-IN JACK
+3VS
COM
LINEIN_PLUG#
33 LINEIN_PLUG#
2 0_0603_5%
33 LINE_L-SURR_L
R496
10K_0402_5%
SINGA_2SJ-E373-T01
CONN@
8
7
33 LINE_R-SURR_R
+3VS
4
7
8
10
9
PSOT24C_SOT23
D_MIC_L
D_MIC_R
2
100P_0402_50V8J
SPDIF_PLUG#
SPDIF
SPDIF
+5VSPDIF
D31
LINE_R-SURR_R
LINE_L-SURR_L
For Docking
1
R497
JHP1
1
2
6
3
HPOUT_L_2
FBMA-L11-160808-800LMT_0603
HPOUT_R_2
2
FBMA-L11-160808-800LMT_0603
2
33,38
SPDIF_PLUG# 2
C631
330P_0402_50V7K 330P_0402_50V7K
1
1
For Docking
U37
For Docking
2N7002_SOT23
38
38
R500
10K_0402_5%
Rev
1.0
JALB0 LA-4171P
Sheet
34
of
50
+5VAMP
1
+5VAMP
0.33U_0603_16V4Z
R516
1K_0402_1%
1
2
4.7K_0402_1%
1
0.01U_0603_50V7K
2
VDD SHUTDOWN#
MUTE_WOOFER#
IN-
Vo+
WOOFER+
WOOFER_IN+ 3
IN+
Vo-
WOOFER-
GND
WOOFER_IN-
C647
BYPASS
1
100K_0402_5%
30mil
+5VAMP
R467
JP27
1
2
3
4
1
2
G1
G2
2
0.068U_0603_16V7K
2
G
ACES_87213-0200
EC_MUTE 30,34
Q40 S
2N7002_SOT23
CONN@
APA3011XA-TRL_MSOP8
C650
0.1U_0603_25V7K
U40
R517
33 WOOFER_MONO
WOOFER_MONO
C646
1
2
10U_0805_10V4Z
2
C651
Fc(high)= 482Hz
B
C652
1.8K_0402_5%
C648
2.2U_0603_6.3V4Z
Security Classification
2008/04/16
Issued Date
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SUB WOOFER
Rev
1.0
JALB0 LA-4171P
Date:
Sheet
1
35
of
50
H5
H_3P4
@
H13
H_3P4
@
H20
H_3P4
H7
H_3P4
FAN1 Conn
H22
H_3P4
H24
H_3P4
+5VS
+5VS
10U_0805_10V4Z
2
H2
H_3P4
H25
H_3P4
H14
H_3P4
H17
H_3P4
H10
H_3P4
H1
H_3P4
H23
H_3P25
C435
1
+VCC_FAN1
30 FAN_SPEED1
C411
1000P_0402_50V7K
@
1
H18
H_3P25
H11
H_3P25
H8
H_3P25
H15
H_4P2
H16
H_4P2
@
H12
H_3P25
H19
H_3P25
H3
H_3P25
40mil
H9
H_4P2
@
C425
1000P_0402_50V7K
1
2
R310
10K_0402_5%
H4
H_3P25
BAS16_SOT23-3
C429
10U_0805_10V4Z
1
2
+3VS
Change to SC1BAS16000
D20
1
G993P1UF_SOP8
8
7
6
5
JP26
1
2
3
ACES_85205-03001
CONN@
FD2
@
FIDUCIAL_C40M80
FD3
@
FIDUCIAL_C40M80
FD4
@
FIDUCIAL_C40M80
FIDUCIAL_C40M80
Security Classification
Issued Date
FD1
H21
H_4P6X4P0N
H6
H_4P0N
GND
GND
GND
GND
VEN
VIN
VO
VSET
1
2
3
4
+VCC_FAN1
EN_DFAN1
EN_DFAN1
30
D19
1SS355_SOD323-2
U26
2008/04/16
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Friday, April 18, 2008
Sheet
36
of
50
+5VALW TO +5VS
+5VALW
+5VALW
2
+5VS
R177
100K_0402_5%
U14
10U_0805_10V4Z
2
2
1U_0603_10V4Z
10U_0805_10V4Z
2
2
10U_0805_10V4Z
R193
470_0603_5%
SYSON#
28,29,38,45 SYSON#
29,30,44
SYSON
SYSON
5VS_GATE
SUSP
R171
100K_0402_5%
2
S
1
2
1
R212
200K_0402_5%
+VSB
Q11
2N7002_SOT23
2 SUSP
G
Q13
2N7002_SOT23
2
G
C314
2
C318
AO4468_SO8
C310
1
2
3
4
S
S
S
G
D
D
D
D
C309
8
7
6
5
C328
R541
@
0.1U_0603_25V7K
+5VALW
2
Q14G
2N7002_SOT23
R276
100K_0402_5%
32
SUSP
SUSP
Q24
2N7002_SOT23
1
R275
10K_0402_5%
+1.2VALW
+3VS
+1.2V_HT
2
+3VALW
2
G
29,30,32,45 SUSP#
+3VALW TO +3VS
Q43
S
2N7002_SOT23
@
2
G
ACIN
14,21,30,31,39,42 ACIN
1M_0402_5%
2
10U_0805_10V4Z
R10
470_0603_5%
SI4856ADY_SO810U_0805_10V4Z
2
2
1U_0603_10V4Z
+5VALW
2 SUSP
G
Q25
2N7002_SOT23
+VSB
+1.8V to +1.8VS
+1.8V
C15
1.2V_GATE
2
1
R306
150K_0402_5%
VLDT_EN# 2
Q27G
2N7002_SOT23
+1.8VS
2 VLDT_EN#
G
Q26
2N7002_SOT23
R191
100K_0402_5%
R543
VLDT_EN#
VLDT_EN#
C407
0.1U_0603_25V7K
C285
C270
R163
470_0603_5%
10U_0805_10V4Z
2
2
1U_0603_10V4Z
SI4856ADY_SO8
1.8VS_GATE
SUSP
S
1
2
1
R424
510K_0402_5%
1
+VSB
2
G
Q58
S
2N7002_SOT23
@
SI4856/AO4430
R186
10K_0402_5%
ACIN
10U_0805_10V4Z
2
2
10U_0805_10V4Z
C269
Q12
2N7002_SOT23
1M_0402_5%
1
2
3
4
S
S
S
G
C286
D
D
D
D
2
G
32,43,44 VLDT_EN
U11
8
7
6
5
D
5VS_GATE
1
2
3
4 C16
S
S
S
G
C14
D
D
D
D
10U_0805_10V4Z
2
2
1U_0603_10V4Z
10U_0805_10V4Z
2
2
10U_0805_10V4Z
R277
470_0603_5%
C388
AO4468_SO8
2
C391
8
7
6
5
C376
U1
1
2
3
4
S
S
S
G
D
D
D
D
1 1
C375
8
7
6
5
U22
2
2 SUSP
G
Q37
2N7002_SOT23
C564
R542
2
G
0.1U_0603_25V7K
Q39
S
2N7002_SOT23
1M_0402_5%
ACIN
2
G
+2.5VS
+1.1VS
+0.9V
2VLDT_EN#
G
Q57
2N7002_SOT23
2 SYSON#
G
Q10
2N7002_SOT23
2 SUSP
G
Q38
2N7002_SOT23
2 SUSP
G
Q22
2N7002_SOT23
R173
470_0603_5%
R170
470_0603_5%
R544
470_0603_5%
R423
470_0603_5%
R270
470_0603_5%
+1.8V
2
+1.5VS
2
Q51
S
2N7002_SOT23
@
2 SYSON#
G
Q9
2N7002_SOT23
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
DC Interface
Document Number
Rev
1.0
JALB0 LA-4181P
Sheet
37
of
50
+3VS
+3VS
R532
10K_0402_5%
3 2
+3VALW
1
R265
10K_0402_5%
10K_0402_5%
5
4
EC_DOCKIN#_S0 17,18,33
Q54B
2N7002DW-T/R7_SOT363-6
R259
Q54A
2
1
20,27,30 EC_DOCKIN#
2N7002DW-T/R7_SOT363-6
EC_DOCKIN 17
+5VALW
1
22U_0805_10V4Z
C672
@
DOCK_B+
+5VALW
ACER DOCK
Normal
67
68
19V_5A
5V_USB_3A
33
34
35
36
37
38
39
40
41
42
43
44
45
LIN_IN_DT#
LIN_IN_L
LIN_IN_R
MIC_DT#
MIC_L
MIC_R
GNDA
DOCK_DT1#
SPDIF
GND
LAN_2
LAN_2#
GND
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
GND
USB
USB#
USB_EN#
RESERVED
VGA_DT#
LAN_PWR
LAN_ACT
LAN_LINK
GND
LAN_0
LAN_0#
GND
LAN_1
LAN_1#
GND
LAN_3
LAN_3#
GND
+3VALW
R297
10K_0402_5%
30
DOCKIN#
33 D_LINEIN_PLUG#
34
D_LINE_L
34
D_LINE_R
33 D_MIC_PLUG#
34
D_MIC_L
34
D_MIC_R
34 AUDIO_GNDA
33,34
C396
0.1U_0402_16V4Z
R296 1
+3V_LAN
27 D_LAN_ACTIVITY#
27 D_LAN_LINK#
SPDIF
D_LAN_MIDI2+
D_LAN_MIDI2-
27 D_LAN_MIDI2+
27 D_LAN_MIDI2-
USB20_P3
USB20_N3
20
USB20_P3
20
USB20_N3
28,29,37,45 SYSON#
18,20 CRT_DET#
AUDIO_GNDA
DOCKIN#
2 0_0603_5%
+LAN_VCC
27 D_LAN_MIDI0+
27 D_LAN_MIDI0-
D_LAN_MIDI0+
D_LAN_MIDI0-
27 D_LAN_MIDI1+
27 D_LAN_MIDI1-
D_LAN_MIDI1+
D_LAN_MIDI1-
27 D_LAN_MIDI3+
27 D_LAN_MIDI3-
D_LAN_MIDI3+
D_LAN_MIDI3-
72
73
74
GND
GND
GND
46 P3
47 (67)
48
49 33
50 34
51 35
52 36
53 37
54 38
55 39
56 40
57 41
58 42
59 43
60 44
61 45
62
63 P4
64 (68)
GND
GND
65
66
GND
DVI_CLK
DVI_CLK#
GND
DVI_TX0
DVI_TX0#
GND
DVI_TX1
DVI_TX1#
GND
DVI_TX2
DVI_TX2#
GND
VGA_R
GND
VGA_G
GND
VGA_B
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
DOCK_DT2#
HP_L
HP_R
HP_DT#
GNDA
DVI_DT
DVI_DCDT
DVI_DDCCK
VGA_VS
VGA_HS
VGA_DDCCK
VGA_DDCDT
5V_S0
20
21
22
23
24
25
26
27
28
29
30
31
32
GND
GND
GND
69
70
71
1
P1
(65) 2
3
4
20
5
21
6
22
23
7
24
8
9
25
26 10
27 11
28 12
29 13
30 14
31 15
32 16
17
P2 18
(66) 19
D_DVI_TXC+ 17
D_DVI_TXC- 17
D_DVI_TXD0+ 17
D_DVI_TXD0- 17
D_DVI_TXD1+ 17
D_DVI_TXD1- 17
D_DVI_TXD2+ 17
D_DVI_TXD2- 17
D_CRT_R 18
D_CRT_G 18
D_CRT_B 18
DOCK_DT2#
AUDIO_GNDA
R289 1
2 1K_0402_5%
D_HPOUT_L 34
D_HPOUT_R 34
D_HP_PLUG# 33
D_DVI_DET 17
D_DVI_SDATA 17
D_DVI_SCLK 17
D_CRT_VSYNC 18
D_CRT_HSYNC 18
D_CRT_CLK 18
D_CRT_DATA 18
+5VS
JAE_SP07-10207-22
CONN@
Issued Date
Security Classification
2008/04/16
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CABLE DOCK
Rev
1.0
JALB0 LA-4171P
Date:
Sheet
38
of
50
PD11
2
1
DOCK_B+
PDS1040-13_POWERDI5-3
SP02000EF00
3
1
@ PC158
@PC158
470P_0402_50V7K
PJP1
2
PR8
10K_0402_5%
1
2
PC6
1000P_0402_50V7K
RTCVREF
Vin Dectector
Min.
H-->L 16.976V
L-->H 17.430V
PBJ1
PD3
RLZ4.3B_LL34
RTC Battery
PR6
20K_0402_1%
1 1
1SS355TE-17_SOD323-2
LM358DT_SO8
PC5
0.1U_0603_25V7K
2
1
PD2
PR4
0_0402_5%
14,21,30,31,37,42
1
PR5
22K_0402_5%
1
2
ACIN
10K_0402_5%
2
E&T_4510-E04C-01R
1
PC4
100P_0402_50V8J
PR3
84.5K_0402_1%
PU1A
PC3
1000P_0402_50V7K
PC2
100P_0402_50V8J
VIN
PR2
10K_0402_5%
PC161
470P_0402_50V7K
PC1
1000P_0402_50V7K
VS
VIN
1
@
VIN
PJ1
DC_IN_S2
JUMP_43X79
PR7
1
PL1
SMB3025500YA_2P
1
DC_IN_S1
PC159
470P_0402_50V7K
G1
PR1
1M_0402_1%
1
2
G2
+RTCBATT
+RTCBATT
Typ
17.525V
17.901V
Max.
17.728V
18.384V
@ MAXEL_ML1220T10
SP093MX0000
PJ2
VIN
+3VALWP
PJ3
1
1
N1
VS
+VSBP
PC8
0.1U_0603_25V7K
2
1
GND
PC9
10U_0805_10V4Z
+VSB
+1.1VSP
+NB_COREP
+1.1VS
+1.2VALW
+2.5VSP
+2.5VS
@ JUMP_43X118
+NB_CORE
+1.5VSP
@ JUMP_43X118
+1.5VS
@ JUMP_43X118
PC10
1U_0805_25V4Z
Issued Date
Security Classification
2008/04/16
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
@ JUMP_43X118
N2
+0.9V
IN
PJ7
1
PJ10
G920AT24U_SOT89-3
OUT
@ JUMP_43X118
PU2
3.3V
PJ5
2
+0.9VP
PJ8
2
+1.2VALWP
2
PR13
22K_0402_1%
PR16
560_0603_5%
1
2
+1.8V
@ JUMP_43X79
PC7
0.22U_0603_25V7K
PR14
200_0603_5%
PR15
560_0603_5%
1
2
+5VALW
PJ6
RTCVREF
+CHGRTC
JUMP_43X118
51ON#
470P_0402_50V7K
2
@ JUMP_43X39
PR12
100K_0402_1%
31,32
PR10
68_1206_5%
2
PR11
200_0603_5%
1
2
PR9
68_1206_5%
CHGRTCP
PQ1
TP0610K-T1-E3_SOT23-3
PD5
RLS4148_LL34-2
PJ4
2
+5VALWP
@ JUMP_43X118
PC165
BATT+
+1.8VP
+3VALW
JUMP_43X118
Rev
1.0
JALB0
Friday, April 18, 2008
Sheet
D
39
of
50
PR17
100K_0402_1%
1
PR19
18K_0402_1%
1
2
PC13
0.01U_0402_25V7K
TM_REF1
RLS4148_LL34-2
3
1
VL
PR23
100K_0402_1%
PR25
100K_0402_1%
PR26
1K_0402_1%
1
2
PC15
1000P_0402_50V7K
1
2
+3VALWP
PR22
11.3K_0402_1%
PR24
6.49K_0402_1%
2
1
PC14
0.22U_0603_16V7K
PR21
100_0402_1%
1
PR20
100_0402_1%
PD6
2
LM393DG_SO8
PQ2
DTC115EUA_SC70-3
PU3A
PC12
1000P_0402_50V7K
MAINPWON 6,41
PR18
100K_0402_1%
1
2
PC11
0.1U_0603_25V7K
PH1
100K_0603_1%_TH11-4H104FT
BATT+
EC_SMCA
EC_SMDA
PL2
SMB3025500YA_2P
1
2
1
2
3
4
5
6
7
SUYIN_200275MR007G161ZL
@
PJP2
VMB
BATT_TEMP 30
EC_SMB_CK1 6,14,30
EC_SMB_DA1 6,14,30
VL
PR27
@ 100K_0402_1%
PR28
@ 100K_0402_1%
1
2
PQ3
TP0610K-T1-E3_SOT23-3
PH2
@ 100K_0603_1%_TH11-4H104FT
8
-
PD7
PU3B
O
@
PR32
11.3K_0402_1%
1
3
@ RLS4148_LL34-2
LM393DG_SO8
PC18
@ 0.22U_0603_16V7K
TM_REF1
1
1
1
2
2
2
@PR30
@
PR30
18K_0402_1%
1
2
VL
PC16
0.22U_0603_25V7K
PR31
22K_0402_1%
1
2
2
1
PR29
100K_0402_1%
VL
+VSBP
1
PC17
0.1U_0603_25V7K
B+
VL
PR34
0_0402_5%
2
POK
PQ4
SSM3K7002F_SC59-3
2
G
41,43
PC19
0.1U_0402_16V7K
PR33
100K_0402_1%
Issued Date
Security Classification
2008/04/16
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0
Sheet
40
of
50
ISL6237_B+
PHASE2
PC32
PHASE1
16
0.1U_0603_25V7K
LX5
LGATE1
18
DL5
DL3
23
FB3
VL
LGATE2
30
OUT2
32
REFIN2
PGND
22
OUT1
10
FB1
11
BYP
SKIP
29
2VREF_ISL6237
1
1
+ PC35
C
150U_D2E_6.3VM_R18
25
PQ8
AO4712_SO8
PR41
61.9K_0402_1%
2
PR39
0_0603_5%
LX3
PC25
2200P_0402_50V7K
2
1
3
2
1
BST5A 2
@ PR37
4.7_1206_5%
2
1
17
5
6
7
8
VCC
LDO
6
VIN
DH5
BOOT1
2
PR43
10K_0402_1%
1
2
PR42
10K_0402_1%
BOOT2
19
15
PC31
0.1U_0603_25V7K
24
PVCC
UGATE1
3
2
1
PR38
1 BST3A
0_0603_5%
UGATE2
PL3
2
1
8.2UH_PCMB063T-8R2MS_4.5A_20%
PC29
1U_0603_10V6K
1
2
TP
26
+5VALWP
8
7
6
5
PQ7
AO4712_SO8
33
PQ6
AO4466_SO8
4
PC34
680P_0603_50V7K
2
1
DH3
1
2
3
PC33
680P_0603_50V7K
2
1
2
1
PR40
0_0402_5%
+3VALWP
PU4
@ PR36
4.7_1206_5%
2
1
PL4
1
2
8.2UH_PCMB063T-8R2MS_4.5A_20%
4.7U_0805_6.3V6K
PC28
2
1
1U_0603_10V6K
PC27
1
2
PC26
0.1U_0603_25V7K
PQ5
AO4466_SO8
4
PC24
4.7U_1206_25V6K
2
1
5
6
7
8
8
7
6
5
VL
1
2
3
PC166
470P_0402_50V7K
PC22
2200P_0402_50V7K
2
1
@ JUMP_43X118
PC21
4.7U_1206_25V6K
2
1
PC20
4.7U_1206_25V6K
2
1
PC23
4.7U_1206_25V6K
2
1
PR35
0_0805_5%
1
2
PJ12
PC30
330U_D3L_6.3VM_R25M
ISL6237_B+
B+
FB5
REF
PC36 0.22U_0603_10V7K
LDOREFIN
@ PR44
2
PR45
1
20
28
EN_LDO
POK1
13
EN1
ILIM1
12
POK
40,43
PR48
ILM1
330K_0402_1%
1
GND
21
TON
ILIM2
31
ILIM2
1
330K_0402_1%
ISL6237IRZ-T_QFN32_5X5
NC
5
EN2
PR53
0_0402_5%
2VREF_ISL6237 2
1
1
2
2VREF_ISL6237 1
2
1
3
PC38
0.047U_0402_16V7K
@ PR55
47K_0402_5%
1
2
PR51
0_0402_5%
@ PR50
0_0402_5%
1
2
PR52
806K_0603_1%
PR54
0_0402_5%
2
1
MAINPWON
POK2
PC163
1U_0603_6.3V6M
2
1
27
VL
6,40
NC
VL
PR49
PD12
1SS355_SOD323-2
14
PC39
0.047U_0402_16V7K
2
1
PC37
0.22U_0603_25V7K
PR46
100K_0402_1%
1
2
PR47
200K_0402_5%
1
2
PD8
RLZ5.1B_LL34
1
2
VS
0_0402_5%
1
0_0402_5%
2
PQ38
TP0610K-T1-E3_SOT23-3
Security Classification
2008/04/16
Issued Date
Deciphered Date
2009/04/16
Title
+5V/+3V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Friday, April 18, 2008
Date:
Rev
1.0
JALB0
Sheet
1
41
of
50
25
LX_CHG
PD10
2
ACSET
OVPSET
Fsw : 300KHz
OVPSET
AGND
21
CELLS
20
CELLS
PR73
15
PR76
10_0603_5%
1
2
PR74
100K_0402_1%
2
1
1
3
PQ16
SSM3K7002F_SC59-3
@
24751_VREF
PR83
100K_0402_1%
CHGEN#
D
PQ18
SSM3K7002F_SC59-3
2
G
30 FSTCHG
PQ19
RHU002N06_SOT323-3
2
G
PR85
221K_0402_1%
VADJ
PQ17
SI2301BDS-T1-E3_SOT23-3
2
1
PR82
1
2
0_0402_5%
2
1
PR189
4.3K_0402_5%
PR84
100K_0402_1%
30 Calibrate#
24751_VREF
REGN
1
PR80
PR85
4.0V
4.1V
887K
221K
4.2V
887K
221K
Charger ADJ
CP setting
Calibrate#
Security Classification
Issued Date
2008/04/16
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
14,21,30,31,37,39
PR80
887K_0402_1%
1
PR66
100K_0402_1%
2
G
ADP_I
@PR188
@
PR188
0_0402_5%
1
2
ACGOOD#
30
LM358DT_SO8
@
PR75
100K_0402_1%
PC64
@0.01U_0402_25V7K
ACIN
PC67
0.01U_0402_25V7K
2
1
PR81
105K_0402_1%
1
7
24751_VREF
30
VMB
2
1
2
1
PR78
PR77
499K_0402_1% 340K_0402_1%
VS
PC66
0.01U_0402_25V7K
1
3
PU1B
IREF
IADAPT
2
1
17.4K_0402_1%
1
SRSET
16
SRSET
BATDRV
PQ39
SSM3K7002F_SC59-3
PQ40
SSM3K7002F_SC59-3
PR79
10K_0402_1%
1
2
CC=0.2~4.26A
Iref=0.77448*Icharge
Iref=0.155~3.3V
ICHG setting
ACGOOD
PR196
200K_0402_1%
2
1
1
PC60
@0.1U_0603_25V7K
PC63
0.1U_0603_25V7K
PC65
100P_0402_50V8J
PC59
0.1U_0603_25V7K
1
29
PQ14_GATE
1
1 2
TP
17
BATT_OVP
SE_CHG-
BAT
BQ24751ARHDR_QFN28_5X5
2
G
30
30
SE_CHG+
VADJ
14
BATT-OVP=0.111*BATT+
19
18
/BATDRV
LI-4S :18V----BATT-OVP=1.998V
SRP
SRN
2
G
PR195
340K_0402_1%
2
1
0.1U_0402_16V7K
PC168
ACOFF 1
2
12
24751_VREF
PR194
100K_0402_1%
2
1
PQ37
SSM3K7002F_SC59-3
2
65W/90W#
G
VADJ
13
1
24751_VREF
PR183
100K_0402_1%
VDAC
ACGOOD#
PR72
100K_0402_1%
ACSET
11
ACSET
RTCVREF
LI-3S :13.5V----BATT-OVP=1.5V
VREF
PQ14
SI2301BDS-T1-E3_SOT23-3
PC62
0.1U_0603_25V7K
Cells selector
24751_VREF 10
30
PR63
64.9K_0402_1%
1
2
ACOFF
2
3S/4S#
G PQ15
SSM3K7002F_SC59-3
2
1
2
3
2
1
LEARN
PC58
0.1U_0402_16V7K
1
2
3
PQ14_GATE
1
3
PC61
1U_0603_10V6K
PR71
100K_0402_1%
30
22
1
2
@PR70
@
PR70 0_0402_5%
CELLS
PGND
24751_VREF
24751_VREF
23
PR68
54.9K_0402_1%
4 Cell
3 Cell
VREF
GND
PR69
100K_0402_1%
DL_CHG
LODRV
24751_VREF
CELLS
PQ13
AO4466_SO8
2
7 ACOP
PC57
0.47U_0603_16V7K
PR65
4.7_1206_5%
PC55
1U_0603_10V6K
PR67
340K_0402_1%
BATT+
2
1
65W adapter
Iadapter=(Vacset/Vvdac)*(0.1/PR48)=2.90A
24
REGN
Iadapter=(Vacset/Vvdac)*(0.1/PR48)=4.04A
PR62
PL5
0.02_2512_1%
10UH_PCMB104T-100MS_6A_20%
1
2
1
4
PC51
RLS4148_LL34-2
0.1U_0603_25V7K
REGN
ACSET
3
2
1
PH
ACDRV
ACDET
4
5
PC53
10U_1206_25V6M
ACDRV
5
6
7
8
DH_CHG
26
HIDRV
PQ12
AO4407_SO8
PC52
10U_1206_25V6M
ACN
ACP
/BATDRV
2
3
PR57
100K_0402_1%
PQ11
AO4466_SO8
3
2
1
ACN
ACP
PC40
0.01U_0402_25V7K
PR61
2.2_0603_5%
1
2
BTST
PC45
2200P_0402_25V7K
27
BTST
PC43
4.7U_1206_25V6K
2
PC48
0.1U_0603_25V7K
1
2
PVCC
5
6
7
8
28
2
PR64
54.9K_0402_1%
90W adapter
CHG_B+
PC56
680P_0603_50V8J
CHGEN
PC49
@0.1U_0603_25V7K
ACDET
Icharge=(Vsrset/Vvdac)*(0.1/PR36)
PVCC
PU5
1
1
2
PC47
0.1U_0603_25V7K
JUMP_43X118
PC42
4.7U_1206_25V6K
5
6
7
8
PR60
340K_0402_1%
PC50
2.2U_0805_25V6K
@PD9
@
PD9
RLZ24B_LL34
PJ13
1
PC46
0.1U_0402_16V7K
1
2
1 2
PR182
3.3_1210_5%
PR56
0.015_2512_1%
8
7
6
5
PR59
100K_0402_1%
2
1
1 2
PC41
0.01U_0603_50V7K
PC44
0.01U_0402_25V7K
2
1
1
2
3
CHGEN#
PR58
3.3_1210_5%
1
1
2
3
B+
PQ10
AO4407_SO8
8
7
6
5
PQ9
AO4407_SO8
VIN
CHARGER
Document Number
Rev
1.0
JALB0
Sheet
42
of
50
1.1V
PL6
PC69
1U_0402_6.3V6K
PR89
2.2_0603_1%
+5VALW
2.2_0603_1%
2 PR92
1
2
2 PR93
ISL6228_B+
2
2
1
PR95
18.2K_0402_1%
FB2
27
VIN2
VIN1
VO1
FSET2
28
VCC2
PGOOD2
VCC1
FB1
FSET1
29
PGOOD1
GND_T
PR99
1
2
PC75
1000P_0402_50V7K
FB1_NB_COREP
1
PR98
86.6K_0402_1%
10_0603_1%
PR94
22K_0402_1%
PR97
102K_0402_1%
1
PC74
1000P_0402_50V7K
PR96
3.3K_0402_5%
2
ISL6228_B+
PC71
0.1U_0603_25V7K
10_0603_1%
PC76
1000P_0402_25V8J
2
1
1
FBMA-L11-322513-151LMA50T_1210
ISL6228_B+
1
PC72
@ 0.1U_0402_16V7K
PC70
0.1U_0603_25V7K
PQ20
@ SSM3K7002F_SC59-3
PC73
0.01U_0402_25V7K
2
G
11 POWER_SEL
PQ21
@ SSM3K7002F_SC59-3
1
2
2
PR91
G
@ 0_0402_5%
PR90
@ 0_0402_5%
1
2
2
PR88
2
+5VALW
PC164
470P_0402_50V7K
2
1
PR87
@ 10K_0402_1%
PR86
12K_0402_1%
B+
PC162
470P_0402_50V7K
2
1
LOW
PC68
1U_0402_6.3V6K
+5VALW
2
1.0V
FB1_NB_COREP
HIGH
POWER_SEL
PR100
66.5K_0402_1%
PR101
PC77
3.3K_0402_5% 1000P_0402_25V8J
2
1
1
2
7.87K_0402_1%
ISL6228_B+
PR102
PR104
7.87K_0402_1%
PC79
4.7U_1206_25V6K
8
7
6
5
OCSET1
VO2
26
NB_COREP_EN
11
EN1
PU6
OCSET2
25
ISL6228_B+
ISL6228HRTZ-T_QFN28_4X4
13
UGATE1
PHASE2
23
1
1
1
1
2
PL8
1.8U_D104C-919AS-1R8N_9.5A_30%
PR110
4.7_1206_5%
PC87
330U_D2E_2.5VM
2
2
0_0603_5%
PQ25
AO4712_SO8
0.1U_0402_16V7K
PC92
1U_0402_6.3V6K
+
2
PC88
680P_0603_50V8J
BST_1.2V
1
PC89
1
2
+1.2VALWP
1
3
2
1
+5VALW
LG_NB_COREP
LG_1.2V
STB_SB
40,41
POK
PR113
@ 0_0402_5%
1
2
2
1.2V_EN
PR114
0_0402_5%
1
2
PC91
1U_0402_6.3V6K
+5VALW
NB_COREP_EN
PR107
8.06K_0402_1%
1
5
6
7
8
BOOT2
21
PVCC2
20
19
PGND2
LX_1.2V
PR112
PC90
0.1U_0402_10V7K
32,37,44 VLDT_EN
PR111
47K_0402_1%
2
1
UG_1.2V
22
PQ23
AO4466_SO8
3
2
1
UGATE2
LGATE2
BOOT1
18
1BST_NB_COREP14
PR108
0_0603_5%
PGND1
1 2
17
PC86
0.1U_0402_16V7K
15
PR109
0_0603_5%
1
2
LGATE1
1
2
3
S
S
S
1
2
UG_NB_COREP
8
7
6
5
2
PC85
680P_0603_50V8J
PQ24
FDS6670AS_NL_SO8
16
PR106
4.7_1206_5%
PVCC1
D
D
D
D
1
PC83
330U_D2E_2.5VM
PC82
0.022U_0402_16V7K
1
EN2
1.2V_EN
PC84
4.7U_1206_25V6K
PHASE1
24
12
PC81
4.7U_1206_25V6K
LX_NB_COREP
5
6
7
8
1UH_MSCDRI-104R-1R0N-F_11A_30%
8.06K_0402_1%
+NB_COREP
PR103
10
1
2
3
PL7
1
68.1K_0402_1%
PR105
0_0603_5%
+1.1V
FB2_1.2V
PQ22
AO4466_SO8
PC78
4.7U_1206_25V6K
2
1
PC80
0.022U_0402_16V7K
1
2
Freq=366KHz
Rfset=1/(1.5E-10 * Freq)=18.2K
@
PC93
0.01U_0402_25V7K
Freq=303KHz
Rfset=1/(1.5E-10 * Freq)=22K
Issued Date
Security Classification
2008/04/16
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
NB_COREP / 1.2VSB
Document Number
Rev
1.0
JALB0
Sheet
43
of
50
PJ14
PR115
200K_0402_5%
1
2
15
11
V5DRV
10
DL_1.8V
1
2
TPS51117RGYR_QFN14_3.5x3.5
S
S
S
PR119
24K_0402_1%
PGND
8
GND
DRVL
PQ27
FDS6670AS_NL_SO8
4 G
PC100
4.7U_0805_10V6K
+1.8VP
1
2
1
+
PC98
330U_D2E_2.5VM
@
PC160
680P_0603_50V8J
PC101
1U_0603_10V6K
PGOOD
@
PR190
4.7_1206_5%
+5VALW
@PC99
@
PC99
47P_0402_50V8J
1
2
B+
3
2
1
14
12
VFB
LX_1.8V
LL
TRIP
0.1U_0603_25V7K
DH_1.8V
V5FILT
13
VOUT
DRVH
5
6
7
8
+5VALW
PL9
1UH_MSCDRI-104R-1R0N-F_11A_30%
1
2
PC96
BST_1.8V-1 1
D
D
D
D
TON
VBST
6
PR118
0_0603_1%
1
2
@ JUMP_43X118
3
2
1
PC97
@0.1U_0402_16V7K
PR117
0_0603_1%
1
2
PR187
47K_0402_5%
TP
1
EN_PSV
PU7
1
29,30,37 SYSON
BST_1.8V
PR116
0_0402_5%
1
2
2
PC95
4.7U_1206_25V6K
PQ26
AO4466_SO8
5
6
7
8
PC94
4.7U_1206_25V6K
51117_B+
PR120
14K_0402_1%
1
2
PR121
10K_0402_1%
VFB=0.75V
Vo=VFB*(1+PR120/PR121)=1.8V
Ton=19E-12*Ron*(((2/3)*Vo+100mV)/Vin)+50ns=3.1E-07
Freq=305KHz
Cesr=15m ohm
Ipeak=12.6A Imax=8.82A
Delta I=((19-1.8)*(1.8/19))/(L*Freq)=5.332A
Vtrip=Rtrip*10uA=0.24V
Iocp-min=Vtrip/Rdsonmax*1.4+2.666=17.573A
Iocp-max=Vtrip/Rdsontyp*1.2+2.666=26.908A
Iocp=17.573~26.908A
+5VALW
1
2
1
2
6
FB
VIN
+1.1VSP
PR123
1.15K_0402_1%
VOUT
APL5912-KAC-TRL_SO8
PC104
0.01U_0402_25V7K
22U_0805_6.3V6M
VOUT
PC105
2
1
EN
PC103
4.7U_0805_6.3V6K
@ PC106
@PC106
1U_0603_10V6K
@
PR186
47K_0402_5%
VIN
VLDT_EN
32,37,43 VLDT_EN
0_0402_5%
1
2
VCNTL
POK
GND
7
PR122
PU8
PC102
1U_0402_6.3V6K
PJ15
JUMP_43X79
@
+1.2VALW
PR124
3K_0402_1%
A
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
1.8VSP/+1.1VSP
Document Number
Rev
1.0
Sheet
1
44
of
50
+3VS
PJ16
@ JUMP_43X79
D
PC107
1U_0402_6.3V6K
+5VALW
FB
VIN
+2.5VSP
PC109
0.01U_0402_25V7K
PR126
2.15K_0402_1%
APL5915KAI-TRL_SO8
@
PR185
47K_0402_5%
VOUT
PC108
4.7U_0805_6.3V6K
PC111
0.1U_0402_16V7K
EN
GND
8
1
+3VS
5
4
PR125
10K_0402_1%
1
2
VIN
VOUT
PC110
22U_0805_6.3V6M
POK
VCNTL
PU9
7
PR127
1K_0402_1%
+1.8V
+1.8V
PJ17
@ JUMP_43X79
NC
VREF
NC
VOUT
NC
TP
+3VALW
VCNTL
GND
2
2
VIN
PC114
1U_0402_6.3V6K
B
2
PQ28
SSM3K7002F_SC59-3
@
1
2
1
S
+0.9VP
PC118
@ 0.1U_0402_16V7K
PR129
1K_0402_1%
PC116
0.1U_0402_16V7K
1
PC117
0.01U_0402_25V7K
APL5915KAI-TRL_SO8
PR132
1.54K_0402_1%
2
G
VIN
28,29,37,38 SYSON#
FB
@
PR131
0_0402_5%
1
2
+1.5VSP
3
1
VOUT
VOUT
APL5331KAC-TRL_SO8
1
GND
EN
PR128
1K_0402_1%
PC115
4.7U_0805_6.3V6K
PC121
0.1U_0402_16V7K
@
PR184
47K_0402_5%
8
1
29,30,32,37 SUSP#
10K_0402_1%
1
2
PC119
22U_0805_6.3V6M
POK
VIN
7
PR130
PU11
VCNTL
PU10
PC113
4.7U_0805_6.3V6K
PC112
1U_0402_6.3V6K
PJ18
@ JUMP_43X79
+5VALW
PC120
10U_0805_6.3V6M
PR133
1.74K_0402_1%
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
0.9VP//1.5VSP/2.5VSP
Document Number
Rev
1.0
JALB0
Sheet
45
of
50
PR139
2_0603_5%
PR140
10_0402_5%
1
2
+CPU_CORE_NB
PC155
2200P_0402_50V7K
2
1
PC152
0.01U_0402_25V7K
2
1
PQ34
SI7686DP-T1-E3_SO8
UGATE1
PC146
1000P_0402_50V7K
COMP1
PC148
180P_0402_50V8J
1 2
3
2
1
PR177
2
PC150
2
1
PR178
6.81K_0402_1%
2
1
PR179
1K_0402_5%
2
1
54.9K_0402_1% 1200P_0402_50V7K
PC142
680P_0603_50V7K
PR180
ISN0
PC143
2
1
+CPU_CORE_1
Design Current: 12.6A
Max current: 18A
OCP_min:24A
PC149
1000P_0402_50V7K
PR181
6.81K_0402_1%
2
1
PC151
2
1
1 PR170 2
4.02K_0402_1%
0.1U_0402_16V7K
@PH4
@
PH4
2
1 2 PR173 1
10_0402_5%
@
10K_0603_5%_TSM1A103J4302RE
PR176
1K_0402_5%
2
1
PR169
4.7_1206_5%
PQ36
AO4456_SO8
VW1
PR175
PC147
255_0402_1% 4700P_0402_25V7K
FB_1
2
1 2
1
PR168
16.2K_0402_1%
PQ35
AO4456_SO8
4
2 PR172 1
10_0402_5%
+CPU_CORE_1
2
5
6
7
8
PC141
0.22U_0603_10V7K
DIFF_1
PC156
2200P_0402_50V7K
2
1
3
2
1
PL13
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2
2
5
6
7
8
PR163
0_0603_5%
BOOT1 1
2 1
RTN1
ISN1
ISP1
PC145
180P_0402_50V8J
+CPU_CORE_0
Design Current: 12.6A
Max current: 18A
OCP_min:24A
PHASE1
LGATE1
COMP0
PC153
0.01U_0402_25V7K
2
1
2
5
TP
CPU_B+
VSEN1
VW0
PR174
PC144
255_0402_1% 4700P_0402_25V7K
FB_0
2
1 2
1
PC134
10U_1206_25V6M
2
1
2
3
2
1
LGATE0
49
24
ISN1
VW1
ISP1
23
22
ISP1
FB1
21
20
19
ISN1
BOOT1
COMP1
UGATE1
25
VDIFF1
26
BOOT1
VSEN1
UGATE1
VW0
RTN1
COMP0
PC138
1U_0603_16V6K
PC137
2
1
ISP0
PHASE1
1 PR155 2
4.02K_0402_1%
0.1U_0402_16V7K
@PH3
@
PH3
2
1 2 PR159 1
10_0402_5%
@
10K_0603_5%_TSM1A103J4302RE
PC157
2200P_0402_50V7K
2
1
28
PC136
680P_0603_50V7K
PC154
0.01U_0402_25V7K
2
1
29
PGND1
PC139
10U_1206_25V6M
2
1
LGATE1
LGATE1
12
18
3
2
1
LGATE0
11
17
PQ33
AO4456_SO8
4
3
2
1
30
1
31
PVCC
PQ32
AO4456_SO8
4
+5VS
LGATE0
PHASE0
32
+CPU_CORE_0
PR151
16.2K_0402_1%
PR154
4.7_1206_5%
1 2
33
PGND0
PC135
0.22U_0603_10V7K
PC140
10U_1206_25V6M
2
1
PHASE0
PL12
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2
2
5
6
7
8
UGATE0
PR150
0_0603_5%
BOOT0 1
2 1
5
6
7
8
BOOT0
PHASE1
RTN0
PC133
10U_1206_25V6M
2
1
PQ31
SI7686DP-T1-E3_SO8
UGATE0
37
UGATE_NB
39
38
41
43
42
44
46
45
47
40
LGATE_NB
PHASE_NB
35
34
FB0
+CPU_CORE_1
DIFF_0
BOOT0
UGATE0
BOOT_NB
27
PR171
0_0402_5%
2
1
6 CPU_VDD1_FB_H
CPU_VDDNB_FB_L 6
3
2
1
6 CPU_VDD1_FB_L
BOOT_NB
1
2
PR167
10_0402_5%
6 CPU_VDD0_FB_L
36
10
13
6 CPU_VDD0_FB_H
PC130
220U_D2_4VM
PHASE0
ISL6265IRZ-T_QFN48_6X6~D
ISP0
ISN0
PR160
0_0402_5%
VSEN0
2
1
PR161
+CPU_CORE_0 2
1
10_0402_5%
2 PR164 1 RTN0
0_0402_5%
2 PR165 1
0_0402_5%
PGND_NB
VDIFF0
OCSET_NB
OCSET
RTN_NB
FSET_NB
RBIAS
VSEN_NB
ENABLE
FB_NB
COMP_NB
SVC
VSEN0
PR158
1
82.5K_0402_1%
SVD
16
ISP0
PR157
2
1
34.8K_0402_1%
PWROK
15
VR_ON
VCC
48
VIN
1
0_0402_5%
PGOOD
PR166
10_0402_5%
1
2
30
2
PR156
CPU_SVC
1
0_0402_5%
OFS/VFIXEN
ISN0
2
PR152
CPU_SVD
14
+
PC131
680P_0603_50V7K
CPU_B+
PR148
10_0402_5%
PU12
PR153 0_0402_5%
1
2
1
2
PR192 0_0402_5% @
19 H_PWRGD_L
1
PR145
0_0402_5%
VGATE
+VDDNB
Design Current: 2.1A
Max current: 3A
OCP_min:5A
UGATE_NB
2
30
PQ30
AO4712_SO8
LGATE_NB
PR149
@ 105K_0402_1%
+CPU_CORE_NB
PHASE_NB
1
2
PR147
105K_0402_1%
PR138
4.7_1206_5%
PC129
0.22U_0603_10V7K
4
2
PR146
@ 10K_0402_1%
PL11
3.3UH_SIQB74B-3R3PF_5.9A_20%
1
2
+
2
PHASE_NB
PR144
@ 105K_0402_1%
LGATE_NB
CPU_VDDNB_FB_H
PR142
11.3K_0402_1%
2
1
PC132
0.1U_0603_16V7K
1
PR143
0_0402_5%
PR136
0_0603_5%
BOOT_NB 1
2 1
+3VS
+5VS
PHASE_NB
PR141
0_0402_5%
2
1
PQ29
AO4466_SO8
B+
1
3
2
1
UGATE_NB
1 2
PR137
22K_0402_1%
2
1
PC128
0.1U_0603_16V7K
CPU_B+
PC123
1200P_0402_50V7K
PC127
1000P_0402_50V7K
2
1
1
+5VS
PL10
HCB4532KF-800T90_1812
1
2
PR134
44.2K_0402_1%
PR135
2_0603_5%
1
2
5
6
7
8
3
2
1
5
6
7
8
PC124
10U_1206_25V6M
2
1
CPU_B+
PC122
33P_0402_50V8K
2
1
PC125
220U_25V_M
54.9K_0402_1% 1200P_0402_50V7K
2008/04/16
Issued Date
Security Classification
2009/04/16
Deciphered Date
Title
+CPU_CORE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Friday, April 18, 2008
Date:
Rev
1.0
JALB0
Sheet
1
46
of
50
NO DATE
PAGE
MODIFICATION LIST
PURPOSE
------------------------------------------------------------------------------------------------------------7/9
DCIN
link to SM010008E10
7/9
DCIN
link to SP093MX0000
7/9
Battery conn
link to SM010008E10
7/9
Battery conn
7/9
Battery conn
Design change
7/9
Charger
Delete
7/9
Charger
7/9
Charger
Design change
7/9
Charger
7/9
3V/5V
7/9
3V/5V
7/9
1.8V/1.5V
7/9
1.8V/1.5V
Design change
7/9
1.05V/1.25V/0.9V
7/9
1.05V/1.25V/0.9V
7/9
1.05V/1.25V/0.9V
Design change
7/9
1.05V/1.25V/0.9V
Decrease overshoot
7/9
CPU CORE
Design change
7/9
CPU CORE
Unpop PC111
7/10
Charger
7/10
Charger
7/10
Charger
7/10
3V/5V
7/10
Charger/0.9V
8/1
Charger
Security Classification
Issued Date
2008/04/16
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALC0 LA-4181P
Friday, April 18, 2008
Sheet
47
of
50
NO DATE
PAGE
MODIFICATION LIST
PURPOSE
-----------------------------------------------------------------------------------------------------------------------------------------------
12/11
p.11
DEL R26
12/11
P.15
12/11
P.17
12/11
P.18
ADD R525,R526,R527
12/11
P.20
Del R128
12/11
P.23
12/11
P.25
DEL U35,Q43,R473
12/11
P.27
ADD RP32,RP33,RP34,RP35,RP36
12/11
P.29
12/11
P.31
12/11
P.31
12/11
P.35
12/11
P.38
Del R291,R292
12/14
P.30
12/12
P.14
ADD D28 and pull high R529 to +3VS to AC_IN form JMXM1.157
12/12
P.17
12/12
P.18
12/12
P.33
12/12
P.30
Change Board ID
12/12
P.26
12/13
P.25
DEL U35,R473,Q43
12/13
P.7
DEL C762,C763
12/14
P.38
12/19
P.18
change CRT_DET to CRT_DET# from CRT to Q36 and output CRT_DET TO U10.J2
12/14
P.26
DEL U23,R305,C399,R28
12/14
P.6
12/14
P.12
Delete U6, R68, R65, Q6, R55, C119, C113, C128, C151,C124
12/14
P.12
12/14
P.14
12/14
P.16
12/14
P.17
12/14
P.22
12/14
P.34
12/14
P.37
12/14
P.32
12/19
P.25
12/17
P.28
12/17
P.19
Security Classification
Issued Date
2008/04/16
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Friday, April 18, 2008
Sheet
1
48
of
50
NO DATE
PAGE
MODIFICATION LIST
PURPOSE
-----------------------------------------------------------------------------------------------------------------------------------------------
12/17
P.26
12/17
P.38
ADD EC_DOCKIN#_S0
12/18
P.25
ADD R533
12/19
P.11
ADD Q54,R534 Level shift, and CPU_LDT_REQ#,ALLOW_LDTSTOP Pull high 300 to 1.8vs
12/19
P.20
USB_OC#4
12/19
P.6
ADD R129,R538,R539
12/19
P.21
12/19
P.34
12/19
P.37
12/19
P.6
POP R93
12/19
P.18
12/19
P.19
12/19
P.30
12/20
P.37
Reserve R541,R542,R543
12/20
P.33
12/20
P.31
12/20
P.37
ADD Q57,R544
12/20
P.34
12/21
P.21
12/24
P.21/P22.
12/24
P.34
12/24
P.21
12/24
P.34
12/24
P.29
12/24
P.26
12/26
P.34
12/26
P.35
1/22
P.15
1/22
P.37
1/22
P.37
1/31
P.6
1/31
P.11
1/31
P.14
1/31
P.15
Add C669
1/31
P.17
1/31
P.18
1/31
P.20
Security Classification
Issued Date
2008/04/16
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Friday, April 18, 2008
Sheet
1
49
of
50
NO DATE
PAGE
MODIFICATION LIST
PURPOSE
----------------------------------------------------------------------------------------------------------------------------------------------1/31
P.21
1/31
P.28
1/31
P.30
1/31
P.30
Del JP12
1/31
P.33
1/31
P.33
1/31
P.34
1/31
P.34
Add R553,R554,R555,R556
1/31
P.38
Add C672
2/4
P.25
2/4
P.31
2/4
P.34
2/12
P.6
2/12
P.30/31
2/13
P.28
ADD R563
2/14
P.6/20
3/12
R493=>61.9K (SD034619280)
R516=>1K (SD028100180)
R517=>4.7K (SD028470180)
R518=>1.8K (SD028180180)
C647=> 0.068u (SE026683K80)
3/12
P.33
3/12
P.12
3/12
P.7
3/12
P.37
3/17
P.11
3/26
P.6
Un-pop R351,C436,R360,R566,R568,Q31,Q30
3/26
P.19
3/26
P.34
4/16
P.8
4/16
P.19
4/16
P.28
4/16
P.30
4/16
P.31
4/16
P.32
4/16
P.32
4/16
P.37
Security Classification
2008/04/16
Issued Date
Deciphered Date
2009/04/16
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
1.0
JALB0 LA-4171P
Friday, April 18, 2008
Sheet
1
50
of
50