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Homework
Chapter 4, FET Transistors due Sep. 24
4.12,4.46,4.75,4.96 Quiz 1 Sep 28 (next Friday) Quiz 2
Oct 30 Project abstracts due October 9 (Tuesday following Monday schedule) 1 page long, your name, project title, a paragraph summary of problem you want to analyze
Sep. 21, 2007
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DC Analysis
Biasing Issues
VS VSS RS = ID 3 ( 5) RS = 0.4 RS = 5k
VGS=3V, VGS>VT
Biasing (PMOS)
Design ckt st. +9.9V at the source. Effective resistance ro ? (Note PMOS) VGS=0, VGD=-0.1V < |Vt| Triode region operation:
1 I D = 1( 0 ( 1) ) x0.1 x0.01 0.1mA 2
Output resistance
RD = 9.9V = 99k 100 k 0.1mA
VDS 0.1V = = 1k I D 0.1mA
rDS =
Amplifier Circuit
Find conductance
Output resistance
ro = VA 50 = = 47 k I D 1.06
Draw small signal equiv. RG very large > 10M, neglect Calculate gain: Input resistance:
vo g m v gs ( RD || RL || ro ) vo = g m ( RD || RL || ro ) = 3.3 vi
i1 = (vi vo ) / RG i1 = vi [1 (3.3)] = 4.3 vi RG RG
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EE 359 Electronic Circuits Internal and external capacitances High-frequency equivalent circuit model for the MOSFET (a)
Frequency response
High-frequency equivalent circuit model for the MOSFET when Source is connected to Body (b)
Sep. 21, 2007
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g m = nCox
C gs
C gd = WL ov Cox
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Freq. Response CS
AM = ? BW=?
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(b) the circuit of (a) simplified at the input and the output;
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Equivalent circuit
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Pspice Simulation
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Frequency Respons
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