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VIEN TRUONG 455 s. Mesa Dr, #105 Mesa, AZ 85210 (M) 480-374-0280 vt1263244@westpost.

net OBJECTIVE Seeking CMOS Mask Design Layout position to utilize my education. EDUCATION Broome Community College, Binghamton, N.Y. A.A.S Chemical Technology. May 1996. GPA: 3.7/4.0. Digital and Analog CMOS Mask Design Certification. 06/2006. SKILL * Proficient in L-edit software; Digital and analog CMOS layout. * Simplify complex gates in Digital circuits. * Read circuit schematics, strictly follow Design Rules; DRC, LVS. * Matching Resistors, Capacitors, Transistors. * Guard rings, ESD structures in Analog circuits. EXPERIENCE SUMIKA ELECTRONIC MATERIALS, Phoenix, AZ - 10/2006-Present. Characteristic Technician. - Mask layout for Diodes, Bipolar Transistors for GaAs wafers - Lab works: Fabricate and Testing these devices on GaAs wafers. - Monitor the process on SPC. FREESCALE SEMICONDUCTOR., Chandler, AZ. 02/2000---12/2006 Chemical-Mechanical Polish Operator. -Operate Tungsten Polisher, Oxide Polisher, Trench Polisher, Tin Scrubber, F SI for Test wafers. -Perform changing pads on Tungsten Polisher, Oxide Polisher daily. -Perform daily qualification on these tools. -Set up and modify new recipes for Oxide Polisher Tool. PERSONAL Diligent worker U.S citizen. Reference upon request.

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