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Code: R5210505

R05

II B.Tech I Semester (R05) Supplementary May 2012 Examinations COMPUTER ORGANIZATION


(Common to Computer Science & Engineering, Information Technology and Computer Science & Systems Engineering)

Time: 3 hours Answer any FIVE questions All questions carry equal marks *****
1. (a)

Max. Marks: 80

(b) 2. (a) (b)

What do you understand by computer architecture? Write the major functional units in a general purpose digital computer system with the help of a functional diagram. Explain its functional operations starting from power on. Discuss the advantages of a floating point representation over fixed point representation. What is an instruction cycle (IC)? Explain the steps involved in IC. Draw and explain the hardware that implements the following register transfer statements.

3.

(a) (b)

Draw and explain the micro program sequencer for a control memory. With the help of block diagram, explain the hardwired control unit organizations. Show the step by step multiplication process using Booth algorithm when the following numbers are multiplied. Assume 5 bit registers that hold signed numbers. The multiplicand in both cases is +15. (i) (+15) X (+13) (ii) (+15) X (-13)

4.

5.

(a) (b)

Distinguish RAM and ROM memories. A virtual memory has a page size of 1 K words. There are eight pages and four blocks. The associative memory page table contains the following entries Page Block 0 3 1 1 4 2 6 0 Make a list of all virtual address (in decimal) that will cause a page fault is used by the CPU. Express the multiple bus organization with neat block diagram. What are the conflicts arise if two DMA controllers try to use the bus at the same time to access the main memory and explain the procedures to resolve these conflicts. Draw a space diagram for six-segment pipeline showing the time it takes to process eight tasks. Consider a computer with four floating point pipeline processors. Suppose that each processor uses a cycle time of 40 ns, how long will it take to perform 400 floating point operations? Is there a difference if the same 400 operations are carried out using single pipeline processor with a cycle time of ten nanoseconds? Describe the following terminology associated with multiprocessors. (i) Mutual exclusion. (ii) Critical section. (iii) Hardware lock. (iv) Semaphore.

6.

(a) (b)

7.

(a) (b)

8.

*****

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