HP Compaq Nx6125 Epw00la 2541

A
Compal confidential
EPW00 Schematics Document

Mobile AMD Athlon 64 with
ATI RS480M+ATI SB400
2005-04-15
REV:0.5
Compal Secret Data
Security Classification
2005/03/11
Issued Date
2006/03/11
Deciphered Date
Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
Size Document Number

Custom
Date:
Rev
0.4
LA-2541
Sheet
Friday, April 15, 2005

E
of
58
Compal confidential
File Name : LA-2541
Thermal Sensor
ADM1032
Memory BUS(DDR)
Mobile
AMD Athlon 64
page 4
DDR1 -333
DDR-SO-DIMM X2
BANK 0, 1, 2, 3 page 8,9,10
754-pin
Fan Control
Clock Generator
ICS 951418
Single Channel
page 4
page 4, 5, 6, 7
page 15
HT 16x16 1000MHZ
New Card
Connectorpage
1 x PCIE
LVDS Panel
Interface
page
USB conn X3
16
page 33
705 BGA
page 11, 12, 13, 14
CRT & TV OUT
25
ATI-RS480M
page 17
Finger print
page 30,39
2 x PCIE
BT Conn
page 33
USB2.0
ATI-SB400
IDSEL:AD18
(PIRQH#,GNT#1,REQ#1)
Mini PCI
socket
page 28
IDSEL:AD17
(PIRQG#,GNT#3,REQ#3)
LAN
BCM5788M
564 BGA
page 18,19,20,21
IDSEL:AD20
(PIRQE#/F#,GNT#2,REQ#2)
CardBus & 1394

Controller TI 7611
page 26
MO DEM
Audio CKT
AC-LINK
page 30
page 29
PCI BUS
3.3V 33 MHz
ATA-100
Primary IDE
ATA-100
Secondary IDE
LPC BUS
page 23,24
AMP & Audio Jack
HDD
Connectorpage
34
CDROM
Connectorpage
34
page 31
SPR Conn.
*RJ11 Conn
*RJ45 Conn
*Line IN Jack
*Line OUT Jack
*PS/2x2
*Parallel Port
*Serial Port
*CRT
*TV-OUT
*PCI Express
*USB x2
RTC CKT.
RJ45
CONN
page 18
Slot 0
Card
reader
page 24
page 23
page 27
13 94
CONN
BIOS
EC SMSC
LPC47N250
page 23
page 38
SUPER I/O
LPC47N217
page 36
page 37
Power OK CKT.
page 40
RJ11 CONN
page 33
A-Link Express
Touch Pad
CONN page
Int.KBD
page 38
33
page 39
Power On/Off CKT.

page 38
DC/DC Interface CKT.
page 41
Power Circuit DC/DC
Compal Secret Data
2005/03/01
Issued Date
page 40~47
2006/03/11
Deciphered Date
Title
Block Diagram
D

Custom
Date:
Rev
0.4
LA-2541
Sheet

E
of
58
Voltage Rails
Symbol note:
+5VS
:means digital ground.
+3VS
power
plane
+5V
State
+5VALW
+2.5V
+3VALW
+1.25V
+1.8VALW
+2.5VS
+1.8VS
+1.5VS
+2.5VDDA
+CPU_CORE
:means analog ground.

@ :means reserved(un-mount).
+1.2V_HT
+RS480_Core
4401@
:means populate for BCM4401 only.
5788@
:means populate for BCM5788M only.
7611@
:means populate for PCI7611 only.
4510@
:means populate for PCI4510 only.
S0
S1
S3
S5 S4/AC
S5 S4/AC don't exist
Only +3VL ON
O MEANS ON
X MEANS OFF
PCI Devices
1
INTERNAL
DEVICE
PIRQ
SMBUS
A
IDE
LPC I/F
PCI to PCI
EXTERNAL
AC97 AUDIO
AC97 MODEM
OHCI#1 USB
OHCI#1 USB
EHCI USB
SATA#1
SATA#2
IDSEL #
REQ/GNT #
CARD BUS & 1394
AD20
E, F
L AN
Mini-PCI
AD17
AD18
Jump
PJ1
PJ3
PJ4
PJ5
PJ6
PJ7
PJ8
PJ9
PJ11
PJ12
PJ14
J1
J2
J3
J4
J5
J6
J7
J8
J9
Normal operation
Comment
1
Short Pad
Short Pad
Short Pad
+3VALW
Short Pad
Short Pad
+1.8VALW
Short Pad
Short Pad
+5VALW
Short Pad
Short Pad
+1.5VS
Short Pad
Short Pad
+2.5V
Short Pad
Short Pad
+1.25V
Short Pad
Short Pad
+1.2V_HT
Short Pad
Short Pad
Short Pad
Short Pad
+3VL
Short Pad
Short Pad
Short Pad
No Short Pad
For ATE
Short Pad
No Short Pad
For ATE
No Short Pad
No Short Pad
No Short Pad
No Short Pad
No Short Pad
Short Pad
For ATE
No Short Pad
Short Pad
For ATE
No Short Pad
Short Pad
For ATE
Short Pad
No Short Pad
For ATE
No Short Pad
Short Pad
For ATE
+RS480_Core
Clear CMOS
Compal Secret Data
2005/03/01
Issued Date
KBC Internal ROM flash
Short Pad
Deciphered Date
2006/03/11
A
Title
Notes List
Custom
Date:
Rev
0.4
LA-2541
Sheet
of
58
H_CADIP[0..15]
H_CADIN[0..15]
<11> H_CADIP[0..15]
<11> H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADOP[0..15] <11>
H_CADON[0..15] <11>
U10A
Claw Hammer-DTR
<11>
<11>
<11>
<11>
+1.2V_HT
R3531
R3541
H_CLKIP1
H_CLKIN1
H_CLKIP0
H_CLKIN0
2 49.9_0402_1%
2 49.9_0402_1%
<11> H_CTLIP0
<11> H_CTLIN0
Y25
W25
Y27
Y28
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
J26
J27
J29
K29
H_CTLIP1
H_CTLIN1
H_CTLIP0
H_CTLIN0
R27
R26
T29
R29
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
N25
P25
P28
P27
H_CTLOP0
H_CTLON0
AJ27
LDTSTOP#
R347 44.2_0603_1%
LVREF1
1
L0_REF1
L0_REF0
LDTSTOP_L
+5VS
JP7
1
D21
4.7U_0805_10V4Z
1
2
C400
0.1U_0402_16V4Z
ACES_85205-0200
RB751V_SOD323
C399
FAN
1
2
5
6
+3VS
<38>
FAN_PWM
THERM#
D Q28
U28
G
INB
SI3456DV-T1_TSOP6
INA
TC7SH00FU_SSOP5
H_CLKOP1
H_CLKON1
H_CLKOP0
H_CLKON0
AF27
AE26
PWM Fan Control circuit
H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8
H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0
N26
N27
L25
M25
L26
L27
J25
K25
G25
H25
G26
G27
E25
F25
E26
E27
N29
P29
M28
M27
L29
M29
K28
K27
H28
H27
G29
H29
F28
F27
E29
F29
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
H_CLKIP1
H_CLKIN1
H_CLKIP0
H_CLKIN0
+1.2V_HT
1
R336
FOX_PZ75403-2941-42
H_CLKOP1
H_CLKON1
H_CLKOP0
H_CLKON0
<11>
<11>
<11>
<11>
H_CTLOP0 <11>
H_CTLON0 <11>
LDTSTOP# <13,18>
+2.5VS
2
1.2K_0402_5%
LVREF0
T25
R25
U27
U26
V25
U25
W27
W26
AA27
AA26
AB25
AA25
AC27
AC26
AD25
AC25
T27
T28
V29
U29
V27
V28
Y29
W29
AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28
H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0
HTT Interface
R350
44.2_0603_1%
Thermal Sensor
ADM1032
+3VS
W =15mil
2
C199
THERMDA_CPU
0.1U_0402_16V4Z
THERMDC_CPU
1
R124
THERMDC_CPU <6>
U11
1
VDD
THERMDA_CPU
D+
SDATA
THERMDC_CPU
2200P_0402_50V7K
THERM#
D-
ALERT#
THERM#
GND
10K_0402_5%
2
THERMDA_CPU <6>
C202
SCLK
SB_SCLK <8,9,15,19>
SB_SDAT <8,9,15,19>
THERM_SCI#
THERM_SCI# <19>
ADM1032AR_SOP8
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
Claw Harmmer CPU (Host Bus)
D

Custom
Date:
Rev
0.4
LA-2541
Sheet

E
of
58
+1.25VREF_CPU
+2.5V
U10B
<8> DDR_SDM[0..7]
<8> DDR_SDQS[0..7]
DDR_SDM7
DDR_SDM6
DDR_SDM5
DDR_SDM4
DDR_SDM3
DDR_SDM2
DDR_SDM1
DDR_SDM0
DDR_SDQS7
DDR_SDQS6
DDR_SDQS5
DDR_SDQS4
DDR_SDQS3
DDR_SDQS2
DDR_SDQS1
DDR_SDQS0
R1
A13
A7
C2
H1
AA1
AG1
AH7
AH13
T1
A14
A8
D1
J1
AB1
AJ2
AJ8
AJ13
MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0
MEMCKEA
MEMCKEB
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
AE8
AE7
DDR_CKE0
DDR_CKE1
D10
C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4
DDR_CLK7
DDR_CLK7#
DDR_CLK6
DDR_CLK6#
DDR_CLK5
DDR_CLK5#
DDR_CLK4
DDR_CLK4#
DDR_CKE0 <8>
DDR_CKE1 <9>
D8
C8
E8
E7
D6
E6
C4
E5
MEMRASA_L
MEMCASA_L
MEMWEA_L
H5
D4
G5
DDR_SRASA# <8>
DDR_SCASA# <8>
DDR_SWEA# <8>
MEMBANKA1
MEMBANKA0
K3
H3
DDR_SBSA1 <8>
DDR_SBSA0 <8>
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5
MEMRASB_L
MEMCASB_L
MEMWEB_L
H4
F5
F4
MEMBANKB1
MEMBANKB0
L5
J5
MEMADDB_B13
MEMADDB_B12
MEMADDB_B11
MEMADDB_B10
MEMADDB_B9
MEMADDB_B8
MEMADDB_B7
MEMADDB_B6
MEMADDB_B5
MEMADDB_B4
MEMADDB_B3
MEMADDB_B2
MEMADDB_B1
MEMADDB_B0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
DDR_CLK7
DDR_CLK6
DDR_CLK5
DDR_CLK4
R130
R129
R92
R83
1
1
1
1
2
2
2
2
120_0402_5%
120_0402_5%
120_0402_5%
120_0402_5%
DDR_CLK7#
DDR_CLK6#
DDR_CLK5#
DDR_CLK4#
within 1 .00"
MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3
DDR_CLK7 <8>
DDR_CLK7# <8>
DDR_CLK6 <9>
DDR_CLK6# <9>
DDR_CLK5 <8>
DDR_CLK5# <8>
DDR_CLK4 <9>
DDR_CLK4# <9>
DDR_SCS#3
DDR_SCS#2
DDR_SCS#1
DDR_SCS#0
DDR_SMAA13
DDR_SMAA12
DDR_SMAA11
DDR_SMAA10
DDR_SMAA9
DDR_SMAA8
DDR_SMAA7
DDR_SMAA6
DDR_SMAA5
DDR_SMAA4
DDR_SMAA3
DDR_SMAA2
DDR_SMAA1
DDR_SMAA0
DDR_SCS#3
DDR_SCS#2
DDR_SCS#1
DDR_SCS#0
<9>
<9>
<8>
<8>
+2.5V
2
MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0
R320
DDR_SMAA[0..13] <8>
1K_0402_1%
+1.25VREF_CPU
A16
B15
A12
B11
A17
A15
C13
A11
A10
B9
C7
A6
C11
A9
A5
B5
C5
A4
E2
E1
A3
B3
E3
F1
G2
G1
L3
L1
G3
J2
L2
M1
W1
W3
AC1
AC3
W2
Y1
AC2
AD1
AE1
AE3
AG3
AJ4
AE2
AF1
AH3
AJ3
AJ5
AJ6
AJ7
AH9
AG5
AH5
AJ9
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12
AJ14
AJ16
DDR_CLK5/5# & DDR_CLK7/7#

route to nearest DIMM
DDR_CLK4/4# & DDR_CLK6/6#
route to farthest DIMM
Claw Hammer-DTR
MEMZN
MEMZP
R326
C418
1K_0402_1%
2
C413
1000P_0402_50V7K
DDR_SDQ63
DDR_SDQ62
DDR_SDQ61
DDR_SDQ60
DDR_SDQ59
DDR_SDQ58
DDR_SDQ57
DDR_SDQ56
DDR_SDQ55
DDR_SDQ54
DDR_SDQ53
DDR_SDQ52
DDR_SDQ51
DDR_SDQ50
DDR_SDQ49
DDR_SDQ48
DDR_SDQ47
DDR_SDQ46
DDR_SDQ45
DDR_SDQ44
DDR_SDQ43
DDR_SDQ42
DDR_SDQ41
DDR_SDQ40
DDR_SDQ39
DDR_SDQ38
DDR_SDQ37
DDR_SDQ36
DDR_SDQ35
DDR_SDQ34
DDR_SDQ33
DDR_SDQ32
DDR_SDQ31
DDR_SDQ30
DDR_SDQ29
DDR_SDQ28
DDR_SDQ27
DDR_SDQ26
DDR_SDQ25
DDR_SDQ24
DDR_SDQ23
DDR_SDQ22
DDR_SDQ21
DDR_SDQ20
DDR_SDQ19
DDR_SDQ18
DDR_SDQ17
DDR_SDQ16
DDR_SDQ15
DDR_SDQ14
DDR_SDQ13
DDR_SDQ12
DDR_SDQ11
DDR_SDQ10
DDR_SDQ9
DDR_SDQ8
DDR_SDQ7
DDR_SDQ6
DDR_SDQ5
DDR_SDQ4
DDR_SDQ3
DDR_SDQ2
DDR_SDQ1
DDR_SDQ0
MEMVREF1
A CHANGEL ADDRESS
1 R370 MEMZN D14

1 R369 MEMZP C14
B CHANGEL ADDRESS
34.8_0603_1% 2
34.8_0603_1% 2
<8> DDR_SDQ[0..63]
AG12
DDR Memory
50 mil width
0.1U_0402_16V4Z
DDR_SRASB# <9>
DDR_SCASB# <9>
DDR_SWEB# <9>
DDR_SMAB13
DDR_SMAB12
DDR_SMAB11
DDR_SMAB10
DDR_SMAB9
DDR_SMAB8
DDR_SMAB7
DDR_SMAB6
DDR_SMAB5
DDR_SMAB4
DDR_SMAB3
DDR_SMAB2
DDR_SMAB1
DDR_SMAB0
DDR_SBSB1 <9>
DDR_SBSB0 <9>
DDR_SMAB[0..13] <9>
3
N3
N1
U3
V1
N2
P1
U1
U2
FOX_PZ75403-2941-42
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/11
Title
Claw Harmmer (Memory Bus)
D

Custom
Date:
Rev
0.4
LA-2541
Sheet
E
of
58
Near Power Supply
+1.25V
U10C
Claw Hammer-DTR
H_THERMTRIP_S#
A20
H_RST_CPU#
AF20
RESET_L
AE18
PWROK
AJ21
AH21
AH19
AJ19
CLKIN_H
CLKIN_L
FBCLKOUT_H
FBCLKOUT_L
C414
<18> H_PWRGD
3900P_0402_50V7K
2
1
CLKIN
CLKIN#
FBCLKOUT
2
1
R334 80.6_0402_1% FBCLKOUT#
<15> CPUCLK0_H
R335
169_0402_1%
AG10
E14
D12
E13
C12
D22
C22
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
AE23
AF23
AF22
AF21
C1
J3
R3
AA2
D3
AG2
B18
AH1
AE21
C20
AG4
C6
AG6
AE9
AG9
AF18
AJ23
AH23
AE24
AF24
C15
AG18
AH18
AG17
AJ18
C18
A19
D20
C21
D18
C19
B19
VLDT0_B
VLDT0_B
VLDT0_B
VLDT0_B
VLDT0_B
VLDT0_B
VLDT0_B
AH29
AH27
AG28
AG26
AF29
AE28
AF25
VTT_B
VTT_B
VTT_B
VTT_B
VTT_B
VTT_SENSE
AG15
AF16
AG16
AH16
AJ17
AE13
Miscellaneous
Clock
Place within 0.5" from CPU

Route as 80 Ohm DIFF impedence 8/5/20
<15> CPUCLK0_L
H_PW RGD
THERMTRIP_L
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
C415 3900P_0402_50V7K
<49> CPU_COREFB
Place 169 Ohm within 0.5" from CPU
<49> CPU_COREFB#
Route as DIF 5/5/5/20
Route as DIFF p air 10/5/10
PAD T4
PAD T5
L8
PAD T3
LQG21F4R7N00_0805
3300P_0402_50V7K +VDDA
+2.5VDDA
1
2
1
1
1
1
+ C84
C90
C92
C88
<49>
<49>
100U_D2_10VM
2
2
2
2 <49>
<49>
4.7U_0805_6.3V6K
0.22U_0603_10V7K
<49>
CPU_COREFB
CPU_COREFB#
A23
A24
B23
COREFB_H
COREFB_L
CORE_SENSE
AE12
AF12
AE11
VDDIOFB_H
VDDIOFB_L
VDDIO_SENSE
AH25
AJ25
VDDA1
VDDA2
AG13
AF14
AG14
AF15
AE15
VID4
VID3
VID2
VID1
VID0
AH17
AE19
DBRDY
DBREQ_L
VDDIOFB_H
VDDIOFB_L
VDDIO_SENSE
50 mils width
VID4
VID3
VID2
VID1
VID0
VID4
VID3
VID2
VID1
VID0
D BRDY
DBREQ#
A26
A27
<4> THERMDA_CPU
<4> THERMDC_CPU
Debug
THERMDA
THERMDC
+2.5VS
1
R157
1
R324
2 H_RST#
680_0402_5%
2 H_PW RGD
680_0402_5%
TDO
TMS
TCK
TRST#
TDI
0.22U_0603_10V7K
H_RST#
3
R319
C535
4.7U_0805_6.3V6K
C534
C532
2
2
0.22U_0603_10V7K
JOPEN
PAD
PAD
T18
T1
D29
D27
D25
C28
C26
B29
B27
VLDT0_A
VLDT0_A
VLDT0_A
VLDT0_A
VLDT0_A
VLDT0_A
VLDT0_A
D17
A18
B17
C17
C16
TP_K8_A28
TP_K8_AJ28
A28
AJ28
J3
TDO
TMS
TCK
TRST_L
TDI
+1.25V
@ 100_0402_5%
A22
E20
E17
B21
A21
JTAG
VTT_A
VTT_A
VTT_A
VTT_A
VTT_A
TP_M_RESET#
T2
PAD
C222
220U_D2_2.5VM
2
TP_K8_D22
TP_K8_C22
C85
220U_D2_2.5VM
1
T17 PAD
T16 PAD
+1.25V
4.7U_0805_6.3V6K 4.7U_0805_6.3V6K
4.7U_0805_6.3V6K 4.7U_0805_6.3V6K
1
1
1
1
1
1
1
1
1
C201
C226
C230
C231
C55
C53
C58
C225
C91
H_PW RGD
C416
@ 470P_0402_50V7K
2
2
4.7U_0805_6.3V6K
<18>
T13
T11
T10
T9
PAD
PAD
PAD
PAD
2
2
4.7U_0805_6.3V6K
2
4.7U_0805_6.3V6K
0.22U_0603_10V7K
0.22U_0603_10V7K
0.22U_0603_10V7K
0.22U_0603_10V7K
1
1
1
1
1
1
1
1
C223
C224
C232
C51
C50
C52
C229
C89
C207
2
2
0.22U_0603_10V7K
1 R325
2
0_0402_5%
H_RST#
2
2
4.7U_0805_6.3V6K
+1.25V
1
CLAW_ANALOG3
CLAW_ANALOG2
CLAW_ANALOG1
CLAW_ANALOG0
2
2
4.7U_0805_6.3V6K
2
2
0.22U_0603_10V7K
2
2
0.22U_0603_10V7K
2
2
0.22U_0603_10V7K
2
0.22U_0603_10V7K
H_RST_CPU#
C417
@ 0.001U_0402_50V7M
+2.5VS
+2.5V
R318 2
0_0805_5%
+2.5V
BPSCLK
BPSCLK#
TP_K8_AE24
TP_K8_AF24
TP_K8_C15
TP_CPU_BP3
TP_CPU_BP2
BP1
BP0
SINC HN
BRN#
SCANCLK1
SCANCLK2
SCANEN
SCANSHENB
SCANSHENA
R323 1
R322 1
T12
T14
T15
T8
T7
R328 1
R333 1
R128 1
R127 1
PAD
PAD
PAD
PAD
PAD
2 820_0402_5%
2 820_0402_5%
+3VS
C407
@ 1U_0603_10V4Z
IN
GND
SHDN
OUT
BYP
+2.5VDDA
@ G914E_SOT23-5
2
2
2
2
R368 1
U29
680_0402_5%
680_0402_5%
680_0402_5%
680_0402_5%
C408
1U_0603_10V4Z
1
C406
@ 0.01U_0402_16V7K
2
+2.5VS
2 680_0402_5%
+1.2V_HT
RP52
SCANCLK2
SCANCLK1
SCANEN
SCANSHENB
+1.25V
4
3
2
1
5
6
7
8
680_1206_8P4R_5%
VTT_SENSE
T6
PAD
KEY1
KEY0
FOX_PZ75403-2941-42
+2.5VS
+2.5VS
@ SAMTEC_ASP-68200-07
H_THERMTRIP_S#
Q9
3
1H_THERMTRIP#
MMBT3904_SOT23
2 2
680_0402_5%
2
4
6
8
10
12
14
16
18
20
22
24
26
1
+
R125
@ 1K_0402_5%
R126
10K_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
DBREQ#
D BRDY
TCK
TMS
TDI
TRST#
TDO
JP29
R436
560_0402_5%
+3VALW
R132
1K_0402_5%
R131
+2.5VS
R435
560_0402_5%
+2.5VS
@
R443
560_0402_5%
R441
560_0402_5%
@
@
R445
560_0402_5%
@
+1.2V_HT
+3VALW
560_0402_5%
R438
560_0402_5%
R444
0.22U_0603_10V7K
250 mil
C436
2
2
100U_D2_10VM
C433
0.22U_0603_10V7K
C434
C425
2
2
0.22U_0603_10V7K
0.22U_0603_10V7K
C426
C423
2
2
0.22U_0603_10V7K
C424
2
0.22U_0603_10V7K
Q8
@ MMBT3904_SOT23
1
MAINPWON <44,45,50>
4
H_THERMTRIP# <19>
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/11
Title
Claw Harmmer (MISC)
D

Custom
Date:
Rev
0.4
LA-2541
Sheet
E
of
58
+CPU_CORE
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
POWER
U10D
L7
AC15
H18
B20
E21
H22
J23
H24
F26
N7
L9
V10
G13
K14
Y14
AB14
G15
J15
AA15
H16
K16
Y16
AB16
G17
J17
AA17
AC17
AE17
F18
K18
Y18
AB18
AD18
AG19
E19
G19
AC19
AA19
J19
F20
H20
K20
M20
P20
T20
V20
Y20
AB20
AD20
G21
J21
L21
N21
R21
U21
W21
AA21
AC21
F22
K22
M22
P22
T22
V22
Y22
AB22
AD22
E23
G23
L23
N23
R23
U23
W23
AA23
AC23
B24
D24
F24
K24
M24
P24
T24
V24
Y24
AB24
AD24
AH24
AE25
K26
P26
V26
FOX_PZ75403-2941-42
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
AH20
AB21
W22
+2.5V
M23
L24
AG25
E4
AG27
G4
D2
J4
AF2
L4
W6
N4
Y7
U4
AA8
W4
AB9
AA4
AA10
AC4
J12
AE4
B14
D5
Y15
AF5
AE16
F6
J18
H6
G20
K6
R20
M6
U20
P6
W20
T6
AA20
V6
AC20
Y6
AE20
AB6
AG20
AD6
AJ20
D7
D21
G7
F21
J7
H21
AA7
K21
AC7
M21
AF7
P21
F8
T21
H8
V21
AB8
Y21
AD8
AD21
D9
AG21
G9
B22
AC9
E22
AF9
G22
F10
J22
AD10
L22
D11
N22
AF11
R22
F12
U22
AD12
AG29
D13
AA22
AF13
AC22
F14
AG22
AD14
AH22
F16
AJ22
AD16
D23
D15
F23
R4
H23
+CPU_CORE K23
N28
P23
U28
T23
AA28
V23
AE27
Y23
R7
AB23
U7
AD23
W7
AG23
K8
E24
M8
G24
P8
J24
T8
N24
V8
R24
Y8
U24
J9
W24
N9
AA24
R9
AC24
U9
AG24
W9
AJ24
AA9
B25
H10
C25
K10
B26
M10
D26
P10
H26
T10
M26
Y10
T26
AB10
Y26
G11
AD26
J11
AF26
AA11
AH26
AC11
C27
H12
B28
K12
D28
Y12
G28
AB12
F15
J13
H15
AA13
AB17
AC13
AD17
H14
B16
AB26
G18
E28
AA18
J28
AC18
D19
F19
H19
K19
Y19
AB19
AD19
AF19
J20
L20
N20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
POWER
U10E
FOX_PZ75403-2941-42
A
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L28
R28
W28
AC28
AF28
AH28
C29
F2
H2
K2
M2
P2
T2
V2
Y2
AB2
AD2
AH2
B4
AH4
B6
G6
J6
L6
N6
R6
U6
AA6
AC6
AH6
F7
H7
K7
M7
P7
T7
V7
AB7
AD7
B8
G8
J8
L8
N8
R8
U8
W8
AC8
AH8
F9
H9
K9
M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17
+CPU_CORE
820U_E9_2_5V_M_R7
1
1
1
+
C76
C217
330U_D_2VM_R15
1
C227
2
330U_D_2VM_R15
C228
820U_E9_2_5V_M_R7
+CPU_CORE
+CPU_CORE
10U_0805_10V4Z
1
1
C126
C137
2
2
10U_0805_10V4Z
10U_0805_10V4Z
1
1
C154
C127
2
2
10U_0805_10V4Z
10U_0805_10V4Z
1
C138
C155
2
2
10U_0805_10V4Z
C477
1000P_0402_50V7K
C476
0.1U_0402_16V4Z
4 in Socket Cavity,
2 on backside under Socket
2
+CPU_CORE
+CPU_CORE
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
1
1
1
1
1
1
C511
C452
C544
C517
C545
C460
C521
2
2
4.7U_0805_6.3V6K
2
2
4.7U_0805_6.3V6K
2
2
4.7U_0805_6.3V6K
0.22U_0603_10V7K
0.22U_0603_10V7K
0.22U_0603_10V7K
1
1
1
1
1
C498
C478
C499
C487
C479
2
4.7U_0805_6.3V6K
C486
2
2
0.22U_0603_10V7K
Close to Socket
2
2
2
2
0.22U_0603_10V7K 0.22U_0603_10V7K
In Socket Cavity
Loop Bandwidth Bulk Cappacitance

KHz
uF
CPU Decouping Capacitor
Total
ESR
2.5m ohm
(AMD)
20
23000
50
9000
0.9m ohm
* 300
3300
1.5m ohm
3
+2.5V
+2.5V
4.7U_0805_6.3V6K
1
1
C121
C203
2
2
4.7U_0805_6.3V6K
0.22U_0603_10V7K
0.22U_0603_10V7K
0.22U_0603_10V7K
1
1
1
1
1
C200
C164
C136
C124
C148
C194
2
2
0.22U_0603_10V7K
2
2
2
2
0.22U_0603_10V7K 0.22U_0603_10V7K
Near Socket
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/11
Title
Claw Harmmer (Power & Ground)
D

Custom
Date:
Rev
0.4
LA-2541
Sheet
E
of
58
<5> DDR_SDQS[0..7]
+1.25VREF_MEM
<5> DDR_SDQ[0..63]
+2.5V
DDR_DQ0
DDR_DQ5
DDR_DQS0
DDR_DQ3
1
DDR_DQ7
DDR_DQ9
DDR_DQ12
DDR_DQS1
DDR_DQ14
DDR_DQ15
<5> DDR_CLK5
<5> DDR_CLK5#
+2.5V
40mil
JP27
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS
VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDR_DQ4
DDR_DQ1
DDR_DM0
DDR_DQ2
<5> DDR_SDM[0..7]
+1.25VREF_MEM
DDR_SDQS[0..7]
DDR_DQ[0..63]
DDR_SDQ[0..63]
DDR_DQS[0..7]
DDR_SDM[0..7]
DDR_DM[0..7]
DDR_SDQ32
DDR_SDQ37
DDR_SDQ36
DDR_SDQ33
RP8
DDR_DQ6
DDR_DQ8
DDR_DQ13
DDR_DM1
1
2
3
4
DDR_DQ[0..63] <9>
DDR_DQS[0..7] <9>
DDR_DM[0..7] <9>
RP36
0.1U_0402_16V4Z
DDR_SDQ0
DDR_SDQ4
DDR_SDQ5
DDR_SDQ1
DDR_SMAA[0..13]
<5> DDR_SMAA[0..13]
C63
DDR_DQ0
DDR_DQ4
DDR_DQ5
DDR_DQ1
8
7
6
5
1
2
3
4
8
7
6
5
DDR_DQ32
DDR_DQ37
DDR_DQ36
DDR_DQ33
+1.25V
10_0804_8P4R_5%
RP29
RP37
DDR_SMAA12
DDR_SMAA9
DDR_SMAA7
DDR_SMAA5
10_0804_8P4R_5%
DDR_DQ10
DDR_DQ11
DDR_SDQS4
DDR_SDM4
DDR_SDQ34
DDR_SDQ35
RP11
DDR_SDM0
DDR_SDQS0
DDR_SDQ2
DDR_SDQ3
1
2
3
4
DDR_DM0
DDR_DQS0
DDR_DQ2
DDR_DQ3
8
7
6
5
1
2
3
4
8
7
6
5
DDR_DQS4
DDR_DM4
DDR_DQ34
DDR_DQ35
RP33
DDR_SMAA3
DDR_SMAA1
DDR_SMAA10
DDR_SBSA0
RP40
DDR_DQ26
DDR_DQ27
2
DDR_CKE0
<5> DDR_CKE0
DDR_SMAA12
DDR_SMAA9
DDR_SMAA7
DDR_SMAA5
DDR_SMAA3
DDR_SMAA1
DDR_SMAA10
DDR_SBSA0
DDR_SWEA#
DDR_SCS#0
DDR_SMAA13
<5> DDR_SBSA0
<5> DDR_SWEA#
<5> DDR_SCS#0
3
DDR_DQ32
DDR_DQ36
DDR_DQS4
DDR_DQ34
DDR_DQ38
DDR_DQ40
DDR_DQ44
DDR_DQS5
DDR_DQ47
DDR_DQ46
DDR_DQ48
DDR_DQ49
DDR_DQS6
DDR_DQ50
DDR_DQ55
DDR_DQ56
DDR_DQ61
DDR_DQS7
DDR_DQ58
DDR_DQ59
<4,9,15,19> SB_SDAT
<4,9,15,19> SB_SCLK
+3VS
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDR_SDQ6
DDR_SDQ7
DDR_SDQ8
DDR_SDQ9
DDR_DQ23
DDR_DQ25
1
2
3
4
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
8
7
6
5
1
2
3
4
8
7
6
5
DDR_DQ29
DDR_DM3
RP28
DDR_SDQ12
DDR_SDQ13
DDR_SDQS1
DDR_SDM1
DDR_SDQ44
DDR_SDQ45
DDR_SDQS5
DDR_SDM5
1
2
3
4
DDR_DQ12
DDR_DQ13
DDR_DQS1
DDR_DM1
8
7
6
5
1
2
3
4
DDR_SMAA11
DDR_SMAA8
DDR_SMAA6
DDR_SMAA4
BOM change
RP43
RP15
DDR_DQ30
DDR_DQ31
47_0804_8P4R_5%
10_0804_8P4R_5%
10_0804_8P4R_5%
8
7
6
5
DDR_DQ44
DDR_DQ45
DDR_DQS5
DDR_DM5
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
RP32
DDR_SMAA2
DDR_SMAA0
DDR_SBSA1
DDR_SRASA#
10_0804_8P4R_5%
10_0804_8P4R_5%
RP44
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
RP16
DDR_SDQ14
DDR_SDQ10
DDR_SDQ15
DDR_SDQ11
1
2
3
4
DDR_SDQ47
DDR_SDQ42
DDR_SDQ46
DDR_SDQ43
DDR_DQ14
DDR_DQ10
DDR_DQ15
DDR_DQ11
8
7
6
5
1
2
3
4
8
7
6
5
DDR_DQ47
DDR_DQ42
DDR_DQ46
DDR_DQ43
DDR_SMAA13 1
2
R116 47_0402_5%
10_0804_8P4R_5%
DDR_SWEA# 1
2
R110 47_0402_5%
10_0804_8P4R_5%
DDR_CKE0
RP17
DDR_SMAA11
DDR_SMAA8
DDR_SDQ20
DDR_SDQ16
DDR_SDQ17
DDR_SDQ21
DDR_SMAA6
DDR_SMAA4
DDR_SMAA2
DDR_SMAA0
DDR_SBSA1
DDR_SRASA#
DDR_SCASA#
DDR_SCS#1
1
2
3
4
DDR_SDQ48
DDR_SDQ53
DDR_SDQ49
DDR_SDQ52
1
2
3
4
DDR_SBSA1 <5>
DDR_SRASA# <5>
DDR_SCASA# <5>
DDR_SCS#1 <5>
DDR_SCASA# 1
2
R109 47_0402_5%
Layout note
RP47
DDR_DQ20
DDR_DQ16
DDR_DQ17
DDR_DQ21
8
7
6
5
10_0804_8P4R_5%
8
7
6
5
DDR_DQ48
DDR_DQ53
DDR_DQ49
DDR_DQ52
Place these resistors

close to DIMM0,
all trace length<500 mil
10_0804_8P4R_5%
RP20
RP48
DDR_SDQS2
DDR_SDM2
DDR_SDQ18
DDR_SDQ22
DDR_DQ37
DDR_DQ33
1
2
3
4
DDR_DQS2
DDR_DM2
DDR_DQ18
DDR_DQ22
8
7
6
5
DDR_SDM6
DDR_SDQS6
DDR_SDQ54
DDR_SDQ50
10_0804_8P4R_5%
1
2
3
4
DDR_SCS#0
DDR_SCS#1
8
7
6
5
DDR_DM6
DDR_DQS6
DDR_DQ54
DDR_DQ50
DDR_CKE0
R113 68_0402_5%
1
2
1
2
R108 68_0402_5%
1
R101
2
68_0402_5%
10_0804_8P4R_5%
DDR_DM4
DDR_DQ35
RP23
DDR_SDQ19
DDR_SDQ23
DDR_SDQ28
DDR_SDQ25
DDR_DQ39
DDR_DQ41
DDR_DQ45
DDR_DM5
1
2
3
4
DDR_DQ19
DDR_DQ23
DDR_DQ28
DDR_DQ25
8
7
6
5
RP51
DDR_SDQ51
DDR_SDQ55
DDR_SDQ60
DDR_SDQ56
10_0804_8P4R_5%
1
2
3
4
DDR_DQ42
DDR_DQ43
8
7
6
5
Note:
DDR_SMAA13 Recommend for AMD
DDR_DQ51
DDR_DQ55
DDR_DQ60
DDR_DQ56
10_0804_8P4R_5%
RP24
DDR_CLK7# <5>
DDR_CLK7 <5>
DDR_DQ53
DDR_DQ52
+2.5V
RP53
DDR_SDQ24
DDR_SDQ29
DDR_SDQS3
DDR_SDM3
1
2
3
4
DDR_DM6
DDR_DQ54
DDR_DQ24
DDR_DQ29
DDR_DQS3
DDR_DM3
8
7
6
5
DDR_SDQ57
DDR_SDQ61
DDR_SDM7
DDR_SDQS7
10_0804_8P4R_5%
1
2
3
4
8
7
6
5
DDR_DQ57
DDR_DQ61
DDR_DM7
DDR_DQS7
R51
1K_0402_1% +1.25VREF_MEM
10_0804_8P4R_5%
RP27
DDR_DQ51
DDR_DQ60
R60
DDR_SDQ26
DDR_SDQ30
DDR_SDQ27
DDR_SDQ31
DDR_DQ57
DDR_DM7
DDR_DQ62
DDR_DQ63
1
2
3
4
DDR_DQ26
DDR_DQ30
DDR_DQ27
DDR_DQ31
8
7
6
5
C64
C62
RP56
1K_0402_1%
DDR_SDQ62
DDR_SDQ58
DDR_SDQ63
DDR_SDQ59
10_0804_8P4R_5%
1
2
3
4
8
7
6
5
DDR_DQ62
DDR_DQ58
DDR_DQ63
DDR_DQ59
0.1U_0402_16V4Z 1000P_0402_50V7K
2
2
4
10_0804_8P4R_5%
STANDARD
SO-DIMM0
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/11
Title
DDR-SODIMM SLOT0
QTC_C106A-040SP11
RP14
DDR_DM2
DDR_DQ22
1
2
3
4
DDR_DQ24
DDR_DQS3
DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
1 2
DDR_DQ19
DDR_DQ28
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_SDQ38
DDR_SDQ39
DDR_SDQ40
DDR_SDQ41
8
7
6
5
DDR_DQS2
DDR_DQ18
DDR_DQ16
DDR_DQ21
1
2
3
4
47_0804_8P4R_5%
10_0804_8P4R_5%
10_0804_8P4R_5%
DDR_DQ20
DDR_DQ17
8
7
6
5

Custom
Date:

G
Rev
0.4
LA-2541
Sheet
of
H
58
+2.5V
+2.5V
+1.25V
+1.25VREF_MEM
+1.25V
+1.25V
JP28
DDR_DQ0
DDR_DQ5
DDR_DQS0
DDR_DQ3
DDR_DQ7
DDR_DQ9
DDR_DQ12
DDR_DQS1
DDR_DQ14
DDR_DQ15
<5> DDR_CLK4
<5> DDR_CLK4#
DDR_DQ20
DDR_DQ17
DDR_DQS2
DDR_DQ18
DDR_DQ19
DDR_DQ28
DDR_DQ24
DDR_DQS3
DDR_DQ26
DDR_DQ27
DDR_CKE1
<5> DDR_CKE1
DDR_SMAB12
DDR_SMAB9
DDR_SMAB7
DDR_SMAB5
DDR_SMAB3
DDR_SMAB1
DDR_SMAB10
DDR_SBSB0
DDR_SWEB#
DDR_SCS#2
DDR_SMAB13
<5> DDR_SBSB0
<5> DDR_SWEB#
<5> DDR_SCS#2
DDR_DQ32
DDR_DQ36
3
DDR_DQS4
DDR_DQ34
DDR_DQ38
DDR_DQ40
DDR_DQ44
DDR_DQS5
DDR_DQ47
DDR_DQ46
DDR_DQ48
DDR_DQ49
DDR_DQS6
DDR_DQ50
DDR_DQ55
DDR_DQ56
DDR_DQ61
DDR_DQS7
DDR_DQ58
DDR_DQ59
<4,8,15,19> SB_SDAT
<4,8,15,19> SB_SCLK
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
RP9
VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS
VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU/A13
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDR_DQ4
DDR_DQ1
DDR_DM0
DDR_DQ2
DIMM1
REVERSE
C65
DDR_DQ4
DDR_DQ1
DDR_DM0
DDR_DQ2
0.1U_0402_16V4Z
1
2
3
4
DDR_DQ0
DDR_DQ5
DDR_DQS0
DDR_DQ3
8
7
6
5
1
2
3
4
DDR_SMAB12
DDR_SMAB9
DDR_SMAB7
DDR_SMAB5
8
7
6
5
1
2
3
4
DDR_DQ6
DDR_DQ8
47_0804_8P4R_5%
RP34
RP12
DDR_SMAB3
DDR_SMAB1
DDR_SMAB10
DDR_SBSB0
RP13
DDR_DQ13
DDR_DM1
DDR_DQ6
DDR_DQ8
DDR_DQ13
DDR_DM1
DDR_DQ10
DDR_DQ11
1
2
3
4
DDR_DQ7
DDR_DQ9
DDR_DQ12
DDR_DQS1
8
7
6
5
1
2
3
4
8
7
6
5
DDR_DQ16
DDR_DQ21
DDR_DM2
DDR_DQ22
DDR_DQ14
DDR_DQ15
DDR_DQ20
DDR_DQ17
1
2
3
4
DDR_DQ23
DDR_DQ25
DDR_DM2
DDR_DQ22
DDR_DQ23
DDR_DQ25
DDR_DQ29
DDR_DM3
1
2
3
4
8
7
6
5
DDR_DQS2
DDR_DQ18
DDR_DQ19
DDR_DQ28
8
7
6
5
1
2
3
4
68_0804_8P4R_5%
RP25
DDR_DQ29
DDR_DM3
DDR_DQ30
DDR_DQ31
Note:
DDR_SMAB13 Recommend
for AMD.
8
7
6
5
DDR_DQ37
DDR_DQ33
DDR_DM4
DDR_DQ35
1
2
3
4
DDR_DQ32
DDR_DQ36
DDR_DQS4
DDR_DQ34
8
7
6
5
1
2
3
4
DDR_SMAB6
DDR_SMAB4
DDR_SMAB2
DDR_SMAB0
DDR_DQ39
DDR_DQ41
DDR_DQ45
DDR_DM5
DDR_SBSB1 <5>
DDR_SRASB# <5>
DDR_SCASB# <5>
DDR_SCS#3 <5>
Place these resistor

close by DIMM1,
all trace length
Max=0.8"
DDR_DQ37
DDR_DQ33
DDR_DM4
DDR_DQ35
DDR_DQ38
DDR_DQ40
DDR_DQ44
DDR_DQS5
8
7
6
5
DDR_DQ45
DDR_DM5
DDR_DQ42
DDR_DQ43
DDR_DQ47
DDR_DQ46
DDR_DQ48
DDR_DQ49
8
7
6
5
DDR_DQ53
DDR_DQ52
DDR_SCS#3
1
R115
2
68_0402_5%
8
7
6
5
RP50
1
2
3
4
DDR_DQS6
DDR_DQ50
DDR_DQ55
DDR_DQ56
8
7
6
5
1
2
3
4
8
7
6
5
68_0804_8P4R_5%
RP55
1
2
3
4
DDR_DQ61
DDR_DQS7
DDR_DQ58
DDR_DQ59
8
7
6
5
68_0804_8P4R_5%
DDR_DM6
DDR_DQ54
1
2
R102 68_0402_5%
68_0804_8P4R_5%
RP54
DDR_DQ57
DDR_DM7
DDR_DQ62
DDR_DQ63
DDR_CKE1
8
7
6
5
1
2
3
4
68_0804_8P4R_5%
DDR_CLK6# <5>
DDR_CLK6 <5>
1
2
R114 68_0402_5%
RP46
1
2
3
4
RP49
DDR_DM6
DDR_DQ54
DDR_DQ51
DDR_DQ60
DDR_SCS#2
68_0804_8P4R_5%
68_0804_8P4R_5%
DDR_DQ39
DDR_DQ41
8
7
6
5
1
2
3
4
RP45
DDR_DQ42
DDR_DQ43
DDR_DQ53
DDR_DQ52
DDR_SCASB# 1
2
R112 47_0402_5%
RP41
1
2
3
4
68_0804_8P4R_5%
Layout note
8
7
6
5
DDR_SMAB13 1
2
R117 47_0402_5%
68_0804_8P4R_5%
68_0804_8P4R_5%
RP42
DDR_SMAB11
DDR_SMAB8
8
7
6
5
68_0804_8P4R_5%
RP39
68_0804_8P4R_5%
RP38
DDR_CKE1
DDR_SBSB1
DDR_SRASB#
DDR_SCASB#
DDR_SCS#3
1
2
3
4
1
2
3
4
DDR_SWEB# 1
2
R111 47_0402_5%
RP26
1
2
3
4
DDR_SMAB2
DDR_SMAB0
DDR_SBSB1
DDR_SRASB#
47_0804_8P4R_5%
68_0804_8P4R_5%
DDR_DQ24
DDR_DQS3
DDR_DQ26
DDR_DQ27
8
7
6
5
RP35
8
7
6
5
DDR_DQ30
DDR_DQ31
1
2
3
4
47_0804_8P4R_5%
68_0804_8P4R_5%
RP21
68_0804_8P4R_5%
RP22
RP31
DDR_SMAB11
DDR_SMAB8
DDR_SMAB6
DDR_SMAB4
RP18
8
7
6
5
8
7
6
5
47_0804_8P4R_5%
RP19
1
2
3
4
1
2
3
4
68_0804_8P4R_5%
68_0804_8P4R_5%
DDR_DQ10
DDR_DQ11
DDR_DQ16
DDR_DQ21
8
7
6
5
68_0804_8P4R_5%
68_0804_8P4R_5%
1
2
3
4
8
7
6
5
68_0804_8P4R_5%
Layout note
DDR_DQ51
DDR_DQ60
<8> DDR_DQS[0..7]
DDR_DQ57
DDR_DM7
<8> DDR_DQ[0..63]
DDR_DQ62
DDR_DQ63
<8> DDR_DM[0..7]
<5> DDR_SMAB[0..13]
Place these resistor

closely DIMM1,
all trace
length<=800mil
DDR_DQS[0..7]
DDR_DQ[0..63]
DDR_DM[0..7]
DDR_SMAB[0..13]
+3VS
Compal Secret Data
2005/03/01
Deciphered Date
2006/03/11
Title
DDR-SODIMM SLOT1
B
RP30
RP10
Issued Date
TYCO_1612560-1
20 mil width

Custom
Date:
Rev
0.4
LA-2541
Sheet
E
of
58
+2.5V
4.7U_0805_6.3V6K
1
+
1
+
C180
2
330U_6.3V_M
C213
330U_6.3V_M
C95
2
2
4.7U_0805_6.3V6K
C125
Near DIMMs
Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25V
+1.25V
C66
C77
0.1U_0402_16V4Z
C128
0.1U_0402_16V4Z
C111
0.1U_0402_16V4Z
C113
0.1U_0402_16V4Z
C119
0.1U_0402_16V4Z
C174
0.1U_0402_16V4Z
C181
0.1U_0402_16V4Z
C189
0.1U_0402_16V4Z
C205
0.1U_0402_16V4Z
C214
0.1U_0402_16V4Z
C67
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.25V
C215
C204
0.1U_0402_16V4Z
C186
0.1U_0402_16V4Z
C182
0.1U_0402_16V4Z
C175
0.1U_0402_16V4Z
C120
0.1U_0402_16V4Z
C114
0.1U_0402_16V4Z
C106
0.1U_0402_16V4Z
C150
0.1U_0402_16V4Z
C78
0.1U_0402_16V4Z
C129
0.1U_0402_16V4Z
C140
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.25V
C139
C130
0.1U_0402_16V4Z
C141
0.1U_0402_16V4Z
C151
0.1U_0402_16V4Z
C165
0.1U_0402_16V4Z
C152
0.1U_0402_16V4Z
C166
0.1U_0402_16V4Z
C168
0.1U_0402_16V4Z
C153
0.1U_0402_16V4Z
C135
+1.25V
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C209
+1.25V
10U_0805_10V4Z
C73
C80
C131
C107
C115
C122
C178
C183
C193
C211
C220
C218
10U_0805_10V4Z
C75
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+2.5V
+1.25V
0.1U_0402_16V4Z
C221
C210
0.1U_0402_16V4Z
C192
0.1U_0402_16V4Z
C184
0.1U_0402_16V4Z
C179
0.1U_0402_16V4Z
C123
0.1U_0402_16V4Z
C116
0.1U_0402_16V4Z
C110
0.1U_0402_16V4Z
C158
0.1U_0402_16V4Z
C81
0.1U_0402_16V4Z
C132
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C146
2
0.1U_0402_16V4Z
+2.5V
+1.25V
C145
C133
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C147
2
0.1U_0402_16V4Z
C159
2
0.1U_0402_16V4Z
C169
2
0.1U_0402_16V4Z
C160
2
0.1U_0402_16V4Z
C170
C172
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C161
2
0.1U_0402_16V4Z
C144
2
0.1U_0402_16V4Z
+2.5V
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/11
Title
DDR SODIMM Decoupling
D

Custom
Date:
Rev
0.4
LA-2541
Sheet
E
10
of
58
<4> H_CADIP[0..15]
<4> H_CADIN[0..15]
<4> H_CADOP[0..15]
<4> H_CADON[0..15]
H_CADIP[0..15]
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
<4>
<4>
H_CLKOP1
H_CLKON1
<4>
<4>
H_CLKOP0
H_CLKON0
<4>
<4>
+1.2V_HT
H_CTLOP0
H_CTLON0
R346 1
R348 1
T26
R26
U25
U24
V26
U26
W25
W24
AA25
AA24
AB26
AA26
AC25
AC24
AD26
AC26
HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N
H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0
R29
R28
T30
R30
T28
T29
V29
U29
Y30
W30
Y28
Y29
AB29
AA29
AC29
AC28
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N
H_CLKOP1
H_CLKON1
Y26
W26
HT_RXCLK1P
HT_RXCLK1N
H_CLKOP0
H_CLKON0
W29
W28
HT_RXCLK0P
HT_RXCLK0N
H_CTLOP0
H_CTLON0
P29
N29
2 49.9_0402_1%
2 49.9_0402_1%
D27
E27
HYPER TRANSPORT CPU

I/F
H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
R24
R25
N26
P26
N24
N25
L26
M26
J26
K26
J24
J25
G26
H26
G24
G25
H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
L30
M30
L28
L29
J29
K29
H30
H29
E29
E28
D30
E30
D28
D29
B29
C29
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0
HT_TXCLK1P
HT_TXCLK1N
L24
L25
H_CLKIP1
H_CLKIN1
HT_TXCLK0P
HT_TXCLK0N
F29
G29
H_CLKIP0
H_CLKIN0
HT_TXCTLP
HT_TXCTLN
M29
M28
H_CTLIP0
H_CTLIN0
HT_RXCTLP
HT_RXCTLN
HT_RXCALN
HT_RXCALP
HT_TXCALP
HT_TXCALN
B28
A28
R345 1
H_CLKIP1 <4>
H_CLKIN1 <4>
H_CLKIP0 <4>
H_CLKIN0 <4>
H_CTLIP0 <4>
H_CTLIN0 <4>
2 100_0402_5%
216MPA4AKA22HK RS480M BGA 706P
AF17
AK17
AH16
AF16
AJ22
AJ21
AH20
AH21
AK19
AH19
AJ17
AG16
AG17
AH17
AJ18
MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
AG26
AJ29
AE21
AH24
AH12
AG13
AH8
AE8
MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7
AF25
AH30
AG20
AJ25
AH13
AF14
AJ7
AG8
MEM_DQS0P
MEM_DQS1P
MEM_DQS2P
MEM_DQS3P
MEM_DQS4P
MEM_DQS5P
MEM_DQS6P
MEM_DQS7P
AG25
AH29
AF21
AK25
AJ12
AF13
AK7
AF9
MEM_DQS0N
MEM_DQS1N
MEM_DQS2N
MEM_DQS3N
MEM_DQS4N
MEM_DQS5N
MEM_DQS6N
MEM_DQS7N
AE17
AH18
AE18
AJ19
AF18
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE
AK16
AJ16
MEM_CKP
MEM_CKN
AE28
AJ4
MEM_CAP1
MEM_CAP2
AJ20
MEM_VMODE
AK20
MEM_VREF
+2.5VS
2 0.47U_0603_16V7K
2 0.47U_0603_16V7K
C520 1
C188 1
C529
R358
1K_0402_1%
2
2
0.1U_0402_16V4Z
R357 1
MEM_VREF
1
C524
0.1U_0402_16V4Z
R359
+1.8VS
1K_0402_1%
2
2
0_0402_5%
R123 2
0_0805_5%
AJ15
AJ14
C191
1
2
MPVDD
MPVSS
MEM_A I/F
U9B
U9A
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63
AF28
AF27
AG28
AF26
AE25
AE24
AF24
AG23
AE29
AF29
AG30
AG29
AH28
AJ28
AH27
AJ27
AE23
AG22
AF23
AF22
AE20
AG19
AF20
AF19
AH26
AJ26
AK26
AH25
AJ24
AH23
AJ23
AH22
AK14
AH14
AK13
AJ13
AJ11
AH11
AJ10
AH10
AE15
AF15
AG14
AE14
AE12
AF12
AG11
AE11
AJ9
AH9
AJ8
AK8
AH7
AJ6
AH6
AJ5
AG10
AF11
AF10
AE9
AG7
AF8
AF7
AE7
MEM_COMPP
MEM_COMPN
AH5
AD30
1 R363
1 R355
2 @ 49.9_0402_1%
2 @ 49.9_0402_1%
+2.5VS
1U_0603_10V4Z
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
RS480M HT/MEM
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
11
of
58
U9C
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
PCIE I/F TO VIDEO
D8
D7
D5
D4
E4
F4
G5
G4
H4
J4
H5
H6
G1
G2
K5
K4
L4
M4
N5
N4
P4
R4
P5
P6
P2
R2
T5
T4
U4
V4
W1
W2
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
A7
B7
B6
B5
A5
A4
B3
B2
C1
D1
D2
E2
F2
F1
H2
J2
J1
K1
K2
L2
M2
M1
N1
N2
R1
T1
T2
U2
V2
V1
Y2
AA2
<26> PCIE_MRX_C_PTX_P0
<26> PCIE_MRX_C_PTX_N0
PCIE_MRX_C_PTX_P0
AE1
PCIE_MRX_C_PTX_N0
AE2
GPP_RX0P
GPP_RX0N
GPP_TX0P
GPP_TX0N
AD2
AD1
PCIE_MTX_PRX_P0
C167 1
PCIE_MTX_PRX_N0
C171 1
2 0.1U_0402_16V4Z PCIE_MTX_C_PRX_P0
2 0.1U_0402_16V4Z PCIE_MTX_C_PRX_N0
PCIE_MTX_C_PRX_P0 <26>
PCIE_MTX_C_PRX_N0 <26>
<40> PCIE_MRX_C_PTX_P1
<40> PCIE_MRX_C_PTX_N1
PCIE_MRX_C_PTX_P1
AB2
PCIE_MRX_C_PTX_N1
AC2
GPP_RX1P
GPP_RX1N
GPP_TX1P
GPP_TX1N
AA1
AB1
PCIE_MTX_PRX_P1
C143 1
PCIE_MTX_PRX_N1
C149 1
2 0.1U_0402_16V4Z PCIE_MTX_C_PRX_P1
2 0.1U_0402_16V4Z PCIE_MTX_C_PRX_N1
AF2
AG2
SB_TX0P_C C173 1
SB_TX0N_C C176 1
2 0.1U_0402_16V4Z SB_TX0P
2 0.1U_0402_16V4Z SB_TX0N
SB_TX0P <18>
SB_TX0N <18>
SB_TX1P
SB_TX1N
AC4
AD4
SB_TX1P_C C157 1
SB_TX1N_C C162 1
2 0.1U_0402_16V4Z SB_TX1P
2 0.1U_0402_16V4Z SB_TX1N
SB_TX1P <18>
SB_TX1N <18>
PCE_PCAL
PCE_NCAL
AH2
AJ2
R119 1
1
PCIE I/F TO SLOT
AB5
AB4
GPP_RX2P
GPP_RX2N
GPP_TX2P
GPP_TX2N
Y5
Y6
Y4
AA4
GPP_RX3P
GPP_RX3N
GPP_TX3P
GPP_TX3N
W5
W4

<18>
<18>
<18>
<18>
SB_RX0P
SB_RX0N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX1P
SB_RX1N
R3561
1
R121
AG1
AH1
AC5
AC6
2 10K_0402_5% AH3
AJ3
2
8.25K_0402_1%
SB_RX0P
SB_RX0N
PCIE I/F TO SB
SB_RX1P
SB_RX1N
PCE_ISET
PCE_TXISET
SB_TX0P
SB_TX0N
R120
2 150_0402_1%
2
+1.2V_HT
82.5_0402_1%
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
RS480M PCIE/DVI Controller
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
12
of
58
+3VS
L13
1
2
FBML10160808121LMT_0603
+AVDD
1
2
C437
0.1U_0402_16V4Z
C99
1U_0603_10V4Z
1
+1.8VS
R360
4.7K_0402_5%
1
2
L35
1
2
FBML10160808121LMT_0603
+NB_VDDR3
C4571
2
1U_0603_10V4Z
HTPVDD
HTPVSS
SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP
SUS_STAT#
H13
H12
VDDR3_1
VDDR3_2
A13
B13
<15> NB_REFCLK
M23
L23
D14
B15
B12
C12
AH4
<18,26,35,37,38,39> NB_RST#
1U_0603_10V4Z
<18,38,41> NB_PWRGD
2
<4,18> LDTSTOP#
<18> ALLOW_LDTSTOP
SUS_STAT#
+3VS
PLLVDD
PLLVSS
1
C459 C461
10U_0805_10V4Z
2
R364
470K_0402_5%
A14
B14
OSCIN
OSCOUT
CLOCKs
+3VS
2
B20
A20
B18
C17
LVDSBC+
LVDSBCLVDSAC+
LVDSAC-
LPVDD
LPVSS
LVDDR18D
LVDDR18A_1
LVDDR18A_2
E18
F17
E19
G20
H20
LVSSR1
LVSSR2
LVSSR3
LVSSR4
LVSSR5
LVSSR6
LVSSR7
LVSSR8
G19
E20
F20
H18
G18
F19
H19
F18
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
E14
F14
F13
TVCLKIN
<16>
<16>
<16>
<16>
<16>
<16>
GFX_CLKP
GFX_CLKN
B8
A8
HTTSTCLK
HTREFCLK
P23
N23
+1.8VS
L15
1
2
FBML10160808121LMT_0603
1
+LPVDD
LVDSBC+
LVDSBCLVDSAC+
LVDSAC-
<16>
<16>
<16>
<16>
C447
0.1U_0402_16V4Z
L29
+LVDDR18A
C456
0.1U_0402_16V4Z
1
2
FBML10160808121LMT_0603
1
+1.8VS
C443
0.1U_0402_16V4Z
C419
1U_0603_10V4Z
1
R498
0_0402_5%
2
1
2 R499 @10_0402_5%
R500
0_0402_5%
INV_PWM
ENVDD
E8
E7
+1.8VS
C420
1U_0603_10V4Z
HTREFCLK
<16>
<16>
ENABLT
<16>
R46
R515
2K_0402_5%
NBSRCCLK <15>
NBSRCCLK# <15>
R3521
HTREFCLK
C100
1U_0603_10V4Z
L30
1
2
FBML10160808121LMT_0603
+LVDDR18D
SB_CLKP
SB_CLKN
F12
E13
D13
<22> SPMEM_EN#
<22> LOAD_ROM#
R70
4.7K_0402_5%
DFT_GPIO0/RSV
DFT_GPIO1/RSV
DFT_GPIO2/RSV
R71
4.7K_0402_5%
1
1 10K_0402_5% B9
TXCLK_UP
TXCLK_UN
TXCLK_LP
TXCLK_LN
LVDSA0+
LVDSA0LVDSA1+
LVDSA1LVDSA2+
LVDSA2-
@ 10_0402_5%
2 10K_0402_5%
HTREFCLK <15>
C56
@ 10P_0402_25V8K
2
SBLINKCLK <15>
SBLINKCLK# <15>
R68
LVDSA0+
LVDSA0LVDSA1+
LVDSA1LVDSA2+
LVDSA2-
150_0603_1%
+NB_HTPVDD
DAC_VSYNC
DAC_HSYNC
RSET
DAC_SCL
DAC_SDA
B16
A16
D16
C16
B17
A17
E17
D17
<16>
<16>
<16>
<16>
<16>
<16>
EDID_CLK_LCD
EDID_DAT_LCD
<18>
BMREQ#
<16> EDID_CLK_LCD
<16> EDID_DAT_LCD
EDID_CLK_LCD
EDID_DAT_LCD
F10
C10
C11
AF4
AE4
BMREQb
I2C_CLK
I2C_DATA
THERMALDIODE_P
THERMALDIODE_N
MIS.
DFT_GPIO3/RSV
DFT_GPIO4/RSV
DFT_GPIO5/RSV
C13
C14
C15
TMDS_HPD
A10
1
R327
+3VS
ENVDD
STRP_DATA <48>
STRP_DATA
E10
STRP_DATA
2
2.2K_0402_5%
+1.8VS
+NB_PLLVDD
1U_0603_10V4Z
2
RED
GREEN
BLUE
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
LVDSB0+
LVDSB0LVDSB1+
LVDSB1LVDSB2+
LVDSB2-
DDC_DATA
B10 R69
TESTMODE
E12
R3431
R521
10K_0402_5%
1
2
R329
@ 2.2K_0402_5%
2 4.7K_0402_5%
+3VS
10U_0805_10V4Z
2
L34
+1.8VS
C25
A26
B26
LVDSB0+
LVDSB0LVDSB1+
LVDSB1LVDSB2+
LVDSB2-
R67 1
1
C101 C98
C
Y
COMP
A11
B11
2 715_0402_1% C26
E11
F11
<17> 3VDDCCL
<17> 3VDDCDA
L14
1
2
FBML10160808121LMT_06031
AVDDQ
AVSSQ
B25
A25
A24
D18
C18
B19
A19
D19
C19
D20
C20
RED
GREEN
BLUE
E24
D24
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
CRMA
LUMA
COMPS
<17> VSYNC
<17> HSYNC
+1.8VS
+AVDDQ
75_0402_1%
R74
2
1
75_0402_1%
R73
1
2
75_0402_1%
R75
1
2
75_0402_1%
R338
75_0402_1%
R339
1
2
75_0402_1%
R340
2
1
RED
GREEN
BLUE
1U_0603_10V4Z
2
AVDD1
AVDD2
AVSSN1
AVSSN2
AVDDDI
AVSSDI
LVDS
1
C430 C439
10U_0805_10V4Z
2
C438
0.1U_0402_16V4Z
PLL PWR
1
2
FBML10160808121LMT_06031
B27
C27
D26
D25
C24
B24
PM
L31
CRT/TVOUT
U9D
+1.8VS
2 4.7K_0402_5%
L11
LUMA
RED
D_LUMA
D_LUMA <17,40>
GREEN
SVIDEO@ CHB1608B121_0603
L12
CRMA
D_CRMA
D_CRMA <17,40>
BLUE
L28
RED_L
1
2
HLC0603CSCC39NJT_0603
L27
GREEN_L
1
2
L26
BLUE_L
1
2
L25
CRT_RED
1
2
HLC0603CSCCR11JT_0603
L24
CRT_GREEN
1
2
L23
CRT_BLUE
1
2
CRT_RED <17,40>
CRT_GREEN <17,40>
CRT_BLUE <17,40>
1
L10
COMPS
D_COMPS
D_COMPS <17,40>
2
C94
C93
C103
C86
C83
C410
C411
C412
18P_0402_50V8J
2
2 18P_0402_50V8J
18P_0402_50V8J
C87
SVIDEO@ 270P_0402_50V7K
SVIDEO@ 270P_0402_50V7K
SVIDEO@
SVIDEO@ 270P_0402_50V7K
270P_0402_50V7K
SVIDEO@
270P_0402_50V7K
SVIDEO@ 270P_0402_50V7K
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/11
Title
RS480M VIDEO_IF/CLOCK GEN

Custom
Date:
Rev
0.4
LA-2541
Sheet
13
of
58
VSS30
VSS89
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
U15
V14
R15
T14
N15
V12
N13
P14
U17
T16
R17
P12
T12
R13
W13
W17
P18
V18
M18
U13
N17
W15
V16
T18
M14
M12
M16
P16
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
U19
AC16
AG18
AC23
AD8
AD11
AD13
AD16
AD19
AD23
AG5
AG6
AG21
AD17
AG15
AG12
AF30
AG24
AG9
AC19
AG27
AC11
AD7
AJ30
AC21
AK5
AK10
AC13
AD21
AK22
AK29
W19
AE26
AE27
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
T27
R27
AD28
F24
F27
G28
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
VSSA49
VSSA50
VSSA51
VSSA52
VSSA53
VSSA54
VSSA55
VSSA56
VSSA57
VSSA58
VSSA59
VSSA60
VSSA61
VSSA62
VSSA63
VSSA64
VSSA65
VSSA66
VSSA67
VSSA68
R5
AE5
V5
N3
F7
F5
R3
AA6
T3
M6
C5
F8
M8
Y8
V3
C3
W3
K8
D3
C6
AA3
A2
AB3
P8
J6
C8
AD3
V8
F3
AE3
AF3
M5
AB7
G3
B4
P7
AA5
C9
C7
J5
R6
J3
AD5
D6
C4
K3
AB8
T7
Y7
AD6
K7
H7
M3
V6
H8
C2
AG3
L6
AJ1
M7
V7
F6
E6
U5
U6
E5
L5
T8
+1.2V_HT
+1.2V_HT
22U_1206_10V4Z 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VSSA22
C421
1
1
1
1
1
1
1
1
1
1
1
1
1
C432
C485
C431
C481
C451
C496
C446
C444
C466
C482
C468
C465
C495
+2.5VS
22U_1206_10V4Z 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VS
VSSA59
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
C531
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
C508
C507
C505
C502
C501
C512
C522
C506
C526
C525
C518
C514
C515
C516
C500
C513
C527
C528
L16
1
2 +VDD18
FBML10160808121LMT_0603
1U_0603_10V4Z 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
+VDDA12_13
1
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
F28
H28
M24
J28
N19
K28
T23
L27
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
M27
H24
N28
P25
P28
E26
K25
U28
V25
V28
R23
C429
1C190
1C187
1C503
1C504
1C450
N27
U27
V27
G27
V24
H27
K24
AB24
P27
J27
AA27
K27
P24
AB27
AB23
V23
G23
E23
W23
K23
J23
H23
U23
AA23
D23
F23
C23
B23
A23
+VDDHT30 A29
+VDDHT31 AC30
VDD_HT1
VDD_HT2
VDD_HT3
VDD_HT4
VDD_HT5
VDD_HT6
VDD_HT7
VDD_HT8
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
VDD_HT16
VDD_HT17
VDD_HT18
VDD_HT19
VDD_HT20
VDD_HT21
VDD_HT22
VDD_HT23
VDD_HT24
VDD_HT25
VDD_HT26
VDD_HT27
VDD_HT28
VDD_HT29
VDD_HT30
VDD_HT31
AK23
AK28
AK11
AK4
AE30
AC14
AD12
AC18
AC20
AD10
AD14
AD15
AD20
AC10
AD18
AC12
AD22
AC22
AH15
VDD_MEM1
VDD_MEM2
VDD_MEM3
VDD_MEM4
VDD_MEM5
VDD_MEM6
VDD_MEM7
VDD_MEM8
VDD_MEM9
VDD_MEM10
VDD_MEM11
VDD_MEM12
VDD_MEM13
VDD_MEM14
VDD_MEM15
VDD_MEM16
VDD_MEM17
VDD_MEM18
VDD_MEMCK
H15
AC17
AC15
VDD18_1
VDD18_2
VDD18_3
B21
C21
A22
B22
C22
F21
F22
E21
G21
VDD_CORE47
VDD_CORE46
VDD_CORE45
VDD_CORE44
VDD_CORE43
VDD_CORE42
VDD_CORE41
VDD_CORE40
VDD_CORE39
VDDA12_14
VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
VDDA12_5
VDDA12_6
VDDA12_7
VDDA12_8
VDDA12_9
VDDA12_10
VDDA12_11
VDDA12_12
VDDA12_13
VDDA18_1
VDDA18_2
VDDA18_3
VDDA18_4
VDDA18_5
VDDA18_6
VDDA18_7
VDDA18_8
VDDA18_9
VDDA18_10
VDDA18_11
VDDA18_12
VDDA18_13
VDD_CORE1
VDD_CORE2
VDD_CORE3
VDD_CORE4
VDD_CORE5
VDD_CORE6
VDD_CORE7
VDD_CORE8
VDD_CORE9
VDD_CORE10
VDD_CORE11
VDD_CORE12
VDD_CORE13
VDD_CORE14
VDD_CORE15
VDD_CORE16
VDD_CORE17
VDD_CORE18
VDD_CORE19
VDD_CORE20
VDD_CORE21
VDD_CORE22
VDD_CORE23
VDD_CORE24
VDD_CORE25
VDD_CORE26
VDD_CORE27
VDD_CORE28
VDD_CORE29
VDD_CORE30
VDD_CORE31
VDD_CORE32
VDD_CORE33
VDD_CORE34
VDD_CORE35
VDD_CORE36
VDD_CORE37
VDD_CORE38
H9
AA7
G9
U8
N7
N8
U7
F9
AA8
G8
G7
J8
J7
B1
AG4
R8
AC8
AC7
AF6
AE6
L8
W8
W7
L7
R7
AF5
AK2
N16
M13
M15
W16
N18
P19
N12
P15
N14
M17
T19
G22
R12
P13
R14
V19
R18
U16
U12
T13
U14
T17
U18
E22
R16
V13
T15
P17
W18
D22
W12
V15
W14
V17
M19
H22
H21
D21
C483 1
2 22U_1206_10V4Z
C480 1
2 1U_0603_10V4Z
C449
C474
C497
C453
2
2
2
2
1
1
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VDDA12_13
+VDDA18
2 R365
1
0_0805_5%
C533
C519
C510
C492
C469
1
1
1
1
1
+1.8VS
1U_0603_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
+VDDA18_13
+RS480_Core
C475 1
C458 1
2 22U_1206_10V4Z
2 22U_1206_10V4Z
C427
C470
C471
C472
C473
C488
C489
C490
C491
C445
C464
C467
C463
C442
C462
C455
C494
C454
C493
C484
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_6.3V6K
VSSA22
B
+VDDA18_13
1
C530
4.7U_0805_6.3V6K
VSSA59
+VDDHT30
1
C102
4.7U_0805_6.3V6K
VSS30
+VDDHT31
1
C509
4.7U_0805_6.3V6K
VSS89
A
Compal Secret Data
2005/03/01
Issued Date
2
2
2
2
2
2
2
2
2
2
2
2
2
U9E
POWER
G10
G12
AD29
AD27
AC27
G15
G14
Y24
G13
E9
D15
D9
AD9
G11
F16
G30
AB28
AB25
D12
AD24
AA28
G17
Y23
AC9
R19
Y27
C28
G16
F25
B30
T24
F26
W27
D11
H11
AD25
H17
H10
H16
H14
E16
D10
E15
F15
GROUND
U9F
2006/03/11
Deciphered Date
Title
RS480M Power/GND
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
14
of
58
+3V_VDD
+3VS
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L6
CHB2012U121_0805
2
1
1
CHB2012U121_0805
C74
C68
2
10U_0805_10V4Z
C69
C71
2
0.1U_0402_16V4Z
43
14
21
35
32
51
48
56
L9
CHB2012U121_0805
2
C79
1
2
VDDCPU
VDDSRC
VDDSRC
VDDSRC
VDDATI
VDD_PCI
VDDHTT
VDDREF
VDD48
X1
X2
CLK_STOP
CLK_STOP
SB_SCLK
SB_SDAT
7
8
SCLK
SDATA
2 33_0402_5%
52
14.31818MHZ_20P_6X1430004201
<4,8,9,19> SB_SCLK
<4,8,9,19> SB_SDAT
R52
<13> NB_REFCLK
C105
C104
2
2
0.1U_0402_16V4Z
1
2
XTALIN_CLK
XTALOUT_CLK
C109
22P_0402_50V8J
C72
2.2U_0805_16V4Z
Y2
C70
2
0.1U_0402_16V4Z
C61
2
0.1U_0402_16V4Z
2
10U_0805_10V4Z
U8
+3VS
C108
22P_0402_50V8J
1
2
+3V_VDD
0.1U_0402_16V4Z
+3VS
+3V_CLK
L7
2 Width=40 mils
R61
+3VS
1
1
2 475_0402_1%
IREF
R85
1
2
10K_0402_5%
<19,40> CPPE_DOCK#
<26> NC_CLKREQ#
+3VS
37
REF2
CPPE_DOCK#
NC_CLKREQ#
11
10
CLKREQB#
CLKREQA#
5
55
36
26
20
15
31
49
46
42
GND
GND
GNDSRC
GNDSRC
GNDSRC
GNDSRC
GNDATI
GNDPCI
GNDHTT
GNDCPU
VDDA
GNDA
39
38
CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1
45
44
41
40
CPUCLK0H
CPUCLK0L
R65
R66
SRCCLKT7
SRCCLKC7
SRCCLKT6
SRCCLKC6
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3
SRCCLKC3
ATIGCLKT1
ATIGCLKC1
ATIGCLKT0
ATIGCLKC0
SRCCLKT0
SRCCLKC0
12
13
16
17
18
19
22
23
24
25
27
28
30
29
34
33
PCIECLK0_R R86
PCIECLK0#_R R87
1
1
2 33_0402_5%
2 33_0402_5%
R96
R97
1
1
2 49.9_0402_1%
2 49.9_0402_1%
PCIECLK0
PCIECLK0#
PCIECLK0 <26>
PCIECLK0# <26>
PCIECLKD_R R78
PCIECLKD#_R R79
1
1
2SPR@ 33_0402_5%PCIECLK_DOCKR88
R89
2SPR@ 33_0402_5%PCIECLK_DOCK#
1
1
2 SPR@ 49.9_0402_1%
2 SPR@ 49.9_0402_1%
PCIECLK_DOCK
PCIECLK_DOCK#
PCIECLK_DOCK <40>
PCIECLK_DOCK# <40>
SBSRCCLK_R R80
SBSRCCLK#_R R81
1
1
2 33_0402_5%
2 33_0402_5%
SBSRCCLK
SBSRCCLK#
R90
R91
1
1
2 49.9_0402_1%
2 49.9_0402_1%
SBSRCCLK
SBSRCCLK#
SBSRCCLK <18>
SBSRCCLK# <18>
NBSRCCLK_R R56
NBSRCCLK#_RR57
SBLINKCLK_R R54
SBLINKCLK#_RR55
1
1
1
1
2@ 33_0402_5%
2 @ 33_0402_5%
2 33_0402_5%
2 33_0402_5%
NBSRCCLK
NBSRCCLK#
SBLINKCLK
SBLINKCLK#
R44
R45
R42
R43
1
1
1
1
2
2
2
2
NBSRCCLK
NBSRCCLK#
NBSRCCLK <13>
NBSRCCLK# <13>
SBLINKCLK
SBLINKCLK#
SBLINKCLK <13>
SBLINKCLK# <13>
PCICLK0
50
FS0/REF0
FS1/REF1
FS2
54
53
9
2 15_0402_1%
2 15_0402_1%
1
1
CPUCLK0_H <6>
CPUCLK0_L <6>
PCIECLK0
PCIECLK0#
@ 49.9_0402_1%
@ 49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
1 R82
2
10K_0402_5%
+3VS
R528 1
R49 1
2 33_0402_5%
2 SIO@ 12_0402_5%
R50
SB_INT
<19>
CLK_14M_SIO <37>
33_0402_5%
R50
USB_48MHz
HTTCLK0
4
47
R84
R76
R64
1
1
1
FF
DF
12ohm
33ohm
CLK_14M_KBC <38>
2 33_0402_5%
2 33_0402_5%
2 33_0402_5%
CLK_48M_CB <23>
USBCLK_EXT <19>
HTREFCLK <13>
+RS480_Core
R508
1
2
1K_0402_5%
R53
51.1_0402_1%
ICS951418BGT_TSSOP56
Q47
MMBT3904_SOT23
CLK_STOP
R455
10K_0402_5%
FS0
FS1
FS2
R509
<41,47,48,49> VGATE
2
@ 1K_0402_5%
1
R59
R94
10K_0402_5%
10K_0402_5%
10K_0402_5%
R58
+3V_CLK
EXT CLK FREQUENCY SELECT TABLE(MHZ)
FS0
FS1
FS2
CPU
Hi-Z
1
1
1
PCI
USB
100.00 Hi-Z
Hi-Z
48.00
Reserved
100.00 X/3
X/6
48.00
Reserved
180.00 100.00 60.00
30.00
48.00
Reserved
220.00 100.00 36.56
73.12
48.00
Reserved
100.00 100.00 66.66
33.33
48.00
Reserved
133.33 100.00 66.66
33.33
48.00
Reserved
200.00 100.00 66.66
33.33
48.00
Normal HAMMER operation
2005/03/01
2006/03/11
Deciphered Date
HTT
COMMENT
Title
Clock Generator
A
SRCCLK
[2:1]
Compal Secret Data
Issued Date
FS2 FS1 FS0

Custom
Date:

G
Rev
0.4
LA-2541
Sheet
15
H
of
58
LCD Panel Connector

1
The cap.'s colsely to LCD CONN.

JP8
<13>
<13>
LVDSAC+
LVDSAC-
<13>
<13>
LVDSB0+
LVDSB0-
<13>
<13>
LVDSB1+
LVDSB1-
<13>
<13>
LVDSB2+
LVDSB2-
<13>
<13>
LVDSBC+
LVDSBC-
LVDSAC+
LVDSACLVDSB0+
LVDSB0LVDSB1+
LVDSB1LVDSB2+
LVDSB2LVDSBC+
LVDSBC+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
+LCDVDD_A
1 R34
2
0_0805_5%
1
LVDSA1+
LVDSA1-
LVDSA1+ <13>
LVDSA1- <13>
LVDSA0+
LVDSA0-
LVDSA0+ <13>
LVDSA0- <13>
C39
+LCDVDD
C38
0.01U_0402_16V7K
+3VS
+3VS
@ 10U_0805_10V4Z
R316
1.8K_0603_1%
LVDSA2+
LVDSA2-
LCD_ENABLT
R314
INV_PWM <13>
DAC_BRIG
R517 @ 0_0402_5%
1
2
10K_0402_5%
EDID_CLK_LCD
EDID_DAT_LCD
EDID_CLK_LCD <13>
EDID_DAT_LCD <13>
<13>
<13>
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
LVDSA2+
LVDSA2-
LCD_ENABLT
+INVPWR_B+
D23
1
DAC_BRIG
R315
1K_0402_1%
ENABLT <13>
RB751V_SOD323
ACES_87216-4012
D22
1
PCIRST_LCD# <18>
RB751V_SOD323
B+
+INVPWR_B+
2
2
+5VALW
R317
2
G
2N7002_SOT23
Q30
0.047U_0402_16V4Z
2
G
S
C60
C46
Q29
DTC124EK_SC59
C43
4.7U_0805_10V4Z
C59
4.7U_0805_10V4Z
0.1U_0402_16V4Z
I
2
<13>
1 2
100K_0402_5%
D
LID_SW# <19,39>
+3VS
Q7
SI2301BDS_SOT23
+LCDVDD
R48
100_0402_1%
D34
1
RB751V_SOD323
+LCDVDD
L22
0_0805_5%
ENVDD
ENVDD
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/11
Title
LVDS Connector
F

Custom
Date:
Rev
0.4
LA-2541
Sheet
16
of
H
58
CRT CONNECTOR
1
D5
@ DAN217_SC59 +3VS +5VS
D3
D4
@ DAN217_SC59 @ DAN217_SC59
+CRTVDD
F1
+R_CRT_VCC
D2
2
2
1.1A_6VDC_FUSE
W=40mils
RB411D_SOT23
C440
0.1U_0402_16V4Z
2
JP9
R337 1K_0402_1%
1
2
+CRTVDD
C422
1
2
CRT_DDCDA
CRT_HSYNC_R
CRT_GREEN
<13,40> CRT_GREEN
R331
4
CRT_HSYNC
CRT_HSYNC <40>
<13,40> CRT_BLUE
20_0402_5%
74AHCT1G125GW_SOT353-5
L33
1
2
FBM-L11-160808-800LMT 0603
L32
1
2
FBM-L11-160808-800LMT 0603
CRT_HSYNC
CRT_BLUE
CRT_VSYNC
CRT_VSYNC
CRT_VSYNC <40>
CRT_HSYNC_L
CRT_VSYNC_L
R332
CRT_DDCCL
C441
P
VSYNC
VSYNC
A
3
C435
FOX_DZ11A91-L7
U32
Y
10P_0402_50V8J
4
10P_0402_50V8J
CRT_VSYNC_R
<13>
OE#
20_0402_5%
16
17
+3VS
74AHCT1G125GW_SOT353-5
R351
G
3VDDCCL
4.7K_0402_5%
3
Q31
1
3VDDCDA
Q32
1
CRT_DDCDA
2N7002_SOT23
C428
C448
220P_0402_50V7K
TV-Out Connector
1
1
3
220P_0402_50V7K
+3VS
D20
@ DAN217_SC59
D19
D18
@ DAN217_SC59 @ DAN217_SC59
S-Video
CRT_DDCDA <40>
3VDDCDA
CRT_DDCCL <40>
2N7002_SOT23
<13>
R349
4.7K_0402_5%
4.7K_0402_5%
CRT_DDCCL
3VDDCCL
R344
2
R330
4.7K_0402_5%
<13>
+CRTVDD
P
HSYNC
U31
<13>
HSYNC
OE#
<13,40> CRT_RED
0.1U_0402_16V4Z
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
CRT_RED
R3
TV_LUMA
<13,40> D_LUMA
SVIDEO@ 0_0603_5%
JP1
R2
1
2
3
4
5
6
7
TV_CRMA
<13,40> D_CRMA
SVIDEO@ 0_0603_5%
R1
TV_COMPS
<13,40> D_COMPS
SUYIN_33007SR-07T1-C
SVIDEO@ 0_0603_5%
C3
C4
C5
@ 5P_0402_50V8C
@ 5P_0402_50V8C
@ 5P_0402_50V8C
4
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
CRT & TV out Connector
D

Custom
Date:
Rev
0.4
LA-2541
Sheet
E
17
of
58
+3VS
PCI_FRAME#
PCI _IRDY#
PCI_TRDY#
PCI_STOP#
RP57
1
2
3
4
8
7
6
5
2 10U_0805_10V4Z
C270 1
2 0.1U_0402_16V4Z
L18 CHB2012U121_0805
1
2
+1.8VS
Layout
change
8.2K_0804_8P4R_5%
C
C279 1
C266 1
PCI_SERR#
PCI_PAR
PCI_DEVSEL#
LOCK#
C589
C591
C598
C600
C604
C610
C606
C607
8.2K_0804_8P4R_5%
RP59
1
2
3
4
8
7
6
5
FWH_WP#
FWH_TBL#
PCI_GNT#4
PCI_REQ#4
1 R232
2 PCI_REQ#5
8.2K_0402_5%
1 R233
2 PCI_GNT#5
8.2K_0402_5%
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
<23>
<23>
<29>
<27>
SB_32KHI
+PCIE_VDDR
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
49.9_0402_1% SB_TX2P
49.9_0402_1% SB_TX2N
49.9_0402_1% SB_TX3P
49.9_0402_1% SB_TX3N
R167
R416
R407
R413
8.2K_0804_8P4R_5%
2 22U_1206_10V4Z
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
F26
R29
G26
P26
K26
L26
P28
N26
P27
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDR_9
H28
F29
H29
H26
F27
G29
L29
J26
L28
J27
N27
M26
K27
P29
P30
PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
AJ8
AK7
AG5
AH5
AJ5
AH6
AJ6
AK6
AG7
AH7
CPU_STP#/DPSLP#
PCI_STP#
INTA#
INTB#
INTC#
INTD#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
SB_32KHO
R155
20M_0603_5%
B2
X1
SB_32KHO
B1
X2
C29
A28
C28
H_INIT#
B29
D29
E4
B30
F28
E28
ALLOW_LDTSTOPE29
D25
E27
D27
H_RST#
D28
20M_0603_5%
C250
18P_0402_50V8J
<4,13> LDTSTOP#
C251
18P_0402_50V8J
<13> ALLOW_LDTSTOP
<6> H_PWRGD
<13>
<6>
BMREQ#
H_RST#
XTAL
IN
SB_32KHI
NC
R153 1
1
Y5
32.768KHZ_12.5P_Q13MC30610003
NC
OUT
CPU_PG/LDT_PG
INTR/LINT0
NMI/LINT1
INIT#
SMI#
SLP#/LDT_STP#
IGNNE#
A20M#
FERR#
STPCLK#/ALLOW_LDTSTP
LDT_PG/SSMUXSEL/GPIO0
DPRSLPVR
BMREQ#
LDT_RST#
218S4EASA32K SB400 BGA 564P
14
P
I
+3VS
U38A
R458 1
A_RST#
R205 1
2 8.2K_0402_5%
2 10K_0402_5%
R456 1
2
33_0402_5%
KB_RST#
SIRQ
LPC_DRQ#1
LPC_DRQ#0
8
7
6
5
NB_RST#
R457
47K_0402_5%
SN74LVC125APWLE_TSSOP14
LPC_AD0
LPC_AD2
LPC_AD1
LPC_AD3
8
7
6
5
1
2
3
4
10K_0804_8P4R_5%
<13,26,35,37,38,39>
RP69
1
2
3
4
100K_0804_8P4R_5%
Layout and BOM change
PCI_CBE#0 <23,27,29>
PCI_CBE#1 <23,27,29>
PCI_CBE#2 <23,27,29>
PCI_CBE#3 <23,27,29>
PCI_FRAME# <23,27,29>
PCI_DEVSEL# <23,27,29>
PCI_IRDY# <23,27,29>
PCI_TRDY# <23,27,29>
PCI_PAR <23,27,29>
PCI_STOP# <23,27,29>
PCI_PERR# <23,27,29>
PCI_SERR# <23,27,29,38>
PCI_REQ#0
PCI_REQ#1 <29>
PCI_REQ#2 <23>
PCI_REQ#3 <27>
PCI_REQ#4
PCI_REQ#5
FWH_WP#
PCI_GNT#0
R518
1
PCIRST#
0_0402_5%
12
2
U38D
O
11
PCIRST_LCD# <16>
2
0_0402_5% @
<13,38,41> NB_PWRGD
1
R519
FWH_WP# <39>
PCI_GNT#1 <29>
PCI_GNT#2 <23>
PCI_GNT#3 <27>
PCI_GNT#4
PCI_GNT#5
FWH_TBL#
PM_CLKRUN#
LOCK#
FWH_TBL# <39>
PM_CLKRUN# <23,27,29,37,38>
ZZZ
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#
AG25
AH25
AJ25
AH24
AG24
AH26
AG26
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
LPC_DRQ#1
SERIRQ
AK27
SIRQ
RTCCLK
RTC_IRQ#/ACPWR_STRAP
C2
F3
RTC_CLK
VBAT
RTC_GND
A2
A1
LPC_AD0 <37,38,39>
LPC_AD1 <37,38,39>
LPC_AD2 <37,38,39>
LPC_AD3 <37,38,39>
LPC_FRAME# <37,38,39>
LPC_DRQ#0 <37>
LA-2541 REV0 M/B
BATT1
SIRQ
<23,37,38>
RTC_CLK <22>
AUTO_ON# <22>
CR2025 RTC BATTERY
+RTCVCC
2
+RTCVCC
C245
1U_0603_10V4Z
+BATT1.1
R122
close any door
J4
W=20mils
1
2
2
1K_0402_5%
W=20mils
JP16
C185
E&T_7651
FWH_INIT#
JOPEN
0.1U_0402_16V4Z
FWH_INIT# <39>
R191 1
<19,38> KB_RST#
U38B
R398
1.2K_0402_5%
R400
1.2K_0402_5%
PCI_PERR#
PM_CLKRUN#
RP68
+3VS
+3VS
PCI_RST# <23,26,27,29,32>
1
R459
47K_0402_5%
PCI_PERR#
PCI_RST#
2 33_0402_5%
13
8
7
6
5
R460
8.2K_0402_5%
2
OE#
1
2
3
4
PCIE_PVDD
0.1U_0402_16V4Z
RP63
PCIE_CALI
8.2K_0804_8P4R_5%
PCIE_CALRP
PCIE_CALRN
C635 1
PCI_GNT#3
PCI_GNT#2
PCI_GNT#1
PCI_GNT#0
2 @ 0.1U_0402_16V4Z
8
7
6
5
C605 1
1
2
3
4
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
2 39_0402_5%
+3VS
PCIRST#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
AJ7
W3
Y2
W4
Y3
V1
Y4
V2
W2
AA4
V4
AA3
U1
AA2
U2
AA1
U3
T4
AC1
R2
AD4
R3
AD3
R4
AD2
P2
AE3
P3
AE2
P4
AF2
N1
AF1
V3
AB4
AC2
AE4
T3
AC4
AC3
T2
U4
T1
AB2
AB3
AF4
AF3
AG2
AG3
AH1
AH2
AH3
AJ2
AK2
AJ3
AK3
AG4
AH4
AJ4
AG1
AB1
CLK_PCI_PCM <23>
CLK_PCI_FWH <39>
CLK_PCI_LAN <22,27>
CLK_PCI_MINI <22,29>
CLK_PCI_EC <22,38>
CLK_PCI_SIO <22,37>
CLK_PCI6 <22>
CLK_PCI7 <22>
CLK_PCI8 <22>
OE#
RP60
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCICLK9_R R423 1
PCICLKFB
39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
SB_TX0P
M29
SB_TX0N
N29
SB_TX1P
M28
SB_TX1N
N28
SB_TX2P
J29
SB_TX2N
K29
SB_TX3P
J28
SB_TX3N
K28
L19
150_0402_1%
R162
G27
1
2
2
1
+1.8VS
+PCIE_VDDR
R411 2
H27
1
150_0402_1%
FBML10160808121LMT_0603
G28
1 R402
2
4.12K_0603_1%
C272 1
+PCIE_PVDD
R30
2 1U_0603_10V4Z
<12>
<12>
<12>
<12>
8.2K_0804_8P4R_5%
2
2
2
2
2
2
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/PDMA_REQ0#
REQ4#/PLL_BP33/PDMA_REQ1#
REQ5#/GPIO13
REQ6#/GPIO31
GNT0#
GNT1#
GNT2#
GNT3#/PLL_BP66/PDMA_GNT0#
GNT4#/PLL_BP50/PDMA_GNT1#
GNT5#/GPIO14
GNT6#/GPIO32
CLKRUN#
LOCK#
1
1
1
1
1
1
8
7
6
5
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
R410
R414
R181
R179
R420
R424
OE#
1
2
3
4
PCIE_RCLKP
PCIE_RCLKN
0.01U_0402_16V8KSB_RX0P_C M30
0.01U_0402_16V8KSB_RX0N_C N30
0.01U_0402_16V8KSB_RX1P_C K30
0.01U_0402_16V8KSB_RX1N_C L30
H30
J30
F30
G30
PCICLK0_R
PCICLK1_R
PCICLK2_R
PCICLK3_R
PCICLK4_R
PCICLK5_R
L4
L3
L2
L1
M4
M3
M2
M1
N4
N3
N2
RP58
2
2
2
2
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK8
PCICLK9
PCICLK_FB
1
1
1
1
PCI CLKS
C268
C269
C265
C267
SB400
L PC
8.2K_0804_8P4R_5%
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
A_RST#
L27
M27
PCI INTERFACE
<15> SBSRCCLK
<15> SBSRCCLK#
<12>
<12>
<12>
<12>
AH8
CPU
PCI_PIRQG#
PCI_PIRQH#
PCI_PIRQE#
PCI_PIRQF#
8
7
6
5
2 8.2K_0402_5%
U19A
A_RST#
RTC
R446 1
8.2K_0804_8P4R_5%
RP62
PCI EXPRESS INTERFACE
PCI_PIRQD#
PCI_PIRQC#
PCI_PIRQB#
PCI_PIRQA#
8
7
6
5
1
2
3
4
PCI_AD[0..31]
<22,23,27,29> PCI_AD[0..31]
RP61
1
2
3
4
Q38
MMBT3904_SOT23
R154 2
1
470_0402_5%
Q10
MMBT3904_SOT23
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
SB400-PCI-ECP/PCI/LPC/TRC
H_INIT#

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
18
of
58
+3VALW
2 10K_0402_5%
NIC_WAKE#
R142 1
2 4.7K_0402_5%
SB_SLP_S3#
R399 1
2 4.7K_0402_5%
SB_SLP_S5#
R143 1
2 4.7K_0402_5%
LID_SW#
R391 1
2 10K_0402_5%
BT_OFF
R389 1
2 10K_0402_5%
SYS_RESET#
BRD_ID1 BRD_ID0
feature
full-featured
de-featured
D
U19B
2 10K_0402_5%
LAN_LINK#
R146 1
2 10K_0402_5%
S3_STATE
R140 1
2 10K_0402_5%
USB_OC7#
R144 1
2 47K_0402_5%
THERM_SCI#
R160 1
R159 1
<38>
GATEA20
<18,38> KB_RST#
<6> H_THERMTRIP#
<27,28,40> LAN_LINK#
<38> RUNSCI_EC#
LAN_LINK#
RUNSCI_EC#
S3_STATE
SYS_RESET#
PREP#
<40> PREP#
PM_RSMRST#
<38,46> PM_RSMRST#
R147 1
2 2.2K_0402_5%
SB_SCLK
R148 1
2 2.2K_0402_5%
SB_SDAT
R152 1
2 10K_0402_5%
RUNSCI_EC#
<15>
R219 1
2 2.2K_0402_5%
GATEA20
R379 1
2 4510@ 10K_0402_5% BRD_ID0
R381 1
2 @ 10K_0402_5%
<32>
MUTE#
MUTE#
10K_0402_5%
R385 1
2 MUTE#
R378 1
2 BRD_ID0
7611@ 10K_0402_5%
BRD_ID1
AGP_STP#
AGP_BUSY#
NEW CARD_RST
BRD_ID1
R386 1
10K_0402_5% AGP_STP#
R380 1
10K_0402_5% AGP_BUSY#
R383 1
10K_0402_5% SD_DETECT#
D1
SB_INT
<26> NEW CARD_RST

<30>
SB_SPKR
<4,8,9,15> SB_SCLK
<4,8,9,15> SB_SDAT
<29> XMIT_OFF#
<40> EXPCRD_RST#
R384
SB_SCLK
SB_SDAT
XMIT_OFF#
EXPCRD_RST#
SD_DETECT#
2
10K_0402_5%
SB_GPIO12
RSMRST#
A23
14M_X1/OSC
B23
14M_X2
AK24
B25
C25
C23
D24
D23
A27
C24
A26
B26
B27
C26
C27
D26
SIO_CLK
ROM_CS#/GPIO1
GHI#/GPIO6
VGATE/GPIO7
AGP_STP#/GPIO4
AGP_BUSY#/GPIO5
FANOUT0/GPIO3
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
DDC2_SCL/GPIO11
DDC2_SDA/GPIO12
2 10K_0402_5% EXPCRD_RST#
R169 1
AC97_BITCLK
R412 1
2 10K_0402_5%
AC97_SDIN0
R403 1
2 10K_0402_5%
AC97_SDIN1
R405 1
2 8.2K_0402_5%
AC97_SDIN2
R387 1
2 10K_0402_5%
BRD_ID1
R502 1
2 100K_0402_1% PM_RSMRST#
R149 1
2 10K_0402_5%
<30> AC97_BITCLK
<22,30> AC97_SDOUT
<30> AC97_SDIN0
NEW CARD_RST
<30> AC97_SYNC
<30> AC97_RST#
<22> SB_SPDIFO
AC97_BITCLK
1 R164
2 33_0402_5%
AC97_SDIN0
AC97_SDIN1
AC97_SDIN2
R173 2 33_0402_5%
1
G1
G2
H4
G3
G4
H1
H3
H2
AC_BITCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
AC_SDIN2
AC_SYNC
AC_RST#
SPDIF_OUT
AC97_BITCLK
2 10K_0402_5%
NC1
NC4
NC3
NC2
USB PWR
R377 1
J2
K3
J3
K2
AC97_RST#
A C97
2 10K_0402_5%
(NOT USED)
+3VALW
R409 1
R408
@ 10_0402_5%
BOM and layout modify
CPPE_DOCK#
CPPE_NC#
SB_LOW_BAT#
WAKEUP_NC#
THERM_SCI#
BT_DETECT#
LID_SW#
USB_OC7#
CPPE_DOCK# <15,40>
CPPE_NC# <26>
C590
@ 10P_0402_25V8K
2
A11
B11
USBP7+
USBP7-
<34>
<34>
A10
B10
USBP6+
USBP6-
<26>
<26>
USB_HSDP5+
USB_HSDM5-
A14
B14
USBP5+
USBP5-
<34>
<34>
USB_HSDP4+
USB_HSDM4-
A13
B13
USBP4+
USBP4-
<34>
<34>
USB_HSDP3+
USB_HSDM3-
A18
B18
USBP3+
USBP3-
<40>
<40>
USB_HSDP2+
USB_HSDM2-
A17
B17
USBP2+
USBP2-
<34>
<34>
USB_HSDP1+
USB_HSDM1-
A21
B21
USBP1+
USBP1-
<34>
<34>
USB_HSDP0+
USB_HSDM0-
A20
B20
USBP0+
USBP0-
<40>
<40>
AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
C21
C18
D13
D10
D20
D17
C14
C11
+AVDDTX
AVDDC
A16
+AVDDC
AVSSC
B16
AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
A9
A12
A19
A22
B9
B12
B19
B22
C9
C10
C12
C13
C17
C19
C20
C22
D9
D11
D12
D14
D18
D19
D21
D22
+3VALW
+AVDDRX
SB_LOW_BAT#
LOW_BAT# <38>
+AVDDTX C592 1
+3VALW
2 10U_0805_10V4Z
C594 1
2 1U_0603_10V4Z
C572 1
C575 1
C576 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
L38
CHB2012U121_0805
2
+AVDDRX C565 1
+3VALW
2 10U_0805_10V4Z
C563 1
2 1U_0603_10V4Z
C571 1
C573 1
C574 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
L37 FBML10160808121LMT_0603
1
2
+3VALW
C564 1
2 10U_0805_10V4Z
C562 1
2 1U_0603_10V4Z
C570 1
2 0.1U_0402_16V4Z
5
P
2
SB_SLP_S3#
PM_RSMRST#
KBC_GPIO12 <38>
5
P
Y
3
10K_0402_5%
L41 CHB2012U121_0805
1
2
2
1
<26,38,40,42> SLP_S3#
R490
10K_0402_5%
D24
2
1
RB751V_SOD323
+3VALW
R554
0_0402_5%
+3VL
R388
+AVDDC
R145
10K_0402_5%
WAKEUP_NC#
+3VALW
+3VALW
WAKEUP_NC# <26>
THERM_SCI# <4>
BT_DETECT# <34>
LID_SW# <16,39>
R390 1
<46> SB_SLP_S5#
<39> ON/OFFBTN#
<38> SB_PWRGD
11.8K_0402_1%
T19 PAD
BT_DETECT#
USBCLK_EXT <15>
R393
USB_VREFOUT
OCP#
2 10K_0402_5%
SB400
48M_X1/USBCLK
TALERT#/TEMP_ALERT#/GPIO10
48M_X2
BLINK/GPM6#
USB_RCOMP
PCI_PME#/GEVENT4#
USB_VREFOUT
RI#/EXTEVNT0#
USB_ATEST1
SLP_S3#
USB_ATEST0
SLP_S5#
USB_OC0#/GPM0#
PWR_BTN#
USB_OC1#/GPM1#
PWR_GOOD
USB_OC2#/FANOUT1/GPM2#
SUS_STAT#
USB_OC3#/GPM3#
TEST1
USB_OC4#/GPM4#
TEST0
USB_OC5#/GPM5#
GA20IN
USB_OC6#/FAN_ALERT#/GEVENT6#
KBRST#
USB_OC7#/CASE_ALERT#/GEVENT7#
SMBALERT#/THRMTRIP#/GEVENT2#
LPC_PME#/GEVENT3#
USB_HSDP7+
LPC_SMI#/EXTEVNT1#
USB_HSDM7VOLT_ALERT#/S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
USB_HSDP6+
WAKE#/GEVENT8#
USB_HSDM6-
2 10K_0402_5%
R141 1
C6
D5
C4
D3
B4
E3
B3
C3
D4
2 10K_0402_5%
F2
2 10K_0402_5% E2
AJ26
AJ27
D6
C5
A25
D8
D7
D2
R382 1
OCP#
BT_OFF
PCI_PME#
NIC_WAKE#
SB_SLP_S3#
SB_SLP_S5#
ON/OFFBTN#
<52>
OCP#
<34>
BT_OFF
<23,29> PCI_PME#
<27> NIC_WAKE#
A15
B15
C15
D16
C16
D15
B8
C8
C7
B7
B6
A6
B5
A5
PREP#
USB INTERFACE
PCI_PME#
2 10K_0402_5%
ACPI/WAKE UP EVENTS
2 10K_0402_5%
R156 1
CLK / RST
R392 1
+3VS
Board ID Settings
R397 1
GPIO
U43
@ TC7SH08FU_SSOP5
U12
TC7SH08FU_SSOP5
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/11
Title
SB400 USB/ACPI/AC97/GPIO
2

Custom
Date:
Rev
0.4
LA-2541
Sheet
1
19
of
58
PD_D[0..15]
<35> PD_D[0..15]
SD_D[0..15]
<35> SD_D[0..15]
U19C
AK19
AJ19
SATA_TX1+
SATA_TX1-
AK18
AJ18
SATA_RX1SATA_RX1+
AK14
AJ14
SATA_TX2+
SATA_TX2-
AK13
AJ13
SATA_RX2SATA_RX2+
AK11
AJ11
SATA_TX3+
SATA_TX3-
AK10
AJ10
SATA_RX3SATA_RX3+
AJ15
SATA_CAL
AJ16
SATA_X1
AK16
SATA_X2
SATA_ACT#
AH15
PLLVDD_SATA
AH16
XTLVDD_SATA
AG10
AG14
AH12
AG12
AG18
AG21
AH18
AG20
AVDD_SATA_1
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_4
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
AVDD_SATA_8
AG9
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AH9
AG11
AG15
AG17
AG19
AG22
AG23
AF9
AH17
AH23
AH13
AH20
AK9
AJ12
AK17
AK23
AH10
AJ23
AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
AVSS_SATA_21
AVSS_SATA_22
AVSS_SATA_23
AVSS_SATA_24
AVSS_SATA_25
AVSS_SATA_26
AVSS_SATA_27
AVSS_SATA_28
AVSS_SATA_29
AVSS_SATA_30
AVSS_SATA_31
AVSS_SATA_32
PIDE_IORDY
PIDE_IRQ
PIDE_A0
PIDE_A1
PIDE_A2
PIDE_DACK#
PIDE_DRQ
PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#
AD30
AE28
AD27
AC27
AD28
AD29
AE27
AE30
AE29
AC28
AC29
PD _IORDY
PD_IRQA
PD_A0
PD_A1
PD_A2
PD_DACK#
PD_DREQ#
PD_IOR#
PD_IOW#
PD_CS#1
PD_CS#3
PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15
AF29
AF27
AG29
AH30
AH28
AK29
AK28
AH27
AG27
AJ28
AJ29
AH29
AG28
AG30
AF30
AF28
PD_D0
PD_D1
PD_D2
PD_D3
PD_D4
PD_D5
PD_D6
PD_D7
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15
V29
T27
T28
U29
T29
V30
U28
W29
W30
R27
R28
SD _IORDY
SD_IRQA
SD_SBA0
SD_SBA1
SD_SBA2
SD_DACK#
SD_DREQ#
SD_SIOR#
SD_SIOW#
SD_SCS1#
SD_SCS3#
SIDE_D0/GPIO15
SIDE_D1/GPIO16
SIDE_D2/GPIO17
SIDE_D3/GPIO18
SIDE_D4/GPIO19
SIDE_D5/GPIO20
SIDE_D6/GPIO21
SIDE_D7/GPIO22
SIDE_D8/GPIO23
SIDE_D9/GPIO24
SIDE_D10/GPIO25
SIDE_D11/GPIO26
SIDE_D12/GPIO27
SIDE_D13/GPIO28
SIDE_D14/GPIO29
SIDE_D15/GPIO30
V28
W28
Y30
AA30
Y28
AA28
AB28
AB27
AB29
AA27
Y27
AA29
W27
Y29
V27
U27
SD_D0
SD_D1
SD_D2
SD_D3
SD_D4
SD_D5
SD_D6
SD_D7
SD_D8
SD_D9
SD_D10
SD_D11
SD_D12
SD_D13
SD_D14
SD_D15
AVSS_SATA_33
AVSS_SATA_34
AVSS_SATA_35
AVSS_SATA_36
AVSS_SATA_37
AVSS_SATA_38
AVSS_SATA_39
AVSS_SATA_40
AVSS_SATA_41
AVSS_SATA_42
AVSS_SATA_43
AVSS_SATA_44
AVSS_SATA_45
AG13
AH22
AK12
AH11
AJ17
AH14
AH19
AJ20
AH21
AJ9
AG16
AK15
AK20
SIDE_IORDY
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DACK#
SIDE_DRQ
SIDE_IOR#
SIDE_IOW#
SIDE_CS1#
SIDE_CS3#
SECONDARY ATA 66/100
AK8
SB400
PRIMARY ATA 66/100
SATA_RX0SATA_RX0+
SERIAL ATA
SATA_TX0+
SATA_TX0-
AK21
AJ21
SERIAL ATA POWER
AK22
AJ22
PD_IORDY <35>
PD_IRQA <35>
PD_A0
<35>
PD_A1
<35>
PD_A2
<35>
PD_DACK# <22,35>
PD_DREQ# <35>
PD_IOR# <35>
PD_IOW# <35>
PD_CS#1 <35>
PD_CS#3 <35>
SD_IORDY <35>
SD_IRQA <35>
SD_SBA0 <35>
SD_SBA1 <35>
SD_SBA2 <35>
SD_DACK# <35>
SD_DREQ# <35>
SD_SIOR# <35>
SD_SIOW# <35>
SD_SCS1# <35>
SD_SCS3# <35>
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
SB400 IDE/SATA
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
20
of
58
+3VS
U19D
2 22U_1206_10V4Z
C595
C599
C603
C613
C620
C623
C611
C617
C630
C624
C577
C616
C631
C612
C622
C621
C567
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A30
D30
E24
E25
J5
K1
K5
N5
P5
R1
U5
U26
U30
V5
V26
Y1
Y26
AA5
AA26
AB5
AC30
AD5
AD26
AE1
AE5
AE26
AF6
AF7
AF24
AF25
AK1
AK4
AK26
AK30
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VS
C302 1
C289 1
2 22U_1206_10V4Z
2 22U_1206_10V4Z
C614
C609
C615
C628
C627
C618
C619
C608
C625
C601
C626
C602
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
M12
M13
M18
M19
N12
N13
N18
N19
V12
V13
V18
V19
W12
W13
W18
W19
+3VALW
C244 1
2 22U_1206_10V4Z
C566
C568
C578
C579
C580
2
2
2
2
2
1
1
1
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VALW
C597 1
2 10U_0805_10V4Z
C587 1
C586 1
C585 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
C583
C582
C581
C584
2
2
2
2
C252 2
1
1
1
1
+AVDD_CK
+1.8VS
R4511
+V5_VREF
2 1K_0402_5%
2
D10
C629
0.1U_0402_16V4Z
L39
FBM-L11-321611-260-LMT_1206
2
+3VS
C292
1U_0603_10V4Z
1
1
+5VS
RB751V_SOD323
1 0.1U_0402_16V4Z
+1.2V_HT
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C559 1
2 10U_0805_10V4Z
C561 1
2 1U_0603_10V4Z
C569 1
2 0.1U_0402_16V4Z
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28
VDDQ_29
VDDQ_30
VDDQ_31
VDDQ_32
VDDQ_33
VDDQ_34
SB400
POWER
C286 1
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
A3
A7
E6
E7
E1
F5
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
E9
E10
E20
E21
S5_1.8V_1
S5_1.8V_2
S5_1.8V_3
S5_1.8V_4
E13
E14
E16
E17
USB_PHY_1.8V_1
USB_PHY_1.8V_2
USB_PHY_1.8V_3
USB_PHY_1.8V_4
C30
CPU_PWR
AG6
V5_VREF
A24
B24
AVDDCK
AVSSCK
A4
A8
A29
B28
C1
E5
E8
E11
E12
E15
E18
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
E19
E22
E23
E26
E30
F1
F4
G5
H5
J1
J4
K4
L5
M5
P1
R5
R26
T5
T26
T30
W1
W5
W26
Y5
AB26
AB30
AC5
AC26
AD1
AF5
AF8
AF23
AF26
AG8
AJ1
AJ24
AJ30
AK5
AK25
M14
M15
M16
M17
N14
N15
N16
N17
P12
P13
P14
P15
P16
P17
P18
P19
R12
R13
R14
R15
R16
R17
R18
R19
T12
T13
T14
T15
T16
T17
T18
T19
U12
U13
U14
U15
U16
U17
U18
U19
V14
V15
V16
V17
W14
W15
W16
W17
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/11
Title
SB400 Power/GND
Custom
Date:
Rev
0.4
LA-2541
Sheet
21
of
58
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VALW
+3VS
+3VALW
R428
10K_0402_5%
R422
R183
10K_0402_5%
@ 10K_0402_5%
@ 10K_0402_5%
R184
@ 10K_0402_5%
NB STRAPS(internal
pulled up)
R421
10K_0402_5%
2
R418
R172
10K_0402_5%
@ 10K_0402_5%
@ 10K_0402_5%
R170
R396
10K_0402_5%
R168
R406
10K_0402_5%
<13> LOAD_ROM#
R341
@ 3K_0402_5%
R426
R180
@ 10K_0402_5%
<13> SPMEM_EN#
10K_0402_5%
1
R185
10K_0402_5%
R427
@ 10K_0402_5%
R425
@ 10K_0402_5%
10K_0402_5%
R417
R178
@ 10K_0402_5%
1
10K_0402_5%
2
R171
10K_0402_5%
2
R163
R404
@ 0_0402_5%
<18> AUTO_ON#
<19,30> AC97_SDOUT
<18> RTC_CLK
<19> SB_SPDIFO
<18,29> CLK_PCI_MINI
<18,38> CLK_PCI_EC
<18,37> CLK_PCI_SIO
<18> CLK_PCI6
<18> CLK_PCI7
<18> CLK_PCI8
<18,27> CLK_PCI_LAN
@
2
REQUIRED STRAPS
R342
3K_0402_5%
ACPWRON
AUTO_ON#
AC97_SDOUT
RTC_CLK
SB_SPDIFO
USE
DEBUG
STRAPS
INTERNAL
RTC
SIO 24MHz
CLK_PCI_LAN
CLK_PCI_MINI
CLK_PCI_EC
CLK_PCI_SIO
CLK_PCI6
USB PHY
PWRDOWN
DISABLE
INTERNAL
48MHz
14MHz OSC
MODE
CPU I/F = K8
DE FAULT
DE FAULT
DE FAULT
DE FAULT
CLK_PCI7
PCI_CLK8
LOAD_ROM#:LOAD ROM STRAP ENABLE strap
PULL
HIGH
MANUAL
PWR ON
DE FAULT
48MHz XTAL
MODE
DE FAULT
PULL
LOW
AUTO
PWR
ON
IGNORE
DEBUG
STRAPS
EXTERNAL
RTC (NOT
SUPPORTED
W/ IT8712 )
DE FAULT
SIO 48MHz
48MHz OSC /
Clock buffer
MODE
DE FAULT
DE FAULT
ROM TYPE
High, LOAD ROM STRAP DISABLE
H,H = PCI ROM
USB PHY
PWRDOWN
ENABLE
14MHz XTAL
MODE
EXTERNAL
48MHz
CPU I/F = P4
Low, LOAD ROM STRAP ENABLE
H,L = PMC LPC ROM
SPMEM_EN#:SIDE PORT MEMORY ENABLE strap
L,H = NORMAL LPC ROM
DE FAULT
High, SIDE PORT MEMORY DISABLE
L,L = FWH ROM
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
Low, SIDE PORT MEMORY ENABLE

+3VS
R434
@ 10K_0402_5%
R437
R431
@ 10K_0402_5%
R194
10K_0402_5%
@ 10K_0402_5%
2
R442
@ 10K_0402_5%
R432
10K_0402_5%
10K_0402_5%
PD_DACK#
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
R439
1
R433
10K_0402_5%
R430
10K_0402_5%
2
10K_0402_5%
10K_0402_5%
R195
@ 10K_0402_5%
R440
R202
R204
R188
R200
R429
@ 1K_0402_5%
@ 10K_0402_5%
@ 10K_0402_5%
@ 10K_0402_5%
@ 10K_0402_5%
2
<20,35>
<18,23,27,29>
<18,23,27,29>
<18,23,27,29>
<18,23,27,29>
<18,23,27,29>
<18,23,27,29>
<18,23,27,29>
<18,23,27,29>
<18,23,27,29>
R199
R187
10K_0402_5%
10K_0402_5%
R203
R198
10K_0402_5%
DEBUG STRAPS
PULL
HIGH
PULL
LOW
PD_DACK#
PCI_AD31
USE
LONG
RESET
PLL CHARGE
PUMP CTRL
BIT 1 HI
PLL CHARGE
PUMP CTRL
BIT 0 HI
PCI_AD30
PLL VCO
CTRL BIT
1 HI
PLL VCO
CTRL BIT
0 HI
DE FAULT
DE FAULT
DE FAULT
DE FAULT
DE FAULT
USE
SHORT
RESET
PLL CHARGE
PUMP CTRL
BIT 1 LO
PLL CHARGE
PUMP CTRL
BIT 0 LO
PLL VCO
CTRL BIT
1 LO
PLL VCO
CTRL BIT
0 LO
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
BYPASS
PCI PLL
BYPASS
ACPI
BCLK
BYPASS IDE
PLL
USE EEPROM
PCIE STRAPS
USE USB
PLL
USE PCI
PLL
USE
ACPI
BCLK
USE IDE
PLL
USE DEFAULT
PCIE STRAPS
BY PASS
USB PLL
DE FAULT
DE FAULT
DE FAULT
DE FAULT
DE FAULT
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
Hardware Strap
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
22
of
58
+3VS
1 1
1U_0603_10V4Z
MSBS_SDCMD_SMWE#
1B
CB_SDCLK_SMRE#
4
5
2OE#
2A
<25> SDCLK_SMRE#
SDCLK_SMRE#
MC_PWR_CTRL_0
MC_PWR_CTRL_1
SD_CD#
MS_CD#
SM_CD#
7611@ 0_0402_5%
7611@ 0_0402_5%
7611@ 0_0402_5%
7611@ 0_0402_5%
7611@ 0_0402_5%
7611@ 0_0402_5%
G5
F3
H5
G3
G2
G1
MS_CLK/SD_CLK/SM_EL_WP#
MS_BS/SD_CMD/SM_WE#
MS_DATA3/SD_DAT3/SM_D3
MS_SDIO(DATA0)/SD_DAT0/SM_D0
2 7611@ 0_0402_5%
J5
J3
H3
J6
J1
J2
H7
SD_CLK/SM_RE#/SC_GPIO1
SD_CMD/SM_ALE/SC_GPIO2
SD_DAT0/SM_D4/SC_GPIO6
SD_WP/SM_CE#
<25> MSCLK_SDCLK_SMELWP#
<25> CB_MSBS_SDCMD_SMWE#
<25> MSD3_SDD3_SMD3
<25> MSD2_SDD2_SMD2
<25> MSD1_SDD1_SMD1
<25> MSD0_SDD0_SMD0
1
1
1
1
1
1
CB_SDCLK_SMRE#
R209 1
<25> SDCMD_SMALE
<25> SDD0_SMD4
<25> SDD1_SMD5
<25> SDD2_SMD6
<25> SDD3_SMD7
<25> CB_SDWP#_SMCE#
<25>
2
2
2
2
2
2
SMCLE
CB_SM_RB#
TI requires to pull high this pin

+5VS
1
R208
R240 1
R247 1
+VDDPLL
1
C332
SC_CD#
SC_CLK
SC_RST
SC_VCC_5V
SC_DATA
SC_OC#
SC_PWR_CTRL
2 220_0402_5%
4510@
P12
W17
2 220_0402_5%
T19
2
4510@ 0.1U_0402_16V4Z
CLK_48M_CB
1
2
R532 7611@ 0_0402_5%
M1
VR_PORT
VR_PORT
VCCP
VCCP
M19
H1
W10
W3
PAR
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
REQ#
GNT#
P9
V7
R8
U7
W8
N8
W5
V8
U8
U1
T2
PCICLK
PCIRST#
GRST#
RI_OUT#/PME#
P5
R3
T1
T3
SUSPEND#
R2
SPKROUT
L7
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
N3
M5
P1
P2
P3
N5
R1
TEST0
NC
RSVD
CLK_48
N12
U14
U16
R533
0_0402_5%
4510@
SCL
SDA
M3
M2
VR_EN#
H2
SNC1R21GHK_PBGA288
C331
1
PCI_PME# <19,29>
Q18
2N7002_SOT23
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
R235
1
100_0402_5%
PCI_PAR <18,27,29>
PCI_FRAME# <18,27,29>
PCI_TRDY# <18,27,29>
PCI_IRDY# <18,27,29>
PCI_STOP# <18,27,29>
PCI_AD20
2
PCI_PERR# <18,27,29>
PCI_SERR# <18,27,29,38>
PCI_REQ#2 <18>
PCI_GNT#2 <18>
R227
2
4.7K_0402_5%
PCM_SPK#
C314
<18,37,38>
+3VS
220P_0603_50V8J
PM_CLKRUN# <18,27,29,37,38>
R215 1
R229 1
R231
10K_0402_5%
2+VDDPLL
7611@ 0.1U_0402_16V4Z
CARDREADER LED
D17
GREEN
7611@
12-21SYGC/S530-E1/TR8_GRN
1 1
R495
1
2
2
7611@ 1K_0402_5%
24.576MHZ_16P_XSL024576FG1H
R239
5.1K_0603_1%
1
R243
1K_0402_5%
Q45
7611@
MMBT3904_SOT23
C324
1U_0603_10V4Z
R246
1K_0402_5%
A
Compal Secret Data

2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
CardBus Controller TI7611
4
XTPBIAS1
R496
7611@
220_0402_5%
R556
@ 10K_0402_5%
XTPB1+
XTPB1-
2 1
C342 10P_0402_50V8J
56.2_0603_1%
@ 10P_0402_25V8K
2
R242
56.2_0603_1%
CLOSE TO CHIP
+3VS
when VR_EN# is low, internal

regulator is actived
<25> CARD_LED
X_OUT
JP10
SUYIN_020204FR004S506ZL
R241
EEPROM is unused, SCL/SDA must be

pulled down to GND with 220ohm resistor.
VR_EN#
X2
2
C112
4
3
2
1
2 220_0402_5%
2
220_0402_5%
If
R253
@ 1M_0402_5%
2
1
CLOSE TO CHIP
PCI_PIRQE# <18>
PCI_PIRQF# <18>
SIRQ
R228 1
2
CARD_LED 4.7K_0402_5%
C325
4
3
2
1
PCM_SPK# <30>
Layout change
10P_0402_50V8J
X_IN
@ 10_0402_5%
A
56.2_0603_1% 1U_0603_10V4Z
1
C291
@ 10P_0402_25V8K
2
+3VS
CLK_48M_CB
C343
R244
56.2_0603_1%
XTPBIAS0
XTPA0+
XTPA0XTPB0+
XTPB0-
@ 10_0402_5%
CB_PME#
R226 1
R245
CLK_PCI_PCM
CLK_PCI_PCM <18>
PCI_RST# <18,26,27,29,32>
put C331 as close to

controller as possible
R93
R531
@ 33K_0402_5%
<15> CLK_48M_CB
2
7611@ 10K_0402_5%
VCCD1#
L2
K5
K3
K7
L1
L3
L5
AGND
AGND
AGND
<26>
SM_CLE/SC_GPIO0
SM_R#/SC_RFU
SM_PHYS_WP#/SC_FCB
J7
K1
K2
W4
W7
W9
W11
C/BE3#
C/BE2#
C/BE1#
C/BE0#
CB_PME#
R224
R536
R537
R538
R539
R540
Layout change
PCM_SPK#
SD_CD#
MS_CD#
SM_CD#
R225
10K_0402_5%
BOM
<25>
<25>
change<25>
+3VS
F1
F2
E3
F5
F6
<25> MC_PWRON#
SDWP#_SMCE# <25>
PC0(TEST1)
PC1(TEST2)
PC2(TEST3)
SDWP#_SMCE#
R12
U13
V13
XI
3B
XO
R18
GND
<25>
R19
X_IN
SM_RB#
X_OUT
PHY_TEST_MA
CPS
CNA
R17
M11
P15
3A
PHY_TEST
CPS
CNA
2B
PCI_AD[0..31] <18,22,27,29>
2 CNA
10K_0402_5%
PCI_CBE#[0..3] <18,27,29>
TPBIAS1
TPA1+
TPA1TPB1+
TPB1-
SM_RB#
CB_SDWP#_SMCE#
XTPB1+
XTPB1-
U17
V18
W18
V16
W16
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
U2
V1
V2
U3
W2
V3
U4
V4
V5
U5
R6
P6
W6
V6
U6
R7
V9
U9
R9
N9
V10
U10
R10
N10
V11
U11
R11
W12
V12
U12
N11
W13
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
XTPBIAS1
R251
11
10
TPBIAS0
TPA0+
TPA0TPB0+
TPB0-
CB_SM_RB#
4B
3OE#
2MC_PWRON#
7611@ 10K_0402_5%
U15
V15
W15
V14
W14
12
7611@ SN74CBTLV3125PWR_TSSOP14
XTPBIAS0
XTPA0+
XTPA0XTPB0+
XTPB0-
PCI7621/7611/7421/7411
R213
R0
R1
VSPLL
VSPLL
1 R250
2 PHY_TEST
4.7K_0402_5%
VDPLL_33
VDPLL_15
R252 6.34K_0402_1%
U18
1
2
U19
CPS
2
4.7K_0402_5%
P14
T17
R236
1
AVDD
AVDD
AVDD
U23B
V19
T18
R13
R14
V17
+3VS
2 2
MC_PWRON#
4A
5
6
7
8
<25> MSBS_SDCMD_SMWE#
14
13
GND1
GND2
GND3
GND4
0.01U_0402_16V7K 1
0_0603_5%
C330
10U_0805_10V4Z
VCC
4OE#
C319
C334
1OE#
1A
C303
+3VS
U41
MC_PWRON#
1
CB_MSBS_SDCMD_SMWE# 2
+3VS
R254
C317
C326
+3VS_PLL
C333
C297
10U_0805_10V4Z +3VS
+VDDPLL
1U_0603_10V4Z
+3VS_PLL
0.01U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
23
of
58
S1_D[0:15]
S1_D[0..15] <26>
S1_A[0..25]
+S1_VCC
<26> S1_IOWR#
<26> S1_IORD#
<26> S1_OE#
<26> S1_CE2#
<26> S1_REG#
<26> S1_CE1#
S1_WAIT#
S1_INPACK#
S1_WE#
S1_BVD1
S1_WP
2 S1_CLK
S1_RDY#
<26> S1_RST
B
<26> S1_BVD2
<26>
<26>
<26>
<26>
S1_CD1#
S1_CD2#
S1_VS1
S1_VS2
+3VS
D
S1_REG#
S1_A12
S1_A8
S1_CE1#
C5
F9
B10
G12
A_CC/BE3#/A_REG#
A_CC/BE2#/A_A12
A_CC/BE1#/A_A8
A_CC/BE0#/A_CE1#
S1_A13
G10
S1_A23
C8
S1_A22
A8
S1_A15
B8
S1_A20
A9
S1_A21
C9
S1_A19
E10
S1_A14
F10
S1_WAIT#
B3
S1_INPACK#
E7
S1_WE#
B9
S1_BVD1
B2
S1_WP
C3
E9
S1_RDY#
C4
D19
K19
B15
A16
B16
A17
C16
D17
C19
D18
E17
E19
G15
F18
H14
H15
G17
K17
L13
K18
L15
L17
L18
L19
M17
M14
M15
N19
N18
N15
M13
P18
P17
P19
B_CC/BE3#/B_REG#
B_CC/BE2#/B_A12
B_CC/BE1#/B_A8
B_CC/BE0#/B_CE1#
F15
G18
K14
M18
A_CPAR/A_A13
A_CFRAME#/A_A23
A_CTRDY#/A_A22
A_CIRDY#/A_A15
A_CSTOP#/A_A20
A_CDEVSEL#/A_A21
A_CBLOCK#/A_A19
A_CPERR#/A_A14
A_CSERR#/A_WAIT#
A_CREQ#/A_INPACK#
A_CGNT#/A_WE#
A_CSTSCHG/A_BVD1(STSCHG/RI)
A_CCLKRUN#/A_WP(IOIS16)
A_CCLK/A_A16
A_CINT#/A_READY(IREQ)
B_CPAR/B_A13
B_CFRAME#/B_A23
B_CTRDY#/B_A22
B_CIRDY#/B_A15
B_CSTOP#/B_A20
B_CDEVSEL#/B_A21
B_CBLOCK#/B_A19
B_CPERR#/B_A14
B_CSERR#/B_WAIT#
B_CREQ#/B_INPACK#
B_CGNT#/B_WE#
B_CSTSCHG/B_BVD1(STSCHG/RI)
B_CCLKRUN#/B_WP(IOIS16)
B_CCLK/B_A16
B_CINT#/B_READY(IREQ)
K13
G19
H17
J13
J17
H19
J19
J18
B18
E18
J15
F14
A18
H18
B19
A6
A_CRST#/A_RESET
S1_BVD2
A2
A_CAUDIO/A_BVD2(SPKR#)
B_CRST#/B_RESET
F17
S1_CD1#
S1_CD2#
S1_VS1
S1_VS2
C15
E5
A3
E8
S1_D14
S1_D2
S1_A18
B13
D2
C10
B_CAUDIO/B_BVD2(SPKR#)
C17
A_CCD1#/A_CD1#
A_CCD2#/A_CD2#
A_CVS1/A_VS1#
A_CVS2/A_VS2#
B_CCD1#/B_CD1#
B_CCD2#/B_CD2#
B_CVS1/B_VS1#
B_CVS2/B_VS2#
N13
B17
C18
F19
A_CRSVD/A_D14
A_CRSVD/A_D2
A_CRSVD/A_A18
B_CRSVD/B_D14
B_CRSVD/B_D2
B_CRSVD/B_A18
N17
A15
K15
A_USB_EN
B_USB_EN
G7
G8
G13
H13
J9
J10
J11
K9
K10
K11
L8
L9
L10
L11
L12
M8
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C322
10P_0402_50V8J
B_CAD31/B_D10
B_CAD30/B_D9
B_CAD29/B_D1
B_CAD28/B_D8
B_CAD27/B_D0
B_CAD26/B_A0
B_CAD25/B_A1
B_CAD24/B_A2
B_CAD23/B_A3
B_CAD22/B_A4
B_CAD21/B_A5
B_CAD20/B_A6
B_CAD19/B_A25
B_CAD18/B_A7
B_CAD17/B_A24
B_CAD16/B_A17
B_CAD15/B_IOWR#
B_CAD14/B_A9
B_CAD13/B_IORD#
B_CAD12/B_A11
B_CAD11/B_OE#
B_CAD10/B_CE2#
B_CAD9/B_A10
B_CAD8B_D15
B_CAD7/B_D7
B_CAD6/B_D13
B_CAD5/B_D6
B_CAD4/B_D12
B_CAD3/B_D5
B_CAD2/B_D11
B_CAD1/B_D4
B_CAD0/B_D3
PCI7621/7611/7421/7411
S1_RST
S1_CD2#
VCCB
VCCB
A_CAD31/A_D10
A_CAD30/A_D9
A_CAD29/A_D1
A_CAD28/A_D8
A_CAD27/A_D0
A_CAD26/A_A0
A_CAD25/A_A1
A_CAD24/A_A2
A_CAD23/A_A3
A_CAD22/A_A4
A_CAD21/A_A5
A_CAD20/A_A6
A_CAD19/A_A25
A_CAD18/A_A7
A_CAD17/A_A24
A_CAD16/A_A17
A_CAD15/A_IOWR#
A_CAD14/A_A9
A_CAD13/A_IORD#
A_CAD12/A_A11
A_CAD11/A_OE#
A_CAD10/A_CE2#
A_CAD9/A_A10
A_CAD8/A_D15
A_CAD7/A_D7
A_CAD6/A_D13
A_CAD5/A_D6
A_CAD4/A_D12
A_CAD3/A_D5
A_CAD2/A_D11
A_CAD1/A_D4
A_CAD0/A_D3
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
D1
C1
D3
C2
B1
B4
A4
E6
B5
C6
B6
G9
C7
B7
A7
A10
E11
G11
C11
B11
C12
B12
A12
E12
C13
F12
A13
C14
E13
A14
B14
E14
H8
H9
H10
H11
H12
J8
M7
J12
M9
M10
M12
K8
K12
N7
A5
A11
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
E2
E1
S1_CD1#
+3VS
U23A
<26>
<26>
<26>
<26>
R237
<26>
S1_A16
1
33_0402_5%
<26>
S1_A[0..25] <26>
VCCA
VCCA
DATA
CLOCK
LATCH
C316
1U_0603_10V4Z
C323
0.1U_0402_16V4Z
C311
0.1U_0402_16V4Z
1
C327
0.01U_0402_16V7K
C304
0.01U_0402_16V7K
+3VS
C296
1U_0603_10V4Z
C305
0.1U_0402_16V4Z
1
C328
0.01U_0402_16V7K
C329
0.1U_0402_16V4Z
C308
0.01U_0402_16V7K
+S1_VCC
C313
0.1U_0402_16V4Z
C307
0.1U_0402_16V4Z
R534
1
2
4510@ 0_0402_5%
N1
L6
N2
TPS_DATA
TPS_CLK
TPS_LATCH
TPS_DATA <26>
TPS_CLK <26,38>
TPS_LATCH <26>
SNC1R21GHK_PBGA288
C321
10P_0402_50V8J
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
CardBus controller TI 7611
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
24
of
58
+3VS
+SM_VCC
+SD_MS_VCC
U42
IN
3
R553
OUT
ON#
GND
SET
1
C690
7611@
0.1U_0402_16V4Z
2
<23>
MC_PWRON#
R535
1
2
7611@ 10K_0402_5%
R525
MSBS_SDCMD_SMWE#
1
2
7611@ 10K_0402_5%
SM_RB#
SM_RB#
<23> MSBS_SDCMD_SMWE#
<23> SDCLK_SMRE#
SDCLK_SMRE#1
R526 2
7611@ 10K_0402_5%
<23> SDWP#_SMCE#
SDWP#_SMCE#1
R527 2
7611@ 10K_0402_5%
@ 10K_0402_1%
Q50
7611@ SI2301BDS_SOT23
+SD_MS_VCC
R545
7611@
100K_0603_5%
R546
7611@
100K_0402_5%
C688
7611@
10U_0805_10V4Z
+SM_VCC
R221
7611@
100K_0603_5%
MC_PWRON#
C298
7611@
10U_0805_10V4Z
Q55
7611@ SI2301BDS_SOT23
+3VS
@ AATI4610AIGV-T1_SOT23-5
R547
7611@
100K_0402_5%
SM_CTRL#
JP25
<23>
SD_CD#
1
7611@
<23>
MS_CD#
1
7611@
2
RB751V_SOD323
D42
2
RB751V_SOD323
D41
2
G
<23>
<23>
<23>
<23>
7611@
2N7002_SOT23
Q56
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
<23> SDD0_SMD4
<23> SDD1_SMD5
<23> SDD2_SMD6
<23> SDD3_SMD7
<23> MSCLK_SDCLK_SMELWP#
1 R214
2
7611@ 0_0402_5%
<23> SDCMD_SMALE
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
SDD0_SMD4
SDD1_SMD5
SDD2_SMD6
SDD3_SMD7
34
33
32
31
21
22
23
24
MSCLK_SDCLK_SMELWP#
SM_PHYS_WP#
MSBS_SDCMD_SMWE#
SDCMD_SMALE
35
43
36
37
25
3
29
26
27
28
30
2
38
45
46
SM_CD#
+SM_VCC
SM_RB#
SDCLK_SMRE#
SDWP#_SMCE#
1
C299
7611@
0.1U_0402_16V4Z
2
<23>
MC_PWRON#
1
<23> MC_PWRON#
Layout change
Q17
7611@ 2N7002_SOT23
3
+3VS
2
G
<23> CARD_LED
SMCLE
SM-D0 / XD-D0
SM-D1 / XD-D1
SM-D2 / XD-D2
SM-D3 / XD-D3
SM-D4 / XD-D4
SM-D5 / XD-D5
SM-D6 / XD-D6
SM-D7 / XD-D7
SD-DAT3
SD-DAT2
SD-DAT1
5 IN 1 CONN SD-DAT0
SD-WP-SW
SD-CMD
SD_CLK
SD-VCC
N/C
SM_WP-IN / XD_WP-IN
SD-CD-SW
SM-WP-SW
SD-CD-COM
#SM_-WE / XD_-WE
#SM-ALE / XD-ALE
MS-DATA0
MS-DATA1
SM-LVD
MS-DATA2
SM-CD-SW
MS-DATA3
SM_-VCC / XD_-VCC
MS-SCLK
#SM_R/-B / XD_R/-B
MS-INS
#SM_-RE / XD_-RE
MS-BS
#SM_-CE / XD_-CE
MS-VCC
#SM_-CD
SM-CD-COM
XD-VCC
SM-CLE / XD-CLE
XD-CD
45
GND
46
GND
11
12
6
7
5
10
8
9
4
42
41
CB_SDWP#_SMCE# <23>
CB_MSBS_SDCMD_SMWE# <23>
+SD_MS_VCC
SD_CD#
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
MSCLK_SDCLK_SMELWP#
MS_CD#
CB_MSBS_SDCMD_SMWE#
15
14
16
18
19
17
13
20
40
39
1
44
MSD3_SDD3_SMD3
MSD2_SDD2_SMD2
MSD1_SDD1_SMD1
MSD0_SDD0_SMD0
CB_SDWP#_SMCE#
CB_MSBS_SDCMD_SMWE#
MSCLK_SDCLK_SMELWP#
+SD_MS_VCC
+SM_VCC
SM_CD#
7611_CONN@ TAITW_R007-010-N3
Layout change
R206
1
2
7611@
100K_0402_1%
D9
D8
7611@
RB751V_SOD323
1
7611@
RB751V_SOD323
SD_CD#
SM_CD#
SM_CD#
SD_CD#
SM_CD#
<23>
<23>
MS_CD#
1
C692
@ 0.1U_0402_16V4Z
C693
@ 0.1U_0402_16V4Z
SD_CD#
1
C694
@ 0.1U_0402_16V4Z
Close to card reader socket
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
Card reader socket
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
25
of
58
S1_D[0:15]
CardBus Power Switch
S1_D[0..15] <24>
S1_A[0..25]
S1_A[0..25] <24>
+3V_PEC
U20
4.7U_0805_10V4Z
C282
1
0.1U_0402_16V4Z
2
9
10
AVCC
AVCC
GND
11
17
18
NC1
NC2
NC5
NC6
NC7
NC8
23
22
16
6
0.1U_0402_16V4Z
2
C258
4.7U_0805_10V4Z
C275
1
C278
<24>
S1_CE1#
<24>
S1_OE#
0.1U_0402_16V4Z
2
<24>
<24>
4.7U_0805_10V4Z
S1_WE#
S1_RDY#
+S1_VCC
+S1_VPP
4.7U_0805_10V4Z
+S1_VCC
U16
TPS_CLK 1
43K_0402_5%
2
R230
12V
VCC
VCC
VCC
13
12
11
VPP
10
+S1_VPP
+5VS
5
6
<24>
<24>
<24>
<24>
OC
SHDN
VCCD1# <23>
TPS_LATCH
TPS_DATA
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
4510@ SNP1X11AIDBR_SSOP16
+S1_VCC
+S1_VPP
R193
4510@ 10K_0402_5%
16
GND
3.3V
3.3V
TPS_CLK
1
2
15
14
VCCD0
VCCD1
VPPD0
VPPD1
<24>
<24>
<24>
<24>
<24>
<24>
<24>
New Card Power Switch

3
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
<24> S1_CD2#
S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP
S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
<24> S1_CD1#
5V
5V
+3VS
3
4
<24> S1_WP
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#
S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
GND
GND
D3
USB_DD4
USB_D+
D5
CP_USB#
D6
RESERVED
D7
RESERVED
CE1#
SMB_CLK
A10
SMB_DATA
OE#
+1.5V
A11
+1.5V
A9
WAKE#
A8
+3.3VAUX
A13
PERST#
A14
+3.3V
WE#
+3.3V
READY
CLKREQ#
VCC
CP_PE#
VPP1
REFCLKA16
REFCLK+
A15
GND
A12
PERN0
A7
PERP0
A6
GND
A5
PETN0
A4
PETP0
A3
GND
A2
A1
SHIELD_GND
A0
SHIELD_GND
D0
SHIELD_GND
D1
SHIELD_GND
D2
WP
GND
GND
CD1#
D11
D12
D13
D14
D15
CE2#
VS1#
IORD#
IOWR#
A17
A18
A19
A20
A21
VCC
VPP2
A22
A23
A24
A25
VS2#
RESET
WAIT#
INPACK#
REG#
SPKR#
STSCHG#
D8
D9
D10
CD2#
GND
7611@ 0.1U_0402_16V4Z
CPUSB#
CPPE_NC#
R238 1
1.5Vin1
1.5Vin2
14
15
4
3
2
7611@ 100K_0402_5% 2
CPUSB#
CPPE#
STBY#
SHDN#
SYSRST#
Aux_out
20
1.5Vout1
1.5Vout2
16
17
OC#
23
RCLKEN
PERST#
22
9
1
10
12
13
24
11
PERST#
C310 1
WAKEUP_NC# <19>
+3V_PEC
+3VS_PEC
NC_CLKREQ# <15>
CPPE_NC# <19>
PCIECLK0# <15>
PCIECLK0 <15>
CPPE_NC#
PCIECLK0#
PCIECLK0
PCIE_MRX_C_PTX_N0 <12>
PCIE_MRX_C_PTX_P0 <12>
R222
100K_0402_5%
R223
100K_0402_5%
CPPE_NC#
CPUSB#
Near to Express Card slot.

+3VS_PEC
+3V_PEC
1
1
C306
C288
C290
4.7U_0805_10V4Z
2 7611@
0.1U_0402_16V4Z 4.7U_0805_10V4Z
2 7611@
2 7611@
+1.5VS_PEC
+3VS_PEC
C285
C287
0.1U_0402_16V4Z 4.7U_0805_10V4Z
2 7611@
2 7611@
2
7611@ 1U_0603_10V4Z
+3V_PEC 7611@ 1U_0603_10V4Z

C294 1
GND
<19,38,40,42> SLP_S3#
+3VALW
<13,18,35,37,38,39> NB_RST#
3.3Vaux_in
18
19
7
8
C295 1
2
+1.5VS_PEC
2
7611@ 1U_0603_10V4Z
NC_CLKREQ#
1
21
3.3Vout1
3.3Vout2
+1.5VS_PEC
3.3Vin1
3.3Vin2
C301 2
+3VALW
7611@ 0.1U_0402_16V4Z
1
+1.5VS
5
6
R201
10K_0402_5%
7611@
@ 2N7002_SOT23
2
G
PERST#
Q48
NC1
NC2
NC3
NC4
NC5
C300 2
1
7611@ 0.1U_0402_16V4Z
R196
10K_0402_5%
7611@
<19>
<19>
+3VALW
CONN@ JAE_PX20-BB2_LT
C309 2
USBP6USBP6+
3
4
5
6
U22
+3VS
USBP6USBP6+
CPUSB#
24
2
1
C259
1
7611@ SNP1X21DBR_SSOP24
C284
NC4
5V
5V
+3VS
AVPP
NC0
NC3
3.3V
14
13
+5VS
+S1_VCC
C283
8
19
12V
12V
+S1_VPP
0.1U_0402_16V4Z
2
C281
1
DATA
CLOCK
LATCH
RESET#
OC#
SHDN#
TPS_DATA
TPS_CLK
TPS_LATCH
PCI_RST#
<24>
<24,38>
<24>
<18,23,27,29,32>
20
7
3
4
5
12
15
21
JP22
TPS_DATA
TPS_CLK
TPS_LATCH
PCI_RST#
7611@
TPS2231PWPR_PWP24
4
2
G
3
<19> NEWCARD_RST
7611@
2N7002_SOT23
Q51
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
PCMCIA /Express card socket
D

Custom
Date:
Rev
0.4
LA-2541
Sheet

E
26
of
58
LAN_CTRL_2.5V
+3VALW
C22
0.1U_0402_16V4Z
1
1
C391
0.1U_0402_16V4Z
1
1
C401
2
2
2
4.7U_0805_10V4Z 0.1U_0402_16V4Z
+3V_LOM_PCI
1
2
L2 4401@ 0_0603_5%
+3VALW
+3VALW
C28
2
0.1U_0402_16V4Z
2
4
C389
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
LAN_IDSEL
A4
F2
F1
G3
H3
H1
J2
A2
J1
CLK_PCI_LAN A3
H2
C2
J3
C3
<19> NIC_WAKE#
0.1U_0402_16V4Z
1
10U_0805_10V4Z
2
D
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C385
2
2
0.1U_0402_16V4Z
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
1
C387
C388
2
2
0.1U_0402_16V4Z
C393
0.1U_0402_16V4Z
1
1
C386
C403
2
2
2
0.1U_0402_16V4Z 0.1U_0402_16V4Z
@ 0.1U_0402_16V4Z
1
1
C395
C394
@ 0.1U_0402_16V4Z
1
1
C656
C657
2
2
2
0.1U_0402_16V4Z @ 0.1U_0402_16V4Z
C658
C659
2
@ 0.1U_0402_16V4Z
U6B
TRD3+/(NC_E13)
TRD3-/(NC_E14)
TRD2+/(NC_D13)
TRD2-/(NC_D14)
TRD1+/(RDP)
TRD1-/(RDN)
TRD0+/(TDP)
TRD0-/(TDN)
E13
E14
D13
D14
C13
C14
B13
B14
REGSUP12/(NC_B9)
REGCTL12/(NC_B10)
REGSEN12/(REG18OUT)
B9
B10
A9
REGSUP25/(REGSUP18)
REGCTL25/(NC_C11)
REGSEN25/(REGSUP18)
B11
C11
C10
VESD1
VESD2
VESD3
LAN_MIDI3+
LAN_MIDI3LAN_MIDI2+
LAN_MIDI2LAN_MIDI1+
LAN_MIDI1LAN_MIDI0+
LAN_MIDI0-
+2.5V_LAN
P1
G2
A1
+3VALW
LAN_EEDA
LAN_EECLK
GPIO0/(NC_H12)
GPIO1/(NC_K13)
H12
K13
J13
LAN_EEWP 1
R310
LINKLED/(LINKLED10)
SPD100LED/(LINKLED100)
SPD1000LED/(COL_LED)
TRAFFICLED/(ACT_LED)
G13
H13
G12
G14
PLLVDD2/(PLLVDD)
NC_P7
H14
P7
J12
F4
A6
INTA
PCI_RST
GNT
REQ
TCK
TDI
TDO
TMS
TRST
2
+3VALW
5788@ 1K_0402_5%
LAN_LINK# <19,28,40>
R312 1
LAN_ACTIVITY#
2 5788@ 0_0402_5%
LAN_ACTIVITY# <28,40>
+1.2V_LAN_PLLVDD
20mils
+1.2V_LAN_PLLVDD
C12
D12
B12
A12
D11
XTALVDD
XTALO
XTALI
J14
N10
N11
NC_G11
NC_E10/(EEDATA_PXE)
NC_E11/(EECLK_PXE)
NC_H11
G11
E10
E11
H11
BIASVDD
RDAC
NC_A10
NC_C9
25MHZ_16P_XSL025000FK1H
0.1U_0402_16V4Z
1
1
L20
0_0603_5%
+1.2V_LAN
C397
LAN_TRST# 1
R38
2
2.2U_0805_16V4Z
LAN_X2
VSS_B7
VSS_D4
VSS_D5
VSS_D6
VSS_D7
VSS_D8
VSS_D9/(NC_D9)
VSS_E2
VSS_E5
VSS_E6
VSS_E7
VSS_E8
VSS_E9
VSS_F5
VSS_F6
VSS_F7
VSS_F8
VSS_F9
VSS_F10
VSS_G4
VSS_G5
VSS_G6
VSS_G7
VSS_G8
VSS_G9
VSS_G10
VSS_H9
VSS_K2
VSS_L6
VSS_L9
VSS_M6
VSS_M12
VSS_M13/(NC_M13)
VSS_N1
VSS_N12
VSS_N13
BCM5788M
/(BCM4401)
VDDIO-PCI_A7
VDDIO-PCI_B3
VDDIO-PCI_C5
VDDIO-PCI_E1
VDDIO-PCI_E4
VDDIO-PCI_G1
VDDIO-PCI_K3
VDDIO-PCI_L4
VDDIO-PCI_N6
VDDIO-PCI_P2
K14
L13
P11
+3VALW
A11
F11
K12
L12
VDDP_K14/(NC_K14)
AVDDL_F12/(AVDD_F12)
VDDP_L13/(NC_L13)AVDDL_F13/(AVDD_F13)
VDDP_P11/(NC_P11) AVDD_F14/(NC_F14)
AVDD_A13/(NC_A13)
VDDIO_A11
VDDIO_F11
VDDIO_K12
VDDIO_L12
C8
H4
H10
J4
K4
J11
K11
L7
L8
NC_C8
CLKRUN
NC_L11/(VSS_L11)
NC_H10
NC_L14/(VSS_L14)
NC_J4
NC_M8
NC_K4
NC_M9/(VREF)
NC_J11/(GPIO_1)LOW_POWER/(TESTMODE)
NC_K11/(GPIO_0)
NC_N8/(EXT_POR)
NC_L7
NC_N9/(DOUT)
NC_L8
NC_P9/(DIN)
PM_CLKRUN#
+2.5V_LAN
LAN_X1_R 1
2 LAN_X1
LAN_X2
R27
200_0402_1%
1.21K for BCM5788 1.27K for

BCM4401(P/N: SD034127100)
B7
D4
D5
D6
D7
D8
D9
E2
E5
E6
E7
E8
E9
F5
F6
F7
F8
F9
F10
G4
G5
G6
G7
G8
G9
G10
H9
K2
L6
L9
M6
M12
M13
N1
N12
N13
F12 +1.2V_LAN_AVDD
F13
F14 +2.5V_LAN_AVDD
A13
1
1
C398
2
0.1U_0402_16V4Z
L11
L14
M8
M9
M11
N8
N9
P9
1
R513
LAN_RDAC 1
R39
10mils
2
4401@ 0_0402_5%
1
2
R23 5788@ 10K_0402_5%
LAN_EEDI
LAN_EEDO
BCM5788M_FBGA196
C20
1
2
0_0603_5%
+2.5V_LAN
R24
5788@ 4.7K_0402_5%
C47
0.1U_0402_16V4Z
+3VALW
U2
LAN_EEDA
LAN_EECLK
LAN_EEDI
LAN_EEDO
A10
C9
1
2
3
4
BCM5788M_FBGA196
CS
SK
DI
DO
VCC
NC
NC
GND
8
7
6
5
LAN_EEWP
LAN_EECLK
LAN_EEDA
R22
2
0.1U_0402_16V4Z
5788@ 4.7K_0402_5%
U4
8 VCC
7 WP
6 SCL
5 SDA
4401@ AT93C46-10SI-2.7_SO8
20mils
C404
5788@ 0.1U_0402_16V4Z
2 1000P_0402_50V7K
1
L4
2
1.21K_0402_1%
20mils
1
2
+1.2V_LAN
L21
0_0603_5%
1
2
+2.5V_LAN
L5
5788@ 0_0603_5%
+3VALW
C405 1
10mils
+LAN_BIASVDD
A14
D10
VDDC_E12
VDDC_H5
VDDC_H6
VDDC_H7
VDDC_H8
VDDC_J5
VDDC_J6
VDDC_J7
VDDC_J8
VDDC_J9
VDDC_J10
VDDC_K5
VDDC_K6
VDDC_K7
VDDC_K8
VDDC_K9
VDDC_K10
VDDC_L5
VDDC_L10
VDDC_M14
VDDC_N14
VDDC_P8
VDDC_P12
VDDC_P13
VDDC_P14
+2.5V_LAN
2
4.7K_0402_5%
Y1
A7
B3
C5
E1
E4
G1
K3
L4
N6
P2
+3V_LOM_PCI
<18,23,29,37,38> PM_CLKRUN#
VAUXPRSNT
M66EN/(NC_F4)
PME
E12
H5
H6
H7
H8
J5
J6
J7
J8
J9
J10
K5
K6
K7
K8
K9
K10
L5
L10
M14
N14
P8
P12
P13
P14
+1.2V_LAN
+3VALW
LAN_CTRL_2.5V
P10
M10
IDSEL
FRAME
IRDY
TRDY
DEVSEL
STOP
PERR
SERR
PAR
PCI_CLK
<28>
<28>
<28>
<28>
<28>
<28>
<28>
<28>
+2.5V_LAN
LAN_CTRL_1.2V
2
+1.2V_LAN 5788@ 0_0402_5%
1
R313
EEDATA/(SPROM_CS)
EECLK/(SPROM_CLK)
BCM5788M GPIO2/(NC_J13)
/(BCM4401)
CBE3
CBE2
CBE1
CBE0
LAN_MDI3+
LAN_MDI3LAN_MDI2+
LAN_MDI2LAN_MDI1+
LAN_MDI1LAN_MDI0+
LAN_MDI0-
C23
+1.2V_LAN
C396
2 LAN_AUXPWR
1K_0402_5%
1
R311
B8
A8
C7
C6
B6
B5
A5
B4
B2
B1
C1
D3
D2
D1
E3
K1
L2
L1
M3
M2
M1
N2
N3
P3
N4
P4
M5
N5
P5
P6
M7
N7
PCI_CBE#3 C4
PCI_CBE#2
F3
PCI_CBE#1
L3
PCI_CBE#0 M4
<18> PCI_PIRQH#
<18,23,26,29,32> PCI_RST#
<18> PCI_GNT#3
<18> PCI_REQ#3
LAN_X1 1
C48
@ 18P_0402_50V8J
100_0402_5%
PCI_AD17 R41 1
<18,23,29> PCI_FRAME#
<18,23,29> PCI_IRDY#
<18,23,29> PCI_TRDY#
<18,23,29> PCI_DEVSEL#
<18,23,29> PCI_STOP#
<18,23,29> PCI_PERR#
<18,23,29,38> PCI_SERR#
<18,23,29> PCI_PAR
<18,22> CLK_PCI_LAN
2
4
+3VALW
1
2
R40
@ 10_0402_5%
Q6
5788@ BCP69_SOT223
+1.2V_LAN
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
CLK_PCI_LAN
<18,23,29>
<18,23,29>
<18,23,29>
<18,23,29>
0.1U_0402_16V4Z
1
C392
C390
2
0.1U_0402_16V4Z
U6A
+2.5V_LAN
PCI_AD[0..31]
<18,22,23,29> PCI_AD[0..31]
LAN_CTRL_1.2V
2
@ 0_0603_5%
C24
20mils
2
2
4.7U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
1
1
C37
C32
C383
C384
C402
C45
1
2
L3 5788@ 0_0603_5%
+3VS
C41
+3VALW
1
R512
Q27
5788@ BCP69_SOT223
A0
A1
NC
GND
1
2
3
4
A
5788@ AT24C64A_SO8
1
C26
27P_0402_50V8J
C25
27P_0402_50V8J
2
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/11
Title
LAN controller BCM5788M
2
Size
B
Date:
Document Number
Rev
0.4
LA-2541
Sheet
1
27
of
58
LAN_LINK#
<19,27,40> LAN_LINK#
2 R302
+3VALW
<27,40> LAN_ACTIVITY#
C33
4
5
6
1 0.01U_0402_16V7K
LAN_MIDI1+
LAN_MIDI11 0.01U_0402_16V7K
LAN_MIDI0+
LAN_MIDI0-
RJ45_MDI3+
RJ45_MDI3-
TCT2
TD2+
TD2-
MCT2
MX2+
MX2-
21
20
19
RJ45_MDI2+
RJ45_MDI2-
7
8
9
TCT3
TD3+
TD3-
MCT3
MX3+
MX3-
18
17
16
MCT_R
10
11
12
TCT4
TD4+
TD4-
MCT4
MX4+
MX4-
15
14
13
MCT_T
RJ45_MDI1+
RJ45_MDI1RJ45_MDI0+
RJ45_MDI0-
RJ45_MDI3+ <40>
RJ45_MDI3- <40>
RJ45_MDI2+ <40>
RJ45_MDI2- <40>
RJ45_MDI1+ <40>
RJ45_MDI1- <40>
R14
2
5788@ 75_0402_5%
1
R18
2
75_0402_5%
1
R19
2
75_0402_5%
1
JP2
C380
1
1000P_1206_2KV7K
RJ45_MDI0+ <40>
RJ45_MDI0- <40>
RJ45_MDI0-
PR1-
RJ45_MDI0+
PR1+
RJ45_MDI1+
PR2+
RJ45_MDI2+
PR3+
RJ45_MDI2-
PR3-
RJ45_MDI1-
PR2-
RJ45_MDI3+
PR4+
RJ45_MDI3-
PR4-
FOX_JM36113-L1H7
5788@ 75_0402_5%
1
2
10
R13
2
LED_GREEN
1 5788@ 0.01U_0402_16V7K
LAN_MIDI2+
LAN_MIDI2-
24
23
22
LED_ORANGE
MCT1
MX1+
MX1-
TCT1
TD1+
TD1-
SHLD2
C35
1
2
3
14
C36
1 5788@ 0.01U_0402_16V7K
LAN_MIDI3+
LAN_MIDI3-
12
U7
11
+3VALW
C34
2 R301
1
300_0402_5%
LDE_YELLOW-
+2.5V_LAN
300_0402_5%
LAN_ACTIVITY#
LDE_YELLOW+
SHLD1
13
5788@ SQ-H40B-2
C
BOM change
U5
LAN_MIDI1+
LAN_MIDI1-
1
2
3
4
5
6
7
8
+2.5V_LAN
LAN_MIDI0+
LAN_MIDI0-
RD+
RDCT
NC
NC
CT
TD+
TD-
RX+
RXCT
NC
NC
CT
TX+
TX-
16
15
14
13
12
11
10
9
RJ45_MDI1+
RJ45_MDI1MCT_R
MCT_T
RJ45_MDI0+
RJ45_MDI0-
4401@ LF-H80P_16P
<27>
B
<27>
LAN_MIDI3+
R30
5788@ 49.9_0402_1%
LAN_MIDI3+ 2
1
LAN_MIDI3-
LAN_MIDI3- 2
5788@
1
R29
49.9_0402_1%
<27>
LAN_MIDI2+
R32
5788@ 49.9_0402_1%
LAN_MIDI2+ 2
1
<27>
LAN_MIDI2-
LAN_MIDI2- 2
5788@
<27>
LAN_MIDI1+
<27>
LAN_MIDI1-
<27>
LAN_MIDI0+
<27>
LAN_MIDI0-
LAN_MIDI1- 2
R33
49.9_0402_1%
R37
49.9_0402_1%
LAN_MIDI0+ 2
LAN_MIDI0-
5788@
5788@
R36
49.9_0402_1%
0.1U_0402_16V4Z
C42
1
1
1
0.1U_0402_16V4Z
C44
1
1
0.1U_0402_16V4Z
C40
1
R31
49.9_0402_1%
R35
49.9_0402_1%
LAN_MIDI1+ 2
C31
1
0.1U_0402_16V4Z
Close to NIC U6
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/11
Title
LAN Magnetic & RJ45
2
Size
B
Date:
Document Number
Rev
0.4
LA-2541
Sheet
1
28
of
58
C177
C82
C134
C117
C163
+3VS
+3VS
+5VS
C57
C97
C118
C96
0.01U_0402_16V7K
2
0.01U_0402_16V7K
2
4.7U_0805_10V4Z
0.01U_0402_16V7K
2
0.1U_0402_16V4Z
4.7U_0805_10V4Z
PCI_AD[0..31]
0.01U_0402_16V7K
2
0.1U_0402_16V4Z
4.7U_0805_10V4Z
PCI_AD[0..31] <18,22,23,27>
JP11
TIP
<36> WL_LED
<19> XMIT_OFF#
XMIT_OFF#
2
XMIT_OFF#
+3VS
R118
1K_0402_5%
<18,22> CLK_PCI_MINI
<18> PCI_REQ#1
PCI_PIRQG#
W=40mils
CLK_PCI_MINI
PCI_REQ#1
PCI_AD31
PCI_AD29
<34>
CLK_PCI_MINI
R99
BT@100_0402_1%
1
2
CH_DATA
<18,23,27> PCI_CBE#3
PCI_AD27
PCI_AD25
PCI_AD23
PCI_AD21
PCI_AD19
R105
@ 10_0402_5%
C156
@ 10P_0402_50V8J
<18,23,27> PCI_CBE#2
<18,23,27> PCI_IRDY#
PCI_AD17
PCI_CBE#2
PCI _IRDY#
<18,23,27,37,38> PM_CLKRUN#
<18,23,27,38> PCI_SERR#
PCI_SERR#
<18,23,27> PCI_PERR#
<18,23,27> PCI_CBE#1
PCI_PERR#
PCI_CBE#1
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
+5VS
PCI_AD3
W=30mils
PCI_AD1
+5VS
W=30mils
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
RING
W=40mils
PCI_PIRQG#
+5VS
PCI_PIRQG# <18>
PCI_PME#
PCI_AD30
+3VALW
PCI_RST# <18,23,26,27,32>
+3VS
PCI_GNT#1 <18>
PCI_RST#
W=40mils
PCI_GNT#1
PCI_PME# <19,23>
1 R100
2
CH_CLK <34>
BT@100_0402_1%
PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL
PCI_AD22
PCI_AD20
PCI_PAR
PCI_AD18
PCI_AD16
PCI_AD18
2 R98
100_0402_1%
PCI_PAR <18,23,27>
PCI_FRAME#
PCI_TRDY#
PCI_STOP#
PCI_DEVSEL#
PCI_FRAME# <18,23,27>
PCI_TRDY# <18,23,27>
PCI_STOP# <18,23,27>
+3VALW
PCI_AD15
PCI_AD13
PCI_AD11
PCI_AD9
PCI_CBE#0
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
10K_0402_5%
W=40mils
C142
PCI_CBE#0 <18,23,27>
0.1U_0402_16V4Z
2 R47
C54
0.1U_0402_16V4Z
C49
@ 4.7U_0805_10V4Z
2
+3VS
+3VALW
FOX_AS0A226-S2T
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
Mini PCI slot
D

Custom
Date:
Rev
0.4
LA-2541
Sheet

E
29
of
58
+VDDA_CODEC
U24
W=40Mil
+5VS
10K_0402_5%
VIN
DELAY
VOUT
+VDDA_CODEC
C341
2
10K_0402_1%
2
SENSE or ADJ
CNOISE
GND
ERROR
1 R255
SD
SI9182DH-AD_MSOP8
C357
2
C344
0.1U_0402_16V4Z
C346
C345
10K_0603_1%
2
R256
4.7U_0805_10V4Z
5.9K_0603_1%
0.1U_0402_16V4Z
1
0.01U_0402_16V7K
4.7U_0805_10V4Z
R249 7
1
R287
C336
1U_0603_10V4Z
R280
10K_0402_1%
2
C351
MONO_IN
PCM_SPK#
1
C337
R258
1 1
Q20
2SC2411K_SOT23
10K_0402_5%
560_0402_5%
1U_0603_10V4Z
C335
2 MONO_IN1
2
1 MONO_INR
R279 20K_0402_5%
R286
1U_0603_10V4Z
1
2
2
B
3
<23>
C338
<19>
1
R548
2
@ 0_0402_5%
1
R549
2
@ 0_0402_5%
1
R550
2
@ 0_0402_5%
1
R551
2
@ 0_0402_5%
0.1U_0402_16V4Z
SB_SPKR
R259
1 1
1U_0603_10V4Z
560_0402_5%
D12
1
R552
R265
2
2
@ 0_0402_5%
2
RB751V_SOD323
2
@ 10K_0402_5%
R264
R248
R278
R294
2
@ 0_1206_5%
2
@ 0_1206_5%
2
@ 0_1206_5%
2
0_1206_5%
For Layout:
GNDA
Place decoupling caps near the

power pins of SmartAMC
device.
R257 2
+3VALW_CODEC
0.1U_0402_16V4Z 0.1U_0402_16V4Z
0_0805_5%
<31> DIB_DATAN
<31> DIB_DATAP
<31> PWRCLKP
<31> PWRCLKN
150P_0402_50V8J
1
R263
1
R262
1
R261
1
R260
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
<19,22> AC97_SDOUT
<19> AC97_SYNC
<19> AC97_RST#
@ 150P_0402_50V8J
C339
<19> AC97_SDIN0
<19> AC97_BITCLK
1
2
R275 33_0402_5%
1
2
R271 33_0402_5%
<32,39> MUTE_LED
MONO_INR
C370
10U_0805_10V4Z
DIB_DATAP
PWRCLKP
PWRCLKN
15
16
17
SDATA_OUT
SYNC
AC_RESET#
20
AC_ONLY
21
SDATA_IN0
22
BIT_CLK
11
ID0#
12
ID1#
14
EAPD
45
PC_BEEP
13
DSPKOUT
44
33
23
0.1U_0402_16V4Z
AVDD44
DIB_DATAN
AVDD33
VDD5
RCOSC1
MIC_IN
29
CD_IN_R
CD_IN_GND
CD_IN_L
32
31
30
LINE_IN_L
LINE_IN_R
27
28
LINE_OUT_L
LINE_OUT_R
HP_OUT_L
HP_OUT_R
39
40
42
43
REF_FLT
VC_SCA
VREF_SCA
38
37
36
MBIAS/AVDD
34
S_PDIF
46
GPIO_4
47 1
R272
48
GPIO_5
2
6
9
19
26
AGND35
AGND41
VDD_CLK
U25
0.1U_0402_16V4Z 0.1U_0402_16V4Z
XTLO
XTLI
24
25
C374 1U_0603_10V4Z
2
1
LINE_IN_L
2
SPR@ 2.2U_0603_6.3V4Z
1
C372
DLINE_IN_R_L SPR@ 4.7K_0402_5%1

SPR@ 4.7K_0402_5%2
2 R297
1 R299
DLINE_IN_L <40>
LINE_IN_R
2
SPR@ 2.2U_0603_6.3V4Z
1
C373
DLINE_IN_R_R SPR@ 4.7K_0402_5%1

SPR@ 4.7K_0402_5% 2
2 R298
1 R300
DLINE_IN_R <40>
MIC
<33>
LINE_OUTL <32>
LINE_OUTR <32>
2
C369
+CODEC_REF
R270
2
10K_0402_5%
CODEC_HPS
33_0402_5%
1
2
R292
C362
1U_0603_10V4Z
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
D11
2
HPS
<32>
0.1U_0402_16V4Z 2
2
R267
2.2K_0402_5%
C359
C364
1K_0402_5%
1
2
C363 15P_0402_50V8J
RB751V_SOD323
4
X1
CX20468-31_TQFP48
24.576MHZ_16P_XSL024576FG1H
1
2
C367 15P_0402_50V8J
Compal Secret Data

2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
CODEC CX20468-31
B
LINE_IN_L
LINE_IN_R
GNDA
+VDDA_CODEC
249K_0402_1%
35
41
18
10
10U_0805_10V4Z
C354
C352
1U_0603_10V4Z
1
2
R266
VDDC18
VDDC10
1
C353
1
C349
1
C358
GNDC2
GND8
GNDC9
GNDC19
AVSS_CLK
1
C348
2
1
C347
C340
GND
R295 2
0_0805_5%
+3VALW
<32,33,40>
+3VAMP_CODEC

Custom
Date:
Rev
0.4
LA-2541
Sheet

E
30
of
58
MTP28
MTP52
VDD
MTP26
MTP59
BR908_CC
MC928
VDD
PRI
SEC
24
DVdd
18
TRDC
12
1
MC944
MC940
11
RXI
GPIO1
RBias
DIB_N
Vc_LSD
Vc
Vref_LSD
VRef
MC976
1U_0603_6.3V6M
1
2
0.001U_0402_50V7M
0.1U_0402_10V6K
AGND_LSD
8
22
25
NC1
NC2
NC3
29
PADDLE
28
MTP62
DIB_N2
EIC
MTP63
MC974
@ 0.001U_0402_50V7M
DIB_P
27
1
DIB_P2
@ 30U_82154R_1%_1:1.67
@ HEADER8
MJ1B
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
TAC2
2
0_0402_5%
MR924
MTP61
PWR+
VZ
10
EIO
17
EIF
16
2
1
E&T_3800-02
MTP42
2
4
MR922
0_0402_5%
2
MJ2
1
2
3
4
5
6
7
8
19
TXO
14
TXF
13
CX20493-58_QFN28
2 3
MTP73
MT922
MJ1
RAC2
MTP41
MTP65
MR938
110_0603_5%
MTP31
MR928
27_0805_5%
MTP25
20
DIB_N1
1 MTP35
1 MTP38
MFB902
RING_2
MOD_RING
1
2
1 MTP39
MR902
MMZ1608D301BT_0603
1M_0805_5%
MC902
RAC1
MC906
1
2 RAC1/RING
1
2 0.033U_1206_100V7K
1
470P_1808_3KV
MC904
TAC1
MBR904
1
2 TAC1/TIP
1
2 0.033U_1206_100V7K
1M_0805_5%
MMBD3004S_SOT23
2
MTP34
MR904
TIP_2
1
MTP40 1
TRDC
MR906 1
2 6.8M_0805_5%
1
MTP33
1
MC958
MC918
AGND_LSD
GND
1
1 MTP32
E IC
1
2
0.1U_0603_16V7K
MBR906
MC908
0.015U_0603_25V7K 2
MR910
MMBD3004S_SOT23 470P_1808_3KV
2
237K_0805_1%
AGND_LSD
RXI 1
RXI-1
2
1 MTP71
MFB904
TIP_2
MOD_TIP
1
2
1 MTP70
MMZ1608D301BT_0603
AGND_LSD
RBias 1 MR954 2
59K_0402_1%
1
2 MC966
MTP69
MC910
0.01U_0805_100V7M
VZ 1 1 MR908 2
BRIDGE_CC
1
2
0.047U_1206_100V7K
348K_0805_1%
AGND_LSD
MTP68
MTP67
C
1
EIO 1
MQ902
2
B
PMBTA42_SOT23
Use 59K_0402_1% for MR954
E
E IF
MQ904
C
1
TXO
MQ906
2
B
PMBTA42_SOT23
FZT458TA_SOT223
E
MTP66
1
TXF
1 MTP64
1
DIB_P1
2 10P_1808_3KV
AGND_LSD
MC906 and MC908 must be Y3 type

Capacitors for Nordic Countries
only
MTP37
MC924
MTP72
2 10P_1808_3KV
TAC1
DGnd
1
MC922
<30> DIB_DATAN
AVdd
PWR+
MTP60
RAC1
21
MTP30
S X'FORM_ 835-00252
MTP27
<30> DIB_DATAP
1
2
3
4
5
6
7
8
MTP36
23
SEC
MC970
0.1U_0402_10V6K
DGND_LSD
CLK
DC_GND
PRI
MBR908B
BAV99DW-7_SOT363
26
AGnd
MTP24
PCLK
1
2
MMZ1608D301BT_0603
PWRCLKP
MC962
47P_0603_50V8J
<30>
MTP58
MU902
MFB906
2
2
AGND_LSD
MC978
0.1U_0402_10V6K
2
MRV902
TB3100M-13-01_SMB
MTP23
MR932
MC926
15K_0402_5%
10P_0402_50V8J
2
1CLK2 1
2 CLK
15
4BR908_AC1
1
PWRCLKN
<30>
MT902
2
MC930
2.2U_0805_10V6K
1
MTP29
MTP22
MBR908A
BAV99DW-7_SOT363
0.1U_0402_10V6K
1
2
@ HEADER8
GND
MTP49
AGND_LSD
AGND_LSD
DGND_LSD
AGND_LSD
Compal Secret Data
Issued Date
AGND_LSD
2005/03/01
Deciphered Date
2006/03/11
Title
AMOM_modem
Custom
Date:
Rev
0.4
LA-2541
Sheet
31
of
58
+5VAMP
+5VS
R273
JP24
0.1U_0402_16V4Z
2
10U_0805_10V4Z
C365
1
2
3
4
2
0.1U_0402_16V4Z
C320
RHPIN
20
2 0.47U_0603_16V7K
C375 1
2 0.47U_0603_16V7K
10
RIN
LOUTLOUT+
ROUTROUT+
9
4
16
21
SE/BTL#
15
HPS
HP/LINE#
17
10 dB
C376 1
<19>
MUTE#
2 0.47U_0603_16V7K
14
0.1U_0402_16V4Z
22
R291 100K_0402_5%
D
Q21
C655 1
GAIN1
GAIN0
PC-BEEP
BYPASS
100K_0402_5%
GAIN0
GAIN1
6 dB
10 dB
15.6 dB
21.6 dB
3
2
11
SHUTDOWN#
R289
2
C377
0.47U_0603_16V7K
R288
100K_0402_5% @ 100K_0402_5%
1
12
13
24
S
Av(inv)
<30,39> MUTE_LED
@ 100K_0402_5%
TPA0312PWP_TSSOP24
2
G
3
LLINEIN
LINE_C_OUTL 5
LHPIN
2 0.047U_0603_16V7K
LIN
Gain Settings
R276
C355 1
D37
Layout change
+5VAMP
R277
LHPIN
@ 220P_0402_50V7K
D36
2 0.47U_0603_16V7K
ACES_85205-0400
@ SM05_SOT23
GND1
GND2
GND3
GND4
<30> LINE_OUTL
C360 1
@ SM05_SOT23
SPKLSPKL+
SPKRSPKR+
1
C368 1
RHPIN
C312
2 0.47U_0603_16V7K
C315
C361 1
RLINEIN
C318
@ 220P_0402_50V7K
@ 220P_0402_50V7K
LINE_C_OUTR23
PVDD2
PVDD1
<30> LINE_OUTR
2 0.047U_0603_16V7K
VDD
U27
C356 1
18
7
19
@ 220P_0402_50V7K
1
2
3
4
C371
SPKL+
SPKLSPKR+
SPKR-
0_1206_5%
C366
D35
@ RB751V_SOD323
HEADPHONE OUT/LINE OUT
2N7002_SOT23
<18,23,26,27,29> PCI_RST#
C255 100U_6.3V_M
1
2
R161
1
30_0805_5%
2
INTSPK_CR+
SPKR+
SPKL+
INTSPK_CL+
2
30_0805_5%
+5VAMP
C256 100U_6.3V_M R166
R401
R419
2
R269
100K_0402_5%
I1
HPS
HPS
<30>
U26
TC7SH32FU_SSOP5
C350
0.1U_0402_16V4Z
3
I0
R268
1
2
100K_0402_5%
DLINE_OUT_R
Headphone Plug from NB
<40> DOCK_HPS
1K_0402_5%
1K_0402_5%
L40
INTSPK_CR+
<40> DLINE_OUT_R
KC FBM-11-160808-601T
2
7
8
+5VAMP
PR
DLINE_OUT_R
<40> DLINE_OUT_L
5
4
L42
INTSPK_CL+
KC FBM-11-160808-601T
1
2
PL
HP OUT
3
6
2
1
JP21
C588
47P_0402_50V8J
FOX_JA6033L-5S1-TR
C593
47P_0402_50V8J
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
AMP & Audio Jack
D

Custom
Date:
Rev
0.4
LA-2541
Sheet

E
32
of
58
Internal/External MIC
D
+MICAMP
+VDDA_CODEC
+VDDA_CODEC
L44
1
0_0603_5%
1
R134
3K_0402_5%
R136
C660
150K_0402_1%
2
C239
1U_0603_10V4Z
BOM change
R135
3K_0402_5%
C240
BOM change
1U_0603_10V4Z
C241
100P_0402_50V8J
C234
CHB1608B121_0603
1
2
C235 0.027U_0402_16V4Z R133

1
2
1
2
10K_0402_5%
2 -
U34A
O
INT_MIC
TLV2462CDR_SO8
C
ACES_85205-0200
R516
+CODEC_REF
1U_0603_10V4Z
2
3.3K_0402_5%
C661
R514
10K_0402_5%
0.1U_0402_16V4Z
+MICAMP
C242
8
@ 1200P_0603_50V7K
1
2
L17
3 +
JP17
270P_0402_50V7K
+MICAMP
C556
6 -
G
4
100P_0402_50V8J
5 +
INT_MIC_CONN
R375 100K_0402_5%
1
2
C548 0.22U_0603_10V7K
1
2
EXT_MIC
C554 0.22U_0603_10V7K
C550
U34B
O
MIC
MIC
<30>
TLV2462CDR_SO8
100P_0402_50V8J
R374 100K_0402_1%
1
2
R376 14K_0402_1%
7
8
INT_MIC_CONN
INT_MIC
JP20
FOX_JA6033L-5S1-TR
R138 2.2K_0402_5%
1
2
R137 1K_0402_1%
1
2
2
470P_0402_50V7K
MIC IN
3
6
2
1
L36 CHB1608B121_0603
EXT_MIC 1
2
1
C558
@ SM05_SOT23
+VDDA_CODEC
D38
C243
1U_0603_10V4Z
2
A
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
Internal / External MIC
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
33
of
58
+5VALW
+USB_VCCB
C16
5
IN
0.1U_0402_16V4Z
3
OUT
ON#
SET
GND
1
1
+USB_VCCA
U33
5
IN
0.1U_0402_16V4Z
C12
0.47U_0603_16V7K
AATI4610AIGV-T1_SOT23-5
R7
+5VALW
C536
U1
OUT
ON#
GND
SET
C195
0.47U_0603_16V7K
AATI4610AIGV-T1_SOT23-5
R366
4.7K_0603_1%
2
4.7K_0603_1%
SLP_S5
SLP_S5
<40,42,48> SLP_S5
+USB_VCCA
+USB_VCCA
W=40mils
+USB_VCCB
C219 +
1
C7
100U_6.3V_M
C379
2
W=40mils
W=40mils
100U_6.3V_M
C378
1
C197
C542 +
C196
1000P_0402_50V7K
0.1U_0402_16V4Z
1000P_0402_50V7K
<19>
<19>
0.1U_0402_16V4Z
1
2
3
4
USBP5USBP5+
C1
@ 10P_0402_50V8J
+USB_VCCB
USBP5-
I/O
C538
1000P_0402_50V7K
VCC VCC
D0- D1D0+ D1+
VSS VSS
5
6
7
8
G2
G4
9
11
G1
G3
USBP7USBP7+
<19>
<19>
C543
C546
@ 10P_0402_50V8J
@ 10P_0402_50V8J
@ 10P_0402_50V8J
@ 10P_0402_50V8J
SUYIN 020167MR004S511ZU_4p
D39
GND
10
12
C212
SUYIN_020122MR008S540ZU
5
6
7
8
C2
C216
C537
0.1U_0402_16V4Z
JP13
1
2
3
4
USBP4USBP4+
JP3
<19>
<19>
100U_6.3V_M
@ 10P_0402_50V8J
VCC
I/O
USBP5+
@ PRTR5V0U2X_SOT143
+USB_VCCA
TP CONNECTOR
BT CONN.
+5VS
USBP4-
JP18
JP19
<38>
<38>
D40
6
5
4
3
2
1
TP_DATA
TP_CLK
ACES_87153-0601
USBP7+
+3V_BT
1
2
3
4
5
6
7
8
6
5
4
3
2
1
D1+
D2+
GND
VCC
D2-
D1-
USBP7-
USBP4+
@ IP4220CZ6_SO6
USBP2+ <19>
USBP2<19>
BT_LED
<36>
CH_DATA <29>
CH_CLK <29>
BT_DETECT# <19>
BT_CONN@ ACES_87212-0800
+3VALW
FINGER PRINT CONN.
+3VS
JP12
<19>
<19>
USBP1USBP1+
1
2
3
4
ACES_85205-0400
C549
BT@1U_0603_10V4Z
2
1
2
3
4
C686
0.1U_0402_16V4Z
2
1
FP@
+3V_BT
Q36
BT@SI2301BDS_SOT23
1
C238
BT@4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
2
1
C237
BT@
C236
BT@0.01U_0402_16V7K
<19>
BT_OFF
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/11
Title
Bluetooth & USB CONN.

Custom
Date:
Rev
0.4
LA-2541
Sheet
34
of
58
HDD/ODDModule
Placea caps. near HDD CONN.
+5VS
D
0.1U_0402_16V4Z
1
C277
@ 10U_0805_10V4Z
1
C276
2
2
1000P_0402_50V7K
C280
2
@ 1U_0603_10V4Z
C274
C273
10U_0805_10V4Z
JP23
<20> PD_D[0..15]
NB_RST#
PD_D7
PD_D6
PD_D5
PD_D4
PD_D3
PD_D2
PD_D1
PD_D0
<13,18,26,37,38,39> NB_RST#
PD_D[0..15]
<20> PD_DREQ#
<20>
PD_IOW#
<20>
PD_IOR#
<20> PD_IORDY
<20,22> PD_DACK#
<20>
PD_IRQA
<20>
PD_A1
<20>
PD_A0
<20>
PD_CS#1
1
+5VS
PD_DREQ#
PD_IOW#
PD_IOR#
PD _IORDY
PD_DACK#
PD_IRQA
PD_A1
PD_A0
PD_CS#1
HDD_ACT_LED#
+5VS
R510 100K_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15
PCSEL R207 1
PD_A2
PD_CS#3
2 470_0402_5%
PD_A2
PD_CS#3
<20>
<20>
+5VS
+5VS
1
SUYIN_200138FR044G277ZU
R190
C539
1000P_0402_50V7K
C541
ACT_LED#
RB751V_SOD323
C206
10U_0805_10V4Z
D33
ODD_ACT_LED# 1
R192
2
Q16
C208
D32
HDD_ACT_LED# 1
@ 10U_0805_10V4Z
C198
1K_0402_5%
@ 0.1U_0402_16V4Z
1
+5VS
100K_0402_5%
+5VS
MMBT3906_SOT23
RB751V_SOD323
@ 1U_0603_10V4Z
ACT_LED <36>
Place caps. near ODD CONN.
<20> SD_D[0..15]
SD_D[0..15]
JP14
NB_RST#
SD_D7
SD_D6
SD_D5
SD_D4
SD_D3
SD_D2
SD_D1
SD_D0
<20> SD_SIOW#
<20> SD_IORDY
<20>
SD_IRQA
<20> SD_SBA1
<20> SD_SBA0
<20> SD_SCS1#
1
+5VS
SD_SIOW#
SD _IORDY
SD_IRQA
SD_SBA1
SD_SBA0
SD_SCS1#
ODD_ACT_LED#
R511 100K_0402_5%
2
R367
+5VS
+5VS
1 SEC_CSEL
470_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
SD_D8
SD_D9
SD_D10
SD_D11
SD_D12
SD_D13
SD_D14
SD_D15
SD_DREQ#
SD_SIOR#
SD_DACK#
PDIAG# R371 1
SD_SBA2
SD_SCS3#
W=80mils
SD_DREQ# <20>
SD_SIOR# <20>
SD_DACK# <20>
2 @ 100K_0402_5%
SD_SBA2 <20>
SD_SCS3# <20>
+5VS
+5VS
+5VS
+5VS
C540 0.1U_0402_16V4Z
A
OCTEK_CDR-50DU1
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
HDD / ODD connector
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
35
of
58
BOM and layout modify
+3VL
ACT_LED
R285
270_0402_5%
<35>
R555
270_0402_5%
BATT FULL LED
2
Charger LED
AMBER
1
D14
GREEN
D16
GREEN
4
HDD/ODD LED
R296
560_0402_5%
19-22UYSYGC/S530-A2/TR8_G/Y
<38> BAT_GRNLED#
<38>
BAT_LED#
+3VALW
POWER LED
GREEN
<39> WL_BT_LED#
D15
1
Wireless / Bluetooth LED

BLUE
+5VS
D13
HT-170CBS-DT_BLUE_0805
3
Q22
2 2
1K_0402_5%
R293
R290
2 2
1K_0402_5%
Q23
220_0402_5%
BT@
220_0402_5%
MMBT3904_SOT23
1
BT@
2
2
BT_LED
<34> BT_LED
1
R282
MMBT3906_SOT23
MMBT3904_SOT23
Q24
<29> WL_LED
1
2 2
1K_0402_5%
STB_LED#
WL_LED
<38,39,40> STB_LED#
R274
R284
R281
R283
100K_0402_5%
2
100K_0402_5%
2
BT@
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/11
Title
LED INDICATOR
5
Size
B
Date:
Document Number
Rev
0.4
LA-2541
Sheet
1
36
of
58
+3VS
RP7
DCD#1
RI#1
CTS#1
DSR#1
1
2
3
4
8
7
6
5
SIO@ 4.7K_0804_8P4R_5%
+5VS
+5VS_PRN
D1
2
SIO@
RXD1
U3
+3VS
RP4
8
7
6
5
1
2
3
4
SIO_GPIO46
SIO_GPIO45
SIO_GPIO44
SIO_GPIO43
+3VS
1
R307
<13,18,26,35,38,39> NB_RST#
R26 1
2
SIO@ 10K_0402_5%
<18,23,27,29,38> PM_CLKRUN#
<18,22> CLK_PCI_SIO
<18,23,38> SIRQ
2
SIO@ 10K_0402_5%
<15> CLK_14M_SIO
SIO@ 10K_0804_8P4R_5%
8
7
6
5
1
2
3
4
SIO@
SIO_IRQ
SIO_GPIO12
SIO_GPIO10
SER_SHD
<40>
10K_0804_8P4R_5%
LPC_FRAME#
LPC_DRQ#0
15
16
LFRAME#
LDRQ#
SIO_PD#
17
18
PCI_RESET#
LPCPD#
PM_CLKRUN#
CLK_PCI_SIO
SIRQ
SIO_PME#
19
20
21
6
CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#
CLK_14M_SIO
SER_SHD
SIO_GPIO23
8
22
43
52
+3VS
R11
23
24
25
27
28
29
30
31
32
33
34
35
36
40
CLK14
FIR IRRX2
IRTX2
IRMODE/IRRX3
37
38
39
INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
ERROR#
ALF#
STROBE#
41
42
44
46
47
48
49
50
51
53
55
56
57
58
59
60
61
CLOCK
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23
VSS
VSS
VSS
VSS
RXD1
TXD1
DSR1#
RTS1#
CTS1#
DTR1#
RI1#
DCD1#
62
63
64
1
2
3
4
5
SERIAL I/F
LAD0
LAD1
LAD2
LAD3
SIO_GPIO40
SIO_GPIO41
SIO_GPIO42
SIO_GPIO43
SIO_GPIO44
SIO_GPIO45
SIO_GPIO46
SER_SHD
SIO_GPIO10
SIO_GPIO11
SIO_GPIO12
SIO_IRQ
RP2
10
12
13
14
PARALLEL I/F
<18,38,39> LPC_FRAME#
<18> LPC_DRQ#0
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC I/F
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
GPIO
<18,38,39>
<18,38,39>
<18,38,39>
<18,38,39>
POWER
SIO_GPIO23
8
7
6
5
SIO@ 4.7K_0804_8P4R_5%
RP3
LPD6
LPD5
LPD4
LPD3
1
2
3
4
8
7
6
5
LPTINIT# <40>
LPTSLCTIN# <40>
LPD0
<40>
LPD1
<40>
LPD2
<40>
LPD3
<40>
LPD4
<40>
LPD5
<40>
LPD6
<40>
LPD7
<40>
LPTSLCT <40>
LPTPE
<40>
LPTBUSY <40>
LPTACK# <40>
LPTERR# <40>
LPTAFD# <40>
LPTSTB# <40>
RP5
LPTBUSY
LPTPE
LPTSLCT
LPD7
1
2
3
4
7
11
26
45
54
SIO@ 4.7K_0804_8P4R_5%
C27
C381
C382
RP6
LPTSTB#
LPTAFD#
LPTERR#
LPTACK#
1
2
3
4
8
7
6
5
SIO@ 4.7K_0804_8P4R_5%
R16
SIO@ 4.7K_0402_5%
+3VS
8
7
6
5
C29
SIO@ LPC47N217_STQFP64
Base I/O Address

0 = 02Eh
* 1 = 04Eh
R306
1
2
3
4
SIO@ 4.7K_0804_8P4R_5%
LPTINIT#
LPTSLCTIN#
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTERR#
LPTAFD#
LPTSTB#
SIO@ 10K_0402_5%
RP1
LPD2
LPD1
LPD0
LPTSLCTIN#
LPTINIT#
VTR
VCC
VCC
VCC
VCC
RB420D_SOT23
<40>
SIO@ R309 1K_0402_5%

1
2
TXD1
<40>
DSR#1
<40>
RTS#1
<40>
CTS#1
<40>
DTR#1
<40>
RI#1
<40>
DCD#1
<40>
RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1
SIO_GPIO41
SIO@ 0.1U_0402_16V4Z
SIO@ 4.7U_0805_10V4Z
SIO@ 0.1U_0402_16V4Z
SIO@ 10K_0402_5%
R305
3
SIO_GPIO42
CLK_14M_SIO
SIO@ 0.1U_0402_16V4Z
CLK_PCI_SIO
R25
@ 10_0402_5%
R28
@ 10_0402_5%
SIO@ 10K_0402_5%
R12
SIO_GPIO11
@
SIO@ 10K_0402_5%
C21
18P_0402_50V8J
C30
@10P_0402_25V8K
R308
2
SIO@
SIO_GPIO40
10K_0402_5%
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/11
Title
Super I/O LPC47N217
D

Custom
Date:
Rev
0.4
LA-2541
Sheet
E
37
of
58
BOM and layout change

+3VL
C639
0.1U_0402_16V4Z
C645
0.1U_0402_16V4Z
C650
0.1U_0402_16V4Z
C634
0.1U_0402_16V4Z
C633
4.7U_0805_10V4Z
+3VS
C640
0.1U_0402_16V4Z
C644
0.1U_0402_16V4Z
C637
0.1U_0402_16V4Z
C641
4.7U_0805_10V4Z
+3VL
D
26
27
29
31
32
33
IMCLK
IMDAT
KCLK
KDAT
EMCLK
EMDAT
10K_0402_5%
RP66
C
+3VS

1

R472
+3VL
D31
LPCPD#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
<18,37,39> LPC_FRAME#
<13,18,26,35,37,39> NB_RST#
RB751V_SOD323
R476
53
54
XTAL1
XTAL2
51
52
VCC0
XOSEL
+RTCVCC
Power Mgmt/SIRQ
300_0402_5%
2
78
80
NUM_LED#
SLP_S3#
AB1A_DATA
AB1A_CLK
86
87
AB1A_DATA
AB1A_CLK
AB1B_DATA
AB1B_CLK
84
85
AB1B_DATA
AB1B_CLK
PGM
FWP#
EA#
CLOCK
32KHZ_OUT
RESET_OUT#
PWRGD
VCC1_PWRGD
24MHZ_OUT
56
82
83
48
58
49
61
60
50
PGM
FWP#
EA#
CLK_14M_KBC
S_CLK
SB_PWRGD
NB_PW RGD
VCC1_PW RGD
TEST PIN
MODE
1
57
MODE
DMS_LED#
BAT_LED#
PWR_LED#/8051TX
FDD_LED#/8051RX
91
88
90
89
BAT_LED#
STB_LED#
CAPS_LED#
PM_RSMRST#
DIGI_RX
DIGI_TX
BATCON
KBC_GPIO12
ADP_PRES
THM_MBAY#
PCI_SERR#
THM_MAIN#
A20M
+3VL
ON/OFFBTN_KBC# <39>
LOW_BAT# <19>
KSO14
<39>
KSO15
<39>
+3VL
R491
R507
100K_0402_5%
100K_0402_5%
PM_RSMRST# <19,46>
BATCON <51>
KBC_GPIO12 <19>
ADP_PRES <43,45,51>
THM_MBAY# <50>
PCI_SERR# <18,23,27,29> D30
THM_MAIN# <50>
1
NUM_LED# <39>
SLP_S3# <19,26,40,42>
Q46
KBC_GPIO12
THM_MAIN#
GATEA20
<19>
+3VL
RB751V_SOD323
RP67
AB1A_CLK
AB1A_DATA
AB1B_CLK
AB1B_DATA
AB1A_DATA <50>
AB1A_CLK <50>
1
2
3
4
8
7
6
5
4.7K_0804_8P4R_5%
AB1B_DATA <50>
AB1B_CLK <50>
R481
NUM_LED#
100K_0402_5%
CLK_14M_KBC <15>
SB_PWRGD <19>
NB_PWRGD <13,18,41>
VCC1_PWRGD <41>
1
R488
2
7611@ 33_0402_5%
TPS_CLK <24,26>
CLK_14M_KBC
R480
@ 10_0402_5%
1
BAT_LED# <36>
STB_LED# <36,39,40>
CAPS_LED# <39>
SB_PWRGD
LPC47N250-MD_TQFP100
C648
@ 10P_0402_25V8K
2
R484
2
47K_0402_5%
R489
C654
FWP#
LFRAME#
LRESET#
LPCPD#
OUT
IN
41
42
34
R486
NC
NC
2
10P_0402_50V8J
LPC_FRAME#
NB_RST#
LPCPD#
Y6
10P_0402_50V8J
C653
LAD[3]
LAD[2]
LAD[1]
LAD[0]
1
120K_0402_5%
C643
@ 10P_0402_50V8J
40
39
37
35
R494
2
@ 10_0402_5%
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
C RY1
C RY2
R493
@ 2M_0402_5%
CLKRUN#
SER_IRQ
PCI_CLK
EC_SCI#
GPIO20/PS2CLK
GPIO21/PS2DAT
Access Bus Interface
CLK_PCI_EC
44
46
43
59
71
72
73
74
75
76
77
LPC
Bus
<18,37,39>
<18,37,39>
<18,37,39>
<18,37,39>
+RTCVCC
10K_0402_5%
2
PM_CLKRUN#
SIRQ
CLK_PCI_EC
RUNSCI_EC#
<18,23,27,29,37> PM_CLKRUN#
<18,23,37> SIRQ
<18,22> CLK_PCI_EC
<19> RUNSCI_EC#
GPIO11/AB2A_DATA
GPIO12/AB2A_CLK
GPIO13/AB2B_DATA
GPIO14/AB2B_CLK
GPIO15/FAN_TACH1
GPIO16/FAN_TACH2
GPIO17/A20M
Miscellaneous
10K_0804_8P4R_5%
TP_CLK
TP_DATA
KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
68
69
70
FAN_PWM <4>
CHGCTRL <43,51>
GND
GND
GND
GND
GND
GND
GND
<34>
<34>
<40>
<40>
<40>
<40>
92
79
65
45
36
28
8
KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
AGND
8
7
6
5
55
1
2
3
4
GPIO7/PWM3
GPIO8/RXD
GPIO9/TXD
2N7002_SOT23
TP_CLK
TP_DATA
KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
10K_0402_5%
R468
2 TP_DATA
ON/OFFBTN_KBC#
LOW_BAT#
KSO14
KSO15
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
TP_CLK
62
63
64
66
KB_RST# <18,19>
D
2
G
GPIO2
GPIO3
GPIO4/KSO14
GPIO5/KSO15
FAN_PWM
CHGCTRL
R497
100K_0402_5%
25
24
23
22
21
20
19
18
KSI[0..7]
KSI[0..7]
OUT7/SMI#
OUT8/KBRST
OUT9/PWM2
OUT10/PWM0
OUT11/PWM1
BATSELB_A# <51>
<39>
R466
KBC_PWR_ON <44>
BAT_GRNLED# <36>
BATSELB_A#
KBRST
+5VS
KBC_PWR_ON
BAT_GRNLED#
98
97
96
95
93
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
47K_0804_8P4R_5%
99
100
OUT0
OUT1/IRQ8#
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12/OUT8/KBRST
KSO13/GPIO18
KSI7
KSI6
KSI5
KSI4
8
7
6
5
+3VL
General Purpose I/O Interface
17
16
15
14
13
12
10
9
7
6
5
4
3
2
RP65
Keyboard/Mouse Interface
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
47K_0804_8P4R_5%
1
2
3
4
VCC1
VCC1
VCC1
VCC1
KSO[0..13]
KSO[0..13]
30
38
47
U39
<39>
VCC2
VCC2
VCC2
KSI3
KSI2
KSI1
KSI0
SMSC_LPC47N250_TQFP-100P
8
7
6
5
11
67
81
94
RP64
1
2
3
4
C651
1U_0603_10V4Z
R487
C649
MODE
J8
AGND FILTER
32.768KHZ_12.5P_1TJS125DJ2A073
PGM
R483
2
SHORT PADS
+3VL
JP30
c. Open J9
+3VL
R492
J6
2. For KBC internal ROM flash:
a. Open J8
NO SHORT PADS 1K_0402_5%
b. Short J6
R477
EA#
1
2
3
4
5
6
VCC1_PW RGD
NUM_LED#
STB_LED#
CAPS_LED#
C652
1
2
PGM
NB_PW RGD
a. Short J8
b. Open J6
1K_0402_5%
0.1U_0402_16V4Z
10K_0402_5%
1. For normal operation:
10K_0402_5%
0.1U_0402_16V4Z
@ ACES_85201-0602
For KBC debugging used.
c. Short J9
1K_0402_5%
J9
FWP#
R479
2
1
2
1K_0402_5%
NO SHORT PADS
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
EC LPC47N250
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
38
of
58
BIOS ROM
<18>
<18>
FWH_TBL#
FWH_WP#
FWH_TBL#
FWH_WP#
1 R189
24
23
22
21
A0/ID0
A1/ID1
A2/ID2
A3/ID3
20
19
A4/TBL#
A5/WP#
FWH_GPI 18
17
100_0402_5%
16
15
7
2
1
R415
@ 10_0402_5%
1
A6/FGP10
A7/FGP11
A8/FGP12
A9/FGP13
A10/FGP14
1
3
4
5
6
8
11
13
14
31
36
CLK_PCI_FWH
C596
VDD2
VDD1
C271
VSS3
VSS2
VSS1
40
30
29
DQ0/FWH0
DQ1/FWH1
DQ2/FWH2
DQ3/FWH3
WE#/FWH4
25
26
27
28
38
DQ4/RES
DQ5/RES
DQ6/RES
DQ7/RES
32
33
34
35
R/C#/CLK
RST#
OE#/INIT#
9
12
37
CLK_PCI_FWH
NB_RST#
FWH_INIT#
FW H_IC
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
IC
+3VS
U18
39
10
0.1U_0402_16V4Z
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
C254
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
0.1U_0402_16V4Z
LPC_AD0 <18,37,38>
LPC_AD1 <18,37,38>
LPC_AD2 <18,37,38>
LPC_AD3 <18,37,38>
LPC_FRAME# <18,37,38>
FWH_TBL#
FWH_WP#
FWH_GPI
CLK_PCI_FWH <18>
NB_RST# <13,18,26,35,37,38>
FWH_INIT# <18>
13
14
15
17
18
19
20
21
8
7
DQ0/FWH0/LAD0
DQ1/FWH1/LAD1
DQ2/FWH2/LAD2
DQ3/FWH3/LAD3
DQ4/RES
DQ5/RES
DQ6/RES
DQ7/RES
A4/TBL#
A5/WP#
6
5
4
3
30
1
22
26
27
A6/FGPI0/GPI0
A7/FGPI1/GPI1
A8/FGPI2/GPI2
A9/FGPI3/GPI3
A10/FGPI4/GPI4
NC
NC
NC
NC
VDD
VDD
<38>
VSS
VSS
16
28
RST#
CLOCK/R/C#
IC/MODE
INIT#/OCE#
2
31
29
24
ID0/A0
ID1/A1
ID2/A2
ID3/A3
12
11
10
9
LFRAME#/FWH4/WE#
23
NB_RST#
CLK_PCI_FWH
FW H_IC
FWH_INIT#
KSO[0..15]
KSO[0..15]
<38>
KSI[0..7]
KSI[0..7]
JP15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
LPC_FRAME#
R158
@ SST49LF008A-33-4C-EI_TSOP40
10K_0402_5%
2
@ 10P_0402_25V8K
2
C662
1
C663
KSO5 1
C664
KSO1 1
C665
KSI0
1
KSI3
25
32
SST49LF004B-33-4C-NH_PLCC32
INT_KBD CONN.
+3VS
U15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
C666
1
C667
1
C668
KSO7 1
C669
KSO8 1
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
2
2
2
2
56P_0402_50V8J
56P_0402_50V8J
56P_0402_50V8J
56P_0402_50V8J
2
56P_0402_50V8J
KSI1
KSI7
C674
1
C675
KSI5
1
C676
KSO0 1
C677
KSI2
1
56P_0402_50V8J
56P_0402_50V8J
2
KSO4
KSI4
56P_0402_50V8J
KSO2
C670
1
C671
1
C672
KSI6
1
C673
KSO9 1
ACES_85203-2402
56P_0402_50V8J
2
56P_0402_50V8J
56P_0402_50V8J
56P_0402_50V8J
2
56P_0402_50V8J
2
2
2
56P_0402_50V8J
56P_0402_50V8J
C
56P_0402_50V8J
Switch Board conn./ LID Switch

JP6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
<38>
KSO12
+3VS
+5VS
<38>
KSI0
<38>
KSI1
<38>
KSI4
<38>
KSI5
<38>
KSI6
<38>
KSI7
<36> WL_BT_LED#
<30,32> MUTE_LED
<38> NUM_LED#
<38> CAPS_LED#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
C678
KSO14 1
C679
KSO11 1
C680
KSO10 1
C681
KSO15 1
SW1
2
LID_SW# <16,19>
1
C6
0.1U_0402_16V4Z
ESE11MV9_4P
C682
1
C683
1
C684
KSO12 1
C685
KSO13 1
ACES_85203-1402
56P_0402_50V8J
2
2
2
56P_0402_50V8J
56P_0402_50V8J
56P_0402_50V8J
2
56P_0402_50V8J
KSO6
KSO3
2
2
56P_0402_50V8J
56P_0402_50V8J
56P_0402_50V8J
+3VALW
Power button
0.1U_0402_16V4Z
1
2
C689

<40> ON/OFF#
<36,38,40> STB_LED#
JP4
1
2
3
4
ON/OFF#
ACES_85205-0400
+3VL
+3VL
+3VL
1
2
3
4
R485
100K_0402_5%
2
R475
ON/OFFBTN_KBC#
R474
0.1U_0402_16V4Z
100K_0402_5%
C638
C642
0.1U_0402_16V4Z
2
ON/OFFBTN_KBC# <38>
2
G
3
ON/OFF#
U40A
14
100K_0402_5%
D28
2N7002_SOT23
1
2
Q44
RB751V_SOD323
ON/OFFBTN# <19>
R473
2
+3VALW
100K_0402_5%
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
BIOS BOM/SW BD CONN/KB CONN
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
39
of
58
L1
SPR@ KC FBM-L18-453215-900LMA90T_1812
2
1
VIN
C17
SPR@ 1000P_0402_50V7K
2
+DOCKVIN
DOCK CONN. 184PIN
C18
SPR@ 1000P_0402_50V7K
2
JP26A
ON/OFF#
ON/OFF#
RJ45_MDI2+
RJ45_MDI2RJ45_MDI0+
RJ45_MDI0-
<28> RJ45_MDI0+
<28> RJ45_MDI0-
LAN_ACT#_DOCK
LANLINK_STATUS#_DOCK
2
<17> CRT_VSYNC
<17> CRT_HSYNC
<17> CRT_DDCDA
<17> CRT_DDCCL
R4 SPR@ 0_0402_5%
R5 SPR@ 0_0402_5%
R6 SPR@ 0_0402_5%
<13,17>
CRT_RED
<13,17> CRT_GREEN
<13,17> CRT_BLUE
C15
C14
C13
@ 5P_0402_50V8C
@ 5P_0402_50V8C
2
2
2
CRT_DDCDA
CRT_DDCCL
D_RED
D_GREEN
D_BLUE
1
1
1
D_COMPS
D_CRMA
D_LUMA
<13,17> D_COMPS
<13,17> D_CRMA
<13,17> D_LUMA
@ 5P_0402_50V8C
<37>
<37>
<37>
<37>
<37>
<37>
<37>
<37>
<37>
<37>
<37>
DCD#1
RI#1
DTR#1
CTS#1
RTS#1
DSR#1
TXD1
RXD1
DCD#1
RI#1
DTR#1
CTS#1
RTS#1
DSR#1
TXD1
RXD1
LPTSTB#
LPTAFD#
LPTERR#
LPTSTB#
LPTAFD#
LPTERR#
JP26B
G1
P1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
+DOCKVIN
DETECT
RJ45_MDI3+
RJ45_MDI3-
RJ45_MDI3+ <28>
RJ45_MDI3- <28>
RJ45_MDI1+
RJ45_MDI1-
RJ45_MDI1+ <28>
RJ45_MDI1- <28>
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
LPD7
LPD6
LPD5
LPD4
LPD3
LPD2
LPD1
LPD0
LPTSLCTIN#
LPTINIT#
<37>
LPTACK#
<37>
LPTBUSY
<37>
LPTPE
<37>
LPTSLCT
<37>
LPD7
<37>
LPD6
<37>
LPD5
<37>
LPD4
<37>
LPD3
<37>
LPD2
<37>
LPD1
<37>
LPD0
<37> LPTSLCTIN#
<37>
LPTINIT#
PW R_LED
SLP_S5#_5R
1
2
R9
SPR@ 1K_0402_5%
<19>
USBP0-
USBP0-
<19>
USBP0+
USBP0+
<19>
USBP3-
USBP3-
<19>
USBP3+
<37>
SER_SHD
<19> EXPCRD_RST#
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
USBP3+
SER_SHD
EXPCRD_RST#
DETECT
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
GND
GND
GND
GND
GND
GND
171
172
173
174
175
176
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
KBD_DATA
KBD_CLK
CPPE_DOCK#
PS2_DATA
PS2_CLK
DOCK_HPS#
KBD_DATA <38>
KBD_CLK <38>
CPPE_DOCK# <15,19>
PS2_DATA <38>
PS2_CLK <38>
DLINE_IN_L
DLINE_IN_R
DLINE_IN_L <30>
DLINE_IN_R <30>
DLINE_OUT_L
DLINE_OUT_R
DLINE_OUT_L <32>
DLINE_OUT_R <32>
PCIE_MTX_C_PRX_P1
PCIE_MTX_C_PRX_N1
PCIE_MRX_C_PTX_P1
PCIE_MRX_C_PTX_N1
PCIECLK_DOCK
PCIECLK_DOCK#
PREP#
VA_ON#
PCIE_MRX_C_PTX_P1 <12>
PCIE_MRX_C_PTX_N1 <12>
PCIECLK_DOCK <15>
PCIECLK_DOCK# <15>
PREP#
<19>
<39>
<28> RJ45_MDI2+
<28> RJ45_MDI2-
165
166
167
168
169
170
USBP0C8
@ 10P_0402_50V8J
C9
@ 10P_0402_50V8J
USBP0+
G2
USBP3-
DOCK_MOD_RING
C10
JAE_SP03-14588-PCL03
SPR_CONN@
RING
GND
GND
GND
GND
GND
GND
G2
RING
P2
P2
TIP
TIP
R17
C19
SPR@ 1K_0402_5% SPR@ 0.1U_0402_16V4Z

2
2
+5VS
DOCK_MOD_TIP
@ 10P_0402_50V8J
SPR@JAE_SP03-14588-PCL03
USBP3+
C11
@ 10P_0402_50V8J
+3VALW
+5VALW
SPR@
2N7002_SOT23
Q2
LAN_LINK#
2
G
2
G
3
LANLINK_STATUS#_DOCK
D
SPR@
2N7002_SOT23
<34,42,48> SLP_S5
Q3
Q4
SPR@
2N7002_SOT23
Q5
2N7002_SOT23
2
G
1
2
SPR@ ACES_85205-0200
<19,26,38,42> SLP_S3#
4
LAN_LINK# <19,27,28>
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
SPR Connector
A
DOCK_MOD_TIP
DOCK_MOD_RING
DOCK_HPS <32>
DOCK_HPS#
2
G
JP5
SLP_S5#_5R
D
<36,38,39> STB_LED#
R20
100K_0402_5%
PW R_LED
LAN_ACTIVITY# <27,28>
Q1
LAN_ACTIVITY#
R15
100K_0402_5%
R10
SPR@
100K_0402_5%
SPR@ 10K_0402_5%
R8
SPR@
10K_0402_5%
SPR@
2N7002_SOT23
2
G
+3VALW
LAN_ACT#_DOCK
R21
2
+5VS
+5VS

Custom
Date:
Rev
0.4
LA-2541
Sheet

E
40
of
58
+3VL
+3VL
+3VS
+2.5VS
C647
R469
D26
100K_0402_5%
C636
0.1U_0402_16V4Z
VR_ON
<49>
RB751V_SOD323
SLP_S3
<42,47> SLP_S3
O
G
10K_0402_5%
U40C
R471
14
0.1U_0402_16V4Z
10K_0402_5%
U40B2
14
R470
2N7002_SOT23
2
G
Q43
D25
2
RB751V_SOD323
U38C
<15,47,48,49> VGATE
+3VS
NB_PWRGD <13,18,38>
1 R467
2
10K_0402_5%
R465
47K_0402_5%
2
1
C632
1U_0603_10V4Z
10
100K_0402_5%
OE#
R462
+RS480_Core
2 R461
1 3
1K_0402_5%
Q42
MMBT3904_SOT23
Q41
MMBT3904_SOT23
J5
SHORT PADS
1K_0402_5%
2 R463
+1.8VS
For EC ATE
R464
100_0402_1%
+3VL
+3VL
+3VL
C646
14
U40E
P
11
10
VCC1_PWRGD <38>
12
O
G
I
7
U40F
P
13
8
14
560K_0402_5%
D29
@ RB751V_SOD323
U40D
14
R482
0.1U_0402_16V4Z
Compal Secret Data
Issued Date
2005/03/01
2006/03/11
Deciphered Date
Title
Power OK
2

Custom
Date:
R ev
0.4
LA-2541
Sheet

1
41
of
58
+5VALW to +5VS Transfer
1
2
R175
C257
100K_0402_5%
100K_0402_5%
2 10U_0805_10V4Z
<41,47>
SLP_S3
SLP_S3
SLP_S5
<34,40,48> SLP_S5
D
2N7002_SOT23
SLP_S3# 2
G
<19,26,38,40> SLP_S3#
C263
2N7002_SOT23
S
C264
0.1U_0402_16V4Z
1
SLP_S3 2
G
0.1U_0402_16V4Z
R176
<46>
For EC ATE
VL
2
1
RUNON
1
2
3
4
S
S
S
G
C253
SI4800DY_SO8
2 10U_0805_10V4Z
1 2
SHORT PADS
D
D
D
D
8
7
6
5
R165
100K_0402_5%
J1
VL
+5VS
U13
+5VALW
B+
2N7002_SOT23
SLP_S5# 2
G
SLP_S5#
Q13
Q12
Q14
+5VS
+2.5V
1
+1.25V
1
+3VS
+3VS
+2.5VS
+3VALW
+1.8VS
+3VALW to +3VS Transfer
Discharge circuit
R454
R362
R197
R174
R372
470_0402_5%
470_0402_5%
470_0402_5%
470_0402_5%
470_0402_5%
R373
RUNON
Q15
2N7002_SOT23
2N7002_SOT23
SLP_S3 2
G
SLP_S5 2
G
Q11
470_0402_5%
2N7002_SOT23 SLP_S5 2
G
Q37
1 2
SLP_S3 2
G
Q34
2N7002_SOT23
1 2
2 10U_0805_10V4Z
SLP_S3 2
G
Q39
2N7002_SOT23
1 2
SLP_S3 2
G
C262
C260
1 2
C261
SI4800DY_SO8
2 10U_0805_10V4Z
1
2
3
4
1 2
S
S
S
G
D
D
D
D
1 2
8
7
6
5
U14
2N7002_SOT23
Q35
+1.2V_HT
1
0.1U_0402_16V4Z
R361
0.1U_0402_16V4Z
FM1
1
2
2 10U_0805_10V4Z
FM5
1
FM6
1
CF10 CF13 CF14 CF2
CF9
CF3
+1.8VS
C551
SI4800DY_SO8
2 10U_0805_10V4Z
H4
HOLEA
H6
HOLEA
H17
HOLEA
H18
HOLEA
H16
H20
H19
HOLEA HOLEA HOLEA
H15
HOLEA
C560
C557
R177
H8
HOLEA
H3
H1
H5
HOLEA HOLEA HOLEA
1
2
3
4
S
S
S
G
D
D
D
D
H2
HOLEA
U36
CF7
CF12 CF11 CF1
+1.8VALW to +1.8VS Transfer

8
7
6
5
FM4
1
CF4
CF5
CF8
CF6
+1.8VALW
FM3
1
RUNON
FM2
1
C552
C555
SI4800DY_SO8
2 10U_0805_10V4Z
1
1
Q33
C547
1
2
3
4
2N7002_SOT23
S
S
S
G
U35
D
D
D
D
SLP_S3 2
G
+2.5VS
8
7
6
5
1 2
+2.5V
470_0402_5%
+2.5V to +2.5VS Transfer
H11
HOLEA
2 10U_0805_10V4Z
H12
HOLEA
H7
HOLEA
H9
H10
H14
H13
HOLEA HOLEA HOLEA HOLEA
H21
H22
H23
H24
HOLEA HOLEA HOLEA HOLEA
RB751V_SOD323
Issued Date
Compal Secret Data

2005/03/01
Deciphered Date
2006/03/11
Title
DC/DC circuit
M2
HOLEA
1
M1
HOLEA
C553
0.01U_0402_16V7K
22K_0402_5%
D7
1
2
2
0.1U_0402_16V4Z
RUNON

Custom
Date:
Rev
0.4
LA-2541
Sheet
of
42
58
PQ58
AO4407_SO8
PQ3
AO4407_SO8
1
2
3
PR15
200K_0402_5%
P3
PQ4
AO4407_SO8
PR17
1
2
0.015_2512_1%
1
2
0.018_2512_1%
REF
ANODE
1.24VREF
CATHODE
NC
NC
3
2
1
1
2
PC16
4.7U_1206_25V6K
1
PR208
3K_0402_1%
2
1
1
2
PR207
3K_0402_1%
PC17
10U_1206_25V6M
1
12
1
2
2
PQ8
2 RHU002N06_SOT323
G
S
PR59
8.87K_0402_1%
S
PR58
7.87K_0402_1%
2
RHU002N06_SOT323
2
G
PQ7
1
PR57
8.87K_0402_1%
PR54
24K_0603_0.5%
PR52
20K_0402_1%
PR53
24K_0402_1%
<51>
Icharger=3A
CELLSEL# =0,Vcharger= 12.6V
CELLSEL# =1,Vcharger= 16.8V
PR46
174K_0603_1%
10.14.2004
PR47
301K_0603_0.1%
PR48
301K_0402_1%
2
PQ9
2
G
2
G
RHU002N06_SOT323
RHU002N06_SOT323
PQ10
CELLSEL# <51>
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/01
LMV431B_SOT23-5
INC.
5
6
7
8
PR43
13.7K_0402_1%
BATT
1
1 2
ALARM
RHU002N06_SOT323
PC9
BATT
PR42
13.7K_0402_1%
D
PQ6
2
G
PD11
SKS30-04AT_TSMA
B+
PU25
<51>
@
AC_CHG
CV=12.6V(6 CELLS LI-ION)

16.8V(8 CELL LI-ION)
PR49
2
100K_0402_5%
2
2
33K_0402_1%
VL
PR30
0.025_2512_1%
1
2
15U_PLC1045P-150A_3.7A_20%
PR55
100_0402_5%
1
LM393M_SO8
PL2
1
2
AC_CHG
PR60
1
BATT
BQ24703VREF
7
PR204
47K_0402_1%
8
6
PU5B
PC113
0.1U_0402_10V6K
PC23
0.022U_0402_16V7K
2
1
PQ5
AO4407_SO8
PR38
150_0402_1%
PR45
4.7K_0402_5%
2
1M_0402_5%
PC12
4.7U_1206_25V6K
PD10
RLZ16B_LL34
2
1
1
2
6
1
17
23
14
1
2
PR25
0_0402_5%
0_0402_5%
1
2 4
BATSET
BATDEP
GND
NC4
NC3
2
1
10K_0402_1%
PR56
18
20
+3VL
PR51
PR50
130K_0402_1%
VS
VHSP
ACDRV#
0.1U_0402_16V7K
SN74LVC1G17DBVR_SOT23-5
PU24
ADP_PRES
ADP_PRES <38,45,51>
O 4
NC 1
+3VL
25
22
21
16
15
12
24
PC114
0.1U_0402_10V6K
LM393M_SO8
COMP
NC1
NC2
1
I
7
10
11
ACDRV#
VCC
PWM#
SRP
SRN
BATP
BATDRV#
PR209
BQ24703_QFN28
2
2
O
-
PU5A
VL
10K_0603_1%
1
PR44
2
2
1
PR40
10K_0402_5%
100K_0402_1%
1
PR39
2
330K_0402_5%
ENABLE
ACSEL
ALARM
SRSET
ACSET
ACPRES
IBAT
VREF
150P_0402_50V8J
PC20
2
1
+3VL
+3VL
2
1
PR36
49.9K_0402_1%
PC19
PR37
1
1U_0603_6.3V6M
2
1
VIN
5
28
19
2
3
27
13
4
PR32
191K_0402_1%
PC15
1
ACDET
PR35
200_0402_1%
2
1
PR33
43.2K_0402_1%
2
@
PD33
1SS355_SOD323
@
PR34
23.7K_0402_1%
2 2
100K_0402_1%
2 PR29
1
+3VL
100K_0402_5%
BQ24703VREF
CHGCTRL
4
<38,51>
ACN
ACP
ACDET
PC18
4.7U_0805_10V6K
5
@
2 PR26
1
1K_0402_1%
ALARM
2
140K_0402_1%
PR28
0.1U_0603_16V7K
100K_0402_1%
AC_CHG
LMV321M7_SC70-5
8
9
26
B+
ACDET
2 PR31
ACSET
PU4
BATT
<52>
VL
PR27
1
PU3
@1
PR23
2
1M_0402_5%
PR24
23.7K_0402_1%
1.65K_0402_1%
B+
PC11
4.7U_1206_25V6K
2 PR22
RHU002N06_SOT323
PC21
4.7U_0805_10V6K
1
1
3
<45,50>
PR20
100_0402_1%
1U_0603_6.3V6M
PC13
1
2
PR6
10K_0402_5%
2
1
PR19
100_0402_1%
2
3K_0402_5%
B+
2
1
ADP_PRES
ACOK
PR41
1
P4
PR16
8
7
6
5
PC14
1U_0805_50V4Z
P2
ACDRV#
PR18
150K_0402_5%
PQ59
2
G
BATT
1
2
3
8
7
6
5
PR21
1
2
0_0402_5%
8
7
6
5
1
2
3
VIN
P2
2
1
PC22
100P_0402_50V8J
1
2
VIN
Title
Charger
Custom
Date:
Rev
0.4
LA-2541

D
Sheet
43
of
57
+3.3V/+5V
B+
PD12
CHP202U_SC70
1
PR61
499K_0402_1%
1
2 1
2
PR71
PR68
499K_0402_1% 200K_0402_1%
LX3
2
DL3
7
2
2
2 1
+3VLP
1
+
PC37
150U_D_6.3VM
+3VL
PJ1
2
PR78
PR76
0_0402_5% @ 3.57K_0402_1%
PRO#
+3VALWP
PR77
0_0402_5%
+3VLP
PL5
10UH_D104C-919AS-100M_20%
PR69
0_0402_5%
DH3
1
2
BST3A
28
26
24
27
22
PR79
100K_0402_5%
PAD-OPEN 2x2m
PC40
0.1U_0603_16V7K
PQ13
RHU002N06_SOT323
8
7
6
5
3HG
10
LDO3
25
23
11
+3VL
D2
G2
D2
D1/S2/K
G1
D1/S2/K
S1/A D1/S2/K
AO4912_SO8
1
2
VL
3
PC38
0.22U_0603_10V7K
MAINPWON <6,45,50>
PC39
4.7U_0805_10V4Z
2
1
PR73
47K_0402_5%
2
1
PC36
0.1U_0603_25V7K
GND
V+
2 1
2
PR70
PR67
499K_0402_1% 200K_0402_1%
1
2
ILIM3
PC32
1U_0805_16V7K
17
LX5
PU6
DL5
ILIM5
OUT5 MAX1999EEI_QSOP28
FB5
BST3
N.C.
DH3
DL3
SHDN#
LX3
ON5
OUT3
ON3
FB3
SKIP#
PGOOD
VCC
DH5
15
19
21
9
1
REF
1
2
2
PC34
2
1
0.1U_0603_50V4Z
BST5
1
2
PR217
0_0402_5%
12
1
2
@ 0_0402_5%
2VREF_19998
PR74
PR301
1
2
0_0402_5%
1
2
3
4
2VREF_1999
16
6
4
3
2VREF_1999
2
1
2
1
PR75
0_0402_5%
PR72
10.2K_0402_1%
VS
PQ12
PC30
4.7U_1206_25V6K
1
2
+5VALWP
PC29
2200P_0402_50V7K
PC28
0.1U_0603_16V7K
PR66
0_0402_5%
14
LD05
BST5A
18
PC33
4.7U_0805_10V4Z
2
1
PL4
10UH_D104C-919AS-100M_20%
2
1
DL5
20
VL
<52> MAX_LX5
4.7U_1206_25V6K
PC31
2
1
LX5
PC35
150U_D_6.3VM
PR65
4.7_1206_5%
AO4912_SO8
B++
VS
PR64
47_0402_5%
PR63
0_0402_5%
13
8
7
6
5
TON
D2
G2
D2
D1/S2/K
G1
D1/S2/K
S1/A D1/S2/K
1
2
3
4
PR62
2.2_0402_5%
5HG 1
DH5
2
PQ11
PC25
0.1U_0603_50V4Z
1
2
BST3B
VL
PC27
10U_1206_25V6M
BST5B
PC24
0.1U_0603_50V4Z
1
2
B++
PC26
2200P_0402_50V7K
2
1
PL3
FBM-L18-453215-900LMA90T_1812
2
G
1
RHU002N06_SOT323
PQ14
2
G
KBC_PWR_ON <38>
J7
NO SHORT PADS
Compal Secret Data
2005/03/01
Issued Date
2006/03/01
Deciphered Date
Title
3.3V / 5V
D
Size
B
Date:
Document Number
Rev
0.4
LA-2541
Sheet

E
44
of
57
VIN
PCN1
PL1
FBM-L18-453215-900LMA90T_1812
3 1
PC1
100P_0402_50V8J
ADPIN
1
PR1
10K_0402_5%
PC3
100P_0402_50V8J
2
1
PC2
1000P_0402_50V7K
1
2
PD1
SINGATRON_2DC_S736I201 @ EC10QS04_SOD106
PC4
1000P_0402_50V7K
2
1
4 2
VIN
PR2
1.5K_1206_5%
2
P4
PD2
VMB_A
PR3
2
1.5K_1206_5%
PR5
2 2
PD4
VMB_B
VS
1
PR7
2
47_1206_5%
B+
PC5
0.1U_0603_50V4Z
VL
PR9
1M_0402_1%
2
1
PD5
1N4148_SOD80
1N4148_SOD80
PR8
100K_0402_5%
1
2
1N4148_SOD80
PR4
47_1206_5%
2
2
1.5K_1206_5%
1N4148_SOD80
PD3
VL
PC6
1500P_0402_50V7K
PQ1 D
PR12
301K_0402_1%
PR11
220K_0402_1%
PR13
2
G
1
1
LM393M_SO8
PC8
1000P_0402_50V7K
1
2
RB715F_SOT323
,44,50> MAINPWON
P
1
PU1A
PR219
PD6
1
2 2
@ 0_0402_5%
3
PC7
0.1U_0603_16V7K
<43,50> ACOK
PR10
200K_0402_1%
VS
ADP_PRES <38,43,51>
2
47K_0402_5%
S
RHU002N06_SOT323
+5VALW
PR14
10K_0402_5%
2
1
PQ2
DTC115EUA_SC70
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/01
A
Title
DCIN / Pre-Charge
Custom
Date:
Rev
0.4
LA-2541
Sheet

D
45
of
57
B+++
PC41
2200P_0402_50V7K
B+
FBM-L11-322513-151LMAT_1210
PR80
51_1206_5%
+5VALWP
1
PC42
10U_1206_25V6M
PL6
2
0_0402_5%
PR211
1
ISEN2
22
LGATE1
LGATE2
27
PGND1
PGND2
26
VOUT2
VSEN2
EN2
PG2/REF
20
19
21
16
OCSET2
18
9
10
8
15
11
ISEN1
VOUT1
VSEN1
EN1
PG1
+3VALWP
1
PR93
91K_0402_1%
PD44
RB751V_SOD323
PR94
57.6K_0402_1%
2
13
<19> SB_SLP_S5#
ISL6227CA_SSOP28
PR90
10K_0402_5%
2
2
PC57
@ 1000P_0402_50V7K
PR213
33_0402_5%
PD45
<19,38> PM_RSMRST#
SLP_S5# <42>
PR92
10K_0402_1%
1
2
0_0402_5%
PR140
PC58
1000P_0402_50V7K
PR212
0_0402_5%
1
OCSET1
ISL6227
PR87
2.74K_0402_1%
2
1
25
PR85
2.2_0402_5%
2
PC54
4.7U_0805_6.3V6K
PHASE2
220U_D2_4VM
PC53
PHASE1
PR83
0_0402_5%
24
+1.8VALWP
PR88
10K_0402_1%
UGATE2
PL8
3.3UH_PLFC0745P-3R3A_30%
1
2
28
14
UGATE1
AO4912_SO8
PC50
0.1U_0603_25V7K
2
1
1
2
3
4
VIN
23
G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A
PC55
0.01U_0402_16V7K
2
1
17
BOOT2
DDR
1
2
PR89
18.2K_0402_1%
PR91
10K_0402_1%
BOOT1
PR86
2.74K_0402_1%
7
2
1
1
SOFT2
PR82
0_0402_5%
1
PR84
2.2_0402_5%
PC56
0.01U_0402_16V7K
PC48
0.01U_0402_16V7K
2
1
4.7UH_PLFC1045P-4R7A_5.5A_30%
1
8
7
6
5
AO4912_SO8
1
VCC
PC49
0.1U_0603_25V7K
2
1
PC51
220U_D2_4VM
PC52
1
2
4.7U_0805_6.3V6K
PC47
0.01U_0402_16V7K PU7
12 SOFT1
2
1
GND
PL7
+2.5VP
8
7
6
5
2
C
D2
G2
D2
D1/S2/K
G1
D1/S2/K
S1/A D1/S2/K
PC46
4.7U_1206_25V6K
PQ17
PQ16
1
2
3
4
1
PC45
@ 2200P_0402_50V7K
PC44
2.2U_0805_10V6K
2
PR81
2.2_0402_5%
PD13
CHP202U_SC70
PC43
0.1U_0603_25V7K
2
1
RB751V_SOD323
+1.8VALWP
Iimit=(10.3-8uA*Rimit)*(Rsense+140)/(Rsense*Rds)
Rsense=2K,RILM=107K,Rds(on) tpy.=19.7m,Max=24m.
Iimit Min=9.6/107K*(100+2K)/(24m*1.3)=6.0388A
Iimit Max=9.6/107K*(100+2K)/19.7m=9.564A
+VCCP O.C.P. = 6.038A ~ 9.564A
Iimit=(10.3-8uA*Rimit)*(Rsense+140)/(Rsense*Rds)
Rsense=1K,RILM=51K,Rds(on) tpy.=19.7m,Max=24m.
Iimit Min=9.6/51K*(100+1K)/(24m*1.3)=6.636A
Iimit Max=9.6/51K*(100+1K)/19.7m=10.897A
+VCCP O.C.P. = 6.636A ~ 10.897A
A
Compal Secret Data
Issued Date
2005/03/01
2006/03/01
Deciphered Date
Title
2.5VP / 1.8VALWP
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
46
of
57
PJ11
JUMP_43X79
+1.8VALW
GND
NC
VREF
NC
NC
TP
+3VS
VCNTL
PR99
2K_0402_1%
VOUT
PC64
4.7U_0805_6.3V6K
VIN
PU9
PC65
1U_0603_6.3V6M
APL5331KAC-TR_SO8
1
2
+1.5VSP
PC67
4.7U_0805_6.3V6K
PC68
@ 0.1U_0402_16V7K
D
PC66
0.1U_0402_16V7K
2
G
PR101
10K_0402_1%
PQ20
S
SN7002N_SOT23
0_0402_5%
1
2
<41,42> SLP_S3
PR100
+5VALW
PR102
1
2
PD14
1N4148_SOD80
PC71
4.7U_1206_25V6K
1
2
+5VALW
PC70
10U_1206_25V6M
PQ21
BOOT
OCSET
UGATE
PHASE
8
7
6
5
FB
G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A
1
2
3
4
AO4912_SO8
PL9
3.3UH_PLFC0745P-3R3A_30%
2
PQ23
SN7002N_SOT23
1
3
GND
LGATE
APW7057KC-TR_SOP8
PC75
PR106
5.11K_0402_1%
1
2
@ 0.1U_0402_16V7K
+1.2V_HTP
1
PC121
220U_B2_2.5VM
PQ22
SN7002N_SOT23
2
G
3
<15,41,48,49> VGATE
2
G
1
PR105
0_0402_5%
1
2
1
PR104
100K_0402_5%
2
1
+5VALW
JUMP_43X118
0.1U_0402_16V7K
PC73
VCC
6.81K_0402_1%
PC72
470P_0402_50V8J
PU10
@ 1U_0603_6.3V6M
PR103
PJ12
@ 10_0603_5%
PC69
PC74
220U_B2_2.5VM
PR107
10K_0402_1%
PC76
@ 0.1U_0402_16V7K
PC77
1
2
0.1U_0402_16V7K
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/01
Title
1.2V_HTP / +1.5VSP
2
Size
A3
Date:
Document Number
Rev
0.4
LA-2541
Sheet
1
47
of
57
+1.8VALW
PJ3
2
+3VALWP
GND
NC
VREF
NC
PR95
10K_0402_1%
VOUT
NC
TP
+1.5VS
(2A,140mils ,Via NO.= 7)
PJ7
2
+2.5VP
PJ8
+2.5V
+1.25VP
+1.25V
JUMP_43X79
+1.2V_HTP
+1.2V_HT
+RS480_CoreP
JUMP_43X118
PJ14
2
+RS480_Core
JUMP_43X118
3A,120mils ,Via NO.= 6)
4A,160mils ,Via NO.= 8)
1
EN
DH
8
7
DL
BST
8
7
6
5
PR215
1
21.2VLX
4.7_0402_5%
G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A
1
2
3
4
PC314
0.1U_0603_25V7K
+RS480_CoreP
PL15
3.3UH_PLFC0745P-3R3_4.8A_30%
1
2
AO4912_SO8
1
0.047U_0603_25V7M
PR214
PR313
10_1206_5%
PQ67
RHU002N06_SOT323
VGATE#
2
G
PR319
30_0402_5%
PC306
1
PC307
330U_D2E_2.5VM
PD34
1
2
866_0402_1%
1SS355_SOD323
2
PR318
7.32K_0603_1%
MAX8578
VCC
1.2V_BST
1.2VDL
BST_LX
PR324
1
2
0_0402_5%
LX
PQ62
PR317
0_0402_5%
1
2 1.2V_DH
PC312
0.1U_0603_16V7K
PC302
10U_1206_25V6M
PR315
2
1
4.99K_0402_1%
10
2 VGATE
49.9K_0402_1%
VGATE#
SS
GND
FB
PR323
1
1
3
JUMP_43X79
B+
PC304
0.1U_0402_10V6K
41,47,49> VGATE
+5VS
PC305
1U_0603_6.3V6M
2
1
2
G
PQ64
RHU002N06_SOT323
2
G
+1.5VSP
PJ9
PR325
@ 0_0402_5%
1
2
OCSET
PR316
402_0603_1%
2
1
1
PU26
1
PQ63
RHU002N06_SOT323
PR309
2
1
10K_0402_5%
VL
PC311
0.01U_0402_25V7Z
2
1
PR314
787_0603_1%
2
1
3300P_0402_50V7K
2
1
PC313
+1.8VALW
PJ6
+5VALW
1
2
RHU002N06_SOT323
PR311
1
2 2
220K_0402_5% G
JUMP_43X118
PL16
FBM-L11-322513-151LMAT_1210
PQ65
1
2
PC62
10U_1206_6.3V7K
+1.8VALWP
JUMP_43X118
PC63
@ 0.1U_0402_16V7K
STRP_DATA <13>
1
1
C
2
PR98
G
PQ19
10K_0402_1%
S
SN7002N_SOT23
+3VALW
JUMP_43X118
+5VALWP
+1.25VP
PC61
0.1U_0402_16V7K
PJ5
PC60
1U_0603_6.3V6M
APL5331KAC-TR_SO8
1 PR97
2
0_0402_5%
<34,40,42> SLP_S5
JUMP_43X118
+3VALW
PC59
10U_1206_6.3V7K
VCNTL
VIN
1
+2.5V
1
PU8
PJ4
1
PC308
0.1U_0402_10V6K
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/01
Title
1.25VP / RS480_Core
5
Size
B
Date:
Document Number
Rev
0.4
LA-2541
Sheet
1
48
of
57
B+
CPU_B+
+5VS
D2
DHM
28
2.2_0402_5%
21
D3
20
D4
SHDN#
OAIN-
16
TIME
FB
15
FB
12
CCV
CCI
14
1
PC90
35
TON
BSTS
REF
DHS
33
DHS
0.22U_0603_16V7K
ILIM
ILIM
LXS
34
LXS
OFS
DLS
32
DLS
SUS
CSP
40
18
SKIP
CSN
39
GND
GNDS
13
PC82
100U_25V_M
PC81
2200P_0402_50V7K
PC80
0.01U_0402_50V4Z
2
1
PC79
4.7U_1206_25V6K
5
6
7
8
D
D
D
D
G
S
S
S
4
3
2
1
1
PD15
D
D
D
D
5
6
7
8
1.82K_0402_1%
+5VS
PD16
BSTM
2
1
GNDS
CPU_B+
CHP202U_SC70
5
6
7
8
PC97
2
1
D
D
D
D
PC122
2
1
PR133
100_0402_5%
1000P_0402_50V7K
1
2
5
6
7
8
PR129
11
820_0402_5%
2
1
PR134
0_0402_5%
PR96 0_0402_5%
REF 2
1
PR127
1
2
PR132
121K_0402_1%
0.47U_0603_16V7K
REF
PC88
2
470P_0402_50V8J
1
PC91
PC92
100P_0402_50V8J
1 PR131
270P_0402_50V7K
PR128 200K_0402_1%
80.6K_0402_1%
1
2
REF
1
60.4K_0402_1%
2
PR210
@10_0402_5%
CPU VCC SENSE
PQ27
IRF7413Z_SO8
PR136
0_0402_5%
2
CPU_COREFB
1
PR130
71.5K_0402_1%
1
2
PC89 1
OAIN+
SKS30-04AT_TSMA
2
1
PR120
820_0402_5%
17
OAIN+
IRF7832_SO8
S1
G
S
S
S
38
PC96
0.01U_0402_50V4Z
2 PR126
PC86
2
1
PC85
CMN
@ 100K_0402_5%
37
S0
PR116
2
0.001_2512_5%
VR_ON
CMP
MAX1544
PGND
2
1
PC95
4.7U_1206_25V6K
PR125
31
2200P_0402_50V7K
2
1
PC94
4.7U_1206_25V6K
1>
VROK
PGND
1
DLM
OVP
LXM
PQ26
For EC ATE
PR124
0_0402_5%
19
SHORT PADS
2
25
29
4
3
2
1
<15,41,47,48> VGATE
J2
1
27
PC93
2
1
VCC
LXM
DLM
PU11
+CPU_CORE
G
S
S
S
VID4
PL11
.56UH_MPC1040LR56_ 23A_20%
4
3
2
1
VID3
<6>
PQ25
IRF7832_SO8
4 G
D
3 S
D
2 S
D
1 S
D
<6>
DHM
OAIN+
2
@ 100K_0402_5%
PL12
.56UH_MPC1040LR56_ 23A_20%
PD17
2
PR137
820_0402_5%
5
6
7
8
SKS30-04AT_TSMA
<6>
CPU_COREFB#
Near CPU GND
OAIN+
PQ28
IRF7832_SO8
4 G
D
3 S
D
2 S
D
1 S
D
@ 100K_0402_5%
PR300
1
2
PR205
@10_0402_5%
PQ29
IRF7832_SO8
4 G
D
3 S
D
2 S
D
1 S
D
5
6
7
8
<6>
22
PR114
0_0402_5%
2
PC300
4700P_0402_25V7K
2
1
VID2
1000P_0402_50V7K
1 PR112
26
BSTM
PC87
1
2
D1
PR123 1.82K_0402_1%
1
2
23
PR206
499_0402_1%
2
1
36
PR122
V+
0.22U_0603_16V7K
<6>
PQ24
IRF7413Z_SO8
499_0402_1%
2
1
D0
2.2_0402_5%
VID1
PR121
VDD
24
0.22U_0603_16V7K
<6>
2
1
PR110 0_0402_5%
2
1
PR111 0_0402_5%
2
1
PR113 0_0402_5%
2
1
PR115 0_0402_5%
2
1
PR117 0_0402_5%
2
1
PR118 0_0402_5%
1
2
PR119 0_0402_5%
VID0
BSTM
PR135
<6>
VCC
30
VCC
2
0.01U_0402_50V4Z
PC83
2.2U_0603_6.3V4Z
10
PC84
1U_0603_10V6K
PR109
2
2
1
PC78
4.7U_1206_25V6K
PR108 10_0402_5%
2
1
10K_0402_5%
1
+3VS
PL10
FBM-L18-453215-900LMA90T_1812
1
2
PC123
PC98
0.47U_0603_16V7K
@ 4700P_0402_25V7K
PR138
2
820_0402_5%
PC315
OAIN+
2
1
1000P_0402_50V7K
PC316
OAIN+
2
1
1000P_0402_50V7K
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/01
Title
+CPU_CORE
2

Custom
Date:
Rev
0.4
LA-2541
Sheet
1
49
of
57
10.13.2004
VMB_A
BATT_A
PL13
PCN2
GND
AB/I_A
EC_SMD_A
EC_SMC_A
<51>
PR139
2
1
@ 330K_0402_5%
2
3
4
5
PC99
1000P_0402_50V7K
PH1 near CPU :

PCBA thermal protection at 90 degree C
Recovery at 45 degree C
PC100
0.01U_0402_50V4Z
SMD
SMC
ID
B/I
BATT+
FBM-L18-453215-900LMA90T_1812
1
2
5
6
O
-
PR147
PR148
150K_0402_1%
BATT
PR153
@ 499K_0402_1%
1
2
@SM05_SOT23
THM_MBAY# <38>
VS
EC_SMC_B1
AB1B_DATA <38>
AB1B_CLK <38>
PR156
@499K_0402_1%
<43,45> ACOK
EC_SMD_B1
PC105
0.01U_0402_50V4Z
VL
150K_0402_1%
100_0402_5%
PR152
@10K_0402_5%
2
PR155
RHU002N06_SOT323
+5VALWP
PR154
100_0402_5%
PC104
0.01U_0402_50V4Z
LM393M_SO8
1
PC103
1000P_0402_50V7K
SUYIN_20163S-06G1-K
PD43
@SM24_SOT23
PR1491
2
1K_0402_5%
1
2
+3VL
PR150
PR151
210K_0402_1%
1K_0402_5%
PD42
PQ15
2
G
GND
EC_SMD_B
EC_SMC_B
AB/I_B
TS_B
2
3
4
5
SMD
SMC
B/I
TS
BATT+
BATT_B
PL14
FBM-L18-453215-900LMA90T_1812
1
2
PC101
1000P_0402_50V7K
PCN3
VMB_B
PR144
2
1
2.55K_0603_1%
PC102
0.22U_0402_10V4Z
2
1
PU1B
MAINPWON <6,44,45>
PR146
15K_0402_1%
1
2
AB1A_CLK <38>
AB1A_DATA <38>
EC_SMC_A1
EC_SMD_A1
PR145
47K_0402_1%
1
2
THM_MAIN# <38>
VL
PR142
PR143
100_0402_5% 100_0402_5%
PH1
10K_TH11-3H103FT_0603_1%
PR141
100_0402_5%
TYCO_C-1746706_6P
1
2
D
PR159
@499K_0402_1%
PQ31
S
<51>
CFET_B
2
G
@ RHU002N06_SOT323
4
Compal Secret Data

2005/03/01
Deciphered Date
2006/03/01
A
Issued Date
VL
PR158
@365K_0603_1%
LM393M_SO8
LM393M_SO8
@
O
G
PR157
@ 10K_0402_1%
1
2
2
8
P
@ PU12B
PC106
0.1U_0603_16V7K
@ RHU002N06_SOT323
P
2
G
PQ30
PC107
1000P_0402_50V7K
@
PU12A
Title
BATTERY CONN / OTP

Custom
Date:
Rev
0.4
LA-2541
Sheet

D
50
of
57
+3VL
1
2
PR164
22K_0402_5%
D RHU002N06_SOT323
2
G
BATT_IN
PD20
1SS355_SOD323
PR162
1.5M_0402_5%
PD21
RLZ6.2C_LL34
2
1
NC
PU15
4
BATT
SN74LVC1G14DCKR_SC70-5~D
D
1
2
G
1
2
PR165
22K_0402_5%
D
PQ37
RHU002N06_SOT323
2
G
ADP_PRES <38,43,45>
10K_0402_5%
SN74AHC1G08DCKR_SC70
PQ52
BATT_IN 2
G
1
3
1N4148_SOD80
RHU002N06_SOT323
PR172
4.7K_0402_5%
2
B540C_SMC
PQ43
AO4407_SO8
1
2
3
2
G
PD24
BATT
PQ44
AO4407_SO8
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
RHU002N06_SOT323
PQ40
RHU002N06_SOT323
IN2
PD23
1
2
3
PR174
470K_0402_5%
BATT_A
PQ42
2
G
PR167
470K_0402_5%
IN1
SN74LVC1G14DCKR_SC70-5~D
PR173
PR171
1 210K_0402_5%
1
5
BATSELB_A
PU17
P
BATSELB_A#
<38> BATSELB_A#
CFET_A
PU18
NC
2
B
PQ38
RHU002N06_SOT323
BATT_IN 2
G
PQ39
+3VL
PR166
470K_0402_5%
+3VL
HMBT2222A_SOT23
2
0_0402_5%
S
5
PQ35
PC111 RHU002N06_SOT323
2
3 1
+3VL
1000P_0402_50V7K
PQ34
PC110
2
1
PQ33
RHU002N06_SOT323
LATCH
PR161
1
2
100_0402_5%
RB715F_SOT323
74LVC1G02_04_SOT353
2
G
PR160
INA
PQ32
RHU002N06_SOT323
2
3
PD18
BATT_B
4
INA
74LVC1G02_04_SOT353
PU13
INB
P
O
1000P_0402_50V7K
BATSELB_A#
1
4
0.01U_0402_16V7K
PC108
2
1
PU14
INB
PC109
BATSELB_A
ALARM
2
PR163
47K_0402_5%
<43>
+3VL
BATT_A
0.1U_0402_10V6K
+3VL
+3VL
10K_0402_5%
+3VL
1
2
PQ50
RHU002N06_SOT323
CFET_B
CELLSEL#
BATT_IN
PR216
100K_0402_5%
PQ47
2
G
<43>
CELLSEL#
<38>
BATT_IN
2
G
PQ53
RHU002N06_SOT323
2
G
S
RHU002N06_SOT323
BATCON
RHU002N06_SOT323
BATT_IN 2
G
RHU002N06_SOT323
Issued Date
AB/I_A
Compal Secret Data

2005/03/01
Deciphered Date
2006/03/01
INC.
CFET_A
<50>
PQ51
D
4
1
RB715F_SOT323
PU20
O
NC
CFET_B
CFET_A
PD27
2
G
RHU002N06_SOT323
PQ36
PR175
100K_0402_5%
PR178
470K_0402_5%
2
1
2
1N4148_SOD80
<50>
PR179
4.7K_0402_5%
2
B540C_SMC
PQ49
2
G
PR181
1
PD26
BATT_B
PD25
SN74AHC1G08DCKR_SC70
HMBT2222A_SOT23
P
O
PR176
470K_0402_5%
1
2
3
+3VL
IN2
G
ADP_PRES
IN1
2
B
PQ46
AO4407_SO8
1
2
3
1
1
PQ48
PR180
10K_0402_5%
1
1 2
BATSELB_A#
PU19
PQ41
RHU002N06_SOT323
AC_CHG
<43>
PQ45
AO4407_SO8
PR177
470K_0402_5%
PR170
220K_0402_5%
1
2
PR169
10K_0402_1%
PC317
220P_0402_50V7K
PC112
2
1
1N4148_SOD80
1
2
PR168
470K_0402_5%
PD22
PU16
O 4
NC 1
2
5
CHGCTRL
0.22U_0402_10V4Z
38,43>
+3VL
Title
Charger
Custom
Date:
Rev
0.4
LA-2541

D
Sheet
51
of
57
RB751V_SOD323
RB751V_SOD323
PD29
NC
PC116
1U_0805_16V7K
1
1
2
PR195
@ 36.5K_0402_1%
PC118
0.1U_0402_16V7K
2
PR192
1M_0603_1%
G
4
LM358A_SO8
PC119
1U_0805_16V7K
PR197
10_0402_5%
2
39K_0603_1%
NC
PR320
MAX_LX5 <44>
PR198
10K_0603_0.1%
PR321
1
2
12K_0603_5%
ANODE
100K_0402_5%
CATHODE
LM358A_SO8
0.01U_0402_16V7K
REF
LMV431ACMX5_SOT23-5
PR199
ACSET
<43>
D
PR202
0_0402_5%
2
0_0402_5%
OCP#
<19>
PQ56
RHU002N06_SOT323
2
G
PC120
2
1
PR196
909_0402_1%
PU23
2
1
PR183
133K_0402_1%
PR191
PQ54
MMBT3906_SOT23
PC117
2200P_0402_50V7K
PU22B
10K_0402_5%
LM358A_SO8
PR322
100K_0402_5%
1
2
+5VS
PU22A
80.6K_0402_1%
PR193
2
1
2
PR203
10K_0402_5%
2
1K_0402_1%
1
2
1
2
PR189
PR194
10K_0402_1%
100K_0603_0.5%
PR201
237K_0402_1%
PU21B
PR187
0_0402_5%
P4
PR185
2
8
P
G
4
LM358A_SO8
2
PR186
0_0402_5%
3
2
PD32
PD31
@ 1SS355_SOD323 @ 1SS355_SOD323
1
PR184
+5VS
PU21A
+5VS
PD30
B+
D
PQ57
RHU002N06_SOT323
2
G
S
Compal Secret Data
2005/03/01
Issued Date
Deciphered Date
2006/03/01
Title
System OCP throttle
2

Custom
Date:
Rev
0.4
LA-2541
Sheet
1
52
of
57
Version Change List ( P. I. R. List ) for Power Circuit

Item Page#
Title
Date
Request
Owner
Issue Description
Solution Description
Rev.
41
41
4
C
CHARGER
CHARGER
08/17/2004
(DB)
HP
08/17/2004
(DB)
08/26/2004
(DB)
RS480_Core
10/14/2004
(SI-1)
HP
Battery CONN
10/14/2004
(SI-1)
HP
46
48
45
1.8VALWP
11/1/2004
(SI-1)
HP
46
RS480_Core
12/27/2004
(SI2)
HP
50
45
2.5V
10
51
OCP
11
44
12
12/27/2004
(SI2)
12/27/2004
(SI2)
2/21/2005
(PV)
4/7/2005
(MV)
4/14/2005
Battery Selector
(MV)
CHARGER
DB
SI
To change main battery CONN. pin define for supporting
NiMH battery (10/20-Cancel the design change,don't support the NiMH battery)
To add 1.8VALWP discharge circuit
To set RS480_Core(1.0V) from 1.04V to 1.0V
SI
add PD44,PR213
SI
Change PR314 from 750ohm to 787ohm ,

PR316 from 255ohm to 402ohm
SI2
Add PR216 (100k) to connect
PU20 pin2
SI2
HW
HP
DB
add PU26(MAX8576),PQ62(AO4912),PL15,PC307,
To implement PS480 power play
HP
HP
DB
add a PC113 4.7uF cap for +3VL and

add PC114 a 4.7uF cap for VL.
Both caps can be non-installed
HP
Battery Selector
add PQ33
Change PR16 to 15m ohm ,change PR17 to 18m ohm

change PR30 to 25m ohm.
add PR207,PR208,PC9
CHARGER
41
The reason for the change is reslove the

timing diff between two compatator for AC detect
add PD45
SI2
Remove PR182,PR188,PR190,PR200,PQ55
add PR320,PR321,PR322
To change the work mode of OCP function
PV
Remove PU4,PD33,PR23,PR24,PR27,PR31,PR34,PR35
Airline with travel battery issue
MV
add PC317
MV
Compal Secret Data
Issued Date
2005/03/01
2006/03/01
Deciphered Date
Title
PWR PIR Sheet (1)
2

Custom
Date:
Rev
0.4
LA-2541
Sheet

1
53
of
57
It em
<93.08.09>
Fixed Issue
M.B. V er.
Reason for change
PAGE
Modify List
codec is the primary codec and must be tied to AC_SDIN0
1 9 , 30
Change AC97_SDIN2 to AC97_SDIN0 for CODEC
0 .1
Conexant recommendation
30
Change R351 and R352 to be zero ohm resistors
0 .1
This shutdown pin of TPS2211A does not have a internal pullup
26
Add R770
0 .1
AMD recommendation
Connect pin 3(SD#) of U4 to +3VS directly
0 .1
Driving standby/power LED by STB_LED# pin directly for cost saving.
36
Delete Q79, R384 and R578
0 .1
If +2.5VDDA can be connected to +2.5VS directly, we can save the cost of U4
Reserve R772
0 .1
TI recommendation
Add Q85, D50, D51, R773, R774, R775 and C665. Change C403 and C406 from 0.33uF to 1uF
0 .1
<93.08.11>
ATI recommendation
HP request
<93.08.11>
10
re-annotation for process rule
<93.10.18>
11
Power saving
2 3 ,2 4
26
C onnect pin 12 of U12 to PCI_RST#
18
Chan ge R141 from 4.53k 1% to 5.49k 1%
0 .1
Change NIC from RTL8110SBL to BCM5788M
0 .1
2 7 , 28
33
Reserve C704
18
Add R799, R800, R801 a nd R802
4 ~ 3 0, 32~42
5, 8
12
Delete useless components which were reserved in rev.0.1
13
Pin-9(FS2) of U8(Clock gen.) is not a clock output pin.
14
re-annotation for all components, excluding MOM and power components.
0 .1
Change R51, R60, R320 and R326 from 100 ohm to 1K ohm
0 .2
23
Cha nge R496 from 150 ohm to 220 ohm
36
Change R285, R290 and R293 from 150 ohm to 220 ohm; Change R296 from 30 0 ohm to
5 6 0 ohm
7, 13
De lete C233, C523, R321, C409, U30, R234, C293 and U21
0 .2
13
Delete R95, add R72.
0 .2
Use Link# instead of Activity# for NIC_LINK# function
19
Connect U19.C5 to LAN_LINK#
0 .2
15
CARD_LED is an active high signal
23
Cha ng e Q4 5 from MMBT3 9 0 6 to MMBT3904
0 .2
16
PETp0 and PETn0 should be connected to Tx on the host, PERp0 and PERn0
should be connected to Rx on the host.
26
Swap these differential pairs
0 .2
17
Add an inverter between KBRST from KBC(U39) to KBRST# in SB400(U19)
38
Add Q46 and R497
0 .2
18
The reset signal(PCI_RST#) for LPC BIOS ROM de-assert too late
39
Use NB_RST#(A_RST#) instead of PCI_RST#
0 .2
19
PowerPlay support
1 3 , 14
Add R327, connect U9.E10 to power circuit. Cha nge VDD_CORE of U9 from +1.2V_HT to
+RS48 0_Core
0 .2
20
VariBright support
1 3 , 38
A dd R499 and R501, reserve R498 and R500

depopulate R499 and R501, populate R498 and R500
0 .2
21
HP request
19
Add R502
0 .2
36
Change Bat_LED to be on +3VL rail
38
Add R503, R504 and R505
15
Delete Q40, add R508(reserved), R509 and Q47
38
Change the net of U39.76 from THM_MAIN# to KBC_GPIO16; Add R507
0 .2
11
Change R357 from 1K ohm to 0 ohm, delete R355 and R363 from BOM.
0 .2
<93.10.21>
22
Main battery pin definition change
23
Mandatory ATI RS480 Design Change(PA_RS480F1)
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
HW PIR Sheet(1)
4

Custom
Date:
Rev
0.4
LA-2541
Sheet

5
54
of
58
It em
Reason for change
PAGE
Modify List
M.B. V er.
23
ATI Application Note(AN_IXP400AG2)
20
Delete R216, R217 and R218, pull SATA_X1, PLLVDD_SATA, XTALVDD_ SATA and
AVDD_SATA[8:1] to GND
0 .2
24
Power team recommendation
16
Change R316 from 2 2K_+/-5% to 1.8K_+/-1%, Change R315 from 10K_+/-5% to 1K_+/-1%
0 .2
<93.10.26>
25
IDE DASP# signal route error
35
Add D32, D33, R510 and R511
0 .2
<93.11.02>
26
To fix USB signal rate failed issue
0 .2
<93.10.21>
Fixed Issue
15
Populate R76
19
Do not populate C246 and C247 for external 48MHz OSC.
22
Populate R183 and R417, do not populate R418
27
To improve drive strength/Min Bottom Margin for PCIE
18
Chang e R402 from 5.49K ohm to 4.12K ohm
0 .2
28
ATI Product Advisory(PA_IXP400AC10)
18
Short PJ13; needn't to populate U17, R182 and R186; Change C265, C267, C268 and C269
back to 0.1uF
0 .2
29
HP request
14
Delete D6
15
Popula te R508 and do not populate R509
19
Cha nge R382 from 10K ohm to 47K ohm
0 .2
38
Change R491, R497 and R507 from 10K ohm to 100K ohm
41
Change C636 from 1uF to 0.1uF
30
Charge LED show wrong color
36
Swap the net of D16 pin 1 for the net of pin4
0 .2
31
Once power up Conexant CODEC, We got a pop sound issue. We have used SB
GPIO1 to asserted MUTE# for audio amp shutdown to avoided this pop sound.
Unfortuna tely, GPIO1 will output about 1.2m second "Hi" pulse once SB get
aux-power, so we can't shutdown amp during this interval. We have to add RC
delay circuit to eliminate this pulse.
32
Change R291 from 10K ohm to 100K ohm, add C655
0 .2
32
MIC can't work
33
Change the power of U34 from +VDDA_CODEC to +5VS
0 .2
33
The gain of MIC amp. is too big
33
Chang e R136 from 150K ohm to 100K ohm
0 .2
34
HP request
13
Change L23~L25 from FBM-L10-160 808-800LMT to HLC0603CSCCR11JT; Change L26~L28

from 0 ohm to HLC0603CSCC39NJT
0 .2
35
To improve overshoot for PCI clock
18
Ch ange R410, R414, R181, R179, R420, R424 and R423 from 22 ohm to 39 ohm
0 .2
36
To improve RTC accuracy
18
C hange C250 and C251 from 12pF to 18pF
0 .2
27
0 .2
28
Add R513 and reserve R512 for BCM4401; Change R313 from 1K ohm to 0 ohm for
BCM5788M; Reserve C656~C659
Populate C35 for both BC M5788M and BCM4401
<93.11.09>
Broadcom recommendation
37
<93.11.12>
<93.11.17>
38
To improve background noise for microphone
33
Add L43, C660 and R514
0 .2
39
To fix white screen issue after pressing Ctl+Alt+Del to restart
13
Add R515
0 .2
0 .2
0 .2
40
HP request
32
Change C356 and C355 from 0.47uF (X7R 10%) to 0.047uF (X7R 10%); Change C320, 318,
315, and 312 from 470pF to 220pF but still reserved only
41
Add Lid switch control from HW side
16
Add D34
35
change PCIRST# to NB_RST#
42
37
0 .2
38
43
HP request for microphone and audio
32
Add D35
33
Add L44,C661,R516
Change R376 to 14K
0 .2
Change U34 to TLC2462
Change R136 to 150K

44
reserve for new card clock request
26
2005/03/01
Issued Date
reserve Q48
0 .2
Compal Secret Data
2006/03/11
Deciphered Date
Title
HW PIR Sheet (2)
4

Custom
Date:
Rev
0.4
LA-2541
Sheet

5
55
of
58
It em
<93.11.18>
45
<93.12.23>
46
Reason for change
Fixed Issue
HP request
Remove unused component
47
Fixed ENVDD pulse when power on
48
Fixed V,VS,SLP_S3 and SLPS5 pulse when ALWS apply
49
Support Smart Card
M.B. V er.
PAGE
Modify List
18
Add R518 and R519
16
Add R517
0 .2
18
Del U17,R182,R186
19
De l R139
33
Del L43
13
Add R521
0 .3
1
0 .3
19
Add U12 (AND gate)
42
Pull high R175 and R176 to VL
2 3 ,2 5
Chan ge U23 from 7411 to 7611
0 .3
0 .3
U23 pin k7 pull high to +5VS
50
Su pport XD 1.2
2 3 ,2 5
Improve LAN performance
27
0 .3
Reserve U41 (Quick switch)

Add R 522,R523,R524,R525,R526,R527
51
28
<93.12.29>
52
<94.01.07>
53
Reserve ESD diode on external MIC and speaker connector
Remove unused component
Change R29 to 1.21K
32
Reseve D36,D37
33
Reserve D38
0 .3
Change U7 to PULSE _H5007
0 .3
Del R103 ,R104,R106,R107 (10K 0402 5%)
0 .3
18
De l PJ13,U17,R186,R182 (Modify net name from +1.9VS to +1.8VS)
19
Del R150,Y4,C246,C247,C2 48,C248,C249,Y3,R151,U37,R394
38
Del R520,C6 62,R505,R501,R503,R504
54
Reserve ESD diode on USB port
34
Reserve D39,D40,D41
0 .3
55
For TI request
2 3 ,2 5
Del R522,R523,R524 (on quick switch)
0 .3
Change R452 to 2 .2K

Change JP25,pin5 net name to CB_SDWP#_SMCE#
Change JP25,pin10 net name to CB_MSBS_SDCMD_SMWE#
Change JP25,pin13 net name to CB_MSBS_SDCMD_SMWE#
Reserve R531
Add R53 2 on net CLK_48M_CB for 7611

Add R53 3 on net CLK_48M_CB for 4510
Add R534 for 4 510
<94.01.10>
56
For TI request
2 3 ,2 5
Add R535
0 .3
De l R452
Add R536,R537,R538,R539,R540
De l R453
<94.01.13>
57
For MS card issue
25
Del Q19
0 .3
Add R54 4,Q50,R543R545

Reserve U42,Q49,R542,R541,C687,R5 46
58
For HP recommand
04
Cha nge R336 to 1.2K 0402 5%
18
Change R398 and R40 0 to 1.2K
0 .3
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
HW PIR Sheet (3)
4

Custom
Date:
Rev
0.4
LA-2541
Sheet

5
56
of
58
It em
<94.02.24>
Fixed Issue
Reason for change
PAGE
8
60
For S3 ,S4 resume issue
13
Change L34 from FBML10160808121LMT bead to 150 1% resistor
18
Change C268,C2 69,C265,C267 from 0.1u to 0.01u
19
Change U19.C6 NETNAME from THERM_SCI to OCP#
19
Change U19.B6 NETNAME fro m OCP# to THERM_SCI
19
Change MINIPCI_DIS# NETNAME to NEWCARD_RST
19
Del R395 and R530
Support HW throttling (OCP)
61
Can't detect Nee card when warm boot
19
1 9 ,2 9
26
<94.03.09>
M.B. V er.
Improve EMI issue on DDR data bus
61
<94.03.07>
Modify List
59
Change RP8,RP11,RP14~RP17,RP20,RP23,RP24,RP27,RP36,RP37,RP40,RP43,RP44,RP47 ,RP48

,RP51 ,RP53,RP56 from 10 to 39
0 .4
0 .4
1
0 .4
0 .4
Change R149 from pull high to pull down

Change MINIPCI_RST# N ETNAME to PCI_RST#
Ad d Q51
62
Modify LED brightness
36
Change R285 from 220 to 68
0 .4
63
Remove unused component and footprint
28
Del R303,Q25,Q 26
0 .4
38
De l R478
64
Connect Mini PCI clamp to GND
29
Connect JP11.127 and JP11.128 to GND
0 .4
65
Remove unused footprint
15
De l R62,R63,R77
0 .4
66
Fixed ATI SB400 32.576MHz RTC accuracy issue
18
Change Y5 to EPSON 12.5P 20ppm crystal
0 .4
67
Modem time drift issue
30
Change C363 and C367 to 15PF
0 .4
68
Separate Cardreader SM_XD power rail
25
Del U42,R545,R546
0 .4
Add R546, R547,Q56,D41,D42
69
Change SB 14.318MHz from NB to clock gen

Change clock gen 14.318MHz driving method
70
13
Delete R67 footprint and let NB OSCOUT pin NC.
19
Delete R529 footprint ,connect SB 14.318MHz from clock gen
15
0 .4
Let Clock gen pin 54 only drive 14.318MHz to SB
0 .4
Let Clock gen pin 53 drive 14.318MHz to Super IO and KBC
0 .4
71
Strap on SB400 PCICLK2 redefine.
25
Pop R180 and unpup R183
72
For ATI recommand to modify PCIE driving strength
12
Change R121 to 8.25K, R120 to 82.5
73
For ATI recommand
19
Let SB SUS_S TAT# NC
13
NB SUS_STAT# pull high to 1.8VS, R360 change to 4.7K, R364 change to 470K
Reserve USB ESD diode footprint

Reserve resistor footprint between A_ground and D_ground for ESD concern
34
Reserve D39 and D40 footprint
30
Reserve R548,R549,R 550,R551,R552 footprint
75
Broadcom 5788M version change
27
Change 5788M from revA3 to revA5
76
TI 7 611 version change
23
Change TI 7611 from revA to revC
0 .4
77
Amber LED change for HP request
36
Change D16 t o 19-22UYSYGC/S530-A2/TR8 19X16 G/Y
0 .4
78
Layout space save
18
Add RP68 ,RP69
74
0 .4
0 .4
0 .4
0 .4
Del R449,R21 0,R211,R450,R446,R447,R212,R220

4
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
HW PIR Sheet (4)
4

Custom
Date:
Rev
0.4
LA-2541
Sheet

5
57
of
58
It em
<94.04.11>
Fixed Issue
Reason for change
PAGE
Modify List
M.B. V er.
79
DDR memtest failed
Change RP8,RP11,RP14~RP17,RP20,RP23,RP24,RP27,RP36,RP37,RP40,RP43,RP44,RP47 ,RP48

,RP51 ,RP53,RP56 from 39 to 10
0 .5
80
Workaround for S3 resume failed
19
Reserve U43 and add R554
0 .5
81
For Sandisk MS pro 51 2MB card issue
23
Change R209,R224,R536,R537,R538,R539,R540 to 0 ohm
0 .5
82
For insert MS card shut down issue
25
Reserve U42,R553 and add C690
0 .5
Change Cardreader socket pin 45,46 to N.C.

Change Cardreader socket pin 1 to GND
<94.04.14>
83
For SM card detect abnormal issue
26
Change cardreader pin30 to GND
0 .5
84
Charger and BATT full LED brightness abnormaml
36
Add R555
0 .5
85
Improve EMI issue
39
Add C6 89
0 .5
86
Improve internal mic noise
33
Change C235 to 0.047u and C239 to 220p
0 .5
87
TI recommand
23
Reserve R556 (pull down on CARD_LED)
25
Reserve C6 92,C693,C694 (0.1u cap on card detect pin)
33
Change C235 to 0.027u and C239 to 270p
88
Improve internal mic noise
Compal Secret Data
2005/03/01
Issued Date
2006/03/11
Deciphered Date
Title
HW PIR Sheet (5)
4

Custom
Date:
Rev
0.4
LA-2541
Sheet

5
58
of
58

HP Compaq Nx6125 Epw00la 2541

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A

EPW00 Schematics Document

Compal Secret Data

Size Document Number

Friday, April 15, 2005

CRT & TV OUT

CardBus & 1394

AMP & Audio Jack

Power On/Off CKT.

DC/DC Interface CKT.

Power Circuit DC/DC

Compal Secret Data

Size Document Number

Friday, April 15, 2005

:means digital ground.

:means analog ground.

:means populate for BCM4401 only.

:means populate for BCM5788M only.

:means populate for PCI7611 only.

:means populate for PCI4510 only.

S5 S4/AC don't exist

CARD BUS & 1394

Compal Secret Data

KBC Internal ROM flash

Friday, April 15, 2005

PWM Fan Control circuit

Compal Secret Data

Claw Harmmer CPU (Host Bus)

Size Document Number

Friday, April 15, 2005

DDR_CLK5/5# & DDR_CLK7/7#

1 R370 MEMZN D14

Compal Secret Data

Claw Harmmer (Memory Bus)

Size Document Number

Friday, April 15, 2005

Near Power Supply

Place within 0.5" from CPU

Compal Secret Data

Claw Harmmer (MISC)

Size Document Number

Friday, April 15, 2005

Loop Bandwidth Bulk Cappacitance

CPU Decouping Capacitor

Compal Secret Data

Claw Harmmer (Power & Ground)

Size Document Number

Friday, April 15, 2005

Place these resistors

Compal Secret Data

Size Document Number

Friday, April 15, 2005

Place these resistor

Place these resistor

Compal Secret Data

Size Document Number

Friday, April 15, 2005

Compal Secret Data

DDR SODIMM Decoupling

Size Document Number

Friday, April 15, 2005

HYPER TRANSPORT CPU