USN

06ES32

Third Semester B.E. Degree Examination,

December 2010
. .

Analog Electronic
Time: 3 hrs.
cU
C,)

Circuits
Max. Marks: 100

Note: Answer any FIVE full questions, selecting atleast TWO

Questions from each of Part

"1
(;j

-A

and Part

- B.

~
I\)

t;j

PART-A a. What is an equivalent circuit of a device? Explain the different equivalent circuits for

.::: u; I\) 1\)..0

semiconductor iode. d

(07Marks)

~= 0.'tt)

~ ..011
'(;!

b. Analyse the circuit shown below, Fig. Q1(b), and draw the output waveform. Assume Vr = 0.7V. (08Marks) -t
+15V1"'c i la.lt

gfoo .- +
CN

S
I\)

""
~

~ ?f
C

Fig. Ql(b)

i3~ .~

CfJ -15V
.

50kSL ~

.5
(/)

(/) I\)

(/)

-;;;.~ =

C 0

c. Write a suitable circuit to get the followingtransfer characteristics fig. Q 1(c), and explain its

e c:r
C,) I\)

working.
'''0

(05 Marks)

(;j 2;
C""'" 0"0

6.1V

~fij .- ... "0 0 ~t;j

C<I::I "'(;j "0 > >'1\)

Fig. Ql(c)

r
~"t (05 Marks)

=t:.s 0 ..!!1(;j = I\)

C,) d

0.0. 8 C<I 0. 0

a. Find IeQ and VCE for the circuit shown,Fig. Q2(a). Q

~.

~ .~
~~
... .~ 0 ="0 0 .>.<+-<
'.c .5 ~(;j 0.0 S > 0 ~ C,) >.
01)0 Q bII

~ 0

\Q c..
Fig. Q2(a)

< z
.. ~ 0

Q C

""':N

~~. . -~ \J

~ 1::
0 0. S

b. Find the coordinates of the Q point and locate it on the dc load line for the voltage divider configuration. Given Vcc = 16V,R1 (upper resistor) = 62 ill, R2 = 9.1 kQ, Rc = 3.9ill , RE= 0.6SkQ and p= SO.The coupling capacitors are lOJlFeach. Also find Vc, VEand VB. (08Marks) c. Define turn ON time and turn OFF time of a transistor. Design a transistor inverter if Vcc = 1OV, Icsat= 10mA and p = 250. Assume input to be a pulse of amplitude 1OV.
(07 Marks) 10f2

06ES32
3 a. What is bias stabilization? Explain. Derive an expression for S(Ico) and S(VBE)for fixed

biasconfiguration.

(08Marks)

b. For an emitter bias circuit (capacitor is bypassed), determine re, Zj, Zo and Av. Given RB= 470 kQ , Rc= 2.2kO, Vcc = 20V, RE= 0.56kO , CE = lOJlF, ~ = 120 , ro = 40kf! , Cc = 1Of!F. (08Marks) c. Determine i) the common logarithm of the number 2.2x 103. ii) the power gain in decibelsfor Po = 100m watts, Pi = 5m watts. (04Marks) 4 a. The transistor is connected as a CE amplifier. Determine Zc, Zo,AI and Av using complete hybrid model. (10Marks) b. Discuss the low frequency and high frequency response of a RC coupled amplifier. (10Marks)

PART-B
5
a. For the circuit of fig. Q5(a), calculate the dc bias voltage VE.

"V

(05 Marks)

.L;'"~ooo
Vet;"'" 11(;1/

Fig. Q5(a)

b. With a block diagram, explain the difference between voltage series and voltage shunt feedback. (05 Marks) c. Using the block diagram approach, derive an expression for Af and Zof for current series feedback amplifier. (10Marks) 6

a. With a neat circuit diagram, explain the operation of a transformer coupled class A power amplifier. (10Marks) b. For a class B amplifier with Vcc = 25V driving an 80 load, determine i) maximum lIP power ii) maximum OIP power iii) maximum circuit efficiency. (06Marks) c. Calculate the second harmonic distortion for an OIP waveform having measured values of VCE . = 2AV, VCE = 10V and VCE = 20V. (04Marks) mm Q max a. With a neat circuit diagram, explain the working principle of RC phase shift oscillator, with

relevantequations.
8

.
.

(10Marks)
(10 Marks)

b. What are the tuned oscillators? Explain anyone type of tuned oscillator.

a. Define gm and rd of field effect transistor. Explain the procedure to determine the above

valuesgraphically. andAv.
.

..

(06 Marks)

b. Write the ac equivalent circuit for voltage divider JFET configuration and determine Zj, Zo
(10 Marks)

c. Differentiate between enhancement and depletion MOSFET. ***** 20f2

(04Marks)