Code No: RR321301 Set No.

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III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2007
COMPUTER ORGANIZATION
(Electronics & Control Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
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1. (a) Draw instruction cycle state diagram and discuss it’s purpose
(b) Explain a mechanism by which other modules may interrupt the normal
processing of CPU. [8+8]

2. (a) Find the output of the following binary expressions using 2’s complement
representation.
i. 111.01 + 10.111
ii. 110.11 - 111.01
(b) Explain the steps involved in the subtraction of a number from a given number
using 1’s complement notation [10+6]

3. (a) Discuss various aspects of instruction set design.

(b) Explain about various types of data on which machine instructions operate.
[10+6]

4. (a) List various R3000 pipeline stages. Also explain the function of each.
(b) List and describe all shift and multiply/divide instructions of MIPS R-Series
processors. [8+8]

5. (a) Explain the principles of segmentation .

(b) Discuss about address translation in segmentation.
(c) What is hit ratio? [6+6+4]

6. (a) List the hardware events that occur after an I/O device completes an I/O
operation in interrupt driven I/O.
(b) List and explain the interrupt modes of Intel 8259A interrupt controller.
[8+8]

7. (a) List sequencing and branching control fields of IBM 3033 microinstruction.
(b) Discuss the functioning of micro sequencer with example [8+8]

8. (a) Elaborate on continuous field simulation problems.

(b) Discuss the organization of IBM 3090 with vector facility. [8+8]

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Code No: RR321301 Set No. 2
III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2007
COMPUTER ORGANIZATION
(Electronics & Control Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. Describe various instructions of IAS computer with their symbolic representation.

[16]

2. (a) Explain the subtraction of binary numbers in two’s complement notation

(b) Discuss about floating point addition. [6+10]

3. (a) Describe various arithmetic and logical instruction set operations.

(b) List CPU actions for various types of operations [8+8]

4. (a) Explain the register organization in a Power PC processor

(b) Classify interrupts on a Power PC. [8+8]

5. (a) What do you mean by virtual memory. Also explain about virtual memory
organization.
(b) Criticize the following statement: “Using a faster processor chip results in a
corresponding increase in performance of a computer, even if the main memory
speed remains the same”. [10+6]

6. (a) Explain about CD-ROM block format.

(b) What is WORM? Also explain its uses.
(c) Differentiate between disk layout using constant angular velocity and constant
linear velocity [5+5+6]

7. (a) Discuss about the evolution of I/O function.

(b) Explain the characteristics of I/O channels. [8+8]

8. (a) Classify and explain different multiprocessors

(b) Explain the organization of tightly coupled multiprocessor system with a
generic block diagram. [8+8]

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Code No: RR321301 Set No. 3
III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2007
COMPUTER ORGANIZATION
(Electronics & Control Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) Draw and explain the instruction cycle state diagram that includes interrupt
cycle processing.
(b) Discuss about transfer of control with multiple interrupts. Demonstrate with
a neat diagram [8+8]

2. (a) Perform the following subtractions on the following decimal numbers using 9’s
complement representation.
i. 23-12
ii. 23-29
(b) A binary computer uses 36 bit registers to store numbers. Eight bits are used
for the exponent and the exponent is represented in excess 64 form. Find the
approximate range of decimal numbers handled by this computer [6+10]

3. NOOP instruction has no effect on the CPU state other than incrementing the
program counter. Suggest some uses of this instruction with examples.
[16]

4. (a) Discuss about RISC pipelining with regular instructions

(b) How would you optimize RISC pipelining?
(c) Give reasons for reduction in overall execution rate of RISC processors
[8+4+4]

5. (a) Explain the principles of segmentation .

(b) Discuss about address translation in segmentation.
(c) What is hit ratio? [6+6+4]

6. (a) Discuss about possible DMA configurations.

(b) What is vectored interrupts.
(c) Discuss about 68000 interrupt structure. [6+4+6]

7. (a) On which types of information, a conditional branch instruction depends?

(b) Explain about IBM 3033 control address register
(c) Discuss about characteristics and terminology of microinstruction spectrum
[5+5+6]

8. (a) Discuss how branch prediction is done in pipelineing.

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Code No: RR321301 Set No. 3
(b) Differentiate between stastic and dynamic branch prediction
(c) Discuss about complex addressing modes implemented in a pipelined proces-
sor. [6+4+6]

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Code No: RR321301 Set No. 4
III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2007
COMPUTER ORGANIZATION
(Electronics & Control Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) Discuss the interconnection structure design of a computer.

(b) Explain various bus lines.
(c) What do you mean by multiple - bus hierarchies. [8+4+4]
2. (a) What is BCD representation. List the advantages of it.
(b) Convert the following binary numbers to decimal and octal forms
i. 101101110
ii. 1.011101 [8+8]
3. Write programs to execute Y= (A-B) / (C+D*E) using one-address, two-address
and three-address instructions. [16]
4. (a) List and describe integer arithmetic and logical instructions of Motorola 88000
(b) Discuss about functioning of Motorola 88000 instruction unit pipeline.
[8+8]
5. Write short notes on the following approaches with suitable examples. What are
merits and demerits of each.
(a) First - fit
(b) Best - fit
(c) Worst - fit [5+6+5]
6. (a) Elaborate about purpose and organization of data on magnetic tap
(b) Differentiate between magnetic-disk and magnetic-tape systems
(c) Discuss the technology used for CD-ROM systems [6+4+6]
7. (a) What is micro instruction. Give an interpretation of it.
(b) How is microprogramming concept is used to impletment the control unit.
(c) Differentiate between high level and micro programming languages
[4+8+4]
8. (a) Discuss how a pipeline stall is caused by a cache miss.
(b) Elaborate on instruction queue and it’s use in hardware organization.
[8+8]

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