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Teaching & Evaluation Scheme

M.TECH (VLSI)
Credits 20 20 20 14 Course (Number, abbreviated title, L-T-P, Credits) Lecture Courses Contact h/week Total 25 26 24 28

Sem.

EV- 500 Semiconductor Devices (Audit course) (2-1-0) 0

EV- 501 VLSI Technology (3-1-0) 4

EV- 503 Digital VLSI Design (3-1-0) 4

EV- 505 Semiconductor Device Models for Circuit Simulation (3-1-0) 4 EV- 521 Elective I (3-1-0) 4

EV- 507 Programming and Data Structure (3-1-0) 4

EV- 551 VLSI Lab I (0-0-4) 2

EV- 581 Seminar (0-2-0) 2 05 14 07 04

II

EV- 502 Analog VLSI Design (3-1-0) 4

EV- 504 Digital Systems Design (3-1-0) 4 EV- 603 VLSI Physical Design I (3-1-0) 4

EV- 506 CAD for VLSI (3-1-0) 4

EV- 552 VLSI Lab II (0-0-4) 2

EV- 582 Seminar (0-2-0) 2

04

12

06

04

III

IV

EV- 601 VLSI Testability & Testing (3-1-0) 4 EV- 692 Dissertation (0-0-28) 14

EV- 623 Elective II (3-1-0) 4

EV- 625 Elective III (3-1-0) 4

EV- 671 Minor Project (0-0-8) 4

04

12

04

08

28

Total Credits: 74

Note: Evaluation scheme as described in Ordinance for M.Tech. programmes.


Programme Core (PC) EV- 500 Semiconductor Devices (Audit course) EV- 501 VLSI Technology EV- 503 Digital VLSI Design EV- 505 Semiconductor Device Models for Circuit Simulation EV- 507 Programming and Data Structure EV- 551 VLSI Lab I EV- 581 Seminar EV- 502 Analog VLSI Design EV- 504 Digital Signal Processing EV- 506 CAD for VLSI EV- 508 Elective I EV- 552 VLSI Lab II EV- 582 Seminar EV- 601 VLSI Testability & Testing EV- 603 VLSI Physical Design EV- 623 Elective II EV- 625 Elective III EV- 671 Minor Project EV- 692 Dissertation Grand Total

210 310 310 310 310 004 020 310 310 310 310 004 020 310 310 310 310 008 0 0 28

0 4 4 4 4 2 2 4 4 4 4 2 2 4 4 4 4 4 14 74

Programme Elective (PE) 1. Embedded Systems Design 2. Semiconductor Materials and Device Characterization 3. Nano Technology 4. Hardware-Software Co-design 5. Memory Design and Testing 6. Algorithms for VLSI Design Automation 7. MEMS and IC Integration 8. Microwave & Optoelectronic Devices 9. Design of Analog/ Mixed Mode VLSI circuits 10. Modern Optimization Techniques 11. RF Microelectronics 12. Recent Trends in VLSI Design

SEMICONDUCTOR DEVICES (AUDIT COURSE)

EV-500

Cr L T P 0 2 1 0

Semiconductor materials, Crystal structures, Semiconductor , Quantum Mechanics and Band Theory, Carrier Properties State and Carrier Distributions Equilibrium carrier concentrations, Drift Diffusion Generation/Recombination, Generation/Recombination Equations of State Minority Carrier Diffusion Equation Introduction to p-n junctions, p-n Junction Electrostatics Ideal Diode, p-n Junction Small Signal Model p-n Junction Large Signal Model and distortion, Diode Applications Non-Idealities in pn Junctions AC & Transients in pn Junctions Heterojunctions Compound Semiconductor Diodes Schottky barrier diodes, Metal-Semiconductor Contacts, Semiconductor Fabrication, LEDs: Basic Operation, LEDs: Key Design Parameters, LEDs: Device Structures, Lasers: Basic Operation, Lasers: Basic Operation, Lasers: Key Design Parameters, Lasers: Laser Structures, Solar Cells: Basic Operation, Solar Cells: Design, Photodetectors: Basic Operation, Photodetectors: Devices and Uses, Introduction to Bipolar Junction Transistors, BJT Physics, HBT Physics and applications, Metal Oxide Semiconductor Capacitor, MOSFET Basics, MOSFET Device , MESFET, JFET, Polarization Based Devices (III-Nitrides and Ferroelectrics), Other Devices: CCD, Microwave transistors, power transistors, organic semiconductors. Text/ Reference Books: 1. A.S. Grove, Physics and Technology of Semiconductor Devices, John Wiley & Sons 2S.M. Sze, Semiconductor Devices, 2nd Ed., John Wiley & Sons Inc.

VLSI TECHNOLOGY EV-501 Cr L T P 4 3 1 0

Crystal growth & wafer preparation. Processing considerations: Chemical cleaning, getting the thermal Stress factors etc. Epitaxy: Vapors phase Epitaxy Basic Transport processes & reaction kinetics, doping & auto doping, equipments, & safety considerations, buried layers, epitaxial defects, molecular beam epitaxy, equipment used, film characteristics, SOI structure. Oxidation: Growth mechanism & kinetics, Silicon oxidation model, interface considerations, orientation dependence of oxidation rates thin oxides. Oxides. Oxidation technique & systems dry & wet oxidation. Masking properties of SiO2. Diffusion: Diffusion from a chemical source in vapor form at high temperature, diffusion from doped oxide source, diffusion from an ion implanted layer. Lithography: Optical Lithography: optical resists, contact & proximity printing, projection printing, electron lithography: resists, mask generation. Electron optics: roster scans & vector scans, variable beam shape. X-ray lithography: resists & printing, X ray sources & masks. Ion lithography.

Etching: Reactive plasma etching, AC & DC plasma excitation, plasma properties, chemistry & surface interactions, feature size control & apostrophic etching, ion enhanced & induced etching, properties of etch processing. Reactive Ion Beam etching, Specific etches processes: poly/polycide. Trench etching,

Text/ Reference Books: 1. Simon Sze, VLSI Technology McGraw-Hill Science/Engineering/Math; 2 edition 2. C. Y. Chang, ULSI Technology McGraw-Hill Higher Education; International Ed edition 3. Wai-Kai Chen, VLSI Technology (Principles and Applications in Engineering, 8) CRC; 1 edition

DIGITAL VLSI DESIGN EV-503 Cr L T P 4 3 1 0

Introduction: Basic principle of MOS transistor, Introduction to large signal MOS models (long channel) for digital design. The MOS Inverter: Inverter principle, Depletion and enhancement load inverters, the basic CMOS inverter, transfer characteristics, logic threshold, Noise margins, and Dynamic behavior, Propagation Delay, Power Consumption. MOS Circuit Layout & Simulation: MOS SPICE model, device characterization, Circuit characterization, interconnects simulation. MOS device layout: Transistor layout, Inverter layout, CMOS digital circuits layout & simulation Combinational MOS Logic Design Static MOS design: Complementary MOS, Ratioed logic, Pass Transistor logic, complex logic circuits. Dynamic MOS design: Dynamic logic families and performances. Sequential MOS Logic Design Static latches, Flip flops & Registers, Dynamic Latches & Registers, CMOS Schmitt trigger, Monostable sequential Circuits, Astable Circuits. Memory Design: ROM & RAM cells design Interconnect & Clock Distribution Interconnect delays, Cross Talks, Clock Distribution. Introduction to low power design, Input and Output Interface circuits. BiCMOS Logic Circuits Introduction, BJT Structure & operation, Basic BiCMOS Circuit behavior, Switching Delay in BiCMOS Logic circuits, BiCMOS Applications

SEMICONDUCTOR DEVICE MODELS FOR CIRCUIT SIMULATION

EV-505

Cr L T P 4 3 1 0

Principle of circuit simulation and its objectives. Introduction to SPICE: AC, DC, Transient, noise, temperature extra analysis. Junction Diodes: DC, small signal, large signal, high frequency and noise models of diodes. Measurement of diode model-parameters. BJT: DC, small signal, high frequency and noise models of bipolar junction transistors. Extraction of BJT model parameters. MOSFETs: DC, small signal, high frequency and noise models of MOSFETs. MOS Capacitors. Device SCALING: short and narrow channel MOSFETs. MOSFET channel mobility model, DIBL, charge sharing and other non-linear effects. MOS Models: Level-1 and level-2 large signal MOSFET models. Introduction to BSIM models. Extraction of MOSFET model parameters. JFET & MESFETs: modeling of JFET & MESFET and extraction of parameters. HBTs: Principles of hetrojunction devices, HBTs, HEMT Component model for ICs: Design rule checks, timing verification, worst case delay simulation, setup and hold times for clocked devices, Behavior modeling, structural modeling, simulation with the physical model, Hardware Description Language

Text/ Reference books 1. 2. 3. 4. 5. 6. S.M. Kang & Y. Leblibici, CMOS Digital Integrated Circuits-Analysis & Design, TMH, Ed. 2003 S.M. Sze, Physics of semiconductor devices, Wiley Pub. Rashid, SPICE. Sedra, Smith, SPICE. Bar Lev, Basic Electronics. BG Streetman, Solid state Electronic Devices, PHI.

PROGRAMMING AND DATA STRUCTURE

EV-507

Cr L T P 4 3 1 0

Programming: C program structures, Variables, Data Types, Declarations, Operators (Arithmetic, Relational, Logical), increment and decrement operators, Assignment operators and expressions, Arithmetic expressions, statements, symbolic constants, conditional expressions, Bitwise operators, precedence and order of evaluations, input-output functions. Statements and Blocks, branching statements (if, switch), Loops (while, for, do-while, repeat-until), Break and continue, go to and labels. Functions, external variables, scope rules, header files, static variables, initialization, parameter passing (call-by-value, call-by-reference), recursion, C preprocessor. Pointers and addresses, pointers and function arguments, pointer and arrays, address arithmetic, character pointers and functions, pointer arrays, multidimensional arrays, initialization of pointer arrays, pointers and multidimensional arrays, command line arguments, memory management. Structures: Defining and processing, passing to a function, Unions. Files: Standard input and output, formatted output, formatted input, file access, miscellaneous functions. Data Structures: Arrays : representation and basic operations. Linked list : Singly, Doubly, Circular and Doubly circular, definition, representation and their basic operations. Stacks and queues : insertion, deletion. Trees : insertion, deletion, traversal (inorder, preorder and postorder), binary trees, AVL trees, B-trees, B+-trees.

Text/ References books: 1. 2. 3. 4. 5. Using Information Technology, 5th Edi, Brian K Williams & Stacey C. Sawyer, 2003, TMH Fundamentals of computers and programming with C, A. K. Sharma, Dhanpat Rai Publications, Daryaganj New Delhi The C Programming Language by Dennis M Ritchie, Brian W. Kernigham, 1988, PHI. Horowitz, E. and Sahni, S., Fundamentals of Data Structures, Galgotia Publications. Rajaraman, V., Computer programming in C, PHI.

2ND SEMESTER

ANALOG VLSI DESIGN

EV-502

Cr L T P 4 3 1 0

Introduction: Small Signal & large signal Models of MOS & BJT transistor. Analog MOS Process (Double Poly Process). Single transistor Amplifiers stages, Multiple Transistor Amplifier stages: Cascode configuration, Active Cascode. Differential Amplifiers: Differential pair & DC transfer characteristics. Current Mirrors, Active Loads & References Current Mirrors: Simple current mirror, Cascode current mirrors Widlar current mirror, Wilson Current mirror, etc. Active loads, Voltage & current references. Analysis of Differential Amplifier with active load, supply and temperature independent biasing techniques, Frequency Response. Operational Amplifier: Design of two stage MOS Operational Amplifier, two stage MOS operational Amplifier with cascodes, MOS telescopic-cascode operational amplifiers, MOS Folded-cascode operational amplifiers, Bipolar operational amplifiers. Frequency response & compensation, OTAs. Nonlinear Analog Circuits: Four quadrant and variable Tran conductance multiplier, Voltage controlled oscillator, Comparators, Analog Buffers, Source Follower and Other Structures. Phase Locked Techniques; Phase Locked Loops (PLL), closed loop analysis of PLL. Digital-to-Analog (D/A) and Analog-to-Digital (A/D) Converters Switched Capacitor filters: OTA Amplifiers. Switched Capacitor Circuits and Switched Capacitor Filters, Current conveyors, Current feedback amplifier Text/ References books: 1. Phillip E. Allen and Douglas R. Holberg, CMOS Analog Circuit Design, Second Edition, Oxford University Press. Behzad Razavi, Design of Analog CMOS ICs, 2000. John Wiley Paul B Gray and R.G Meyer, Analysis & Design of Analog Integrated Circuits. D. A. Johns and Martin, Analog Integrated Circuit Design, John Wiley, 1997. R Gregorian and G C Temes, Analog MOS Integrated Circuits for Signal Processing, John Wiley, 1986. 6. R L Geiger, P E Allen and N R Strader, VLSI Design Techniques for Analog & Digital Circuits, McGraw Hill, 1990. Gray, Wooley, Brodersen, Analog MOS Integrated circuits, IEEE press, 1989. Kenneth R. Laker, Willy M.C. Sensen, Design of Analog Integrated circuits and systems, McGraw Hill, 1994.

2. 3. 4. 5.

7. 8.

DIGITAL SYSTEMS DESIGN EV-504 Cr L T P 4 3 1 0

Discrete time signals & systems, Z transforms, structures for digital filters, Design procedure for FIR and IIR filters. Frequency transformations, Linear phase design, Introduction to DFT. Methods for fast computation of DFT including FFT, NTT and WTFA. Noise analysis of digital filters. Power spectrum estimation. Multi-rate digital filtering: Introduction to multidimensional DSP. Examples of applications of DSP in communications.

Text/ References books: 1. 2. 3. 4. 5. Digital Signal Processing by William D. Stanley. Discrete-Time Signal Processing by A. V. Oppenheim and R. W. Schafer. Digital Signal Processing: Principles, Algorithms, and Applications by J. G. Proakis and D. G. Manolakis. Digital Signal Processing in Communication Systems by Marvin E. Frerking. Multirate Digital Signal Processing by R. E. Crochiere and L. R. Rabiner.

CAD FOR VLSI EV-506 Cr L T P 4 3 1 0

Introduction: Evolution and trends in VLSI CAD. Design process, representations, flow and methodology. Dealing with complexity CAD Tool types. Example of a methodology: synchronous design and RTL modeling. Digital hardware modeling: Structure modeling: Logic networks, connectivity & netlists, Hypergraphs. Connectivity data structures. Introduction to logic simulation. Dynamic verification (Simulators): Cycle-based simulation; logic relaxation; event-driven simulator kernels. Value sets. Zero/unit/variable delay simulation & issues. Coverage metrics; instrumentation. Simulation Algorithms: Compiled code & event driven Static logic verification (Formal): Advantages of static vs. dynamic verification; Logic equivalence checking. Advanced Boolean algebra: Shannon expansion, cofactors and Unate Recursive computation Paradigm Logic synthesis: 2- level minimization: exact vs. Heuristic, Multilevel minimization. Restructuring heuristics. Technology mapping; cell libraries Floor planning & placements: Layout elements, representations, methodologies. Floor plan structures. Placement algorithms local/random search, force-directed methods.

Routing, compaction, layout verification: Global and detailed routing. Steiner trees, Channel routing; area routing; Wire length Estimators. 1-D layout compaction. Principles of layout verification. Static timing: Principles of static timing analysis; Delay graphs for combinational logic blocks; Arrival times, required times, slack, Basic algorithms for path analysis in combinational logic. False paths; Flip-flops, latches and delay constraints; Clocking methods; Verifying timing of sequential logic; Delay modeling of gates, interconnect and devices. Timing & power driven synthesis: Timing-driven logic synthesis; Timing-driven layout synthesis; Clock skew optimization; Approaches to the timing convergence problem.

Text/Reference Books: 1. 2. 3. Stephen M. Trimberger, Introduction to CAD for VLSI, Kluwer Academic Publishers Samir Palnitkar, Verilog HDL (2nd Edition) Prentice Hall Publications, 2003 ISBN : 0130449113 Douglas J Smith, HDL Chip Design : A Practical Guide for Designing, Synthesizing and Simulating ASICs and FPGAs Using VHDL or Verilog Doone Publications, 1998, ISBN : 0965193438

3RD SEMESTER

VLSI TESTABILITY AND TESTING EV-601 Cr L T P 4 3 1 0

Test principles, Functionality Testing, Manufacturing Tests. Fault models, Stuch-at-faults, Short-circuited faults, Open-circuited faults. Automatic Test pattern generation, Fault grading, Fault simulation, Statistical fault analysis. Design strategies for test, Scan based test techniques, Layout for improved testability, Case studies, Functional Verification and testing. Linear feedback shift register. Fault tolerant design techniques. Text/Reference Books: 1. M. Abramovici, M. A. Breuer, A. D. Friedman, Digital Systems Testing and Testable Design Piscataway, New Jersey: IEEE Press 2. M. L. Bushnell, V. D. Agrawal, Essentials of Electronic Testing for Digital, Memory & Mixed-Signal VLSI Circuits Boston: Kluwer Academic Publishers 3. Wang, Laung-Terng; Wu, Cheng-Wen; Wen, Xiaoqing VLSI Test Principles and Architectures: Design for Testability Published By: Elsevier; Edition: 1

VLSI PHYSICAL DESIGN EV-603 Cr L T P 4 3 1 0

Layout rules and circuit abstraction, Layout environmens, Layout methodolies, Partitioning, Floor planning, Placement, Floor planning optimization, Placement cost functions, Simulated annealing, Resistive network methods, Routing, Routing in Field Programming Gate Arrays (FPGAs). Delay models, Minimization, Time driven routing, Cell generation and Programmable structiures, Transistor chaining, Gate Matrix Layout, CMOS layout. Compaction, I.D. compaction, one and two dimensional compaction graph based techniques, Wire length minimization, Grid constraints, Power minimization, Power delay optimization. Subsystem design, Architecture design, Chip design, CAD systems and Algorithms.

Text/Reference Books: 1. 2. Majid Sarrafzadeh, C. K. Wong, An Introduction To VLSI Physical Design Mcgraw-Hill College Sherwani, Naveed A., Algorithms for VLSI Physical Design Automation 3rd ed., 1999, 608 p., ISBN: 978-0-7923-8393-2

Electives:
EMBEDDED SYSTEM DESIGN (3-1-0)

Introduction to Embedded Systems: Growing importance of Embedded systems, Requirements, Models, State charts, General Language characterstics, synchronization and communication, SDL, Petrinets, UML, VHDL. Embedded Systems Hardware: Input Devices, Communication, processing of units, Memories, Output Devices. Embedded Operating Systems; Hardware/ Software codesign; Validation, Fault Simulation, Formal Verification.

Text/ Reference Books: 1. Embedded System Design by Peter Marwedel, Kluwer Academic Pub. 2. Embedded Systems by Raj Kamal, TMH 3. Embedded System Design by Frank Vahid, Tony Givargis,, John Wiley & Sons, Inc 4. Heath, Steve, " Embedded Systems Design ", Newnes 1997

5. An Embedded Software Primer by David E. Simon, Pearson Education 6. Designing Embedded Hardware by John Catsoulis, Oreilly 7. Real-time systems & software by Alan C. Shaw, John Wiley & sons, Inc. 8. Fundamental of Embedded software by Daniel W. Lewis, PHI 9. John B Peat man " Design with Microcontroller ", Pearson education Asia, 1998

SEMICONDUCTOR MATERIALS AND DEVICE CHARACTERIZATION (3-1-0)

Resistivity and four-point probe method; Carrier and doping concentration from C-V and Hall measurements; Specific contact resistivity and Schottky barrier height from I-V and C-V measurements; Series resistance of p-n junction diodes, solar cells and bipolar junction transistors; Channel length and threshold voltage of various FET structures; Majority and minority carrier mobilities; MOSFET mobility from Hall effect; Magnetic resistance and time of flight experiments; Oxide interface charge from C-V measurements; Deep-level concentration, cross-section and other parameters from various capacitance techniques and generation recombination techniques; Electrical, optical and pressure effects and measurement techniques for carrier life-time; Luminescence technologies for semiconductor characterization.

Text/ Reference Books: 1. Dieter K. Schroder , Semiconductor Material and Device Characterization John Wiley & Sons.

NANO TECHNOLOGY (3-1-0)

Introduction : Logistics, R. P. Feynmann, Theres plenty of room at the bottom and others, History, Definitions, Economics, Implications for Students, Nanotech Policies. NanoScale Imaging: Electron microscopy; Scanning tunneling microscopy; Atomic force microscopy Traditional Nanotechnology: Top Down Lithography, Interference Lithography, Ebeam Lithography, STR Needs & Next Generation Advanced Lithography Material Deposition/Growth Techniques (spin coating, drop coating, evaporation, supersaturation, condensation, CVD, PVD, MBE Crystal Growth, Knudsen Cell, Introduction to Nanomaterials, concept of glow discharge/ plasma) Unconventional Nanotechnology & Nanopatterning, Scanning Probe Lithography Nano-imprint, Soft Lithography using Elastomers printing, stamping, molding

Nanoparticle electronics, Synthesis of Nanowires; Nanowire Synthesis and Nanowire Application, Metallic and semiconducting nanotubes FET transistors and their demonstrated performance, potential applications of nanotubes in IC intereconnects, circuits, LEDs and field emission displays. Nanowires and single electron transistors, crossbar switches and applications to computing, Sensors, Field emission, Thermoelectric devices. Nanosystems manufacturing: Heterogeneous Integration and Self-Assembly

Text/ Reference Books: 1. M. Iwamoto, K. Kaneto, S. Mashiko, Nanotechnology and Nano-Interface Controlled Electronic Devices Publisher: Elsevier Science & Technology Books; ISBN-13: 9780444510914 2. Michael Kohler, Wolfgang Fritzsche, Nanotechnology: An Introduction to Nanostructuring Techniques Publisher: Wiley, John & Sons, ISBN-13: 9783527307500

HARDWARE-SOFTWARE CO-DESIGN (3-1-0)

Codesign Overview; Models and Methodology of Embedded System codesign; Hardware Software partitioning and Scheduling; Cosimulation, High level Synthesis (HW) and functional verification; Architecture Mapping, Hardware/Software Interfaces, re-configurable logic and devices; System on Chip (SoC) and IP cores; Hardware/Software codesign for application specific processor; Codesign tools and case studies

Text/ Reference Books: 1. J. Staunstrup and W. Wolf, editors, Hardware/Software Co-Design: Principles and Practice, Kluwer Academic Publishers, 1997.

MEMORY DESIGN AND TESTING (3-1-0)

Random Access Memory Technologies Static Random Access Memories (SRAMs): SRAM cell structure- MOS SRAM architecture MOS SRAM cell and peripheral circuit operation bipolar SRAM technologies silicon on insulator (SOI) technology advanced SRAM architectures and technologies, application specific SRAMs. Dynamic Random Access Memories (DRAMs): DRAM technology development CMOS CRAMs DRAMs cell theory and advanced cell structures- BiCMOS DRAMs-soft error failure in DRAMs Advanced DRAM designs and architecture application specific DRAMs.

Nonvolatile Memories: Masked Read only memories (ROMs): High density ROMs programmable read-only memories (PROMs)- bipolar PROMs CMOS PROMs erasable (UV)- Programmble read-only memories (EPROMs)- Floating Gate EPROM cell- one time progammable (OTP) Eproms Electrically Erasable PROMs (EEPROMs) EEPROM technology and architecture nonvolatile SRAM-Flash memories (EPROMs or EEPROM) Advanced flash memory architecture. Memory fault modeling, testing and memory design for Testability and fault tolerance, RAM fault modeling, electrical testing, Peusdo random testing megabit DRAM testing nonvolatile memory modeling and testing IDDQ fault modeling and testing application specific memory testing. Semiconductor memory reliability and radiation effects General Reliability issues RAM failure modes and mechanism nonvolatile memory reliability reliability modeling and failure rate prediction design for reliability reliability test structures reliability screening and qualification. Radiation effects single event phenomenon (SEP)- radiation hardening techniques radiation hardening process and design issues radiation hardened memory characteristics radiation hardness assurance and testing radiation dosimetry water level radiation testing and test structures. Advanced memory technologies and high-density memory packaging technologies Ferroelectric Random Access Memories (FRAMs) Gallium Arsenide (GaAs) FRAMs Analog memories magnetoresistive random access memories (MRAMs) Experimental memory devices. Memory hybrids and MCMs (2D) Memory stacks and MCMs (3D) Memory MCM testing and reliability issues- memory cards- high density memory packaging future directions.

Text/ Reference Books: 1. Ashok K.Sharma, Semiconductor Memories Technology, testing and reliability, Prentice hall of India Private Limited, New Delhi 1997.

ALGORITHMS FOR VLSI DESIGN AUTOMATION (3-1-0)


VLSI Physical Design Automation. Design and fabrication of VLSI chips. Basic data structures & algorithms. Partitioning. Placement and floorplanning. Global routing. Detailed routing. Specialized routing. Floorplanning, placement and routing for analog and mixed-signal designs. Two-level combinational logic optimization. Exact optimization algorithms. Heuristic optimization algorithms. Multi-level combinational logic optimization.. Timing issues. Sequential logic optimization. Cell-library binding. Current research problems in logic-level CAD.

Text/ Reference Books: 1. 2. 3. 4. N. Sherwani, ``Algorithms for VLSI Physical Design Automation'', Kluwer Academic Publishers, 1999. S. Sait, H. Youssef, ``VLSI Physical Design Automation. Theory and practice'', McGraw-Hill Book Company, 1995. M. Sarrafzadeh, C. K. Wong, ``An Introduction to VLSI Physical Design'', McGraw-Hill Book Company, 1996. G. De Micheli, ``Synthesis and Optimization of Digital Circuits'', McGraw-Hill Inc, 1994.

MEMS AND IC INTEGRATION (3-1-0)

Overview of CMOS process in IC fabrication, MEMS system-level design methodology, Equivalent Circuit representation of MEMS, signal-conditioning circuits, and sensor noise calculation. Pressure sensors with embedded electronics(Analog/Mixed signal): transducer,Gyroscope,RF MEMS switch with electronics,Bolo meter design. RF MEMS, and Optical MEMS Text/ Reference Books: 1. 2. 3. 4. Gregory T.A. Kovacs, Micromachined Transducers Sourecbook, The McGraw-Hill, Inc. 1998 Stephen D. Senturia, Microsystem Design, Kluar Publishers, 2001 Nadim Maluf, An Introduction to Microelectromechanical Systems Engineering, Artech House, 2000. M.H. Bao, Micro Mechanical Transducers, Volume 8, Handbook of Sensors and Actuators, Elsevier, 2000. Accelerometer with

MICROWAVE & OPTOELECTRONIC DEVICES (3-1-0)

Microwave frequencies, microwave transistor, microwave field effect transistor, tunnel diode, backward diode, and MIS tunnel diode, Transferred electron devices-Gunn Diode, Avalanche Transit Time Devices: IMPATT Diode, BARRITT Diode, DOVETT Diode, and TRAPATT Diode Microwave Integrated Circuit: Introduction, Circuit Forms, Transmission lines for MICs, Lumped Elements for MICs, Material for MICs: Substrate, Conductor, dielectric and resistive Materials, Fabrication techniques, Typical example of fabrication, Hybrid fabrication. Microwave tubes: Klystron, Reflex Klystron and Magnetron, Traveling wave tubes, microwave detection diodes, application of microwave Introduction of optoelectronic devices: Photovoltaic devices, Solar Radiation, PN Homojunction solar cells, Antireflection coatings, Ideal conversion efficiency, Spectral response, I-V Characteristics, Temperature and radiation effects, Heterojunction solar cells, Schottky barrier solar cell, Thin film and amorphous silicon solar cell, Solar arrays Display devices: Characterization of displays, drawbacks of cathode ray tube, Flat panel display: Electro luminescence displays (Powder and thin films), Plasma display, LCD, Electron-chromic display and electro-phoretic display

Text/ Reference Books: 1. Physics of Semiconductor Devices by S M Sze, Willy Eastern Pub. 2. Microwave Devices and Circuits by S. Y. Liao, PHI 3. Microwave Engineering and application by O.P. Gandhi, Maxwell Macmillan Pub.

4. Topic in applied physics Vol 40 by J.I. Pankove, Springer Verlag 5. Microelectronic Devices by E. S . Yang, MGH 6. Semiconductor Devices and Integrated Electronics by A. G. Milness, CBS Pub. 7. Optoelectronics : An introduction by J. Wilson & JFB Hawkers, PHI

DESIGN OF ANALOG/MIXED MODE VLSI CIRCUITS (3-1-0)

Introduction to CMOS analog circuits, MOS transistor DC and AC small signal parameters from large signal model, Common source amplifier with resistive load, diode load and current source load, Source follower, Common gate amplifier, Cascode amplifier, Folded Cascode, Frequency response of amplifiers, Current source/sink/mirror, Matching, Wilson current source and Regulated Cascode current source, Band gap reference, Differential amplifier, Gilbert cell, Op-Amp, Design of 2 stage Op-Amp, DC and AC response, Frequency compensation, slew rate, Offset effects, PSRR, Noise, Comparator, Sense Amplifier, Data Converter Fundamentals, Analog Versus Discrete Time signals, Converting analog signals to Digital signals, Sample and Hold Characteristics, Data Architectures, DAC and ADC specifications. Mixed Signal Layout Issues, DAC Architectures,R-2R Ladder Networks, Current steering, Pipeline DAC. ADC Architectures, Flash, The Two step Flash ADC, The Successive Approximation ADC, RF amplifier, Oscillator, PLL, Mixer.

Text/ Reference Books: 1. Phillip. E. Allen, Douglas R. Holberg, CMOS Analog circuit Design Oxford University Press, 2002 2. Razavi B., RF Microelectronics, Prentice Hall, 1998. 3. Baker, Li, Boyce, CMOS: Circuit Design, Layout and Simulation, Prentice Hall of India, 2000 4. Bosco Leung, VLSI for Wireless Communication, PH, 2002 5. Razavi B., Design of Analog CMOS Integrated Circuits, TMH, 2003 6. Mukherjee, VLSI System Design: Introduction to NMOS and CMOS VLSI System Design, Prentice-Hall, 1986 7. R. L. Geiger, P. E. Allen, and N. R. Strader, VLSI Design techniques for analog and digital circuits, McGraw-Hill, 1990 8. T. Lee, "The Design of CMOS Radio-Frequency Integrated Circuits", Cambridge University Press 1998. 9. Reinhold Ludwig, Pavel Bretchko, RF Circuit Design, Pearson Education, 2001

RF MICROELECTRONICS (3-1-0)
Microwave Transmission lines Strip lines, Micro-strip lines, Parallel Strip lines, Coplanar Strip lines. Microwave transistors, Hetero-junction Bipolar transistors (HBTs), Microwave filed effect transistors, MESFETs, HEMTs, MOSFETs. Charge coupled devices. Avalanche transit time devices, PIN diodes, Varactor diodes, Tunnel diodes, SB diodes. Transferred electron devices and their circuit applications. MICs and MMIC fabrication technology

Text/ Reference Books: 1. Behzad Razavi, RF Microelectronics Prentice Hall Communications Engineering and Emerging Technologies Series

MODERN OPTIMIZATION TECHNIQUES (3-1-0)

RECENT TRENDS IN VLSI DESIGN (3-1-0)

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