Mathematical following description function inside sequential digital data encoding based on Lempel-Ziv theory

Said Mchaalia Philosophy Eng. at home emailto: mchaalia@yahoo.com Professor Francois Boyer University Montreal, Canada emailto: boyerf@iro.umontreal.ca Raja Mchaalia Sciences University, Tunis, Tunisia emailto: ssfofo@yahoo.de Professor Edwin Naroska University Krefled, Germany emailto: edwin@ds.uni-dortmund.de Professor Feipei Lai CEI department, Taipei, Taiwan emailto: flai@cc.ee.ntu.edu.tw Professor Uwe Schwiegelsohn University Dortmund, Germany emailto: uwe.schwiegelsohn@udo.edu

Abstract: digital sequential data surrounding was started in 1971 with Intel first processors and Signetics Corporation SE555 and NE555, the most around significant frequent signal was the trigger input signal [1]. The secret sign significations of VHDL, VERILOG, SystemC, and others like digital design software are the ability to deliver direct link to the original main database of digital components, which are 74xx, 78xx, and so on, through synthesis toolboxes [19]. Keywords: VHDL, SystemC, digital design synthesis toolboxes, digital components. Introduction: Time is the most around thread-task in many dynamics environment mechanism manipulations. With Intel deep sub-micron and system on chip works, advances in digital design takes the way to reach the 1024 bit register core processor in the next few years starting from this year 2012. The secret sign in doubling register bit-wise sizes inside basic general purpose registers even though digital complex proceeding processing environment dynamism, are primordial sufficient suitable open-mind event activities during digital design mechanisms. Indeed, the basic language of complex digital proceeding processing environment dynamism is just language of frequency. Figure 001 depicts the main original idea of using this just language of frequency proceeding processing to master latch inside slave circuits. The how to of evolving frequency for master flip-flops is the main original primordial primary thread-task in Intel and other electronics consumer factories. Figure 0002 presents the original main proposal circuit for basic frequent character mastering inside core processor for Intel next generation consumer electronics. In fact, Lempel-Ziv [4] did invent sliding window ideas, which are made representations of characterizing motor flow either during speaking proceeding processing or digital data videos or text transmission proceeding processing. Hence, the shown circuit in figure 0002, the like 555 timer IC circuit, need till now to link pin 5 to pin 6 and to

introduced a basic inductor-capacitor oscillator filter, which takes its input from pin 7. The inductor-capacitor oscillator filter is shown in figure 0003, whereby the frequencies possible values are effect results of made choice on these elementary components. By this way, the values of inductor and capacitor are involving threadtask inside resolve basic logic influence system on frequency measurement proceeding processing analysis. For further usage of inductor-capacitor oscillator filter circuit developed in figure 0003, an a prior simulation task should deliver the exactly desired values.

Figure 0001: basics of clock cycle based simulation. Figure 0001 illustrates the basic mechanisms of clock cycle-based simulation inside any digital-analog analogdigital design proceeding processing environment dynamism.

The primordial stochastic problem in VHDL [16] and [19], was in Said Mchaalia draft thesis, the exact true definition and declaration of main clock, which generates the clock pulses inside any proposal circuit. To resolve basic logic influence systems on this complex thread-task, an original main design for using sequential character motor flow based on speaker and micro-phone as digital sensors to proceed and master the generation of clock pulses. The last data edge to achieve desirable measurable aim object and description destinations, is the civilization data edge. Therefore, based on just language of dictionary like Lempel-Ziv did define whose measurable values in their works on sequential data encoding and compression [4], civilization is so defined as social process whereby societies achieve an advanced stage of development and organization. Though, social process is a process involved in the formation of groups of persons. Thus, the digital famous form formalism formulation. Therefore, the principal primordial introduction viewpoint over discrete event simulation is involving during the proceeding processing of sequential data transmission through the speaker. To fill in the requirement of the exactly true right definition of discrete event simulation, counting processing of the number of years should be involved within any modeling and simulation inside discrete event simulation. In fact, the start of year is the birthday of the first month in every year. Hereby, event occurrence is the birthday of the first month. Hence, event activity is add(month's birthday, one day), which means processing increment of each month's birthday in order to finalize one complete month counting, so the second month and so on. Furthermore, event attribute is characteristics within each event. Herewith, the envisaged event is the counting of the number of years. Therefore, event attribute is an account identification of each month. This account identification is the most significant number of days within each month. For example December's account identification is thirty one days. Moreover, event state is collection of variable and signals, which describe the behavior inside a system. In fact, the start of month and its end are two primordial event states involved within each counting processing of the number of years. Although, the main original event states accomplished within this counting processing are the start and the end of year identifications. On the other hand, those event states define the boundaries of year's number counting processing, which is the envisaged system to model and simulate. Figure 0003 depicts an electrical circuit of the phenomena of light emission. Light could only emitted and transmitted using Light Emit Diodes and light bulbs or similarly. Therefore, the measurement quantities of lights and whose velocity is depending on those involving tools, such electrical energy-to-light converter toolboxes. This light filter could then be used to synchronize the clock of any digital design. Because, light has continuous effect results to be away followed by the slave circuits inside the proposal digital design. Figure 0004 illustrates pulse generating driven digital-analog design to compile-compute-conclude environment dynamism. Thus, the secret sign significant synchronized systems inside digital compile-compute-conclude thread-tasks are the cyclebased simulation and driven slave circuit dynamics mechanisms. In fact, the secret sign of discrete event simulation principles is the usage of interface model card for gathering databases visualizations as viewpoints and outward appearances on LCD displays or similarly. This model card could be used for many applications depending on the within involving sensors. On the other hand, figure 0005 illustrates the main original idea to synchronize the clock of the core processor to a laser production light system such this developed and shown within figure 0005. This paper is then depicted the environment dynamism of digital data aspect analysis and motor flows. Therefore, as shown in figure 0002, the driven slave circuits is proposed based on sequential character motor flows, which involve dictionary basics, whose principles were developed in the works of Lemepel-Ziv [4]. Even though, the lastly developed evolved proposal design is the synchronization of the core processor and all digital design component based on cycle simulation to the same light laser color clock cycle based generator. Hence, as shown in figure 0003 and figure 0004, light laser color could then be used inside proposal circuit in stead of transistor to control and command switching bitwise operations.

Figure 0002: Main original sufficient suitable synchronized light laser color for mastering clock cycle based simulation.

Figure 0002 illustrates digital design for a main original sufficient suitable synchronized sequential character motor flow for mastering driven based simulation.

Figure 0003: basic inductor-capacitor oscillator filter.

Figure 0004: Pulse generating driven digital-analog design to compile-compute-conclude environment dynamism.

Figure 0005: Proposal light based synchronizing clock cycle based simulation.

Mathematical following description function inside sequential digital data encoding theory: In 1948 Claude Shannon [11], was the first inventor of the mathematical information theory. In his works, Claude Shannon did prove that the correlated function to be exactly used within any digital-analog transmission proceeding processing was
n

([sin ]n [ y ]n log10 ( [ y ] ))
n

, where

y [0,1] is the probability of the

uncertainty of signal to be sent. In fact, using the normal C-language putpixel(.,.,.), function to illustrate the real waveform of such a digital signal processing depicted within:
n

([sin ]n [ y ]n log10 ( [ y ] ))
n

, is shown in figure 006.

[sin()].[y.log(1/y)] y uncertainty amount quantity inside [0,1]

0.1 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 0 5 10 15 20 25 30 35 40 45
time in nano seconds

magnitude [sin()].[y.log(1/y)]

Figure 0006: waveform of digital signal processing involving inside

([sin ]n [ y ]n log10 ( [ y ] ))
n

Figure 0006 depicts the waveform of digital signal processing involving inside

([sin ]n [ y ]n log 10 ( [ y ] ))
n

Therefore, in digital-analog transmission-reception-absorption environment mechanism [1], [2], [3],[4], the kernel proceeding processing of data transmission is the mathematical correlation functionalism. Indeed, normal representation of electrical current data edge motor flow is the sinusoidal function, which could be depicted in figure 0007.

([sin ]n )

[sin(z)]. z() frequency following functionalism inside [origin, time event]

1.5 1
magnitude [sin()].

0.5 0 0 -0.5 -1 -1.5

time in nano seconds

10

15

20

25

30

35

40

45

Figure 0007: waveform of digital signal processing involving within

([sin ]n )
n

Figure 0007 illustrates the waveform of digital signal processing involving within transmission of each signal element from this selfish digital signal processing set correlated, based the digital signal processing courses, with Claude Shannon

([sin ]n ) , whereby the ([sin ]n ) , should be

[ y ]n is the probability to be in doubt or uncertainty of reception-absorption environment mechanism dynamism. Thus, figure 0006 represents the waveform of correlation proceeding processing.
In fact, Claude Shannon entropy Mchaalia

1 [ y ]n log 10 ( ) , where [ y ]n

([sin 2 ]n log2 ( [sin 2 ] ))

n n

([ y]n log10( [ y ]

)) , could be exchanged or replaced with Said

or the following description function of magnetism background

MRI(magnetic resonance imaging) co [8].

[sin( x)]n [x ] n log 2 ( )) throughout the works of Becker [7] and [x ] n [sin( x)] n

On the other, although, Said Mchaalia works proposal in the attachment thesis [16] was an inspiration item from the Gaussian [5] format digital data correlation encoding that is used in cellular phones and other digital data transmission. Though, the actually alive active works of Said Mchaalia was since August 2012 to transform Shannon's mathematical information theory based into just language of frequency. Hence, the works of Said Mchaalia is involving in just language of frequency, even though this mathematical following description 2 function is then: ([sin ]n ) in digital signal processing environment mechanism dynamics.
n

Therefore, the transmission-reception-absorption dynamics environment mechanism is the following description

functionalism:

([sin ]n [sin 2]n)

, which is a famous fatal following frequency flows at instantaneous time

event values. The waform of such a famous fatal folowing frequency flows are depicted within figure 0008.
[sin(z)].[sin(z)].[sin(z)]. z() frequency following functionalism inside [origin, time event]

1.5
magnitude [sin()]..[sin(z)].[sin(z)]

1 0.5 0 0 -0.5 -1 -1.5

time in nano seconds

10

15

20

25

30

35

40

45

Figure 0008: waveform of digital signal processing involving within

([sin ]n [sin 2]n)

.

Figure 0008 illustrates waveform of digital signal processing involving within

([sin ]n [sin 2]n)

However, the last evolved digital data encoding based on Claude Shannon information theory transformation is the

([sin ( x )]n

[sin (x )]n ) [ x ]n

, which is shown in figure 0009.

To determine, the values of those data edge representations

[sin (x )]n ) or [ x ]n n [sin( x)] [x ] n 1 ([sin ]n [sin 2]n) or n ( [x ]n n log2 ( [sin( x)]n )) or ([sin ]n [ y ]n log10 ( [ y ] )) or n n n 1 2 ([sin ]n log 2 ( [sin 2 ] )) , the resolution of Maxwell-Ampere equation is interest away any instantaneous n n

([sin ( x )]n

time event.. Therefore, resolve such an equation: Surface B(t ).ds= function(Volume i(t ).dv ) , where dv and ds are measurement quantities for both surface and volume. Furthermore, the magnetic field B(f,t) and the electric current i( f,t) are two dimension measurement coordination viewpoints during discrete simulation time intervals. Similarly in fact, the number of months inside a year is always twelve months. This number of twelve months is data edge representation inside measurement account of year enumerations. Indeed, the main synchronization secret of data edge representation is value change dump during following motor flows through measurement calculation nodes, whereby discrete event simulation time have to be onwards and forwards proceeded steps with test-bench characteristics. These test-benches faithful for digital data transmission modeling and simulation.

[sin(z)].[1/(z)].[sin(z)]. z() frequency following functionalism inside [origin, time event]

0.8
magnitude [sin()]..[1/(z)].[sin(z)]

0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 5 10 15 20 25 30 35 40 45

time in nano seconds

Figure 0009: waveform of digital signal processing involving within

([sin ( x )]n

[sin (x )]n ) [ x ]n

Therefore, based on the illustration illusions shown in figure 0007, figure 0008 and figure 0009, the compilecompute-conclude aspect analysis predict that figure 0007 and figure 0009 illustrate the digital data binary value of binary 101b formulated throughout two distinct frequencies; 1 GHz and 0.16 GHz. As conlusion effect aspects, the magnitude variation levels of frequencies could be allow sequential digital data encoding. The binary nil value is so defined for null variation level of frequency magnitude. Lempel-Ziv based sliding window sequential digital data encoding: The electronic design of the main original circuit to achieve the waveform generation and then after the waveform compression based on just language of reading value change dump file, which is achieved throughout the above mathematical following description function is shown in figure 0002. This compression sliding window just language is using dictionary compression based just language such as Lempel-Ziv [4] and co. Thus, the stored values inside VCD file, shown in figure 0009 and figure 0007, could be transformed into characters and could then be compressed using the following hash table: C++-Language:: typedef map <char, vector<int>> CompressMap; During hardware-software co-verification design, the VCD file will be generated in address programming and stored values in hexformats and then the compression of this VCD file could use the C++-Language:: typedef map <char, vector<int>> CompressMap; to store each character inside this current VCD file inside the considred hash table; CompressMap HashTable; then store the associted HashTable into a file. In fact, Figure 0010 reviews an abstract of the involving simulation hardware-software co-design, whereby the

main sufficient suitable environment dynamism is based on frequencies capturing. Therefore, C++-Language:: typedef map <char, vector<int>> CompressMap; could be in software design implemented as follows:

/*>> fstream ( const char * filename, ios_base::openmode mode = ios_base::in | ios_base::out);

app:: (append) set the stream's position indicator to the end of the stream before each output. ate:: (at end) set the stream's position indicator to the end of the stream on opening. binary::(binary) consider stream as binary rather than text. in::(input) Allow input operations on the stream. out::(output) Allow output operations on the stream. trunc::(truncate) <<*/ int CompressMap () { char ch; streambuf * pbuf; fstream fstr ("const char* filename", fstream::binary | fstream::in | fstream::out); pbuf = fstr.rdbuf(); int cpos = 0; vector< int > vect; while (pbuf->sgetc() != EOF) { ch = pbuf->sbumpc(); CompressMap mymap; CompressMap::iterator it =mymap.find(ch); if (it != NULL){ (it->second).push_back(cpos++); } else{ vect.push_back(cpos++); mymap.insert(pair<char, vector<int>>(ch, vect)); } istr.close(); } return 0; }

Table 0000: Software enhancement to achieve Lempel-Ziv sequential digital data encoding inside hash table map

The C++-Language:: typedef map <char, vector<int>> CompressMap; is a character sliding window data file compression technique, that was inspired from the intentinal works of Lemel-Ziv.

Figure 0010: Main original electronic circuit of receiving just frequencies to control and generate waveforms.

Figure 0010 illustrates the main original electronic circuit of receiving just language of frequencies in order to control slaves ciruits shown in figure 0004. Hence, generating waveforms for digital data compression and the application of sequential digital data based dictionary compression techniques [4], is thread-task of hardwaresoftware co-designers and co-verifers. Inside frequency environment dynamism basic binary digital data encoding: As shown previous section, the inside frequency environment dynamism consist to count just in two dimension coordinations, which are {(up-stairs, down-stair)}index. Therefore, the binary digital data encoding is the {(000b, 001b, 010b, 011b, 100b, 110b, 111b)}. In fact, in his thesis draft works [16], Said Mchaalia, did define the middle most around summit to be:

1 S n , where Slentgh is the length of a half period of envisaged 2 length

waveform. Thus, for the sinusoidal waveform the summit or logic true right one is encoded as binary 011b. To extend this digital data encoding to hexadecimal format, the incoming binary code is then binary 0011b, which is equal to hex 0x3 in hexadecimal representation. Indeed, for surround movable digital data encoding based on the developed evolved ideas, an introduced binary nil should be present to allow a continuous binary encoding coding counting. Therefore the following motor flow of developed evolved algorithm is: {(000b, 001b, 010b, 011b, 100b, 110b, 111b), (0111b, 0100b, 0100b, 0011b, 0010b, 0001b, 0000b), (00000b, 00001b, 00010b, 00011b, 00100b, 00110b, 00111b), (000111b, 000100b, 000100b, 000011b, 000010b, 000001b, 000000b), (0000000b, 0000001b, 0000010b, 0000011b, 0000100b, 0000110b, 0000111b)} ..... and so on, whereby the sin2(function(frequency, time)) could then deeply predict the modulation and then the correlation platform for digital data encoding. Therefore as compile-compute-conclude aspect effect:

sin 2 ( function( frequency , time)) , frequency , time

is sufficient suitable following description function for modulation of digital data and then original main correlation for binary digital data encoding. Control data flow graph of digital data encoding environment dynamism: In fact, to encode the envisaged digital data, involving incoming signal lists have to be fill in within any modeling-simulation proceeding processing of digital-analog and analog-digital transmission-receptionabsorption dynamics environment mechanisms. Therefore, digital proceeding processing depicts binary digital data transfers between nodes inside a control data flow graph. Hence, start interruption process node within figure 0011 has role to interrupt most around circuit to start collect data to be measured within any simulation time. End interruption process node plays a similar rule as cutoff link switcher. Furthermore, the other nodes are arithmetic-logic operation nodes. The following motor flows of data edges is that the following values are binary made representation, whose last values are instantaneously stored inside grounded to gathering information database node. Figure 0011 depicts an original primordial made representation of control data flow graph, whereby a( . )sin2 ( . ) function could be then used to identify binary motor of digital data selfish set inside environment developments based on step scaling. Therefore, each digital data selfish set could be thereby used for one step scaling. Hence, the involving waveform generation has the outward appearance, which could be shown using

figure 0012, whereby the magnitude variation level proceeding processing determine following frequency flows.

Figure 0011: an example of original primordial representation of control data flow graph whereby a( . ) sin2 ( . ) is used as data edge following flow measurement value.

Figure 0012: original main sufficient suitable dynamics mechanism to gather digital data from core processing unit inside environment dynamism.

Figure 0012, illustrates the original main sufficient suitable dynamics mechanism to gather digital data from core processing unit inside environment dynamism. In fact, as shown in figure 1, the data edge current following flow could be divided to measurable voltages throughout any parallel association of distinct resistor-capacitor filter values, which allow mixtures of frequency determination through the famous low pass filter formula such that f index i =[ 1 ]
RC
index i

For ASCII encoding similarity, the measurable number of the envisaged couples (resistorcapacitor) is then equal to eight low pass (resistor-capacitor) filters, whose frequencies could be measurable throughout the measurement of resistor values and capacitor values. Therefore, the eight-bit-word encoding techniques. Hence, consider that the first index filter has the following measurable values, which could be 75 Ohm resistor's value and 23 micro Farad capacitor's value, and the last index filter has he following measurable values, which could be 100 mega Ohm resistor's value and 1.2 micro Farad capacitor's value. By this way, the two involving frequencies are respectively; 57.971 MHz and 0.00001 Hz.
Figure 0012 depicts the data edge current following flow, which could be faded to measurable voltages

throughout any parallel association of distinct resistor-capacitor filter values. Furthermore, the multiplexer usage allows to get out the first measurable current amount quantity. Although, the next tradeoff of measurable current amount quantity could be direct measured from current source generator, which would be CMOS or bipolar transistor-transistor language. Indeed, the within core processing unit entity is the mnemonic, mimetic and compile-compute-conclude proceeding processing analysis, which involves test verification motor flow of any gathering measurement values and then to choose the data edge current flow requirements. Hence, the within core processing unit entity has input-output interfaces such that huge hard disk to store data and co-core proceeding processing motor flows, which treats any gathered digital data and resolve whose basic logic influence systems. Those co-core proceeding processing motor flows could be implemented in C++-language algorithms for any micro-controllers or any EPROMS (electrical programmable read only memory). The digital data encoding and compression techniques will be in details presented in the next sections, whereby the basic logic influence system of ASCII digital data encoding techniques is the primordial main following digital data encoding and compression algorithms to be aware of further processing analysis aspects such that production time amelioration within electrical machines, image quality improvement for digital TVs, ASTRA mobile pictures, radar models. In electrical branch field disciplines, the sinusoidal function model is always used to simulate inputoutput signals within considered circuits. Then, the signal correlations or mathematical signal multiplexers are basic tools for image illustrations like those treated in MRI scientific fields [6] and [7]. Magnetic Resonance Imaging description is based on the cutoff frequency included within Fourier transformation and just using-language of t=nT , n to depict received image from IMB-AT compatible PCI interface cards and similarly input-output interface component. Thus, detailed description of correlation and involving mathematical following description functions will be reviewed in the next paragraphs. In fact, within electrical data edge flows, the main characteristic of produced waveform is the periodic aspect during proposal test-bench and simulation proceeding processing. The mathematical sinusoidal description function, has the characteristics, such that it attains its maximum magnitude value in the middle array of simulation time. At the boundaries within measurement arrays of simulation time, which are 2pi = 6.28 period periodic measurement arrays, the values of the mathematical sinusoidal

description functions are nulls.

Indeed, the magnitude-value variations are basic tools for signal encoding. Arithmetic encoding is primordial main original thread-task within digital data transmission. Arithmetic encoding is based on the encoding of the magnitude-value in integer form, whereby the inferior boundary integer within a float magnitude-value variation would be used in such an arithmetic encoding [8] and [9]. The maximum voltage or current magnitude-value variations inside electrical circuits depend on the technical applications. For digital data transmission, such that send-receive alphabets and like thread-tasks, the middle average voltage is 10 Volts [9]. The basic logic of the arithmetic encoding of this maximum 10 volts voltage level magnitude-value is to convert 22 integer value to binary, because the positive and negative measurement processing analysis and error measurement calculations involving within modeling-simulation. The envisaged arithmetic encoding in computer language is to associate the binary 00000b to -22 volts measurement magnitude-value, then the binary 00001b to -21 volts measurement magnitude-value, after 00010b to -20 volts measurement magnitude-value till the binary 10110b for +22 volts measurement magnitude-value. The true-false logic involved within any one-volt magnitude-value variation inside the envisage arithmetic encoding, is illustrated using figure 0007 and figure 0009 described above, whereby logic true is the magnitude-value associated with the highest value level and the logic false is the lowest value level of magnitude measurement.

Discrete event background and structures: In digital inline verification of hardware design of consumer electronics, modeling-simulation processing analysis of digital data transmission and similarly, the motor kernel flow of discrete event simulation is the following famous flow structure; if clock's event occurs and clock's event value is equal to logic true or false, then while some synchronized constraint boundary conditions {do somethings, which are resolving of basic logic influence systems}.

Discrete event background in VHDL

Discrete event background in C-language

process (sensitive list clk) { if (clk'event and clk == 1) do { resolve basic logic influences systems; } while (constraint boundary conditions); end if; } end process;

//light black color assignment event attribute value.

unsigned char clk ='\0';

// logic basics assignment event activity value.

bool clckEvent = false; . if (clkEvent and clk == '1') { while {(constraint boundary conditions) resolve basic logic influences systems; } }

Table 0001: discrete event background structures in signal assignment (VHDL) language and C-language.

Table 0001 illustrates the difference of discrete event background structures in two different programming languages such C++-language and VHDL-language. As it was lastly in 2008 defined, VHDL-language is concerning signal assignment's measurement calculations. Although, C-language is programmable control data flow graphs involving operating systems like Linux and command line controls like SusiCompress.exe inputfilename outputfilename from cmd command line. Thus, the invisible secret structures of discrete event simulation descriptions are: - Think of an occurrence in order to have whose effect and whose judgment: to consider or to anticipate both worried and hopeful whose side happenings. - Think out or through event activity is to think about hereby until whose conclusion is reached. Therefore, understand and resolve event activities, means resolve basic logic influence systems on event occurrences. - Think up an arrangement of system environment to reach whose invention or devising; means make decision to change the event states inside this system environment.

In fact, discrete event dynamism engenders event occurrence, event activity, event attribute, event state and event environment. Discrete event aspects are the instantaneous outward appearances, which should be associated with it dynamism. Hence, this dynamism is unknown effect analysis; fuzzy or similar analysis start from true right sources engendering gathering database information over event occurrences. Hence, analysis of inside instruction introduction of event occurrence processing and its real viewpoint illustration.

- event occurrence: what does it happen instantaneously right now? - event activity: what is it going on currently live? - event attribute: which property is characterizing this event occurrence? - event state: why is it so depicted? - event environment: how much time does event occurrence need to be faded? In details of modeling and simulation, a list of couples (timeevent, valueevent) would be involved within this simulation processing analysis. Therefore, Table 2 illustrates an example of discrete event simulation list. The main task in this modeling simulation processing analysis is to identify event values for each time value, whereby mathematical ratios are equations of xi to yj, which depict the fraction between xi and yj;
xi yj

. Thus, These mathematical ratios are often

involving for error processing analysis. As example the entropy calculation introduced by Shannon in 1948 [3], with his mathematical theory of information. This entropy measures the incertitude amount within each set of signals to be sent. Probabilities occur often in measurement processing analysis. Thus, probabilities are ratio values less or equal to one. To associate with measurement processing analysis probabilities, which are determined as ratios of values at time t to maximum value for all time. Therefore, consider a set of measurements {(t1,V1), (t2,V2), (t3,V3), ..,(tn, Vn)}. The maximum value of all time is (tj, Vmax). The probability determination is defined as follows; {(t1,
V1 V max

), (t2,

V2 V max

), (t3,

V3 V max

), ..,(tn,

Vn V max

)}. Those probabilities would be involving

within each measurement processing analysis of amounts and quantities, which are gains in magnitudes or gains in amounts, legacies, error corrections and other kinds of measurement processing analysis.
Hence, first mathematical equation involves within the measurement processing is the sous-traction or subtraction; sub(a, b) which means the rest to be counted ab . The next mathematical equation is the addition operation; add(a, b) which means the number to counted is a +b . The most around difficult mathematical equation is power calculation. Final mathematical equation involves within measurement processing is the fraction operation or ratio calculations. Thereby, power calculation is based on quantity integration during time simulation and ratio calculation is based on quantity derivation during time simulation. As example, considering RC-circuit, which presents a measurement unit in filtering branch field. This unit is the gain on magnitude in decibels. In digital-analog waveform generation like [14] or 11 GHz radar images processing, the optimal value of the capacitor is 1.2 micro Farads and by this way a calculation of possible measurable resistor is about 0.4 micro Ohm

Figure 0013: resistor-capacitor filter response circuit.

Figure 0013, presents resistor-capacitor filter response circuit. This circuit has as input edge the current flows, which could be measured either using coulomb or Ampere, then two principally elementary components that capacitor C measured in Farads, and resistor R measured in Ohm. Figure 0013 and figure 0014 depict the realization of frequency variation inside a circuit to filter the signal output. The inductor L receive signal input edge characterizes current flows in Amperes. These current flows sustain or incur some basic logic influences. These current flows incur phase shifting and magnitude modification. Then they maintain their following flows within the circuit. Some of them will traverse the resistor and others will contribute for capacitor charge. The output node is resistor-capacitor filter characterizing the 3dB lossy magnitude for cutoff frequency. In fact, to measure this cutoff frequency within the 3dB lossy magnitude, the following mathematical functional operation The output voltage waveform is illustrated by by:
GaindB=20.Log10 (
1e
a.RC.t

. Although, the input voltage waveform is depicted

Gain dB=20.Log10 (

V out ) should be onward proceeded. V

sin (2.p.f.t ) . 3dB lossy magnitude from the maximum gain,

time interval measurement dt, which is characterizing cutoff frequency;

1 in Hz. dt

V out ) , allow then short V

In fact, frequency oscillation realizations is the aim object of digital data transmission branch fields. The simple way to achieve this is the usage of circuit included in Figure 0013 and figure 0014. Incurring onwards send-receive those frequency is the subject aim of digital data transmission such this involved within digital satellites processing analysis. The main original theme of this incurring onwards is the data encoding decoding processing analysis. Hence, Shannon did propose an idea of data encoding based on the bitword-length calculations thus the minimum amount of bits to be used to encode a character a for example found in an alphabet set of N characters. This number is thus calculated 2 x = N +1 . To search x, just introduce the logarithm function as follows: 2 x= N +1 log 2( 2x )=log 2 ( N +1) . Therefore, this x number could be determine as follows;
x=log2 ( N +1 ) . Indeed, the logarithm conversion between bases is:

log a ( y)=

ln ( y) . Thus, ln (a )

x=log2 ( N +1 )=

ln ( N +1) , where ln(.) is the natural logarithm function. As example, where the ASCII code ln( 2)

(255 characters) were encoded, the amount of bits was eight bits. To encode one character from the 255 character alphabet set, a sequence of eight bits is required for example 10011010b. To send this character, the above techniques such the charging and discharging of the capacitor of figure 11 eight times or more would be involved. In fact, the 1b represents the highest magnitude amount, however the 0b represents the nil environment of the magnitude amount. An other methodology is to convert such a binary sequence to integer value and to use

the potentiometer command and controlling for digital-analog converting. Figure 0013 and figure 0014 represents such a processing analysis. For further gathering discovering database's information abut energy sources, see below for charging chemical battery equations details.

Figure 0014: inductor-capacitor-resistor circuit for frequency variation realization

Conclusion overview viewpoints: In fact, digital design is main primordial entity to achieve several surround systems. Thereby, in modeling and simulation investigation branches, an entity is an object of interest in system proceeding processing analysis. Although, each entity has its own property inside alive active surround system. This property is called entity attribute. The entity property surrounds entirely entity activity and entity events. Hence, the entity event is the instantaneous value change dump of the state of current entity (ready to be executed, inside queue, fetched, ran, stored again). Furthermore instead of investigating entity activity inside alive active surround system, which is hard to be identify, resolving basic logic influence system on these tasks and threads allow the investigation of system states throughout entity activities. Hence, digital design requirement envelops digital data transmission, whereby digital data transmission is based on discrete event simulation, which was started with telegram data transmission threads. Hence, advanced digital data encoding is far away to invent op-codes able to clean up old electronics background [15] and [16]. Therefore there are many illustration illusions inside some algorithms of digital data encoding [10]. The new invention of be selfish auto-compile-compute-conclude environment dynamism, allow fast modeling of digital data transmission based on involving electronics circuit and the theory of digital data transmission such the transmission of digital video broadcasts. In fact, ASTRA did invest many years to be awake away for being aware background of digital-analog discrete event simulation techniques and disciplines. Indeed, the illusion illustration during usage of new digital data encoding techniques based on binary representation and the mathematical modeling of digital data transmission [11], [15] and [16], is shown in figure 0015. Hence, as shown in figure 0015, the original main sufficient suitable motor flow design of digital data transmission-reception-absorption dynamics environment mechanisms involves inside the principles of evolving and development of digital primordial primary elementary components, which are defined to be power production sources, power delivering to destinations dynamics mechanisms, power consuming gathering discovering information databases. On the other hand, philosophy proceeding processing analysis aspects could then appear with any digital design

environment dynamism in order to resolve basic logic influence system on such an involving thread-task.

Figure 0015: basic logic influence systems into digital data encoding methodologies

Figure 0015 depicts the basic logic influence system on digital data encoding methodologies, whereby digital-analog conversion and modeling-simulation should be token places inside any mathematical aspects of digital data encoding and compression [3], [4], [7], [10],[18] and [19]. References: [1] www.en.wikipedia.org/wiki/555_timer_IC [2] Bodanis, David (2005), Electric Universe, New York: Three Rivers Press, ISBN-978-0-307-33598-2. [3] SI base units, SI brochure (8th ed.), BIPM, http://www.bipm.org/en/si/si_brochure/chapter2/2-1/, retrieved 2012, August 12th. [4] J. Ziv and A. Lempel, A Universal algorithm for sequential data compression, IEEE transaction on information theory, vol. IT-23, No-03, 1997 May. [5] Mathematical cousres for engineers. [6] Basic magnetic flux courses. [7] Worgang Becker and al., Magetic Localization of EEG Electrodes for Simultaneous EEG and MEG measurement, IEEE confirence on medicine biology, Lyon 1992, pp 34-36.

[8] Diekmann and al., Comparison of MEG, EEG and frequency MRI responses to identical electrical stimuli delivered peripheral nerve.[ [9] Said Mchaalia, Bond graph modeling-simulation techniques for battery chargin system with 400 Amperes average current data edge flows (using 32 bits PCI interface card PCI IBM-AT compatible interface cards), ASC, at National tunisian engineering university, 1997, Tunisia, Headreference: Prof. Ksouri. [10] Said Mchaalia, Measurements with 11GHz noise radar (using PCI interface card like meilhaus300 for PCI IBM-AT compatible interface cards), Microwave department, at Ilmenau technical university, 1998, Germany, Headreference: Professor Heinrich Loele. [11] Claude Shannon, mathematical theory of data transmission,1948. [12] Said Mchaalia, Raja Mchaalia, Digital waveform generation principles involving data encoding and compression techniques, www.bushcenter.com and co, August 20th 2012. [13] MCHAALIA S., EL KAMEL A., KSOURI M., BORNE P. Neuromimetic approach of multimodel representation, , CESA'98, Conf. IMACS-IEEE on Computational Engineering in Systems Applications, Hammamet (Tunisia), Vol.1, pp500-504, April 1998. [14] MCHAALIA S., EL KAMEL A., KSOURI M., BORNE P., Robustness analysis of neuromimetic approach in multimodel representation, ICSSE'98 International Conference on Systems Science and Systems Engineering, Proc, Peking (Chine), pp180-184, August 1998. [15] www.science.nasa.gov visited August 21st 2012. [16] Said Mchaalia, Waveform compression (draft), Computer Engeering Institut, Dortmund university, Germany, December 11th 2002. [17] Said Mchaalia, Raja Mchaalia, Digital waveform representation based on light color kind's selfish set , www.bushcenter.com and co, August 22th 2012. [18] Edwin Naroska , Shanq-jang Ruan , Chia-lin Ho , Said Mchaalia , Feipei Lai , Uwe Schwiegelshohn, A Novel Approach for Digital Waveform Compression, in: Proceedings of Asia and South Pacific Design Automation Conference, pages 712715, January 2003, Japan. [19] El Mostapha Aboulhamid, Francois Boyer, VHDL Design FLOW behavioral and logic synthesis, EMA 1997, Montreal, Canada.