ELEC 401 Electronics II, Fall 2012

Course Text Meeting Place Web Page ELEC 401 Electronics II Microelectronic Circuits 6th Ed. by Sedra & Smith Grimsley Hall Rm. 328 MWF 10:00-10:50 (Day) MW 5:15-6:30 (Evening) http://ece.citadel.edu/mckinney/elec401/ Instructor Email Office Office Hours Prof. Mark McKinney mckinneym@citadel.edu Grimsley Hall Rm. 325 953-4897 MW: 3:00 4:30

Syllabus

COURSE OBJECTIVES
To understand the following topics: o Integrated Circuit Biasing and Active Loads o Differential and Multi-stage Amplifiers o Frequency Response o Output Stages and Power Amplifiers o Active Filters and Waveshaping Circuits To design electronic circuits from a set of desired characteristics To be able to use a computer simulation package to analyze electronic circuits

HOMEWORK
Homework assignments will be given weekly and simulation projects will be assigned periodically throughout the semester. Both will be due one week from the date assigned. One problem from each assignment will be selected at random (honest!) to be turned in. Homework is to be done on the front side only of engineering paper in a neat and easy to understand format. The submitted homework should stand on its own so that it is not necessary to consult the actual published problem to understand the solution. Any submissions not adhering to these guidelines will receive a grade of zero. Each problem will be graded for completeness, neatness and correctness on a 10 point scale per the following guidelines: Problem statement: 2 points Organization and neatness of solution: 2 points Solution procedure: 4 points Correct Solution: 2 points Any problems with multiple parts will receive a maximum score proportional to the percentage of the parts worked. (e.g. A two part problem with only one part completed will have a maximum score of 5.)

TESTS
Throughout the semester, there will be two tests and one final exam. Make-up exams will be given only in the case of an emergency or if prior arrangements have been made. In the case of an emergency, a reasonable attempt must be made as soon as is possible to arrange a suitable time for a make-up exam. The final exam will be cumulative and will be designed as a two-hour test. According to Citadel policy, any exceptions to the time and place of the final exam must be cleared through the dean of undergraduate studies.

GRADING
Gading Element Class Participation Grade Homeworks Highest Exam Lowest Exam Final Exam Relative Weight 10% 20% 25% 15% 30%

PRE-REQUISITES
It is assumed that each student has passed ELEC306 and ELEC 313, is proficient with PSpice and has access to a computer with PSpice

COURSE POLICIES
Attendance - According to The Citadel's absence policy, any student missing more than 20% of the scheduled classes (even if excused) will receive a failing grade regardless of class performance. Late assignments - Late assignments will not be accepted even for approved absences; if a conflict arises on a date an assignment is due, make arrangements to submit the assignment before the due date. There will be buffers built into the grading scheme to provide for at least one missed assignment. Special needs - If you need accommodations because of a disability, please see me privately after class or in my office within two weeks of the beginning of class or immediately after diagnosis. Requests for academic accommodations must be made through Academic Support. Academic Support can be reached at 953-1820. Cheating and Collaborative Work - According to The Citadel's policies for the preparation of work performed outside the classroom: All papers, reports, senior essays, theses, or other written work performed outside the classroom for which a grade is received will be the individual's work and is subject to the limitations imposed by the definition of plagiarism. According to Webster's New International Dictionary, 3 rd Edition: to plagiarize is defined as "to steal and pass off as one's own the ideas or words of another" or to "present as new and original an idea or product derived from an existing source." Specific ELEC 401 Guidelines In this course, all simulation projects must be your own work, but collaborative work on homework is permitted with no grade penalty. In the event of joint efforts, every student must submit the problem in their own handwriting and each person cited must have made a significant contribution to the problem.

SCHEDULE
WEEK
Aug. 20 Aug. 27 Sep. 3 Sep. 10 Sep. 17 Sep. 24 Oct. 1 Oct. 8 Oct. 15 Oct. 22 Oct. 29 Nov. 5 Nov. 12 Nov. 19 Nov. 26 Dec. 3

TOPICS Introduction / Review Review Gain Cells / Cascode Amplifiers Current Mirrors and Current Sources Differential Pairs Multistage Amplifiers Frequency Response of Amplifiers Output Stages and Power Amplifiers Fall Break Signal Generators and Waveshaping Circuits

SECTION Ch 4-6 Ch 4-6 7.2-7.3 7.4-7.5 8.1-8.5 8.6 Ch 9 Ch 11 Ch 17