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ACKNOWLEDGEMENT

First and foremost, I thank God Almighty for making this virtue success. I express my sincere thanks to Prof. Dr. C.K.Anandan; Head of the department, for permitting me to present this seminar.

I would like to convey a deep sense of gratitude to the seminar coordinator and my guide Dr.James Kurian for his timely advice.

I am also thankful to all my teachers, my friends and my seniors for sparing their time for help and encourage me to do my seminar.

VIJESH K.R

3rd SMEMESTER ELECTRONICS DOE CUSAT

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ABSTRACT
Typically electronics has been defined in terms of three fundamental elements such as resistors, capacitors and inductors. These three elements are used to define the four fundamental circuit variables which are electric current, voltage, charge and magnetic flux. Resistors are used to relate current to voltage, capacitors to relate voltage to charge, and inductors to relate current to magnetic flux, but there was no element which could relate charge to magnetic flux. To overcome this missing link, scientists came up with a new element called Memristor. These Memristor has the properties of both a memory element and a resistor (hence wisely named as Memristor). Memristor is being called as the fourth fundamental component, hence increasing the importance of its innovation. Its innovators say memrisrors are so significant that it would be mandatory to re-write the existing electronics engineering textbooks.

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CONTENTS
1.INTRODUCTION .4 2.TIMELINE OF MEMRISTIVE SYSTEM DEVELOPMENTS5 3.MRISTOR THEORY ...9 3.1Analogy: 10 3.2 What is memristence? 11 3.3Analogy of a Memristor 11 3.4Properties of a Memristor 11 3.5Current-voltage of a memrister 12 3.6 The Memristor from HP Labs 13 3.ARCHITECTURE ..15 3.1Fabrication and Device Structure 15 3.2 Device Model 15 3.4Working 17 3.5How memristor memorizes? 19 4.RESULTS AND SIMULATIONS 22 4.1 SPICE Model 22 4.2 Simulation Results Using SPICE model 23 4.2.2 Simulation Results Using MATLAB 27 5. TYPES OF MEMRISTOR 30 5.1 Two-state Charge-controlled Memristor 30 3

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1.INTRODUCTION
Its time to stop shrinking. Moores Law, the semiconductor industrys obsession with the shrinking of transistors and their commensurate steady doubling on a chip about every two years, has been the source of a 50-year technical and economic revolution. Whether this scaling paradigm lasts for five more years or 15, it will eventually come to an end. The emphasis in the electronics design will have to shift to devices that are not just in- creasingly infinitesimal but increasingly capable. Nanoelectronics and nanoscale devices are now proving to be the future prospects for high-end computing. Controlling the device behaviour in nanometric scale is opening a world of large possibilities that may lead to the development of highly advanced systems. Combined with transistors in a hybrid chip, memristors could radically improve the performance of digits without shrinking transistors. Using transistors more efficiently could in turn give another decade,at least,of Moores law performance improvement, without requiring costly and increasingly difficult doublings of transistor density on chips. In the end, memristors might even become the corner stone of new analog circuits that compute using an architecture much like that of brain. Nanoscale metal-oxide-metal switches have the potential to transform the market for nonvolatile memory and could lead to novel forms of computing. Such nanoscale oxide devices can exhibit memristive behaviour which can be used to build ultra dense memories. However, progress has been delayed by difficulties in understanding and controlling the coupled electronic and ionic phenomena that dominate the behaviour of nanoscale oxide devices. Recent- ly platinum titanium oxide junctions which show memristive behaviour have been developed which shows fast bipolar switching. The oxygen vacancies are purposefully created at a region of the device which gives the switching behaviour. Using these TiO2 crosspoints have been developed with defect tolerant addressing and predictively controllable switching polarity and conductance. Ultra high density analogue resistive memory cells (RRAM) made using memristors may also enable a new era of non-Boolean neuromorphic computing. the applications of memristors are not limited to just memories but they can lead to efficient computer hard- ware. The memory property of memristors can lead to instant on PCs that could eliminate the boot time delays. It can also play roles in optical analog as well as digital computing.

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2.TIMELINE OF MEMRISTIVE SYSTEM DEVELOPMENTS

1745 Discovery of capacitor 1827 Discovery of resistor 1731 Discovery of inductor 1967 J.G. Simmons and R.R. Verderber published an article in the Proceeding of the Royal Socie- ty of London entitled "New conduction and reversible memory phenomena in thin insulating films." The article notes hysteretic resistance switching effects in thin film (20-300 nm) silicon oxide having injected gold ions. Electron trapping is suggested as the explanation for the phenomena. 1971 Leon Chua professor at UC Berkeley, postulates a new two-terminal circuit element characterized by a relationship between charge and flux linkage as a fourth fundamental circuit element in the article "Memristor-the Missing Circuit Element" published in IEEE Transac- tions on Circuit Theory. 1976 Leon Chua and his student Sung Mo Kang publish a paper entitled "Memristive Devices and Systems" in the Proceedings of the IEEE generalizing the theory of memristors and memristive systems including a property of zero crossing in the Lissajous curve characterizing current vs. voltage behavior. 1986 Robert Johnson and Stanford Ovshinsky received U.S. Patent describing manufacturing of a 2-terminal reconfigurable resistance switching array based on phase changing materials1990 S.Thakoor, A. Moopenn, T. Daud, and A.P. Thakoor publish an article entitled "Solid-state thin-film memistor for electronic neural networks" in the Journal of Applied Physics. The article teaches a tungsten oxide electrically reprogrammable variable resistance device but it is unclear whether the "memistor" referred to in the title has any connection to the memristor of Chua

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1993 Katsuhiro Nichogi, Akira Taomoto, Shiro Asakawa, Kunio Yoshida of the Matsushita Research Institute receive U.S. Patent describing an artificial neural function circuit formed using two-terminal organic thin film resistance switches which appear to have some properties similar to the memristor. However, no specific mention of memristors is made. 1994 F. A. Buot and A. K. Rajagopal publish in the Journal of Applied Physics an article entitled "Binary information storage at zero bias in quantum-well diodes". The article demonstrates the existence of a memristor 'bow-tie' current-voltage characteristics in AlAs/GaAs/AlAs quantum-well diodes with special spacer-layer doping design. 1998 Bhagwat Swaroop, William West, Gregory Martinez, Michael Kozicki, and Lex Akers publish a paper entitled "Programmable Current Mode Hebbian Learning Neural Network Using Programmable Metallization Cell" in the Proceedings of the IEEE International Symposium on Circuits and Systems, demonstrating that the complexity of an artificial synapse can be minimized by using an ionic programmable resistance device. (June 3) 2000 A. Beck, J. G. Bednorz, Ch. Gerber, C. Rossel, and D. Widmer of IBM's Zurich Research Laboratory describe reproducable resistance switching effects in thin oxide films in the article "Reproducible switching effect in thin oxide films for memory applications" published in Applied Physics Letters. The switches are noted as having hysteretic features similar to memristors but no connection to memristors is yet noted. (July 3) Philip Kuekes, Stanley Williams, and James Heath, of HP Labs, receive U.S. Patent 6,128,214 (assigned to Hewlett-Packard) describing a nanoscale crossbar using a rotaxane molecular structure as a 2-terminal non-linear resistance switch. The connection to the memristor theory is not yet recognized. (October 3)

2001 Shangqing Liu, NaiJuan Wu, Xin Chen, and Alex Ignatiev, researchers in the Space Vacuum Epitaxy Center of the University of Houston, present results during a non-volatile memory conference in the article "A New Concept for Non-Volatile Memory: The Electric Pulse Induced Resistive Change Effect in Colossal Magnetoresistive Thin Films." This appears to be the first identification of the importance of oxide bilayers to achieve a high to low resistance ratio.
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2004 Ju. H. Krieger and Stuart M. Spitzer publish a paper in the IEEE Proceeding 2004 NonVolatile Memory Technology Symposium entitled "Non-traditional, Non-volatile Memory Based on Switching and Retention Phenomena in Polymeric Thin Films". This work describes the process of dynamic doping of polymer and inorganic dielectric-like materials in order to improve the switching characteristics and retention required to create functioning nonvolatile memory cells. (15-17 November) 2005 Ju. H. Krieger and N.F. Yudanov receive U.S. Patent describing manufacturing of a twoterminal resistance switching memory cells having active and passive layers.. Zhida Lan, Colin Bill, and Michael A. VanBuskirk receive U.S. Patent teaching a resistance switching memory cell formed from a layer of organic material and a layer of metal oxides or sulfides. The I-V characteristic is similar to the memristor but no mention of the memristor is included in the description. 2006 Stanford Ovshinsky receives U.S. Patent describing a neural synaptic system based on phase change material used as a 2-terminal resistance switch. Leon Chua's original memristor pa- per is cited by the U.S. Patent Office as a pertinent prior art reference but no specific refer- ence of connection to the memristor theory is made. (February 14) Ju. H. Krieger and N.F. Yudanov receive U.S. Patents describing manufacturing of a twoterminal resistance switching memory cells. 2007 Gregory Snider of HP Labs receives U.S. Patent assigned to Hewlett-Packard, describing implimentations of 2-terminal resistance switches similar to memristors in reconfigurable computing architectures. (April 10) Gregory Snider of HP Labs publishes the article "Self-organized computation with unreliable, memristive nanodevices" in the journal Nanotechnology discussing memristive nanodevices useful to pattern recognition and reconfigurable circuit architectures. (August 10) Blaise Mouttet, a graduate student at George Mason University, receives U.S. Patent describing uses for 2-terminal resistance switching materials in signal processing, control systems, communications, and pattern recognition. (November 27) 2008 Greg Snider of HP Labs receives U.S. Patent
7

including basic claims to a nanoscale 2-

terminal resistance switch crossbar array formed as a neural network. (April 15)

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Dmitri Strukov, Gregory Snider, Duncan Stewart, and Stan Williams, of HP Labs, publish an article in Nature "The missing memristor found" identifying a link between the 2terminal resistance switching behavior found in nanoscale systems and Leon Chua's memristor. (May 1) J. Joshua Yang, Matthew D. Pickett, Xuema Li, Douglas A. A. Ohlberg, Duncan R. Stewart and R. Stanley Williams publish an article in Nature Nanotechnology "Memristive switching mechanism for metal/oxide/metal nano-devices" demonstrating the memristive switching behavior and mechanism in nanodevices. (July 15) Yu V. Pershin and M. Di Ventra of UC San Diego publish an article in Physical Review Letters entitled "Spin memristive systems: Spin memory effects in semiconductor spintronics" which notes memristive behavior in spintronics. (September 23) Leon Chua, Stan Williams, Greg Snider, Rainer Waser, Wolfgang Porod, Massimiliano Di Ventra, and Blaise Mouttet speak at a Symposium on Memristors and Memristive Systems held at UC Berkeley. Discussion includes the theoretical foundations of memristors and memristive systems of Leon Chua and Sung Mo Kang and the prospects of memristors for RRAM and neuromorphic electronic architectures. (November 21) 2009 Sung Hyun Jo, Kuk-Hwan Kim, and Wei Lu of the University of Michigan publish an article in NanoLetters entitled "High-Density Crossbar Arrays Based on a Si Memristive System," which details an amorphous silicon based memristive material capable of being integrated with CMOS devices. (January 21) Blaise Mouttet published an article entitled: "An Introduction to Memimpedance and Memadmittance Systems Analysis" which is an explanation on "Circuit elements with memory: memristors, memcapacitors and meminductors" and Chua's memristor paper. (January 30, 2009)

HP Labs group publish an article entitled "A hybrid nanomemristor/transistor logic circuit capable of self-programming" in the Proceedings of the National Academy of Sciences. (February 10, 2009) Scientists at NIST published an article in IEEE Electron Device Letters entitled "A Flexible Solution-Processed Memristor". NIST's memristor is based on TiO2 like HPLabs but is fabricated using a less expensive room temperature deposition process and deposits the memristive material on flexible polymer sheets with potential applications as components of biosensors or RFID. (June 3, 2009)
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3.MRISTOR THEORY
Memristor is a contraction of memory resistor, because that is exactly its function: to remember its history. A memristor is a two-terminal device whose resistance depends on the magnitude and polarity of the voltage applied to it and the length of time that voltage has been applied. When you turn off the voltage, the memristor remembers its most recent re- sistance until the next time you turn it on, whether that happens a day later or a year later. Memristor theory was formulated and named by Leon Chua in a 1971 paper. Chua extrapolated the conceptual symmetry between the resistor, inductor, and capacitor, and inferred that the memristor is a similarly fundamental device. From the circuit-theoretic point of view, the three basic two-terminal circuit elements are defined in terms of a relationship between two of the four fundamental circuit variables, namely; the current i, the voltage v, the charge q and the flux-linkage . Out of the six possible combinations of these four variables, five have led to well-known relationships. Two of these relationships are already given by q(t) = t

i(t) dt and (t) = - v(t) dt. Three other relationships are given, respectively, by the ax-

iomatic definition of the three classical circuit elements, namely, the resistor (defined by a relationship between v and i), the inductor (defined by a relationship between and i), and the capacitor (defined by a relationship between q and v). That is: dv / di = R -------------------------------gives RESISTANCE d / di = L ------------------------------gives INDUCTANCE dq / dv = C ------------------------------gives CAPACITANCE Only one relationship remains undefined, the relationship between and q. So L.O. CHUA, from the logical as well as axiomatic points of view, said that it is necessary for the sake of completeness to postulate the existence of a fourth basic two-terminal circuit element which is characterized by a q curve. The element was named as MEMRISTOR as it behaves like a nonlinear resistor with memory. The symmetry of relationships among the four variables can be depicted as follows.

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3.1Analo gy:

Think of a resistor as a pipe through which water flows. The water is electric charge. The resistors obstruction of the flow of charge is comparable to the diameter of the pipe: the narrower the pipe, the greater the resistance. For the history of circuit design, resistors have had a fixed pipe diameter. But a memristor is a pipe that changes diameter with the amount and direction of water that flows through it. If water flows through this pipe in one direc- tion, it expands (becoming less resistive). But send the water in the opposite direction and the pipe shrinks (becoming more resistive). Further, the memristor remembers its diameter when water last went through. Turn off the flow and the diameter of the pipe freezes until the water is turned back on.

That freezing property suits memristors brilliantly for computer memory. The ability to indefinitely store resistance values means that a memristor can be used as a nonvolatile memory. That might not sound like very much, but go ahead and pop the battery out of your laptop, right nowno saving, no quitting, nothing. Youd lose your work, of course. But if your laptop were built using a memory based on memristors, when you popped the battery back in, your screen would return to life with everything exactly as you left it: no lengthy reboot, no half-dozen auto-recovered files.

The proposed symbol of a memristor and a hypothetical - q curve are shown in Fig. 3.2.

Fig-3.2: Memristor Symbol and - q Curve of an Arbitrary Memristor

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3.2 What memristence?

is

Memristence is a property of the memristence.When the charge flow in one direction through a circuit,the resistence of the memristence increase,and its resistence decresce when the charge flows in the opposite direction in the circuit.if the applied voltage is turned off,thus stopping the flow of charge,the memristence remembersthe last resistance that it had.when the flow of charge is strated again,the resistence of the circuit will it was when it was last active.

3.3Analogy Memristor

of

An analogy of a memristor is described in . A resistor is analogous to a pipe through which water flows. The pressure of water at the input of the pipe is analogous to the voltage, and water is analogous to electric charge. The rate of flow of water through the pipe is similar to electric current. If the pipe has a larger diameter, the flow of water through the pipe is faster, just like more current flows through resistor with a small value of resistance. An anal- ogy for a memristors is a different kind of pipewhose diameter expands or shrinks depend- ing on the direction of the Water flow through it. The diameter of the pipe increases when the water flows in one direction, enabling water to flow faster, and the diameter of the pipe de- creases when the water flows in the opposite direction, thus slowing down the water flow. If no water is let into the pipe, the pipe will retain its most recent diameter until the water is turned back on. Thus, the pipe remembers the amount of the water that has flowed through it.

3.4Properties Memristor
The

of

- curve of a memristor is a monotonically increasing. The memristance - curve. According to the memristor passivity condition, a is always positive, and so the memristor is -

M(q) is the slope of the

memristor is passive if and only if memristance M(q) is non-negative. If M(q) 0, then the instantaneous power dissipated by the memristor,

a passive device [9]. The memristor is purely dissipative, like a resistor. Thus, the curve of a

memristor is always a monotonically increasing function. Fig. 6 shows some examples of typical - curves of memristors.

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3.5Current-voltage memrister

of

An important fingerprint of a memrister is the pinched hysteris loopcurrent-voltage charecteristics.for a memrister exited by a periodic signal,when the voltage V(t) and current i(t) have identical zero-crossing,if any device has current-voltage hysteris curve,then it is either a memrister or a memristive device.another signature of the memrister is that pinched hysteresis loopshrinks with the increase in the excitation frequency.

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3.6 The Memristor from HP Labs

In 2008, thirty-seven years after Chua proposed the memristor, Stanley Williams and his group at HP Labs realized the memristor in device form. The HP model of the memristor is described in [9]. To realize a memristor, they used a very thin film of titanium dioxide (TiO2). The thin film is sandwiched between two platinum (Pt) contacts and one side of TiO2 is doped with oxygen vacancies. The oxygen vacancies are positively charged ions. Thus, there is a TiO2 junction where one side is doped and the other side is undoped.

. Schematic of HP memristor (Adapted from [9]). D is the device length and w is the length of the doped region. Pure TiO 2 is a semiconductor and has high resistivity. The doped oxygen vacancies make the TiO2-x materi- al conductive. The working of the memristor established by HP is described in [19]. When a positive voltage is applied, the positively charged oxygen vaca ncies in the TiO2-x layer are repelled, moving them towards the undoped TiO2 layer. As a result, the boundary between the two materials moves, causing an increase in the percentage of the conducting TiO2-x layer. This increases the conductivity of the whole device. When a negative voltage is ap- plied, the positively charged oxygen vacancies are attracted, pulling them out of TiO 2 lay- er. This increases the amount of insulating TiO2, thus increasing the resistivity of the whole device. When the voltage is turned off, the oxygen vacancies do not move. The boundary be- tween the two titanium dioxide layers is frozen. This is how memistor remembers the voltage applied. Fig(9) explains the behavior of the memristor model when positive and negative voltage is applied. Fig(9)a shows the thinfilm of titanium dioxide where the one side is doped with posistive oxygen vacancies and the other side is undoped. Fig(9b) shows the behavior when ap- positive voltage is applied.
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The positive oxygen vacancies are reppelled and they move towards the undoped TiO2 layer ,increasing the percentage of the insulating TiO2 ,thus decreasing the resistivity.Fig shows the behavior when a negative voltage is applied.the positive oxygen vacancies are attracted and they move towards the dopped TiO2 layer,increasing the percentage of the insulating TiO2,thus incrasing resistivity. the

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3.ARCHITECTURE
3.1Fabrication Structure and Device

The Pt and Ti metal layers were deposited by electron-beam evaporation at room temperature. The TiO2 films were fabricated either by sputter deposition or atomic layer deposition (ALD) methods . The TiO2 layer used for the junctions shown in Fig. 4.1 was 50 nm thick and was deposit- ed by sputtering from a TiO2 target with 3 mtorr Ar and 250 C substrate temperature. The TiO2 (15 nm)TiO2-x (15 nm) bilayer films used for the junctions shown were synthesized by ALD at 200 C with an additional in situ annealing in a N2 environment at 300 C.

The annealing process was carried out following the first 15-nm deposition to create oxygen vacancies in the lower half of the TiO2 film, or was carried out following the full 30-nm deposition to create oxygen vacancies in the upper half of the TiO2 film.The Ti (1.5-nm adhesion layer)+Pt (8-nm) electrode used for the 50 nm x 50 nm nanojunctions shown was patterned by ultraviolet-nanoimprint lithography. The Ti (5-nm adhesion layer) + Pt (15-nm) electrode used for the microjunctions (5 mm x 50 mm) shown was fabricated using a metal shadow mask. A single irreversible forming step was necessary for the as-prepared (virgin) devices before they exhibited repeatable switching cycles; for the nanodevices this forming occurred at approximately +8 V and 10 A. The bottom electrodes of the junctions were grounded during all electrical measurements.

3.2 Device Model

Single-crystalline TiO2 was used to elucidate how the metal-oxide interfaces control the device resistance. A single crystal of rutile TiO2 (bandgap Eg =3.0 eV) was first annealed in a 95% N2 and 5% H2 gas mixture at 550 C for 2 h to create an oxygen-deficient layer near the surface. Oxygen vacancies in TiO2 are known to act as n-type dopants, transforming the insulating oxide into an electrically conductive doped semiconductor. Metal-semiconductor contacts are typically ohmic in the
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100 m x 100 m Pt and Ti electrode contact pads were deposited onto the single crystal, as shown schematically in Fig. 1a: pads 1 and 4 were Pt films (80 nm thick) and pads 2 and 3 were Ti films (5 nm thick) with Pt (80 nm thick) caps. The 5-nm Ti layer was used as a chemically reactive contact to further reduce the TiO2 and create a locally high concentration of oxygen vacancies close to the metal- semiconductor interface.

fig-5.2: Crossbar Architecture Crossbar architecture has become the de facto standard for nanoscale circuits because of its simplicity, adaptability, and redundancy.The crossbar is an array of perpendicular wires. Anywhere two wires cross, they are connected by a switch. To connect a horizontal wire to a vertical wire at
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any point on the grid, you must close the switch between them.The idea is to open and close these switches by applying voltages to the ends of the wires. A crossbar array is basically a storage system, with an open switch representing a zero and a closed switch representing a one. A switch is a 40nm cube of TiO2 in two layers.The lower TiO2 layer has perfect 2:1 oxygen-totitanium ratio,making it insulator.By contrast,the upper TiO2 layer is missing 0.5 percent of its oxygen(TiO2-x). So x is about 0.05.The vacancies make the TiO2-x material metallic and conductive.

3.4Worki ng
A switch is a 40nm cube of TiO2 in two layers.The lower TiO2 layer has perfect 2:1 oxygen-totitanium ratio,making it insulator.By contrast,the upper TiO2 layer is missing 0.5 percent of its oxygen(TiO2-x).so x is about 0.05.The vacancies make the TiO2-x material metallic and conductive.The oxygen deficiencies in the TiO2-x manifest as bubbles of oxygen vacancies scattered throughout the upper layer.

Fig-5.3: Applied Memristance A positive voltage on the switch repels the (positive) oxygen deficiencies in the metallic upper TiO2-x layer, sending them into the insulating TiO2 layer below. That causes the boundary between the two materials to move down, increasing the percentage of onducting TiO2-x and thus the conductivity of the entire switch. The more positive voltage is applied, the more conductive the cube becomes.

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Fig-5.4: A positive voltage given A negative voltage on the switch attracts the positively charged oxygen bubbles, pulling them out of the TiO2. The amount of insulating, resistive TiO2 increases, thereby making the switch as a whole resistive. The more negative voltage is applied, the less conductive the cube becomes.

Fig: A negative voltage given

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3.5How memorizes?

memristor

What makes this switch special-memristive , is that when the voltage is turned off, positive or negative, the oxygen bubbles do not migrate. They stay where they are, which means that the boundary between the two titanium ioxide layers is frozen. That is how the memristor remembers how much voltage was last applied.

Fig-5.6: Energy Band Diagram at the Interfaces for Off and On States

Fig-5.7: i-v characteristics

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The loops map the switching behaviour of the device. It begins with a high resistance and as the voltage increases the current slowly increases. As the charge flows through the device the resistance drops and the current increases more rapidly with increasing voltage until the maximum is reached. Then as the voltage decreases, the current decreases but more slowly because charge is flowing through the device and the resistance is still dropping. The result is an on-switching loop. When the voltage turns negative, the resistance of the device increases, resulting in an off-switching loop.

5.5Analysis Fig-5.8: Simplified Coupled Variable-Resistor Model for a Memristor Consider a thin semiconductor film of thickness D sandwiched between two metal contacts. The to- tal resistance of the device is determined by two variable resistors connected in series, where the resistances are given for the full length D of the device. Specifically, the semiconductor film has a region with a high concentration of dopants (in this example assumed to be positive ions) having low resistance RON, and the remainder has a low (essentially zero) dopant concentration and much higher resistance ROFF. The application of an external bias v(t) across the device will move the boundary between the two regions by causing the charged dopants to drift. For the simplest case of ohmic electronic conduc- tion and linear ionic drift in a uniform field with average ion mobility v, we obtain

v(t) = (Ron.w(t)/D + Roff ( 1- w(t)/D))

2 0

(5.1)

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dw(t)-dt = v Ron.i(t) / D

(5.2)

which yields the following formula for w(t):

w(t) = v Ron.q(t) / D

(5.3)

By inserting equation (3) into equation (1) we obtain the memristance of this system, which for Ron<<Roff simplifies to:

M(q) = Roff ( 1- v Ron.q(t) / D )

(5.4)

The q-dependent term in parentheses on the right-hand side of this equation is the crucial contribu- tion to the memristance, and it becomes larger in absolute value for higher dopant mobilities v and smaller semiconductor film thicknesses D. For any material, this term is 1,000,000 times larger in absolute value at the nanometre scale than it is at the micrometre scale, because of the factor of 1- D2, and the memristance is correspondingly more significant. Thus, memristance becomes more important for understanding the electronic characteristics of any device as the critical dimensions shrink to the nanometre scale. The coupled equations of motion for the charged dopants and the electrons in this system take the normal form for a current-controlled (or charge-controlled) memristor.

One important fact in this device is that the state variable w, which in this case specifies the distribution of dopants in the device, is bounded between zero and D
[2].

The state variable is proportional to

the charge q that passes through the device until its value remains between 0 and D. As long as the system remains in the memristor regime, any symmetrical alternating-current voltage bias results in double-loop iv hysteresis that collapses to a straight line for high frequencies. The condition of hard switching (large voltage excursions or long times under bias) arises when the w(t) takes the extreme values 0 or D. This is the basic principle of the bipolar switching of memristors.

If a positive voltage greater than the threshold voltage is applied then the device will be turned on and the resistance gets changed to Ron. After that even if the power goes

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4.RESULTS AND SIMULATIONS

4.1 SPICE Model
Biolek, et al., provided in [21] a useful SPICE model of a memristor, the structure of which is shown in Fig. 10.

In the above circuit, Vmem is the input voltage and Imem is modeled to be the current through the memris age source .
2 2

tor. The flux is calculated by integrating the voltage is the voltvoltage is controlled according to the formula

Vmem and the charge is calculated by integrating the current Imem whose terminal

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is a current source whose current is controlled according to the equation ImemfV(x) where

V(x)is the voltage across the capacitor Cx and it models the normalized width of the doped layer. The relation between memristor current and voltage is modeled as on the basis of Eq. 26 Rmem(x)=Roff-xdelR1 delR=Roff-Ron

Roff is the resistor in series voltage source whose terminal voltage is cotrolled by the formula,xdelR.The voltage V(x) across the capacitor Cx models the normalized width x of the doped layer. The initial state of x is modeled by the initial

voltage of the capacitor. The flux is calculated by the time-integral of voltage, and the charge is calculated by the time-integral of current. The listing for the SPICE model is included in the appendix.

4.2 Simulation SPICE model

Results

Using

4 .2.1 Simulations for a Memristor Driven by Voltage using PSPICE

For this simulation, the width pant mobility = 10

-10 2 -1

of the TiO2 film is considered to be 10 nm and the do-1

cm s V . The values assumed are-

=1K,

=100K and

the initial resistance sumed to be 80K.

required to model the initial conditions of the capacitor is as-

The simulation results are shown below in Figs. 11, 12, 13, 14, 15, 16 and 17.

2 3

Fig.11.An input voltage Vosinw0t applied to the memrister

Fig. 12. Waveform of the current Imem through the memristor.

Fig.

13.

Voltage

across

the

capacitor

Cx

wh

Fig. 15. Currentversus-voltage curve for input frequency of 1 Hz. of the device.

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Fig. 14. Charge-versus-flux curve for memristor.

Fig. 17.Current-versus-voltage curve for input frequency of 2 Hz.

Fig. 16. Current-versus-voltage curve for input frequency of

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4.2.2 Simulation Results Using MATLAB

4.2.2.1 Simulations for a Memristor Driven by Voltage using MATLAB

Using the equations (23), (24) and (25), studied in Chapter 4, a memristor is simulated using MATLAB. For this simulation, the width pant mobility = 10
-10 2 1 -1

of the TiO2 film is considered to be 10 nm and the do=100 , =16K. The

cm s- V . The values assumed are

simulation results are shown below. The MATLAB code is included in the appendix.

-5

Plot of charge versus flux

x 10 6

0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

flux

Fig. 18. Plot of flux versus charge.

27

charge

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-4

x 10 1

Plot of current versus voltage

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8

1 voltage

Fig. 19. Plot of current versus voltage for = 3 rad/s.

current

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-2

-4

-6

-8 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1

voltag e

Fig. 20. Plot of current versus voltage for = 8 rad/s. From Fig. 18, we can see that the fluxcharge curve is a monotonically increasing curve. Fig. 19 and Fig. 20 show the currentvoltage pinched hysteresis loop and the hysteresis loop is shrinking with the increase in the input frequency. Thus, all the properties that are said to be a signature of a memristor are satisfied.

current

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5. TYPES OF MEMRISTOR
5.1 Two-state Memristor Charge-controlled

The q curve of a two-state charge-controlled memristor is shown in Fig. 21. The slope of the q curve gives the memristance . The two values of the memristance can be considered as two different states which can be used as binary states. The memristor holds logical values as impedance state and not as voltages. The resistance can be changed from one state to another by applying appropriate voltage.

Fig. 21.

curve of a two-state charge-controlled memristor

5.2 Digital Logic Implementation Using Memristor

5.2.1 Memristor as a Logical State Element [22]

Consider the memristor shown in Fig. 22. One of the terminals of the memristor is connected to control and the other is connected to either input or output.

3 0

CONTROL CONTROL

Input Output (a) (b)

Output

Fig. 22. Memristor as a state element (Adapted from [22] When the memristor is closed as shown in Fig. 22(a), it has zero impedance across input and control and hence represents logic 0. The logic 0 can be read out by applying a positive voltage at control and reading the voltage at output. A high voltage at output implies logic 0 since the impedance is zero. The equivalent circuit during readout is shown in Fig. 22(b). An open memristor contains high impedance and designates logic 1.

5.3 Inverting Configuration

Figure 23 shows two memristors connected in an inverting configuration. Mem1 is the driving memristor and its value is not changed. The state of Mem2 is changed to create the logical computation. The logical computation can be achieved in three stages.

3 1

(d )

RMem1 RMem2 0 1 1 0

inverting configuration of two memristors

The first stage is called unconditional open. In this stage, the memristor Mem2 is preset to the open state by forcing high impedance on the control of Mem1 and by applying a high negative voltage at the control of Mem2. The voltage is greater than the threshold required to open the memristor and hence the state of Mem2 is set to logic 1 irrespective of its previous state. This case is shown in Fig. 23(b). The second stage is called the conditional close and this stage is shown in Fig. 23(c). The memristor Mem1 is placed in the read out mode by applying a voltage trol terminal. A voltage the impedance . at its conis applied at the control of Mem2. If memristor Mem1 is closed, =0. This makes the voltage at the intermediate node X close to

The voltage across Mem2 is ( across Mem2 is Fig. 23.

) which is not enough to close Mem2 and it re-

mains in the open state. If Mem1 is open, the voltage on node X is close to zero and the volt- age . The voltage drop is over the threshold of Mem2 and it closes memristor Mem2. Thus, logical operation of inversion takes place. The truth table is shown in
3 2

32

3 3

The third stage is read out. The control node of Mem1 is placed in high impedance so that it does not have an effect to node X. A voltage is applied at the control terminal of Mem2. This will result a voltage at output, depending on the state of Mem2.

5.4 NAND Operation

Consider the set 0 f memristor as shown in Fig.24. The memristor Mem1 of inverting configuration is replaced by set of memristor Mem1-Mem3, which are connected in parallel. The control terminals of Mem1-Mem3 are connected. The memristor Mem4 is unconditionally open by applying a high negative voltage at the control terminal. Then a voltage is applied at the common control terminal and is applied to the control of Mem4. In the scenario where memristors Mem1-Mem3 are open, the voltage at the terminal X is close to 0. The voltage drop across Mem4 is which is enough to close Mem4. In the scenario where one memristor Mem1 is closed and Mem2 and Mem3 are open, the intermediate node settles close to and the voltage across Mem4 is not enough to close the memristor. Similar results occur when Mem2 or Mem3 are open. Hence, the logical computation can be treated as Mem4 = (Mem1.Mem2.Mem3)` which is NAND operation. This configuration is referred to as wired- AND as various inputs are wired together to p roduce result.

Fig. 24. Wired- AND logical implementation (Adapted from [22]).

3 4

33

3 5

5.5 Arithmetic Processing Using Memristors

5.5.1Memristor Crossbar

Crossbars are formed from a first array of vertical conductive wires crossing with second array of horizontal conductive wires. Memristance material is placed between the two arrays so that any particular wire in the vertical array can be connected to a wire in the horizontal array by switching the resistance of a particular intersection to a low state. The intersection is called as a crosspoint. Fig. 25 shows an example of a memristor based crossbar array.

5 .5.2 Arithmetic Processing [24]

The memristor crossbar array can be used for arithmetic processing. Fig. 26 shows example of a memristor crossbar array which includes a horizontal wire intersected by eight vertical wires and the memristor is sandwiched between the horizontal wire and the vertical wires. An input voltage below the threshold, required for changing the resistance of the memristor is applied to the vertical wires. Assuming that the memristor may be approximated as a fuse (i.e. high resistance is approximately an open circuit and low resistance is a short circuit), the output current in the horizontal wire can be calculated based on the ratio of the input voltage and the parallel combination of the number of low resistances. Thus if one low resistance state produces a current of I, two low resistance states will produce a current of 2I, three low re3 6

MEMRIST ER

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sistance states will produce a current of 3I and so on.

3I

Fig. 26. Memristor crossbar array which includes a horizontal wire intersected by eight vertical wires (Adapted from [24]).

In the system illustrated in Fig. 27 each column of the crossbar is configured to store the equivalent of a binary numerical value where low resistance states are indicated as a closed connection and high resistance states are open connections. Each row wire includes a weighting resistor set to be sufficiently larger than the low-resistance state of the memristor so that each row has an associated bit significance ranging from a least significant bit row (uppermost row) to a most significant bit row (lowermost row). By selecting particular columns (i.e. apply- ing a positive voltage less than the threshold necessary to alter the resistance of the memristor material) the binary numerical values of these columns may be added together. In the example of Fig. 27, the second, third, and sixth column values are summed. In the second column, only the second-row crosspoint is in a low-resistance state, so this contributes a current of approximately (Vinput/(r/2) ). In the third column, the first and second row crosspoints are in the lowresistance states which contribute ( Vinput/R+Vinput/(r/2)=3Vinput/R) to the current. In the sixth column,the second and third row crosspoints are in the low-resistance states, which contribute (Vinput/(r/2)=6Vinput/R) to the current. The overall current is thus ( Vinput/ (r/2)+3Vinput/R+6Vinput/R=11Vinput/R).Using an analog-to-digital converter with a resolution set to(Vinput/R) the output is converted to 1011, which is the expected sum (0010 +
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0011 + 011).

A 11I D C

Fig. 27. Memristor crossbar array as an arithmetic processor (Adapted from [24]). The above configuration has some disadvantages, one being that the analog circuitry can be more sensitive to noise than purely digital electronics, but it has the advantage of integrating memory with computation. Thus, the use of memristors enables calculation on the same chip where the data is stored.

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6.APPLICATIO NS

6.1 NANO-SCALE NATURE

The main objective in the electronic chip design is to move computing beyond the physical and fiscal limits of conventional silicon chips. For decades, increases in chip performance have come about largely by putting more and more transistors on a circuit. Higher densities, however, increase the problems of heat generation and defects and affect the basic physics of the devices. Instead of increasing the number of transistors on a circuit, we could create a hybrid circuit with fewer transistors but with the addition of Memristors which could add functionality. Alternately, Memristor technologies could enable more energy-efficient high-density circuits. Memristor, was not been seen before because the effect depends on atomic-scale movements, it only poped up on the nanoscale of Williams devices. Information can be written into the material as the resistance state of the memristor in a few nanoseconds using few picojoules of energy- as good as anything needs to be. And once written memory stays written even when the power is shut.

6.2REPLACEMENT OF FLASH MEMORY

The important potential use of memristor is as a powerful replacement for flash memorythe kind used in applications thet require quick writing and rewriting capabilities, such as in cameras and USB memory sticks. Like flash memory, memristiev memory can only be written 10,000 times or so before the constant atomic movements within the device cause it to break down. It is possible to improve the durability of memristors.

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6.3REPLACEMENT FOR DRAM

Computers using conventional D-RAM lack the ability to retain information once they are turned off. When power is restored to a D-RAM-based computer, a slow, energy-consuming "boot-up" process is necessary to retrieve data stored on a magnetic disk required to run the system. the reason computers have to be rebooted every time they are turned on is that their logic circuits are incapable of holding their bits after the power is shut off. But because a Memristor can remember voltages, a Memristor-driven computer would arguably never need a reboot. You could leave all your Word files and spreadsheets open, turn off your comput- er, and go get a cup of coffee or go on vacation for two weeks

6.4BRAIN-LIKE SYSTEMS
As for the human brain-like characteristics, Memristor technology could one day lead to computer systems that can remember and associate patterns in a way similar to how people do. This could be used to substantially improve facial recognition technology or to provide more complex biometric recognition systems that could more effectively restrict access to personal information. These same pattern-matching capabilities could enable appliances that learn from experience and computers that can make decisions. It is observed that the complex electrical response of synapses to the ebb and flow of potassium and sodium ions across the membrance of eeach cell which allows thw synapses to alter their respose according to the frequency and strength of the signals. It looked maddeningly similar to the response a memristor would produce.

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FIG: NEURAL NETWORKS

7.NEW HORIZONS :
After the discovery of memristor the authors have taken a new step towards the new devices with properties like memristor. There are two such elements which were next discovered : 7.1MEMCAPACITOR 7.2MEMINDUCTOR
The memcapacitor meminductor are the memdevices in which the capacitance and inductance respectively depends on the state and history of the system. They show pinched hysteresis loop in the constitutive variables that define them:-

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The difference between the Memristor and both these devices is that they store energy whereas memristor cannot.

MEMCAPACITOR

MEMINDUCTOR

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8.CONCLUSI ON
st

Memristors will change circuit design in the 21 century as radically as the transistor changed in the 20 .Memristors will never eliminate the need for transistors: passive devices and circuits require active devices likes to supply energy.
th

Memristors can be used to create highly dense neural networks. The major challenges of the memristor include commercial large scale integration, new doping methods to increase the mobility of ions. If these challenges are met then memristors will definitely pose a threat to the usage of conventional non vola- tile memories and DRAMs. Integrating TiO2 based memristor with silicon based CMOS devices in a hybrid integrated circuits presents a lot of challenges. To enable cost effective large scale manufacturing for commercial applications, it should be possible to realize memristor on silicon. Mobility of ions is very low when compared to the mobility of electrons. To increase the speed of switching newer doping methods have to be introduced which will enable higher ion mobilities.

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9.REFERENC ES

A Flexible Solution-Processed Memristor , Nadine Gergel-Hackett, IEEE proc. 2008 . Leon Chuas Memristor, IEEE circuits and systems magazine.1971 How we found the missing Memristor, by Stanley Williams. www.ieee.org www.wikiepedia.org www.spectrum.iee.org/dec08/2007 Chua and k.sang Proceeding of IEEE1976,VOL 46.

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