Solar Cell Fabrication Lab

Final Report

Prateek Pannu - 0755614 January 06 2012

Executive Summary It is noted that solar cells are of importance in context to world energy demand. To develop understanding of fabrication processes involving silicon a solar cell device is constructed. In this report, fabrication method of a silicon solar cell is discussed along with resultant device parameters achieved after fabrication, such as efficiency.

Introduction and Objective In 2009 world energy consumption is estimated to be 16 TWy/year most of which was acquired through burning of fossil fuels. Extraction of fossil fuels is becoming increasingly difficult and the resultant carbon dioxide emissions are known to be causing environmental damage through global warming. A recent study in 2011 concluded that health cost of coal in U.S. is $500 billion a year. Therefore our dependence on energy requires moving to more sustainable options. There are several renewable energy sources but solar energy is of particular interest because amount of solar energy radiated on earths surface each year is estimated to be 23 000 TWy. Were as amount of wind energy present is 25-70 TWy/year and total amount of energy coal can offer is 900 TW. Due to abundance of solar energy and its importance in sustainability it is especially helpful to construct knowledge in solid state physics and fabrications methods involved in silicon processing while holding solar cell as a reference. Also solar cell industry has averaged 65% compound annual growth for the past 5 years. This further supports learning about solar cells; its operating principle, and fabrications methods. Different types of semiconductors can be used in solar cells. Most commonly silicon and gallium arsenide are used. Among other semi-conductors silicon provides the ability to easily grow an oxide layer, which has been the primary reason for its success in transistors. Also in case of silicon solar cells a passivation layer can be easily created. Due to success of silicon in transistor industry, fabrication techniques for semiconductors have mostly been developed on silicon. Therefore it is only complementary to study a silicon solar cell. Solar Cell Fabrication lab intends to develop understanding of semi-conductor fabrication processes and build on the knowledge of solid state physics. This is done while holding silicon as a reference material and solar cell as a reference device, since silicon is currently the most widely used semi-conductor and solar cell device provides a huge potential for modern day energy crisis.

Fabrication Device is essentially fabricated by three main photolithography steps. First step corresponding to the creation of inverted pyramids, second corresponding to creation of guard rings to separate four devices,

and third corresponding to creation of a strip on the front surface over which aluminum is deposited to form the front contact. The final structure we create is as follows:

Gray Strip: - Front side Aluminum Contact White layer: - Silicon Dioxide Blue layer: - n-doped Siliocn Gray layer: - p-doped Silicon Yellow layer: - P+ doped Silicon Thin gray layer: - Black side Aluminum Contact.

Final Structure

Steps: Cleaning of Silicon wafer Organic impurities over the P-dopped Silicon wafer (100) are removed by dipping it in a dilute solution of H2SO4 and H2O2, and inorganic impurities are removed by dipping it in a dilute solution of HCl. In general whenever silicon wafer is exposed while undergoing a processing step, at the end of the step it is rinsed with deionized water and dried using a N2 gun. This process ensures that the silicon wafer is always clean and the device fabricated does not have abrupt potential barriers over which electrons can get trapped.

First step of creating inverted pyramids 1) Silicon wafer undergoes wet oxidation to grown an oxide layer of ~100nm on the top surface. This silicon oxide layer will be patterned to act as a mask for KOH etching which is done later to form inverted pyramids. 2) To pattern the silicon oxide layer thin photoresist is applied on the top surface. The wafer with photoresist on top is then placed in the center of a spinner at spun to create an even layer of photoresist on top. This method is called spin coating. A square mask pattern is then transferred using photolithography. That is a positive mask is placed on top of the wafer and photoresist is exposed to UV light, which is later developed using Microposit 351.

3) Buffered HF is used to remove exposed area of silicon dioxide and later photoresist is removed using a solution of acetone. 4) KOH is used to etch into the silicon wafer, which results in inverted pyramid shapes on the top surface, and finally remainder of the silicon dioxide is removed using buffered HF again.

Steps above are summarized in the following pictures.

1) Oxide layer and photoresist layer

2) Developed Photoresist

3) Exposed Oxide removed

4) Photoresist removed

5) Final Structure

Inverted pyramids improve device performance give light a second chance to get absorbed. Refer to the following figure. As a result net absorption of light on the front surface increases.

a) Flat surface

b) Inverted pyramids

Second step forming guard rings Similar to first step spin coating is used to deposit a thick photoresist, and mask pattern is transferred by exposing photoresist to UV light. Same process of photolithography as before is applied. Patterned wafer is then bombarded with boron particles. Boron results in separating the four solar cells and keeps them isolated from each other. As p++ region in effect creates infinite resistance between solar cells.

Next photoresist is removed using a solution of H2SO4 and H2O2, and front surface is implanted with ndopant (phosphorus). To create an anti-reflective coating and protect the front surface of the solar cell, 110nm thin layer of silicon dioxide layer is grown. Once again this is done by wet oxidation. Rear contact is created by evaporating aluminum on the back surface. To protect the front surface in this process a 4 inch wafer is mounted on top of the 2 inch wafer, using photoresist lining as an adhesive. After aluminum deposition acetone is used again to remove the photoresist lining and separate 2 inch wafer from 4 inch wafer.

Third step, mask patter transfer for front contact aluminum deposition 1) Photoresist is deposited using spin coating 2) Exposure to UV light is conducted to transfer the pattern. 3) Photoresist is Hardened using Toluene. It draws out solvents from the top layer of the photoresist.

4) Finally mask pattern is devolved using Microposit 351 developer solution 5) Buffered HF is used to remove SiO2 since aluminum needs to be in direct contact with the nlayer.

Aluminum deposition and lift-off As was the case for back surface aluminum deposition similarly aluminum is deposited on the front surface of the solar cell. It is important to note there is also aluminum present on top of photoresist that was used for patterning and a lift-off process is required. Silicon wafer is placed in ultrasonic bath to lift off aluminum from top of the photoresist and later photoresist is removed using acetone. Following figure summarizes the process:

1) Photoresist deposited on top surface

2) After patterning and aluminum deposition

Finally after lift-off the solar cell is annealed in an N2 furnace at 4500 C for 5 minutes. This is because ion implantation cause defects in the lattice structure, and annealing allows for the implanted ions to more to a vacant lattice site. This results in removal of lattice defects.

Results: Isc (A) 1 2 3 4 -0.00309 -0.00255 -0.00310 -0.00190 Jsc (A/m2) -15.77 -13.01 -15.80 -9.677 Voc (V) 0.32 0.27 0.29 0.143 Im (A) 0.001644 0.001277 0.001549 0.0009483 Vm (V) 0.165 0.135 0.145 0.0715 Pm (W) 0.000271260 0.000172328 0.000224569 6.78035E-05 FF 0.27 0.25 0.25 0.25 E% 0.14 0.09 0.11 0.03

Numbering convention is shown in the figure on the left. 4. is the cell with no inverted pyramids.
2 3

See attached graphs and data in Appendix 1 for more detail.

Discussion Steps followed for the fabrication of the above solar cell are comparable to that of a PERC solar cell which has been shown to achieve efficiencies of up to 24% [3]. In our case the cell was not fabricated in a clean room as a result there are likely to be a lot of dust particles that lead to defects, and result in an overall lower efficiency. Efficiencies of up to 2% can still be achieved if great care is taken to ensure that the wafer is kept clean. Regardless of our best efforts there where several cases where deionized water droplets got air dried because we were too slow while using N2 gun. Also during our first attempt of spin coating the wafer it was not properly placed in the middle and an uneven layer of photoresist was applied. Significant discoloration was seen right in the middle of cell 2 after the oxidation step. This indicates that there were infact dust-particles present in the middle of cell 2. Therefore it is expected to see a lower efficiency for cell 2 compared to others. Cell 4 had the lowest efficiency of all and this is expected since there were no inverted pyramids fabricated on top of it.

Higher phosphorous doping results in a lower contact resistance but it also increase the amount of impurities which results in higher electron hole pair recombination.

Overall fabricating a solar cell was a fun and very interactive learning experience. I find all the fabrication steps were very well defined. Only particular difficulty I had was during the step of spin coating. Placing the wafer in the center is very tedious and challenging. Perhaps a method can be designed to assist with the placement of the wafer on the spinner.

References

[1] ENG PHYS 4U04 Solar Cell fabrication Lab Manual

[2] Streetman, Ben G., Solid State Electronic Devices, 6th Ed., The University of Texas at Austin, 2009 [3] Wang, A., Zhao, J., & Green, M.A. (1990). 24% Efficient Silicon Solar Cells. Applied Physics Letters, 57(6), 602-604