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Computer Arithmetic

Number Representation

Why Representation? Need to map numbers to binary bits


Need a representation anyway

Representation is consequential
Paolo.Ienne@epfl.ch EPFL I&C LAP Vojin.Oklobdzija@epfl.ch EPFL CSDA and UC Davis ACSEL

Complexity of arithmetic operations depends heavily on the representation

Number representation is the heart of computer arithmetic


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What Is a Number System?


A number is represented as an ordered n-tuple of symbols (digit vector)

Rule of Interpretation
Mapping from set of digit vectors to numbers (e.g., integers, reals)

an 1an 2 ...a2a1a0
Each symbol is a digit

an 1 , an 2 ,K a2 , a1 , a0
Digits usually represent integers from a given sete.g.,

12

twelve

ai {0, 1} or ai {0, 1,..., 9} or ai { 1, 0, 1}


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digit vectors
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N, Z, R,
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Redundancy

Positional Weighted Systems


The rule of interpretation is a scalar product
n 1 i =0

A = an 1an 2 ...a2a1a0 = ai wi
where

W = (wn 1 , wn 2 ,...w2 , w1 , w0 )
digit vectors N, Z, R, digit vectors N, Z, R,

is the weight vector

Nonredundant
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Redundant
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Radix Systems
Weights are not arbitrary but related to a radix vector

Mixed-Radix Systems
Fixed-radix if all elements of R are identical

R = (rn 1 , rn 2 ,...r2 , r1 , r0 )
in the following way

wi = r A = ai r i
i i =0

n 1

A few mixed-radix systems are very commone.g., time

w0 = 1

wi = wi 1 ri 1 = rj
j =0

i 1

R = (24, 60, 60) W = (86400, 3600, 60, 1)

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Common Decimal Notation


It is weighted

Common Decimal Notation


It is nonredundant because canonical

A = an 1an 2 ...a2a1a0 = ai wi
i =0

n 1

ai {0, 1, ..., r 1}
10n possible digit vectors to represent 10n values

It is positional

wi depends only on i
It is fixed-radix Weighted, positional, fixed-radix, nonredundant also called conventional systems

wi = r i
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Digit Set
Canonical set

Why Redundant Representations?


Remember paper & pencil addition?

ai {0, 1, ..., r 1}
A canonical system is nonredundant

an-1 bn-1 FA Cout sn-1 In binary:

an-2 bn-2 FA sn-2

a1 b1 FA s1

a0 b0 FA s0

Cin

Any other choice is noncanonical

ai { 1, 0, 1, 2}

ai { 1, 0, 1}

ai { ( r / 2 1),..., 0,..., r / 2 1, r / 2}
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Slowcritical path contains n full-adders: nave delay is O(n) Must be performed right to left (LSB to MSB)
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Redundancy May Simplify Some Operations


Radix-2, noncanonical {0, 1, 2, 3} , 2 bits per digit ai ai-1 bi bi-1 FA
digit ai 0 1 2 3 encoding a i 0 0 1 1 ai 0 1 0 1

Redundancy and MSB-first?


Now that the carry chain is broken, output digit i depends exclusively on input digits i, i 1, i2 Hence I can receive the operands in serial form and, when I have seen the first three input digits, I can produce the first output digit; afterwards, every new input digit, I can produce a new output digit Online arithmetic or MSDF digit-serial arithmetic

A
2n

B
2n

ai ai-1 bi bi-1 FA

ai-1 ai-2 bi-1 FA

+
2n

FA si si

Critical path now contains only two full-adders: delay is now O(1)

FA si si
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Very Large Choice of Weighted Positional Number Systems

Binary Representation and Negative Numbers


Simplest signed system: Sign-and-magnitude
Source: Parhami, Oxford 2000

One bit represents the sign (typ. 1 neg.) Absolute value represented as unsigned

A = san 2 ...a2 a1a0 = (1) s ai 2i


i =0

n2

Exactly as humans do in decimal

A = an 2 ...a2a1a0 = ai 10i
i =0

n 2

Of course, we could also write 0 for + and 9 for


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Sign-and-Magnitude Representation Some advantages and disadvantages


Familiar for users Simple nave multiplication Adders are not the most efficient Redundant zero (+0 and 0) may cause some problems (e.g. testing for a variable =0)

Negative Numbers As Result of Paper & Pencil Subtraction


Consider a normal paper-and-pencil subtraction
1 1 1 1

0 0 0 0 1 1 1

0 0 1 1

0 1 1 1

1 0 1 1

0 0 0 0

1 02 0 12 0 12 0 12
+20

1010 1710

27 +26 +25 +24 +23

710

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Intuitive Derivation of the Twos Complement System


Twos complement representation
n2 i =0

Comparison of Binary Representations on 3 Bits


Decimal Binary (Unsigned) 111 110 101 100 011 010 001 000 011 010 001 000 / 100 101 110 111 011 010 001 000 111 110 101 100
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A = an 1an 2 ...a2 a1a0 = an 1 2 Amax = 2 n 1 1

n 1

+ ai 2

Sign and Magnitude

Twos Complement

7 6 5 4 3 2 1 0 -1 -2 -3 -4

Largest (positive): all ones except an-1 = 0

Smallest (negative): all zeros except an-1 = 1

Amin = 2

n 1

Asymmetric range, non-redundant Standard in computers for signed integers nowadays


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Twos Complement Representation of Negative Numbers


It shifts the second half of the unsigned range into the negative by 2n E.g., on 8 bits:
N

True-and-Complement Systems for Signed Numbers


Transform signed numbers in unsigned and then use conventional systems

00000000 0 10000000 -128

01111111 10000000 127 128 01111111 127

11111111 255 minus two six

(unsigned)

110

11111111 00000000 -1 0

(signed)

AR

that is, A is represented as the unsigned integer 2n A


Z (signed)
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N (unsigned)
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digit vectors
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Mapping from Signed to Unsigned


A number A is represented through the unsigned number AR defined through a complementation constant

Inverse Mapping
Inversely
AR if AR < C / 2 A= AR C if AR > C / 2

AR = A mod C
This is equivalent (for |A| < C) to
True forms

A if A 0 AR = C A = C + A if A < 0
For the representation to be unambiguous, it must be

Complement forms

If AR = C / 2 can be represented, it can be assigned either to A = C / 2 or to A = C / 2, but the representation is then asymmetric ( system not close under sign change operation) If AR = C is can be represented, there are two representations for zero
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A < C/2
or at most equal
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Range Complement and Digit Complement Systems


Two particular cases of true-and-complement systems

Comparison of More Binary Representations on 3 Bits


Decimal Binary (Unsigned) 111 110 101 100 011 010 001 000 011 010 001 000 / 100 101 110 111 011 010 001 000 111 110 101 100
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Range complement: C = r n Digit complement: C = r n 1

Sign and Magnitude

Twos Complement

Ones Complement

7 6 5 4 3 2 1 0 -1

In radix-2
Twos complement: C = 2n Ones complement: C = 2n 1

011 010 001 000 / 111 110 101 100

Twos complement is asymmetric and nonredundant Ones complement is symmetric with a redundant zero
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-2 -3 -4

Equivalence of the Two Twos Complement Definitions


Using the true-and-complement definition, if AR < C / 2

Similar Property for Ones Complement


Using the true-and-complement definition, if AR < C / 2

A = AR an 1 = 0
If AR C / 2

A = ai 2i
i =0

n 2

A = AR an 1 = 0
If AR C / 2
n 2 i =0

A = ai 2i
i =0

n 2

A = AR C an 1 = 1

A = 2n + ai 2i = 2n + 2n 1 + ai 2i =
i =0

n 1

A = AR C an 1 = 1

A = (2n 1) + ai 2i = 2n + 2n 1 + 1 + ai 2i =
i =0 i =0

n 1

n 2

= 2n 1 + ai 2i
i =0

n 2

= 2n 1 + 1 + ai 2i
i =0

n 2

Hence the property

Hence the property


n 1

A = an 1 2
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+ ai 2
i =0

n 2

A = an 1 (2
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n 1

+ 1) + ai 2i
i =0
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n 2

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Sign
0 if A 0 sign( A) = 1 if A 0
For sign-and-magnitude is clearly trivial For true-and-complement too, it is

Implied Digits in the Unsigned Representation


Unsigned numbers (like naturals in decimal) have infinite leading zeros in front of them:

1 23410 00 001 23410 1 01012 0 0000 0001 01012


Changing the representation from n bits to m bits (m > n) is just a matter of padding the number with leading zeros

0 if AR < C / 2, that is if an 1 = 0 sign( A) = 1 if AR C / 2, that is if an 1 = 1


For all these representations
Sign bit

sign( A) = an 1
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Changing the Number of Bits in Ones and Twos Complement


Signed numbers can be thought as having infinite replicas of the MSB/sign in front of them

Sign Extension and Shift Right


Twos complement representation on n bits

(n)

= an 1an 2 ...a2 a1a0 = an 1 2

n 1

12
+20

+ ai 2i
i =0

n2

4 bits

23 +22

310
8 bits

Sign extended twos complement representation on m bits (m > n)

A( m ) = an 1...an 1an 1an 2 ...a2 a1a0 = = an 1 2


negative #)
m 1

1
27

1
+26

1
+25

1
+24

1
+23

1
+22

12
+20

310

m2

j = n 1

n 1

2 + ai 2i
j i =0

n2

Minus three on 4 bits is not represented as minus three on 8 bits!


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To extend from n to m bits, one adds (for positive #) zero or (for

( 2

m 1

+ 2 m 2 + ... + 2 n 1 2 n 1 0
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) (

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Addition in True-and-Complement
If there is no overflow (that is, we assume the result of the sum to be representable), S = A + B can be simply computed as

Twos Complement Addition


Particularly comfortable in twos complement, because C = 2n and performing mod 2n implies just to ignore the carry out bit

S R = ( AR + BR ) mod C
Easy to prove using (X mod Y) mod Y = X mod Y

Cout

Cin

( AR + BR ) mod C = ( A mod C + B mod C ) mod C = = ( A + B ) mod C = S mod C = S R


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S
Remember the intuitive derivation of the twos complement representation
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Ones Complement Addition


A little more complex in ones complement, because C = r n 1 and the modulo of WR = AR + BR is less easy
wn = 0 and WR mod (r n 1) = WR wn = 0 and WR mod (r n 1) = 0 if AR + BR < r n 1 if AR + BR = r n 1 if r n 1 < AR + BR 2(r n 1)

Ones Complement Addition


End-around carry A B

wn = 1 and WR mod (r n 1) = WR r n + 1

Cout

Hence
If wn = 0 S R = WR If wn = 1 S R = WR + 1, subtracting r n = 2n simply by ignoring wn

Cin

S
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Negation
Bitwise negation

Complement and Negation in True-and-Complement


Fundamental property in n-digit r-radix systems

A = not( A) = an 1 an 2 K a2 a1 a0
where, as usual in binary,
because an 1 an 2 an 1 an 2 r 1 r 1 1
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A + A + 1 = rn

a = ( r 1) a
Example in radix-2 on 4 bits:

a2 a2

a1 a1

a0 a0 1

+ = + =

A A 1 rn

r 1 r 1 r 1 0 0 0

610 = not(610 ) = 0 1 1 0 = 1001 = 10012 = 910


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Change of Sign
In ones complement

Change of Sign in Twos Complement


Another way of verifying the property

A= A
A = r n 1 A = A if A 0 A = r n 1 + A = r n ( r n 1 + A) 1 = A if A < 0

A + A = 1
Use twos complement property/definition
n2 n2 n 1 i n 1 an 1 2 + ai 2 + an 1 2 + ai 2i = i =0 i =0

In twos complement

A = A +1
A = r n A = A + 1 if A 0 A + 1 = r n + A + 1 = r n ( r n + A) 1 + 1 = A if A < 0
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= an 1 + an 1 2 n 1 + ai + ai 2i = 2 n 1 + 2i = 1
i =0 i =0
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n2

n2

Twos Complement Subtracter


A B = A + ( B ) = A + B + 1
A B

Twos Complement Adder/Subtracter


A B

Sub

Cout

Cin

Overflow?!

Cout

Cin

S
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S
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Overflows for Unsigned Addition


Limited range, thus sum of two numbers can exceed the range 1 + 1 1 1 1 1 0 0 0 0 0 0 1 1 1 0 0 0 0 0 12 0 02 0 12 20110 20010 40110
(>25510)

Overflows for Signed Addition


The situation is somehow different and the same simple rule does not hold anymore 1 + 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 12 02 12 12 -5510 -5610 -11110 -11110

Overflows if carry out is 1that is, if the first bit which cannot be stored is not null
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Carry out is 1, but now it is ok because the result is negative (think of sign extension)
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Overflows for Signed Addition


Overflows makes sum of positives look like negative or sum of negatives look like positive
9010 = 0101 10102

Overflows Addition and Subtraction


No overflow possible if adding operands of different sign Overflow only if
Op A 0 <0 0 <0 B 0 <0 <0 0 Result <0 0 <0 0 A+B A+B AB AB

10510 = 0110 10012 19510 = 1100 00112 -6110 = 1100 00112


10000000 11111111 00000000 11111111 10000000 11111111

Hence
OVF+ = an 1 bn 1 sn 1 + an 1 bn 1 sn 1 OVF = an 1 bn 1 sn 1 + an 1 bn 1 sn 1
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-128

-1 0

127 128

255

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Overflows Addition
Considering all possible cases around the last FA
an 1 0 0 0 0 1 1 1 1 bn 1 0 0 1 1 0 0 1 1 cn 1 0 1 0 1 0 1 0 1 cn 0 0 0 1 0 1 1 1 sn 1 0 1 1 0 1 0 0 1 Overflow No Yes No No No No Yes No

Fixed Point
In real life, one does not only need integers If one adds a fractional point in a fixed position, hardware for integers works just as well 0 1 0 0 12 + 0 0 0 1 12 0 1 1 0 02
24 23 22 21 20

910 310 1210

0 1. 0 0 12 + 0 0. 0 1 12 0 1. 1 0 02
21 20 2-1 2-2 2-3

1.12510 0.37510 1.50010

OVF+ = cn cn 1
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Its just a matter of representation!


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Fixed Point Requires Attention from Programmers Multiplication often introduces the need of arithmetic shifts to the right
0. 1 0 1 02 0. 0 1 1 02 0. 0 0 1 1 1 1 0 02

References
M. D. Ercegovac and T. Lang, Digital Arithmetic, Morgan Kaufmann, 2004 I. Koren, Computer Arithmetic Algorithms, Peters, 2002 A. R. Omondi, Computer Arithmetic Systems Algorithms, Architecture and Implementation, Prentice Hall, 1991 B. Parhami, Computer ArithmeticAlgorithms and Hardware Designs, Oxford, 2000

0.62510 0.37510 0.23437510 0.187510

0. 0 0 1 12

Note the low accuracy!


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