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CHARACTERISTICS OF P-N JUNCTION DIODE

Experiment No.: Remark: Date: Staff Signature:

AIM: To plot the forward bias and reverse bias characteristics of Germanium PN junction
diode.

APPARATUS: Sl.No
1. 2. 3. 4. 5. 6. 7.

Apparatus
Connecting Board Diode module Resistor DMM

Range
----DR-25 500

Quantity
1 1 1 1 1 1 -----

2V 100V 20 mA DMM 2000 A Dual D.C power supply 0 to 30V Connecting wires -----

THEORY: A K A P N K

Figure shows the construction and circuit symbol of a p-n junction diode, which is also known as a crystal diode. The arrow mark in the symbol represents the direction of flow of conventional current. A p-n junction diode is constructed using a single semiconductor crystal, in which one-half is doped with p-type impurity, while the other half is doped with n-type impurity. A p-n junction diode is a unidirectional device (allows current to flow in one direction & blocks it in the other direction). A p-n junction diode is a fast acting electronic switch used in rectifiers and other electronic circuits. It operates as a closed switch & offers very low resistance (ideally zero resistance) when it is forward biased. The diode acts as an open switch & offers very high resistance (ideally infinite resistance) when it is reverse biased. Ideally, a junction diode is assumed to have a zero cut-in voltage but practically germanium diodes have a cut-in voltage of 0.2 V & Silicon diodes have a cut-in voltage of 0.7 V.

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PROCEDURE: A] FORWARD BIAS:


1. 2. 3. 4. 5. 6. Connections are made as shown in circuit diagram. Select the 2V range for the voltmeter & 20 mA range for the ammeter in the two DMMs. The forward bias voltage Vf is increased in steps as shown in tabular column and corresponding value of forward current If at every step is noted down. A graph of forward voltage Vf V/s forward current If is plotted. The knee voltage point or cut- in voltage V is located and marked. The forward resistance Rf of the diode is determined from the graph using the relation: Rf = [VF/IF]

B] REVERSE BIAS:
1. 2. 3. 4. 5. 6. Connections are made as shown in circuit diagram. Select the 200V range for the voltmeter & 2000 A range for the ammeter in the two DMMs. The reverse bias voltage VR is increased in steps and corresponding reverse current Ir is noted down. A graph of reverse voltage VR V/s reverse current IR is plotted. The breakdown voltage point VBD is marked on the graph sheet. The reverse resistance Rr is calculated using the equation Rr = VR / IR

CIRCUIT DIAGRAM: FORWARD BIAS CONDITION: REVERSE BIAS CONDITION:

V 0-2V 500 DR 25

V 0-100V

500 + mA DR 25 060V
_

030V

020mA

0-2000A A +

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OBSERVATION TABLE: 1. FORWARD BIAS CONDITION:


Sl. No.

2. REVERSE BIAS CONDITION :


Sl. No.

VF (in Volt)

IF (in mA)

VR (in Volt)

IR (in A)

1 2 3 4 5 6 7 8 9 10

1 2 3 4 5 6 7 8 9 10

NATURE OF GRAPH FOR GERMANIUM DIODE:


IF

Forward bias Characteristics


IF VF

Rf = VF/IF

VR

VBD
VR IR

VF

Rr = VR / IR

Reverse bias Characteristics


IR

RESULT:

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CHARACTERISTICS OF ZENER DIODE


Experiment No.: Remark: Date: Staff Signature:

AIM: To plot the forward bias and reverse bias characteristics of a Zener diode. APPARATUS: Sl.No
1. 2. 3. 4. 5. 6. 7.

Apparatus
Connecting Board Zener diode module Resistor DMM DMM Dual D.C power supply Connecting wires

Range
----8.6 V 500 2V 100V 20 mA 0 to 30V -----

Quantity
1 1 1 1 1 1 -----

THEORY:
The Zener diode is also a P-N junction diode (silicon), the difference being that it has a sharp and well-defined break down under reverse biased condition. This breakdown voltage Vz is known as the Zener breakdown voltage. The Zener voltage can be precisely set by controlling doping level of P and N materials of the Zener during the manufacturing process. Under forward bias condition, the Zener diode behaves like a normal Silicon rectifier diode. It differs only under reverse bias condition wherein it exhibits a sharp & well-defined breakdown. The Zener diode is operated only beyond reverse breakdown region. When the junction breaks down, current flows through it. This heavy current may be due to Zener breakdown or Avalanche break down phenomenon or both. In the breakdown region, the voltage drop across the Zener diode is constant irrespective of current through it. This property of Zener diode makes it useful as a voltage-regulating device.

PROCEDURE: A] FORWARD BIAS:


1. 2. Connections are made as shown in circuit diagram. Select the 2V range for the voltmeter & 20 mA range for the ammeter in the two DMMs.
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3. 4. 5.

The forward bias voltage Vf is increased in steps as shown in tabular column and Corresponding value of forward current If is noted down at every step. A graph of forward voltage Vf V/s forward current If is plotted. The knee voltage point or cut- in voltage V is located and marked.

B] REVERSE BIAS:
1. 2. 3. 4. 5. 6. Connections are made as shown in circuit diagram. Select the 20V range for the voltmeter & 20 mA range for the ammeter in the two DMMs. The reverse bias voltage VR is increased in steps and corresponding reverse current Ir is noted down at every step. A graph of reverse voltage VR V/s reverse current IR is plotted. Zener breakdown voltage point V z is marked on the graph sheet. The Zener resistance Rz is calculated using the equation Rz = VR / IR

CIRCUIT DIAGRAM: FORWARD BIAS CONDITION:


+
_

REVERSE BIAS CONDITION:


_

V 0-2V 500 8.6 V

V 020V

500
_

030V

020mA

+ mA
_

8.6V 030V 020mA m

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NATURE OF GRAPH FOR ZENER DIODE:

OBSERVATION TABLE: 1. FORWARD BIAS CONDITION:


Sl. No.

2. REVERSE BIAS CONDITION :


Sl. No.

VF (in Volt)

IF (in mA)

VR (in Volt)

IR (in mA)

1 2 3 4 5 6 7 8 9 10

1 2 3 4 5 6 7 8 9 10

RESULT:

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CHARACTERISTICS OF TRANSISTOR IN C-B CONFIGURATION


Experiment No.: Remark: Date: Staff Signature:

AIM: To plot input and output characteristics of a NPN transistor in C-B configuration and
to determine its h-parameters.

APPARATUS: Sl.No
1. 2. 3. 4. 5. 6. 7.

Apparatus
Connecting Board Transistor SL-100 DMM DMM Dual D.C power supply Resistors Connecting wires

Range
--------2V 20V 20 mA 20 mA 0 to 30V 820, 220 -----

Quantity
1 1 2 2 1 2 -----

THEORY:
In common, base configuration the base lead is common to both input and output circuits. This is also known as grounded base configuration. This circuit offers low input impedance and very high output impedance. The voltage gain is medium. The output voltage is always in phase with the input voltage. This configuration is used as a wide band amplifier and a constant current source. The h-parameters or hybrid parameters help in the circuit analysis of BJT amplifier at low frequencies and handling small signals. The h-parameters are 4-constants, which help in determining the exact behavior of a transistor amplifier [input and output impedances, voltage gain and current gain] .They, are called hybrid parameters because the four parameters have mixed dimensions. In h-parameter analysis, the transistor is assumed to behave as a linear two port network. The transistor is shown as a voltage source on the input side with impedance hi in series with a voltage source hr.Vz.The output side is shown as a current source hf.I1 in shunt with admittance ho. The h-parameters are then obtained by considering the terminal behaviour of the equivalent circuit in terms of terminal voltage and the current. 1. hib= VBE/IE, VCB=constant. 2. hrb= VBE/VCB, IE=constant.
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hib is the short ckt input impedance hrb is the open ckt reverse voltage gain
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3. hfb= IC/IE, VCB= constant. 4. hob= IC/VCB, IE= constant.

hfb is the short ckt forward current gain. hob open ckt o/p conductance

PROCEDURE: A] INPUT CHARACTERISTICS


1) 2) 3) 4) 5) 6) 7) 8) Connections are made as shown in the circuit diagram. Select the 2V range for the voltmeter & 20 mA range for the ammeter in the two DMMs. on the input side. Select the 20V range for the voltmeter & 20 mA range for the ammeter in the two DMMs. on the output side. VCB is kept constant (0 volt) and VBE is increased in convenient steps and the corresponding value of IE is noted down at every step. VCB is then kept constant at 6V and step No(2) is repeated. A graph of VBE v/s IE is plotted. The h-parameter hib is determined using the relation: hib = VB/IE, The h-parameter hrb is determined using the relation: hrb = VBE/ VCB, VCB = 6V. IE =10mA.

B] OUTPUT CHARACTERISTICS
1) 2) 3) 4) 5) 6) 7) 8) Connections are made as shown in the circuit diagram. Select 2V range for the voltmeter & 20 mA range for the ammeter in the two DMMs. on the input side. Select the 20V range for the voltmeter & 20 mA range for the ammeter in the two DMMs. on the output side. The voltmeter shows VCB=0.7V bring it to 0V by increasing VCB using battery VCC then take the reading of VCB=0V and the IC values. VCB is then increased in steps of 5V and corresponding values of IC are noted down. A graph of VCB v/s IC is plotted. The h-parameter hfb is determined using the relation : hfb = IC/ IE, VCB =10V The h-parameter hob is determined using the relation : hob = IC/V CB, IE = 5mA.

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CIRCUIT DIAGRAM: TRANSISTOR IN CB CONFIGURATION:


RE = 820
-

0-20mA mA + E

SL100 C B

RC = 220

0-20mA
-

mA

+ +

VEE 0-30V

VBE 0-2V

V
+

VCB 0-20V

V
-

VCC 0-30V -

NATURE OF GRAPH: INPUT CHARACTERISTICS OUTPUT CHARACTERISTICS

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OBSERVATION TABLE: INPUT CHARACTERISTICS:


a] VCB1 = 0 V
Sl. No VBE in Volts IE in mA

b] VCB2 = 6 V
Sl. No VBE in Volts IE in mA

1 2 3 4 5 6 7

1 2 3 4 5 6 7

OUTPUT CHARACTERISTICS:
a] IE1 = 05mA
Sl. No VCB in Volts IC in mA

b] IE2 = 10mA
Sl. No VCB in Volts IC in mA

c] IE3 = 15mA
Sl. No VCB in Volts IC in mA

1 2 3 4 5 6 7

1 2 3 4 5 6 7

1 2 3 4 5 6 7

RESULT:

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CHARACTERISTICS OF TRANSISTOR IN C-E CONFIGURATION


Experiment No.: Remark:
configuration.

Date: Staff Signature:

AIM: To determine the input & output characteristics of a silicon NPN transistor in CE APPARATUS: Sl.No
1. 2. 3. 4. 5. 6. 7.

Apparatus
Connecting Board Transistor SL-100 DMM DMM Dual D.C power supply Resistor Connecting wires

Range
--------2V 20V 20 mA 2000 A 0 to 30V 1.2 K, 270 -----

Quantity
1 1 1 1 1 2 -----

THEORY:
In common, emitter configuration the emitter lead is common to both input and output circuits. This is also known as grounded emitter configuration. This circuit offers medium input impedance and medium output impedance. The voltage gain & current gains are very high. The output voltage is always out of phase with the input voltage. The transistor in C-E configuration is the most widely used amplifier. It is used in oscillators, voltage amplifiers and power amplifiers. The input characteristics is a plot of the input voltage v/s input current ( ie. VBE v/s IB ) keeping the output voltage constant ( ie. VCE is constant). The input characteristics resemble the forward bias characteristics of a P-N junction diode. An important parameter to be obtained from the input characteristics is the input resistance Ri , which is determined using the relation: Ri = VBE /IB, for a constant value of VCE. The output characteristics is a plot of the output voltage v/s output current (ie.VCE v/s IC) keeping the input current constant ( ie. IB is constant). In the output characteristics the collector current IC, rises suddenly for a small increase in voltage VCE up to 0.6 V and remains almost constant with further increase in voltage.

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Two important parameters to be obtained from the output characteristics are: (a) The output resistance Ro , is determined using the relation : Ro = VCE /IC, for a constant value of IB (b) The transistor current gain , is determined using the relation : = IC/ IB , for a constant value of VCE

PROCEDURE: A] INPUT CHARACTERISTICS:


1) Connections are made as shown in the circuit diagram. 2) Select 2V range for the voltmeter & 2000 A range for the ammeter in the two DMMs. on the input side. 3) Select the 20V range for the voltmeter & 20 mA range for the ammeter in the two DMMs. on the output side. 4) Both the voltage knobs are kept at zero position before switching ON the supply switch . 5) The output voltage VCE is first kept constant at 0 V. 6) The input voltage VBE is increased from 0V in convenient steps (0.1 V) and the corresponding values of input current IB are noted down at every step. 7) The output voltage VCE is then kept constant at 6V and step No.[6] is repeated. 8) The input characteristics is plotted as a graph of VBE v/s IB for different constant values of VCE ( ie. 0 V & 6 V). 9) The Input Resistance Ri is determined using the relation : Ri = VBE /IB, from the curve of VCE = 6 V.

B] OUTPUT CHARACTERISTICS:
1) Connections are made as shown in the circuit diagram. 2) Select 2V range for the voltmeter & 2000 A range for the ammeter in the two DMMs. on the input side. 3) Select the 20V range for the voltmeter & 20 mA range for the ammeter in the two DMMs. on the output side. 4) Initially adjust the input current (base current), IB1 = 20 A 5) The output voltage VCE is then increased in convenient steps and corresponding values of output current IC are noted down at every step. 6) The value of input current (base current) is increased to IB2 = 40 A and step no. (5) is repeated. 7) The value of input current (base current) is increased to IB3 = 60 A and step no. (5) is repeated. 8) The output characteristics is plotted as a graph of VCE v/s IC for different values of IB. 9) The output resistance Ro is determined using the relation :

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Ro = V CE/ IC from the curve of IB = 40 A. 10) The current gain of a transistor, is determined using the relation : = IC/ IB at a constant value of VCE = 5 V.

CIRCUIT DIAGRAM: TRANSISTOR IN C-E CONFIGURATION:


RC=270 _ 0 20 mA mA 0-2000 A 1.2 K _ C

+ A
VBB

B
+

SL1000 NPN E

+
V

0 - 30V

DMM
0-20V

VCC

0 - 30V

VBE

V
_

DMM 0-2V

VCE

NATURE OF GRAPH:
INPUT CHARACTERISTICS OUTPUT CHARACTERISTICS

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OBSERVATION TABLE:

INPUT CHARACTERISTICS
a) VCE1 = 0 V b) VCE2 = 6 V

Sl. No

VBE in Volts

IB in A

Sl. No

VBE in Volts

IB in A

1 2 3 4 5 6 7 8

1 2 3 4 5 6 7 8

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OUTPUT CHARACTERISTICS
a] IB1 = 20 A
Sl. No VCE in Volts IC in mA Sl. No

b] IB2 = 40 A
VCE in Volts IC in mA

1 2 3 4 5 6 7 8 9 10

1 2 3 4 5 6 7 8 9 10

RESULT:

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CHARACTERISTICS OF JFET
Experiment No.: Remark: Date: Staff Signature:

AIM: To plot the drain and transfer characteristics of a Junction Field Transistor [JFET]. APPARATUS: Sl.No
1. 2. 3. 4. 5. 6. 7.

Apparatus
Connecting Board Transistor (BFW-10) DMM DMM Dual D.C power supply Resistor Connecting wires

Range
--------20V 20V 20 mA 0 to 30V 270,  -----

Quantity
1 1 1 1 1 1 2 -----

THEORY:
The JFET is a semiconductor device in which the (drain) output current is controlled by an electric field created by reverse biasing the p-n junction of the device. When the Gate Source junction is reverse biased, a depletion region is formed in the N-channel sandwiched between the two P-type gate regions. The depletion width will regulate the channel width so that the current flowing through the Nchannel is controlled. Larger the reverse bias voltage larger will be the depletion width & lesser will be the drain (output) current. Current flow through the N-channel is only due to the flow of electrons, hence the JFET is known as a unipolar device, where as a BJT is a bipolar device.

DRAIN CHARACTERISTICS:
The drain characteristics of a typical JFET is obtained by plotting a graph of VDS v/s ID with VGS as a constant parameter. The channel between the two gate regions is fully open. Thus with VDS = 0, there is no potential difference between the drain and source, hence the drain current ID = 0. A small voltage VDS applied will create a potential difference between the drain and source and the drain current ID starts flowing. This drain current ID increase linearly with VDS. As the value of VDS is increased the channel gets pinched off at a particular value. After pinch off voltage is reached, the drain current begins to saturate and approaches a near constant value. If VDS is further, increased Avalanche breakdown takes place and current ID shoots up to a high value. The drain resistance rd of a JFET is the ratio of VDS to ID. It ranges from 100 to 100K.

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TRANSFER CHARACTERISTICS:
These are obtained by plotting a graph of Gate to Source voltage VGS V/s drain current ID with VDS as a constant parameter. The transconductance gm of the FET is a ratio of ID to VGS, with VDS = constant. Thus gm= ID/VGS with VDS=constant

PROCEDURE: A] DRAIN CHARACTERISTICS:


1) Connections are made as shown in the circuit diagram. 2) Select 20V range for the voltmeter in the DMM on the input side. 3) Select the 20V range for the voltmeter & 20 mA range for the ammeter in the two DMMs. on the output side. 4) Keep VGS constant at 0V. 5) Vary VDS in steps of 1V and note down the corresponding value of ID at every step. 6) Repeat step 5, keeping VGS constant at 1V and 2V . 7) A graph of VDS v/s ID with VGS constant is plotted. 8) Mark the point Vp (pinch off voltage) and IDSS (Drain to Source saturation current) on the curve for VGS=0V 9) Calculate the value of drain resistance rd using the relation : rd=VDS/ID with VGS constant.

B] TRANSFER CHARACTERISTICS:
1) Connections are made as shown in the circuit diagram. 2) Select 20V range for the voltmeter in the DMM on the input side. 3) Select the 20V range for the voltmeter & 20 mA range for the ammeter in the two DMMs. on the output side. 4) Keep VDS constant at 10V. 5) Vary VGS in steps of 1V and note down the corresponding value of ID at every step. 6) Repeat step 5 keeping VDS constant at 2V. 7) A graph of VGS v/s ID with VDS constant is plotted. 8) Calculate the value of Transconductance gm using the relation : gm=ID/VGS with VDS constant.

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CIRCUIT DIAGRAM:
_0-20mA +
mA

270

470

_
0-30V

D G BFW-10 S V

VGG
0-20V V

+
_

VDS
0-20V

0-30V

VGG

VDD

NATURE OF GRAPH: DRAIN CHARACTERISTICS TRANSFER CHARACTERISTICS

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OBSERVATION TABLE: DRAIN CHARACTERISTICS


a] VGS0 = 0 V b] VGS1 = 0.5 V

TRNSFER CHARACTERISTICS
Sl. No VDS in Volts ID in mA Sl. No VDS in Volts ID in mA

1 2 3 4 5 6 7 8

1 2 3 4 5 6 7 8

TRANSFER CHARACTERISTICS
a] VDS1 = 05 V
Sl. No

b] VDS2 = 01 V
ID in mA Sl. No

VGS
in Volts

VGS
in Volts

ID in mA

1 2 3 4 5 6 7

1 2 3 4 5 6 7

RESULT:
Drain Resistance rd = VDS/ID = ---------- k
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FREQUENCY RESPONSE OF COMMON COLLECTOR AMPLIFIER


Experiment No.: Remark: Date: Staff Signature:

AIM: To plot the frequency response of a common collector amplifier (Emitter follower). APPARATUS: Sl.No
1. 2. 3. 4. 5. 6. 7.

Apparatus
Connecting Board Transistor SL-100 Audio signal generator CRO & probes Resistor Capacitor Connecting wires

Range
--------1 Hz 5 MHz ----1K, 100K 1F -----

Quantity
1 1 1 1 2 2 -----

THEORY:
An emitter follower is a common collector transistor amplifier. It is known as an emitter follower because its voltage gain is nearly equal to unity and the output signal appearing at the emitter is exactly in phase with the input signal applied at the base (ie. the output signal is exactly in phase with the input signal). Hence any change in the input voltage will appear as an identical change at output ie. signal at the emitter follows the signal at the base. The input impedance is very high (1M) while output impedance can be very low (of the order of a few tens of Ohms). This is helpful in using an emitter follower as a buffer stage to obtain an excellent impedance matching between two stages. The value of input & output impedances can be decided by properly selecting the value of biasing resistances & the output resistance. The bandwidth of an emitter follower is extremely large because of its low voltage gain. Another important impedance matching circuit is the transformer coupled amplifier, however the advantage of using an emitter follower in comparison with the transformer coupled amplifier is that an emitter has an extremely large bandwidth whereas a transformer-coupled amplifier has limited bandwidth. The emitter follower circuit also provides an increased power level of the input signal because of its large circuit current gain, which is greater than (ie. = + 1).

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PROCEDURE:
1) Connections are made as shown in circuit diagram. 2) The biasing voltage is adjusted to 12 volts. 3) Connect the audio frequency generator across the input terminals of the amplifier & the CRO across the output terminals. 4) The input sine wave voltage is adjusted such that output waveform is undistorted. The input sine wave is obtained from an audio signal generator. 5) The input voltage is kept constant at 1V & the input frequency is varied in steps from 1Hz to 5 MHz. 6) The output voltage is noted down at every step. 7) The value of Attenuation ie. Attn. = (Vin/Vo) and the Attenuation in dB ie. 20. log (Vin/Vo) is calculated & tabulated. 8) 9) Frequency response curve is plotted as Attenuation v/s Frequency. The L.C.F and U.C.F are marked on the graph.

10) Band width is obtained using the relation : B.W = (U.C.F L.C.F) = (f2 f1) If L.C.F and U.C.F are not obtained ( ie. Attenuation is almost constant ), then it means that band width is very large.

CIRCUIT DIAGRAM: COMMON COLLECTOR AMPLIFIER:


Vcc= +12V

100 K

1 F
B C

EX-304, ELECTRONIC DEVICES & CIRCUITS I

+
ASG

SL-100
E

1 F

VIN 1K

vo

CDSE, Indore

FREQUENCY RESPONSE:
Attenuation in dB

+3
Min. Attn. (Amin)

BAND WIDTH = (UCF LCF) = (f2 f1)

Frequenc

f (LCF)

y f (UCF) in Hz

OBSERVATION TABLE:
Input voltage, Vin = 1 Volt(p-p) Input frequency f in Hz Attenuation in dB 20. log(Vin/Vo)

S. No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Output voltage Volts

Vo(p-p) in

Attenuation Attn.= Vin/Vo

RESULT :
Amplifier Bandwidth = -------------- kHz

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CDSE, Indore

FREQUENCY RESPONSE OF COMMON EMITTER AMPLIFIER


Experiment No.: Remark: Date: Staff Signature:

AIM: To plot the frequency response of a common emitter amplifier and to determine its
band width.

APPARATUS: Sl.No
1. 2. 3. 4. 5.

Apparatus
Connecting Board Transistor SL-100 Audio signal generator CRO & probes

Range
--------1 Hz 5 MHz ----Rc- 1K, R2- 47 K, RE-330, R1-4.7 K Cin, Co- 4.7F, CE- 100 F -----

Quantity
1 1 1 1

Resistor

6. 7.

Capacitor Connecting wires

3 -----

THEORY:
The R-C coupled amplifier is widely used as an audio amplifier because of its good frequency response, low cost and simplicity. It is a transistor amplifier in the C-E configuration. The C-E configuration is preferred because of its large voltage and current gains, medium input impedance and medium output impedance. It consists of a collector resistance RC that is mainly responsible for developing the output voltage. An emitter resistance RE that is used to provide operating point stability. Resistor RB1 is a voltage divider bias resistor, which provides the required reverse bias voltage across collector-base junction. RB2 is the second biasing resistor of the network, which provides the required forward bias voltage across base-emitter junction. Capacitor Cin is used to couple the ASG to the amplifier i.e. to isolate the ASG from the biasing network with respect to DC conditions. Cout is a capacitor used to isolate the amplifier circuit from the load with respect to DC. The bypass capacitor CE is used to provide a bypass path for AC signals and there by reduces the negative current feedback, which will reduce the amplifier gain considerably. The input signal is applied between base and emitter so that it drives an AC base current. Due to transistor action, this input current results in a collector current IC = .IB, where is the current gain of transistor in common emitter configuration. The output voltage is therefore amplified but suffers a phase shift of 180. The magnitude of the input signal should be such that the operating point always remains well within the active region, if not the output waveform would be clipped. (I.e. the transistor is driven into
EX-304, ELECTRONIC DEVICES & CIRCUITS I CDSE, Indore

saturation or cut-off by positive and negative input peaks respectively).The coupling capacitor Cin and Cout are mainly responsible for limiting the value of lower cut-off frequency (LCF f1) while the device or junction capacitance is responsible for limiting the values of upper cut-off frequency (UCF f2).

PROCEDURE: A] FREQUENCY RESPONSE:


1) Connections are made as shown in circuit diagram. 2) The biasing voltage is adjusted to 12 volts. 3) The input voltage is selected such that the output is undistorted ( Vin= 50mV). 4) The input voltage is maintained constant and input frequency is varied in convenient steps from 10Hz to 2 MHz as shown in the tabular column. 5) The output voltage is noted down at every step. 6) The values of amplifier gain and the amplifier gain in dB are calculated & tabulated. 7) The frequency response curve is plotted as amplifier gain in dB v/s frequency.

B] AMPLIFIER BANDWIDTH:
1) A graph of input frequency v/s amplifier gain is plotted to obtain the frequency response 2) The maximum gain point of the frequency response ie. (Gmax) is marked. 3) The 3dB points are also marked ie. (Gmax 3dB) to obtain two points on the Frequency response. 4) The upper cut off frequency (UCF f2) and lower cut-off frequency (LCF f1) are marked on X-axis. 5) The amplifier band width is obtained using the relation : Bandwidth = UCF LCF = [f2 f1] Hz.

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CIRCUIT DIAGRAM: COMMON EMITTER AMPLIFIER


VCC = + 12 V

R1

RC CO +

Cin +

RB

SL100
E

To CRO
+ CE

ASG

VIN

R2

RE

FREQUENCY RESPONSE:
Gain in dB

Max. Gain (Gmax)

3 dB

Band Width = (UCFLCF) = (f2 f1)

f (LCF)

f (UCF)

Frequency in Hz

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OBSERVATION TABLE:
Input voltage, Vin = 50 mV(p-p) Amplifier Gain in dB 20. log(Vo/Vin)

Input frequency f in Hz S. No.


1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Output voltage Vo(p-p) in Volts

Voltage gain Av = Vo/Vin

RESULT:
Amplifier Bandwidth = -------------- kHz

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CDSE, Indore

CLASS A POWER AMPLIFIER


Experiment No.: Remark: Date: Staff Signature:

AIM: To determine the conversion efficiency of Class A power amplifier. APPARATUS: Sl.No.
1. 2. 3. 4. 3. 4. 5.

Apparatus
Transistor SL-100 Power Amplifier Module Resistor Capacitor Audio Signal Generator CRO Patch Cords

Range Quantity
----1Hz5MHz --1 1 4 3 1 1 --

THEORY:
Power amplifiers are also known as large signal amplifier because the input voltage applied to power amplifier is quite large when compared with the biasing voltage magnitude. Power amplifier is basically a dc to ac power converter in which dc power from the supply is converted into useful ac power using a converting device, which is usually transistor, and the conversion process is controlled by the input signal. In almost all electronic circuits, the last stage is the driver stage which comprises of a power amplifier that can primarily provide sufficient power to drive any kind of output device efficiently and effectively. Important features of a power amplifier are its conversion efficiency, the maximum power level that the circuit can handle and its impedance matching with the circuit to be driven. Power amplifiers are classified on the basis of location of the operating point and the duration for which collector flows through the transistor. In Class A power amplifier the operating is located atmost at the center of the load line in the active region so that the transistor can effectively handle both the positive and negative half cycles. The collector current flows through the entire duration of 360 of the input cycles, i.e, the single transistor is capable of amplifying both the positive and negative cycles of the input effectively. Class A power amplifiers can be directly coupled (series fed) type or transformer coupled type with resistive loads amplifier. It is seen that the direct coupled Class A amplifier has a maximum theoretical conversion efficiency of 25%. While the Class A amplifier with transformer coupling will have a maximum theoretical conversion efficiency as high as

EX-304, ELECTRONIC DEVICES & CIRCUITS I

CDSE, Indore

50%. The amplifier efficiency will be maximum when it is driven with a large magnitude input signal and minimum when it is driven by a small signal. This is because maximum power dissipation occurs in the transistor when it is under quiescent conditions (when no signal is applied).

CIRCUIT DIAGRAM:
VCC = + 12V

mA

R1

RC CO +
C

Cin +

RB

B E

To CRO
+ CE

ASG

R2

RE

PROCEDURE:
1) Connections are made as shown in the circuit diagram. 2) The biasing voltage is kept at 12V by using the fixed 12V supply provided on the analog lab trainer board. 3) The input frequency is selected to be equal to 1KHz. 4) The input voltage is initially selected to be equal to 0.5V and kept constant. 5) With the input voltage at 0.5V, the output voltage is measured using a CRO and tabulated. 6) The collector current reading is also taken from the milliammeter and tabulated. 7) The input voltage is changed to another value as given in the tabular column. 8) For every input voltage, step number 6 & 7 are repeated. 9) The ac power is calculated using the equation: PAC = [VO(max)]2 / [2 RC] 10) The dc power is calculated using the equation : PDC = VCC IC 11) The conversion efficiency of Class A power amplifier is determined using the relation: Conversion Efficiency = PAC / PDC 12) The practical value of conversion efficiency obtained is compared with the theoretical value.

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CDSE, Indore

OBSERVATION TABLE:
S No. VIN (mv) VO (mv) RC (k) 4.7 4.7 4.7 PAC (w) VCC (v) IC (mA) PDC (w) = PAC / PDC

RESULT:

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CDSE, Indore

COLPITTS OSCILLATOR
Experiment No.: Remark: Date: Staff Signature:

AIM: To set up a Colpitts oscillator and verify the theoretical and practical values of frequency. APPARATUS: Sl.No.
1. 2. 3. 4. 5. 6. 7.

Apparatus
Transistor SL-100 Resistor Capacitor Inductor CRO Analog Trainer Kit Patch Cords

Range Quantity
---50mH -0-12V -1 3 4 2 1 1 --

THEORY:
The Colpitts oscillator is an LC oscillator which is basically used to generate radio frequency oscillations. The sinusoidal oscillations are generated by a LC tank circuit, which consists of two capacitors connected in parallel with an inductor. The two series capacitors form a voltage divider network to provide an appropriate amount of feedback. The feedback expression is given by CA / CB . The minimum value of amplifier gain required to obtain sustained oscillations is equal to [1 / (CA / CB) ] = [CA / CB] The transistor common-emitter amplifier produces a phase shift of 180, while another phase shift of 180 is provided by the LC tank circuit. Thus a total phase shift of 360 results in positive feedback and sustained oscillations. R1 & R2 forms a voltage divider biasing network. RE is the stabilizing resistor that provides the thermal stability for the operating point. CE is the bypass capacitor that prevents the negative feedback in the circuit. C1 & C2 are the input and output coupling capacitors. L is a radio frequency coil that helps in providing almost constant amplitude at all frequencies. When the supply is switched ON, a sudden flow of collector current excites the tank circuit and oscillations are set up. These oscillations are amplified and feedback through the tank circuit to obtain positive feedback. This result in sustained oscillation is given by the relation FTH = 1 / 2(L*CT), where CT = (CA * CB) / (CA + CB)
EX-304, ELECTRONIC DEVICES & CIRCUITS I CDSE, Indore

The frequency of oscillations can be varied by changing the values of L and C.

CIRCUIT DIAGRAM:

VCC R1 C1 LC

C2

VO

Q RE CE

R2

CA L

CB

PROCEDURE:
1) Connections are made as shown in figure. 2) Supply voltage of 12V which is available on trainer board is used. 3) The CRO probe is connected to the output points to observe the waveform generated by the Colpitts oscillator circuit. 4) The values of CA,CB and L are adjusted properly as shown in the tabular column to get the desired frequency: f = 1/ [2(L.CT)] where CT = CACB/ (CA+CB) 5) The practical value of frequency is determined and compared with the theoretical value. 6) Observe the output waveform and frequency with capacitor C4 connected to the tank circuit.

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CDSE, Indore

OBSERVATION TABLE:
Sl No. 1 2 C (F) C4= 0.22 C5= 0.15 C1 (F) 0.02 0.02 CT = CACB in F L in H 5 x 10-6 5 x 10-6 T (s) FPR (KHz) FTH (KHz)

RESULT:

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CDSE, Indore

CHARACTERISTICS OF MOSFET
Experiment No.: Remark: Date: Staff Signature:

AIM: To plot the drain characteristics and transfer characteristics of a Metal oxide semiconductor field effect transistor. APPARATUS:
Sl.No. APPARATUS 01. MOSFET 02. 03. 04. 05. 06. Rheostat Dual DC Power Supply Connecting Board Multimeter Patch Chords RANGE IRF740 1K 0-30 V,2 A ------QTY. 1 1 1 1 3 ---

THEORY:
Metal- oxide semiconductor field -effect transistor is an important power device suitable for very large scale integration, MOSFETs can be of n-channel and p-channel types. MOSFETs can be constructed with various semiconductor such as silicon and gallium arsenide, and with different insulators like SiO2 and AlO3 . The n- and p- channel MOSFETs can be of two types, namely, enhancement MOSFETs and depletion MOSFETs. The drain characteristics of a p-channel enhancement type MOSFETs are shown in figure. Each characteristics curve displays the variation of the drain current Td with the drain -to- source voltage VDS for a fixed gate to source voltage VGS. Suppose that for a given negative VGS the drain voltage is made slightly negative with respect to the source current flows from the source to the drain through the conducting channel acts as a resistance so that the drain current ID is proportional to the drain source voltage VDS. This gives the linear region or the ohmic region of the characteristics. The net voltage drop between the gate and substrate at the thickness of the channel gradually decreases from the source to the drain. The effect is more prominent with increasing VDS. As a result, the channel resistance increases with increasing VDS, causing the drain characteristics to bend. When VDS attains the value for which VGS-VDS =VT, the channel thickness at the drain end X goes to zero this is reffered to as pinch -off -point. At this point, the drain current saturates at a value IDSAT, the corresponding value of VDS being denoted by VDSAT.As VDS increases further, the pinch -off point X moves towards the source but the drain current remains almost the same. Thus the saturation region is the active region of the drain characteristics is attained. Note that in the saturation region, ID slightly increases with VDS as in the case of JFET. This is a manifestation of the so-called channel-length modulation. As VGS is made more negative, the effective channel conductance and hence the drain current increases for a given VDS

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CDSE, Indore

.The dashed-curve in fig. Shows the locus of the drain voltage VDSAT at which the drain current attains the value IDSAT. Note that the drain characteristics are similar those of a JFET. The transfer characteristics of a p- channel enhancement MOSFET shown in the figure .The curve depicts the variation of the drain current ID with the gate to-source voltage VGS for a given value of VDS. The transfer characteristics shows that for VGS are greater than equal to zero, the drain current ID is very is very small. When VGS is negative, ID rises slowly at first and then rapidly with increasing VGS. The gate-source threshold voltage VT at which ID attains a specified small value (say, 10 micro amp.) is quoted by the manufactures. For a p-channel MOSFET, VT=-4Vat room temperature, the drain supply voltage being typically -12V.The threshold voltage changes with temperature at the ratio of +- 2mV per C degree, where the minus sign holds for nchannel device and the plus sign for p-channel devices.

PROCEDURE: Drain characteristics:


1. The connections are made as shown in the circuit diagram. 2. With the voltage varying knobs of the power supply at minimum position the power switched ON.

supply

is

3. The value of VGS is adjusted to some convenient value by varying VGG. 4. By varying VDD the value of VDS is varied in steps and the corresponding value of ID is noted. 5. Step no. 4 is repeated for different values of VGS. 6. The Drain characteristics of VDS Vs ID for different values of VGS are plotted.

Transfer Characteristics:
1. 2. 3. 4. 5. The connections are made as shown in the circuit diagram. With the voltage varying knob of the power supply at minimum position the power supply is switched ON. The value of VDS is adjusted to some convenient value by varying VDD. By varying VGG the value of VGS is varied in steps and the corresponding value of ID is noted. The Transfer characteristic of VGS Vs ID is plotted.

EX-304, ELECTRONIC DEVICES & CIRCUITS I

CDSE, Indore

Circuit Diagram:-

Lead Identification:
For MOSFET IRF 740

EX-304, ELECTRONIC DEVICES & CIRCUITS I

CDSE, Indore

OBSERVATION TABLE: a] Drain characteristics:


VGS1 = Sl. No. VDS in Volts 01. 02. 03. 04. 05. 06. 07. 08. 09. 10. 11. 12. 13. 14. 15. Volts ID in Ma VGS2 = VDS in Volts Volts ID in mA

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CDSE, Indore

NATURE OF GRAPH:

b] Transfer characteristics
Sl. No. 01. 02. 03. 04. 05. 06. 07. 08. 09. VDS = VGS in Volts Volts ID in mA

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CDSE, Indore

NATURE OF GRAPH:

RESULT:

EX-304, ELECTRONIC DEVICES & CIRCUITS I

CDSE, Indore