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Inverter with Reduced Switching-Device Count for Independent AC Motor Control

Tsutomu Kominami
Department of Electrical and Computer Engineering Graduate School of Engineering Yokohama National University Email: kominami@fujilab.dnj.ynu.ac.jp

Yasutaka Fujimoto
Department of Electrical and Computer Engineering Faculty of Engineering Yokohama National University Email: fujimoto@ynu.ac.jp

Abstract This paper proposes a novel inverter named nineswitch inverter. The inverter has nine switching devices and can control two loads. First, the conguration of the inverter is introduced. Then, a PWM method for the inverter is elaborated. The validity of the inverter is veried by simulations and experiments. In addition, this paper proposes a 3N+3-switch inverter, which is an extension of the nine-switch inverter. This inverter has 3N+3 switches and can control N loads independently. The validity of the 3N+3-switch inverter is also veried by simulations.

UH

VH

WH

Load 1
UM VM WM

Load 2
UL VL WL

I. I NTRODUCTION Recently, PM motors have been applied for many industrial applications because they are very efcient and easy to control. Two methods exist for controlling two three-phase loads like PM motors. One is to provide two inverters to control the two loads. The other is to connect two loads in parallel with a single inverter. However, the former method needs large and expensive experimental apparatus and the latter cannot control two loads independently. To address these deciencies, we have proposed a novel nine-switch inverter that can independently control two three-phase loads[1][2][3]. A similar concept called the ve-leg inverter with ten switches has been reported. The principle of the ve-leg inverter has been veried by simulations[4][5]. Additionally, methods for controlling two ve-phase motors[6] and multiphase motors[7] with a single inverter supply were proposed. These methods are veried by experiments. This paper introduces the structure of the nine-switch inverter. This inverter, made from nine switches, has the advantage that the number of switching devices can be reduced compared with two three-phase inverters. The validity of the proposed inverter is veried by both simulations and experiments. In addition, we propose a 3N+3-switch inverter, which is an extension of the nine-switch inverter. This inverter has 3N+3 switches and can control N loads independently. II. S TRUCTURE OF THE P ROPOSED I NVERTER A. Basic Concept The structure of the nine-switch inverter is shown in Fig. 1, which combines two three-phase inverters with three common switches. In Fig. 1, the upper part is named Inv1, and the lower part is named Inv2. Inv1 consists of the switches designated
Fig. 1.

Main circuit of the proposed nine-switch inverter.

UH, VH, WH, UM, VM, and WM. Inv2 consists of the switches designated UM, VM, WM, UL, VL, and WL. Thus, the switches UM, VM, and WM are shared by Inv1 and Inv2. Gate signals for Inv1 and Inv2 are generated by PWM. The PWM strategy is shown in Fig. 2 and a close-up is shown in Fig. 3. This PWM has a particular carrier waveform, and there are two specic areas. During period (i), the reference for Inv2 is always lower than the carrier and the PWM for Inv1 is calculated. Moreover, during period (ii), the reference for Inv1 always exceeds the carrier and the PWM for Inv2 is calculated. Therefore, switches UL, VL, and WL are in the On state when Inv1 is driven (mode1). Then, switches UH, VH, and WH are in the On state when Inv2 is driven (mode2). The state of each mode is shown in Fig. 4. From these PWM methods, Inv2 is not controlled when Inv1 is controlled. Therefore, there is an uncontrolled term for each inverter. B. Method of Realization Carrier1 and carrier2 in Fig. 2 can be combined when the gate signals are generated. Therefore, the PWM of Inv1 is calculated at the upper part of a triangular wave, and the PWM of Inv2 is calculated at a lower part of the triangular wave. These methods are shown in Fig. 5. ref Let the U-phase voltage reference of Inv1 be Vu1 , and the ref ref U-phase voltage reference of Inv2 be Vu2 . Assume that Vu1 ref and Vu2 are given by
ref Vu1 ref Vu2

= A1 sin(2f1 t + 1 ) = A2 sin(2f2 t + 2 )

(1) (2)

Carrier 1, Reference 1
0

Inv 1 UH VH WH
Load 1

Carrier 2, Reference 2
0

UM

VM

WM
Load 2

UH, VH, WH
on off

UL, VL, and WL are in ON state.

UL, VL, WL
on off

mode1
UH, VH, and WH are in ON state.

Load 1

UM, VM, WM
on off

UM

VM

WM
Load 2

Fig. 2.

Principle of operation.
Carrier 1

UL

VL

WL Inv 2

Reference for Inv1

mode2
Carrier 2

Fig. 4.
0 Reference for Inv2

Operation mode (mode1 and mode2).

Carrier, Reference 1
0

(i)
Fig. 3.

(ii)

Principle of operation(closeup).

where A1 , A2 are the amplitudes, f1 , f2 are the frequencies and 1 , 2 are the phases. A general modulation rate m is given by m= V ref E/2 (3)

Reference 2
Fig. 5. PWM of the novel inverter.

where E is a dc source voltage. An offset E/4 is added to the reference in (1) and an offset E/4 is added to the reference in (2) when the proposed PWM is calculated. Therefore, m1u m2u = =
ref V ref 1 Vu1 + E/4 = u1 + E/2 E/2 2 ref V ref 1 Vu2 E/4 = u2 . E/2 E/2 2

(4) (5)

the reference of Inv1 and the upper part of the carrier. The gate signals for the switches UL, VL, and WL are negative logic value which are generated by the reference of Inv2 and the lower part of the carrier. The gate signals for switches UM, VM, and WM are reversed values generated by the logical OR value of the gate signals for switches UH, VH, WH, and UL, VL, WL. This method is shown in Fig. 6. III. I MPROVEMENT OF VOLTAGE U TILIZATION The voltage utilization for Inv1 and Inv2 is 50% when the previously mentioned method is used. In this section, a method to improve voltage utilization is proposed. Utilization of voltage sources for each inverter changes according to the value of the references. Let the distribution rate of voltage

From these transformations, the ranges of the references for ref Inv1 and Inv2 become E/4 Vu1 E/4, and E/4 ref Vu2 E/4, respectively. The gate signals for switches UH, VH, and WH are positive logic value which are generated by

Offset Signal 1 + +
0

Carrier, Reference 1
UH, VH, WH

Reference 1
0

0
0

UM, VM, WM UL, VL, WL

Reference 2
0

+ + Offset Signal 2

Reference 2
Fig. 7. PWM with the distribution rate of voltage utilization. TABLE I PARAMETERS OF SIMULATIONS . DC source voltage Frequency of the carrier Resistance Inductance E f R L 40 [V] 10 [kHz] 47 [] 15000 [H]

Carier

Fig. 6.

Method of generation gate signals.

utilization be (1 1). In rst, an equation of onephase is derived. is given by = A1 . A1 + A2 (6)

IV. S IMULATIONS A simulation is performed to verify the validity of the proposed inverter. In this simulation, a different reference is imposed on each inverter. The reference for Inv1 is a threephase sine wave with an amplitude of 10 [V] and a frequency of 320 [Hz], and the reference for Inv2 is a three-phase sine wave with an amplitude of 10 [V] and a frequency of 640 [Hz]. A three-phase LR load is connected to each inverter. Parameters for the simulations are shown in Table I. The Uphase current of Inv1 is shown in Fig. 9, and the U-phase current of Inv2 is shown in Fig. 10. According to these results, the nine-switch inverter can independently control both the amplitude and the frequency for two loads. V. E XPERIMENTS To verify the operation of the proposed inverter, an experiment is performed. The parameters of the experimentsl system are set exactly the same as for the simulation case. The reference for Inv1 is a three-phase sine wave with an amplitude of 10 [V] and a frequency of 320 [Hz], and the reference for Inv2 is a three-phase sine wave with an amplitude 10 [V] and a frequency of 640 [Hz]. The U-phase current of Inv1 is shown in Fig. 11, and the U-phase current of Inv2 is shown in Fig. 12. From these results, it is shown that the nine-switch inverter can independently control both the amplitude and the frequency for two loads. However, the current waves have a few ripple amplitude. VI. 3N+3-S WITCH I NVERTER The nine-switch inverter can be extended to a 3N+3switch inverter which can control N loads independently. The structure of the 3N+3-switch inverter is shown in Fig. 13. Let the distribution rate of voltage utilization for Inv n be n n (1 n 1, i=1 i = 1, ). The distribution rate of voltage utilization at a carrier waveform is shown in Fig. 14. From Fig. 14, offset signals are given by
k1

An offset using this is added to the variational reference for Inv1 and Inv2. The offsets are decided as each modulation rate locate on center of the divided carrier. Thus, each offset is given by oset 1 oset 2 = 1 (7) (8)

= .

Therefore, the modulation rates of the U-phase are given by m1u m2u = =
ref Vu1 +1 E/2 ref Vu2 . E/2

(9) (10)

Then, an equation for the three-phase is derived. The absolute maximum value for each three-phase reference sources are represented by r1 and r2 . Finally, rate of apportionment and the rate of modulations are given by = |r1 | |r1 | + |r2 | Vref m1 = 1 + (1 )e E/2 Vref m2 = 2 e E/2
ref T Vwi T mwi

(11) (12) (13)

where
ref Vi

= = = =

ref Vui

ref Vvi

(14) (15) (16)

mi e i

mui 1 1

mvi 1
T

1, 2 ; 1 mi 1.

This method can improve the voltage utilization of either Inv1 or Inv2. Figure 7 shows the PWM with the distribution rate of voltage utilization. A block diagram illustrating how to produce the modulation rate is shown in Fig. 8.

oset k k

= =

1 k 2 1, 2, n.
i=1

Vc (17)

V1

ref

m1

E
Max

UH,VH,WH
r1
1 1 1 1 1 1 Offset Signal (1-)

UM,VM,WM
m2

Max

r2

Offset Signal ()

V2

ref

UL,VL,WL
Carrier

Fig. 8.

Block diagram of generating the modulation rate.

400 300 200 Current [mA] 100 0 -100 -200 -300 -400 0 0.001 0.002 0.003 0.004 0.005 Time [sec.] 0.006 0.007 0.008 0.009 0.01 Current [mA]

400 300 200 100 0 -100 -200 -300 -400 0 0.001 0.002 0.003 0.004 0.005 Time [sec.] 0.006 0.007 0.008 0.009 0.01

Fig. 9. Simulated current of Inv1 (U-phase). The reference for Inv1 is a three-phase sine wave with an amplitude of 10 [V] and a frequency of 320 [Hz].
400 300 200 Current [mA] 100 0 -100 -200 -300 -400 0 0.001 0.002 0.003 0.004 0.005 Time [sec.] 0.006 0.007 0.008 0.009 0.01

Fig. 11. Measured current of Inv1 (U-phase). The reference for Inv1 is a three-phase sine wave with an amplitude of 10 [V] and a frequency of 320 [Hz].
400 300 200 Current [mA] 100 0 -100 -200 -300 -400 0 0.001 0.002 0.003 0.004 0.005 Time [sec.] 0.006 0.007 0.008 0.009 0.01

Fig. 10. Simulated current of Inv2 (U-phase). The reference for Inv2 is a three-phase sine wave with an amplitude of 10 [V] and a frequency of 640 [Hz].

Fig. 12. Measured current of Inv2 (U-phase). The reference for Inv2 is a three-phase sine wave with an amplitude of 10 [V] and a frequency of 640 [Hz]. TABLE II PARAMETERS OF SIMULATIONS .

Therefore, the modulation rate mk are given by mk


ref Vk

= =

ref Vk + oset k Vc E/2 ref Vuk ref Vvk ref Vwk T

(18) . (19)

DC source voltage Frequency of the carrier Resistance Inductance

E f R L

60 [V] 20 [kHz] 47 [] 15000 [H]

VII. S IMULATION OF 3N+3-S WITCH I NVERTER A simulation is performed to verify the validity of the 3N+3switch inverter for N = 3. The structure of the 3N+3-switch inverter for N = 3 is shown in Fig. 15, and a drive circuit is shown in Fig. 16. A three-phase LR load is connected to each inverter. Parameters for the simulations are shown in Table II. In this simulation, the reference for Inv1 is a three-phase sine wave with an amplitude of 10 [V](1 = 0.333) and a frequency of 150 [Hz], for Inv2 it is a three-phase sine wave with an

amplitude of 10 [V](2 = 0.333) and a frequency of 450 [Hz], for Inv3 it is a three-phase sine wave with an amplitude of 10 [V](3 = 0.333) and a frequency of 300[Hz]. The simulation results are shown in Figs. 17, 18, and 19. According to these results, the proposed inverter can independently control both the amplitude and the frequency for three loads. A. Simulation of an adjustable voltage utilization strategy A simulation is performed to verify an adjustable voltage utilization strategy. The parameters for the three-phase loads

UH

VH

WH

UH
Load 1

VH

WH

Load 1
UM1 VM1 WM1

UM1

VM1

WM1

Load 2

Load 2
UM2 VM2 WM2

UM2

VM2

WM2

Load 3
UMn-1 VMn-1 WMn-1

UL

VL

WL

Load n
UL VL WL

Fig. 15.

3N+3-switch inverter for N = 3.


0

Carier

Reference 1
0

+ + offset signal 1 + + offset signal 2 + + offset signal 3

UH, VH, WH

Fig. 13.

Main circuit of the proposed 3N+3-switch inverter.

Reference 2
0

UM1, VM1, WM1

Reference 3
0

UM2, VM2 WM2

Vc
offset 1 offset 2

UL, VL, WL

1 2

Fig. 16. Method of generation gate signals of 3N+3-switch inverter for N = 3.

VIII. C ONCLUSION
0 offset k

k n

offset n

Vc
Fig. 14. Voltage utilization of 3N+3-switch inverter.

have the same values as those used for the previous simulation. In this simulation, the reference for Inv1 is a three-phase sine wave with an amplitude of 15 [V](1 = 0.5) and a frequency of 150 [Hz], for Inv2 it is a three-phase sine wave with an amplitude of 3 [V](2 = 0.1) and a frequency of 450 [Hz], for Inv3 it is a three-phase sine wave with an amplitude of 12 [V](3 = 0.4) and a frequency of 300 [Hz]. The simulation results are shown in Figs. 20, 21, and 22. From these results, it is shown that the proposed method can control the distribution rate n . Therefore, this method can improve the voltage utilization of one or two inverters which are included in the 3N+3-switch inverter.

In this paper, a nine-switch inverter, which can independently control two three-phase loads, is introduced. Moreover, PWM for the nine-switch inverter is introduced. Several simulations and experiments are performed to verify the validity of the proposed inverter. The results of these experiments indicate that the nine-switch inverter can independently control both the amplitude and the frequency of two threephase loads. However, there are some ripple amplitude and a little interference between Inv1 and Inv2. In addition, a 3N+3-switch inverter, which can independently control N three-phase loads, is proposed. A simulation for N = 3 is performed to verify the validity of the proposed inverter. The results of the simulation indicate that the proposed inverter can independently control three three-phase loads. However, the dc-bus voltage is underutilized when the number of loads is increased. R EFERENCES
[1] Tsutomu Kominami, Yasutaka Fujimoto, Magnetic Levitatio Control and Spiral-Linear Transformation System for Spiral Motor, IEEE Int. Workshop on Advanced Motion Control, Vol. 2, pp.529-534, 2006. [2] Tsutomu Kominami, Yasutaka Fujimoto, Proposal of a Nine-Switch Inverter That Can Independently Control Two PM Motors, IEEJ Industry Applications Society Conference, 2006, (in Japanese). [3] Tsutomu Kominami, Yasutaka Fujimoto, Development of a Nine-Switch Inverter That Can Independently Control Two Loads, IEEJ Annual Meeting Record, pp.133-134, 2007, (in Japanese).

250 200 150 Current [mA] 100 50 0 - 50 -100 -150 -200 -250 0 0.001 0.002 0.003 0.004 0.005 Time [sec.] 400 300 200 Current [mA] 100 0 -100 -200 -300 -400 0 0.001 0.002 0.003 0.004 0.005 Time [sec.] 0.006 0.007 0.008 0.009 0.01 0.006 0.007 0.008 0.009 0.01

Inv 1

Current of U phase Current of V phase Current of W phase

Fig. 17. Simulated current of Inv1 (U-phase). The reference for Inv1 is a three-phase sine wave with an amplitude of 10 [V] and a frequency of 150 [Hz]. 1 = 0.333.
250 200 150 Current [mA] 100 50 0 - 50 -100 -150 -200 -250 0 0.001 0.002 0.003 0.004 0.005 Time [sec.] 0.006 0.007 0.008 0.009 0.01

Inv 1

Current of U phase Current of V phase Current of W phase

Inv 2

Current of U phase Current of V phase Current of W phase

Fig. 20. Simulated current of Inv1 (U-phase). The reference for Inv1 is a three-phase sine wave with an amplitude of 15 [V] and a frequency of 150 [Hz]. 1 = 0.5.
400 300 200 Current [mA] 100 0 -100 -200 -300 -400 0 0.001 0.002 0.003 0.004 0.005 Time [sec.] 0.006 0.007 0.008 0.009 0.01

Fig. 18. Simulated current of Inv2 (U-phase). The reference for Inv2 is a three-phase sine wave with an amplitude of 10 [V] and a frequency of 450 [Hz]. 2 = 0.333.
250 200 150 Current [mA] 100 50 0 - 50 -100 -150 -200 -250 0 0.001 0.002 0.003 0.004 0.005 Time [sec.] 0.006 0.007 0.008 0.009 0.01

Inv 2

Current of U phase Current of V phase Current of W phase

Inv 3

Current of U phase Current of V phase Current of W phase

Fig. 21. Simulated current of Inv2 (U-phase). The reference for Inv2 is a three-phase sine wave with an amplitude of 3 [V] and a frequency of 450 [Hz]. 2 = 0.1.
400 300 200 Current [mA] 100 0 -100 -200 -300 -400 0 0.001 0.002 0.003 0.004 0.005 Time [sec.] 0.006 0.007 0.008 0.009 0.01

Fig. 19. Simulated current of Inv3 (U-phase). The reference for Inv3 is a three-phase sine wave with an amplitude of 10 [V] and a frequency of 300 [Hz]. 3 = 0.333.

Inv 3

Current of U phase Current of V phase Current of W phase

[4] Yusuke Nozawa, Motoki Hizume, Yuta Kimura, Kazuo Oka, and Kouki Matsuse, Independent Position Control of Two Permanent Magnet Synchronous Motors with FiveLeg Inverter By the Expanded TwoArm Modulation Method, IEEJ Industry Applications Society Conference, 2005, (in Japanese). [5] Y. Kimura, M. Hizume, K. Oka, and K. Matsuse, Independent Vector Control of Two Induction Motors with Five-Leg Inverter by the Expanded Two PWM Method, The 2005 International Power Electronics Conference, pp.613-616, 2005. [6] Emil Levi, Martin Jones, Slobodan N. Vukosavic, Atif Iqbal, and Hamid A. Toliyat, Modeling, Control, and Experimental Investigation of a FivePhase Series-Connected Two-Motor Drive With Single Inverter Supply, IEEE Trans. on Industrial Electronics, Vol. 54, No 3, pp. 1504-1516, June 2007. [7] Emil Leve, Martin Jones, Slobodan N. Vukosavic, and Hamid A. Toliyat, A Novel Concept of a Multiphase, Multimotor Vector Controlled Drive System Supplied From a Single Voltage Source Inverter, IEEE Trans. on Power Electronics, Vol. 19, No. 2, March, 2004.

Fig. 22. Simulated current of Inv3 (U-phase). The reference for Inv3 is a three-phase sine wave with an amplitude of 12 [V] and a frequency of 300 [Hz]. 1 = 0.4.

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