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The circuit diagram of the Transistor Transistor Logic inverter is shown in Fig. 2.1. This circuit overcomes the limitations of the single transistor inverter circuit. Some of the notable features of the circuit structure of the TTL Logic family are as follows: (i) An input transistor, T1, which performs a current steering function, can be thought of as a back-to-back diode arrangement. VCC
RB T1
Fig. 2.2
RB
The transistor can operate in either forward or reverse mode to steer current to or from T2 . Since it has a forward current gain, it provides
a higher discharge current to discharge the base of T2 when turning it off. (ii) The output transistor pair, T3 and T4 shown in Fig. 2.3 and referred to as a totem-pole output, can actively source or sink current to or from capacitive loads and allows the output voltage to be defined independently of the load connected to the gate. Resistor, R 3 , serves to limit current. Under steady-state conditions, only one transistor is ON at a time.
T4 OFF
RL
T4 ON
T3 OFF
T3 ON
RL
130 1.6k 4k
R3
R1 T4
RB
Input
T1
T2 T3
Output
Vi
1k
R2
VO
VO
4
VOH MIN
(2.86V)
VOL MAX
(0.2V)
D
0
Vi
0.5V
VIL MAX
(1.2V)
VIH MIN
(1.4V)
(iii) The diode, D, serves to increase the effective VBE of T4 which allows T4 to be turned OFF before T3 turns ON fully. This prevents large surge currents from flowing when both transistors conduct during transitions between logic states. The disadvantage is that the high logic voltage is reduced by an amount of the diode drop as shown in Fig. 2.4.
T4
D
T3
VO
Figure 2.4
(iv) Finally, T2 is a phase splitter driving transistor to drive the output stage. It allows the logic condition to be phase-splitted in opposite directions so that the output transistors can be driven in anti-phase. This allows T3 to be ON when T4 is OFF and vice versa as shown in Fig. 2.5.
RC
Vi = LO T2 OFF VO1 = HI VO 2 = LO
VO1 T2 VO2 RE
Vi = HI T2 ON VO1 = LO VO 2 = HI
2.2
Logical Operation
The logical functioning of the circuit can be established by determining the state of conduction of each transistor in turn from input to output for all possible combinations of input states. Transistors can be taken as either ON or OFF. Note that the input transistor, T1, may conduct in either forward or reverse mode. Drawing up a table of conduction states accordingly with reference to Fig. 2.1 gives: INPUT LO HI T1 ONFOR ONREV T2 OFF ON T3 OFF ON T4 ONCUT-IN OFF D ONCUT-IN OFF OUPUT HI LO
LO in
HI out
and
HI in
LO out
2.3
Transfer Characteristic
The transfer characteristic can be deduced by applying a slowly increasing input voltage and determining the sequence of events which takes place with regard to changes in the states of conduction of each transistor and the critical points at which the onset of these changes occur. Consider the circuit and transfer characteristic of Fig. 2.1.
Point A With the input LO and the base current supplied to T1, this transistor can conduct in the forward mode. Since the only source of collector current is the leakage of T2 then T1 is driven into saturation. This ensures that T2 is OFF which, in turn, means that T3 is OFF. While there is no load present, there are leakage currents flowing in the output stage which allow the transistor T4 and the diode D to be barely conducting at the point of cutin.
Point B As the input voltage is slowly increased, the above condition prevails until, with T1 ON in saturation, the voltage at the base of T2 rises to reach the point of conduction. Then:
Point C As the input voltage is further increased, T2 becomes more conducting, turning fully ON. Base current to T2 is supplied by the forward biased base-collector junction of T1 which is still in saturation (i.e both junctions of T1 are forward biased). Eventually, T3 reaches the point of conduction. This happens when:
VO = VCC VR1 VBE 4 ON VD ON VO = 5 0.94 0.7 0.5 = 2.86V Point C : Vi = 1.2V VO = 2.86V
5
Point D As the input voltage is further increased, T2 conducts more heavily, eventually saturating. T3 also conducts more heavily and eventually reaches the point of saturation. As T2 becomes more conducting, its collector current increases. This in turn increases the voltage drop across R1 which in turn means that the voltage across T2, i.e. VCE2, decreases. This falls below the requirement for conduction in T4 and the diode, D, so that both of these turn OFF prior to the saturation of T3. When T3 reaches the edge of saturation:
Vi = VBE 2 SAT + VBE 3 ON VCE 1 SAT Vi = 0.8 + 0.7 0.1 = 1.4V VO = VCE 3 SAT 0.2V Point D : Vi = 1.4V, VO = 0.2V