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JBTech INDIA
VLSI Design Solutions and Project Training
Greater Noida (UP) - INDIA
www.jbtechindia.com
info@jbtechindia.com
2. Design
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2. Digital Design flow
9 Specification
9 Design Entry
9 Pre synthesis simulation
9 Synthesis
9 Post Synthesis Simulation
9 DFT Insertion
9 Static Timing analysis
9 Floor planning
9 Placement and Routing
9 Layout validation
9 Deep sub micron validation
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JBTech INDIA
Top down Design Flow
Design Constraints Logic Description Cell Library
(delay , area…) (Verilog , VHDL) Nand, nor, xor ,inv , DFF
Logic synthesis
Technology independent optimization
Technology mapping
Layout
cell placement , routing
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3. What is Fabrication
Semiconductor device fabrication is the process used to
create chips. It is a multiple-step sequence of photographic and
chemical processing steps during which electronic circuits are
gradually created on a wafer made of pure semiconducting
material. Silicon is the most commonly used semiconductor
material today, along with various compound semiconductors.
9 Mask 1 defines the areas in which the deep p-well
diffusions are to take place on an n-type substrate .
9 Mask 2 defines the thinox (or diffusion) regions, namely,
those areas where the thick oxide is to be stripped and
thin oxide grown to accommodate p and n-transistors and
wires
9 Mask 3 is used to pattern the polysilicon layer that is
deposited after the thin oxide
9 Mask 4 is a p-plus mask used to define all areas where p
diffusion is to take place.
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JBTech INDIA
(cont…)
9 Mask 5 is usually performed using the negative form
of the p-plus mask and defines those areas where n-
type diffusion is to take place.
9 Mask 6 defines contact cuts .
9 Mask 7 defines the metal layer pattern
9 Mask 8 is an overall passivation layer that is required
to define the openings for access to bonding pads .
Si substrate Si substrate
(a) (d)
polysilicon
SiO2 thinox
SiO2
Si substrate Si substrate
(b) (e)
polysilicon
thinox
SiO2 SiO2
Si substrate Si substrate
(c) (f)
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Wafer preparation
and fabrication are
not done in INDIA
except SCL