MOD 4-K: Simple Computer Advance Extensions

Illustration of Stack Growth:

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Adding Stack Manipulation Instructions

The opcodes that will be used for PSH and POP are as follows:

PSH save value in A register on stack Step 1: Decrement SP register Step 2: Store value in A register at the location pointed to by SP register

Implementation of PSH requires two execute cycles: First Execute Cycle: Second Execute Cycle: decrement SP register* (SPD) output new value of SP on address bus (SPA), enable a memory write operation (MSL and MWE), and tell the ALU to output value in the A register on the data bus (AOE)

. *Note: The new value of SP must be available (and stable) before it can be used to address memory

 POP: load A with value on stack Step 1: Load A register from memory location pointed to by SP register Step 2: Increment SP register

Implementation of POP requires only one execute cycle: First Execute Cycle: -Output value of SP on address bus (SPA), enable a memory read operation (MSL and MOE) -Tell the ALU to load the A register with the value on the data bus (ALE and ALX) -Tell the SP register to increment* (SPI) *Note: The SP register will be incremented after the A register is loaded with the contents of the location pointed to by the SP register, i.e., the SP increment is overlapped with the fetch of the next instruction

" System control equations MSL = RUN.q&(S0 # S1&(LDA # STA # ADD # SUB # AND # POP)# S2&PSH); MOE = S0 # S1&(LDA # ADD # SUB # AND # POP); MWE = S1&STA # S2&PSH; ARS = START; PCC = RUN.q&S0; POA = S0; IRL = RUN.q&S0; IRA = S1&(LDA # STA # ADD # SUB # AND); AOE = S1&STA # S2&PSH; ALE = RUN.q&S1&(LDA # ADD # SUB # AND # POP); ALX = S1&(LDA # AND # POP); ALY = S1&(SUB # AND); SPI = S1&POP; SPD = S1&PSH; SPA = S1&POP # S2&PSH; RST = S1&(LDA # STA # ADD # SUB # AND # POP) # S2&PSH; END

Adding Subroutine Linkage Instructions JSR addr Jump to SubRoutine at memory location addr Step 1: Decrement SP register Step 2: Store return address* at location pointed to by SP register

Step 3: Load PC with value in IR address field The opcodes that will be used for JSR and RTS:

Implementation of JSR requires three execute cycles: First Execute Cycle: Second Execute Cycle: Decrement SP register (SPD) Output new value of SP on address bus (SPA), enable a memory write operation (MSL and MWE), and tell the PC register to output its value on the data bus (POD) Tell IR register to output its operand field on the address bus (IRA), and tell the PC register to load the value on the address bus (PLA)

Third Execute Cycle:

 RTS Return From Subroutine Step 1: Load PC from memory location pointed to by SP register Step 2: Increment SP register

Implementation of RTS requires only one execute cycle: First Execute Cycle: output value of SP on address bus (SPA), enable a memory read operation (MSL and MOE), tell the PC to load the value on the data bus (PLD), and tell the SP register to increment* (SPI)

*Note: The SP register will be incremented after the PC register is loaded with the contents of the location pointed to by the SP register, i.e., the SP increment is overlapped with the fetch of the next instruction
" System control equations MSL = RUN.q&(S0 # S1&(LDA # STA # ADD # SUB # AND # RTS) # S2&JSR); MOE = S0 # S1&(LDA # ADD # SUB # AND # RTS); MWE = S1&STA # S2&JSR; ARS = START; PCC = RUN.q&S0; POA = S0; PLA = S3&JSR; POD = S2&JSR; PLD = S1&RTS; IRL = RUN.q&S0; IRA = S1&(LDA # STA # ADD # SUB # AND); AOE = S1&STA; ALE = RUN.q&S1&(LDA # ADD # SUB # AND); ALX = S1&(LDA # AND); ALY = S1&(SUB # AND); SPI = S1&RTS; SPD = S1&JSR; SPA = S1&RTS # S2&JSR; RST = S1&(LDA # STA # ADD # SUB # AND # RTS) # S3&JSR; END